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dt-bindings: soc: mediatek: convert pwrap documentation

- Convert soc/mediatek/pwrap.txt to soc/mediatek/mediatek,pwrap.yaml
- Add syscon compatible const for mt8186 and mt8195 to match the DTS needs,
which is missing from pwrap.txt.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Link: https://lore.kernel.org/r/20221005-mt6357-support-v8-2-560caaafee53@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

authored by

Alexandre Mergnat and committed by
Matthias Brugger
fc5a643f f32397bf

+149 -77
+1 -1
Documentation/devicetree/bindings/leds/leds-mt6323.txt
··· 9 9 For MT6323 MFD bindings see: 10 10 Documentation/devicetree/bindings/mfd/mt6397.txt 11 11 For MediaTek PMIC wrapper bindings see: 12 - Documentation/devicetree/bindings/soc/mediatek/pwrap.txt 12 + Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml 13 13 14 14 Required properties: 15 15 - compatible : Must be "mediatek,mt6323-led"
+1 -1
Documentation/devicetree/bindings/mfd/mt6397.txt
··· 13 13 It is interfaced to host controller using SPI interface by a proprietary hardware 14 14 called PMIC wrapper or pwrap. MT6397/MT6323 MFD is a child device of pwrap. 15 15 See the following for pwarp node definitions: 16 - ../soc/mediatek/pwrap.txt 16 + ../soc/mediatek/mediatek,pwrap.yaml 17 17 18 18 This document describes the binding for MFD device and its sub module. 19 19
+147
Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/soc/mediatek/mediatek,pwrap.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Mediatek PMIC Wrapper 8 + 9 + maintainers: 10 + - Flora Fu <flora.fu@mediatek.com> 11 + - Alexandre Mergnat <amergnat@baylibre.com> 12 + 13 + description: 14 + On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface 15 + is not directly visible to the CPU, but only through the PMIC wrapper 16 + inside the SoC. The communication between the SoC and the PMIC can 17 + optionally be encrypted. Also a non standard Dual IO SPI mode can be 18 + used to increase speed. 19 + 20 + IP Pairing 21 + 22 + On MT8135 the pins of some SoC internal peripherals can be on the PMIC. 23 + The signals of these pins are routed over the SPI bus using the pwrap 24 + bridge. In the binding description below the properties needed for bridging 25 + are marked with "IP Pairing". These are optional on SoCs which do not support 26 + IP Pairing 27 + 28 + properties: 29 + compatible: 30 + oneOf: 31 + - items: 32 + - enum: 33 + - mediatek,mt2701-pwrap 34 + - mediatek,mt6765-pwrap 35 + - mediatek,mt6779-pwrap 36 + - mediatek,mt6797-pwrap 37 + - mediatek,mt6873-pwrap 38 + - mediatek,mt7622-pwrap 39 + - mediatek,mt8135-pwrap 40 + - mediatek,mt8173-pwrap 41 + - mediatek,mt8183-pwrap 42 + - mediatek,mt8186-pwrap 43 + - mediatek,mt8188-pwrap 44 + - mediatek,mt8195-pwrap 45 + - mediatek,mt8365-pwrap 46 + - mediatek,mt8516-pwrap 47 + - items: 48 + - enum: 49 + - mediatek,mt8186-pwrap 50 + - mediatek,mt8195-pwrap 51 + - const: syscon 52 + 53 + reg: 54 + minItems: 1 55 + items: 56 + - description: PMIC wrapper registers 57 + - description: IP pairing registers 58 + 59 + reg-names: 60 + minItems: 1 61 + items: 62 + - const: pwrap 63 + - const: pwrap-bridge 64 + 65 + interrupts: 66 + maxItems: 1 67 + 68 + clocks: 69 + minItems: 2 70 + items: 71 + - description: SPI bus clock 72 + - description: Main module clock 73 + - description: System module clock 74 + - description: Timer module clock 75 + 76 + clock-names: 77 + minItems: 2 78 + items: 79 + - const: spi 80 + - const: wrap 81 + - const: sys 82 + - const: tmr 83 + 84 + resets: 85 + minItems: 1 86 + items: 87 + - description: PMIC wrapper reset 88 + - description: IP pairing reset 89 + 90 + reset-names: 91 + minItems: 1 92 + items: 93 + - const: pwrap 94 + - const: pwrap-bridge 95 + 96 + pmic: 97 + type: object 98 + 99 + required: 100 + - compatible 101 + - reg 102 + - reg-names 103 + - interrupts 104 + - clocks 105 + - clock-names 106 + 107 + dependentRequired: 108 + resets: [reset-names] 109 + 110 + allOf: 111 + - if: 112 + properties: 113 + compatible: 114 + contains: 115 + const: mediatek,mt8365-pwrap 116 + then: 117 + properties: 118 + clocks: 119 + minItems: 4 120 + 121 + clock-names: 122 + minItems: 4 123 + 124 + additionalProperties: false 125 + 126 + examples: 127 + - | 128 + #include <dt-bindings/interrupt-controller/irq.h> 129 + #include <dt-bindings/interrupt-controller/arm-gic.h> 130 + #include <dt-bindings/reset/mt8135-resets.h> 131 + 132 + soc { 133 + #address-cells = <2>; 134 + #size-cells = <2>; 135 + pwrap@1000f000 { 136 + compatible = "mediatek,mt8135-pwrap"; 137 + reg = <0 0x1000f000 0 0x1000>, 138 + <0 0x11017000 0 0x1000>; 139 + reg-names = "pwrap", "pwrap-bridge"; 140 + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; 141 + clocks = <&clk26m>, <&clk26m>; 142 + clock-names = "spi", "wrap"; 143 + resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>, 144 + <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>; 145 + reset-names = "pwrap", "pwrap-bridge"; 146 + }; 147 + };
-75
Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
··· 1 - MediaTek PMIC Wrapper Driver 2 - 3 - This document describes the binding for the MediaTek PMIC wrapper. 4 - 5 - On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface 6 - is not directly visible to the CPU, but only through the PMIC wrapper 7 - inside the SoC. The communication between the SoC and the PMIC can 8 - optionally be encrypted. Also a non standard Dual IO SPI mode can be 9 - used to increase speed. 10 - 11 - IP Pairing 12 - 13 - on MT8135 the pins of some SoC internal peripherals can be on the PMIC. 14 - The signals of these pins are routed over the SPI bus using the pwrap 15 - bridge. In the binding description below the properties needed for bridging 16 - are marked with "IP Pairing". These are optional on SoCs which do not support 17 - IP Pairing 18 - 19 - Required properties in pwrap device node. 20 - - compatible: 21 - "mediatek,mt2701-pwrap" for MT2701/7623 SoCs 22 - "mediatek,mt6765-pwrap" for MT6765 SoCs 23 - "mediatek,mt6779-pwrap" for MT6779 SoCs 24 - "mediatek,mt6797-pwrap" for MT6797 SoCs 25 - "mediatek,mt6873-pwrap" for MT6873/8192 SoCs 26 - "mediatek,mt7622-pwrap" for MT7622 SoCs 27 - "mediatek,mt8135-pwrap" for MT8135 SoCs 28 - "mediatek,mt8173-pwrap" for MT8173 SoCs 29 - "mediatek,mt8183-pwrap" for MT8183 SoCs 30 - "mediatek,mt8186-pwrap" for MT8186 SoCs 31 - "mediatek,mt8188-pwrap", "mediatek,mt8195-pwrap" for MT8188 SoCs 32 - "mediatek,mt8195-pwrap" for MT8195 SoCs 33 - "mediatek,mt8365-pwrap" for MT8365 SoCs 34 - "mediatek,mt8516-pwrap" for MT8516 SoCs 35 - - interrupts: IRQ for pwrap in SOC 36 - - reg-names: "pwrap" is required; "pwrap-bridge" is optional. 37 - "pwrap": Main registers base 38 - "pwrap-bridge": bridge base (IP Pairing) 39 - - reg: Must contain an entry for each entry in reg-names. 40 - - clock-names: Must include the following entries: 41 - "spi": SPI bus clock 42 - "wrap": Main module clock 43 - "sys": Optional system module clock 44 - "tmr": Optional timer module clock 45 - - clocks: Must contain an entry for each entry in clock-names. 46 - 47 - Optional properities: 48 - - reset-names: Some SoCs include the following entries: 49 - "pwrap" 50 - "pwrap-bridge" (IP Pairing) 51 - - resets: Must contain an entry for each entry in reset-names. 52 - - pmic: Using either MediaTek PMIC MFD as the child device of pwrap 53 - See the following for child node definitions: 54 - Documentation/devicetree/bindings/mfd/mt6397.txt 55 - or the regulator-only device as the child device of pwrap, such as MT6380. 56 - See the following definitions for such kinds of devices. 57 - Documentation/devicetree/bindings/regulator/mt6380-regulator.txt 58 - 59 - Example: 60 - pwrap: pwrap@1000f000 { 61 - compatible = "mediatek,mt8135-pwrap"; 62 - reg = <0 0x1000f000 0 0x1000>, 63 - <0 0x11017000 0 0x1000>; 64 - reg-names = "pwrap", "pwrap-bridge"; 65 - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; 66 - resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>, 67 - <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>; 68 - reset-names = "pwrap", "pwrap-bridge"; 69 - clocks = <&clk26m>, <&clk26m>; 70 - clock-names = "spi", "wrap"; 71 - 72 - pmic { 73 - compatible = "mediatek,mt6397"; 74 - }; 75 - };