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Documentation: dt: net: add ath9k wireless device binding

Add documentation how devicetree can be used to configure ath9k based
devices.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>

authored by

Martin Blumenstingl and committed by
Kalle Valo
fc383ffd 79e57dd1

+48
+48
Documentation/devicetree/bindings/net/wireless/qca,ath9k.txt
··· 1 + * Qualcomm Atheros ath9k wireless devices 2 + 3 + This node provides properties for configuring the ath9k wireless device. The 4 + node is expected to be specified as a child node of the PCI controller to 5 + which the wireless chip is connected. 6 + 7 + Required properties: 8 + - compatible: For PCI and PCIe devices this should be an identifier following 9 + the format as defined in "PCI Bus Binding to Open Firmware" 10 + Revision 2.1. One of the possible formats is "pciVVVV,DDDD" 11 + where VVVV is the PCI vendor ID and DDDD is PCI device ID. 12 + Typically QCA's PCI vendor ID 168c is used while the PCI device 13 + ID depends on the chipset - see the following (possibly 14 + incomplete) list: 15 + - 0023 for AR5416 16 + - 0024 for AR5418 17 + - 0027 for AR9160 18 + - 0029 for AR9220 and AR9223 19 + - 002a for AR9280 and AR9283 20 + - 002b for AR9285 21 + - 002c for AR2427 22 + - 002d for AR9227 23 + - 002e for AR9287 24 + - 0030 for AR9380, AR9381 and AR9382 25 + - 0032 for AR9485 26 + - 0033 for AR9580 and AR9590 27 + - 0034 for AR9462 28 + - 0036 for AR9565 29 + - 0037 for AR9485 30 + - reg: Address and length of the register set for the device. 31 + 32 + Optional properties: 33 + - qca,no-eeprom: Indicates that there is no physical EEPROM connected to the 34 + ath9k wireless chip (in this case the calibration / 35 + EEPROM data will be loaded from userspace using the 36 + kernel firmware loader). 37 + - mac-address: See ethernet.txt in the parent directory 38 + - local-mac-address: See ethernet.txt in the parent directory 39 + 40 + 41 + In this example, the node is defined as child node of the PCI controller: 42 + &pci0 { 43 + wifi@168c,002d { 44 + compatible = "pci168c,002d"; 45 + reg = <0x7000 0 0 0 0x1000>; 46 + qca,no-eeprom; 47 + }; 48 + };