arm64: dts: qcom: sm8350: fixup SDHCI interconnect arguments

After switching interconnects to 2 cells, the SDHCI interconnects need
to get one more argument.

Fixes: 4f287e31ff5f ("arm64: dts: qcom: sm8350: Use 2 interconnect cells")
Signed-off-by: Krzysztof Kozlowski <[e-mail]>
Reviewed-by: Konrad Dybcio <[e-mail]>
Signed-off-by: Bjorn Andersson <[e-mail]>
Link: https://lore.kernel.org/r/[e-mail]

arch/arm64/boot/dts/qcom/sm8350.dtsi

···
 				 <&rpmhcc RPMH_CXO_CLK>;
 			clock-names = "iface", "core", "xo";
 			resets = <&gcc GCC_SDCC2_BCR>;
-			interconnects = <&aggre2_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>,
-					<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_SDCC_2>;
+			interconnects = <&aggre2_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>,
+					<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>;
 			interconnect-names = "sdhc-ddr","cpu-sdhc";
 			iommus = <&apps_smmu 0x4a0 0x0>;
 			power-domains = <&rpmhpd SM8350_CX>;