tjh.dev
+62
arch/arm/include/asm/tls.h
+62
arch/arm/include/asm/tls.h
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#ifndef __ASMARM_TLS_H
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#define __ASMARM_TLS_H
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#include <linux/compiler.h>
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#include <asm/thread_info.h>
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#ifdef __ASSEMBLY__
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#include <asm/asm-offsets.h>
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.macro switch_tls_none, base, tp, tpuser, tmp1, tmp2
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#endif
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#ifndef __ASSEMBLY__
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static inline void set_tls(unsigned long val)
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{
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struct thread_info *thread;
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thread = current_thread_info();
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thread->tp_value[0] = val;
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/*
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* This code runs with preemption enabled and therefore must
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* be reentrant with respect to switch_tls.
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*
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* We need to ensure ordering between the shadow state and the
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* hardware state, so that we don't corrupt the hardware state
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* with a stale shadow state during context switch.
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*
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* If we're preempted here, switch_tls will load TPIDRURO from
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* thread_info upon resuming execution and the following mcr
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* is merely redundant.
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*/
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barrier();
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if (!tls_emu) {
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if (has_tls_reg) {
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asm("mcr p15, 0, %0, c13, c0, 3"
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: : "r" (val));
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} else {
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/*
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* User space must never try to access this
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* directly. Expect your app to break
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* eventually if you do so. The user helper
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* at 0xffff0fe0 must be used instead. (see
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* entry-armv.S for details)
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*/
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*((unsigned int *)0xffff0ff0) = val;
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}
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}
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}
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static inline unsigned long get_tpuser(void)
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{
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unsigned long reg = 0;
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return reg;
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}
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static inline void set_tpuser(unsigned long val)
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{
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/* Since TPIDRURW is fully context-switched (unlike TPIDRURO),
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* we need not update thread_info.
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*/
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if (has_tls_reg && !tls_emu) {
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asm("mcr p15, 0, %0, c13, c0, 2"
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: : "r" (val));
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}
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}
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static inline void flush_tls(void)
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{
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set_tls(0);
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set_tpuser(0);
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}
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#endif
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#endif /* __ASMARM_TLS_H */
+2
arch/arm/kernel/process.c
+2
arch/arm/kernel/process.c
+1
-1
arch/arm/kernel/thumbee.c
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-1
arch/arm/kernel/thumbee.c
+1
-16
arch/arm/kernel/traps.c
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-16
arch/arm/kernel/traps.c
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#define NR(x) ((__ARM_NR_##x) - __ARM_NR_BASE)
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asmlinkage int arm_syscall(int no, struct pt_regs *regs)
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{
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struct thread_info *thread = current_thread_info();
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siginfo_t info;
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if ((no >> 16) != (__ARM_NR_BASE>> 16))
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return regs->ARM_r0;
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case NR(set_tls):
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thread->tp_value[0] = regs->ARM_r0;
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if (tls_emu)
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return 0;
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if (has_tls_reg) {
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asm ("mcr p15, 0, %0, c13, c0, 3"
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: : "r" (regs->ARM_r0));
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} else {
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/*
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* User space must never try to access this directly.
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* Expect your app to break eventually if you do so.
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* The user helper at 0xffff0fe0 must be used instead.
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* (see entry-armv.S for details)
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*/
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*((unsigned int *)0xffff0ff0) = regs->ARM_r0;
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}
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set_tls(regs->ARM_r0);
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return 0;
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#ifdef CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG