Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/msm/dsi: Add dsi phy support for SM6150

Add phy configuration for SM6150

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Li Liu <quic_lliu6@quicinc.com>
Signed-off-by: Fange Zhang <quic_fangez@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/628009/
Link: https://lore.kernel.org/r/20241210-add-display-support-for-qcs615-platform-v4-6-2d875a67602d@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

authored by

Li Liu and committed by
Dmitry Baryshkov
fbf937a8 cb2f9144

+24
+2
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
··· 567 567 .data = &dsi_phy_14nm_8953_cfgs }, 568 568 { .compatible = "qcom,sm6125-dsi-phy-14nm", 569 569 .data = &dsi_phy_14nm_2290_cfgs }, 570 + { .compatible = "qcom,sm6150-dsi-phy-14nm", 571 + .data = &dsi_phy_14nm_6150_cfgs }, 570 572 #endif 571 573 #ifdef CONFIG_DRM_MSM_DSI_10NM_PHY 572 574 { .compatible = "qcom,dsi-phy-10nm",
+1
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
··· 46 46 extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8960_cfgs; 47 47 extern const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs; 48 48 extern const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs; 49 + extern const struct msm_dsi_phy_cfg dsi_phy_14nm_6150_cfgs; 49 50 extern const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs; 50 51 extern const struct msm_dsi_phy_cfg dsi_phy_14nm_2290_cfgs; 51 52 extern const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs;
+21
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c
··· 1032 1032 { .supply = "vcca", .init_load_uA = 73400 }, 1033 1033 }; 1034 1034 1035 + static const struct regulator_bulk_data dsi_phy_14nm_36mA_regulators[] = { 1036 + { .supply = "vdda", .init_load_uA = 36000 }, 1037 + }; 1038 + 1035 1039 const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs = { 1036 1040 .has_phy_lane = true, 1037 1041 .regulator_data = dsi_phy_14nm_17mA_regulators, ··· 1099 1095 .min_pll_rate = VCO_MIN_RATE, 1100 1096 .max_pll_rate = VCO_MAX_RATE, 1101 1097 .io_start = { 0x5e94400 }, 1098 + .num_dsi_phy = 1, 1099 + }; 1100 + 1101 + const struct msm_dsi_phy_cfg dsi_phy_14nm_6150_cfgs = { 1102 + .has_phy_lane = true, 1103 + .regulator_data = dsi_phy_14nm_36mA_regulators, 1104 + .num_regulators = ARRAY_SIZE(dsi_phy_14nm_36mA_regulators), 1105 + .ops = { 1106 + .enable = dsi_14nm_phy_enable, 1107 + .disable = dsi_14nm_phy_disable, 1108 + .pll_init = dsi_pll_14nm_init, 1109 + .save_pll_state = dsi_14nm_pll_save_state, 1110 + .restore_pll_state = dsi_14nm_pll_restore_state, 1111 + }, 1112 + .min_pll_rate = VCO_MIN_RATE, 1113 + .max_pll_rate = VCO_MAX_RATE, 1114 + .io_start = { 0xae94400 }, 1102 1115 .num_dsi_phy = 1, 1103 1116 };