Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'iio-for-6.4a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next

Jonathan writes:

1st set of IIO new device support, features and cleanups for the 6.4 cycle.

New device support
* bosch,bmp280
- Add support for BMP580 - includes significant refactoring and general
driver cleanup + support for non-volatile memory for trimming and config
parameters.
* rohm BU27034
- New driver for this 3 channel ambient light sensor.
- New support library for devices where both integration time and
amplifier gain are configurable. In these cases a scale change
may require changing bother underlying values. This library module
provides code to help with this.
* st,accel
- Add support for IIS328DQ (ID only as compatible wtih LIS331DL)
* st,lsm6dsx
- Add support for ASM330LHB automotive MEMS sensor.
* ti,ads1100, ads1000
- New driver for these 16 bit ADCs.
* ti,tmp117
- Add support for older tmp116 device. Includes some general driver cleanup.

Staging driver drops
* adi,ade7854
- Driver was a very long way from compliant with IIO infrastructure and ABI.
If anyone wants a non staging version of this driver they are better off
starting from scratch. Hence drop it and the associated meter.h header.

Features
* adi,ad7441r
- Add DT binding to set sink current for digital input.
* semtech,sx9324,9360
- Support older register mapping from firmware designed for windows.

Core improvements.
* Move iio_trigger_poll() docs to next to the implementation and add a note
on expected caller context.
* Rename iio_trigger_poll_chained() to iio_trigger_poll_nested() so
as to use more standard / common terminology.
* Improve main ABI docs references to offset and scale for raw values by
making them consistent and clear.

Cleanups and minor fixes:
* adi,ad5592r
- Add GPIO names - useful for debug.
* adi,ad7441r
- Fix current input, loop powered mode configuration setup.
* adi,adis16475
- Fix wrong commented value for minimum advised lower rate.
* adi,admv1013
- Use devm_clk_get_enabled() to reduce boilerplate.
* adi,ads1210
- Fix wrong bits for writing config register (late fix and has
been broken a long time so not rushed upstream)
* amlogic,meson-saradc
- Improve cleanup in error handling if BL30 handshake fails.
* apex-embedded,stx104
- Migrate to regmap and use regmap_read_poll_timeout() to neatly handle
retries.
- Add local mutex to close various races.
- Use define U16_MAX rather than value for limit.
- Improve code readability with minor reorganization.
* atmel,ad91-sama5d2
- Drop trivial dead code.
* kionix,kx022a
- Drop unused structure element.
* linear,ltc2983
- Reorganize bindings doc to enable unevaluatedProperties to be set
in one place for all child nodes.
- Make binding for adi,custom-thermocouple accept signed values.
* maxim,max44000
- Add OF Device matching (of_match_table was not correctly set).
* maxim,max5522
- Missing static
* measurement-computing,cio-dac
- Fix wrong part name in comments.
- Migrate to regmap.
- Improve includes by replacing bitops.h with more direct bits.h
* qcom,pm8xxx-xoadc
- Remove a check that can never fail.
* renesas,rcar-gyroadc
- DT binding documentation improvements.
- Tidy up an unused warning with __maybe_unused.
* semtech,sx_common
- Drop docs for a structure element that doesn't exist.
* semtech,sx9500
- Drop ACPI_PTR() and of_match_ptr() protections that just complicate
the code / block some firmware registration types that would otherwise
work.
* sensiron,sps30
- Comment formatting tidy up.
* st,sensors
- Drop duplicate text in DT binding.
* st,stm32-adc
- Add some missing static markings.
* ti,ads1100
- Use correct return code in dev_err_probe() call.
* x-powers,axp20x_adc - precursor series to simplify addition of AXP192.
- General code cleanup / minor refactoring for better readabilty of code.
- Switch from boolean value to mask for adc_en2 field to avoid hard coding
a mask that will be different in AXP192

* tag 'iio-for-6.4a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (63 commits)
MAINTAINERS: Add ROHM BU27034
iio: light: ROHM BU27034 Ambient Light Sensor
dt-bindings: iio: light: Support ROHM BU27034
MAINTAINERS: Add IIO gain-time-scale helpers
iio: light: Add gain-time-scale helpers
doc: Make sysfs-bus-iio doc more exact
iio: dac: set variable max5522_channels storage-class-specifier to static
dt-bindings: iio: temperature: ltc2983: Make 'adi,custom-thermocouple' signed
dt-bindings: iio: temperature: ltc2983: Fix child node unevaluated properties
iio: addac: stx104: Use regmap_read_poll_timeout() for conversion poll
iio: addac: stx104: Migrate to the regmap API
iio: addac: stx104: Improve indentation in stx104_write_raw()
iio: addac: stx104: Use define rather than hardcoded limit for write val
iio: addac: stx104: Fix race condition when converting analog-to-digital
iio: addac: stx104: Fix race condition for stx104_write_raw()
dt-bindings: iio: st-sensors: Fix repeated text
staging: iio: resolver: ads1210: fix config mode
iio: adc: ti-ads1100: fix error code in probe()
iio: accel: add support for IIS328DQ variant
dt-bindings: iio: st-sensors: Add IIS328DQ accelerometer
...

+5143 -2235
+7 -6
Documentation/ABI/testing/sysfs-bus-iio
··· 1807 1807 KernelVersion: 4.3 1808 1808 Contact: linux-iio@vger.kernel.org 1809 1809 Description: 1810 - Raw (unscaled no offset etc.) resistance reading that can be processed 1811 - into an ohm value. 1810 + Raw (unscaled no offset etc.) resistance reading. 1811 + Units after application of scale and offset are ohms. 1812 1812 1813 1813 What: /sys/bus/iio/devices/iio:deviceX/heater_enable 1814 1814 KernelVersion: 4.1.0 ··· 1894 1894 KernelVersion: 4.8 1895 1895 Contact: linux-iio@vger.kernel.org 1896 1896 Description: 1897 - Raw (unscaled no offset etc.) electric conductivity reading that 1898 - can be processed to siemens per meter. 1897 + Raw (unscaled no offset etc.) electric conductivity reading. 1898 + Units after application of scale and offset are siemens per 1899 + meter. 1899 1900 1900 1901 What: /sys/bus/iio/devices/iio:deviceX/in_countY_raw 1901 1902 KernelVersion: 4.10 ··· 1952 1951 KernelVersion: 4.18 1953 1952 Contact: linux-iio@vger.kernel.org 1954 1953 Description: 1955 - Raw (unscaled) phase difference reading from channel Y 1956 - that can be processed to radians. 1954 + Raw (unscaled) phase difference reading from channel Y. 1955 + Units after application of scale and offset are radians. 1957 1956 1958 1957 What: /sys/bus/iio/devices/iio:deviceX/in_massconcentration_pm1_input 1959 1958 What: /sys/bus/iio/devices/iio:deviceX/in_massconcentrationY_pm1_input
+25 -27
Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml
··· 34 34 clock-names: 35 35 const: fck 36 36 37 - power-domains: true 37 + power-domains: 38 + maxItems: 1 38 39 39 - resets: true 40 + resets: 41 + maxItems: 1 40 42 41 43 "#address-cells": 42 44 const: 1 ··· 53 51 - reg 54 52 - clocks 55 53 - clock-names 54 + - power-domains 55 + - resets 56 56 - "#address-cells" 57 57 - "#size-cells" 58 58 ··· 112 108 113 109 examples: 114 110 - | 115 - #include <dt-bindings/clock/r8a7791-clock.h> 111 + #include <dt-bindings/clock/r8a7791-cpg-mssr.h> 116 112 #include <dt-bindings/power/r8a7791-sysc.h> 117 - soc { 118 - #address-cells = <2>; 119 - #size-cells = <2>; 120 113 121 - adc@e6e54000 { 122 - compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc"; 123 - reg = <0 0xe6e54000 0 64>; 124 - clocks = <&mstp9_clks R8A7791_CLK_GYROADC>; 125 - clock-names = "fck"; 126 - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 114 + adc@e6e54000 { 115 + compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc"; 116 + reg = <0xe6e54000 64>; 117 + clocks = <&cpg CPG_MOD 901>; 118 + clock-names = "fck"; 119 + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 120 + resets = <&cpg 901>; 127 121 128 - pinctrl-0 = <&adc_pins>; 129 - pinctrl-names = "default"; 122 + #address-cells = <1>; 123 + #size-cells = <0>; 130 124 131 - #address-cells = <1>; 132 - #size-cells = <0>; 125 + adc@0 { 126 + reg = <0>; 127 + compatible = "maxim,max1162"; 128 + vref-supply = <&vref_max1162>; 129 + }; 133 130 134 - adc@0 { 135 - reg = <0>; 136 - compatible = "maxim,max1162"; 137 - vref-supply = <&vref_max1162>; 138 - }; 139 - 140 - adc@1 { 141 - reg = <1>; 142 - compatible = "maxim,max1162"; 143 - vref-supply = <&vref_max1162>; 144 - }; 131 + adc@1 { 132 + reg = <1>; 133 + compatible = "maxim,max1162"; 134 + vref-supply = <&vref_max1162>; 145 135 }; 146 136 }; 147 137 ...
+46
Documentation/devicetree/bindings/iio/adc/ti,ads1100.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/iio/adc/ti,ads1100.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: TI ADS1100/ADS1000 single channel I2C analog to digital converter 8 + 9 + maintainers: 10 + - Mike Looijmans <mike.looijmans@topic.nl> 11 + 12 + description: | 13 + Datasheet at: https://www.ti.com/lit/gpn/ads1100 14 + 15 + properties: 16 + compatible: 17 + enum: 18 + - ti,ads1100 19 + - ti,ads1000 20 + 21 + reg: 22 + maxItems: 1 23 + 24 + vdd-supply: true 25 + 26 + "#io-channel-cells": 27 + const: 0 28 + 29 + required: 30 + - compatible 31 + - reg 32 + 33 + additionalProperties: false 34 + 35 + examples: 36 + - | 37 + i2c { 38 + #address-cells = <1>; 39 + #size-cells = <0>; 40 + 41 + adc@49 { 42 + compatible = "ti,ads1100"; 43 + reg = <0x49>; 44 + }; 45 + }; 46 + ...
+9
Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml
··· 101 101 When not configured as a comparator, the GPO will be treated as an 102 102 output-only GPIO. 103 103 104 + drive-strength-microamp: 105 + description: | 106 + For channels configured as digital input, this configures the sink 107 + current. 108 + minimum: 0 109 + maximum: 1800 110 + default: 0 111 + multipleOf: 120 112 + 104 113 required: 105 114 - reg 106 115
+3
Documentation/devicetree/bindings/iio/imu/st,lsm6dsx.yaml
··· 46 46 - items: 47 47 - const: st,ism330is 48 48 - const: st,lsm6dso16is 49 + - items: 50 + - const: st,asm330lhb 51 + - const: st,asm330lhh 49 52 50 53 reg: 51 54 maxItems: 1
+46
Documentation/devicetree/bindings/iio/light/rohm,bu27034.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/iio/light/rohm,bu27034.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: ROHM BU27034 ambient light sensor 8 + 9 + maintainers: 10 + - Matti Vaittinen <mazziesaccount@gmail.com> 11 + 12 + description: | 13 + ROHM BU27034 is an ambient light sesnor with 3 channels and 3 photo diodes 14 + capable of detecting a very wide range of illuminance. Typical application 15 + is adjusting LCD and backlight power of TVs and mobile phones. 16 + https://fscdn.rohm.com/en/products/databook/datasheet/ic/sensor/light/bu27034nuc-e.pdf 17 + 18 + properties: 19 + compatible: 20 + const: rohm,bu27034 21 + 22 + reg: 23 + maxItems: 1 24 + 25 + vdd-supply: true 26 + 27 + required: 28 + - compatible 29 + - reg 30 + 31 + additionalProperties: false 32 + 33 + examples: 34 + - | 35 + i2c { 36 + #address-cells = <1>; 37 + #size-cells = <0>; 38 + 39 + light-sensor@38 { 40 + compatible = "rohm,bu27034"; 41 + reg = <0x38>; 42 + vdd-supply = <&vdd>; 43 + }; 44 + }; 45 + 46 + ...
+2
Documentation/devicetree/bindings/iio/pressure/bmp085.yaml
··· 17 17 https://www.bosch-sensortec.com/bst/products/all_products/bmp280 18 18 https://www.bosch-sensortec.com/bst/products/all_products/bme280 19 19 https://www.bosch-sensortec.com/bst/products/all_products/bmp380 20 + https://www.bosch-sensortec.com/bst/products/all_products/bmp580 20 21 21 22 properties: 22 23 compatible: ··· 27 26 - bosch,bmp280 28 27 - bosch,bme280 29 28 - bosch,bmp380 29 + - bosch,bmp580 30 30 31 31 reg: 32 32 maxItems: 1
+3 -3
Documentation/devicetree/bindings/iio/st,st-sensors.yaml
··· 11 11 what type of sensor it is. 12 12 Note that whilst this covers many STMicro MEMs sensors, some more complex 13 13 IMUs need their own bindings. 14 - The STMicroelectronics sensor devices are pretty straight-forward I2C or 15 - SPI devices, all sharing the same device tree descriptions no matter what 16 - type of sensor it is. 17 14 18 15 maintainers: 19 16 - Denis Ciocca <denis.ciocca@st.com> ··· 45 48 - st,lsm330d-accel 46 49 - st,lsm330dl-accel 47 50 - st,lsm330dlc-accel 51 + - items: 52 + - const: st,iis328dq 53 + - const: st,h3lis331dl-accel 48 54 - description: Silan Accelerometers 49 55 enum: 50 56 - silan,sc7a20
+39 -28
Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml
··· 18 18 https://www.analog.com/media/en/technical-documentation/data-sheets/29861fa.pdf 19 19 https://www.analog.com/media/en/technical-documentation/data-sheets/ltm2985.pdf 20 20 21 + $defs: 22 + sensor-node: 23 + type: object 24 + description: Sensor node common constraints 25 + 26 + properties: 27 + reg: 28 + description: 29 + Channel number. Connects the sensor to the channel with this number 30 + of the device. 31 + minimum: 1 32 + maximum: 20 33 + 34 + adi,sensor-type: 35 + description: Type of sensor connected to the device. 36 + $ref: /schemas/types.yaml#/definitions/uint32 37 + 38 + required: 39 + - reg 40 + - adi,sensor-type 41 + 42 + 21 43 properties: 22 44 compatible: 23 45 oneOf: ··· 86 64 const: 0 87 65 88 66 patternProperties: 89 - "@([0-9a-f]+)$": 90 - type: object 91 - description: Sensor. 92 - 93 - properties: 94 - reg: 95 - description: 96 - Channel number. Connects the sensor to the channel with this number 97 - of the device. 98 - minimum: 1 99 - maximum: 20 100 - 101 - adi,sensor-type: 102 - description: Type of sensor connected to the device. 103 - $ref: /schemas/types.yaml#/definitions/uint32 104 - 105 - required: 106 - - reg 107 - - adi,sensor-type 108 - 109 67 "^thermocouple@": 110 - type: object 68 + $ref: '#/$defs/sensor-node' 69 + unevaluatedProperties: false 70 + 111 71 description: Thermocouple sensor. 112 72 113 73 properties: ··· 127 123 description: 128 124 Used for digitizing custom thermocouples. 129 125 See Page 59 of the datasheet. 130 - $ref: /schemas/types.yaml#/definitions/uint64-matrix 126 + $ref: /schemas/types.yaml#/definitions/int64-matrix 131 127 minItems: 3 132 128 maxItems: 64 133 129 items: ··· 145 141 - adi,custom-thermocouple 146 142 147 143 "^diode@": 148 - type: object 144 + $ref: '#/$defs/sensor-node' 145 + unevaluatedProperties: false 146 + 149 147 description: Diode sensor. 150 148 151 149 properties: ··· 190 184 default: 0 191 185 192 186 "^rtd@": 193 - type: object 187 + $ref: '#/$defs/sensor-node' 188 + unevaluatedProperties: false 194 189 description: RTD sensor. 195 190 196 191 properties: ··· 289 282 - adi,custom-rtd 290 283 291 284 "^thermistor@": 292 - type: object 285 + $ref: '#/$defs/sensor-node' 286 + unevaluatedProperties: false 293 287 description: Thermistor sensor. 294 288 295 289 properties: ··· 391 383 - adi,custom-thermistor 392 384 393 385 "^adc@": 394 - type: object 386 + $ref: '#/$defs/sensor-node' 387 + unevaluatedProperties: false 395 388 description: Direct ADC sensor. 396 389 397 390 properties: ··· 406 397 type: boolean 407 398 408 399 "^temp@": 409 - type: object 400 + $ref: '#/$defs/sensor-node' 401 + unevaluatedProperties: false 410 402 description: Active analog temperature sensor. 411 403 412 404 properties: ··· 436 426 - adi,custom-temp 437 427 438 428 "^rsense@": 439 - type: object 429 + $ref: '#/$defs/sensor-node' 430 + unevaluatedProperties: false 440 431 description: Sense resistor sensor. 441 432 442 433 properties:
+5 -3
Documentation/devicetree/bindings/iio/temperature/ti,tmp117.yaml
··· 7 7 title: TI TMP117 - Digital temperature sensor with integrated NV memory 8 8 9 9 description: | 10 - TI TMP117 - Digital temperature sensor with integrated NV memory that supports 11 - I2C interface. 12 - https://www.ti.com/lit/gpn/tmp1 10 + TI TMP116/117 - Digital temperature sensor with integrated NV memory that 11 + supports I2C interface. 12 + https://www.ti.com/lit/gpn/tmp116 13 + https://www.ti.com/lit/gpn/tmp117 13 14 14 15 maintainers: 15 16 - Puranjay Mohan <puranjay12@gmail.com> ··· 18 17 properties: 19 18 compatible: 20 19 enum: 20 + - ti,tmp116 21 21 - ti,tmp117 22 22 23 23 reg:
+13
MAINTAINERS
··· 9947 9947 F: Documentation/devicetree/bindings/iio/adc/envelope-detector.yaml 9948 9948 F: drivers/iio/adc/envelope-detector.c 9949 9949 9950 + IIO LIGHT SENSOR GAIN-TIME-SCALE HELPERS 9951 + M: Matti Vaittinen <mazziesaccount@gmail.com> 9952 + L: linux-iio@vger.kernel.org 9953 + S: Maintained 9954 + F: drivers/iio/light/gain-time-scale-helper.c 9955 + F: drivers/iio/light/gain-time-scale-helper.h 9956 + 9950 9957 IIO MULTIPLEXER 9951 9958 M: Peter Rosin <peda@axentia.se> 9952 9959 L: linux-iio@vger.kernel.org ··· 18098 18091 S: Maintained 18099 18092 F: Documentation/devicetree/bindings/iio/light/bh1750.yaml 18100 18093 F: drivers/iio/light/bh1750.c 18094 + 18095 + ROHM BU27034 AMBIENT LIGHT SENSOR DRIVER 18096 + M: Matti Vaittinen <mazziesaccount@gmail.com> 18097 + L: linux-iio@vger.kernel.org 18098 + S: Supported 18099 + F: drivers/iio/light/rohm-bu27034.c 18101 18100 18102 18101 ROHM MULTIFUNCTION BD9571MWV-M PMIC DEVICE DRIVERS 18103 18102 M: Marek Vasut <marek.vasut+renesas@gmail.com>
+3
drivers/iio/Kconfig
··· 30 30 (e.g. software triggers). For more info see 31 31 Documentation/iio/iio_configfs.rst. 32 32 33 + config IIO_GTS_HELPER 34 + tristate 35 + 33 36 config IIO_TRIGGER 34 37 bool "Enable triggered sampling support" 35 38 help
+1
drivers/iio/Makefile
··· 9 9 industrialio-$(CONFIG_IIO_TRIGGER) += industrialio-trigger.o 10 10 11 11 obj-$(CONFIG_IIO_CONFIGFS) += industrialio-configfs.o 12 + obj-$(CONFIG_IIO_GTS_HELPER) += industrialio-gts-helper.o 12 13 obj-$(CONFIG_IIO_SW_DEVICE) += industrialio-sw-device.o 13 14 obj-$(CONFIG_IIO_SW_TRIGGER) += industrialio-sw-trigger.o 14 15 obj-$(CONFIG_IIO_TRIGGERED_EVENT) += industrialio-triggered-event.o
+1 -1
drivers/iio/accel/bma400_core.c
··· 1688 1688 1689 1689 if (FIELD_GET(BMA400_INT_DRDY_MSK, le16_to_cpu(data->status))) { 1690 1690 mutex_unlock(&data->mutex); 1691 - iio_trigger_poll_chained(data->trig); 1691 + iio_trigger_poll_nested(data->trig); 1692 1692 return IRQ_HANDLED; 1693 1693 } 1694 1694
+1 -2
drivers/iio/accel/kionix-kx022a.c
··· 162 162 int inc_reg; 163 163 int ien_reg; 164 164 165 - unsigned int g_range; 166 165 unsigned int state; 167 166 unsigned int odr_ns; 168 167 ··· 899 900 mutex_lock(&data->mutex); 900 901 901 902 if (data->trigger_enabled) { 902 - iio_trigger_poll_chained(data->trig); 903 + iio_trigger_poll_nested(data->trig); 903 904 ret = IRQ_HANDLED; 904 905 } 905 906
+1 -1
drivers/iio/accel/mma8452.c
··· 1067 1067 return IRQ_NONE; 1068 1068 1069 1069 if (src & MMA8452_INT_DRDY) { 1070 - iio_trigger_poll_chained(indio_dev->trig); 1070 + iio_trigger_poll_nested(indio_dev->trig); 1071 1071 ret = IRQ_HANDLED; 1072 1072 } 1073 1073
+1 -1
drivers/iio/accel/msa311.c
··· 951 951 } 952 952 953 953 if (new_data_int_enabled) 954 - iio_trigger_poll_chained(msa311->new_data_trig); 954 + iio_trigger_poll_nested(msa311->new_data_trig); 955 955 956 956 return IRQ_HANDLED; 957 957 }
+1
drivers/iio/accel/st_accel.h
··· 39 39 #define LIS302DL_ACCEL_DEV_NAME "lis302dl" 40 40 #define LSM303C_ACCEL_DEV_NAME "lsm303c_accel" 41 41 #define SC7A20_ACCEL_DEV_NAME "sc7a20" 42 + #define IIS328DQ_ACCEL_DEV_NAME "iis328dq" 42 43 43 44 44 45 #ifdef CONFIG_IIO_BUFFER
+1
drivers/iio/accel/st_accel_core.c
··· 517 517 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 518 518 .sensors_supported = { 519 519 [0] = H3LIS331DL_ACCEL_DEV_NAME, 520 + [1] = IIS328DQ_ACCEL_DEV_NAME, 520 521 }, 521 522 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 522 523 .odr = {
+5
drivers/iio/accel/st_accel_i2c.c
··· 119 119 .compatible = "silan,sc7a20", 120 120 .data = SC7A20_ACCEL_DEV_NAME, 121 121 }, 122 + { 123 + .compatible = "st,iis328dq", 124 + .data = IIS328DQ_ACCEL_DEV_NAME, 125 + }, 122 126 {}, 123 127 }; 124 128 MODULE_DEVICE_TABLE(of, st_accel_of_match); ··· 161 157 { LIS302DL_ACCEL_DEV_NAME }, 162 158 { LSM303C_ACCEL_DEV_NAME }, 163 159 { SC7A20_ACCEL_DEV_NAME }, 160 + { IIS328DQ_ACCEL_DEV_NAME }, 164 161 {}, 165 162 }; 166 163 MODULE_DEVICE_TABLE(i2c, st_accel_id_table);
+5
drivers/iio/accel/st_accel_spi.c
··· 100 100 .compatible = "st,lsm303c-accel", 101 101 .data = LSM303C_ACCEL_DEV_NAME, 102 102 }, 103 + { 104 + .compatible = "st,iis328dq", 105 + .data = IIS328DQ_ACCEL_DEV_NAME, 106 + }, 103 107 {} 104 108 }; 105 109 MODULE_DEVICE_TABLE(of, st_accel_of_match); ··· 161 157 { LIS3DE_ACCEL_DEV_NAME }, 162 158 { LIS302DL_ACCEL_DEV_NAME }, 163 159 { LSM303C_ACCEL_DEV_NAME }, 160 + { IIS328DQ_ACCEL_DEV_NAME }, 164 161 {}, 165 162 }; 166 163 MODULE_DEVICE_TABLE(spi, st_accel_id_table);
+10
drivers/iio/adc/Kconfig
··· 1229 1229 This driver can also be built as a module. If so, the module will be 1230 1230 called ti-ads7924. 1231 1231 1232 + config TI_ADS1100 1233 + tristate "Texas Instruments ADS1100 and ADS1000 ADC" 1234 + depends on I2C 1235 + help 1236 + If you say yes here you get support for Texas Instruments ADS1100 and 1237 + ADS1000 ADC chips. 1238 + 1239 + This driver can also be built as a module. If so, the module will be 1240 + called ti-ads1100. 1241 + 1232 1242 config TI_ADS7950 1233 1243 tristate "Texas Instruments ADS7950 ADC driver" 1234 1244 depends on SPI && GPIOLIB
+1
drivers/iio/adc/Makefile
··· 108 108 obj-$(CONFIG_TI_ADC128S052) += ti-adc128s052.o 109 109 obj-$(CONFIG_TI_ADC161S626) += ti-adc161s626.o 110 110 obj-$(CONFIG_TI_ADS1015) += ti-ads1015.o 111 + obj-$(CONFIG_TI_ADS1100) += ti-ads1100.o 111 112 obj-$(CONFIG_TI_ADS7924) += ti-ads7924.o 112 113 obj-$(CONFIG_TI_ADS7950) += ti-ads7950.o 113 114 obj-$(CONFIG_TI_ADS8344) += ti-ads8344.o
+1 -1
drivers/iio/adc/ad7606.c
··· 477 477 478 478 if (iio_buffer_enabled(indio_dev)) { 479 479 gpiod_set_value(st->gpio_convst, 0); 480 - iio_trigger_poll_chained(st->trig); 480 + iio_trigger_poll_nested(st->trig); 481 481 } else { 482 482 complete(&st->completion); 483 483 }
+2 -6
drivers/iio/adc/at91-sama5d2_adc.c
··· 1194 1194 { 1195 1195 struct iio_dev *indio_dev = data; 1196 1196 1197 - iio_trigger_poll_chained(indio_dev->trig); 1197 + iio_trigger_poll_nested(indio_dev->trig); 1198 1198 } 1199 1199 1200 1200 static int at91_adc_dma_start(struct iio_dev *indio_dev) ··· 2400 2400 st->dma_st.phys_addr = res->start; 2401 2401 2402 2402 st->irq = platform_get_irq(pdev, 0); 2403 - if (st->irq <= 0) { 2404 - if (!st->irq) 2405 - st->irq = -ENXIO; 2406 - 2403 + if (st->irq < 0) 2407 2404 return st->irq; 2408 - } 2409 2405 2410 2406 st->per_clk = devm_clk_get(&pdev->dev, "adc_clk"); 2411 2407 if (IS_ERR(st->per_clk))
+39 -38
drivers/iio/adc/axp20x_adc.c
··· 5 5 * Quentin Schulz <quentin.schulz@free-electrons.com> 6 6 */ 7 7 8 + #include <linux/bitfield.h> 8 9 #include <linux/completion.h> 9 10 #include <linux/interrupt.h> 10 11 #include <linux/io.h> ··· 23 22 #include <linux/mfd/axp20x.h> 24 23 25 24 #define AXP20X_ADC_EN1_MASK GENMASK(7, 0) 26 - 27 25 #define AXP20X_ADC_EN2_MASK (GENMASK(3, 2) | BIT(7)) 26 + 28 27 #define AXP22X_ADC_EN1_MASK (GENMASK(7, 5) | BIT(0)) 29 28 30 29 #define AXP20X_GPIO10_IN_RANGE_GPIO0 BIT(0) 31 30 #define AXP20X_GPIO10_IN_RANGE_GPIO1 BIT(1) 32 - #define AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(x) ((x) & BIT(0)) 33 - #define AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(x) (((x) & BIT(0)) << 1) 34 31 35 32 #define AXP20X_ADC_RATE_MASK GENMASK(7, 6) 33 + #define AXP20X_ADC_RATE_HZ(x) ((ilog2((x) / 25) << 6) & AXP20X_ADC_RATE_MASK) 34 + 35 + #define AXP22X_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 6) & AXP20X_ADC_RATE_MASK) 36 + 36 37 #define AXP813_V_I_ADC_RATE_MASK GENMASK(5, 4) 37 38 #define AXP813_ADC_RATE_MASK (AXP20X_ADC_RATE_MASK | AXP813_V_I_ADC_RATE_MASK) 38 - #define AXP20X_ADC_RATE_HZ(x) ((ilog2((x) / 25) << 6) & AXP20X_ADC_RATE_MASK) 39 - #define AXP22X_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 6) & AXP20X_ADC_RATE_MASK) 40 39 #define AXP813_TS_GPIO0_ADC_RATE_HZ(x) AXP20X_ADC_RATE_HZ(x) 41 40 #define AXP813_V_I_ADC_RATE_HZ(x) ((ilog2((x) / 100) << 4) & AXP813_V_I_ADC_RATE_MASK) 42 41 #define AXP813_ADC_RATE_HZ(x) (AXP20X_ADC_RATE_HZ(x) | AXP813_V_I_ADC_RATE_HZ(x)) ··· 235 234 struct iio_chan_spec const *chan, int *val) 236 235 { 237 236 struct axp20x_adc_iio *info = iio_priv(indio_dev); 238 - int size = 12; 237 + int ret, size; 239 238 240 239 /* 241 240 * N.B.: Unlike the Chinese datasheets tell, the charging current is ··· 247 246 else 248 247 size = 12; 249 248 250 - *val = axp20x_read_variable_width(info->regmap, chan->address, size); 251 - if (*val < 0) 252 - return *val; 249 + ret = axp20x_read_variable_width(info->regmap, chan->address, size); 250 + if (ret < 0) 251 + return ret; 253 252 253 + *val = ret; 254 254 return IIO_VAL_INT; 255 255 } 256 256 ··· 259 257 struct iio_chan_spec const *chan, int *val) 260 258 { 261 259 struct axp20x_adc_iio *info = iio_priv(indio_dev); 260 + int ret; 262 261 263 - *val = axp20x_read_variable_width(info->regmap, chan->address, 12); 264 - if (*val < 0) 265 - return *val; 262 + ret = axp20x_read_variable_width(info->regmap, chan->address, 12); 263 + if (ret < 0) 264 + return ret; 266 265 266 + *val = ret; 267 267 return IIO_VAL_INT; 268 268 } 269 269 ··· 273 269 struct iio_chan_spec const *chan, int *val) 274 270 { 275 271 struct axp20x_adc_iio *info = iio_priv(indio_dev); 272 + int ret; 276 273 277 - *val = axp20x_read_variable_width(info->regmap, chan->address, 12); 278 - if (*val < 0) 279 - return *val; 274 + ret = axp20x_read_variable_width(info->regmap, chan->address, 12); 275 + if (ret < 0) 276 + return ret; 280 277 278 + *val = ret; 281 279 return IIO_VAL_INT; 282 280 } 283 281 ··· 449 443 int *val) 450 444 { 451 445 struct axp20x_adc_iio *info = iio_priv(indio_dev); 446 + unsigned int regval; 452 447 int ret; 453 448 454 - ret = regmap_read(info->regmap, AXP20X_GPIO10_IN_RANGE, val); 449 + ret = regmap_read(info->regmap, AXP20X_GPIO10_IN_RANGE, &regval); 455 450 if (ret < 0) 456 451 return ret; 457 452 458 453 switch (channel) { 459 454 case AXP20X_GPIO0_V: 460 - *val &= AXP20X_GPIO10_IN_RANGE_GPIO0; 455 + regval = FIELD_GET(AXP20X_GPIO10_IN_RANGE_GPIO0, regval); 461 456 break; 462 457 463 458 case AXP20X_GPIO1_V: 464 - *val &= AXP20X_GPIO10_IN_RANGE_GPIO1; 459 + regval = FIELD_GET(AXP20X_GPIO10_IN_RANGE_GPIO1, regval); 465 460 break; 466 461 467 462 default: 468 463 return -EINVAL; 469 464 } 470 465 471 - *val = *val ? 700000 : 0; 472 - 466 + *val = regval ? 700000 : 0; 473 467 return IIO_VAL_INT; 474 468 } 475 469 ··· 554 548 long mask) 555 549 { 556 550 struct axp20x_adc_iio *info = iio_priv(indio_dev); 557 - unsigned int reg, regval; 551 + unsigned int regmask, regval; 558 552 559 553 /* 560 554 * The AXP20X PMIC allows the user to choose between 0V and 0.7V offsets ··· 566 560 if (val != 0 && val != 700000) 567 561 return -EINVAL; 568 562 569 - val = val ? 1 : 0; 570 - 571 563 switch (chan->channel) { 572 564 case AXP20X_GPIO0_V: 573 - reg = AXP20X_GPIO10_IN_RANGE_GPIO0; 574 - regval = AXP20X_GPIO10_IN_RANGE_GPIO0_VAL(val); 565 + regmask = AXP20X_GPIO10_IN_RANGE_GPIO0; 566 + regval = FIELD_PREP(AXP20X_GPIO10_IN_RANGE_GPIO0, !!val); 575 567 break; 576 568 577 569 case AXP20X_GPIO1_V: 578 - reg = AXP20X_GPIO10_IN_RANGE_GPIO1; 579 - regval = AXP20X_GPIO10_IN_RANGE_GPIO1_VAL(val); 570 + regmask = AXP20X_GPIO10_IN_RANGE_GPIO1; 571 + regval = FIELD_PREP(AXP20X_GPIO10_IN_RANGE_GPIO1, !!val); 580 572 break; 581 573 582 574 default: 583 575 return -EINVAL; 584 576 } 585 577 586 - return regmap_update_bits(info->regmap, AXP20X_GPIO10_IN_RANGE, reg, 587 - regval); 578 + return regmap_update_bits(info->regmap, AXP20X_GPIO10_IN_RANGE, regmask, regval); 588 579 } 589 580 590 581 static const struct iio_info axp20x_adc_iio_info = { ··· 623 620 int num_channels; 624 621 struct iio_chan_spec const *channels; 625 622 unsigned long adc_en1_mask; 623 + unsigned long adc_en2_mask; 626 624 int (*adc_rate)(struct axp20x_adc_iio *info, 627 625 int rate); 628 - bool adc_en2; 629 626 struct iio_map *maps; 630 627 }; 631 628 ··· 634 631 .num_channels = ARRAY_SIZE(axp20x_adc_channels), 635 632 .channels = axp20x_adc_channels, 636 633 .adc_en1_mask = AXP20X_ADC_EN1_MASK, 634 + .adc_en2_mask = AXP20X_ADC_EN2_MASK, 637 635 .adc_rate = axp20x_adc_rate, 638 - .adc_en2 = true, 639 636 .maps = axp20x_maps, 640 637 }; 641 638 ··· 645 642 .channels = axp22x_adc_channels, 646 643 .adc_en1_mask = AXP22X_ADC_EN1_MASK, 647 644 .adc_rate = axp22x_adc_rate, 648 - .adc_en2 = false, 649 645 .maps = axp22x_maps, 650 646 }; 651 647 ··· 654 652 .channels = axp813_adc_channels, 655 653 .adc_en1_mask = AXP22X_ADC_EN1_MASK, 656 654 .adc_rate = axp813_adc_rate, 657 - .adc_en2 = false, 658 655 .maps = axp22x_maps, 659 656 }; 660 657 ··· 711 710 /* Enable the ADCs on IP */ 712 711 regmap_write(info->regmap, AXP20X_ADC_EN1, info->data->adc_en1_mask); 713 712 714 - if (info->data->adc_en2) 715 - /* Enable GPIO0/1 and internal temperature ADCs */ 713 + if (info->data->adc_en2_mask) 716 714 regmap_update_bits(info->regmap, AXP20X_ADC_EN2, 717 - AXP20X_ADC_EN2_MASK, AXP20X_ADC_EN2_MASK); 715 + info->data->adc_en2_mask, 716 + info->data->adc_en2_mask); 718 717 719 718 /* Configure ADCs rate */ 720 719 info->data->adc_rate(info, 100); ··· 739 738 fail_map: 740 739 regmap_write(info->regmap, AXP20X_ADC_EN1, 0); 741 740 742 - if (info->data->adc_en2) 741 + if (info->data->adc_en2_mask) 743 742 regmap_write(info->regmap, AXP20X_ADC_EN2, 0); 744 743 745 744 return ret; ··· 755 754 756 755 regmap_write(info->regmap, AXP20X_ADC_EN1, 0); 757 756 758 - if (info->data->adc_en2) 757 + if (info->data->adc_en2_mask) 759 758 regmap_write(info->regmap, AXP20X_ADC_EN2, 0); 760 759 761 760 return 0;
+1 -1
drivers/iio/adc/max11410.c
··· 682 682 struct max11410_state *st = iio_priv(indio_dev); 683 683 684 684 if (iio_buffer_enabled(indio_dev)) 685 - iio_trigger_poll_chained(st->trig); 685 + iio_trigger_poll_nested(st->trig); 686 686 else 687 687 complete(&st->completion); 688 688
+14 -7
drivers/iio/adc/meson_saradc.c
··· 957 957 return ret; 958 958 } 959 959 960 - static int meson_sar_adc_hw_disable(struct iio_dev *indio_dev) 960 + static void meson_sar_adc_hw_disable(struct iio_dev *indio_dev) 961 961 { 962 962 struct meson_sar_adc_priv *priv = iio_priv(indio_dev); 963 963 int ret; 964 964 965 + /* 966 + * If taking the lock fails we have to assume that BL30 is broken. The 967 + * best we can do then is to release the resources anyhow. 968 + */ 965 969 ret = meson_sar_adc_lock(indio_dev); 966 970 if (ret) 967 - return ret; 971 + dev_err(indio_dev->dev.parent, "Failed to lock ADC (%pE)\n", ERR_PTR(ret)); 968 972 969 973 clk_disable_unprepare(priv->adc_clk); 970 974 ··· 981 977 982 978 regulator_disable(priv->vref); 983 979 984 - meson_sar_adc_unlock(indio_dev); 985 - 986 - return 0; 980 + if (!ret) 981 + meson_sar_adc_unlock(indio_dev); 987 982 } 988 983 989 984 static irqreturn_t meson_sar_adc_irq(int irq, void *data) ··· 1286 1283 1287 1284 iio_device_unregister(indio_dev); 1288 1285 1289 - return meson_sar_adc_hw_disable(indio_dev); 1286 + meson_sar_adc_hw_disable(indio_dev); 1287 + 1288 + return 0; 1290 1289 } 1291 1290 1292 1291 static int meson_sar_adc_suspend(struct device *dev) 1293 1292 { 1294 1293 struct iio_dev *indio_dev = dev_get_drvdata(dev); 1295 1294 1296 - return meson_sar_adc_hw_disable(indio_dev); 1295 + meson_sar_adc_hw_disable(indio_dev); 1296 + 1297 + return 0; 1297 1298 } 1298 1299 1299 1300 static int meson_sar_adc_resume(struct device *dev)
+1 -1
drivers/iio/adc/qcom-pm8xxx-xoadc.c
··· 758 758 /* Find the right channel setting */ 759 759 chid = 0; 760 760 hwchan = &hw_channels[0]; 761 - while (hwchan && hwchan->datasheet_name) { 761 + while (hwchan->datasheet_name) { 762 762 if (hwchan->pre_scale_mux == pre_scale_mux && 763 763 hwchan->amux_channel == amux_channel) 764 764 break;
+1 -1
drivers/iio/adc/rcar-gyroadc.c
··· 283 283 284 284 MODULE_DEVICE_TABLE(of, rcar_gyroadc_match); 285 285 286 - static const struct of_device_id rcar_gyroadc_child_match[] = { 286 + static const struct of_device_id rcar_gyroadc_child_match[] __maybe_unused = { 287 287 /* Mode 1 ADCs */ 288 288 { 289 289 .compatible = "fujitsu,mb88101a",
+3 -3
drivers/iio/adc/stm32-adc.c
··· 2588 2588 .irq_clear = stm32f4_adc_irq_clear, 2589 2589 }; 2590 2590 2591 - const unsigned int stm32_adc_min_ts_h7[] = { 0, 0, 0, 4300, 9000 }; 2591 + static const unsigned int stm32_adc_min_ts_h7[] = { 0, 0, 0, 4300, 9000 }; 2592 2592 static_assert(ARRAY_SIZE(stm32_adc_min_ts_h7) == STM32_ADC_INT_CH_NB); 2593 2593 2594 2594 static const struct stm32_adc_cfg stm32h7_adc_cfg = { ··· 2607 2607 .ts_int_ch = stm32_adc_min_ts_h7, 2608 2608 }; 2609 2609 2610 - const unsigned int stm32_adc_min_ts_mp1[] = { 100, 100, 100, 4300, 9800 }; 2610 + static const unsigned int stm32_adc_min_ts_mp1[] = { 100, 100, 100, 4300, 9800 }; 2611 2611 static_assert(ARRAY_SIZE(stm32_adc_min_ts_mp1) == STM32_ADC_INT_CH_NB); 2612 2612 2613 2613 static const struct stm32_adc_cfg stm32mp1_adc_cfg = { ··· 2627 2627 .ts_int_ch = stm32_adc_min_ts_mp1, 2628 2628 }; 2629 2629 2630 - const unsigned int stm32_adc_min_ts_mp13[] = { 100, 0, 0, 4300, 9800 }; 2630 + static const unsigned int stm32_adc_min_ts_mp13[] = { 100, 0, 0, 4300, 9800 }; 2631 2631 static_assert(ARRAY_SIZE(stm32_adc_min_ts_mp13) == STM32_ADC_INT_CH_NB); 2632 2632 2633 2633 static const struct stm32_adc_cfg stm32mp13_adc_cfg = {
+445
drivers/iio/adc/ti-ads1100.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + /* 3 + * ADS1100 - Texas Instruments Analog-to-Digital Converter 4 + * 5 + * Copyright (c) 2023, Topic Embedded Products 6 + * 7 + * Datasheet: https://www.ti.com/lit/gpn/ads1100 8 + * IIO driver for ADS1100 and ADS1000 ADC 16-bit I2C 9 + */ 10 + 11 + #include <linux/bitfield.h> 12 + #include <linux/bits.h> 13 + #include <linux/delay.h> 14 + #include <linux/module.h> 15 + #include <linux/init.h> 16 + #include <linux/i2c.h> 17 + #include <linux/mutex.h> 18 + #include <linux/property.h> 19 + #include <linux/pm_runtime.h> 20 + #include <linux/regulator/consumer.h> 21 + #include <linux/units.h> 22 + 23 + #include <linux/iio/iio.h> 24 + #include <linux/iio/types.h> 25 + 26 + /* The ADS1100 has a single byte config register */ 27 + 28 + /* Conversion in progress bit */ 29 + #define ADS1100_CFG_ST_BSY BIT(7) 30 + /* Single conversion bit */ 31 + #define ADS1100_CFG_SC BIT(4) 32 + /* Data rate */ 33 + #define ADS1100_DR_MASK GENMASK(3, 2) 34 + /* Gain */ 35 + #define ADS1100_PGA_MASK GENMASK(1, 0) 36 + 37 + #define ADS1100_CONTINUOUS 0 38 + #define ADS1100_SINGLESHOT ADS1100_CFG_SC 39 + 40 + #define ADS1100_SLEEP_DELAY_MS 2000 41 + 42 + static const int ads1100_data_rate[] = { 128, 32, 16, 8 }; 43 + static const int ads1100_data_rate_bits[] = { 12, 14, 15, 16 }; 44 + 45 + struct ads1100_data { 46 + struct i2c_client *client; 47 + struct regulator *reg_vdd; 48 + struct mutex lock; 49 + int scale_avail[2 * 4]; /* 4 gain settings */ 50 + u8 config; 51 + bool supports_data_rate; /* Only the ADS1100 can select the rate */ 52 + }; 53 + 54 + static const struct iio_chan_spec ads1100_channel = { 55 + .type = IIO_VOLTAGE, 56 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 57 + .info_mask_shared_by_all = 58 + BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ), 59 + .info_mask_shared_by_all_available = 60 + BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ), 61 + .scan_type = { 62 + .sign = 's', 63 + .realbits = 16, 64 + .storagebits = 16, 65 + .endianness = IIO_CPU, 66 + }, 67 + .datasheet_name = "AIN", 68 + }; 69 + 70 + static int ads1100_set_config_bits(struct ads1100_data *data, u8 mask, u8 value) 71 + { 72 + int ret; 73 + u8 config = (data->config & ~mask) | (value & mask); 74 + 75 + if (data->config == config) 76 + return 0; /* Already done */ 77 + 78 + ret = i2c_master_send(data->client, &config, 1); 79 + if (ret < 0) 80 + return ret; 81 + 82 + data->config = config; 83 + 84 + return 0; 85 + }; 86 + 87 + static int ads1100_data_bits(struct ads1100_data *data) 88 + { 89 + return ads1100_data_rate_bits[FIELD_GET(ADS1100_DR_MASK, data->config)]; 90 + } 91 + 92 + static int ads1100_get_adc_result(struct ads1100_data *data, int chan, int *val) 93 + { 94 + int ret; 95 + __be16 buffer; 96 + s16 value; 97 + 98 + if (chan != 0) 99 + return -EINVAL; 100 + 101 + ret = pm_runtime_resume_and_get(&data->client->dev); 102 + if (ret < 0) 103 + return ret; 104 + 105 + ret = i2c_master_recv(data->client, (char *)&buffer, sizeof(buffer)); 106 + 107 + pm_runtime_mark_last_busy(&data->client->dev); 108 + pm_runtime_put_autosuspend(&data->client->dev); 109 + 110 + if (ret < 0) { 111 + dev_err(&data->client->dev, "I2C read fail: %d\n", ret); 112 + return ret; 113 + } 114 + 115 + /* Value is always 16-bit 2's complement */ 116 + value = be16_to_cpu(buffer); 117 + 118 + /* Shift result to compensate for bit resolution vs. sample rate */ 119 + value <<= 16 - ads1100_data_bits(data); 120 + 121 + *val = sign_extend32(value, 15); 122 + 123 + return 0; 124 + } 125 + 126 + static int ads1100_set_scale(struct ads1100_data *data, int val, int val2) 127 + { 128 + int microvolts; 129 + int gain; 130 + 131 + /* With Vdd between 2.7 and 5V, the scale is always below 1 */ 132 + if (val) 133 + return -EINVAL; 134 + 135 + if (!val2) 136 + return -EINVAL; 137 + 138 + microvolts = regulator_get_voltage(data->reg_vdd); 139 + /* 140 + * val2 is in 'micro' units, n = val2 / 1000000 141 + * result must be millivolts, d = microvolts / 1000 142 + * the full-scale value is d/n, corresponds to 2^15, 143 + * hence the gain = (d / n) >> 15, factoring out the 1000 and moving the 144 + * bitshift so everything fits in 32-bits yields this formula. 145 + */ 146 + gain = DIV_ROUND_CLOSEST(microvolts, BIT(15)) * MILLI / val2; 147 + if (gain < BIT(0) || gain > BIT(3)) 148 + return -EINVAL; 149 + 150 + ads1100_set_config_bits(data, ADS1100_PGA_MASK, ffs(gain) - 1); 151 + 152 + return 0; 153 + } 154 + 155 + static int ads1100_set_data_rate(struct ads1100_data *data, int chan, int rate) 156 + { 157 + unsigned int i; 158 + unsigned int size; 159 + 160 + size = data->supports_data_rate ? ARRAY_SIZE(ads1100_data_rate) : 1; 161 + for (i = 0; i < size; i++) { 162 + if (ads1100_data_rate[i] == rate) 163 + return ads1100_set_config_bits(data, ADS1100_DR_MASK, 164 + FIELD_PREP(ADS1100_DR_MASK, i)); 165 + } 166 + 167 + return -EINVAL; 168 + } 169 + 170 + static int ads1100_get_vdd_millivolts(struct ads1100_data *data) 171 + { 172 + return regulator_get_voltage(data->reg_vdd) / (MICRO / MILLI); 173 + } 174 + 175 + static void ads1100_calc_scale_avail(struct ads1100_data *data) 176 + { 177 + int millivolts = ads1100_get_vdd_millivolts(data); 178 + unsigned int i; 179 + 180 + for (i = 0; i < ARRAY_SIZE(data->scale_avail) / 2; i++) { 181 + data->scale_avail[i * 2 + 0] = millivolts; 182 + data->scale_avail[i * 2 + 1] = 15 + i; 183 + } 184 + } 185 + 186 + static int ads1100_read_avail(struct iio_dev *indio_dev, 187 + struct iio_chan_spec const *chan, 188 + const int **vals, int *type, int *length, 189 + long mask) 190 + { 191 + struct ads1100_data *data = iio_priv(indio_dev); 192 + 193 + if (chan->type != IIO_VOLTAGE) 194 + return -EINVAL; 195 + 196 + switch (mask) { 197 + case IIO_CHAN_INFO_SAMP_FREQ: 198 + *type = IIO_VAL_INT; 199 + *vals = ads1100_data_rate; 200 + if (data->supports_data_rate) 201 + *length = ARRAY_SIZE(ads1100_data_rate); 202 + else 203 + *length = 1; 204 + return IIO_AVAIL_LIST; 205 + case IIO_CHAN_INFO_SCALE: 206 + *type = IIO_VAL_FRACTIONAL_LOG2; 207 + *vals = data->scale_avail; 208 + *length = ARRAY_SIZE(data->scale_avail); 209 + return IIO_AVAIL_LIST; 210 + default: 211 + return -EINVAL; 212 + } 213 + } 214 + 215 + static int ads1100_read_raw(struct iio_dev *indio_dev, 216 + struct iio_chan_spec const *chan, int *val, 217 + int *val2, long mask) 218 + { 219 + int ret; 220 + struct ads1100_data *data = iio_priv(indio_dev); 221 + 222 + mutex_lock(&data->lock); 223 + switch (mask) { 224 + case IIO_CHAN_INFO_RAW: 225 + ret = iio_device_claim_direct_mode(indio_dev); 226 + if (ret) 227 + break; 228 + 229 + ret = ads1100_get_adc_result(data, chan->address, val); 230 + if (ret >= 0) 231 + ret = IIO_VAL_INT; 232 + iio_device_release_direct_mode(indio_dev); 233 + break; 234 + case IIO_CHAN_INFO_SCALE: 235 + /* full-scale is the supply voltage in millivolts */ 236 + *val = ads1100_get_vdd_millivolts(data); 237 + *val2 = 15 + FIELD_GET(ADS1100_PGA_MASK, data->config); 238 + ret = IIO_VAL_FRACTIONAL_LOG2; 239 + break; 240 + case IIO_CHAN_INFO_SAMP_FREQ: 241 + *val = ads1100_data_rate[FIELD_GET(ADS1100_DR_MASK, 242 + data->config)]; 243 + ret = IIO_VAL_INT; 244 + break; 245 + default: 246 + ret = -EINVAL; 247 + break; 248 + } 249 + mutex_unlock(&data->lock); 250 + 251 + return ret; 252 + } 253 + 254 + static int ads1100_write_raw(struct iio_dev *indio_dev, 255 + struct iio_chan_spec const *chan, int val, 256 + int val2, long mask) 257 + { 258 + struct ads1100_data *data = iio_priv(indio_dev); 259 + int ret; 260 + 261 + mutex_lock(&data->lock); 262 + switch (mask) { 263 + case IIO_CHAN_INFO_SCALE: 264 + ret = ads1100_set_scale(data, val, val2); 265 + break; 266 + case IIO_CHAN_INFO_SAMP_FREQ: 267 + ret = ads1100_set_data_rate(data, chan->address, val); 268 + break; 269 + default: 270 + ret = -EINVAL; 271 + break; 272 + } 273 + mutex_unlock(&data->lock); 274 + 275 + return ret; 276 + } 277 + 278 + static const struct iio_info ads1100_info = { 279 + .read_avail = ads1100_read_avail, 280 + .read_raw = ads1100_read_raw, 281 + .write_raw = ads1100_write_raw, 282 + }; 283 + 284 + static int ads1100_setup(struct ads1100_data *data) 285 + { 286 + int ret; 287 + u8 buffer[3]; 288 + 289 + /* Setup continuous sampling mode at 8sps */ 290 + buffer[0] = ADS1100_DR_MASK | ADS1100_CONTINUOUS; 291 + ret = i2c_master_send(data->client, buffer, 1); 292 + if (ret < 0) 293 + return ret; 294 + 295 + ret = i2c_master_recv(data->client, buffer, sizeof(buffer)); 296 + if (ret < 0) 297 + return ret; 298 + 299 + /* Config register returned in third byte, strip away the busy status */ 300 + data->config = buffer[2] & ~ADS1100_CFG_ST_BSY; 301 + 302 + /* Detect the sample rate capability by checking the DR bits */ 303 + data->supports_data_rate = FIELD_GET(ADS1100_DR_MASK, buffer[2]) != 0; 304 + 305 + return 0; 306 + } 307 + 308 + static void ads1100_reg_disable(void *reg) 309 + { 310 + regulator_disable(reg); 311 + } 312 + 313 + static void ads1100_disable_continuous(void *data) 314 + { 315 + ads1100_set_config_bits(data, ADS1100_CFG_SC, ADS1100_SINGLESHOT); 316 + } 317 + 318 + static int ads1100_probe(struct i2c_client *client) 319 + { 320 + struct iio_dev *indio_dev; 321 + struct ads1100_data *data; 322 + struct device *dev = &client->dev; 323 + int ret; 324 + 325 + indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); 326 + if (!indio_dev) 327 + return -ENOMEM; 328 + 329 + data = iio_priv(indio_dev); 330 + dev_set_drvdata(dev, data); 331 + data->client = client; 332 + mutex_init(&data->lock); 333 + 334 + indio_dev->name = "ads1100"; 335 + indio_dev->modes = INDIO_DIRECT_MODE; 336 + indio_dev->channels = &ads1100_channel; 337 + indio_dev->num_channels = 1; 338 + indio_dev->info = &ads1100_info; 339 + 340 + data->reg_vdd = devm_regulator_get(dev, "vdd"); 341 + if (IS_ERR(data->reg_vdd)) 342 + return dev_err_probe(dev, PTR_ERR(data->reg_vdd), 343 + "Failed to get vdd regulator\n"); 344 + 345 + ret = regulator_enable(data->reg_vdd); 346 + if (ret < 0) 347 + return dev_err_probe(dev, ret, 348 + "Failed to enable vdd regulator\n"); 349 + 350 + ret = devm_add_action_or_reset(dev, ads1100_reg_disable, data->reg_vdd); 351 + if (ret) 352 + return ret; 353 + 354 + ret = ads1100_setup(data); 355 + if (ret) 356 + return dev_err_probe(dev, ret, 357 + "Failed to communicate with device\n"); 358 + 359 + ret = devm_add_action_or_reset(dev, ads1100_disable_continuous, data); 360 + if (ret) 361 + return ret; 362 + 363 + ads1100_calc_scale_avail(data); 364 + 365 + pm_runtime_set_autosuspend_delay(dev, ADS1100_SLEEP_DELAY_MS); 366 + pm_runtime_use_autosuspend(dev); 367 + pm_runtime_set_active(dev); 368 + ret = devm_pm_runtime_enable(dev); 369 + if (ret) 370 + return dev_err_probe(dev, ret, "Failed to enable pm_runtime\n"); 371 + 372 + ret = devm_iio_device_register(dev, indio_dev); 373 + if (ret) 374 + return dev_err_probe(dev, ret, 375 + "Failed to register IIO device\n"); 376 + 377 + return 0; 378 + } 379 + 380 + static int ads1100_runtime_suspend(struct device *dev) 381 + { 382 + struct ads1100_data *data = dev_get_drvdata(dev); 383 + 384 + ads1100_set_config_bits(data, ADS1100_CFG_SC, ADS1100_SINGLESHOT); 385 + regulator_disable(data->reg_vdd); 386 + 387 + return 0; 388 + } 389 + 390 + static int ads1100_runtime_resume(struct device *dev) 391 + { 392 + struct ads1100_data *data = dev_get_drvdata(dev); 393 + int ret; 394 + 395 + ret = regulator_enable(data->reg_vdd); 396 + if (ret) { 397 + dev_err(&data->client->dev, "Failed to enable Vdd\n"); 398 + return ret; 399 + } 400 + 401 + /* 402 + * We'll always change the mode bit in the config register, so there is 403 + * no need here to "force" a write to the config register. If the device 404 + * has been power-cycled, we'll re-write its config register now. 405 + */ 406 + return ads1100_set_config_bits(data, ADS1100_CFG_SC, 407 + ADS1100_CONTINUOUS); 408 + } 409 + 410 + static DEFINE_RUNTIME_DEV_PM_OPS(ads1100_pm_ops, 411 + ads1100_runtime_suspend, 412 + ads1100_runtime_resume, 413 + NULL); 414 + 415 + static const struct i2c_device_id ads1100_id[] = { 416 + { "ads1100" }, 417 + { "ads1000" }, 418 + { } 419 + }; 420 + 421 + MODULE_DEVICE_TABLE(i2c, ads1100_id); 422 + 423 + static const struct of_device_id ads1100_of_match[] = { 424 + {.compatible = "ti,ads1100" }, 425 + {.compatible = "ti,ads1000" }, 426 + { } 427 + }; 428 + 429 + MODULE_DEVICE_TABLE(of, ads1100_of_match); 430 + 431 + static struct i2c_driver ads1100_driver = { 432 + .driver = { 433 + .name = "ads1100", 434 + .of_match_table = ads1100_of_match, 435 + .pm = pm_ptr(&ads1100_pm_ops), 436 + }, 437 + .probe_new = ads1100_probe, 438 + .id_table = ads1100_id, 439 + }; 440 + 441 + module_i2c_driver(ads1100_driver); 442 + 443 + MODULE_AUTHOR("Mike Looijmans <mike.looijmans@topic.nl>"); 444 + MODULE_DESCRIPTION("Texas Instruments ADS1100 ADC driver"); 445 + MODULE_LICENSE("GPL");
+2
drivers/iio/addac/Kconfig
··· 35 35 tristate "Apex Embedded Systems STX104 driver" 36 36 depends on PC104 && X86 37 37 select ISA_BUS_API 38 + select REGMAP_MMIO 38 39 select GPIOLIB 40 + select GPIO_REGMAP 39 41 help 40 42 Say yes here to build support for the Apex Embedded Systems STX104 41 43 integrated analog PC/104 card.
+42 -2
drivers/iio/addac/ad74413r.c
··· 39 39 40 40 struct ad74413r_channel_config { 41 41 u32 func; 42 + u32 drive_strength; 42 43 bool gpo_comparator; 43 44 bool initialized; 44 45 }; ··· 100 99 #define AD74413R_REG_ADC_CONFIG_X(x) (0x05 + (x)) 101 100 #define AD74413R_ADC_CONFIG_RANGE_MASK GENMASK(7, 5) 102 101 #define AD74413R_ADC_CONFIG_REJECTION_MASK GENMASK(4, 3) 102 + #define AD74413R_ADC_CONFIG_CH_200K_TO_GND BIT(2) 103 103 #define AD74413R_ADC_RANGE_10V 0b000 104 104 #define AD74413R_ADC_RANGE_2P5V_EXT_POW 0b001 105 105 #define AD74413R_ADC_RANGE_2P5V_INT_POW 0b010 ··· 113 111 #define AD74413R_REG_DIN_CONFIG_X(x) (0x09 + (x)) 114 112 #define AD74413R_DIN_DEBOUNCE_MASK GENMASK(4, 0) 115 113 #define AD74413R_DIN_DEBOUNCE_LEN BIT(5) 114 + #define AD74413R_DIN_SINK_MASK GENMASK(9, 6) 116 115 117 116 #define AD74413R_REG_DAC_CODE_X(x) (0x16 + (x)) 118 117 #define AD74413R_DAC_CODE_MAX GENMASK(12, 0) ··· 263 260 AD74413R_DIN_DEBOUNCE_MASK, 264 261 val); 265 262 } 263 + 264 + static int ad74413r_set_comp_drive_strength(struct ad74413r_state *st, 265 + unsigned int offset, 266 + unsigned int strength) 267 + { 268 + strength = min(strength, 1800U); 269 + 270 + return regmap_update_bits(st->regmap, AD74413R_REG_DIN_CONFIG_X(offset), 271 + AD74413R_DIN_SINK_MASK, 272 + FIELD_PREP(AD74413R_DIN_SINK_MASK, strength / 120)); 273 + } 274 + 266 275 267 276 static void ad74413r_gpio_set(struct gpio_chip *chip, 268 277 unsigned int offset, int val) ··· 439 424 static int ad74413r_set_channel_function(struct ad74413r_state *st, 440 425 unsigned int channel, u8 func) 441 426 { 442 - return regmap_update_bits(st->regmap, 427 + int ret; 428 + 429 + ret = regmap_update_bits(st->regmap, 443 430 AD74413R_REG_CH_FUNC_SETUP_X(channel), 444 431 AD74413R_CH_FUNC_SETUP_MASK, func); 432 + if (ret) 433 + return ret; 434 + 435 + if (func == CH_FUNC_CURRENT_INPUT_LOOP_POWER) 436 + ret = regmap_set_bits(st->regmap, 437 + AD74413R_REG_ADC_CONFIG_X(channel), 438 + AD74413R_ADC_CONFIG_CH_200K_TO_GND); 439 + 440 + return ret; 445 441 } 446 442 447 443 static int ad74413r_set_adc_conv_seq(struct ad74413r_state *st, ··· 1138 1112 AD74413R_ADC_CURRENT_CHANNEL, 1139 1113 }; 1140 1114 1115 + static struct iio_chan_spec ad74413r_current_input_loop_channels[] = { 1116 + AD74413R_DAC_CHANNEL(IIO_CURRENT, BIT(IIO_CHAN_INFO_SCALE)), 1117 + AD74413R_ADC_CURRENT_CHANNEL, 1118 + }; 1119 + 1141 1120 static struct iio_chan_spec ad74413r_resistance_input_channels[] = { 1142 1121 AD74413R_ADC_CHANNEL(IIO_RESISTANCE, BIT(IIO_CHAN_INFO_PROCESSED)), 1143 1122 }; ··· 1166 1135 [CH_FUNC_CURRENT_OUTPUT] = AD74413R_CHANNELS(current_output), 1167 1136 [CH_FUNC_VOLTAGE_INPUT] = AD74413R_CHANNELS(voltage_input), 1168 1137 [CH_FUNC_CURRENT_INPUT_EXT_POWER] = AD74413R_CHANNELS(current_input), 1169 - [CH_FUNC_CURRENT_INPUT_LOOP_POWER] = AD74413R_CHANNELS(current_input), 1138 + [CH_FUNC_CURRENT_INPUT_LOOP_POWER] = AD74413R_CHANNELS(current_input_loop), 1170 1139 [CH_FUNC_RESISTANCE_INPUT] = AD74413R_CHANNELS(resistance_input), 1171 1140 [CH_FUNC_DIGITAL_INPUT_LOGIC] = AD74413R_CHANNELS(digital_input), 1172 1141 [CH_FUNC_DIGITAL_INPUT_LOOP_POWER] = AD74413R_CHANNELS(digital_input), ··· 1220 1189 1221 1190 config->gpo_comparator = fwnode_property_read_bool(channel_node, 1222 1191 "adi,gpo-comparator"); 1192 + 1193 + fwnode_property_read_u32(channel_node, "drive-strength-microamp", 1194 + &config->drive_strength); 1223 1195 1224 1196 if (!config->gpo_comparator) 1225 1197 st->num_gpo_gpios++; ··· 1303 1269 unsigned int gpo_gpio_i = 0; 1304 1270 unsigned int i; 1305 1271 u8 gpo_config; 1272 + u32 strength; 1306 1273 int ret; 1307 1274 1308 1275 for (i = 0; i < AD74413R_CHANNEL_MAX; i++) { ··· 1319 1284 if (config->func == CH_FUNC_DIGITAL_INPUT_LOGIC || 1320 1285 config->func == CH_FUNC_DIGITAL_INPUT_LOOP_POWER) 1321 1286 st->comp_gpio_offsets[comp_gpio_i++] = i; 1287 + 1288 + strength = config->drive_strength; 1289 + ret = ad74413r_set_comp_drive_strength(st, i, strength); 1290 + if (ret) 1291 + return ret; 1322 1292 1323 1293 ret = ad74413r_set_gpo_config(st, i, gpo_config); 1324 1294 if (ret)
+264 -200
drivers/iio/addac/stx104.c
··· 3 3 * IIO driver for the Apex Embedded Systems STX104 4 4 * Copyright (C) 2016 William Breathitt Gray 5 5 */ 6 - #include <linux/bitops.h> 6 + #include <linux/bitfield.h> 7 + #include <linux/bits.h> 7 8 #include <linux/device.h> 8 - #include <linux/errno.h> 9 - #include <linux/gpio/driver.h> 9 + #include <linux/err.h> 10 + #include <linux/gpio/regmap.h> 10 11 #include <linux/iio/iio.h> 11 12 #include <linux/iio/types.h> 12 - #include <linux/io.h> 13 - #include <linux/ioport.h> 14 13 #include <linux/isa.h> 15 14 #include <linux/kernel.h> 15 + #include <linux/limits.h> 16 16 #include <linux/module.h> 17 17 #include <linux/moduleparam.h> 18 - #include <linux/spinlock.h> 18 + #include <linux/mutex.h> 19 + #include <linux/regmap.h> 19 20 #include <linux/types.h> 20 21 21 22 #define STX104_OUT_CHAN(chan) { \ ··· 46 45 module_param_hw_array(base, uint, ioport, &num_stx104, 0); 47 46 MODULE_PARM_DESC(base, "Apex Embedded Systems STX104 base addresses"); 48 47 49 - /** 50 - * struct stx104_reg - device register structure 51 - * @ssr_ad: Software Strobe Register and ADC Data 52 - * @achan: ADC Channel 53 - * @dio: Digital I/O 54 - * @dac: DAC Channels 55 - * @cir_asr: Clear Interrupts and ADC Status 56 - * @acr: ADC Control 57 - * @pccr_fsh: Pacer Clock Control and FIFO Status MSB 58 - * @acfg: ADC Configuration 59 - */ 60 - struct stx104_reg { 61 - u16 ssr_ad; 62 - u8 achan; 63 - u8 dio; 64 - u16 dac[2]; 65 - u8 cir_asr; 66 - u8 acr; 67 - u8 pccr_fsh; 68 - u8 acfg; 69 - }; 48 + #define STX104_AIO_BASE 0x0 49 + #define STX104_SOFTWARE_STROBE STX104_AIO_BASE 50 + #define STX104_ADC_DATA STX104_AIO_BASE 51 + #define STX104_ADC_CHANNEL (STX104_AIO_BASE + 0x2) 52 + #define STX104_DIO_REG (STX104_AIO_BASE + 0x3) 53 + #define STX104_DAC_BASE (STX104_AIO_BASE + 0x4) 54 + #define STX104_ADC_STATUS (STX104_AIO_BASE + 0x8) 55 + #define STX104_ADC_CONTROL (STX104_AIO_BASE + 0x9) 56 + #define STX104_ADC_CONFIGURATION (STX104_AIO_BASE + 0x11) 57 + 58 + #define STX104_AIO_DATA_STRIDE 2 59 + #define STX104_DAC_OFFSET(_channel) (STX104_DAC_BASE + STX104_AIO_DATA_STRIDE * (_channel)) 60 + 61 + /* ADC Channel */ 62 + #define STX104_FC GENMASK(3, 0) 63 + #define STX104_LC GENMASK(7, 4) 64 + #define STX104_SINGLE_CHANNEL(_channel) \ 65 + (u8_encode_bits(_channel, STX104_FC) | u8_encode_bits(_channel, STX104_LC)) 66 + 67 + /* ADC Status */ 68 + #define STX104_SD BIT(5) 69 + #define STX104_CNV BIT(7) 70 + #define STX104_DIFFERENTIAL 1 71 + 72 + /* ADC Control */ 73 + #define STX104_ALSS GENMASK(1, 0) 74 + #define STX104_SOFTWARE_TRIGGER u8_encode_bits(0x0, STX104_ALSS) 75 + 76 + /* ADC Configuration */ 77 + #define STX104_GAIN GENMASK(1, 0) 78 + #define STX104_ADBU BIT(2) 79 + #define STX104_BIPOLAR 0 80 + #define STX104_GAIN_X1 0 81 + #define STX104_GAIN_X2 1 82 + #define STX104_GAIN_X4 2 83 + #define STX104_GAIN_X8 3 70 84 71 85 /** 72 86 * struct stx104_iio - IIO device private data structure 73 - * @chan_out_states: channels' output states 74 - * @reg: I/O address offset for the device registers 87 + * @lock: synchronization lock to prevent I/O race conditions 88 + * @aio_data_map: Regmap for analog I/O data 89 + * @aio_ctl_map: Regmap for analog I/O control 75 90 */ 76 91 struct stx104_iio { 77 - unsigned int chan_out_states[STX104_NUM_OUT_CHAN]; 78 - struct stx104_reg __iomem *reg; 92 + struct mutex lock; 93 + struct regmap *aio_data_map; 94 + struct regmap *aio_ctl_map; 79 95 }; 80 96 81 - /** 82 - * struct stx104_gpio - GPIO device private data structure 83 - * @chip: instance of the gpio_chip 84 - * @lock: synchronization lock to prevent I/O race conditions 85 - * @base: base port address of the GPIO device 86 - * @out_state: output bits state 87 - */ 88 - struct stx104_gpio { 89 - struct gpio_chip chip; 90 - spinlock_t lock; 91 - u8 __iomem *base; 92 - unsigned int out_state; 97 + static const struct regmap_range aio_ctl_wr_ranges[] = { 98 + regmap_reg_range(0x0, 0x0), regmap_reg_range(0x2, 0x2), regmap_reg_range(0x9, 0x9), 99 + regmap_reg_range(0x11, 0x11), 100 + }; 101 + static const struct regmap_range aio_ctl_rd_ranges[] = { 102 + regmap_reg_range(0x2, 0x2), regmap_reg_range(0x8, 0x9), regmap_reg_range(0x11, 0x11), 103 + }; 104 + static const struct regmap_range aio_ctl_volatile_ranges[] = { 105 + regmap_reg_range(0x8, 0x8), 106 + }; 107 + static const struct regmap_access_table aio_ctl_wr_table = { 108 + .yes_ranges = aio_ctl_wr_ranges, 109 + .n_yes_ranges = ARRAY_SIZE(aio_ctl_wr_ranges), 110 + }; 111 + static const struct regmap_access_table aio_ctl_rd_table = { 112 + .yes_ranges = aio_ctl_rd_ranges, 113 + .n_yes_ranges = ARRAY_SIZE(aio_ctl_rd_ranges), 114 + }; 115 + static const struct regmap_access_table aio_ctl_volatile_table = { 116 + .yes_ranges = aio_ctl_volatile_ranges, 117 + .n_yes_ranges = ARRAY_SIZE(aio_ctl_volatile_ranges), 118 + }; 119 + 120 + static const struct regmap_config aio_ctl_regmap_config = { 121 + .name = "aio_ctl", 122 + .reg_bits = 8, 123 + .reg_stride = 1, 124 + .reg_base = STX104_AIO_BASE, 125 + .val_bits = 8, 126 + .io_port = true, 127 + .wr_table = &aio_ctl_wr_table, 128 + .rd_table = &aio_ctl_rd_table, 129 + .volatile_table = &aio_ctl_volatile_table, 130 + .cache_type = REGCACHE_FLAT, 131 + }; 132 + 133 + static const struct regmap_range aio_data_wr_ranges[] = { 134 + regmap_reg_range(0x4, 0x6), 135 + }; 136 + static const struct regmap_range aio_data_rd_ranges[] = { 137 + regmap_reg_range(0x0, 0x0), 138 + }; 139 + static const struct regmap_access_table aio_data_wr_table = { 140 + .yes_ranges = aio_data_wr_ranges, 141 + .n_yes_ranges = ARRAY_SIZE(aio_data_wr_ranges), 142 + }; 143 + static const struct regmap_access_table aio_data_rd_table = { 144 + .yes_ranges = aio_data_rd_ranges, 145 + .n_yes_ranges = ARRAY_SIZE(aio_data_rd_ranges), 146 + }; 147 + 148 + static const struct regmap_config aio_data_regmap_config = { 149 + .name = "aio_data", 150 + .reg_bits = 16, 151 + .reg_stride = STX104_AIO_DATA_STRIDE, 152 + .reg_base = STX104_AIO_BASE, 153 + .val_bits = 16, 154 + .io_port = true, 155 + .wr_table = &aio_data_wr_table, 156 + .rd_table = &aio_data_rd_table, 157 + .volatile_table = &aio_data_rd_table, 158 + .cache_type = REGCACHE_FLAT, 159 + }; 160 + 161 + static const struct regmap_config dio_regmap_config = { 162 + .name = "dio", 163 + .reg_bits = 8, 164 + .reg_stride = 1, 165 + .reg_base = STX104_DIO_REG, 166 + .val_bits = 8, 167 + .io_port = true, 93 168 }; 94 169 95 170 static int stx104_read_raw(struct iio_dev *indio_dev, 96 171 struct iio_chan_spec const *chan, int *val, int *val2, long mask) 97 172 { 98 173 struct stx104_iio *const priv = iio_priv(indio_dev); 99 - struct stx104_reg __iomem *const reg = priv->reg; 174 + int err; 100 175 unsigned int adc_config; 101 - int adbu; 102 - int gain; 176 + unsigned int value; 177 + unsigned int adc_status; 103 178 104 179 switch (mask) { 105 180 case IIO_CHAN_INFO_HARDWAREGAIN: 106 - /* get gain configuration */ 107 - adc_config = ioread8(&reg->acfg); 108 - gain = adc_config & 0x3; 181 + err = regmap_read(priv->aio_ctl_map, STX104_ADC_CONFIGURATION, &adc_config); 182 + if (err) 183 + return err; 109 184 110 - *val = 1 << gain; 185 + *val = BIT(u8_get_bits(adc_config, STX104_GAIN)); 111 186 return IIO_VAL_INT; 112 187 case IIO_CHAN_INFO_RAW: 113 188 if (chan->output) { 114 - *val = priv->chan_out_states[chan->channel]; 189 + err = regmap_read(priv->aio_data_map, STX104_DAC_OFFSET(chan->channel), 190 + &value); 191 + if (err) 192 + return err; 193 + *val = value; 115 194 return IIO_VAL_INT; 116 195 } 117 196 197 + mutex_lock(&priv->lock); 198 + 118 199 /* select ADC channel */ 119 - iowrite8(chan->channel | (chan->channel << 4), &reg->achan); 200 + err = regmap_write(priv->aio_ctl_map, STX104_ADC_CHANNEL, 201 + STX104_SINGLE_CHANNEL(chan->channel)); 202 + if (err) { 203 + mutex_unlock(&priv->lock); 204 + return err; 205 + } 120 206 121 - /* trigger ADC sample capture by writing to the 8-bit 122 - * Software Strobe Register and wait for completion 207 + /* 208 + * Trigger ADC sample capture by writing to the 8-bit Software Strobe Register and 209 + * wait for completion; the conversion time range is 5 microseconds to 53.68 seconds 210 + * in steps of 25 nanoseconds. The actual Analog Input Frame Timer time interval is 211 + * calculated as: 212 + * ai_time_frame_ns = ( AIFT + 1 ) * ( 25 nanoseconds ). 213 + * Where 0 <= AIFT <= 2147483648. 123 214 */ 124 - iowrite8(0, &reg->ssr_ad); 125 - while (ioread8(&reg->cir_asr) & BIT(7)); 215 + err = regmap_write(priv->aio_ctl_map, STX104_SOFTWARE_STROBE, 0); 216 + if (err) { 217 + mutex_unlock(&priv->lock); 218 + return err; 219 + } 220 + err = regmap_read_poll_timeout(priv->aio_ctl_map, STX104_ADC_STATUS, adc_status, 221 + !u8_get_bits(adc_status, STX104_CNV), 0, 53687092); 222 + if (err) { 223 + mutex_unlock(&priv->lock); 224 + return err; 225 + } 126 226 127 - *val = ioread16(&reg->ssr_ad); 227 + err = regmap_read(priv->aio_data_map, STX104_ADC_DATA, &value); 228 + if (err) { 229 + mutex_unlock(&priv->lock); 230 + return err; 231 + } 232 + *val = value; 233 + 234 + mutex_unlock(&priv->lock); 128 235 return IIO_VAL_INT; 129 236 case IIO_CHAN_INFO_OFFSET: 130 237 /* get ADC bipolar/unipolar configuration */ 131 - adc_config = ioread8(&reg->acfg); 132 - adbu = !(adc_config & BIT(2)); 238 + err = regmap_read(priv->aio_ctl_map, STX104_ADC_CONFIGURATION, &adc_config); 239 + if (err) 240 + return err; 133 241 134 - *val = -32768 * adbu; 242 + *val = (u8_get_bits(adc_config, STX104_ADBU) == STX104_BIPOLAR) ? -32768 : 0; 135 243 return IIO_VAL_INT; 136 244 case IIO_CHAN_INFO_SCALE: 137 245 /* get ADC bipolar/unipolar and gain configuration */ 138 - adc_config = ioread8(&reg->acfg); 139 - adbu = !(adc_config & BIT(2)); 140 - gain = adc_config & 0x3; 246 + err = regmap_read(priv->aio_ctl_map, STX104_ADC_CONFIGURATION, &adc_config); 247 + if (err) 248 + return err; 141 249 142 250 *val = 5; 143 - *val2 = 15 - adbu + gain; 251 + *val2 = (u8_get_bits(adc_config, STX104_ADBU) == STX104_BIPOLAR) ? 14 : 15; 252 + *val2 += u8_get_bits(adc_config, STX104_GAIN); 144 253 return IIO_VAL_FRACTIONAL_LOG2; 145 254 } 146 255 ··· 261 150 struct iio_chan_spec const *chan, int val, int val2, long mask) 262 151 { 263 152 struct stx104_iio *const priv = iio_priv(indio_dev); 153 + u8 gain; 264 154 265 155 switch (mask) { 266 156 case IIO_CHAN_INFO_HARDWAREGAIN: 267 157 /* Only four gain states (x1, x2, x4, x8) */ 268 158 switch (val) { 269 159 case 1: 270 - iowrite8(0, &priv->reg->acfg); 160 + gain = STX104_GAIN_X1; 271 161 break; 272 162 case 2: 273 - iowrite8(1, &priv->reg->acfg); 163 + gain = STX104_GAIN_X2; 274 164 break; 275 165 case 4: 276 - iowrite8(2, &priv->reg->acfg); 166 + gain = STX104_GAIN_X4; 277 167 break; 278 168 case 8: 279 - iowrite8(3, &priv->reg->acfg); 169 + gain = STX104_GAIN_X8; 280 170 break; 281 171 default: 282 172 return -EINVAL; 283 173 } 284 174 285 - return 0; 175 + return regmap_write(priv->aio_ctl_map, STX104_ADC_CONFIGURATION, gain); 286 176 case IIO_CHAN_INFO_RAW: 287 - if (chan->output) { 288 - /* DAC can only accept up to a 16-bit value */ 289 - if ((unsigned int)val > 65535) 290 - return -EINVAL; 177 + if (!chan->output) 178 + return -EINVAL; 291 179 292 - priv->chan_out_states[chan->channel] = val; 293 - iowrite16(val, &priv->reg->dac[chan->channel]); 180 + if (val < 0 || val > U16_MAX) 181 + return -EINVAL; 294 182 295 - return 0; 296 - } 297 - return -EINVAL; 183 + return regmap_write(priv->aio_data_map, STX104_DAC_OFFSET(chan->channel), val); 298 184 } 299 185 300 186 return -EINVAL; ··· 320 212 STX104_IN_CHAN(6, 1), STX104_IN_CHAN(7, 1) 321 213 }; 322 214 323 - static int stx104_gpio_get_direction(struct gpio_chip *chip, 324 - unsigned int offset) 215 + static int stx104_reg_mask_xlate(struct gpio_regmap *const gpio, const unsigned int base, 216 + unsigned int offset, unsigned int *const reg, 217 + unsigned int *const mask) 325 218 { 326 - /* GPIO 0-3 are input only, while the rest are output only */ 327 - if (offset < 4) 328 - return 1; 329 - 330 - return 0; 331 - } 332 - 333 - static int stx104_gpio_direction_input(struct gpio_chip *chip, 334 - unsigned int offset) 335 - { 219 + /* Output lines are located at same register bit offsets as input lines */ 336 220 if (offset >= 4) 337 - return -EINVAL; 221 + offset -= 4; 222 + 223 + *reg = base; 224 + *mask = BIT(offset); 338 225 339 226 return 0; 340 - } 341 - 342 - static int stx104_gpio_direction_output(struct gpio_chip *chip, 343 - unsigned int offset, int value) 344 - { 345 - if (offset < 4) 346 - return -EINVAL; 347 - 348 - chip->set(chip, offset, value); 349 - return 0; 350 - } 351 - 352 - static int stx104_gpio_get(struct gpio_chip *chip, unsigned int offset) 353 - { 354 - struct stx104_gpio *const stx104gpio = gpiochip_get_data(chip); 355 - 356 - if (offset >= 4) 357 - return -EINVAL; 358 - 359 - return !!(ioread8(stx104gpio->base) & BIT(offset)); 360 - } 361 - 362 - static int stx104_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, 363 - unsigned long *bits) 364 - { 365 - struct stx104_gpio *const stx104gpio = gpiochip_get_data(chip); 366 - 367 - *bits = ioread8(stx104gpio->base); 368 - 369 - return 0; 370 - } 371 - 372 - static void stx104_gpio_set(struct gpio_chip *chip, unsigned int offset, 373 - int value) 374 - { 375 - struct stx104_gpio *const stx104gpio = gpiochip_get_data(chip); 376 - const unsigned int mask = BIT(offset) >> 4; 377 - unsigned long flags; 378 - 379 - if (offset < 4) 380 - return; 381 - 382 - spin_lock_irqsave(&stx104gpio->lock, flags); 383 - 384 - if (value) 385 - stx104gpio->out_state |= mask; 386 - else 387 - stx104gpio->out_state &= ~mask; 388 - 389 - iowrite8(stx104gpio->out_state, stx104gpio->base); 390 - 391 - spin_unlock_irqrestore(&stx104gpio->lock, flags); 392 227 } 393 228 394 229 #define STX104_NGPIO 8 ··· 339 288 "DIN0", "DIN1", "DIN2", "DIN3", "DOUT0", "DOUT1", "DOUT2", "DOUT3" 340 289 }; 341 290 342 - static void stx104_gpio_set_multiple(struct gpio_chip *chip, 343 - unsigned long *mask, unsigned long *bits) 291 + static int stx104_init_hw(struct stx104_iio *const priv) 344 292 { 345 - struct stx104_gpio *const stx104gpio = gpiochip_get_data(chip); 346 - unsigned long flags; 293 + int err; 347 294 348 - /* verify masked GPIO are output */ 349 - if (!(*mask & 0xF0)) 350 - return; 295 + /* configure device for software trigger operation */ 296 + err = regmap_write(priv->aio_ctl_map, STX104_ADC_CONTROL, STX104_SOFTWARE_TRIGGER); 297 + if (err) 298 + return err; 351 299 352 - *mask >>= 4; 353 - *bits >>= 4; 300 + /* initialize gain setting to x1 */ 301 + err = regmap_write(priv->aio_ctl_map, STX104_ADC_CONFIGURATION, STX104_GAIN_X1); 302 + if (err) 303 + return err; 354 304 355 - spin_lock_irqsave(&stx104gpio->lock, flags); 305 + /* initialize DAC outputs to 0V */ 306 + err = regmap_write(priv->aio_data_map, STX104_DAC_BASE, 0); 307 + if (err) 308 + return err; 309 + err = regmap_write(priv->aio_data_map, STX104_DAC_BASE + STX104_AIO_DATA_STRIDE, 0); 310 + if (err) 311 + return err; 356 312 357 - stx104gpio->out_state &= ~*mask; 358 - stx104gpio->out_state |= *mask & *bits; 359 - iowrite8(stx104gpio->out_state, stx104gpio->base); 360 - 361 - spin_unlock_irqrestore(&stx104gpio->lock, flags); 313 + return 0; 362 314 } 363 315 364 316 static int stx104_probe(struct device *dev, unsigned int id) 365 317 { 366 318 struct iio_dev *indio_dev; 367 319 struct stx104_iio *priv; 368 - struct stx104_gpio *stx104gpio; 320 + struct gpio_regmap_config gpio_config; 321 + void __iomem *stx104_base; 322 + struct regmap *aio_ctl_map; 323 + struct regmap *aio_data_map; 324 + struct regmap *dio_map; 369 325 int err; 326 + unsigned int adc_status; 370 327 371 328 indio_dev = devm_iio_device_alloc(dev, sizeof(*priv)); 372 329 if (!indio_dev) 373 - return -ENOMEM; 374 - 375 - stx104gpio = devm_kzalloc(dev, sizeof(*stx104gpio), GFP_KERNEL); 376 - if (!stx104gpio) 377 330 return -ENOMEM; 378 331 379 332 if (!devm_request_region(dev, base[id], STX104_EXTENT, ··· 387 332 return -EBUSY; 388 333 } 389 334 390 - priv = iio_priv(indio_dev); 391 - priv->reg = devm_ioport_map(dev, base[id], STX104_EXTENT); 392 - if (!priv->reg) 335 + stx104_base = devm_ioport_map(dev, base[id], STX104_EXTENT); 336 + if (!stx104_base) 393 337 return -ENOMEM; 338 + 339 + aio_ctl_map = devm_regmap_init_mmio(dev, stx104_base, &aio_ctl_regmap_config); 340 + if (IS_ERR(aio_ctl_map)) 341 + return dev_err_probe(dev, PTR_ERR(aio_ctl_map), 342 + "Unable to initialize aio_ctl register map\n"); 343 + 344 + aio_data_map = devm_regmap_init_mmio(dev, stx104_base, &aio_data_regmap_config); 345 + if (IS_ERR(aio_data_map)) 346 + return dev_err_probe(dev, PTR_ERR(aio_data_map), 347 + "Unable to initialize aio_data register map\n"); 348 + 349 + dio_map = devm_regmap_init_mmio(dev, stx104_base, &dio_regmap_config); 350 + if (IS_ERR(dio_map)) 351 + return dev_err_probe(dev, PTR_ERR(dio_map), 352 + "Unable to initialize dio register map\n"); 353 + 354 + priv = iio_priv(indio_dev); 355 + priv->aio_ctl_map = aio_ctl_map; 356 + priv->aio_data_map = aio_data_map; 394 357 395 358 indio_dev->info = &stx104_info; 396 359 indio_dev->modes = INDIO_DIRECT_MODE; 397 360 398 - /* determine if differential inputs */ 399 - if (ioread8(&priv->reg->cir_asr) & BIT(5)) { 361 + err = regmap_read(aio_ctl_map, STX104_ADC_STATUS, &adc_status); 362 + if (err) 363 + return err; 364 + 365 + if (u8_get_bits(adc_status, STX104_SD) == STX104_DIFFERENTIAL) { 400 366 indio_dev->num_channels = ARRAY_SIZE(stx104_channels_diff); 401 367 indio_dev->channels = stx104_channels_diff; 402 368 } else { ··· 427 351 428 352 indio_dev->name = dev_name(dev); 429 353 430 - /* configure device for software trigger operation */ 431 - iowrite8(0, &priv->reg->acr); 354 + mutex_init(&priv->lock); 432 355 433 - /* initialize gain setting to x1 */ 434 - iowrite8(0, &priv->reg->acfg); 435 - 436 - /* initialize DAC output to 0V */ 437 - iowrite16(0, &priv->reg->dac[0]); 438 - iowrite16(0, &priv->reg->dac[1]); 439 - 440 - stx104gpio->chip.label = dev_name(dev); 441 - stx104gpio->chip.parent = dev; 442 - stx104gpio->chip.owner = THIS_MODULE; 443 - stx104gpio->chip.base = -1; 444 - stx104gpio->chip.ngpio = STX104_NGPIO; 445 - stx104gpio->chip.names = stx104_names; 446 - stx104gpio->chip.get_direction = stx104_gpio_get_direction; 447 - stx104gpio->chip.direction_input = stx104_gpio_direction_input; 448 - stx104gpio->chip.direction_output = stx104_gpio_direction_output; 449 - stx104gpio->chip.get = stx104_gpio_get; 450 - stx104gpio->chip.get_multiple = stx104_gpio_get_multiple; 451 - stx104gpio->chip.set = stx104_gpio_set; 452 - stx104gpio->chip.set_multiple = stx104_gpio_set_multiple; 453 - stx104gpio->base = &priv->reg->dio; 454 - stx104gpio->out_state = 0x0; 455 - 456 - spin_lock_init(&stx104gpio->lock); 457 - 458 - err = devm_gpiochip_add_data(dev, &stx104gpio->chip, stx104gpio); 459 - if (err) { 460 - dev_err(dev, "GPIO registering failed (%d)\n", err); 356 + err = stx104_init_hw(priv); 357 + if (err) 461 358 return err; 462 - } 463 359 464 - return devm_iio_device_register(dev, indio_dev); 360 + err = devm_iio_device_register(dev, indio_dev); 361 + if (err) 362 + return err; 363 + 364 + gpio_config = (struct gpio_regmap_config) { 365 + .parent = dev, 366 + .regmap = dio_map, 367 + .ngpio = STX104_NGPIO, 368 + .names = stx104_names, 369 + .reg_dat_base = GPIO_REGMAP_ADDR(STX104_DIO_REG), 370 + .reg_set_base = GPIO_REGMAP_ADDR(STX104_DIO_REG), 371 + .ngpio_per_reg = STX104_NGPIO, 372 + .reg_mask_xlate = stx104_reg_mask_xlate, 373 + .drvdata = dio_map, 374 + }; 375 + 376 + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &gpio_config)); 465 377 } 466 378 467 379 static struct isa_driver stx104_driver = {
+3 -3
drivers/iio/chemical/sps30_i2c.c
··· 68 68 /* 69 69 * Internally sensor stores measurements in a following manner: 70 70 * 71 - * PM1: upper two bytes, crc8, lower two bytes, crc8 71 + * PM1: upper two bytes, crc8, lower two bytes, crc8 72 72 * PM2P5: upper two bytes, crc8, lower two bytes, crc8 73 - * PM4: upper two bytes, crc8, lower two bytes, crc8 74 - * PM10: upper two bytes, crc8, lower two bytes, crc8 73 + * PM4: upper two bytes, crc8, lower two bytes, crc8 74 + * PM10: upper two bytes, crc8, lower two bytes, crc8 75 75 * 76 76 * What follows next are number concentration measurements and 77 77 * typical particle size measurement which we omit.
+2 -2
drivers/iio/common/st_sensors/st_sensors_trigger.c
··· 85 85 */ 86 86 if (sdata->hw_irq_trigger && 87 87 st_sensors_new_samples_available(indio_dev, sdata)) { 88 - iio_trigger_poll_chained(p); 88 + iio_trigger_poll_nested(p); 89 89 } else { 90 90 dev_dbg(indio_dev->dev.parent, "spurious IRQ\n"); 91 91 return IRQ_NONE; ··· 110 110 dev_dbg(indio_dev->dev.parent, 111 111 "more samples came in during polling\n"); 112 112 sdata->hw_timestamp = iio_get_time_ns(indio_dev); 113 - iio_trigger_poll_chained(p); 113 + iio_trigger_poll_nested(p); 114 114 } 115 115 116 116 return IRQ_HANDLED;
+1
drivers/iio/dac/Kconfig
··· 277 277 tristate "Measurement Computing CIO-DAC IIO driver" 278 278 depends on X86 && (ISA_BUS || PC104) 279 279 select ISA_BUS_API 280 + select REGMAP_MMIO 280 281 help 281 282 Say yes here to build support for the Measurement Computing CIO-DAC 282 283 analog output device family (CIO-DAC16, CIO-DAC08, PC104-DAC06). The
+5
drivers/iio/dac/ad5592r-base.c
··· 124 124 return 0; 125 125 } 126 126 127 + static const char * const ad5592r_gpio_names[] = { 128 + "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5", "GPIO6", "GPIO7", 129 + }; 130 + 127 131 static int ad5592r_gpio_init(struct ad5592r_state *st) 128 132 { 129 133 if (!st->gpio_map) ··· 144 140 st->gpiochip.set = ad5592r_gpio_set; 145 141 st->gpiochip.request = ad5592r_gpio_request; 146 142 st->gpiochip.owner = THIS_MODULE; 143 + st->gpiochip.names = ad5592r_gpio_names; 147 144 148 145 mutex_init(&st->gpio_lock); 149 146
+46 -22
drivers/iio/dac/cio-dac.c
··· 4 4 * Copyright (C) 2016 William Breathitt Gray 5 5 * 6 6 * This driver supports the following Measurement Computing devices: CIO-DAC16, 7 - * CIO-DAC06, and PC104-DAC06. 7 + * CIO-DAC08, and PC104-DAC06. 8 8 */ 9 - #include <linux/bitops.h> 9 + #include <linux/bits.h> 10 10 #include <linux/device.h> 11 - #include <linux/errno.h> 11 + #include <linux/err.h> 12 12 #include <linux/iio/iio.h> 13 13 #include <linux/iio/types.h> 14 - #include <linux/io.h> 15 - #include <linux/ioport.h> 16 14 #include <linux/isa.h> 17 15 #include <linux/module.h> 18 16 #include <linux/moduleparam.h> 17 + #include <linux/regmap.h> 19 18 #include <linux/types.h> 20 19 21 20 #define CIO_DAC_NUM_CHAN 16 ··· 34 35 module_param_hw_array(base, uint, ioport, &num_cio_dac, 0); 35 36 MODULE_PARM_DESC(base, "Measurement Computing CIO-DAC base addresses"); 36 37 38 + #define CIO_DAC_BASE 0x00 39 + #define CIO_DAC_CHANNEL_STRIDE 2 40 + 41 + static bool cio_dac_precious_reg(struct device *dev, unsigned int reg) 42 + { 43 + /* 44 + * All registers are considered precious; if the XFER jumper is set on 45 + * the device, then no update occurs until a DAC register is read. 46 + */ 47 + return true; 48 + } 49 + 50 + static const struct regmap_config cio_dac_regmap_config = { 51 + .reg_bits = 16, 52 + .reg_stride = 2, 53 + .val_bits = 16, 54 + .io_port = true, 55 + .max_register = 0x1F, 56 + .precious_reg = cio_dac_precious_reg, 57 + }; 58 + 37 59 /** 38 60 * struct cio_dac_iio - IIO device private data structure 39 - * @chan_out_states: channels' output states 40 - * @base: base memory address of the DAC device 61 + * @map: Regmap for the device 41 62 */ 42 63 struct cio_dac_iio { 43 - int chan_out_states[CIO_DAC_NUM_CHAN]; 44 - u16 __iomem *base; 64 + struct regmap *map; 45 65 }; 46 66 47 67 static int cio_dac_read_raw(struct iio_dev *indio_dev, 48 68 struct iio_chan_spec const *chan, int *val, int *val2, long mask) 49 69 { 50 70 struct cio_dac_iio *const priv = iio_priv(indio_dev); 71 + const unsigned int offset = chan->channel * CIO_DAC_CHANNEL_STRIDE; 72 + int err; 73 + unsigned int dac_val; 51 74 52 75 if (mask != IIO_CHAN_INFO_RAW) 53 76 return -EINVAL; 54 77 55 - *val = priv->chan_out_states[chan->channel]; 78 + err = regmap_read(priv->map, CIO_DAC_BASE + offset, &dac_val); 79 + if (err) 80 + return err; 81 + 82 + *val = dac_val; 56 83 57 84 return IIO_VAL_INT; 58 85 } ··· 87 62 struct iio_chan_spec const *chan, int val, int val2, long mask) 88 63 { 89 64 struct cio_dac_iio *const priv = iio_priv(indio_dev); 65 + const unsigned int offset = chan->channel * CIO_DAC_CHANNEL_STRIDE; 90 66 91 67 if (mask != IIO_CHAN_INFO_RAW) 92 68 return -EINVAL; ··· 96 70 if ((unsigned int)val > 4095) 97 71 return -EINVAL; 98 72 99 - priv->chan_out_states[chan->channel] = val; 100 - iowrite16(val, priv->base + chan->channel); 101 - 102 - return 0; 73 + return regmap_write(priv->map, CIO_DAC_BASE + offset, val); 103 74 } 104 75 105 76 static const struct iio_info cio_dac_info = { ··· 115 92 { 116 93 struct iio_dev *indio_dev; 117 94 struct cio_dac_iio *priv; 118 - unsigned int i; 95 + void __iomem *regs; 119 96 120 97 indio_dev = devm_iio_device_alloc(dev, sizeof(*priv)); 121 98 if (!indio_dev) ··· 128 105 return -EBUSY; 129 106 } 130 107 131 - priv = iio_priv(indio_dev); 132 - priv->base = devm_ioport_map(dev, base[id], CIO_DAC_EXTENT); 133 - if (!priv->base) 108 + regs = devm_ioport_map(dev, base[id], CIO_DAC_EXTENT); 109 + if (!regs) 134 110 return -ENOMEM; 111 + 112 + priv = iio_priv(indio_dev); 113 + priv->map = devm_regmap_init_mmio(dev, regs, &cio_dac_regmap_config); 114 + if (IS_ERR(priv->map)) 115 + return dev_err_probe(dev, PTR_ERR(priv->map), 116 + "Unable to initialize register map\n"); 135 117 136 118 indio_dev->info = &cio_dac_info; 137 119 indio_dev->modes = INDIO_DIRECT_MODE; 138 120 indio_dev->channels = cio_dac_channels; 139 121 indio_dev->num_channels = CIO_DAC_NUM_CHAN; 140 122 indio_dev->name = dev_name(dev); 141 - 142 - /* initialize DAC outputs to 0V */ 143 - for (i = 0; i < CIO_DAC_NUM_CHAN; i++) 144 - iowrite16(0, priv->base + i); 145 123 146 124 return devm_iio_device_register(dev, indio_dev); 147 125 }
+1 -1
drivers/iio/dac/max5522.c
··· 52 52 } \ 53 53 } 54 54 55 - const struct iio_chan_spec max5522_channels[] = { 55 + static const struct iio_chan_spec max5522_channels[] = { 56 56 MAX5522_CHANNEL(0), 57 57 MAX5522_CHANNEL(1), 58 58 };
+4 -17
drivers/iio/frequency/admv1013.c
··· 490 490 st->input_mode); 491 491 } 492 492 493 - static void admv1013_clk_disable(void *data) 494 - { 495 - clk_disable_unprepare(data); 496 - } 497 - 498 493 static void admv1013_reg_disable(void *data) 499 494 { 500 495 regulator_disable(data); ··· 554 559 return dev_err_probe(&spi->dev, PTR_ERR(st->reg), 555 560 "failed to get the common-mode voltage\n"); 556 561 557 - st->clkin = devm_clk_get(&spi->dev, "lo_in"); 558 - if (IS_ERR(st->clkin)) 559 - return dev_err_probe(&spi->dev, PTR_ERR(st->clkin), 560 - "failed to get the LO input clock\n"); 561 - 562 562 return 0; 563 563 } 564 564 ··· 591 601 if (ret) 592 602 return ret; 593 603 594 - ret = clk_prepare_enable(st->clkin); 595 - if (ret) 596 - return ret; 597 - 598 - ret = devm_add_action_or_reset(&spi->dev, admv1013_clk_disable, st->clkin); 599 - if (ret) 600 - return ret; 604 + st->clkin = devm_clk_get_enabled(&spi->dev, "lo_in"); 605 + if (IS_ERR(st->clkin)) 606 + return dev_err_probe(&spi->dev, PTR_ERR(st->clkin), 607 + "failed to get the LO input clock\n"); 601 608 602 609 st->nb.notifier_call = admv1013_freq_change; 603 610 ret = devm_clk_notifier_register(&spi->dev, st->clkin, &st->nb);
+1 -1
drivers/iio/gyro/fxas21002c_core.c
··· 813 813 if (!data_ready) 814 814 return IRQ_NONE; 815 815 816 - iio_trigger_poll_chained(data->dready_trig); 816 + iio_trigger_poll_nested(data->dready_trig); 817 817 818 818 return IRQ_HANDLED; 819 819 }
+1 -1
drivers/iio/gyro/mpu3050-core.c
··· 939 939 if (!(val & MPU3050_INT_STATUS_RAW_RDY)) 940 940 return IRQ_NONE; 941 941 942 - iio_trigger_poll_chained(p); 942 + iio_trigger_poll_nested(p); 943 943 944 944 return IRQ_HANDLED; 945 945 }
+1 -1
drivers/iio/humidity/hts221_buffer.c
··· 68 68 if (!(status & HTS221_RH_DRDY_MASK)) 69 69 return IRQ_NONE; 70 70 71 - iio_trigger_poll_chained(hw->trig); 71 + iio_trigger_poll_nested(hw->trig); 72 72 73 73 return IRQ_HANDLED; 74 74 }
+3 -3
drivers/iio/imu/adis16475.c
··· 326 326 327 327 /* 328 328 * This is not an hard requirement but it's not advised to run the IMU 329 - * with a sample rate lower than 4000Hz due to possible undersampling 329 + * with a sample rate lower than 1900Hz due to possible undersampling 330 330 * issues. However, there are users that might really want to take the risk. 331 331 * Hence, we provide a module parameter for them. If set, we allow sample 332 - * rates lower than 4KHz. By default, we won't allow this and we just roundup 333 - * the rate to the next multiple of the input clock bigger than 4KHz. This 332 + * rates lower than 1.9KHz. By default, we won't allow this and we just roundup 333 + * the rate to the next multiple of the input clock bigger than 1.9KHz. This 334 334 * is done like this as in some cases (when DEC_RATE is 0) might give 335 335 * us the closest value to the one desired by the user... 336 336 */
+2 -2
drivers/iio/imu/st_lsm6dsx/Kconfig
··· 14 14 sensor. Supported devices: lsm6ds3, lsm6ds3h, lsm6dsl, lsm6dsm, 15 15 ism330dlc, lsm6dso, lsm6dsox, asm330lhh, asm330lhhx, lsm6dsr, 16 16 lsm6ds3tr-c, ism330dhcx, lsm6dsrx, lsm6ds0, lsm6dsop, lsm6dstx, 17 - lsm6dsv, lsm6dsv16x, lsm6dso16is, ism330is, lsm6dst and the 18 - accelerometer/gyroscope of lsm9ds1. 17 + lsm6dsv, lsm6dsv16x, lsm6dso16is, ism330is, asm330lhb, lsm6dst 18 + and the accelerometer/gyroscope of lsm9ds1. 19 19 20 20 To compile this driver as a module, choose M here: the module 21 21 will be called st_lsm6dsx.
+13
drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
··· 37 37 #define ST_LSM6DSV16X_DEV_NAME "lsm6dsv16x" 38 38 #define ST_LSM6DSO16IS_DEV_NAME "lsm6dso16is" 39 39 #define ST_ISM330IS_DEV_NAME "ism330is" 40 + #define ST_ASM330LHB_DEV_NAME "asm330lhb" 40 41 41 42 enum st_lsm6dsx_hw_id { 42 43 ST_LSM6DS3_ID, ··· 62 61 ST_LSM6DSV16X_ID, 63 62 ST_LSM6DSO16IS_ID, 64 63 ST_ISM330IS_ID, 64 + ST_ASM330LHB_ID, 65 65 ST_LSM6DSX_MAX_ID, 66 66 }; 67 67 ··· 137 135 138 136 struct st_lsm6dsx_odr odr_avl[ST_LSM6DSX_ODR_LIST_SIZE]; 139 137 int odr_len; 138 + }; 139 + 140 + struct st_lsm6dsx_samples_to_discard { 141 + struct { 142 + u32 milli_hz; 143 + u16 samples; 144 + } val[ST_LSM6DSX_ODR_LIST_SIZE]; 140 145 }; 141 146 142 147 struct st_lsm6dsx_fs { ··· 300 291 * @irq_config: interrupts related registers. 301 292 * @drdy_mask: register info for data-ready mask (addr + mask). 302 293 * @odr_table: Hw sensors odr table (Hz + val). 294 + * @samples_to_discard: Number of samples to discard for filters settling time. 303 295 * @fs_table: Hw sensors gain table (gain + val). 304 296 * @decimator: List of decimator register info (addr + mask). 305 297 * @batch: List of FIFO batching register info (addr + mask). ··· 333 323 } irq_config; 334 324 struct st_lsm6dsx_reg drdy_mask; 335 325 struct st_lsm6dsx_odr_table_entry odr_table[2]; 326 + struct st_lsm6dsx_samples_to_discard samples_to_discard[2]; 336 327 struct st_lsm6dsx_fs_table_entry fs_table[2]; 337 328 struct st_lsm6dsx_reg decimator[ST_LSM6DSX_MAX_ID]; 338 329 struct st_lsm6dsx_reg batch[ST_LSM6DSX_MAX_ID]; ··· 364 353 * @hw: Pointer to instance of struct st_lsm6dsx_hw. 365 354 * @gain: Configured sensor sensitivity. 366 355 * @odr: Output data rate of the sensor [Hz]. 356 + * @samples_to_discard: Number of samples to discard for filters settling time. 367 357 * @watermark: Sensor watermark level. 368 358 * @decimator: Sensor decimation factor. 369 359 * @sip: Number of samples in a given pattern. ··· 379 367 u32 gain; 380 368 u32 odr; 381 369 370 + u16 samples_to_discard; 382 371 u16 watermark; 383 372 u8 decimator; 384 373 u8 sip;
+50 -9
drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c
··· 15 15 * value of the decimation factor and ODR set for each FIFO data set. 16 16 * 17 17 * LSM6DSO/LSM6DSOX/ASM330LHH/ASM330LHHX/LSM6DSR/LSM6DSRX/ISM330DHCX/ 18 - * LSM6DST/LSM6DSOP/LSM6DSTX/LSM6DSV: 18 + * LSM6DST/LSM6DSOP/LSM6DSTX/LSM6DSV/ASM330LHB: 19 19 * The FIFO buffer can be configured to store data from gyroscope and 20 20 * accelerometer. Each sample is queued with a tag (1B) indicating data 21 21 * source (gyroscope, accelerometer, hw timer). ··· 457 457 } 458 458 459 459 if (gyro_sip > 0 && !(sip % gyro_sensor->decimator)) { 460 - iio_push_to_buffers_with_timestamp( 461 - hw->iio_devs[ST_LSM6DSX_ID_GYRO], 462 - &hw->scan[ST_LSM6DSX_ID_GYRO], 463 - gyro_sensor->ts_ref + ts); 460 + /* 461 + * We need to discards gyro samples during 462 + * filters settling time 463 + */ 464 + if (gyro_sensor->samples_to_discard > 0) 465 + gyro_sensor->samples_to_discard--; 466 + else 467 + iio_push_to_buffers_with_timestamp( 468 + hw->iio_devs[ST_LSM6DSX_ID_GYRO], 469 + &hw->scan[ST_LSM6DSX_ID_GYRO], 470 + gyro_sensor->ts_ref + ts); 464 471 gyro_sip--; 465 472 } 466 473 if (acc_sip > 0 && !(sip % acc_sensor->decimator)) { 467 - iio_push_to_buffers_with_timestamp( 468 - hw->iio_devs[ST_LSM6DSX_ID_ACC], 469 - &hw->scan[ST_LSM6DSX_ID_ACC], 470 - acc_sensor->ts_ref + ts); 474 + /* 475 + * We need to discards accel samples during 476 + * filters settling time 477 + */ 478 + if (acc_sensor->samples_to_discard > 0) 479 + acc_sensor->samples_to_discard--; 480 + else 481 + iio_push_to_buffers_with_timestamp( 482 + hw->iio_devs[ST_LSM6DSX_ID_ACC], 483 + &hw->scan[ST_LSM6DSX_ID_ACC], 484 + acc_sensor->ts_ref + ts); 471 485 acc_sip--; 472 486 } 473 487 if (ext_sip > 0 && !(sip % ext_sensor->decimator)) { ··· 668 654 return err; 669 655 } 670 656 657 + static void 658 + st_lsm6dsx_update_samples_to_discard(struct st_lsm6dsx_sensor *sensor) 659 + { 660 + const struct st_lsm6dsx_samples_to_discard *data; 661 + struct st_lsm6dsx_hw *hw = sensor->hw; 662 + int i; 663 + 664 + if (sensor->id != ST_LSM6DSX_ID_GYRO && 665 + sensor->id != ST_LSM6DSX_ID_ACC) 666 + return; 667 + 668 + /* check if drdy mask is supported in hw */ 669 + if (hw->settings->drdy_mask.addr) 670 + return; 671 + 672 + data = &hw->settings->samples_to_discard[sensor->id]; 673 + for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++) { 674 + if (data->val[i].milli_hz == sensor->odr) { 675 + sensor->samples_to_discard = data->val[i].samples; 676 + return; 677 + } 678 + } 679 + } 680 + 671 681 int st_lsm6dsx_update_fifo(struct st_lsm6dsx_sensor *sensor, bool enable) 672 682 { 673 683 struct st_lsm6dsx_hw *hw = sensor->hw; ··· 710 672 if (err < 0) 711 673 goto out; 712 674 } 675 + 676 + if (enable) 677 + st_lsm6dsx_update_samples_to_discard(sensor); 713 678 714 679 err = st_lsm6dsx_device_set_enable(sensor, enable); 715 680 if (err < 0)
+22
drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
··· 634 634 .fs_len = 4, 635 635 }, 636 636 }, 637 + .samples_to_discard = { 638 + [ST_LSM6DSX_ID_ACC] = { 639 + .val[0] = { 12500, 1 }, 640 + .val[1] = { 26000, 1 }, 641 + .val[2] = { 52000, 1 }, 642 + .val[3] = { 104000, 2 }, 643 + .val[4] = { 208000, 2 }, 644 + .val[5] = { 416000, 2 }, 645 + }, 646 + [ST_LSM6DSX_ID_GYRO] = { 647 + .val[0] = { 12500, 2 }, 648 + .val[1] = { 26000, 5 }, 649 + .val[2] = { 52000, 7 }, 650 + .val[3] = { 104000, 12 }, 651 + .val[4] = { 208000, 20 }, 652 + .val[5] = { 416000, 36 }, 653 + }, 654 + }, 637 655 .irq_config = { 638 656 .irq1 = { 639 657 .addr = 0x0d, ··· 1032 1014 .hw_id = ST_LSM6DSOP_ID, 1033 1015 .name = ST_LSM6DSOP_DEV_NAME, 1034 1016 .wai = 0x6c, 1017 + }, { 1018 + .hw_id = ST_ASM330LHB_ID, 1019 + .name = ST_ASM330LHB_DEV_NAME, 1020 + .wai = 0x6b, 1035 1021 }, 1036 1022 }, 1037 1023 .channels = {
+5
drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_i2c.c
··· 125 125 .compatible = "st,ism330is", 126 126 .data = (void *)ST_ISM330IS_ID, 127 127 }, 128 + { 129 + .compatible = "st,asm330lhb", 130 + .data = (void *)ST_ASM330LHB_ID, 131 + }, 128 132 {}, 129 133 }; 130 134 MODULE_DEVICE_TABLE(of, st_lsm6dsx_i2c_of_match); ··· 156 152 { ST_LSM6DSV16X_DEV_NAME, ST_LSM6DSV16X_ID }, 157 153 { ST_LSM6DSO16IS_DEV_NAME, ST_LSM6DSO16IS_ID }, 158 154 { ST_ISM330IS_DEV_NAME, ST_ISM330IS_ID }, 155 + { ST_ASM330LHB_DEV_NAME, ST_ASM330LHB_ID }, 159 156 {}, 160 157 }; 161 158 MODULE_DEVICE_TABLE(i2c, st_lsm6dsx_i2c_id_table);
+5
drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_spi.c
··· 125 125 .compatible = "st,ism330is", 126 126 .data = (void *)ST_ISM330IS_ID, 127 127 }, 128 + { 129 + .compatible = "st,asm330lhb", 130 + .data = (void *)ST_ASM330LHB_ID, 131 + }, 128 132 {}, 129 133 }; 130 134 MODULE_DEVICE_TABLE(of, st_lsm6dsx_spi_of_match); ··· 156 152 { ST_LSM6DSV16X_DEV_NAME, ST_LSM6DSV16X_ID }, 157 153 { ST_LSM6DSO16IS_DEV_NAME, ST_LSM6DSO16IS_ID }, 158 154 { ST_ISM330IS_DEV_NAME, ST_ISM330IS_ID }, 155 + { ST_ASM330LHB_DEV_NAME, ST_ASM330LHB_ID }, 159 156 {}, 160 157 }; 161 158 MODULE_DEVICE_TABLE(spi, st_lsm6dsx_spi_id_table);
+1077
drivers/iio/industrialio-gts-helper.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + /* gain-time-scale conversion helpers for IIO light sensors 3 + * 4 + * Copyright (c) 2023 Matti Vaittinen <mazziesaccount@gmail.com> 5 + */ 6 + 7 + #include <linux/device.h> 8 + #include <linux/errno.h> 9 + #include <linux/export.h> 10 + #include <linux/minmax.h> 11 + #include <linux/module.h> 12 + #include <linux/overflow.h> 13 + #include <linux/slab.h> 14 + #include <linux/sort.h> 15 + #include <linux/types.h> 16 + #include <linux/units.h> 17 + 18 + #include <linux/iio/iio-gts-helper.h> 19 + #include <linux/iio/types.h> 20 + 21 + /** 22 + * iio_gts_get_gain - Convert scale to total gain 23 + * 24 + * Internal helper for converting scale to total gain. 25 + * 26 + * @max: Maximum linearized scale. As an example, when scale is created 27 + * in magnitude of NANOs and max scale is 64.1 - The linearized 28 + * scale is 64 100 000 000. 29 + * @scale: Linearized scale to compute the gain for. 30 + * 31 + * Return: (floored) gain corresponding to the scale. -EINVAL if scale 32 + * is invalid. 33 + */ 34 + static int iio_gts_get_gain(const u64 max, const u64 scale) 35 + { 36 + u64 full = max; 37 + int tmp = 1; 38 + 39 + if (scale > full || !scale) 40 + return -EINVAL; 41 + 42 + if (U64_MAX - full < scale) { 43 + /* Risk of overflow */ 44 + if (full - scale < scale) 45 + return 1; 46 + 47 + full -= scale; 48 + tmp++; 49 + } 50 + 51 + while (full > scale * (u64)tmp) 52 + tmp++; 53 + 54 + return tmp; 55 + } 56 + 57 + /** 58 + * gain_get_scale_fraction - get the gain or time based on scale and known one 59 + * 60 + * @max: Maximum linearized scale. As an example, when scale is created 61 + * in magnitude of NANOs and max scale is 64.1 - The linearized 62 + * scale is 64 100 000 000. 63 + * @scale: Linearized scale to compute the gain/time for. 64 + * @known: Either integration time or gain depending on which one is known 65 + * @unknown: Pointer to variable where the computed gain/time is stored 66 + * 67 + * Internal helper for computing unknown fraction of total gain. 68 + * Compute either gain or time based on scale and either the gain or time 69 + * depending on which one is known. 70 + * 71 + * Return: 0 on success. 72 + */ 73 + static int gain_get_scale_fraction(const u64 max, u64 scale, int known, 74 + int *unknown) 75 + { 76 + int tot_gain; 77 + 78 + tot_gain = iio_gts_get_gain(max, scale); 79 + if (tot_gain < 0) 80 + return tot_gain; 81 + 82 + *unknown = tot_gain / known; 83 + 84 + /* We require total gain to be exact multiple of known * unknown */ 85 + if (!*unknown || *unknown * known != tot_gain) 86 + return -EINVAL; 87 + 88 + return 0; 89 + } 90 + 91 + static int iio_gts_delinearize(u64 lin_scale, unsigned long scaler, 92 + int *scale_whole, int *scale_nano) 93 + { 94 + int frac; 95 + 96 + if (scaler > NANO) 97 + return -EOVERFLOW; 98 + 99 + if (!scaler) 100 + return -EINVAL; 101 + 102 + frac = do_div(lin_scale, scaler); 103 + 104 + *scale_whole = lin_scale; 105 + *scale_nano = frac * (NANO / scaler); 106 + 107 + return 0; 108 + } 109 + 110 + static int iio_gts_linearize(int scale_whole, int scale_nano, 111 + unsigned long scaler, u64 *lin_scale) 112 + { 113 + /* 114 + * Expect scale to be (mostly) NANO or MICRO. Divide divider instead of 115 + * multiplication followed by division to avoid overflow. 116 + */ 117 + if (scaler > NANO || !scaler) 118 + return -EINVAL; 119 + 120 + *lin_scale = (u64)scale_whole * (u64)scaler + 121 + (u64)(scale_nano / (NANO / scaler)); 122 + 123 + return 0; 124 + } 125 + 126 + /** 127 + * iio_gts_total_gain_to_scale - convert gain to scale 128 + * @gts: Gain time scale descriptor 129 + * @total_gain: the gain to be converted 130 + * @scale_int: Pointer to integral part of the scale (typically val1) 131 + * @scale_nano: Pointer to fractional part of the scale (nano or ppb) 132 + * 133 + * Convert the total gain value to scale. NOTE: This does not separate gain 134 + * generated by HW-gain or integration time. It is up to caller to decide what 135 + * part of the total gain is due to integration time and what due to HW-gain. 136 + * 137 + * Return: 0 on success. Negative errno on failure. 138 + */ 139 + int iio_gts_total_gain_to_scale(struct iio_gts *gts, int total_gain, 140 + int *scale_int, int *scale_nano) 141 + { 142 + u64 tmp; 143 + 144 + tmp = gts->max_scale; 145 + 146 + do_div(tmp, total_gain); 147 + 148 + return iio_gts_delinearize(tmp, NANO, scale_int, scale_nano); 149 + } 150 + EXPORT_SYMBOL_NS_GPL(iio_gts_total_gain_to_scale, IIO_GTS_HELPER); 151 + 152 + /** 153 + * iio_gts_purge_avail_scale_table - free-up the available scale tables 154 + * @gts: Gain time scale descriptor 155 + * 156 + * Free the space reserved by iio_gts_build_avail_scale_table(). 157 + */ 158 + static void iio_gts_purge_avail_scale_table(struct iio_gts *gts) 159 + { 160 + int i; 161 + 162 + if (gts->per_time_avail_scale_tables) { 163 + for (i = 0; i < gts->num_itime; i++) 164 + kfree(gts->per_time_avail_scale_tables[i]); 165 + 166 + kfree(gts->per_time_avail_scale_tables); 167 + gts->per_time_avail_scale_tables = NULL; 168 + } 169 + 170 + kfree(gts->avail_all_scales_table); 171 + gts->avail_all_scales_table = NULL; 172 + 173 + gts->num_avail_all_scales = 0; 174 + } 175 + 176 + static int iio_gts_gain_cmp(const void *a, const void *b) 177 + { 178 + return *(int *)a - *(int *)b; 179 + } 180 + 181 + static int gain_to_scaletables(struct iio_gts *gts, int **gains, int **scales) 182 + { 183 + int ret, i, j, new_idx, time_idx; 184 + int *all_gains; 185 + size_t gain_bytes; 186 + 187 + for (i = 0; i < gts->num_itime; i++) { 188 + /* 189 + * Sort the tables for nice output and for easier finding of 190 + * unique values. 191 + */ 192 + sort(gains[i], gts->num_hwgain, sizeof(int), iio_gts_gain_cmp, 193 + NULL); 194 + 195 + /* Convert gains to scales */ 196 + for (j = 0; j < gts->num_hwgain; j++) { 197 + ret = iio_gts_total_gain_to_scale(gts, gains[i][j], 198 + &scales[i][2 * j], 199 + &scales[i][2 * j + 1]); 200 + if (ret) 201 + return ret; 202 + } 203 + } 204 + 205 + gain_bytes = array_size(gts->num_hwgain, sizeof(int)); 206 + all_gains = kcalloc(gts->num_itime, gain_bytes, GFP_KERNEL); 207 + if (!all_gains) 208 + return -ENOMEM; 209 + 210 + /* 211 + * We assume all the gains for same integration time were unique. 212 + * It is likely the first time table had greatest time multiplier as 213 + * the times are in the order of preference and greater times are 214 + * usually preferred. Hence we start from the last table which is likely 215 + * to have the smallest total gains. 216 + */ 217 + time_idx = gts->num_itime - 1; 218 + memcpy(all_gains, gains[time_idx], gain_bytes); 219 + new_idx = gts->num_hwgain; 220 + 221 + while (time_idx--) { 222 + for (j = 0; j < gts->num_hwgain; j++) { 223 + int candidate = gains[time_idx][j]; 224 + int chk; 225 + 226 + if (candidate > all_gains[new_idx - 1]) { 227 + all_gains[new_idx] = candidate; 228 + new_idx++; 229 + 230 + continue; 231 + } 232 + for (chk = 0; chk < new_idx; chk++) 233 + if (candidate <= all_gains[chk]) 234 + break; 235 + 236 + if (candidate == all_gains[chk]) 237 + continue; 238 + 239 + memmove(&all_gains[chk + 1], &all_gains[chk], 240 + (new_idx - chk) * sizeof(int)); 241 + all_gains[chk] = candidate; 242 + new_idx++; 243 + } 244 + } 245 + 246 + gts->avail_all_scales_table = kcalloc(new_idx, 2 * sizeof(int), 247 + GFP_KERNEL); 248 + if (!gts->avail_all_scales_table) { 249 + ret = -ENOMEM; 250 + goto free_out; 251 + } 252 + gts->num_avail_all_scales = new_idx; 253 + 254 + for (i = 0; i < gts->num_avail_all_scales; i++) { 255 + ret = iio_gts_total_gain_to_scale(gts, all_gains[i], 256 + &gts->avail_all_scales_table[i * 2], 257 + &gts->avail_all_scales_table[i * 2 + 1]); 258 + 259 + if (ret) { 260 + kfree(gts->avail_all_scales_table); 261 + gts->num_avail_all_scales = 0; 262 + goto free_out; 263 + } 264 + } 265 + 266 + free_out: 267 + kfree(all_gains); 268 + 269 + return ret; 270 + } 271 + 272 + /** 273 + * iio_gts_build_avail_scale_table - create tables of available scales 274 + * @gts: Gain time scale descriptor 275 + * 276 + * Build the tables which can represent the available scales based on the 277 + * originally given gain and time tables. When both time and gain tables are 278 + * given this results: 279 + * 1. A set of tables representing available scales for each supported 280 + * integration time. 281 + * 2. A single table listing all the unique scales that any combination of 282 + * supported gains and times can provide. 283 + * 284 + * NOTE: Space allocated for the tables must be freed using 285 + * iio_gts_purge_avail_scale_table() when the tables are no longer needed. 286 + * 287 + * Return: 0 on success. 288 + */ 289 + static int iio_gts_build_avail_scale_table(struct iio_gts *gts) 290 + { 291 + int **per_time_gains, **per_time_scales, i, j, ret = -ENOMEM; 292 + 293 + per_time_gains = kcalloc(gts->num_itime, sizeof(*per_time_gains), GFP_KERNEL); 294 + if (!per_time_gains) 295 + return ret; 296 + 297 + per_time_scales = kcalloc(gts->num_itime, sizeof(*per_time_scales), GFP_KERNEL); 298 + if (!per_time_scales) 299 + goto free_gains; 300 + 301 + for (i = 0; i < gts->num_itime; i++) { 302 + per_time_scales[i] = kcalloc(gts->num_hwgain, 2 * sizeof(int), 303 + GFP_KERNEL); 304 + if (!per_time_scales[i]) 305 + goto err_free_out; 306 + 307 + per_time_gains[i] = kcalloc(gts->num_hwgain, sizeof(int), 308 + GFP_KERNEL); 309 + if (!per_time_gains[i]) { 310 + kfree(per_time_scales[i]); 311 + goto err_free_out; 312 + } 313 + 314 + for (j = 0; j < gts->num_hwgain; j++) 315 + per_time_gains[i][j] = gts->hwgain_table[j].gain * 316 + gts->itime_table[i].mul; 317 + } 318 + 319 + ret = gain_to_scaletables(gts, per_time_gains, per_time_scales); 320 + if (ret) 321 + goto err_free_out; 322 + 323 + kfree(per_time_gains); 324 + gts->per_time_avail_scale_tables = per_time_scales; 325 + 326 + return 0; 327 + 328 + err_free_out: 329 + for (i--; i; i--) { 330 + kfree(per_time_scales[i]); 331 + kfree(per_time_gains[i]); 332 + } 333 + kfree(per_time_scales); 334 + free_gains: 335 + kfree(per_time_gains); 336 + 337 + return ret; 338 + } 339 + 340 + /** 341 + * iio_gts_build_avail_time_table - build table of available integration times 342 + * @gts: Gain time scale descriptor 343 + * 344 + * Build the table which can represent the available times to be returned 345 + * to users using the read_avail-callback. 346 + * 347 + * NOTE: Space allocated for the tables must be freed using 348 + * iio_gts_purge_avail_time_table() when the tables are no longer needed. 349 + * 350 + * Return: 0 on success. 351 + */ 352 + static int iio_gts_build_avail_time_table(struct iio_gts *gts) 353 + { 354 + int *times, i, j, idx = 0; 355 + 356 + if (!gts->num_itime) 357 + return 0; 358 + 359 + times = kcalloc(gts->num_itime, sizeof(int), GFP_KERNEL); 360 + if (!times) 361 + return -ENOMEM; 362 + 363 + /* Sort times from all tables to one and remove duplicates */ 364 + for (i = gts->num_itime - 1; i >= 0; i--) { 365 + int new = gts->itime_table[i].time_us; 366 + 367 + if (times[idx] < new) { 368 + times[idx++] = new; 369 + continue; 370 + } 371 + 372 + for (j = 0; j <= idx; j++) { 373 + if (times[j] > new) { 374 + memmove(&times[j + 1], &times[j], 375 + (idx - j) * sizeof(int)); 376 + times[j] = new; 377 + idx++; 378 + } 379 + } 380 + } 381 + gts->avail_time_tables = times; 382 + /* 383 + * This is just to survive a unlikely corner-case where times in the 384 + * given time table were not unique. Else we could just trust the 385 + * gts->num_itime. 386 + */ 387 + gts->num_avail_time_tables = idx; 388 + 389 + return 0; 390 + } 391 + 392 + /** 393 + * iio_gts_purge_avail_time_table - free-up the available integration time table 394 + * @gts: Gain time scale descriptor 395 + * 396 + * Free the space reserved by iio_gts_build_avail_time_table(). 397 + */ 398 + static void iio_gts_purge_avail_time_table(struct iio_gts *gts) 399 + { 400 + if (gts->num_avail_time_tables) { 401 + kfree(gts->avail_time_tables); 402 + gts->avail_time_tables = NULL; 403 + gts->num_avail_time_tables = 0; 404 + } 405 + } 406 + 407 + /** 408 + * iio_gts_build_avail_tables - create tables of available scales and int times 409 + * @gts: Gain time scale descriptor 410 + * 411 + * Build the tables which can represent the available scales and available 412 + * integration times. Availability tables are built based on the originally 413 + * given gain and given time tables. 414 + * 415 + * When both time and gain tables are 416 + * given this results: 417 + * 1. A set of sorted tables representing available scales for each supported 418 + * integration time. 419 + * 2. A single sorted table listing all the unique scales that any combination 420 + * of supported gains and times can provide. 421 + * 3. A sorted table of supported integration times 422 + * 423 + * After these tables are built one can use the iio_gts_all_avail_scales(), 424 + * iio_gts_avail_scales_for_time() and iio_gts_avail_times() helpers to 425 + * implement the read_avail operations. 426 + * 427 + * NOTE: Space allocated for the tables must be freed using 428 + * iio_gts_purge_avail_tables() when the tables are no longer needed. 429 + * 430 + * Return: 0 on success. 431 + */ 432 + static int iio_gts_build_avail_tables(struct iio_gts *gts) 433 + { 434 + int ret; 435 + 436 + ret = iio_gts_build_avail_scale_table(gts); 437 + if (ret) 438 + return ret; 439 + 440 + ret = iio_gts_build_avail_time_table(gts); 441 + if (ret) 442 + iio_gts_purge_avail_scale_table(gts); 443 + 444 + return ret; 445 + } 446 + 447 + /** 448 + * iio_gts_purge_avail_tables - free-up the availability tables 449 + * @gts: Gain time scale descriptor 450 + * 451 + * Free the space reserved by iio_gts_build_avail_tables(). Frees both the 452 + * integration time and scale tables. 453 + */ 454 + static void iio_gts_purge_avail_tables(struct iio_gts *gts) 455 + { 456 + iio_gts_purge_avail_time_table(gts); 457 + iio_gts_purge_avail_scale_table(gts); 458 + } 459 + 460 + static void devm_iio_gts_avail_all_drop(void *res) 461 + { 462 + iio_gts_purge_avail_tables(res); 463 + } 464 + 465 + /** 466 + * devm_iio_gts_build_avail_tables - manged add availability tables 467 + * @dev: Pointer to the device whose lifetime tables are bound 468 + * @gts: Gain time scale descriptor 469 + * 470 + * Build the tables which can represent the available scales and available 471 + * integration times. Availability tables are built based on the originally 472 + * given gain and given time tables. 473 + * 474 + * When both time and gain tables are given this results: 475 + * 1. A set of sorted tables representing available scales for each supported 476 + * integration time. 477 + * 2. A single sorted table listing all the unique scales that any combination 478 + * of supported gains and times can provide. 479 + * 3. A sorted table of supported integration times 480 + * 481 + * After these tables are built one can use the iio_gts_all_avail_scales(), 482 + * iio_gts_avail_scales_for_time() and iio_gts_avail_times() helpers to 483 + * implement the read_avail operations. 484 + * 485 + * The tables are automatically released upon device detach. 486 + * 487 + * Return: 0 on success. 488 + */ 489 + static int devm_iio_gts_build_avail_tables(struct device *dev, 490 + struct iio_gts *gts) 491 + { 492 + int ret; 493 + 494 + ret = iio_gts_build_avail_tables(gts); 495 + if (ret) 496 + return ret; 497 + 498 + return devm_add_action_or_reset(dev, devm_iio_gts_avail_all_drop, gts); 499 + } 500 + 501 + static int sanity_check_time(const struct iio_itime_sel_mul *t) 502 + { 503 + if (t->sel < 0 || t->time_us < 0 || t->mul <= 0) 504 + return -EINVAL; 505 + 506 + return 0; 507 + } 508 + 509 + static int sanity_check_gain(const struct iio_gain_sel_pair *g) 510 + { 511 + if (g->sel < 0 || g->gain <= 0) 512 + return -EINVAL; 513 + 514 + return 0; 515 + } 516 + 517 + static int iio_gts_sanity_check(struct iio_gts *gts) 518 + { 519 + int g, t, ret; 520 + 521 + if (!gts->num_hwgain && !gts->num_itime) 522 + return -EINVAL; 523 + 524 + for (t = 0; t < gts->num_itime; t++) { 525 + ret = sanity_check_time(&gts->itime_table[t]); 526 + if (ret) 527 + return ret; 528 + } 529 + 530 + for (g = 0; g < gts->num_hwgain; g++) { 531 + ret = sanity_check_gain(&gts->hwgain_table[g]); 532 + if (ret) 533 + return ret; 534 + } 535 + 536 + for (g = 0; g < gts->num_hwgain; g++) { 537 + for (t = 0; t < gts->num_itime; t++) { 538 + int gain, mul, res; 539 + 540 + gain = gts->hwgain_table[g].gain; 541 + mul = gts->itime_table[t].mul; 542 + 543 + if (check_mul_overflow(gain, mul, &res)) 544 + return -EOVERFLOW; 545 + } 546 + } 547 + 548 + return 0; 549 + } 550 + 551 + static int iio_init_iio_gts(int max_scale_int, int max_scale_nano, 552 + const struct iio_gain_sel_pair *gain_tbl, int num_gain, 553 + const struct iio_itime_sel_mul *tim_tbl, int num_times, 554 + struct iio_gts *gts) 555 + { 556 + int ret; 557 + 558 + memset(gts, 0, sizeof(*gts)); 559 + 560 + ret = iio_gts_linearize(max_scale_int, max_scale_nano, NANO, 561 + &gts->max_scale); 562 + if (ret) 563 + return ret; 564 + 565 + gts->hwgain_table = gain_tbl; 566 + gts->num_hwgain = num_gain; 567 + gts->itime_table = tim_tbl; 568 + gts->num_itime = num_times; 569 + 570 + return iio_gts_sanity_check(gts); 571 + } 572 + 573 + /** 574 + * devm_iio_init_iio_gts - Initialize the gain-time-scale helper 575 + * @dev: Pointer to the device whose lifetime gts resources are 576 + * bound 577 + * @max_scale_int: integer part of the maximum scale value 578 + * @max_scale_nano: fraction part of the maximum scale value 579 + * @gain_tbl: table describing supported gains 580 + * @num_gain: number of gains in the gain table 581 + * @tim_tbl: table describing supported integration times. Provide 582 + * the integration time table sorted so that the preferred 583 + * integration time is in the first array index. The search 584 + * functions like the 585 + * iio_gts_find_time_and_gain_sel_for_scale() start search 586 + * from first provided time. 587 + * @num_times: number of times in the time table 588 + * @gts: pointer to the helper struct 589 + * 590 + * Initialize the gain-time-scale helper for use. Note, gains, times, selectors 591 + * and multipliers must be positive. Negative values are reserved for error 592 + * checking. The total gain (maximum gain * maximum time multiplier) must not 593 + * overflow int. The allocated resources will be released upon device detach. 594 + * 595 + * Return: 0 on success. 596 + */ 597 + int devm_iio_init_iio_gts(struct device *dev, int max_scale_int, int max_scale_nano, 598 + const struct iio_gain_sel_pair *gain_tbl, int num_gain, 599 + const struct iio_itime_sel_mul *tim_tbl, int num_times, 600 + struct iio_gts *gts) 601 + { 602 + int ret; 603 + 604 + ret = iio_init_iio_gts(max_scale_int, max_scale_nano, gain_tbl, 605 + num_gain, tim_tbl, num_times, gts); 606 + if (ret) 607 + return ret; 608 + 609 + return devm_iio_gts_build_avail_tables(dev, gts); 610 + } 611 + EXPORT_SYMBOL_NS_GPL(devm_iio_init_iio_gts, IIO_GTS_HELPER); 612 + 613 + /** 614 + * iio_gts_all_avail_scales - helper for listing all available scales 615 + * @gts: Gain time scale descriptor 616 + * @vals: Returned array of supported scales 617 + * @type: Type of returned scale values 618 + * @length: Amount of returned values in array 619 + * 620 + * Return: a value suitable to be returned from read_avail or a negative error. 621 + */ 622 + int iio_gts_all_avail_scales(struct iio_gts *gts, const int **vals, int *type, 623 + int *length) 624 + { 625 + if (!gts->num_avail_all_scales) 626 + return -EINVAL; 627 + 628 + *vals = gts->avail_all_scales_table; 629 + *type = IIO_VAL_INT_PLUS_NANO; 630 + *length = gts->num_avail_all_scales * 2; 631 + 632 + return IIO_AVAIL_LIST; 633 + } 634 + EXPORT_SYMBOL_NS_GPL(iio_gts_all_avail_scales, IIO_GTS_HELPER); 635 + 636 + /** 637 + * iio_gts_avail_scales_for_time - list scales for integration time 638 + * @gts: Gain time scale descriptor 639 + * @time: Integration time for which the scales are listed 640 + * @vals: Returned array of supported scales 641 + * @type: Type of returned scale values 642 + * @length: Amount of returned values in array 643 + * 644 + * Drivers which do not allow scale setting to change integration time can 645 + * use this helper to list only the scales which are valid for given integration 646 + * time. 647 + * 648 + * Return: a value suitable to be returned from read_avail or a negative error. 649 + */ 650 + int iio_gts_avail_scales_for_time(struct iio_gts *gts, int time, 651 + const int **vals, int *type, int *length) 652 + { 653 + int i; 654 + 655 + for (i = 0; i < gts->num_itime; i++) 656 + if (gts->itime_table[i].time_us == time) 657 + break; 658 + 659 + if (i == gts->num_itime) 660 + return -EINVAL; 661 + 662 + *vals = gts->per_time_avail_scale_tables[i]; 663 + *type = IIO_VAL_INT_PLUS_NANO; 664 + *length = gts->num_hwgain * 2; 665 + 666 + return IIO_AVAIL_LIST; 667 + } 668 + EXPORT_SYMBOL_NS_GPL(iio_gts_avail_scales_for_time, IIO_GTS_HELPER); 669 + 670 + /** 671 + * iio_gts_avail_times - helper for listing available integration times 672 + * @gts: Gain time scale descriptor 673 + * @vals: Returned array of supported times 674 + * @type: Type of returned scale values 675 + * @length: Amount of returned values in array 676 + * 677 + * Return: a value suitable to be returned from read_avail or a negative error. 678 + */ 679 + int iio_gts_avail_times(struct iio_gts *gts, const int **vals, int *type, 680 + int *length) 681 + { 682 + if (!gts->num_avail_time_tables) 683 + return -EINVAL; 684 + 685 + *vals = gts->avail_time_tables; 686 + *type = IIO_VAL_INT; 687 + *length = gts->num_avail_time_tables; 688 + 689 + return IIO_AVAIL_LIST; 690 + } 691 + EXPORT_SYMBOL_NS_GPL(iio_gts_avail_times, IIO_GTS_HELPER); 692 + 693 + /** 694 + * iio_gts_find_sel_by_gain - find selector corresponding to a HW-gain 695 + * @gts: Gain time scale descriptor 696 + * @gain: HW-gain for which matching selector is searched for 697 + * 698 + * Return: a selector matching given HW-gain or -EINVAL if selector was 699 + * not found. 700 + */ 701 + int iio_gts_find_sel_by_gain(struct iio_gts *gts, int gain) 702 + { 703 + int i; 704 + 705 + for (i = 0; i < gts->num_hwgain; i++) 706 + if (gts->hwgain_table[i].gain == gain) 707 + return gts->hwgain_table[i].sel; 708 + 709 + return -EINVAL; 710 + } 711 + EXPORT_SYMBOL_NS_GPL(iio_gts_find_sel_by_gain, IIO_GTS_HELPER); 712 + 713 + /** 714 + * iio_gts_find_gain_by_sel - find HW-gain corresponding to a selector 715 + * @gts: Gain time scale descriptor 716 + * @sel: selector for which matching HW-gain is searched for 717 + * 718 + * Return: a HW-gain matching given selector or -EINVAL if HW-gain was not 719 + * found. 720 + */ 721 + int iio_gts_find_gain_by_sel(struct iio_gts *gts, int sel) 722 + { 723 + int i; 724 + 725 + for (i = 0; i < gts->num_hwgain; i++) 726 + if (gts->hwgain_table[i].sel == sel) 727 + return gts->hwgain_table[i].gain; 728 + 729 + return -EINVAL; 730 + } 731 + EXPORT_SYMBOL_NS_GPL(iio_gts_find_gain_by_sel, IIO_GTS_HELPER); 732 + 733 + /** 734 + * iio_gts_get_min_gain - find smallest valid HW-gain 735 + * @gts: Gain time scale descriptor 736 + * 737 + * Return: The smallest HW-gain -EINVAL if no HW-gains were in the tables. 738 + */ 739 + int iio_gts_get_min_gain(struct iio_gts *gts) 740 + { 741 + int i, min = -EINVAL; 742 + 743 + for (i = 0; i < gts->num_hwgain; i++) { 744 + int gain = gts->hwgain_table[i].gain; 745 + 746 + if (min == -EINVAL) 747 + min = gain; 748 + else 749 + min = min(min, gain); 750 + } 751 + 752 + return min; 753 + } 754 + EXPORT_SYMBOL_NS_GPL(iio_gts_get_min_gain, IIO_GTS_HELPER); 755 + 756 + /** 757 + * iio_find_closest_gain_low - Find the closest lower matching gain 758 + * @gts: Gain time scale descriptor 759 + * @gain: HW-gain for which the closest match is searched 760 + * @in_range: indicate if the @gain was actually in the range of 761 + * supported gains. 762 + * 763 + * Search for closest supported gain that is lower than or equal to the 764 + * gain given as a parameter. This is usable for drivers which do not require 765 + * user to request exact matching gain but rather for rounding to a supported 766 + * gain value which is equal or lower (setting lower gain is typical for 767 + * avoiding saturation) 768 + * 769 + * Return: The closest matching supported gain or -EINVAL if @gain 770 + * was smaller than the smallest supported gain. 771 + */ 772 + int iio_find_closest_gain_low(struct iio_gts *gts, int gain, bool *in_range) 773 + { 774 + int i, diff = 0; 775 + int best = -1; 776 + 777 + *in_range = false; 778 + 779 + for (i = 0; i < gts->num_hwgain; i++) { 780 + if (gain == gts->hwgain_table[i].gain) { 781 + *in_range = true; 782 + return gain; 783 + } 784 + 785 + if (gain > gts->hwgain_table[i].gain) { 786 + if (!diff) { 787 + diff = gain - gts->hwgain_table[i].gain; 788 + best = i; 789 + } else { 790 + int tmp = gain - gts->hwgain_table[i].gain; 791 + 792 + if (tmp < diff) { 793 + diff = tmp; 794 + best = i; 795 + } 796 + } 797 + } else { 798 + /* 799 + * We found valid HW-gain which is greater than 800 + * reference. So, unless we return a failure below we 801 + * will have found an in-range gain 802 + */ 803 + *in_range = true; 804 + } 805 + } 806 + /* The requested gain was smaller than anything we support */ 807 + if (!diff) { 808 + *in_range = false; 809 + 810 + return -EINVAL; 811 + } 812 + 813 + return gts->hwgain_table[best].gain; 814 + } 815 + EXPORT_SYMBOL_NS_GPL(iio_find_closest_gain_low, IIO_GTS_HELPER); 816 + 817 + static int iio_gts_get_int_time_gain_multiplier_by_sel(struct iio_gts *gts, 818 + int sel) 819 + { 820 + const struct iio_itime_sel_mul *time; 821 + 822 + time = iio_gts_find_itime_by_sel(gts, sel); 823 + if (!time) 824 + return -EINVAL; 825 + 826 + return time->mul; 827 + } 828 + 829 + /** 830 + * iio_gts_find_gain_for_scale_using_time - Find gain by time and scale 831 + * @gts: Gain time scale descriptor 832 + * @time_sel: Integration time selector corresponding to the time gain is 833 + * searched for 834 + * @scale_int: Integral part of the scale (typically val1) 835 + * @scale_nano: Fractional part of the scale (nano or ppb) 836 + * @gain: Pointer to value where gain is stored. 837 + * 838 + * In some cases the light sensors may want to find a gain setting which 839 + * corresponds given scale and integration time. Sensors which fill the 840 + * gain and time tables may use this helper to retrieve the gain. 841 + * 842 + * Return: 0 on success. -EINVAL if gain matching the parameters is not 843 + * found. 844 + */ 845 + static int iio_gts_find_gain_for_scale_using_time(struct iio_gts *gts, int time_sel, 846 + int scale_int, int scale_nano, 847 + int *gain) 848 + { 849 + u64 scale_linear; 850 + int ret, mul; 851 + 852 + ret = iio_gts_linearize(scale_int, scale_nano, NANO, &scale_linear); 853 + if (ret) 854 + return ret; 855 + 856 + ret = iio_gts_get_int_time_gain_multiplier_by_sel(gts, time_sel); 857 + if (ret < 0) 858 + return ret; 859 + 860 + mul = ret; 861 + 862 + ret = gain_get_scale_fraction(gts->max_scale, scale_linear, mul, gain); 863 + if (ret) 864 + return ret; 865 + 866 + if (!iio_gts_valid_gain(gts, *gain)) 867 + return -EINVAL; 868 + 869 + return 0; 870 + } 871 + 872 + /** 873 + * iio_gts_find_gain_sel_for_scale_using_time - Fetch gain selector. 874 + * @gts: Gain time scale descriptor 875 + * @time_sel: Integration time selector corresponding to the time gain is 876 + * searched for 877 + * @scale_int: Integral part of the scale (typically val1) 878 + * @scale_nano: Fractional part of the scale (nano or ppb) 879 + * @gain_sel: Pointer to value where gain selector is stored. 880 + * 881 + * See iio_gts_find_gain_for_scale_using_time() for more information 882 + */ 883 + int iio_gts_find_gain_sel_for_scale_using_time(struct iio_gts *gts, int time_sel, 884 + int scale_int, int scale_nano, 885 + int *gain_sel) 886 + { 887 + int gain, ret; 888 + 889 + ret = iio_gts_find_gain_for_scale_using_time(gts, time_sel, scale_int, 890 + scale_nano, &gain); 891 + if (ret) 892 + return ret; 893 + 894 + ret = iio_gts_find_sel_by_gain(gts, gain); 895 + if (ret < 0) 896 + return ret; 897 + 898 + *gain_sel = ret; 899 + 900 + return 0; 901 + } 902 + EXPORT_SYMBOL_NS_GPL(iio_gts_find_gain_sel_for_scale_using_time, IIO_GTS_HELPER); 903 + 904 + static int iio_gts_get_total_gain(struct iio_gts *gts, int gain, int time) 905 + { 906 + const struct iio_itime_sel_mul *itime; 907 + 908 + if (!iio_gts_valid_gain(gts, gain)) 909 + return -EINVAL; 910 + 911 + if (!gts->num_itime) 912 + return gain; 913 + 914 + itime = iio_gts_find_itime_by_time(gts, time); 915 + if (!itime) 916 + return -EINVAL; 917 + 918 + return gain * itime->mul; 919 + } 920 + 921 + static int iio_gts_get_scale_linear(struct iio_gts *gts, int gain, int time, 922 + u64 *scale) 923 + { 924 + int total_gain; 925 + u64 tmp; 926 + 927 + total_gain = iio_gts_get_total_gain(gts, gain, time); 928 + if (total_gain < 0) 929 + return total_gain; 930 + 931 + tmp = gts->max_scale; 932 + 933 + do_div(tmp, total_gain); 934 + 935 + *scale = tmp; 936 + 937 + return 0; 938 + } 939 + 940 + /** 941 + * iio_gts_get_scale - get scale based on integration time and HW-gain 942 + * @gts: Gain time scale descriptor 943 + * @gain: HW-gain for which the scale is computed 944 + * @time: Integration time for which the scale is computed 945 + * @scale_int: Integral part of the scale (typically val1) 946 + * @scale_nano: Fractional part of the scale (nano or ppb) 947 + * 948 + * Compute scale matching the integration time and HW-gain given as parameter. 949 + * 950 + * Return: 0 on success. 951 + */ 952 + int iio_gts_get_scale(struct iio_gts *gts, int gain, int time, int *scale_int, 953 + int *scale_nano) 954 + { 955 + u64 lin_scale; 956 + int ret; 957 + 958 + ret = iio_gts_get_scale_linear(gts, gain, time, &lin_scale); 959 + if (ret) 960 + return ret; 961 + 962 + return iio_gts_delinearize(lin_scale, NANO, scale_int, scale_nano); 963 + } 964 + EXPORT_SYMBOL_NS_GPL(iio_gts_get_scale, IIO_GTS_HELPER); 965 + 966 + /** 967 + * iio_gts_find_new_gain_sel_by_old_gain_time - compensate for time change 968 + * @gts: Gain time scale descriptor 969 + * @old_gain: Previously set gain 970 + * @old_time_sel: Selector corresponding previously set time 971 + * @new_time_sel: Selector corresponding new time to be set 972 + * @new_gain: Pointer to value where new gain is to be written 973 + * 974 + * We may want to mitigate the scale change caused by setting a new integration 975 + * time (for a light sensor) by also updating the (HW)gain. This helper computes 976 + * new gain value to maintain the scale with new integration time. 977 + * 978 + * Return: 0 if an exactly matching supported new gain was found. When a 979 + * non-zero value is returned, the @new_gain will be set to a negative or 980 + * positive value. The negative value means that no gain could be computed. 981 + * Positive value will be the "best possible new gain there could be". There 982 + * can be two reasons why finding the "best possible" new gain is not deemed 983 + * successful. 1) This new value cannot be supported by the hardware. 2) The new 984 + * gain required to maintain the scale would not be an integer. In this case, 985 + * the "best possible" new gain will be a floored optimal gain, which may or 986 + * may not be supported by the hardware. 987 + */ 988 + int iio_gts_find_new_gain_sel_by_old_gain_time(struct iio_gts *gts, 989 + int old_gain, int old_time_sel, 990 + int new_time_sel, int *new_gain) 991 + { 992 + const struct iio_itime_sel_mul *itime_old, *itime_new; 993 + u64 scale; 994 + int ret; 995 + 996 + *new_gain = -1; 997 + 998 + itime_old = iio_gts_find_itime_by_sel(gts, old_time_sel); 999 + if (!itime_old) 1000 + return -EINVAL; 1001 + 1002 + itime_new = iio_gts_find_itime_by_sel(gts, new_time_sel); 1003 + if (!itime_new) 1004 + return -EINVAL; 1005 + 1006 + ret = iio_gts_get_scale_linear(gts, old_gain, itime_old->time_us, 1007 + &scale); 1008 + if (ret) 1009 + return ret; 1010 + 1011 + ret = gain_get_scale_fraction(gts->max_scale, scale, itime_new->mul, 1012 + new_gain); 1013 + if (ret) 1014 + return ret; 1015 + 1016 + if (!iio_gts_valid_gain(gts, *new_gain)) 1017 + return -EINVAL; 1018 + 1019 + return 0; 1020 + } 1021 + EXPORT_SYMBOL_NS_GPL(iio_gts_find_new_gain_sel_by_old_gain_time, IIO_GTS_HELPER); 1022 + 1023 + /** 1024 + * iio_gts_find_new_gain_by_old_gain_time - compensate for time change 1025 + * @gts: Gain time scale descriptor 1026 + * @old_gain: Previously set gain 1027 + * @old_time: Selector corresponding previously set time 1028 + * @new_time: Selector corresponding new time to be set 1029 + * @new_gain: Pointer to value where new gain is to be written 1030 + * 1031 + * We may want to mitigate the scale change caused by setting a new integration 1032 + * time (for a light sensor) by also updating the (HW)gain. This helper computes 1033 + * new gain value to maintain the scale with new integration time. 1034 + * 1035 + * Return: 0 if an exactly matching supported new gain was found. When a 1036 + * non-zero value is returned, the @new_gain will be set to a negative or 1037 + * positive value. The negative value means that no gain could be computed. 1038 + * Positive value will be the "best possible new gain there could be". There 1039 + * can be two reasons why finding the "best possible" new gain is not deemed 1040 + * successful. 1) This new value cannot be supported by the hardware. 2) The new 1041 + * gain required to maintain the scale would not be an integer. In this case, 1042 + * the "best possible" new gain will be a floored optimal gain, which may or 1043 + * may not be supported by the hardware. 1044 + */ 1045 + int iio_gts_find_new_gain_by_old_gain_time(struct iio_gts *gts, int old_gain, 1046 + int old_time, int new_time, 1047 + int *new_gain) 1048 + { 1049 + const struct iio_itime_sel_mul *itime_new; 1050 + u64 scale; 1051 + int ret; 1052 + 1053 + *new_gain = -1; 1054 + 1055 + itime_new = iio_gts_find_itime_by_time(gts, new_time); 1056 + if (!itime_new) 1057 + return -EINVAL; 1058 + 1059 + ret = iio_gts_get_scale_linear(gts, old_gain, old_time, &scale); 1060 + if (ret) 1061 + return ret; 1062 + 1063 + ret = gain_get_scale_fraction(gts->max_scale, scale, itime_new->mul, 1064 + new_gain); 1065 + if (ret) 1066 + return ret; 1067 + 1068 + if (!iio_gts_valid_gain(gts, *new_gain)) 1069 + return -EINVAL; 1070 + 1071 + return 0; 1072 + } 1073 + EXPORT_SYMBOL_NS_GPL(iio_gts_find_new_gain_by_old_gain_time, IIO_GTS_HELPER); 1074 + 1075 + MODULE_LICENSE("GPL"); 1076 + MODULE_AUTHOR("Matti Vaittinen <mazziesaccount@gmail.com>"); 1077 + MODULE_DESCRIPTION("IIO light sensor gain-time-scale helpers");
+15 -2
drivers/iio/industrialio-trigger.c
··· 192 192 schedule_work(&trig->reenable_work); 193 193 } 194 194 195 + /** 196 + * iio_trigger_poll() - Call the IRQ trigger handler of the consumers 197 + * @trig: trigger which occurred 198 + * 199 + * This function should only be called from a hard IRQ context. 200 + */ 195 201 void iio_trigger_poll(struct iio_trigger *trig) 196 202 { 197 203 int i; ··· 222 216 } 223 217 EXPORT_SYMBOL(iio_trigger_generic_data_rdy_poll); 224 218 225 - void iio_trigger_poll_chained(struct iio_trigger *trig) 219 + /** 220 + * iio_trigger_poll_nested() - Call the threaded trigger handler of the 221 + * consumers 222 + * @trig: trigger which occurred 223 + * 224 + * This function should only be called from a kernel thread context. 225 + */ 226 + void iio_trigger_poll_nested(struct iio_trigger *trig) 226 227 { 227 228 int i; 228 229 ··· 244 231 } 245 232 } 246 233 } 247 - EXPORT_SYMBOL(iio_trigger_poll_chained); 234 + EXPORT_SYMBOL(iio_trigger_poll_nested); 248 235 249 236 void iio_trigger_notify_done(struct iio_trigger *trig) 250 237 {
+14
drivers/iio/light/Kconfig
··· 289 289 To compile this driver as a module, choose M here: 290 290 the module will be called jsa1212. 291 291 292 + config ROHM_BU27034 293 + tristate "ROHM BU27034 ambient light sensor" 294 + depends on I2C 295 + select REGMAP_I2C 296 + select IIO_GTS_HELPER 297 + select IIO_BUFFER 298 + select IIO_KFIFO_BUF 299 + help 300 + Enable support for the ROHM BU27034 ambient light sensor. ROHM BU27034 301 + is an ambient light sesnor with 3 channels and 3 photo diodes capable 302 + of detecting a very wide range of illuminance. 303 + Typical application is adjusting LCD and backlight power of TVs and 304 + mobile phones. 305 + 292 306 config RPR0521 293 307 tristate "ROHM RPR0521 ALS and proximity sensor driver" 294 308 depends on I2C
+1
drivers/iio/light/Makefile
··· 38 38 obj-$(CONFIG_NOA1305) += noa1305.o 39 39 obj-$(CONFIG_OPT3001) += opt3001.o 40 40 obj-$(CONFIG_PA12203001) += pa12203001.o 41 + obj-$(CONFIG_ROHM_BU27034) += rohm-bu27034.o 41 42 obj-$(CONFIG_RPR0521) += rpr0521.o 42 43 obj-$(CONFIG_SI1133) += si1133.o 43 44 obj-$(CONFIG_SI1145) += si1145.o
+1 -1
drivers/iio/light/acpi-als.c
··· 108 108 if (iio_buffer_enabled(indio_dev) && iio_trigger_using_own(indio_dev)) { 109 109 switch (event) { 110 110 case ACPI_ALS_NOTIFY_ILLUMINANCE: 111 - iio_trigger_poll_chained(als->trig); 111 + iio_trigger_poll_nested(als->trig); 112 112 break; 113 113 default: 114 114 /* Unhandled event */
+7 -6
drivers/iio/light/max44009.c
··· 527 527 return devm_iio_device_register(&client->dev, indio_dev); 528 528 } 529 529 530 + static const struct of_device_id max44009_of_match[] = { 531 + { .compatible = "maxim,max44009" }, 532 + { } 533 + }; 534 + MODULE_DEVICE_TABLE(of, max44009_of_match); 535 + 530 536 static const struct i2c_device_id max44009_id[] = { 531 537 { "max44009", 0 }, 532 538 { } ··· 542 536 static struct i2c_driver max44009_driver = { 543 537 .driver = { 544 538 .name = MAX44009_DRV_NAME, 539 + .of_match_table = max44009_of_match, 545 540 }, 546 541 .probe_new = max44009_probe, 547 542 .id_table = max44009_id, 548 543 }; 549 544 module_i2c_driver(max44009_driver); 550 - 551 - static const struct of_device_id max44009_of_match[] = { 552 - { .compatible = "maxim,max44009" }, 553 - { } 554 - }; 555 - MODULE_DEVICE_TABLE(of, max44009_of_match); 556 545 557 546 MODULE_AUTHOR("Robert Eshleman <bobbyeshleman@gmail.com>"); 558 547 MODULE_LICENSE("GPL v2");
+1497
drivers/iio/light/rohm-bu27034.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + /* 3 + * BU27034 ROHM Ambient Light Sensor 4 + * 5 + * Copyright (c) 2023, ROHM Semiconductor. 6 + * https://fscdn.rohm.com/en/products/databook/datasheet/ic/sensor/light/bu27034nuc-e.pdf 7 + */ 8 + 9 + #include <linux/bitfield.h> 10 + #include <linux/bits.h> 11 + #include <linux/device.h> 12 + #include <linux/i2c.h> 13 + #include <linux/module.h> 14 + #include <linux/property.h> 15 + #include <linux/regmap.h> 16 + #include <linux/regulator/consumer.h> 17 + #include <linux/units.h> 18 + 19 + #include <linux/iio/buffer.h> 20 + #include <linux/iio/iio.h> 21 + #include <linux/iio/iio-gts-helper.h> 22 + #include <linux/iio/kfifo_buf.h> 23 + 24 + #define BU27034_REG_SYSTEM_CONTROL 0x40 25 + #define BU27034_MASK_SW_RESET BIT(7) 26 + #define BU27034_MASK_PART_ID GENMASK(5, 0) 27 + #define BU27034_ID 0x19 28 + #define BU27034_REG_MODE_CONTROL1 0x41 29 + #define BU27034_MASK_MEAS_MODE GENMASK(2, 0) 30 + 31 + #define BU27034_REG_MODE_CONTROL2 0x42 32 + #define BU27034_MASK_D01_GAIN GENMASK(7, 3) 33 + #define BU27034_MASK_D2_GAIN_HI GENMASK(7, 6) 34 + #define BU27034_MASK_D2_GAIN_LO GENMASK(2, 0) 35 + 36 + #define BU27034_REG_MODE_CONTROL3 0x43 37 + #define BU27034_REG_MODE_CONTROL4 0x44 38 + #define BU27034_MASK_MEAS_EN BIT(0) 39 + #define BU27034_MASK_VALID BIT(7) 40 + #define BU27034_REG_DATA0_LO 0x50 41 + #define BU27034_REG_DATA1_LO 0x52 42 + #define BU27034_REG_DATA2_LO 0x54 43 + #define BU27034_REG_DATA2_HI 0x55 44 + #define BU27034_REG_MANUFACTURER_ID 0x92 45 + #define BU27034_REG_MAX BU27034_REG_MANUFACTURER_ID 46 + 47 + /* 48 + * The BU27034 does not have interrupt to trigger the data read when a 49 + * measurement has finished. Hence we poll the VALID bit in a thread. We will 50 + * try to wake the thread BU27034_MEAS_WAIT_PREMATURE_MS milliseconds before 51 + * the expected sampling time to prevent the drifting. 52 + * 53 + * If we constantly wake up a bit too late we would eventually skip a sample. 54 + * And because the sleep can't wake up _exactly_ at given time this would be 55 + * inevitable even if the sensor clock would be perfectly phase-locked to CPU 56 + * clock - which we can't say is the case. 57 + * 58 + * This is still fragile. No matter how big advance do we have, we will still 59 + * risk of losing a sample because things can in a rainy-day scenario be 60 + * delayed a lot. Yet, more we reserve the time for polling, more we also lose 61 + * the performance by spending cycles polling the register. So, selecting this 62 + * value is a balancing dance between severity of wasting CPU time and severity 63 + * of losing samples. 64 + * 65 + * In most cases losing the samples is not _that_ crucial because light levels 66 + * tend to change slowly. 67 + * 68 + * Other option that was pointed to me would be always sleeping 1/2 of the 69 + * measurement time, checking the VALID bit and just sleeping again if the bit 70 + * was not set. That should be pretty tolerant against missing samples due to 71 + * the scheduling delays while also not wasting much of cycles for polling. 72 + * Downside is that the time-stamps would be very inaccurate as the wake-up 73 + * would not really be tied to the sensor toggling the valid bit. This would also 74 + * result 'jumps' in the time-stamps when the delay drifted so that wake-up was 75 + * performed during the consecutive wake-ups (Or, when sensor and CPU clocks 76 + * were very different and scheduling the wake-ups was very close to given 77 + * timeout - and when the time-outs were very close to the actual sensor 78 + * sampling, Eg. once in a blue moon, two consecutive time-outs would occur 79 + * without having a sample ready). 80 + */ 81 + #define BU27034_MEAS_WAIT_PREMATURE_MS 5 82 + #define BU27034_DATA_WAIT_TIME_US 1000 83 + #define BU27034_TOTAL_DATA_WAIT_TIME_US (BU27034_MEAS_WAIT_PREMATURE_MS * 1000) 84 + 85 + #define BU27034_RETRY_LIMIT 18 86 + 87 + enum { 88 + BU27034_CHAN_ALS, 89 + BU27034_CHAN_DATA0, 90 + BU27034_CHAN_DATA1, 91 + BU27034_CHAN_DATA2, 92 + BU27034_NUM_CHANS 93 + }; 94 + 95 + static const unsigned long bu27034_scan_masks[] = { 96 + GENMASK(BU27034_CHAN_DATA2, BU27034_CHAN_ALS), 0 97 + }; 98 + 99 + /* 100 + * Available scales with gain 1x - 4096x, timings 55, 100, 200, 400 mS 101 + * Time impacts to gain: 1x, 2x, 4x, 8x. 102 + * 103 + * => Max total gain is HWGAIN * gain by integration time (8 * 4096) = 32768 104 + * 105 + * Using NANO precision for scale we must use scale 64x corresponding gain 1x 106 + * to avoid precision loss. (32x would result scale 976 562.5(nanos). 107 + */ 108 + #define BU27034_SCALE_1X 64 109 + 110 + /* See the data sheet for the "Gain Setting" table */ 111 + #define BU27034_GSEL_1X 0x00 /* 00000 */ 112 + #define BU27034_GSEL_4X 0x08 /* 01000 */ 113 + #define BU27034_GSEL_16X 0x0a /* 01010 */ 114 + #define BU27034_GSEL_32X 0x0b /* 01011 */ 115 + #define BU27034_GSEL_64X 0x0c /* 01100 */ 116 + #define BU27034_GSEL_256X 0x18 /* 11000 */ 117 + #define BU27034_GSEL_512X 0x19 /* 11001 */ 118 + #define BU27034_GSEL_1024X 0x1a /* 11010 */ 119 + #define BU27034_GSEL_2048X 0x1b /* 11011 */ 120 + #define BU27034_GSEL_4096X 0x1c /* 11100 */ 121 + 122 + /* Available gain settings */ 123 + static const struct iio_gain_sel_pair bu27034_gains[] = { 124 + GAIN_SCALE_GAIN(1, BU27034_GSEL_1X), 125 + GAIN_SCALE_GAIN(4, BU27034_GSEL_4X), 126 + GAIN_SCALE_GAIN(16, BU27034_GSEL_16X), 127 + GAIN_SCALE_GAIN(32, BU27034_GSEL_32X), 128 + GAIN_SCALE_GAIN(64, BU27034_GSEL_64X), 129 + GAIN_SCALE_GAIN(256, BU27034_GSEL_256X), 130 + GAIN_SCALE_GAIN(512, BU27034_GSEL_512X), 131 + GAIN_SCALE_GAIN(1024, BU27034_GSEL_1024X), 132 + GAIN_SCALE_GAIN(2048, BU27034_GSEL_2048X), 133 + GAIN_SCALE_GAIN(4096, BU27034_GSEL_4096X), 134 + }; 135 + 136 + /* 137 + * The IC has 5 modes for sampling time. 5 mS mode is exceptional as it limits 138 + * the data collection to data0-channel only and cuts the supported range to 139 + * 10 bit. It is not supported by the driver. 140 + * 141 + * "normal" modes are 55, 100, 200 and 400 mS modes - which do have direct 142 + * multiplying impact to the register values (similar to gain). 143 + * 144 + * This means that if meas-mode is changed for example from 400 => 200, 145 + * the scale is doubled. Eg, time impact to total gain is x1, x2, x4, x8. 146 + */ 147 + #define BU27034_MEAS_MODE_100MS 0 148 + #define BU27034_MEAS_MODE_55MS 1 149 + #define BU27034_MEAS_MODE_200MS 2 150 + #define BU27034_MEAS_MODE_400MS 4 151 + 152 + static const struct iio_itime_sel_mul bu27034_itimes[] = { 153 + GAIN_SCALE_ITIME_US(400000, BU27034_MEAS_MODE_400MS, 8), 154 + GAIN_SCALE_ITIME_US(200000, BU27034_MEAS_MODE_200MS, 4), 155 + GAIN_SCALE_ITIME_US(100000, BU27034_MEAS_MODE_100MS, 2), 156 + GAIN_SCALE_ITIME_US(55000, BU27034_MEAS_MODE_55MS, 1), 157 + }; 158 + 159 + #define BU27034_CHAN_DATA(_name, _ch2) \ 160 + { \ 161 + .type = IIO_INTENSITY, \ 162 + .channel = BU27034_CHAN_##_name, \ 163 + .channel2 = (_ch2), \ 164 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 165 + BIT(IIO_CHAN_INFO_SCALE), \ 166 + .info_mask_separate_available = BIT(IIO_CHAN_INFO_SCALE), \ 167 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME), \ 168 + .info_mask_shared_by_all_available = \ 169 + BIT(IIO_CHAN_INFO_INT_TIME), \ 170 + .address = BU27034_REG_##_name##_LO, \ 171 + .scan_index = BU27034_CHAN_##_name, \ 172 + .scan_type = { \ 173 + .sign = 'u', \ 174 + .realbits = 16, \ 175 + .storagebits = 16, \ 176 + .endianness = IIO_LE, \ 177 + }, \ 178 + .indexed = 1, \ 179 + } 180 + 181 + static const struct iio_chan_spec bu27034_channels[] = { 182 + { 183 + .type = IIO_LIGHT, 184 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 185 + BIT(IIO_CHAN_INFO_SCALE), 186 + .channel = BU27034_CHAN_ALS, 187 + .scan_index = BU27034_CHAN_ALS, 188 + .scan_type = { 189 + .sign = 'u', 190 + .realbits = 32, 191 + .storagebits = 32, 192 + .endianness = IIO_CPU, 193 + }, 194 + }, 195 + /* 196 + * The BU27034 DATA0 and DATA1 channels are both on the visible light 197 + * area (mostly). The data0 sensitivity peaks at 500nm, DATA1 at 600nm. 198 + * These wave lengths are pretty much on the border of colours making 199 + * these a poor candidates for R/G/B standardization. Hence they're both 200 + * marked as clear channels 201 + */ 202 + BU27034_CHAN_DATA(DATA0, IIO_MOD_LIGHT_CLEAR), 203 + BU27034_CHAN_DATA(DATA1, IIO_MOD_LIGHT_CLEAR), 204 + BU27034_CHAN_DATA(DATA2, IIO_MOD_LIGHT_IR), 205 + IIO_CHAN_SOFT_TIMESTAMP(4), 206 + }; 207 + 208 + struct bu27034_data { 209 + struct regmap *regmap; 210 + struct device *dev; 211 + /* 212 + * Protect gain and time during scale adjustment and data reading. 213 + * Protect measurement enabling/disabling. 214 + */ 215 + struct mutex mutex; 216 + struct iio_gts gts; 217 + struct task_struct *task; 218 + __le16 raw[3]; 219 + struct { 220 + u32 mlux; 221 + __le16 channels[3]; 222 + s64 ts __aligned(8); 223 + } scan; 224 + }; 225 + 226 + struct bu27034_result { 227 + u16 ch0; 228 + u16 ch1; 229 + u16 ch2; 230 + }; 231 + 232 + static const struct regmap_range bu27034_volatile_ranges[] = { 233 + { 234 + .range_min = BU27034_REG_MODE_CONTROL4, 235 + .range_max = BU27034_REG_MODE_CONTROL4, 236 + }, { 237 + .range_min = BU27034_REG_DATA0_LO, 238 + .range_max = BU27034_REG_DATA2_HI, 239 + }, 240 + }; 241 + 242 + static const struct regmap_access_table bu27034_volatile_regs = { 243 + .yes_ranges = &bu27034_volatile_ranges[0], 244 + .n_yes_ranges = ARRAY_SIZE(bu27034_volatile_ranges), 245 + }; 246 + 247 + static const struct regmap_range bu27034_read_only_ranges[] = { 248 + { 249 + .range_min = BU27034_REG_DATA0_LO, 250 + .range_max = BU27034_REG_DATA2_HI, 251 + }, { 252 + .range_min = BU27034_REG_MANUFACTURER_ID, 253 + .range_max = BU27034_REG_MANUFACTURER_ID, 254 + } 255 + }; 256 + 257 + static const struct regmap_access_table bu27034_ro_regs = { 258 + .no_ranges = &bu27034_read_only_ranges[0], 259 + .n_no_ranges = ARRAY_SIZE(bu27034_read_only_ranges), 260 + }; 261 + 262 + static const struct regmap_config bu27034_regmap = { 263 + .reg_bits = 8, 264 + .val_bits = 8, 265 + .max_register = BU27034_REG_MAX, 266 + .cache_type = REGCACHE_RBTREE, 267 + .volatile_table = &bu27034_volatile_regs, 268 + .wr_table = &bu27034_ro_regs, 269 + }; 270 + 271 + struct bu27034_gain_check { 272 + int old_gain; 273 + int new_gain; 274 + int chan; 275 + }; 276 + 277 + static int bu27034_get_gain_sel(struct bu27034_data *data, int chan) 278 + { 279 + int ret, val; 280 + 281 + switch (chan) { 282 + case BU27034_CHAN_DATA0: 283 + case BU27034_CHAN_DATA1: 284 + { 285 + int reg[] = { 286 + [BU27034_CHAN_DATA0] = BU27034_REG_MODE_CONTROL2, 287 + [BU27034_CHAN_DATA1] = BU27034_REG_MODE_CONTROL3, 288 + }; 289 + ret = regmap_read(data->regmap, reg[chan], &val); 290 + if (ret) 291 + return ret; 292 + 293 + return FIELD_GET(BU27034_MASK_D01_GAIN, val); 294 + } 295 + case BU27034_CHAN_DATA2: 296 + { 297 + int d2_lo_bits = fls(BU27034_MASK_D2_GAIN_LO); 298 + 299 + ret = regmap_read(data->regmap, BU27034_REG_MODE_CONTROL2, &val); 300 + if (ret) 301 + return ret; 302 + 303 + /* 304 + * The data2 channel gain is composed by 5 non continuous bits 305 + * [7:6], [2:0]. Thus when we combine the 5-bit 'selector' 306 + * from register value we must right shift the high bits by 3. 307 + */ 308 + return FIELD_GET(BU27034_MASK_D2_GAIN_HI, val) << d2_lo_bits | 309 + FIELD_GET(BU27034_MASK_D2_GAIN_LO, val); 310 + } 311 + default: 312 + return -EINVAL; 313 + } 314 + } 315 + 316 + static int bu27034_get_gain(struct bu27034_data *data, int chan, int *gain) 317 + { 318 + int ret, sel; 319 + 320 + ret = bu27034_get_gain_sel(data, chan); 321 + if (ret < 0) 322 + return ret; 323 + 324 + sel = ret; 325 + 326 + ret = iio_gts_find_gain_by_sel(&data->gts, sel); 327 + if (ret < 0) { 328 + dev_err(data->dev, "chan %u: unknown gain value 0x%x\n", chan, 329 + sel); 330 + 331 + return ret; 332 + } 333 + 334 + *gain = ret; 335 + 336 + return 0; 337 + } 338 + 339 + static int bu27034_get_int_time(struct bu27034_data *data) 340 + { 341 + int ret, sel; 342 + 343 + ret = regmap_read(data->regmap, BU27034_REG_MODE_CONTROL1, &sel); 344 + if (ret) 345 + return ret; 346 + 347 + return iio_gts_find_int_time_by_sel(&data->gts, 348 + sel & BU27034_MASK_MEAS_MODE); 349 + } 350 + 351 + static int _bu27034_get_scale(struct bu27034_data *data, int channel, int *val, 352 + int *val2) 353 + { 354 + int gain, ret; 355 + 356 + ret = bu27034_get_gain(data, channel, &gain); 357 + if (ret) 358 + return ret; 359 + 360 + ret = bu27034_get_int_time(data); 361 + if (ret < 0) 362 + return ret; 363 + 364 + return iio_gts_get_scale(&data->gts, gain, ret, val, val2); 365 + } 366 + 367 + static int bu27034_get_scale(struct bu27034_data *data, int channel, int *val, 368 + int *val2) 369 + { 370 + int ret; 371 + 372 + if (channel == BU27034_CHAN_ALS) { 373 + *val = 0; 374 + *val2 = 1000; 375 + return IIO_VAL_INT_PLUS_MICRO; 376 + } 377 + 378 + mutex_lock(&data->mutex); 379 + ret = _bu27034_get_scale(data, channel, val, val2); 380 + mutex_unlock(&data->mutex); 381 + if (ret) 382 + return ret; 383 + 384 + return IIO_VAL_INT_PLUS_NANO; 385 + } 386 + 387 + /* Caller should hold the lock to protect lux reading */ 388 + static int bu27034_write_gain_sel(struct bu27034_data *data, int chan, int sel) 389 + { 390 + static const int reg[] = { 391 + [BU27034_CHAN_DATA0] = BU27034_REG_MODE_CONTROL2, 392 + [BU27034_CHAN_DATA1] = BU27034_REG_MODE_CONTROL3, 393 + }; 394 + int mask, val; 395 + 396 + if (chan != BU27034_CHAN_DATA0 && chan != BU27034_CHAN_DATA1) 397 + return -EINVAL; 398 + 399 + val = FIELD_PREP(BU27034_MASK_D01_GAIN, sel); 400 + 401 + mask = BU27034_MASK_D01_GAIN; 402 + 403 + if (chan == BU27034_CHAN_DATA0) { 404 + /* 405 + * We keep the same gain for channel 2 as we set for channel 0 406 + * We can't allow them to be individually controlled because 407 + * setting one will impact also the other. Also, if we don't 408 + * always update both gains we may result unsupported bit 409 + * combinations. 410 + * 411 + * This is not nice but this is yet another place where the 412 + * user space must be prepared to surprizes. Namely, see chan 2 413 + * gain changed when chan 0 gain is changed. 414 + * 415 + * This is not fatal for most users though. I don't expect the 416 + * channel 2 to be used in any generic cases - the intensity 417 + * values provided by the sensor for IR area are not openly 418 + * documented. Also, channel 2 is not used for visible light. 419 + * 420 + * So, if there is application which is written to utilize the 421 + * channel 2 - then it is probably specifically targeted to this 422 + * sensor and knows how to utilize those values. It is safe to 423 + * hope such user can also cope with the gain changes. 424 + */ 425 + mask |= BU27034_MASK_D2_GAIN_LO; 426 + 427 + /* 428 + * The D2 gain bits are directly the lowest bits of selector. 429 + * Just do add those bits to the value 430 + */ 431 + val |= sel & BU27034_MASK_D2_GAIN_LO; 432 + } 433 + 434 + return regmap_update_bits(data->regmap, reg[chan], mask, val); 435 + } 436 + 437 + static int bu27034_set_gain(struct bu27034_data *data, int chan, int gain) 438 + { 439 + int ret; 440 + 441 + /* 442 + * We don't allow setting channel 2 gain as it messes up the 443 + * gain for channel 0 - which shares the high bits 444 + */ 445 + if (chan != BU27034_CHAN_DATA0 && chan != BU27034_CHAN_DATA1) 446 + return -EINVAL; 447 + 448 + ret = iio_gts_find_sel_by_gain(&data->gts, gain); 449 + if (ret < 0) 450 + return ret; 451 + 452 + return bu27034_write_gain_sel(data, chan, ret); 453 + } 454 + 455 + /* Caller should hold the lock to protect data->int_time */ 456 + static int bu27034_set_int_time(struct bu27034_data *data, int time) 457 + { 458 + int ret; 459 + 460 + ret = iio_gts_find_sel_by_int_time(&data->gts, time); 461 + if (ret < 0) 462 + return ret; 463 + 464 + return regmap_update_bits(data->regmap, BU27034_REG_MODE_CONTROL1, 465 + BU27034_MASK_MEAS_MODE, ret); 466 + } 467 + 468 + /* 469 + * We try to change the time in such way that the scale is maintained for 470 + * given channels by adjusting gain so that it compensates the time change. 471 + */ 472 + static int bu27034_try_set_int_time(struct bu27034_data *data, int time_us) 473 + { 474 + struct bu27034_gain_check gains[] = { 475 + { .chan = BU27034_CHAN_DATA0 }, 476 + { .chan = BU27034_CHAN_DATA1 }, 477 + }; 478 + int numg = ARRAY_SIZE(gains); 479 + int ret, int_time_old, i; 480 + 481 + mutex_lock(&data->mutex); 482 + ret = bu27034_get_int_time(data); 483 + if (ret < 0) 484 + goto unlock_out; 485 + 486 + int_time_old = ret; 487 + 488 + if (!iio_gts_valid_time(&data->gts, time_us)) { 489 + dev_err(data->dev, "Unsupported integration time %u\n", 490 + time_us); 491 + ret = -EINVAL; 492 + 493 + goto unlock_out; 494 + } 495 + 496 + if (time_us == int_time_old) { 497 + ret = 0; 498 + goto unlock_out; 499 + } 500 + 501 + for (i = 0; i < numg; i++) { 502 + ret = bu27034_get_gain(data, gains[i].chan, &gains[i].old_gain); 503 + if (ret) 504 + goto unlock_out; 505 + 506 + ret = iio_gts_find_new_gain_by_old_gain_time(&data->gts, 507 + gains[i].old_gain, 508 + int_time_old, time_us, 509 + &gains[i].new_gain); 510 + if (ret) { 511 + int scale1, scale2; 512 + bool ok; 513 + 514 + _bu27034_get_scale(data, gains[i].chan, &scale1, &scale2); 515 + dev_dbg(data->dev, 516 + "chan %u, can't support time %u with scale %u %u\n", 517 + gains[i].chan, time_us, scale1, scale2); 518 + 519 + if (gains[i].new_gain < 0) 520 + goto unlock_out; 521 + 522 + /* 523 + * If caller requests for integration time change and we 524 + * can't support the scale - then the caller should be 525 + * prepared to 'pick up the pieces and deal with the 526 + * fact that the scale changed'. 527 + */ 528 + ret = iio_find_closest_gain_low(&data->gts, 529 + gains[i].new_gain, &ok); 530 + 531 + if (!ok) 532 + dev_dbg(data->dev, 533 + "optimal gain out of range for chan %u\n", 534 + gains[i].chan); 535 + 536 + if (ret < 0) { 537 + dev_dbg(data->dev, 538 + "Total gain increase. Risk of saturation"); 539 + ret = iio_gts_get_min_gain(&data->gts); 540 + if (ret < 0) 541 + goto unlock_out; 542 + } 543 + dev_dbg(data->dev, "chan %u scale changed\n", 544 + gains[i].chan); 545 + gains[i].new_gain = ret; 546 + dev_dbg(data->dev, "chan %u new gain %u\n", 547 + gains[i].chan, gains[i].new_gain); 548 + } 549 + } 550 + 551 + for (i = 0; i < numg; i++) { 552 + ret = bu27034_set_gain(data, gains[i].chan, gains[i].new_gain); 553 + if (ret) 554 + goto unlock_out; 555 + } 556 + 557 + ret = bu27034_set_int_time(data, time_us); 558 + 559 + unlock_out: 560 + mutex_unlock(&data->mutex); 561 + 562 + return ret; 563 + } 564 + 565 + static int bu27034_set_scale(struct bu27034_data *data, int chan, 566 + int val, int val2) 567 + { 568 + int ret, time_sel, gain_sel, i; 569 + bool found = false; 570 + 571 + if (chan == BU27034_CHAN_DATA2) 572 + return -EINVAL; 573 + 574 + if (chan == BU27034_CHAN_ALS) { 575 + if (val == 0 && val2 == 1000) 576 + return 0; 577 + 578 + return -EINVAL; 579 + } 580 + 581 + mutex_lock(&data->mutex); 582 + ret = regmap_read(data->regmap, BU27034_REG_MODE_CONTROL1, &time_sel); 583 + if (ret) 584 + goto unlock_out; 585 + 586 + ret = iio_gts_find_gain_sel_for_scale_using_time(&data->gts, time_sel, 587 + val, val2 * 1000, &gain_sel); 588 + if (ret) { 589 + /* 590 + * Could not support scale with given time. Need to change time. 591 + * We still want to maintain the scale for all channels 592 + */ 593 + struct bu27034_gain_check gain; 594 + int new_time_sel; 595 + 596 + /* 597 + * Populate information for the other channel which should also 598 + * maintain the scale. (Due to the HW limitations the chan2 599 + * gets the same gain as chan0, so we only need to explicitly 600 + * set the chan 0 and 1). 601 + */ 602 + if (chan == BU27034_CHAN_DATA0) 603 + gain.chan = BU27034_CHAN_DATA1; 604 + else if (chan == BU27034_CHAN_DATA1) 605 + gain.chan = BU27034_CHAN_DATA0; 606 + 607 + ret = bu27034_get_gain(data, gain.chan, &gain.old_gain); 608 + if (ret) 609 + goto unlock_out; 610 + 611 + /* 612 + * Iterate through all the times to see if we find one which 613 + * can support requested scale for requested channel, while 614 + * maintaining the scale for other channels 615 + */ 616 + for (i = 0; i < data->gts.num_itime; i++) { 617 + new_time_sel = data->gts.itime_table[i].sel; 618 + 619 + if (new_time_sel == time_sel) 620 + continue; 621 + 622 + /* Can we provide requested scale with this time? */ 623 + ret = iio_gts_find_gain_sel_for_scale_using_time( 624 + &data->gts, new_time_sel, val, val2 * 1000, 625 + &gain_sel); 626 + if (ret) 627 + continue; 628 + 629 + /* Can the other channel(s) maintain scale? */ 630 + ret = iio_gts_find_new_gain_sel_by_old_gain_time( 631 + &data->gts, gain.old_gain, time_sel, 632 + new_time_sel, &gain.new_gain); 633 + if (!ret) { 634 + /* Yes - we found suitable time */ 635 + found = true; 636 + break; 637 + } 638 + } 639 + if (!found) { 640 + dev_dbg(data->dev, 641 + "Can't set scale maintaining other channels\n"); 642 + ret = -EINVAL; 643 + 644 + goto unlock_out; 645 + } 646 + 647 + ret = bu27034_set_gain(data, gain.chan, gain.new_gain); 648 + if (ret) 649 + goto unlock_out; 650 + 651 + ret = regmap_update_bits(data->regmap, BU27034_REG_MODE_CONTROL1, 652 + BU27034_MASK_MEAS_MODE, new_time_sel); 653 + if (ret) 654 + goto unlock_out; 655 + } 656 + 657 + ret = bu27034_write_gain_sel(data, chan, gain_sel); 658 + unlock_out: 659 + mutex_unlock(&data->mutex); 660 + 661 + return ret; 662 + } 663 + 664 + /* 665 + * for (D1/D0 < 0.87): 666 + * lx = 0.004521097 * D1 - 0.002663996 * D0 + 667 + * 0.00012213 * D1 * D1 / D0 668 + * 669 + * => 115.7400832 * ch1 / gain1 / mt - 670 + * 68.1982976 * ch0 / gain0 / mt + 671 + * 0.00012213 * 25600 * (ch1 / gain1 / mt) * 25600 * 672 + * (ch1 /gain1 / mt) / (25600 * ch0 / gain0 / mt) 673 + * 674 + * A = 0.00012213 * 25600 * (ch1 /gain1 / mt) * 25600 * 675 + * (ch1 /gain1 / mt) / (25600 * ch0 / gain0 / mt) 676 + * => 0.00012213 * 25600 * (ch1 /gain1 / mt) * 677 + * (ch1 /gain1 / mt) / (ch0 / gain0 / mt) 678 + * => 0.00012213 * 25600 * (ch1 / gain1) * (ch1 /gain1 / mt) / 679 + * (ch0 / gain0) 680 + * => 0.00012213 * 25600 * (ch1 / gain1) * (ch1 /gain1 / mt) * 681 + * gain0 / ch0 682 + * => 3.126528 * ch1 * ch1 * gain0 / gain1 / gain1 / mt /ch0 683 + * 684 + * lx = (115.7400832 * ch1 / gain1 - 68.1982976 * ch0 / gain0) / 685 + * mt + A 686 + * => (115.7400832 * ch1 / gain1 - 68.1982976 * ch0 / gain0) / 687 + * mt + 3.126528 * ch1 * ch1 * gain0 / gain1 / gain1 / mt / 688 + * ch0 689 + * 690 + * => (115.7400832 * ch1 / gain1 - 68.1982976 * ch0 / gain0 + 691 + * 3.126528 * ch1 * ch1 * gain0 / gain1 / gain1 / ch0) / 692 + * mt 693 + * 694 + * For (0.87 <= D1/D0 < 1.00) 695 + * lx = (0.001331* D0 + 0.0000354 * D1) * ((D1/D0 – 0.87) * (0.385) + 1) 696 + * => (0.001331 * 256 * 100 * ch0 / gain0 / mt + 0.0000354 * 256 * 697 + * 100 * ch1 / gain1 / mt) * ((D1/D0 - 0.87) * (0.385) + 1) 698 + * => (34.0736 * ch0 / gain0 / mt + 0.90624 * ch1 / gain1 / mt) * 699 + * ((D1/D0 - 0.87) * (0.385) + 1) 700 + * => (34.0736 * ch0 / gain0 / mt + 0.90624 * ch1 / gain1 / mt) * 701 + * (0.385 * D1/D0 - 0.66505) 702 + * => (34.0736 * ch0 / gain0 / mt + 0.90624 * ch1 / gain1 / mt) * 703 + * (0.385 * 256 * 100 * ch1 / gain1 / mt / (256 * 100 * ch0 / gain0 / mt) - 0.66505) 704 + * => (34.0736 * ch0 / gain0 / mt + 0.90624 * ch1 / gain1 / mt) * 705 + * (9856 * ch1 / gain1 / mt / (25600 * ch0 / gain0 / mt) + 0.66505) 706 + * => 13.118336 * ch1 / (gain1 * mt) 707 + * + 22.66064768 * ch0 / (gain0 * mt) 708 + * + 8931.90144 * ch1 * ch1 * gain0 / 709 + * (25600 * ch0 * gain1 * gain1 * mt) 710 + * + 0.602694912 * ch1 / (gain1 * mt) 711 + * 712 + * => [0.3489024 * ch1 * ch1 * gain0 / (ch0 * gain1 * gain1) 713 + * + 22.66064768 * ch0 / gain0 714 + * + 13.721030912 * ch1 / gain1 715 + * ] / mt 716 + * 717 + * For (D1/D0 >= 1.00) 718 + * 719 + * lx = (0.001331* D0 + 0.0000354 * D1) * ((D1/D0 – 2.0) * (-0.05) + 1) 720 + * => (0.001331* D0 + 0.0000354 * D1) * (-0.05D1/D0 + 1.1) 721 + * => (0.001331 * 256 * 100 * ch0 / gain0 / mt + 0.0000354 * 256 * 722 + * 100 * ch1 / gain1 / mt) * (-0.05D1/D0 + 1.1) 723 + * => (34.0736 * ch0 / gain0 / mt + 0.90624 * ch1 / gain1 / mt) * 724 + * (-0.05 * 256 * 100 * ch1 / gain1 / mt / (256 * 100 * ch0 / gain0 / mt) + 1.1) 725 + * => (34.0736 * ch0 / gain0 / mt + 0.90624 * ch1 / gain1 / mt) * 726 + * (-1280 * ch1 / (gain1 * mt * 25600 * ch0 / gain0 / mt) + 1.1) 727 + * => (34.0736 * ch0 * -1280 * ch1 * gain0 * mt /( gain0 * mt * gain1 * mt * 25600 * ch0) 728 + * + 34.0736 * 1.1 * ch0 / (gain0 * mt) 729 + * + 0.90624 * ch1 * -1280 * ch1 *gain0 * mt / (gain1 * mt *gain1 * mt * 25600 * ch0) 730 + * + 1.1 * 0.90624 * ch1 / (gain1 * mt) 731 + * => -43614.208 * ch1 / (gain1 * mt * 25600) 732 + * + 37.48096 ch0 / (gain0 * mt) 733 + * - 1159.9872 * ch1 * ch1 * gain0 / (gain1 * gain1 * mt * 25600 * ch0) 734 + * + 0.996864 ch1 / (gain1 * mt) 735 + * => [ 736 + * - 0.045312 * ch1 * ch1 * gain0 / (gain1 * gain1 * ch0) 737 + * - 0.706816 * ch1 / gain1 738 + * + 37.48096 ch0 /gain0 739 + * ] * mt 740 + * 741 + * 742 + * So, the first case (D1/D0 < 0.87) can be computed to a form: 743 + * 744 + * lx = (3.126528 * ch1 * ch1 * gain0 / (ch0 * gain1 * gain1) + 745 + * 115.7400832 * ch1 / gain1 + 746 + * -68.1982976 * ch0 / gain0 747 + * / mt 748 + * 749 + * Second case (0.87 <= D1/D0 < 1.00) goes to form: 750 + * 751 + * => [0.3489024 * ch1 * ch1 * gain0 / (ch0 * gain1 * gain1) + 752 + * 13.721030912 * ch1 / gain1 + 753 + * 22.66064768 * ch0 / gain0 754 + * ] / mt 755 + * 756 + * Third case (D1/D0 >= 1.00) goes to form: 757 + * => [-0.045312 * ch1 * ch1 * gain0 / (ch0 * gain1 * gain1) + 758 + * -0.706816 * ch1 / gain1 + 759 + * 37.48096 ch0 /(gain0 760 + * ] / mt 761 + * 762 + * This can be unified to format: 763 + * lx = [ 764 + * A * ch1 * ch1 * gain0 / (ch0 * gain1 * gain1) + 765 + * B * ch1 / gain1 + 766 + * C * ch0 / gain0 767 + * ] / mt 768 + * 769 + * For case 1: 770 + * A = 3.126528, 771 + * B = 115.7400832 772 + * C = -68.1982976 773 + * 774 + * For case 2: 775 + * A = 0.3489024 776 + * B = 13.721030912 777 + * C = 22.66064768 778 + * 779 + * For case 3: 780 + * A = -0.045312 781 + * B = -0.706816 782 + * C = 37.48096 783 + */ 784 + 785 + struct bu27034_lx_coeff { 786 + unsigned int A; 787 + unsigned int B; 788 + unsigned int C; 789 + /* Indicate which of the coefficients above are negative */ 790 + bool is_neg[3]; 791 + }; 792 + 793 + static inline u64 gain_mul_div_helper(u64 val, unsigned int gain, 794 + unsigned int div) 795 + { 796 + /* 797 + * Max gain for a channel is 4096. The max u64 (0xffffffffffffffffULL) 798 + * divided by 4096 is 0xFFFFFFFFFFFFF (GENMASK_ULL(51, 0)) (floored). 799 + * Thus, the 0xFFFFFFFFFFFFF is the largest value we can safely multiply 800 + * with the gain, no matter what gain is set. 801 + * 802 + * So, multiplication with max gain may overflow if val is greater than 803 + * 0xFFFFFFFFFFFFF (52 bits set).. 804 + * 805 + * If this is the case we divide first. 806 + */ 807 + if (val < GENMASK_ULL(51, 0)) { 808 + val *= gain; 809 + do_div(val, div); 810 + } else { 811 + do_div(val, div); 812 + val *= gain; 813 + } 814 + 815 + return val; 816 + } 817 + 818 + static u64 bu27034_fixp_calc_t1_64bit(unsigned int coeff, unsigned int ch0, 819 + unsigned int ch1, unsigned int gain0, 820 + unsigned int gain1) 821 + { 822 + unsigned int helper; 823 + u64 helper64; 824 + 825 + helper64 = (u64)coeff * (u64)ch1 * (u64)ch1; 826 + 827 + helper = gain1 * gain1; 828 + if (helper > ch0) { 829 + do_div(helper64, helper); 830 + 831 + return gain_mul_div_helper(helper64, gain0, ch0); 832 + } 833 + 834 + do_div(helper64, ch0); 835 + 836 + return gain_mul_div_helper(helper64, gain0, helper); 837 + 838 + } 839 + 840 + static u64 bu27034_fixp_calc_t1(unsigned int coeff, unsigned int ch0, 841 + unsigned int ch1, unsigned int gain0, 842 + unsigned int gain1) 843 + { 844 + unsigned int helper, tmp; 845 + 846 + /* 847 + * Here we could overflow even the 64bit value. Hence we 848 + * multiply with gain0 only after the divisions - even though 849 + * it may result loss of accuracy 850 + */ 851 + helper = coeff * ch1 * ch1; 852 + tmp = helper * gain0; 853 + 854 + helper = ch1 * ch1; 855 + 856 + if (check_mul_overflow(helper, coeff, &helper)) 857 + return bu27034_fixp_calc_t1_64bit(coeff, ch0, ch1, gain0, gain1); 858 + 859 + if (check_mul_overflow(helper, gain0, &tmp)) 860 + return bu27034_fixp_calc_t1_64bit(coeff, ch0, ch1, gain0, gain1); 861 + 862 + return tmp / (gain1 * gain1) / ch0; 863 + 864 + } 865 + 866 + static u64 bu27034_fixp_calc_t23(unsigned int coeff, unsigned int ch, 867 + unsigned int gain) 868 + { 869 + unsigned int helper; 870 + u64 helper64; 871 + 872 + if (!check_mul_overflow(coeff, ch, &helper)) 873 + return helper / gain; 874 + 875 + helper64 = (u64)coeff * (u64)ch; 876 + do_div(helper64, gain); 877 + 878 + return helper64; 879 + } 880 + 881 + static int bu27034_fixp_calc_lx(unsigned int ch0, unsigned int ch1, 882 + unsigned int gain0, unsigned int gain1, 883 + unsigned int meastime, int coeff_idx) 884 + { 885 + static const struct bu27034_lx_coeff coeff[] = { 886 + { 887 + .A = 31265280, /* 3.126528 */ 888 + .B = 1157400832, /*115.7400832 */ 889 + .C = 681982976, /* -68.1982976 */ 890 + .is_neg = {false, false, true}, 891 + }, { 892 + .A = 3489024, /* 0.3489024 */ 893 + .B = 137210309, /* 13.721030912 */ 894 + .C = 226606476, /* 22.66064768 */ 895 + /* All terms positive */ 896 + }, { 897 + .A = 453120, /* -0.045312 */ 898 + .B = 7068160, /* -0.706816 */ 899 + .C = 374809600, /* 37.48096 */ 900 + .is_neg = {true, true, false}, 901 + } 902 + }; 903 + const struct bu27034_lx_coeff *c = &coeff[coeff_idx]; 904 + u64 res = 0, terms[3]; 905 + int i; 906 + 907 + if (coeff_idx >= ARRAY_SIZE(coeff)) 908 + return -EINVAL; 909 + 910 + terms[0] = bu27034_fixp_calc_t1(c->A, ch0, ch1, gain0, gain1); 911 + terms[1] = bu27034_fixp_calc_t23(c->B, ch1, gain1); 912 + terms[2] = bu27034_fixp_calc_t23(c->C, ch0, gain0); 913 + 914 + /* First, add positive terms */ 915 + for (i = 0; i < 3; i++) 916 + if (!c->is_neg[i]) 917 + res += terms[i]; 918 + 919 + /* No positive term => zero lux */ 920 + if (!res) 921 + return 0; 922 + 923 + /* Then, subtract negative terms (if any) */ 924 + for (i = 0; i < 3; i++) 925 + if (c->is_neg[i]) { 926 + /* 927 + * If the negative term is greater than positive - then 928 + * the darkness has taken over and we are all doomed! Eh, 929 + * I mean, then we can just return 0 lx and go out 930 + */ 931 + if (terms[i] >= res) 932 + return 0; 933 + 934 + res -= terms[i]; 935 + } 936 + 937 + meastime *= 10; 938 + do_div(res, meastime); 939 + 940 + return (int) res; 941 + } 942 + 943 + static bool bu27034_has_valid_sample(struct bu27034_data *data) 944 + { 945 + int ret, val; 946 + 947 + ret = regmap_read(data->regmap, BU27034_REG_MODE_CONTROL4, &val); 948 + if (ret) { 949 + dev_err(data->dev, "Read failed %d\n", ret); 950 + 951 + return false; 952 + } 953 + 954 + return val & BU27034_MASK_VALID; 955 + } 956 + 957 + /* 958 + * Reading the register where VALID bit is clears this bit. (So does changing 959 + * any gain / integration time configuration registers) The bit gets 960 + * set when we have acquired new data. We use this bit to indicate data 961 + * validity. 962 + */ 963 + static void bu27034_invalidate_read_data(struct bu27034_data *data) 964 + { 965 + bu27034_has_valid_sample(data); 966 + } 967 + 968 + static int bu27034_read_result(struct bu27034_data *data, int chan, int *res) 969 + { 970 + int reg[] = { 971 + [BU27034_CHAN_DATA0] = BU27034_REG_DATA0_LO, 972 + [BU27034_CHAN_DATA1] = BU27034_REG_DATA1_LO, 973 + [BU27034_CHAN_DATA2] = BU27034_REG_DATA2_LO, 974 + }; 975 + int valid, ret; 976 + __le16 val; 977 + 978 + ret = regmap_read_poll_timeout(data->regmap, BU27034_REG_MODE_CONTROL4, 979 + valid, (valid & BU27034_MASK_VALID), 980 + BU27034_DATA_WAIT_TIME_US, 0); 981 + if (ret) 982 + return ret; 983 + 984 + ret = regmap_bulk_read(data->regmap, reg[chan], &val, sizeof(val)); 985 + if (ret) 986 + return ret; 987 + 988 + *res = le16_to_cpu(val); 989 + 990 + return 0; 991 + } 992 + 993 + static int bu27034_get_result_unlocked(struct bu27034_data *data, __le16 *res, 994 + int size) 995 + { 996 + int ret = 0, retry_cnt = 0; 997 + 998 + retry: 999 + /* Get new value from sensor if data is ready */ 1000 + if (bu27034_has_valid_sample(data)) { 1001 + ret = regmap_bulk_read(data->regmap, BU27034_REG_DATA0_LO, 1002 + res, size); 1003 + if (ret) 1004 + return ret; 1005 + 1006 + bu27034_invalidate_read_data(data); 1007 + } else { 1008 + /* No new data in sensor. Wait and retry */ 1009 + retry_cnt++; 1010 + 1011 + if (retry_cnt > BU27034_RETRY_LIMIT) { 1012 + dev_err(data->dev, "No data from sensor\n"); 1013 + 1014 + return -ETIMEDOUT; 1015 + } 1016 + 1017 + msleep(25); 1018 + 1019 + goto retry; 1020 + } 1021 + 1022 + return ret; 1023 + } 1024 + 1025 + static int bu27034_meas_set(struct bu27034_data *data, bool en) 1026 + { 1027 + if (en) 1028 + return regmap_set_bits(data->regmap, BU27034_REG_MODE_CONTROL4, 1029 + BU27034_MASK_MEAS_EN); 1030 + 1031 + return regmap_clear_bits(data->regmap, BU27034_REG_MODE_CONTROL4, 1032 + BU27034_MASK_MEAS_EN); 1033 + } 1034 + 1035 + static int bu27034_get_single_result(struct bu27034_data *data, int chan, 1036 + int *val) 1037 + { 1038 + int ret; 1039 + 1040 + if (chan < BU27034_CHAN_DATA0 || chan > BU27034_CHAN_DATA2) 1041 + return -EINVAL; 1042 + 1043 + ret = bu27034_meas_set(data, true); 1044 + if (ret) 1045 + return ret; 1046 + 1047 + ret = bu27034_get_int_time(data); 1048 + if (ret < 0) 1049 + return ret; 1050 + 1051 + msleep(ret / 1000); 1052 + 1053 + return bu27034_read_result(data, chan, val); 1054 + } 1055 + 1056 + /* 1057 + * The formula given by vendor for computing luxes out of data0 and data1 1058 + * (in open air) is as follows: 1059 + * 1060 + * Let's mark: 1061 + * D0 = data0/ch0_gain/meas_time_ms * 25600 1062 + * D1 = data1/ch1_gain/meas_time_ms * 25600 1063 + * 1064 + * Then: 1065 + * if (D1/D0 < 0.87) 1066 + * lx = (0.001331 * D0 + 0.0000354 * D1) * ((D1 / D0 - 0.87) * 3.45 + 1) 1067 + * else if (D1/D0 < 1) 1068 + * lx = (0.001331 * D0 + 0.0000354 * D1) * ((D1 / D0 - 0.87) * 0.385 + 1) 1069 + * else 1070 + * lx = (0.001331 * D0 + 0.0000354 * D1) * ((D1 / D0 - 2) * -0.05 + 1) 1071 + * 1072 + * We use it here. Users who have for example some colored lens 1073 + * need to modify the calculation but I hope this gives a starting point for 1074 + * those working with such devices. 1075 + */ 1076 + 1077 + static int bu27034_calc_mlux(struct bu27034_data *data, __le16 *res, int *val) 1078 + { 1079 + unsigned int gain0, gain1, meastime; 1080 + unsigned int d1_d0_ratio_scaled; 1081 + u16 ch0, ch1; 1082 + u64 helper64; 1083 + int ret; 1084 + 1085 + /* 1086 + * We return 0 lux if calculation fails. This should be reasonably 1087 + * easy to spot from the buffers especially if raw-data channels show 1088 + * valid values 1089 + */ 1090 + *val = 0; 1091 + 1092 + ch0 = max_t(u16, 1, le16_to_cpu(res[0])); 1093 + ch1 = max_t(u16, 1, le16_to_cpu(res[1])); 1094 + 1095 + ret = bu27034_get_gain(data, BU27034_CHAN_DATA0, &gain0); 1096 + if (ret) 1097 + return ret; 1098 + 1099 + ret = bu27034_get_gain(data, BU27034_CHAN_DATA1, &gain1); 1100 + if (ret) 1101 + return ret; 1102 + 1103 + ret = bu27034_get_int_time(data); 1104 + if (ret < 0) 1105 + return ret; 1106 + 1107 + meastime = ret; 1108 + 1109 + d1_d0_ratio_scaled = (unsigned int)ch1 * (unsigned int)gain0 * 100; 1110 + helper64 = (u64)ch1 * (u64)gain0 * 100LLU; 1111 + 1112 + if (helper64 != d1_d0_ratio_scaled) { 1113 + unsigned int div = (unsigned int)ch0 * gain1; 1114 + 1115 + do_div(helper64, div); 1116 + d1_d0_ratio_scaled = helper64; 1117 + } else { 1118 + d1_d0_ratio_scaled /= ch0 * gain1; 1119 + } 1120 + 1121 + if (d1_d0_ratio_scaled < 87) 1122 + ret = bu27034_fixp_calc_lx(ch0, ch1, gain0, gain1, meastime, 0); 1123 + else if (d1_d0_ratio_scaled < 100) 1124 + ret = bu27034_fixp_calc_lx(ch0, ch1, gain0, gain1, meastime, 1); 1125 + else 1126 + ret = bu27034_fixp_calc_lx(ch0, ch1, gain0, gain1, meastime, 2); 1127 + 1128 + if (ret < 0) 1129 + return ret; 1130 + 1131 + *val = ret; 1132 + 1133 + return 0; 1134 + 1135 + } 1136 + 1137 + static int bu27034_get_mlux(struct bu27034_data *data, int chan, int *val) 1138 + { 1139 + __le16 res[3]; 1140 + int ret; 1141 + 1142 + ret = bu27034_meas_set(data, true); 1143 + if (ret) 1144 + return ret; 1145 + 1146 + ret = bu27034_get_result_unlocked(data, &res[0], sizeof(res)); 1147 + if (ret) 1148 + return ret; 1149 + 1150 + ret = bu27034_calc_mlux(data, res, val); 1151 + if (ret) 1152 + return ret; 1153 + 1154 + ret = bu27034_meas_set(data, false); 1155 + if (ret) 1156 + dev_err(data->dev, "failed to disable measurement\n"); 1157 + 1158 + return 0; 1159 + } 1160 + 1161 + static int bu27034_read_raw(struct iio_dev *idev, 1162 + struct iio_chan_spec const *chan, 1163 + int *val, int *val2, long mask) 1164 + { 1165 + struct bu27034_data *data = iio_priv(idev); 1166 + int ret; 1167 + 1168 + switch (mask) { 1169 + case IIO_CHAN_INFO_INT_TIME: 1170 + *val = bu27034_get_int_time(data); 1171 + if (*val < 0) 1172 + return *val; 1173 + 1174 + return IIO_VAL_INT; 1175 + 1176 + case IIO_CHAN_INFO_SCALE: 1177 + return bu27034_get_scale(data, chan->channel, val, val2); 1178 + 1179 + case IIO_CHAN_INFO_RAW: 1180 + { 1181 + int (*result_get)(struct bu27034_data *data, int chan, int *val); 1182 + 1183 + if (chan->type == IIO_INTENSITY) 1184 + result_get = bu27034_get_single_result; 1185 + else if (chan->type == IIO_LIGHT) 1186 + result_get = bu27034_get_mlux; 1187 + else 1188 + return -EINVAL; 1189 + 1190 + /* Don't mess with measurement enabling while buffering */ 1191 + ret = iio_device_claim_direct_mode(idev); 1192 + if (ret) 1193 + return ret; 1194 + 1195 + mutex_lock(&data->mutex); 1196 + /* 1197 + * Reading one channel at a time is inefficient but we 1198 + * don't care here. Buffered version should be used if 1199 + * performance is an issue. 1200 + */ 1201 + ret = result_get(data, chan->channel, val); 1202 + 1203 + mutex_unlock(&data->mutex); 1204 + iio_device_release_direct_mode(idev); 1205 + 1206 + if (ret) 1207 + return ret; 1208 + 1209 + return IIO_VAL_INT; 1210 + } 1211 + default: 1212 + return -EINVAL; 1213 + } 1214 + } 1215 + 1216 + static int bu27034_write_raw(struct iio_dev *idev, 1217 + struct iio_chan_spec const *chan, 1218 + int val, int val2, long mask) 1219 + { 1220 + struct bu27034_data *data = iio_priv(idev); 1221 + int ret; 1222 + 1223 + ret = iio_device_claim_direct_mode(idev); 1224 + if (ret) 1225 + return ret; 1226 + 1227 + switch (mask) { 1228 + case IIO_CHAN_INFO_SCALE: 1229 + ret = bu27034_set_scale(data, chan->channel, val, val2); 1230 + break; 1231 + case IIO_CHAN_INFO_INT_TIME: 1232 + ret = bu27034_try_set_int_time(data, val); 1233 + break; 1234 + default: 1235 + ret = -EINVAL; 1236 + break; 1237 + } 1238 + 1239 + iio_device_release_direct_mode(idev); 1240 + 1241 + return ret; 1242 + } 1243 + 1244 + static int bu27034_read_avail(struct iio_dev *idev, 1245 + struct iio_chan_spec const *chan, const int **vals, 1246 + int *type, int *length, long mask) 1247 + { 1248 + struct bu27034_data *data = iio_priv(idev); 1249 + 1250 + switch (mask) { 1251 + case IIO_CHAN_INFO_INT_TIME: 1252 + return iio_gts_avail_times(&data->gts, vals, type, length); 1253 + case IIO_CHAN_INFO_SCALE: 1254 + return iio_gts_all_avail_scales(&data->gts, vals, type, length); 1255 + default: 1256 + return -EINVAL; 1257 + } 1258 + } 1259 + 1260 + static const struct iio_info bu27034_info = { 1261 + .read_raw = &bu27034_read_raw, 1262 + .write_raw = &bu27034_write_raw, 1263 + .read_avail = &bu27034_read_avail, 1264 + }; 1265 + 1266 + static int bu27034_chip_init(struct bu27034_data *data) 1267 + { 1268 + int ret, sel; 1269 + 1270 + /* Reset */ 1271 + ret = regmap_update_bits(data->regmap, BU27034_REG_SYSTEM_CONTROL, 1272 + BU27034_MASK_SW_RESET, BU27034_MASK_SW_RESET); 1273 + if (ret) 1274 + return dev_err_probe(data->dev, ret, "Sensor reset failed\n"); 1275 + 1276 + msleep(1); 1277 + /* 1278 + * Read integration time here to ensure it is in regmap cache. We do 1279 + * this to speed-up the int-time acquisition in the start of the buffer 1280 + * handling thread where longer delays could make it more likely we end 1281 + * up skipping a sample, and where the longer delays make timestamps 1282 + * less accurate. 1283 + */ 1284 + ret = regmap_read(data->regmap, BU27034_REG_MODE_CONTROL1, &sel); 1285 + if (ret) 1286 + dev_err(data->dev, "reading integration time failed\n"); 1287 + 1288 + return 0; 1289 + } 1290 + 1291 + static int bu27034_wait_for_data(struct bu27034_data *data) 1292 + { 1293 + int ret, val; 1294 + 1295 + ret = regmap_read_poll_timeout(data->regmap, BU27034_REG_MODE_CONTROL4, 1296 + val, val & BU27034_MASK_VALID, 1297 + BU27034_DATA_WAIT_TIME_US, 1298 + BU27034_TOTAL_DATA_WAIT_TIME_US); 1299 + if (ret) { 1300 + dev_err(data->dev, "data polling %s\n", 1301 + !(val & BU27034_MASK_VALID) ? "timeout" : "fail"); 1302 + 1303 + return ret; 1304 + } 1305 + 1306 + ret = regmap_bulk_read(data->regmap, BU27034_REG_DATA0_LO, 1307 + &data->scan.channels[0], 1308 + sizeof(data->scan.channels)); 1309 + if (ret) 1310 + return ret; 1311 + 1312 + bu27034_invalidate_read_data(data); 1313 + 1314 + return 0; 1315 + } 1316 + 1317 + static int bu27034_buffer_thread(void *arg) 1318 + { 1319 + struct iio_dev *idev = arg; 1320 + struct bu27034_data *data; 1321 + int wait_ms; 1322 + 1323 + data = iio_priv(idev); 1324 + 1325 + wait_ms = bu27034_get_int_time(data); 1326 + wait_ms /= 1000; 1327 + 1328 + wait_ms -= BU27034_MEAS_WAIT_PREMATURE_MS; 1329 + 1330 + while (!kthread_should_stop()) { 1331 + int ret; 1332 + int64_t tstamp; 1333 + 1334 + msleep(wait_ms); 1335 + ret = bu27034_wait_for_data(data); 1336 + if (ret) 1337 + continue; 1338 + 1339 + tstamp = iio_get_time_ns(idev); 1340 + 1341 + if (test_bit(BU27034_CHAN_ALS, idev->active_scan_mask)) { 1342 + int mlux; 1343 + 1344 + ret = bu27034_calc_mlux(data, &data->scan.channels[0], 1345 + &mlux); 1346 + if (ret) 1347 + dev_err(data->dev, "failed to calculate lux\n"); 1348 + 1349 + /* 1350 + * The maximum Milli lux value we get with gain 1x time 1351 + * 55mS data ch0 = 0xffff ch1 = 0xffff fits in 26 bits 1352 + * so there should be no problem returning int from 1353 + * computations and casting it to u32 1354 + */ 1355 + data->scan.mlux = (u32)mlux; 1356 + } 1357 + iio_push_to_buffers_with_timestamp(idev, &data->scan, tstamp); 1358 + } 1359 + 1360 + return 0; 1361 + } 1362 + 1363 + static int bu27034_buffer_enable(struct iio_dev *idev) 1364 + { 1365 + struct bu27034_data *data = iio_priv(idev); 1366 + struct task_struct *task; 1367 + int ret; 1368 + 1369 + mutex_lock(&data->mutex); 1370 + ret = bu27034_meas_set(data, true); 1371 + if (ret) 1372 + goto unlock_out; 1373 + 1374 + task = kthread_run(bu27034_buffer_thread, idev, 1375 + "bu27034-buffering-%u", 1376 + iio_device_id(idev)); 1377 + if (IS_ERR(task)) { 1378 + ret = PTR_ERR(task); 1379 + goto unlock_out; 1380 + } 1381 + 1382 + data->task = task; 1383 + 1384 + unlock_out: 1385 + mutex_unlock(&data->mutex); 1386 + 1387 + return ret; 1388 + } 1389 + 1390 + static int bu27034_buffer_disable(struct iio_dev *idev) 1391 + { 1392 + struct bu27034_data *data = iio_priv(idev); 1393 + int ret; 1394 + 1395 + mutex_lock(&data->mutex); 1396 + if (data->task) { 1397 + kthread_stop(data->task); 1398 + data->task = NULL; 1399 + } 1400 + 1401 + ret = bu27034_meas_set(data, false); 1402 + mutex_unlock(&data->mutex); 1403 + 1404 + return ret; 1405 + } 1406 + 1407 + static const struct iio_buffer_setup_ops bu27034_buffer_ops = { 1408 + .postenable = &bu27034_buffer_enable, 1409 + .predisable = &bu27034_buffer_disable, 1410 + }; 1411 + 1412 + static int bu27034_probe(struct i2c_client *i2c) 1413 + { 1414 + struct device *dev = &i2c->dev; 1415 + struct bu27034_data *data; 1416 + struct regmap *regmap; 1417 + struct iio_dev *idev; 1418 + unsigned int part_id, reg; 1419 + int ret; 1420 + 1421 + regmap = devm_regmap_init_i2c(i2c, &bu27034_regmap); 1422 + if (IS_ERR(regmap)) 1423 + return dev_err_probe(dev, PTR_ERR(regmap), 1424 + "Failed to initialize Regmap\n"); 1425 + 1426 + idev = devm_iio_device_alloc(dev, sizeof(*data)); 1427 + if (!idev) 1428 + return -ENOMEM; 1429 + 1430 + ret = devm_regulator_get_enable(dev, "vdd"); 1431 + if (ret) 1432 + return dev_err_probe(dev, ret, "Failed to get regulator\n"); 1433 + 1434 + data = iio_priv(idev); 1435 + 1436 + ret = regmap_read(regmap, BU27034_REG_SYSTEM_CONTROL, &reg); 1437 + if (ret) 1438 + return dev_err_probe(dev, ret, "Failed to access sensor\n"); 1439 + 1440 + part_id = FIELD_GET(BU27034_MASK_PART_ID, reg); 1441 + 1442 + if (part_id != BU27034_ID) 1443 + dev_warn(dev, "unknown device 0x%x\n", part_id); 1444 + 1445 + ret = devm_iio_init_iio_gts(dev, BU27034_SCALE_1X, 0, bu27034_gains, 1446 + ARRAY_SIZE(bu27034_gains), bu27034_itimes, 1447 + ARRAY_SIZE(bu27034_itimes), &data->gts); 1448 + if (ret) 1449 + return ret; 1450 + 1451 + mutex_init(&data->mutex); 1452 + data->regmap = regmap; 1453 + data->dev = dev; 1454 + 1455 + idev->channels = bu27034_channels; 1456 + idev->num_channels = ARRAY_SIZE(bu27034_channels); 1457 + idev->name = "bu27034"; 1458 + idev->info = &bu27034_info; 1459 + 1460 + idev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE; 1461 + idev->available_scan_masks = bu27034_scan_masks; 1462 + 1463 + ret = bu27034_chip_init(data); 1464 + if (ret) 1465 + return ret; 1466 + 1467 + ret = devm_iio_kfifo_buffer_setup(dev, idev, &bu27034_buffer_ops); 1468 + if (ret) 1469 + return dev_err_probe(dev, ret, "buffer setup failed\n"); 1470 + 1471 + ret = devm_iio_device_register(dev, idev); 1472 + if (ret < 0) 1473 + return dev_err_probe(dev, ret, 1474 + "Unable to register iio device\n"); 1475 + 1476 + return ret; 1477 + } 1478 + 1479 + static const struct of_device_id bu27034_of_match[] = { 1480 + { .compatible = "rohm,bu27034" }, 1481 + { } 1482 + }; 1483 + MODULE_DEVICE_TABLE(of, bu27034_of_match); 1484 + 1485 + static struct i2c_driver bu27034_i2c_driver = { 1486 + .driver = { 1487 + .name = "bu27034-als", 1488 + .of_match_table = bu27034_of_match, 1489 + }, 1490 + .probe_new = bu27034_probe, 1491 + }; 1492 + module_i2c_driver(bu27034_i2c_driver); 1493 + 1494 + MODULE_LICENSE("GPL"); 1495 + MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>"); 1496 + MODULE_DESCRIPTION("ROHM BU27034 ambient light sensor driver"); 1497 + MODULE_IMPORT_NS(IIO_GTS_HELPER);
+1 -1
drivers/iio/light/rpr0521.c
··· 431 431 struct rpr0521_data *data = iio_priv(indio_dev); 432 432 433 433 if (rpr0521_is_triggered(data)) { 434 - iio_trigger_poll_chained(data->drdy_trigger0); 434 + iio_trigger_poll_nested(data->drdy_trigger0); 435 435 return IRQ_HANDLED; 436 436 } 437 437
+1 -1
drivers/iio/light/st_uvis25_core.c
··· 161 161 if (!(status & ST_UVIS25_REG_UV_DA_MASK)) 162 162 return IRQ_NONE; 163 163 164 - iio_trigger_poll_chained(hw->trig); 164 + iio_trigger_poll_nested(hw->trig); 165 165 166 166 return IRQ_HANDLED; 167 167 }
+1 -1
drivers/iio/light/vcnl4000.c
··· 1077 1077 } 1078 1078 1079 1079 if (isr & VCNL4010_INT_DRDY && iio_buffer_enabled(indio_dev)) 1080 - iio_trigger_poll_chained(indio_dev->trig); 1080 + iio_trigger_poll_nested(indio_dev->trig); 1081 1081 1082 1082 end: 1083 1083 return IRQ_HANDLED;
+1 -1
drivers/iio/light/vcnl4035.c
··· 89 89 IIO_EV_TYPE_THRESH, 90 90 IIO_EV_DIR_EITHER), 91 91 iio_get_time_ns(indio_dev)); 92 - iio_trigger_poll_chained(data->drdy_trigger0); 92 + iio_trigger_poll_nested(data->drdy_trigger0); 93 93 return IRQ_HANDLED; 94 94 } 95 95
+1 -1
drivers/iio/potentiostat/lmp91000.c
··· 118 118 119 119 data->chan_select = channel != LMP91000_REG_MODECN_3LEAD; 120 120 121 - iio_trigger_poll_chained(data->trig); 121 + iio_trigger_poll_nested(data->trig); 122 122 123 123 ret = wait_for_completion_timeout(&data->completion, HZ); 124 124 reinit_completion(&data->completion);
+3 -3
drivers/iio/pressure/Kconfig
··· 17 17 will be called abp060mg. 18 18 19 19 config BMP280 20 - tristate "Bosch Sensortec BMP180/BMP280/BMP380 pressure sensor I2C driver" 20 + tristate "Bosch Sensortec BMP180/BMP280/BMP380/BMP580 pressure sensor driver" 21 21 depends on (I2C || SPI_MASTER) 22 22 select REGMAP 23 23 select BMP280_I2C if (I2C) 24 24 select BMP280_SPI if (SPI_MASTER) 25 25 help 26 - Say yes here to build support for Bosch Sensortec BMP180, BMP280 and 27 - BMP380 pressure and temperature sensors. Also supports the BME280 with 26 + Say yes here to build support for Bosch Sensortec BMP180, BMP280, BMP380 27 + and BMP580 pressure and temperature sensors. Also supports the BME280 with 28 28 an additional humidity sensor channel. 29 29 30 30 To compile this driver as a module, choose M here: the core module
+579 -186
drivers/iio/pressure/bmp280-core.c
··· 13 13 * https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bmp280-ds001.pdf 14 14 * https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bme280-ds002.pdf 15 15 * https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bmp388-ds001.pdf 16 + * https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bmp581-ds004.pdf 16 17 * 17 18 * Notice: 18 19 * The link to the bmp180 datasheet points to an outdated version missing these changes: ··· 28 27 #include <linux/bitfield.h> 29 28 #include <linux/device.h> 30 29 #include <linux/module.h> 30 + #include <linux/nvmem-provider.h> 31 31 #include <linux/regmap.h> 32 32 #include <linux/delay.h> 33 33 #include <linux/iio/iio.h> ··· 51 49 */ 52 50 enum { AC1, AC2, AC3, AC4, AC5, AC6, B1, B2, MB, MC, MD }; 53 51 54 - struct bmp180_calib { 55 - s16 AC1; 56 - s16 AC2; 57 - s16 AC3; 58 - u16 AC4; 59 - u16 AC5; 60 - u16 AC6; 61 - s16 B1; 62 - s16 B2; 63 - s16 MB; 64 - s16 MC; 65 - s16 MD; 66 - }; 67 - 68 - /* See datasheet Section 4.2.2. */ 69 - struct bmp280_calib { 70 - u16 T1; 71 - s16 T2; 72 - s16 T3; 73 - u16 P1; 74 - s16 P2; 75 - s16 P3; 76 - s16 P4; 77 - s16 P5; 78 - s16 P6; 79 - s16 P7; 80 - s16 P8; 81 - s16 P9; 82 - u8 H1; 83 - s16 H2; 84 - u8 H3; 85 - s16 H4; 86 - s16 H5; 87 - s8 H6; 88 - }; 89 - 90 - /* See datasheet Section 3.11.1. */ 91 - struct bmp380_calib { 92 - u16 T1; 93 - u16 T2; 94 - s8 T3; 95 - s16 P1; 96 - s16 P2; 97 - s8 P3; 98 - s8 P4; 99 - u16 P5; 100 - u16 P6; 101 - s8 P7; 102 - s8 P8; 103 - s16 P9; 104 - s8 P10; 105 - s8 P11; 106 - }; 107 - 108 - static const char *const bmp280_supply_names[] = { 109 - "vddd", "vdda" 110 - }; 111 - 112 - #define BMP280_NUM_SUPPLIES ARRAY_SIZE(bmp280_supply_names) 113 52 114 53 enum bmp380_odr { 115 54 BMP380_ODR_200HZ, ··· 73 130 BMP380_ODR_0_0015HZ, 74 131 }; 75 132 76 - struct bmp280_data { 77 - struct device *dev; 78 - struct mutex lock; 79 - struct regmap *regmap; 80 - struct completion done; 81 - bool use_eoc; 82 - const struct bmp280_chip_info *chip_info; 83 - union { 84 - struct bmp180_calib bmp180; 85 - struct bmp280_calib bmp280; 86 - struct bmp380_calib bmp380; 87 - } calib; 88 - struct regulator_bulk_data supplies[BMP280_NUM_SUPPLIES]; 89 - unsigned int start_up_time; /* in microseconds */ 90 - 91 - /* log of base 2 of oversampling rate */ 92 - u8 oversampling_press; 93 - u8 oversampling_temp; 94 - u8 oversampling_humid; 95 - u8 iir_filter_coeff; 96 - 97 - /* 98 - * BMP380 devices introduce sampling frequency configuration. See 99 - * datasheet sections 3.3.3. and 4.3.19 for more details. 100 - * 101 - * BMx280 devices allowed indirect configuration of sampling frequency 102 - * changing the t_standby duration between measurements, as detailed on 103 - * section 3.6.3 of the datasheet. 104 - */ 105 - int sampling_freq; 106 - 107 - /* 108 - * Carryover value from temperature conversion, used in pressure 109 - * calculation. 110 - */ 111 - s32 t_fine; 112 - 113 - /* 114 - * DMA (thus cache coherency maintenance) may require the 115 - * transfer buffers to live in their own cache lines. 116 - */ 117 - union { 118 - /* Sensor data buffer */ 119 - u8 buf[3]; 120 - /* Calibration data buffers */ 121 - __le16 bmp280_cal_buf[BMP280_CONTIGUOUS_CALIB_REGS / 2]; 122 - __be16 bmp180_cal_buf[BMP180_REG_CALIB_COUNT / 2]; 123 - u8 bmp380_cal_buf[BMP380_CALIB_REG_COUNT]; 124 - /* Miscellaneous, endianess-aware data buffers */ 125 - __le16 le16; 126 - __be16 be16; 127 - } __aligned(IIO_DMA_MINALIGN); 128 - }; 129 - 130 - struct bmp280_chip_info { 131 - unsigned int id_reg; 132 - 133 - const struct iio_chan_spec *channels; 134 - int num_channels; 135 - unsigned int start_up_time; 136 - 137 - const int *oversampling_temp_avail; 138 - int num_oversampling_temp_avail; 139 - int oversampling_temp_default; 140 - 141 - const int *oversampling_press_avail; 142 - int num_oversampling_press_avail; 143 - int oversampling_press_default; 144 - 145 - const int *oversampling_humid_avail; 146 - int num_oversampling_humid_avail; 147 - int oversampling_humid_default; 148 - 149 - const int *iir_filter_coeffs_avail; 150 - int num_iir_filter_coeffs_avail; 151 - int iir_filter_coeff_default; 152 - 153 - const int (*sampling_freq_avail)[2]; 154 - int num_sampling_freq_avail; 155 - int sampling_freq_default; 156 - 157 - int (*chip_config)(struct bmp280_data *); 158 - int (*read_temp)(struct bmp280_data *, int *); 159 - int (*read_press)(struct bmp280_data *, int *, int *); 160 - int (*read_humid)(struct bmp280_data *, int *, int *); 161 - int (*read_calib)(struct bmp280_data *); 133 + enum bmp580_odr { 134 + BMP580_ODR_240HZ, 135 + BMP580_ODR_218HZ, 136 + BMP580_ODR_199HZ, 137 + BMP580_ODR_179HZ, 138 + BMP580_ODR_160HZ, 139 + BMP580_ODR_149HZ, 140 + BMP580_ODR_140HZ, 141 + BMP580_ODR_129HZ, 142 + BMP580_ODR_120HZ, 143 + BMP580_ODR_110HZ, 144 + BMP580_ODR_100HZ, 145 + BMP580_ODR_89HZ, 146 + BMP580_ODR_80HZ, 147 + BMP580_ODR_70HZ, 148 + BMP580_ODR_60HZ, 149 + BMP580_ODR_50HZ, 150 + BMP580_ODR_45HZ, 151 + BMP580_ODR_40HZ, 152 + BMP580_ODR_35HZ, 153 + BMP580_ODR_30HZ, 154 + BMP580_ODR_25HZ, 155 + BMP580_ODR_20HZ, 156 + BMP580_ODR_15HZ, 157 + BMP580_ODR_10HZ, 158 + BMP580_ODR_5HZ, 159 + BMP580_ODR_4HZ, 160 + BMP580_ODR_3HZ, 161 + BMP580_ODR_2HZ, 162 + BMP580_ODR_1HZ, 163 + BMP580_ODR_0_5HZ, 164 + BMP580_ODR_0_25HZ, 165 + BMP580_ODR_0_125HZ, 162 166 }; 163 167 164 168 /* ··· 363 473 } 364 474 365 475 static int bmp280_read_temp(struct bmp280_data *data, 366 - int *val) 476 + int *val, int *val2) 367 477 { 368 478 s32 adc_temp, comp_temp; 369 479 int ret; ··· 403 513 int ret; 404 514 405 515 /* Read and compensate temperature so we get a reading of t_fine. */ 406 - ret = bmp280_read_temp(data, NULL); 516 + ret = bmp280_read_temp(data, NULL, NULL); 407 517 if (ret < 0) 408 518 return ret; 409 519 ··· 435 545 int ret; 436 546 437 547 /* Read and compensate temperature so we get a reading of t_fine. */ 438 - ret = bmp280_read_temp(data, NULL); 548 + ret = bmp280_read_temp(data, NULL, NULL); 439 549 if (ret < 0) 440 550 return ret; 441 551 ··· 479 589 ret = data->chip_info->read_press(data, val, val2); 480 590 break; 481 591 case IIO_TEMP: 482 - ret = data->chip_info->read_temp(data, val); 592 + ret = data->chip_info->read_temp(data, val, val2); 483 593 break; 484 594 default: 485 595 ret = -EINVAL; ··· 795 905 796 906 static const int bmp280_oversampling_avail[] = { 1, 2, 4, 8, 16 }; 797 907 798 - static const struct bmp280_chip_info bmp280_chip_info = { 908 + const struct bmp280_chip_info bmp280_chip_info = { 799 909 .id_reg = BMP280_REG_ID, 910 + .chip_id = BMP280_CHIP_ID, 911 + .regmap_config = &bmp280_regmap_config, 800 912 .start_up_time = 2000, 801 913 .channels = bmp280_channels, 802 914 .num_channels = 2, ··· 826 934 .read_press = bmp280_read_press, 827 935 .read_calib = bmp280_read_calib, 828 936 }; 937 + EXPORT_SYMBOL_NS(bmp280_chip_info, IIO_BMP280); 829 938 830 939 static int bme280_chip_config(struct bmp280_data *data) 831 940 { ··· 846 953 return bmp280_chip_config(data); 847 954 } 848 955 849 - static const struct bmp280_chip_info bme280_chip_info = { 956 + const struct bmp280_chip_info bme280_chip_info = { 850 957 .id_reg = BMP280_REG_ID, 958 + .chip_id = BME280_CHIP_ID, 959 + .regmap_config = &bmp280_regmap_config, 851 960 .start_up_time = 2000, 852 961 .channels = bmp280_channels, 853 962 .num_channels = 3, ··· 872 977 .read_humid = bmp280_read_humid, 873 978 .read_calib = bme280_read_calib, 874 979 }; 980 + EXPORT_SYMBOL_NS(bme280_chip_info, IIO_BMP280); 875 981 876 982 /* 877 983 * Helper function to send a command to BMP3XX sensors. ··· 991 1095 return comp_press; 992 1096 } 993 1097 994 - static int bmp380_read_temp(struct bmp280_data *data, int *val) 1098 + static int bmp380_read_temp(struct bmp280_data *data, int *val, int *val2) 995 1099 { 996 1100 s32 comp_temp; 997 1101 u32 adc_temp; ··· 1031 1135 int ret; 1032 1136 1033 1137 /* Read and compensate for temperature so we get a reading of t_fine */ 1034 - ret = bmp380_read_temp(data, NULL); 1138 + ret = bmp380_read_temp(data, NULL, NULL); 1035 1139 if (ret) 1036 1140 return ret; 1037 1141 ··· 1112 1216 [BMP380_ODR_0_003HZ] = {0, 3052}, 1113 1217 [BMP380_ODR_0_0015HZ] = {0, 1526}, 1114 1218 }; 1219 + 1220 + static int bmp380_preinit(struct bmp280_data *data) 1221 + { 1222 + /* BMP3xx requires soft-reset as part of initialization */ 1223 + return bmp380_cmd(data, BMP380_CMD_SOFT_RESET); 1224 + } 1115 1225 1116 1226 static int bmp380_chip_config(struct bmp280_data *data) 1117 1227 { ··· 1221 1319 static const int bmp380_oversampling_avail[] = { 1, 2, 4, 8, 16, 32 }; 1222 1320 static const int bmp380_iir_filter_coeffs_avail[] = { 1, 2, 4, 8, 16, 32, 64, 128}; 1223 1321 1224 - static const struct bmp280_chip_info bmp380_chip_info = { 1322 + const struct bmp280_chip_info bmp380_chip_info = { 1225 1323 .id_reg = BMP380_REG_ID, 1324 + .chip_id = BMP380_CHIP_ID, 1325 + .regmap_config = &bmp380_regmap_config, 1226 1326 .start_up_time = 2000, 1227 1327 .channels = bmp380_channels, 1228 1328 .num_channels = 2, ··· 1249 1345 .read_temp = bmp380_read_temp, 1250 1346 .read_press = bmp380_read_press, 1251 1347 .read_calib = bmp380_read_calib, 1348 + .preinit = bmp380_preinit, 1252 1349 }; 1350 + EXPORT_SYMBOL_NS(bmp380_chip_info, IIO_BMP280); 1351 + 1352 + static int bmp580_soft_reset(struct bmp280_data *data) 1353 + { 1354 + unsigned int reg; 1355 + int ret; 1356 + 1357 + ret = regmap_write(data->regmap, BMP580_REG_CMD, BMP580_CMD_SOFT_RESET); 1358 + if (ret) { 1359 + dev_err(data->dev, "failed to send reset command to device\n"); 1360 + return ret; 1361 + } 1362 + usleep_range(2000, 2500); 1363 + 1364 + /* Dummy read of chip_id */ 1365 + ret = regmap_read(data->regmap, BMP580_REG_CHIP_ID, &reg); 1366 + if (ret) { 1367 + dev_err(data->dev, "failed to reestablish comms after reset\n"); 1368 + return ret; 1369 + } 1370 + 1371 + ret = regmap_read(data->regmap, BMP580_REG_INT_STATUS, &reg); 1372 + if (ret) { 1373 + dev_err(data->dev, "error reading interrupt status register\n"); 1374 + return ret; 1375 + } 1376 + if (!(reg & BMP580_INT_STATUS_POR_MASK)) { 1377 + dev_err(data->dev, "error resetting sensor\n"); 1378 + return -EINVAL; 1379 + } 1380 + 1381 + return 0; 1382 + } 1383 + 1384 + /** 1385 + * bmp580_nvm_operation() - Helper function to commit NVM memory operations 1386 + * @data: sensor data struct 1387 + * @is_write: flag to signal write operation 1388 + */ 1389 + static int bmp580_nvm_operation(struct bmp280_data *data, bool is_write) 1390 + { 1391 + unsigned long timeout, poll; 1392 + unsigned int reg; 1393 + int ret; 1394 + 1395 + /* Check NVM ready flag */ 1396 + ret = regmap_read(data->regmap, BMP580_REG_STATUS, &reg); 1397 + if (ret) { 1398 + dev_err(data->dev, "failed to check nvm status\n"); 1399 + return ret; 1400 + } 1401 + if (!(reg & BMP580_STATUS_NVM_RDY_MASK)) { 1402 + dev_err(data->dev, "sensor's nvm is not ready\n"); 1403 + return -EIO; 1404 + } 1405 + 1406 + /* Start NVM operation sequence */ 1407 + ret = regmap_write(data->regmap, BMP580_REG_CMD, BMP580_CMD_NVM_OP_SEQ_0); 1408 + if (ret) { 1409 + dev_err(data->dev, "failed to send nvm operation's first sequence\n"); 1410 + return ret; 1411 + } 1412 + if (is_write) { 1413 + /* Send NVM write sequence */ 1414 + ret = regmap_write(data->regmap, BMP580_REG_CMD, 1415 + BMP580_CMD_NVM_WRITE_SEQ_1); 1416 + if (ret) { 1417 + dev_err(data->dev, "failed to send nvm write sequence\n"); 1418 + return ret; 1419 + } 1420 + /* Datasheet says on 4.8.1.2 it takes approximately 10ms */ 1421 + poll = 2000; 1422 + timeout = 12000; 1423 + } else { 1424 + /* Send NVM read sequence */ 1425 + ret = regmap_write(data->regmap, BMP580_REG_CMD, 1426 + BMP580_CMD_NVM_READ_SEQ_1); 1427 + if (ret) { 1428 + dev_err(data->dev, "failed to send nvm read sequence\n"); 1429 + return ret; 1430 + } 1431 + /* Datasheet says on 4.8.1.1 it takes approximately 200us */ 1432 + poll = 50; 1433 + timeout = 400; 1434 + } 1435 + if (ret) { 1436 + dev_err(data->dev, "failed to write command sequence\n"); 1437 + return -EIO; 1438 + } 1439 + 1440 + /* Wait until NVM is ready again */ 1441 + ret = regmap_read_poll_timeout(data->regmap, BMP580_REG_STATUS, reg, 1442 + (reg & BMP580_STATUS_NVM_RDY_MASK), 1443 + poll, timeout); 1444 + if (ret) { 1445 + dev_err(data->dev, "error checking nvm operation status\n"); 1446 + return ret; 1447 + } 1448 + 1449 + /* Check NVM error flags */ 1450 + if ((reg & BMP580_STATUS_NVM_ERR_MASK) || (reg & BMP580_STATUS_NVM_CMD_ERR_MASK)) { 1451 + dev_err(data->dev, "error processing nvm operation\n"); 1452 + return -EIO; 1453 + } 1454 + 1455 + return 0; 1456 + } 1457 + 1458 + /* 1459 + * Contrary to previous sensors families, compensation algorithm is builtin. 1460 + * We are only required to read the register raw data and adapt the ranges 1461 + * for what is expected on IIO ABI. 1462 + */ 1463 + 1464 + static int bmp580_read_temp(struct bmp280_data *data, int *val, int *val2) 1465 + { 1466 + s32 raw_temp; 1467 + int ret; 1468 + 1469 + ret = regmap_bulk_read(data->regmap, BMP580_REG_TEMP_XLSB, data->buf, 1470 + sizeof(data->buf)); 1471 + if (ret) { 1472 + dev_err(data->dev, "failed to read temperature\n"); 1473 + return ret; 1474 + } 1475 + 1476 + raw_temp = get_unaligned_le24(data->buf); 1477 + if (raw_temp == BMP580_TEMP_SKIPPED) { 1478 + dev_err(data->dev, "reading temperature skipped\n"); 1479 + return -EIO; 1480 + } 1481 + 1482 + /* 1483 + * Temperature is returned in Celsius degrees in fractional 1484 + * form down 2^16. We reescale by x1000 to return milli Celsius 1485 + * to respect IIO ABI. 1486 + */ 1487 + *val = raw_temp * 1000; 1488 + *val2 = 16; 1489 + return IIO_VAL_FRACTIONAL_LOG2; 1490 + } 1491 + 1492 + static int bmp580_read_press(struct bmp280_data *data, int *val, int *val2) 1493 + { 1494 + u32 raw_press; 1495 + int ret; 1496 + 1497 + ret = regmap_bulk_read(data->regmap, BMP580_REG_PRESS_XLSB, data->buf, 1498 + sizeof(data->buf)); 1499 + if (ret) { 1500 + dev_err(data->dev, "failed to read pressure\n"); 1501 + return ret; 1502 + } 1503 + 1504 + raw_press = get_unaligned_le24(data->buf); 1505 + if (raw_press == BMP580_PRESS_SKIPPED) { 1506 + dev_err(data->dev, "reading pressure skipped\n"); 1507 + return -EIO; 1508 + } 1509 + /* 1510 + * Pressure is returned in Pascals in fractional form down 2^16. 1511 + * We reescale /1000 to convert to kilopascal to respect IIO ABI. 1512 + */ 1513 + *val = raw_press; 1514 + *val2 = 64000; /* 2^6 * 1000 */ 1515 + return IIO_VAL_FRACTIONAL; 1516 + } 1517 + 1518 + static const int bmp580_odr_table[][2] = { 1519 + [BMP580_ODR_240HZ] = {240, 0}, 1520 + [BMP580_ODR_218HZ] = {218, 0}, 1521 + [BMP580_ODR_199HZ] = {199, 0}, 1522 + [BMP580_ODR_179HZ] = {179, 0}, 1523 + [BMP580_ODR_160HZ] = {160, 0}, 1524 + [BMP580_ODR_149HZ] = {149, 0}, 1525 + [BMP580_ODR_140HZ] = {140, 0}, 1526 + [BMP580_ODR_129HZ] = {129, 0}, 1527 + [BMP580_ODR_120HZ] = {120, 0}, 1528 + [BMP580_ODR_110HZ] = {110, 0}, 1529 + [BMP580_ODR_100HZ] = {100, 0}, 1530 + [BMP580_ODR_89HZ] = {89, 0}, 1531 + [BMP580_ODR_80HZ] = {80, 0}, 1532 + [BMP580_ODR_70HZ] = {70, 0}, 1533 + [BMP580_ODR_60HZ] = {60, 0}, 1534 + [BMP580_ODR_50HZ] = {50, 0}, 1535 + [BMP580_ODR_45HZ] = {45, 0}, 1536 + [BMP580_ODR_40HZ] = {40, 0}, 1537 + [BMP580_ODR_35HZ] = {35, 0}, 1538 + [BMP580_ODR_30HZ] = {30, 0}, 1539 + [BMP580_ODR_25HZ] = {25, 0}, 1540 + [BMP580_ODR_20HZ] = {20, 0}, 1541 + [BMP580_ODR_15HZ] = {15, 0}, 1542 + [BMP580_ODR_10HZ] = {10, 0}, 1543 + [BMP580_ODR_5HZ] = {5, 0}, 1544 + [BMP580_ODR_4HZ] = {4, 0}, 1545 + [BMP580_ODR_3HZ] = {3, 0}, 1546 + [BMP580_ODR_2HZ] = {2, 0}, 1547 + [BMP580_ODR_1HZ] = {1, 0}, 1548 + [BMP580_ODR_0_5HZ] = {0, 500000}, 1549 + [BMP580_ODR_0_25HZ] = {0, 250000}, 1550 + [BMP580_ODR_0_125HZ] = {0, 125000}, 1551 + }; 1552 + 1553 + static const int bmp580_nvmem_addrs[] = { 0x20, 0x21, 0x22 }; 1554 + 1555 + static int bmp580_nvmem_read(void *priv, unsigned int offset, void *val, 1556 + size_t bytes) 1557 + { 1558 + struct bmp280_data *data = priv; 1559 + u16 *dst = val; 1560 + int ret, addr; 1561 + 1562 + pm_runtime_get_sync(data->dev); 1563 + mutex_lock(&data->lock); 1564 + 1565 + /* Set sensor in standby mode */ 1566 + ret = regmap_update_bits(data->regmap, BMP580_REG_ODR_CONFIG, 1567 + BMP580_MODE_MASK | BMP580_ODR_DEEPSLEEP_DIS, 1568 + BMP580_ODR_DEEPSLEEP_DIS | 1569 + FIELD_PREP(BMP580_MODE_MASK, BMP580_MODE_SLEEP)); 1570 + if (ret) { 1571 + dev_err(data->dev, "failed to change sensor to standby mode\n"); 1572 + goto exit; 1573 + } 1574 + /* Wait standby transition time */ 1575 + usleep_range(2500, 3000); 1576 + 1577 + while (bytes >= sizeof(*dst)) { 1578 + addr = bmp580_nvmem_addrs[offset / sizeof(*dst)]; 1579 + 1580 + ret = regmap_write(data->regmap, BMP580_REG_NVM_ADDR, 1581 + FIELD_PREP(BMP580_NVM_ROW_ADDR_MASK, addr)); 1582 + if (ret) { 1583 + dev_err(data->dev, "error writing nvm address\n"); 1584 + goto exit; 1585 + } 1586 + 1587 + ret = bmp580_nvm_operation(data, false); 1588 + if (ret) 1589 + goto exit; 1590 + 1591 + ret = regmap_bulk_read(data->regmap, BMP580_REG_NVM_DATA_LSB, &data->le16, 1592 + sizeof(data->le16)); 1593 + if (ret) { 1594 + dev_err(data->dev, "error reading nvm data regs\n"); 1595 + goto exit; 1596 + } 1597 + 1598 + *dst++ = le16_to_cpu(data->le16); 1599 + bytes -= sizeof(*dst); 1600 + offset += sizeof(*dst); 1601 + } 1602 + exit: 1603 + /* Restore chip config */ 1604 + data->chip_info->chip_config(data); 1605 + mutex_unlock(&data->lock); 1606 + pm_runtime_mark_last_busy(data->dev); 1607 + pm_runtime_put_autosuspend(data->dev); 1608 + return ret; 1609 + } 1610 + 1611 + static int bmp580_nvmem_write(void *priv, unsigned int offset, void *val, 1612 + size_t bytes) 1613 + { 1614 + struct bmp280_data *data = priv; 1615 + u16 *buf = val; 1616 + int ret, addr; 1617 + 1618 + pm_runtime_get_sync(data->dev); 1619 + mutex_lock(&data->lock); 1620 + 1621 + /* Set sensor in standby mode */ 1622 + ret = regmap_update_bits(data->regmap, BMP580_REG_ODR_CONFIG, 1623 + BMP580_MODE_MASK | BMP580_ODR_DEEPSLEEP_DIS, 1624 + BMP580_ODR_DEEPSLEEP_DIS | 1625 + FIELD_PREP(BMP580_MODE_MASK, BMP580_MODE_SLEEP)); 1626 + if (ret) { 1627 + dev_err(data->dev, "failed to change sensor to standby mode\n"); 1628 + goto exit; 1629 + } 1630 + /* Wait standby transition time */ 1631 + usleep_range(2500, 3000); 1632 + 1633 + while (bytes >= sizeof(*buf)) { 1634 + addr = bmp580_nvmem_addrs[offset / sizeof(*buf)]; 1635 + 1636 + ret = regmap_write(data->regmap, BMP580_REG_NVM_ADDR, BMP580_NVM_PROG_EN | 1637 + FIELD_PREP(BMP580_NVM_ROW_ADDR_MASK, addr)); 1638 + if (ret) { 1639 + dev_err(data->dev, "error writing nvm address\n"); 1640 + goto exit; 1641 + } 1642 + data->le16 = cpu_to_le16(*buf++); 1643 + 1644 + ret = regmap_bulk_write(data->regmap, BMP580_REG_NVM_DATA_LSB, &data->le16, 1645 + sizeof(data->le16)); 1646 + if (ret) { 1647 + dev_err(data->dev, "error writing LSB NVM data regs\n"); 1648 + goto exit; 1649 + } 1650 + 1651 + ret = bmp580_nvm_operation(data, true); 1652 + if (ret) 1653 + goto exit; 1654 + 1655 + /* Disable programming mode bit */ 1656 + ret = regmap_update_bits(data->regmap, BMP580_REG_NVM_ADDR, 1657 + BMP580_NVM_PROG_EN, 0); 1658 + if (ret) { 1659 + dev_err(data->dev, "error resetting nvm write\n"); 1660 + goto exit; 1661 + } 1662 + 1663 + bytes -= sizeof(*buf); 1664 + offset += sizeof(*buf); 1665 + } 1666 + exit: 1667 + /* Restore chip config */ 1668 + data->chip_info->chip_config(data); 1669 + mutex_unlock(&data->lock); 1670 + pm_runtime_mark_last_busy(data->dev); 1671 + pm_runtime_put_autosuspend(data->dev); 1672 + return ret; 1673 + } 1674 + 1675 + static int bmp580_preinit(struct bmp280_data *data) 1676 + { 1677 + struct nvmem_config config = { 1678 + .dev = data->dev, 1679 + .priv = data, 1680 + .name = "bmp580_nvmem", 1681 + .word_size = sizeof(u16), 1682 + .stride = sizeof(u16), 1683 + .size = 3 * sizeof(u16), 1684 + .reg_read = bmp580_nvmem_read, 1685 + .reg_write = bmp580_nvmem_write, 1686 + }; 1687 + unsigned int reg; 1688 + int ret; 1689 + 1690 + /* Issue soft-reset command */ 1691 + ret = bmp580_soft_reset(data); 1692 + if (ret) 1693 + return ret; 1694 + 1695 + /* Post powerup sequence */ 1696 + ret = regmap_read(data->regmap, BMP580_REG_CHIP_ID, &reg); 1697 + if (ret) 1698 + return ret; 1699 + 1700 + /* Print warn message if we don't know the chip id */ 1701 + if (reg != BMP580_CHIP_ID && reg != BMP580_CHIP_ID_ALT) 1702 + dev_warn(data->dev, "preinit: unexpected chip_id\n"); 1703 + 1704 + ret = regmap_read(data->regmap, BMP580_REG_STATUS, &reg); 1705 + if (ret) 1706 + return ret; 1707 + 1708 + /* Check nvm status */ 1709 + if (!(reg & BMP580_STATUS_NVM_RDY_MASK) || (reg & BMP580_STATUS_NVM_ERR_MASK)) { 1710 + dev_err(data->dev, "preinit: nvm error on powerup sequence\n"); 1711 + return -EIO; 1712 + } 1713 + 1714 + /* Register nvmem device */ 1715 + return PTR_ERR_OR_ZERO(devm_nvmem_register(config.dev, &config)); 1716 + } 1717 + 1718 + static int bmp580_chip_config(struct bmp280_data *data) 1719 + { 1720 + bool change = false, aux; 1721 + unsigned int tmp; 1722 + u8 reg_val; 1723 + int ret; 1724 + 1725 + /* Sets sensor in standby mode */ 1726 + ret = regmap_update_bits(data->regmap, BMP580_REG_ODR_CONFIG, 1727 + BMP580_MODE_MASK | BMP580_ODR_DEEPSLEEP_DIS, 1728 + BMP580_ODR_DEEPSLEEP_DIS | 1729 + FIELD_PREP(BMP580_MODE_MASK, BMP580_MODE_SLEEP)); 1730 + if (ret) { 1731 + dev_err(data->dev, "failed to change sensor to standby mode\n"); 1732 + return ret; 1733 + } 1734 + /* From datasheet's table 4: electrical characteristics */ 1735 + usleep_range(2500, 3000); 1736 + 1737 + /* Set default DSP mode settings */ 1738 + reg_val = FIELD_PREP(BMP580_DSP_COMP_MASK, BMP580_DSP_PRESS_TEMP_COMP_EN) | 1739 + BMP580_DSP_SHDW_IIR_TEMP_EN | BMP580_DSP_SHDW_IIR_PRESS_EN; 1740 + 1741 + ret = regmap_update_bits(data->regmap, BMP580_REG_DSP_CONFIG, 1742 + BMP580_DSP_COMP_MASK | 1743 + BMP580_DSP_SHDW_IIR_TEMP_EN | 1744 + BMP580_DSP_SHDW_IIR_PRESS_EN, reg_val); 1745 + 1746 + /* Configure oversampling */ 1747 + reg_val = FIELD_PREP(BMP580_OSR_TEMP_MASK, data->oversampling_temp) | 1748 + FIELD_PREP(BMP580_OSR_PRESS_MASK, data->oversampling_press) | 1749 + BMP580_OSR_PRESS_EN; 1750 + 1751 + ret = regmap_update_bits_check(data->regmap, BMP580_REG_OSR_CONFIG, 1752 + BMP580_OSR_TEMP_MASK | BMP580_OSR_PRESS_MASK | 1753 + BMP580_OSR_PRESS_EN, 1754 + reg_val, &aux); 1755 + if (ret) { 1756 + dev_err(data->dev, "failed to write oversampling register\n"); 1757 + return ret; 1758 + } 1759 + change = change || aux; 1760 + 1761 + /* Configure output data rate */ 1762 + ret = regmap_update_bits_check(data->regmap, BMP580_REG_ODR_CONFIG, BMP580_ODR_MASK, 1763 + FIELD_PREP(BMP580_ODR_MASK, data->sampling_freq), 1764 + &aux); 1765 + if (ret) { 1766 + dev_err(data->dev, "failed to write ODR configuration register\n"); 1767 + return ret; 1768 + } 1769 + change = change || aux; 1770 + 1771 + /* Set filter data */ 1772 + reg_val = FIELD_PREP(BMP580_DSP_IIR_PRESS_MASK, data->iir_filter_coeff) | 1773 + FIELD_PREP(BMP580_DSP_IIR_TEMP_MASK, data->iir_filter_coeff); 1774 + 1775 + ret = regmap_update_bits_check(data->regmap, BMP580_REG_DSP_IIR, 1776 + BMP580_DSP_IIR_PRESS_MASK | 1777 + BMP580_DSP_IIR_TEMP_MASK, 1778 + reg_val, &aux); 1779 + if (ret) { 1780 + dev_err(data->dev, "failed to write config register\n"); 1781 + return ret; 1782 + } 1783 + change = change || aux; 1784 + 1785 + /* Restore sensor to normal operation mode */ 1786 + ret = regmap_write_bits(data->regmap, BMP580_REG_ODR_CONFIG, 1787 + BMP580_MODE_MASK, 1788 + FIELD_PREP(BMP580_MODE_MASK, BMP580_MODE_NORMAL)); 1789 + if (ret) { 1790 + dev_err(data->dev, "failed to set normal mode\n"); 1791 + return ret; 1792 + } 1793 + /* From datasheet's table 4: electrical characteristics */ 1794 + usleep_range(3000, 3500); 1795 + 1796 + if (change) { 1797 + /* 1798 + * Check if ODR and OSR settings are valid or we are 1799 + * operating in a degraded mode. 1800 + */ 1801 + ret = regmap_read(data->regmap, BMP580_REG_EFF_OSR, &tmp); 1802 + if (ret) { 1803 + dev_err(data->dev, "error reading effective OSR register\n"); 1804 + return ret; 1805 + } 1806 + if (!(tmp & BMP580_EFF_OSR_VALID_ODR)) { 1807 + dev_warn(data->dev, "OSR and ODR incompatible settings detected\n"); 1808 + /* Set current OSR settings from data on effective OSR */ 1809 + data->oversampling_temp = FIELD_GET(BMP580_EFF_OSR_TEMP_MASK, tmp); 1810 + data->oversampling_press = FIELD_GET(BMP580_EFF_OSR_PRESS_MASK, tmp); 1811 + return -EINVAL; 1812 + } 1813 + } 1814 + 1815 + return 0; 1816 + } 1817 + 1818 + static const int bmp580_oversampling_avail[] = { 1, 2, 4, 8, 16, 32, 64, 128 }; 1819 + 1820 + const struct bmp280_chip_info bmp580_chip_info = { 1821 + .id_reg = BMP580_REG_CHIP_ID, 1822 + .chip_id = BMP580_CHIP_ID, 1823 + .regmap_config = &bmp580_regmap_config, 1824 + .start_up_time = 2000, 1825 + .channels = bmp380_channels, 1826 + .num_channels = 2, 1827 + 1828 + .oversampling_temp_avail = bmp580_oversampling_avail, 1829 + .num_oversampling_temp_avail = ARRAY_SIZE(bmp580_oversampling_avail), 1830 + .oversampling_temp_default = ilog2(1), 1831 + 1832 + .oversampling_press_avail = bmp580_oversampling_avail, 1833 + .num_oversampling_press_avail = ARRAY_SIZE(bmp580_oversampling_avail), 1834 + .oversampling_press_default = ilog2(4), 1835 + 1836 + .sampling_freq_avail = bmp580_odr_table, 1837 + .num_sampling_freq_avail = ARRAY_SIZE(bmp580_odr_table) * 2, 1838 + .sampling_freq_default = BMP580_ODR_50HZ, 1839 + 1840 + .iir_filter_coeffs_avail = bmp380_iir_filter_coeffs_avail, 1841 + .num_iir_filter_coeffs_avail = ARRAY_SIZE(bmp380_iir_filter_coeffs_avail), 1842 + .iir_filter_coeff_default = 2, 1843 + 1844 + .chip_config = bmp580_chip_config, 1845 + .read_temp = bmp580_read_temp, 1846 + .read_press = bmp580_read_press, 1847 + .preinit = bmp580_preinit, 1848 + }; 1849 + EXPORT_SYMBOL_NS(bmp580_chip_info, IIO_BMP280); 1253 1850 1254 1851 static int bmp180_measure(struct bmp280_data *data, u8 ctrl_meas) 1255 1852 { ··· 1872 1467 return (data->t_fine + 8) >> 4; 1873 1468 } 1874 1469 1875 - static int bmp180_read_temp(struct bmp280_data *data, int *val) 1470 + static int bmp180_read_temp(struct bmp280_data *data, int *val, int *val2) 1876 1471 { 1877 1472 s32 adc_temp, comp_temp; 1878 1473 int ret; ··· 1960 1555 int ret; 1961 1556 1962 1557 /* Read and compensate temperature so we get a reading of t_fine. */ 1963 - ret = bmp180_read_temp(data, NULL); 1558 + ret = bmp180_read_temp(data, NULL, NULL); 1964 1559 if (ret) 1965 1560 return ret; 1966 1561 ··· 1984 1579 static const int bmp180_oversampling_temp_avail[] = { 1 }; 1985 1580 static const int bmp180_oversampling_press_avail[] = { 1, 2, 4, 8 }; 1986 1581 1987 - static const struct bmp280_chip_info bmp180_chip_info = { 1582 + const struct bmp280_chip_info bmp180_chip_info = { 1988 1583 .id_reg = BMP280_REG_ID, 1584 + .chip_id = BMP180_CHIP_ID, 1585 + .regmap_config = &bmp180_regmap_config, 1989 1586 .start_up_time = 2000, 1990 1587 .channels = bmp280_channels, 1991 1588 .num_channels = 2, ··· 2007 1600 .read_press = bmp180_read_press, 2008 1601 .read_calib = bmp180_read_calib, 2009 1602 }; 1603 + EXPORT_SYMBOL_NS(bmp180_chip_info, IIO_BMP280); 2010 1604 2011 1605 static irqreturn_t bmp085_eoc_irq(int irq, void *d) 2012 1606 { ··· 2069 1661 2070 1662 int bmp280_common_probe(struct device *dev, 2071 1663 struct regmap *regmap, 2072 - unsigned int chip, 1664 + const struct bmp280_chip_info *chip_info, 2073 1665 const char *name, 2074 1666 int irq) 2075 1667 { 2076 - const struct bmp280_chip_info *chip_info; 2077 1668 struct iio_dev *indio_dev; 2078 1669 struct bmp280_data *data; 2079 1670 struct gpio_desc *gpiod; ··· 2091 1684 indio_dev->info = &bmp280_info; 2092 1685 indio_dev->modes = INDIO_DIRECT_MODE; 2093 1686 2094 - switch (chip) { 2095 - case BMP180_CHIP_ID: 2096 - chip_info = &bmp180_chip_info; 2097 - break; 2098 - case BMP280_CHIP_ID: 2099 - chip_info = &bmp280_chip_info; 2100 - break; 2101 - case BME280_CHIP_ID: 2102 - chip_info = &bme280_chip_info; 2103 - break; 2104 - case BMP380_CHIP_ID: 2105 - chip_info = &bmp380_chip_info; 2106 - break; 2107 - default: 2108 - return -EINVAL; 2109 - } 2110 1687 data->chip_info = chip_info; 2111 1688 2112 1689 /* Apply initial values from chip info structure */ ··· 2142 1751 ret = regmap_read(regmap, data->chip_info->id_reg, &chip_id); 2143 1752 if (ret < 0) 2144 1753 return ret; 2145 - if (chip_id != chip) { 1754 + if (chip_id != data->chip_info->chip_id) { 2146 1755 dev_err(dev, "bad chip id: expected %x got %x\n", 2147 - chip, chip_id); 1756 + data->chip_info->chip_id, chip_id); 2148 1757 return -EINVAL; 2149 1758 } 2150 1759 2151 - /* BMP3xx requires soft-reset as part of initialization */ 2152 - if (chip_id == BMP380_CHIP_ID) { 2153 - ret = bmp380_cmd(data, BMP380_CMD_SOFT_RESET); 2154 - if (ret < 0) 2155 - return ret; 1760 + if (data->chip_info->preinit) { 1761 + ret = data->chip_info->preinit(data); 1762 + if (ret) 1763 + return dev_err_probe(data->dev, ret, 1764 + "error running preinit tasks\n"); 2156 1765 } 2157 1766 2158 1767 ret = data->chip_info->chip_config(data); ··· 2167 1776 * time once. They will not change. 2168 1777 */ 2169 1778 2170 - ret = data->chip_info->read_calib(data); 2171 - if (ret < 0) 2172 - return dev_err_probe(data->dev, ret, 2173 - "failed to read calibration coefficients\n"); 1779 + if (data->chip_info->read_calib) { 1780 + ret = data->chip_info->read_calib(data); 1781 + if (ret < 0) 1782 + return dev_err_probe(data->dev, ret, 1783 + "failed to read calibration coefficients\n"); 1784 + } 2174 1785 2175 1786 /* 2176 1787 * Attempt to grab an optional EOC IRQ - only the BMP085 has this
+18 -27
drivers/iio/pressure/bmp280-i2c.c
··· 8 8 static int bmp280_i2c_probe(struct i2c_client *client) 9 9 { 10 10 struct regmap *regmap; 11 - const struct regmap_config *regmap_config; 11 + const struct bmp280_chip_info *chip_info; 12 12 const struct i2c_device_id *id = i2c_client_get_device_id(client); 13 13 14 - switch (id->driver_data) { 15 - case BMP180_CHIP_ID: 16 - regmap_config = &bmp180_regmap_config; 17 - break; 18 - case BMP280_CHIP_ID: 19 - case BME280_CHIP_ID: 20 - regmap_config = &bmp280_regmap_config; 21 - break; 22 - case BMP380_CHIP_ID: 23 - regmap_config = &bmp380_regmap_config; 24 - break; 25 - default: 26 - return -EINVAL; 27 - } 14 + chip_info = device_get_match_data(&client->dev); 15 + if (!chip_info) 16 + chip_info = (const struct bmp280_chip_info *) id->driver_data; 28 17 29 - regmap = devm_regmap_init_i2c(client, regmap_config); 18 + regmap = devm_regmap_init_i2c(client, chip_info->regmap_config); 30 19 if (IS_ERR(regmap)) { 31 20 dev_err(&client->dev, "failed to allocate register map\n"); 32 21 return PTR_ERR(regmap); ··· 23 34 24 35 return bmp280_common_probe(&client->dev, 25 36 regmap, 26 - id->driver_data, 37 + chip_info, 27 38 id->name, 28 39 client->irq); 29 40 } 30 41 31 42 static const struct of_device_id bmp280_of_i2c_match[] = { 32 - { .compatible = "bosch,bmp085", .data = (void *)BMP180_CHIP_ID }, 33 - { .compatible = "bosch,bmp180", .data = (void *)BMP180_CHIP_ID }, 34 - { .compatible = "bosch,bmp280", .data = (void *)BMP280_CHIP_ID }, 35 - { .compatible = "bosch,bme280", .data = (void *)BME280_CHIP_ID }, 36 - { .compatible = "bosch,bmp380", .data = (void *)BMP380_CHIP_ID }, 43 + { .compatible = "bosch,bmp085", .data = &bmp180_chip_info }, 44 + { .compatible = "bosch,bmp180", .data = &bmp180_chip_info }, 45 + { .compatible = "bosch,bmp280", .data = &bmp280_chip_info }, 46 + { .compatible = "bosch,bme280", .data = &bme280_chip_info }, 47 + { .compatible = "bosch,bmp380", .data = &bmp380_chip_info }, 48 + { .compatible = "bosch,bmp580", .data = &bmp580_chip_info }, 37 49 { }, 38 50 }; 39 51 MODULE_DEVICE_TABLE(of, bmp280_of_i2c_match); 40 52 41 53 static const struct i2c_device_id bmp280_i2c_id[] = { 42 - {"bmp085", BMP180_CHIP_ID }, 43 - {"bmp180", BMP180_CHIP_ID }, 44 - {"bmp280", BMP280_CHIP_ID }, 45 - {"bme280", BME280_CHIP_ID }, 46 - {"bmp380", BMP380_CHIP_ID }, 54 + {"bmp085", (kernel_ulong_t)&bmp180_chip_info }, 55 + {"bmp180", (kernel_ulong_t)&bmp180_chip_info }, 56 + {"bmp280", (kernel_ulong_t)&bmp280_chip_info }, 57 + {"bme280", (kernel_ulong_t)&bme280_chip_info }, 58 + {"bmp380", (kernel_ulong_t)&bmp380_chip_info }, 59 + {"bmp580", (kernel_ulong_t)&bmp580_chip_info }, 47 60 { }, 48 61 }; 49 62 MODULE_DEVICE_TABLE(i2c, bmp280_i2c_id);
+60
drivers/iio/pressure/bmp280-regmap.c
··· 115 115 } 116 116 } 117 117 118 + static bool bmp580_is_writeable_reg(struct device *dev, unsigned int reg) 119 + { 120 + switch (reg) { 121 + case BMP580_REG_NVM_DATA_MSB: 122 + case BMP580_REG_NVM_DATA_LSB: 123 + case BMP580_REG_NVM_ADDR: 124 + case BMP580_REG_ODR_CONFIG: 125 + case BMP580_REG_OSR_CONFIG: 126 + case BMP580_REG_INT_SOURCE: 127 + case BMP580_REG_INT_CONFIG: 128 + case BMP580_REG_OOR_THR_MSB: 129 + case BMP580_REG_OOR_THR_LSB: 130 + case BMP580_REG_OOR_CONFIG: 131 + case BMP580_REG_OOR_RANGE: 132 + case BMP580_REG_IF_CONFIG: 133 + case BMP580_REG_FIFO_CONFIG: 134 + case BMP580_REG_FIFO_SEL: 135 + case BMP580_REG_DSP_CONFIG: 136 + case BMP580_REG_DSP_IIR: 137 + case BMP580_REG_CMD: 138 + return true; 139 + default: 140 + return false; 141 + } 142 + } 143 + 144 + static bool bmp580_is_volatile_reg(struct device *dev, unsigned int reg) 145 + { 146 + switch (reg) { 147 + case BMP580_REG_NVM_DATA_MSB: 148 + case BMP580_REG_NVM_DATA_LSB: 149 + case BMP580_REG_FIFO_COUNT: 150 + case BMP580_REG_INT_STATUS: 151 + case BMP580_REG_PRESS_XLSB: 152 + case BMP580_REG_PRESS_LSB: 153 + case BMP580_REG_PRESS_MSB: 154 + case BMP580_REG_FIFO_DATA: 155 + case BMP580_REG_TEMP_XLSB: 156 + case BMP580_REG_TEMP_LSB: 157 + case BMP580_REG_TEMP_MSB: 158 + case BMP580_REG_EFF_OSR: 159 + case BMP580_REG_STATUS: 160 + return true; 161 + default: 162 + return false; 163 + } 164 + } 165 + 118 166 const struct regmap_config bmp280_regmap_config = { 119 167 .reg_bits = 8, 120 168 .val_bits = 8, ··· 186 138 .volatile_reg = bmp380_is_volatile_reg, 187 139 }; 188 140 EXPORT_SYMBOL_NS(bmp380_regmap_config, IIO_BMP280); 141 + 142 + const struct regmap_config bmp580_regmap_config = { 143 + .reg_bits = 8, 144 + .val_bits = 8, 145 + 146 + .max_register = BMP580_REG_CMD, 147 + .cache_type = REGCACHE_RBTREE, 148 + 149 + .writeable_reg = bmp580_is_writeable_reg, 150 + .volatile_reg = bmp580_is_volatile_reg, 151 + }; 152 + EXPORT_SYMBOL_NS(bmp580_regmap_config, IIO_BMP280);
+19 -28
drivers/iio/pressure/bmp280-spi.c
··· 47 47 static int bmp280_spi_probe(struct spi_device *spi) 48 48 { 49 49 const struct spi_device_id *id = spi_get_device_id(spi); 50 + const struct bmp280_chip_info *chip_info; 50 51 struct regmap *regmap; 51 - const struct regmap_config *regmap_config; 52 52 int ret; 53 53 54 54 spi->bits_per_word = 8; ··· 58 58 return ret; 59 59 } 60 60 61 - switch (id->driver_data) { 62 - case BMP180_CHIP_ID: 63 - regmap_config = &bmp180_regmap_config; 64 - break; 65 - case BMP280_CHIP_ID: 66 - case BME280_CHIP_ID: 67 - regmap_config = &bmp280_regmap_config; 68 - break; 69 - case BMP380_CHIP_ID: 70 - regmap_config = &bmp380_regmap_config; 71 - break; 72 - default: 73 - return -EINVAL; 74 - } 61 + chip_info = device_get_match_data(&spi->dev); 62 + if (!chip_info) 63 + chip_info = (const struct bmp280_chip_info *) id->driver_data; 75 64 76 65 regmap = devm_regmap_init(&spi->dev, 77 66 &bmp280_regmap_bus, 78 67 &spi->dev, 79 - regmap_config); 68 + chip_info->regmap_config); 80 69 if (IS_ERR(regmap)) { 81 70 dev_err(&spi->dev, "failed to allocate register map\n"); 82 71 return PTR_ERR(regmap); ··· 73 84 74 85 return bmp280_common_probe(&spi->dev, 75 86 regmap, 76 - id->driver_data, 87 + chip_info, 77 88 id->name, 78 89 spi->irq); 79 90 } 80 91 81 92 static const struct of_device_id bmp280_of_spi_match[] = { 82 - { .compatible = "bosch,bmp085", }, 83 - { .compatible = "bosch,bmp180", }, 84 - { .compatible = "bosch,bmp181", }, 85 - { .compatible = "bosch,bmp280", }, 86 - { .compatible = "bosch,bme280", }, 87 - { .compatible = "bosch,bmp380", }, 93 + { .compatible = "bosch,bmp085", .data = &bmp180_chip_info }, 94 + { .compatible = "bosch,bmp180", .data = &bmp180_chip_info }, 95 + { .compatible = "bosch,bmp181", .data = &bmp180_chip_info }, 96 + { .compatible = "bosch,bmp280", .data = &bmp280_chip_info }, 97 + { .compatible = "bosch,bme280", .data = &bmp280_chip_info }, 98 + { .compatible = "bosch,bmp380", .data = &bmp380_chip_info }, 99 + { .compatible = "bosch,bmp580", .data = &bmp580_chip_info }, 88 100 { }, 89 101 }; 90 102 MODULE_DEVICE_TABLE(of, bmp280_of_spi_match); 91 103 92 104 static const struct spi_device_id bmp280_spi_id[] = { 93 - { "bmp180", BMP180_CHIP_ID }, 94 - { "bmp181", BMP180_CHIP_ID }, 95 - { "bmp280", BMP280_CHIP_ID }, 96 - { "bme280", BME280_CHIP_ID }, 97 - { "bmp380", BMP380_CHIP_ID }, 105 + { "bmp180", (kernel_ulong_t)&bmp180_chip_info }, 106 + { "bmp181", (kernel_ulong_t)&bmp180_chip_info }, 107 + { "bmp280", (kernel_ulong_t)&bmp280_chip_info }, 108 + { "bme280", (kernel_ulong_t)&bmp280_chip_info }, 109 + { "bmp380", (kernel_ulong_t)&bmp380_chip_info }, 110 + { "bmp580", (kernel_ulong_t)&bmp580_chip_info }, 98 111 { } 99 112 }; 100 113 MODULE_DEVICE_TABLE(spi, bmp280_spi_id);
+272 -1
drivers/iio/pressure/bmp280.h
··· 1 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 2 #include <linux/bitops.h> 3 3 #include <linux/device.h> 4 + #include <linux/iio/iio.h> 4 5 #include <linux/regmap.h> 6 + #include <linux/regulator/consumer.h> 7 + 8 + 9 + /* BMP580 specific registers */ 10 + #define BMP580_REG_CMD 0x7E 11 + #define BMP580_REG_EFF_OSR 0x38 12 + #define BMP580_REG_ODR_CONFIG 0x37 13 + #define BMP580_REG_OSR_CONFIG 0x36 14 + #define BMP580_REG_IF_CONFIG 0x13 15 + #define BMP580_REG_REV_ID 0x02 16 + #define BMP580_REG_CHIP_ID 0x01 17 + /* OOR allows to configure a pressure alarm */ 18 + #define BMP580_REG_OOR_CONFIG 0x35 19 + #define BMP580_REG_OOR_RANGE 0x34 20 + #define BMP580_REG_OOR_THR_MSB 0x33 21 + #define BMP580_REG_OOR_THR_LSB 0x32 22 + /* DSP registers (IIR filters) */ 23 + #define BMP580_REG_DSP_IIR 0x31 24 + #define BMP580_REG_DSP_CONFIG 0x30 25 + /* NVM access registers */ 26 + #define BMP580_REG_NVM_DATA_MSB 0x2D 27 + #define BMP580_REG_NVM_DATA_LSB 0x2C 28 + #define BMP580_REG_NVM_ADDR 0x2B 29 + /* Status registers */ 30 + #define BMP580_REG_STATUS 0x28 31 + #define BMP580_REG_INT_STATUS 0x27 32 + #define BMP580_REG_CHIP_STATUS 0x11 33 + /* Data registers */ 34 + #define BMP580_REG_FIFO_DATA 0x29 35 + #define BMP580_REG_PRESS_MSB 0x22 36 + #define BMP580_REG_PRESS_LSB 0x21 37 + #define BMP580_REG_PRESS_XLSB 0x20 38 + #define BMP580_REG_TEMP_MSB 0x1F 39 + #define BMP580_REG_TEMP_LSB 0x1E 40 + #define BMP580_REG_TEMP_XLSB 0x1D 41 + /* FIFO config registers */ 42 + #define BMP580_REG_FIFO_SEL 0x18 43 + #define BMP580_REG_FIFO_COUNT 0x17 44 + #define BMP580_REG_FIFO_CONFIG 0x16 45 + /* Interruptions config registers */ 46 + #define BMP580_REG_INT_SOURCE 0x15 47 + #define BMP580_REG_INT_CONFIG 0x14 48 + 49 + #define BMP580_CMD_NOOP 0x00 50 + #define BMP580_CMD_EXTMODE_SEQ_0 0x73 51 + #define BMP580_CMD_EXTMODE_SEQ_1 0xB4 52 + #define BMP580_CMD_EXTMODE_SEQ_2 0x69 53 + #define BMP580_CMD_NVM_OP_SEQ_0 0x5D 54 + #define BMP580_CMD_NVM_READ_SEQ_1 0xA5 55 + #define BMP580_CMD_NVM_WRITE_SEQ_1 0xA0 56 + #define BMP580_CMD_SOFT_RESET 0xB6 57 + 58 + #define BMP580_INT_STATUS_POR_MASK BIT(4) 59 + 60 + #define BMP580_STATUS_CORE_RDY_MASK BIT(0) 61 + #define BMP580_STATUS_NVM_RDY_MASK BIT(1) 62 + #define BMP580_STATUS_NVM_ERR_MASK BIT(2) 63 + #define BMP580_STATUS_NVM_CMD_ERR_MASK BIT(3) 64 + 65 + #define BMP580_OSR_PRESS_MASK GENMASK(5, 3) 66 + #define BMP580_OSR_TEMP_MASK GENMASK(2, 0) 67 + #define BMP580_OSR_PRESS_EN BIT(6) 68 + #define BMP580_EFF_OSR_PRESS_MASK GENMASK(5, 3) 69 + #define BMP580_EFF_OSR_TEMP_MASK GENMASK(2, 0) 70 + #define BMP580_EFF_OSR_VALID_ODR BIT(7) 71 + 72 + #define BMP580_ODR_MASK GENMASK(6, 2) 73 + #define BMP580_MODE_MASK GENMASK(1, 0) 74 + #define BMP580_MODE_SLEEP 0 75 + #define BMP580_MODE_NORMAL 1 76 + #define BMP580_MODE_FORCED 2 77 + #define BMP580_MODE_CONTINOUS 3 78 + #define BMP580_ODR_DEEPSLEEP_DIS BIT(7) 79 + 80 + #define BMP580_DSP_COMP_MASK GENMASK(1, 0) 81 + #define BMP580_DSP_COMP_DIS 0 82 + #define BMP580_DSP_TEMP_COMP_EN 1 83 + /* 84 + * In section 7.27 of datasheet, modes 2 and 3 are technically the same. 85 + * Pressure compensation means also enabling temperature compensation 86 + */ 87 + #define BMP580_DSP_PRESS_COMP_EN 2 88 + #define BMP580_DSP_PRESS_TEMP_COMP_EN 3 89 + #define BMP580_DSP_IIR_FORCED_FLUSH BIT(2) 90 + #define BMP580_DSP_SHDW_IIR_TEMP_EN BIT(3) 91 + #define BMP580_DSP_FIFO_IIR_TEMP_EN BIT(4) 92 + #define BMP580_DSP_SHDW_IIR_PRESS_EN BIT(5) 93 + #define BMP580_DSP_FIFO_IIR_PRESS_EN BIT(6) 94 + #define BMP580_DSP_OOR_IIR_PRESS_EN BIT(7) 95 + 96 + #define BMP580_DSP_IIR_PRESS_MASK GENMASK(5, 3) 97 + #define BMP580_DSP_IIR_TEMP_MASK GENMASK(2, 0) 98 + #define BMP580_FILTER_OFF 0 99 + #define BMP580_FILTER_1X 1 100 + #define BMP580_FILTER_3X 2 101 + #define BMP580_FILTER_7X 3 102 + #define BMP580_FILTER_15X 4 103 + #define BMP580_FILTER_31X 5 104 + #define BMP580_FILTER_63X 6 105 + #define BMP580_FILTER_127X 7 106 + 107 + #define BMP580_NVM_ROW_ADDR_MASK GENMASK(5, 0) 108 + #define BMP580_NVM_PROG_EN BIT(6) 109 + 110 + #define BMP580_TEMP_SKIPPED 0x7f7f7f 111 + #define BMP580_PRESS_SKIPPED 0x7f7f7f 5 112 6 113 /* BMP380 specific registers */ 7 114 #define BMP380_REG_CMD 0x7E ··· 288 181 #define BMP280_REG_ID 0xD0 289 182 290 183 #define BMP380_CHIP_ID 0x50 184 + #define BMP580_CHIP_ID 0x50 185 + #define BMP580_CHIP_ID_ALT 0x51 291 186 #define BMP180_CHIP_ID 0x55 292 187 #define BMP280_CHIP_ID 0x58 293 188 #define BME280_CHIP_ID 0x60 ··· 300 191 #define BMP280_PRESS_SKIPPED 0x80000 301 192 #define BMP280_HUMIDITY_SKIPPED 0x8000 302 193 194 + /* Core exported structs */ 195 + 196 + static const char *const bmp280_supply_names[] = { 197 + "vddd", "vdda" 198 + }; 199 + 200 + #define BMP280_NUM_SUPPLIES ARRAY_SIZE(bmp280_supply_names) 201 + 202 + struct bmp180_calib { 203 + s16 AC1; 204 + s16 AC2; 205 + s16 AC3; 206 + u16 AC4; 207 + u16 AC5; 208 + u16 AC6; 209 + s16 B1; 210 + s16 B2; 211 + s16 MB; 212 + s16 MC; 213 + s16 MD; 214 + }; 215 + 216 + /* See datasheet Section 4.2.2. */ 217 + struct bmp280_calib { 218 + u16 T1; 219 + s16 T2; 220 + s16 T3; 221 + u16 P1; 222 + s16 P2; 223 + s16 P3; 224 + s16 P4; 225 + s16 P5; 226 + s16 P6; 227 + s16 P7; 228 + s16 P8; 229 + s16 P9; 230 + u8 H1; 231 + s16 H2; 232 + u8 H3; 233 + s16 H4; 234 + s16 H5; 235 + s8 H6; 236 + }; 237 + 238 + /* See datasheet Section 3.11.1. */ 239 + struct bmp380_calib { 240 + u16 T1; 241 + u16 T2; 242 + s8 T3; 243 + s16 P1; 244 + s16 P2; 245 + s8 P3; 246 + s8 P4; 247 + u16 P5; 248 + u16 P6; 249 + s8 P7; 250 + s8 P8; 251 + s16 P9; 252 + s8 P10; 253 + s8 P11; 254 + }; 255 + 256 + struct bmp280_data { 257 + struct device *dev; 258 + struct mutex lock; 259 + struct regmap *regmap; 260 + struct completion done; 261 + bool use_eoc; 262 + const struct bmp280_chip_info *chip_info; 263 + union { 264 + struct bmp180_calib bmp180; 265 + struct bmp280_calib bmp280; 266 + struct bmp380_calib bmp380; 267 + } calib; 268 + struct regulator_bulk_data supplies[BMP280_NUM_SUPPLIES]; 269 + unsigned int start_up_time; /* in microseconds */ 270 + 271 + /* log of base 2 of oversampling rate */ 272 + u8 oversampling_press; 273 + u8 oversampling_temp; 274 + u8 oversampling_humid; 275 + u8 iir_filter_coeff; 276 + 277 + /* 278 + * BMP380 devices introduce sampling frequency configuration. See 279 + * datasheet sections 3.3.3. and 4.3.19 for more details. 280 + * 281 + * BMx280 devices allowed indirect configuration of sampling frequency 282 + * changing the t_standby duration between measurements, as detailed on 283 + * section 3.6.3 of the datasheet. 284 + */ 285 + int sampling_freq; 286 + 287 + /* 288 + * Carryover value from temperature conversion, used in pressure 289 + * calculation. 290 + */ 291 + s32 t_fine; 292 + 293 + /* 294 + * DMA (thus cache coherency maintenance) may require the 295 + * transfer buffers to live in their own cache lines. 296 + */ 297 + union { 298 + /* Sensor data buffer */ 299 + u8 buf[3]; 300 + /* Calibration data buffers */ 301 + __le16 bmp280_cal_buf[BMP280_CONTIGUOUS_CALIB_REGS / 2]; 302 + __be16 bmp180_cal_buf[BMP180_REG_CALIB_COUNT / 2]; 303 + u8 bmp380_cal_buf[BMP380_CALIB_REG_COUNT]; 304 + /* Miscellaneous, endianess-aware data buffers */ 305 + __le16 le16; 306 + __be16 be16; 307 + } __aligned(IIO_DMA_MINALIGN); 308 + }; 309 + 310 + struct bmp280_chip_info { 311 + unsigned int id_reg; 312 + const unsigned int chip_id; 313 + 314 + const struct regmap_config *regmap_config; 315 + 316 + const struct iio_chan_spec *channels; 317 + int num_channels; 318 + unsigned int start_up_time; 319 + 320 + const int *oversampling_temp_avail; 321 + int num_oversampling_temp_avail; 322 + int oversampling_temp_default; 323 + 324 + const int *oversampling_press_avail; 325 + int num_oversampling_press_avail; 326 + int oversampling_press_default; 327 + 328 + const int *oversampling_humid_avail; 329 + int num_oversampling_humid_avail; 330 + int oversampling_humid_default; 331 + 332 + const int *iir_filter_coeffs_avail; 333 + int num_iir_filter_coeffs_avail; 334 + int iir_filter_coeff_default; 335 + 336 + const int (*sampling_freq_avail)[2]; 337 + int num_sampling_freq_avail; 338 + int sampling_freq_default; 339 + 340 + int (*chip_config)(struct bmp280_data *); 341 + int (*read_temp)(struct bmp280_data *, int *, int *); 342 + int (*read_press)(struct bmp280_data *, int *, int *); 343 + int (*read_humid)(struct bmp280_data *, int *, int *); 344 + int (*read_calib)(struct bmp280_data *); 345 + int (*preinit)(struct bmp280_data *); 346 + }; 347 + 348 + /* Chip infos for each variant */ 349 + extern const struct bmp280_chip_info bmp180_chip_info; 350 + extern const struct bmp280_chip_info bmp280_chip_info; 351 + extern const struct bmp280_chip_info bme280_chip_info; 352 + extern const struct bmp280_chip_info bmp380_chip_info; 353 + extern const struct bmp280_chip_info bmp580_chip_info; 354 + 303 355 /* Regmap configurations */ 304 356 extern const struct regmap_config bmp180_regmap_config; 305 357 extern const struct regmap_config bmp280_regmap_config; 306 358 extern const struct regmap_config bmp380_regmap_config; 359 + extern const struct regmap_config bmp580_regmap_config; 307 360 308 361 /* Probe called from different transports */ 309 362 int bmp280_common_probe(struct device *dev, 310 363 struct regmap *regmap, 311 - unsigned int chip, 364 + const struct bmp280_chip_info *, 312 365 const char *name, 313 366 int irq); 314 367
+1 -1
drivers/iio/pressure/zpa2326.c
··· 829 829 } 830 830 831 831 /* New sample available: dispatch internal trigger consumers. */ 832 - iio_trigger_poll_chained(priv->trigger); 832 + iio_trigger_poll_nested(priv->trigger); 833 833 834 834 if (cont) 835 835 /*
+1 -1
drivers/iio/proximity/as3935.c
··· 257 257 258 258 switch (val) { 259 259 case AS3935_EVENT_INT: 260 - iio_trigger_poll_chained(st->trig); 260 + iio_trigger_poll_nested(st->trig); 261 261 break; 262 262 case AS3935_DISTURB_INT: 263 263 case AS3935_NOISE_INT:
+50 -46
drivers/iio/proximity/sx9324.c
··· 783 783 784 784 static const struct sx_common_reg_default sx9324_default_regs[] = { 785 785 { SX9324_REG_IRQ_MSK, 0x00 }, 786 - { SX9324_REG_IRQ_CFG0, 0x00 }, 787 - { SX9324_REG_IRQ_CFG1, SX9324_REG_IRQ_CFG1_FAILCOND }, 788 - { SX9324_REG_IRQ_CFG2, 0x00 }, 789 - { SX9324_REG_GNRL_CTRL0, SX9324_REG_GNRL_CTRL0_SCANPERIOD_100MS }, 786 + { SX9324_REG_IRQ_CFG0, 0x00, "irq_cfg0" }, 787 + { SX9324_REG_IRQ_CFG1, SX9324_REG_IRQ_CFG1_FAILCOND, "irq_cfg1" }, 788 + { SX9324_REG_IRQ_CFG2, 0x00, "irq_cfg2" }, 789 + { SX9324_REG_GNRL_CTRL0, SX9324_REG_GNRL_CTRL0_SCANPERIOD_100MS, "gnrl_ctrl0" }, 790 790 /* 791 791 * The lower 4 bits should not be set as it enable sensors measurements. 792 792 * Turning the detection on before the configuration values are set to 793 793 * good values can cause the device to return erroneous readings. 794 794 */ 795 - { SX9324_REG_GNRL_CTRL1, SX9324_REG_GNRL_CTRL1_PAUSECTRL }, 795 + { SX9324_REG_GNRL_CTRL1, SX9324_REG_GNRL_CTRL1_PAUSECTRL, "gnrl_ctrl1" }, 796 796 797 - { SX9324_REG_AFE_CTRL0, SX9324_REG_AFE_CTRL0_RINT_LOWEST }, 798 - { SX9324_REG_AFE_CTRL3, 0x00 }, 797 + { SX9324_REG_AFE_CTRL0, SX9324_REG_AFE_CTRL0_RINT_LOWEST, "afe_ctrl0" }, 798 + { SX9324_REG_AFE_CTRL3, 0x00, "afe_ctrl3" }, 799 799 { SX9324_REG_AFE_CTRL4, SX9324_REG_AFE_CTRL4_FREQ_83_33HZ | 800 - SX9324_REG_AFE_CTRL4_RES_100 }, 801 - { SX9324_REG_AFE_CTRL6, 0x00 }, 800 + SX9324_REG_AFE_CTRL4_RES_100, "afe_ctrl4" }, 801 + { SX9324_REG_AFE_CTRL6, 0x00, "afe_ctrl6" }, 802 802 { SX9324_REG_AFE_CTRL7, SX9324_REG_AFE_CTRL4_FREQ_83_33HZ | 803 - SX9324_REG_AFE_CTRL4_RES_100 }, 803 + SX9324_REG_AFE_CTRL4_RES_100, "afe_ctrl7" }, 804 804 805 805 /* TODO(gwendal): PHx use chip default or all grounded? */ 806 - { SX9324_REG_AFE_PH0, 0x29 }, 807 - { SX9324_REG_AFE_PH1, 0x26 }, 808 - { SX9324_REG_AFE_PH2, 0x1a }, 809 - { SX9324_REG_AFE_PH3, 0x16 }, 806 + { SX9324_REG_AFE_PH0, 0x29, "afe_ph0" }, 807 + { SX9324_REG_AFE_PH1, 0x26, "afe_ph1" }, 808 + { SX9324_REG_AFE_PH2, 0x1a, "afe_ph2" }, 809 + { SX9324_REG_AFE_PH3, 0x16, "afe_ph3" }, 810 810 811 811 { SX9324_REG_AFE_CTRL8, SX9324_REG_AFE_CTRL8_RESERVED | 812 - SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM }, 813 - { SX9324_REG_AFE_CTRL9, SX9324_REG_AFE_CTRL9_AGAIN_1 }, 812 + SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM, "afe_ctrl8" }, 813 + { SX9324_REG_AFE_CTRL9, SX9324_REG_AFE_CTRL9_AGAIN_1, "afe_ctrl9" }, 814 814 815 815 { SX9324_REG_PROX_CTRL0, 816 816 SX9324_REG_PROX_CTRL0_GAIN_1 << SX9324_REG_PROX_CTRL0_GAIN_SHIFT | 817 - SX9324_REG_PROX_CTRL0_RAWFILT_1P50 }, 817 + SX9324_REG_PROX_CTRL0_RAWFILT_1P50, "prox_ctrl0" }, 818 818 { SX9324_REG_PROX_CTRL1, 819 819 SX9324_REG_PROX_CTRL0_GAIN_1 << SX9324_REG_PROX_CTRL0_GAIN_SHIFT | 820 - SX9324_REG_PROX_CTRL0_RAWFILT_1P50 }, 821 - { SX9324_REG_PROX_CTRL2, SX9324_REG_PROX_CTRL2_AVGNEG_THRESH_16K }, 820 + SX9324_REG_PROX_CTRL0_RAWFILT_1P50, "prox_ctrl1" }, 821 + { SX9324_REG_PROX_CTRL2, SX9324_REG_PROX_CTRL2_AVGNEG_THRESH_16K, "prox_ctrl2" }, 822 822 { SX9324_REG_PROX_CTRL3, SX9324_REG_PROX_CTRL3_AVGDEB_2SAMPLES | 823 - SX9324_REG_PROX_CTRL3_AVGPOS_THRESH_16K }, 823 + SX9324_REG_PROX_CTRL3_AVGPOS_THRESH_16K, "prox_ctrl3" }, 824 824 { SX9324_REG_PROX_CTRL4, SX9324_REG_PROX_CTRL4_AVGNEG_FILT_2 | 825 - SX9324_REG_PROX_CTRL4_AVGPOS_FILT_256 }, 826 - { SX9324_REG_PROX_CTRL5, 0x00 }, 827 - { SX9324_REG_PROX_CTRL6, SX9324_REG_PROX_CTRL6_PROXTHRESH_32 }, 828 - { SX9324_REG_PROX_CTRL7, SX9324_REG_PROX_CTRL6_PROXTHRESH_32 }, 829 - { SX9324_REG_ADV_CTRL0, 0x00 }, 830 - { SX9324_REG_ADV_CTRL1, 0x00 }, 831 - { SX9324_REG_ADV_CTRL2, 0x00 }, 832 - { SX9324_REG_ADV_CTRL3, 0x00 }, 833 - { SX9324_REG_ADV_CTRL4, 0x00 }, 825 + SX9324_REG_PROX_CTRL4_AVGPOS_FILT_256, "prox_ctrl4" }, 826 + { SX9324_REG_PROX_CTRL5, 0x00, "prox_ctrl5" }, 827 + { SX9324_REG_PROX_CTRL6, SX9324_REG_PROX_CTRL6_PROXTHRESH_32, "prox_ctrl6" }, 828 + { SX9324_REG_PROX_CTRL7, SX9324_REG_PROX_CTRL6_PROXTHRESH_32, "prox_ctrl7" }, 829 + { SX9324_REG_ADV_CTRL0, 0x00, "adv_ctrl0" }, 830 + { SX9324_REG_ADV_CTRL1, 0x00, "adv_ctrl1" }, 831 + { SX9324_REG_ADV_CTRL2, 0x00, "adv_ctrl2" }, 832 + { SX9324_REG_ADV_CTRL3, 0x00, "adv_ctrl3" }, 833 + { SX9324_REG_ADV_CTRL4, 0x00, "adv_ctrl4" }, 834 834 { SX9324_REG_ADV_CTRL5, SX9324_REG_ADV_CTRL5_STARTUP_SENSOR_1 | 835 - SX9324_REG_ADV_CTRL5_STARTUP_METHOD_1 }, 836 - { SX9324_REG_ADV_CTRL6, 0x00 }, 837 - { SX9324_REG_ADV_CTRL7, 0x00 }, 838 - { SX9324_REG_ADV_CTRL8, 0x00 }, 839 - { SX9324_REG_ADV_CTRL9, 0x00 }, 835 + SX9324_REG_ADV_CTRL5_STARTUP_METHOD_1, "adv_ctrl5" }, 836 + { SX9324_REG_ADV_CTRL6, 0x00, "adv_ctrl6" }, 837 + { SX9324_REG_ADV_CTRL7, 0x00, "adv_ctrl7" }, 838 + { SX9324_REG_ADV_CTRL8, 0x00, "adv_ctrl8" }, 839 + { SX9324_REG_ADV_CTRL9, 0x00, "adv_ctrl9" }, 840 840 /* Body/Table threshold */ 841 - { SX9324_REG_ADV_CTRL10, 0x00 }, 842 - { SX9324_REG_ADV_CTRL11, 0x00 }, 843 - { SX9324_REG_ADV_CTRL12, 0x00 }, 841 + { SX9324_REG_ADV_CTRL10, 0x00, "adv_ctrl10" }, 842 + { SX9324_REG_ADV_CTRL11, 0x00, "adv_ctrl11" }, 843 + { SX9324_REG_ADV_CTRL12, 0x00, "adv_ctrl12" }, 844 844 /* TODO(gwendal): SAR currenly disabled */ 845 - { SX9324_REG_ADV_CTRL13, 0x00 }, 846 - { SX9324_REG_ADV_CTRL14, 0x00 }, 847 - { SX9324_REG_ADV_CTRL15, 0x00 }, 848 - { SX9324_REG_ADV_CTRL16, 0x00 }, 849 - { SX9324_REG_ADV_CTRL17, 0x00 }, 850 - { SX9324_REG_ADV_CTRL18, 0x00 }, 851 - { SX9324_REG_ADV_CTRL19, SX9324_REG_ADV_CTRL19_HIGHT_FAILURE_THRESH_SATURATION }, 852 - { SX9324_REG_ADV_CTRL20, SX9324_REG_ADV_CTRL19_HIGHT_FAILURE_THRESH_SATURATION }, 845 + { SX9324_REG_ADV_CTRL13, 0x00, "adv_ctrl13" }, 846 + { SX9324_REG_ADV_CTRL14, 0x00, "adv_ctrl14" }, 847 + { SX9324_REG_ADV_CTRL15, 0x00, "adv_ctrl15" }, 848 + { SX9324_REG_ADV_CTRL16, 0x00, "adv_ctrl16" }, 849 + { SX9324_REG_ADV_CTRL17, 0x00, "adv_ctrl17" }, 850 + { SX9324_REG_ADV_CTRL18, 0x00, "adv_ctrl18" }, 851 + { SX9324_REG_ADV_CTRL19, 852 + SX9324_REG_ADV_CTRL19_HIGHT_FAILURE_THRESH_SATURATION, "adv_ctrl19" }, 853 + { SX9324_REG_ADV_CTRL20, 854 + SX9324_REG_ADV_CTRL19_HIGHT_FAILURE_THRESH_SATURATION, "adv_ctrl20" }, 853 855 }; 854 856 855 857 /* Activate all channels and perform an initial compensation. */ ··· 891 889 const char *res; 892 890 893 891 memcpy(reg_def, &sx9324_default_regs[idx], sizeof(*reg_def)); 892 + 893 + sx_common_get_raw_register_config(dev, reg_def); 894 894 switch (reg_def->reg) { 895 895 case SX9324_REG_AFE_PH0: 896 896 case SX9324_REG_AFE_PH1: 897 897 case SX9324_REG_AFE_PH2: 898 898 case SX9324_REG_AFE_PH3: 899 899 ph = reg_def->reg - SX9324_REG_AFE_PH0; 900 - scnprintf(prop, ARRAY_SIZE(prop), "semtech,ph%d-pin", ph); 900 + snprintf(prop, ARRAY_SIZE(prop), "semtech,ph%d-pin", ph); 901 901 902 902 count = device_property_count_u32(dev, prop); 903 903 if (count != ARRAY_SIZE(pin_defs))
+16 -16
drivers/iio/proximity/sx9360.c
··· 663 663 664 664 static const struct sx_common_reg_default sx9360_default_regs[] = { 665 665 { SX9360_REG_IRQ_MSK, 0x00 }, 666 - { SX9360_REG_IRQ_CFG, 0x00 }, 666 + { SX9360_REG_IRQ_CFG, 0x00, "irq_cfg" }, 667 667 /* 668 668 * The lower 2 bits should not be set as it enable sensors measurements. 669 669 * Turning the detection on before the configuration values are set to 670 670 * good values can cause the device to return erroneous readings. 671 671 */ 672 - { SX9360_REG_GNRL_CTRL0, 0x00 }, 673 - { SX9360_REG_GNRL_CTRL1, 0x00 }, 674 - { SX9360_REG_GNRL_CTRL2, SX9360_REG_GNRL_CTRL2_PERIOD_102MS }, 672 + { SX9360_REG_GNRL_CTRL0, 0x00, "gnrl_ctrl0" }, 673 + { SX9360_REG_GNRL_CTRL1, 0x00, "gnrl_ctrl1" }, 674 + { SX9360_REG_GNRL_CTRL2, SX9360_REG_GNRL_CTRL2_PERIOD_102MS, "gnrl_ctrl2" }, 675 675 676 - { SX9360_REG_AFE_CTRL1, SX9360_REG_AFE_CTRL1_RESFILTIN_0OHMS }, 676 + { SX9360_REG_AFE_CTRL1, SX9360_REG_AFE_CTRL1_RESFILTIN_0OHMS, "afe_ctrl0" }, 677 677 { SX9360_REG_AFE_PARAM0_PHR, SX9360_REG_AFE_PARAM0_RSVD | 678 - SX9360_REG_AFE_PARAM0_RESOLUTION_128 }, 678 + SX9360_REG_AFE_PARAM0_RESOLUTION_128, "afe_param0_phr" }, 679 679 { SX9360_REG_AFE_PARAM1_PHR, SX9360_REG_AFE_PARAM1_AGAIN_PHM_6PF | 680 - SX9360_REG_AFE_PARAM1_FREQ_83_33HZ }, 680 + SX9360_REG_AFE_PARAM1_FREQ_83_33HZ, "afe_param1_phr" }, 681 681 { SX9360_REG_AFE_PARAM0_PHM, SX9360_REG_AFE_PARAM0_RSVD | 682 - SX9360_REG_AFE_PARAM0_RESOLUTION_128 }, 682 + SX9360_REG_AFE_PARAM0_RESOLUTION_128, "afe_param0_phm" }, 683 683 { SX9360_REG_AFE_PARAM1_PHM, SX9360_REG_AFE_PARAM1_AGAIN_PHM_6PF | 684 - SX9360_REG_AFE_PARAM1_FREQ_83_33HZ }, 684 + SX9360_REG_AFE_PARAM1_FREQ_83_33HZ, "afe_param1_phm" }, 685 685 686 686 { SX9360_REG_PROX_CTRL0_PHR, SX9360_REG_PROX_CTRL0_GAIN_1 | 687 - SX9360_REG_PROX_CTRL0_RAWFILT_1P50 }, 687 + SX9360_REG_PROX_CTRL0_RAWFILT_1P50, "prox_ctrl0_phr" }, 688 688 { SX9360_REG_PROX_CTRL0_PHM, SX9360_REG_PROX_CTRL0_GAIN_1 | 689 - SX9360_REG_PROX_CTRL0_RAWFILT_1P50 }, 690 - { SX9360_REG_PROX_CTRL1, SX9360_REG_PROX_CTRL1_AVGNEG_THRESH_16K }, 689 + SX9360_REG_PROX_CTRL0_RAWFILT_1P50, "prox_ctrl0_phm" }, 690 + { SX9360_REG_PROX_CTRL1, SX9360_REG_PROX_CTRL1_AVGNEG_THRESH_16K, "prox_ctrl1" }, 691 691 { SX9360_REG_PROX_CTRL2, SX9360_REG_PROX_CTRL2_AVGDEB_2SAMPLES | 692 - SX9360_REG_PROX_CTRL2_AVGPOS_THRESH_16K }, 692 + SX9360_REG_PROX_CTRL2_AVGPOS_THRESH_16K, "prox_ctrl2" }, 693 693 { SX9360_REG_PROX_CTRL3, SX9360_REG_PROX_CTRL3_AVGNEG_FILT_2 | 694 - SX9360_REG_PROX_CTRL3_AVGPOS_FILT_256 }, 695 - { SX9360_REG_PROX_CTRL4, 0x00 }, 696 - { SX9360_REG_PROX_CTRL5, SX9360_REG_PROX_CTRL5_PROXTHRESH_32 }, 694 + SX9360_REG_PROX_CTRL3_AVGPOS_FILT_256, "prox_ctrl3" }, 695 + { SX9360_REG_PROX_CTRL4, 0x00, "prox_ctrl4" }, 696 + { SX9360_REG_PROX_CTRL5, SX9360_REG_PROX_CTRL5_PROXTHRESH_32, "prox_ctrl5" }, 697 697 }; 698 698 699 699 /* Activate all channels and perform an initial compensation. */
+2 -2
drivers/iio/proximity/sx9500.c
··· 1051 1051 static struct i2c_driver sx9500_driver = { 1052 1052 .driver = { 1053 1053 .name = SX9500_DRIVER_NAME, 1054 - .acpi_match_table = ACPI_PTR(sx9500_acpi_match), 1055 - .of_match_table = of_match_ptr(sx9500_of_match), 1054 + .acpi_match_table = sx9500_acpi_match, 1055 + .of_match_table = sx9500_of_match, 1056 1056 .pm = pm_sleep_ptr(&sx9500_pm_ops), 1057 1057 }, 1058 1058 .probe_new = sx9500_probe,
+21
drivers/iio/proximity/sx_common.c
··· 424 424 .postdisable = sx_common_buffer_postdisable, 425 425 }; 426 426 427 + void sx_common_get_raw_register_config(struct device *dev, 428 + struct sx_common_reg_default *reg_def) 429 + { 430 + #ifdef CONFIG_ACPI 431 + struct acpi_device *adev = ACPI_COMPANION(dev); 432 + u32 raw = 0, ret; 433 + char prop[80]; 434 + 435 + if (!reg_def->property || !adev) 436 + return; 437 + 438 + snprintf(prop, ARRAY_SIZE(prop), "%s,reg_%s", acpi_device_hid(adev), reg_def->property); 439 + ret = device_property_read_u32(dev, prop, &raw); 440 + if (ret) 441 + return; 442 + 443 + reg_def->def = raw; 444 + #endif 445 + } 446 + EXPORT_SYMBOL_NS_GPL(sx_common_get_raw_register_config, SEMTECH_PROX); 447 + 427 448 #define SX_COMMON_SOFT_RESET 0xde 428 449 429 450 static int sx_common_init_device(struct device *dev, struct iio_dev *indio_dev)
+5 -1
drivers/iio/proximity/sx_common.h
··· 8 8 #ifndef IIO_SX_COMMON_H 9 9 #define IIO_SX_COMMON_H 10 10 11 + #include <linux/acpi.h> 11 12 #include <linux/iio/iio.h> 12 13 #include <linux/iio/types.h> 13 14 #include <linux/regulator/consumer.h> ··· 27 26 struct sx_common_reg_default { 28 27 u8 reg; 29 28 u8 def; 29 + const char *property; 30 30 }; 31 31 32 32 /** ··· 103 101 * @client: I2C client structure. 104 102 * @trig: IIO trigger object. 105 103 * @regmap: Register map. 106 - * @num_default_regs: Number of default registers to set at init. 107 104 * @chan_prox_stat: Last reading of the proximity status for each channel. 108 105 * We only send an event to user space when this changes. 109 106 * @trigger_enabled: True when the device trigger is enabled. ··· 149 148 int sx_common_probe(struct i2c_client *client, 150 149 const struct sx_common_chip_info *chip_info, 151 150 const struct regmap_config *regmap_config); 151 + 152 + void sx_common_get_raw_register_config(struct device *dev, 153 + struct sx_common_reg_default *reg_def); 152 154 153 155 /* 3 is the number of events defined by a single phase. */ 154 156 extern const struct iio_event_spec sx_common_events[3];
+61 -19
drivers/iio/temperature/tmp117.c
··· 16 16 #include <linux/types.h> 17 17 #include <linux/kernel.h> 18 18 #include <linux/limits.h> 19 + #include <linux/property.h> 19 20 20 21 #include <linux/iio/iio.h> 21 22 ··· 32 31 #define TMP117_REG_DEVICE_ID 0xF 33 32 34 33 #define TMP117_RESOLUTION_10UC 78125 35 - #define TMP117_DEVICE_ID 0x0117 36 34 #define MICRODEGREE_PER_10MILLIDEGREE 10000 35 + 36 + #define TMP116_DEVICE_ID 0x1116 37 + #define TMP117_DEVICE_ID 0x0117 37 38 38 39 struct tmp117_data { 39 40 struct i2c_client *client; ··· 43 40 }; 44 41 45 42 static int tmp117_read_raw(struct iio_dev *indio_dev, 46 - struct iio_chan_spec const *channel, int *val, 47 - int *val2, long mask) 43 + struct iio_chan_spec const *channel, int *val, 44 + int *val2, long mask) 48 45 { 49 46 struct tmp117_data *data = iio_priv(indio_dev); 50 47 s32 ret; ··· 52 49 switch (mask) { 53 50 case IIO_CHAN_INFO_RAW: 54 51 ret = i2c_smbus_read_word_swapped(data->client, 55 - TMP117_REG_TEMP); 52 + TMP117_REG_TEMP); 56 53 if (ret < 0) 57 54 return ret; 58 55 *val = sign_extend32(ret, 15); ··· 60 57 61 58 case IIO_CHAN_INFO_CALIBBIAS: 62 59 ret = i2c_smbus_read_word_swapped(data->client, 63 - TMP117_REG_TEMP_OFFSET); 60 + TMP117_REG_TEMP_OFFSET); 64 61 if (ret < 0) 65 62 return ret; 66 63 *val = sign_extend32(ret, 15); ··· 82 79 } 83 80 } 84 81 85 - static int tmp117_write_raw(struct iio_dev *indio_dev, 86 - struct iio_chan_spec const *channel, int val, 87 - int val2, long mask) 82 + static int tmp117_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec 83 + const *channel, int val, int val2, long mask) 88 84 { 89 85 struct tmp117_data *data = iio_priv(indio_dev); 90 86 s16 off; ··· 106 104 { 107 105 .type = IIO_TEMP, 108 106 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 109 - BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_SCALE), 107 + BIT(IIO_CHAN_INFO_CALIBBIAS) | 108 + BIT(IIO_CHAN_INFO_SCALE), 109 + }, 110 + }; 111 + 112 + static const struct iio_chan_spec tmp116_channels[] = { 113 + { 114 + .type = IIO_TEMP, 115 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 116 + BIT(IIO_CHAN_INFO_SCALE), 110 117 }, 111 118 }; 112 119 ··· 126 115 127 116 static int tmp117_identify(struct i2c_client *client) 128 117 { 118 + const struct i2c_device_id *id; 119 + unsigned long match_data; 129 120 int dev_id; 130 121 131 122 dev_id = i2c_smbus_read_word_swapped(client, TMP117_REG_DEVICE_ID); 132 123 if (dev_id < 0) 133 124 return dev_id; 134 - if (dev_id != TMP117_DEVICE_ID) { 135 - dev_err(&client->dev, "TMP117 not found\n"); 136 - return -ENODEV; 125 + 126 + switch (dev_id) { 127 + case TMP116_DEVICE_ID: 128 + case TMP117_DEVICE_ID: 129 + return dev_id; 137 130 } 138 - return 0; 131 + 132 + dev_info(&client->dev, "Unknown device id (0x%x), use fallback compatible\n", 133 + dev_id); 134 + 135 + match_data = (uintptr_t)device_get_match_data(&client->dev); 136 + if (match_data) 137 + return match_data; 138 + 139 + id = i2c_client_get_device_id(client); 140 + if (id) 141 + return id->driver_data; 142 + 143 + dev_err(&client->dev, "Failed to identify unsupported device\n"); 144 + 145 + return -ENODEV; 139 146 } 140 147 141 148 static int tmp117_probe(struct i2c_client *client) 142 149 { 143 150 struct tmp117_data *data; 144 151 struct iio_dev *indio_dev; 145 - int ret; 152 + int ret, dev_id; 146 153 147 154 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) 148 155 return -EOPNOTSUPP; ··· 168 139 ret = tmp117_identify(client); 169 140 if (ret < 0) 170 141 return ret; 142 + 143 + dev_id = ret; 171 144 172 145 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 173 146 if (!indio_dev) ··· 179 148 data->client = client; 180 149 data->calibbias = 0; 181 150 182 - indio_dev->name = "tmp117"; 183 151 indio_dev->modes = INDIO_DIRECT_MODE; 184 152 indio_dev->info = &tmp117_info; 185 153 186 - indio_dev->channels = tmp117_channels; 187 - indio_dev->num_channels = ARRAY_SIZE(tmp117_channels); 154 + switch (dev_id) { 155 + case TMP116_DEVICE_ID: 156 + indio_dev->channels = tmp116_channels; 157 + indio_dev->num_channels = ARRAY_SIZE(tmp116_channels); 158 + indio_dev->name = "tmp116"; 159 + break; 160 + case TMP117_DEVICE_ID: 161 + indio_dev->channels = tmp117_channels; 162 + indio_dev->num_channels = ARRAY_SIZE(tmp117_channels); 163 + indio_dev->name = "tmp117"; 164 + break; 165 + } 188 166 189 167 return devm_iio_device_register(&client->dev, indio_dev); 190 168 } 191 169 192 170 static const struct of_device_id tmp117_of_match[] = { 193 - { .compatible = "ti,tmp117", }, 171 + { .compatible = "ti,tmp116", .data = (void *)TMP116_DEVICE_ID }, 172 + { .compatible = "ti,tmp117", .data = (void *)TMP117_DEVICE_ID }, 194 173 { } 195 174 }; 196 175 MODULE_DEVICE_TABLE(of, tmp117_of_match); 197 176 198 177 static const struct i2c_device_id tmp117_id[] = { 199 - { "tmp117", 0 }, 178 + { "tmp116", TMP116_DEVICE_ID }, 179 + { "tmp117", TMP117_DEVICE_ID }, 200 180 { } 201 181 }; 202 182 MODULE_DEVICE_TABLE(i2c, tmp117_id);
+1 -1
drivers/iio/trigger/iio-trig-loop.c
··· 46 46 set_freezable(); 47 47 48 48 do { 49 - iio_trigger_poll_chained(trig); 49 + iio_trigger_poll_nested(trig); 50 50 } while (likely(!kthread_freezable_should_stop(NULL))); 51 51 52 52 return 0;
-1
drivers/staging/iio/Kconfig
··· 10 10 source "drivers/staging/iio/addac/Kconfig" 11 11 source "drivers/staging/iio/frequency/Kconfig" 12 12 source "drivers/staging/iio/impedance-analyzer/Kconfig" 13 - source "drivers/staging/iio/meter/Kconfig" 14 13 source "drivers/staging/iio/resolver/Kconfig" 15 14 16 15 endmenu
-1
drivers/staging/iio/Makefile
··· 8 8 obj-y += addac/ 9 9 obj-y += frequency/ 10 10 obj-y += impedance-analyzer/ 11 - obj-y += meter/ 12 11 obj-y += resolver/
-37
drivers/staging/iio/meter/Kconfig
··· 1 - # SPDX-License-Identifier: GPL-2.0 2 - # 3 - # IIO meter drivers configuration 4 - # 5 - menu "Active energy metering IC" 6 - 7 - config ADE7854 8 - tristate "Analog Devices ADE7854/58/68/78 Polyphase Multifunction Energy Metering IC Driver" 9 - depends on SPI || I2C 10 - help 11 - Say yes here to build support for Analog Devices ADE7854/58/68/78 Polyphase 12 - Multifunction Energy Metering IC Driver. 13 - 14 - To compile this driver as a module, choose M here: the 15 - module will be called ade7854. 16 - 17 - config ADE7854_I2C 18 - tristate "support I2C bus connection" 19 - depends on ADE7854 && I2C 20 - default y 21 - help 22 - Say Y here if you have ADE7854/58/68/78 hooked to an I2C bus. 23 - 24 - To compile this driver as a module, choose M here: the 25 - module will be called ade7854-i2c. 26 - 27 - config ADE7854_SPI 28 - tristate "support SPI bus connection" 29 - depends on ADE7854 && SPI 30 - default y 31 - help 32 - Say Y here if you have ADE7854/58/68/78 hooked to a SPI bus. 33 - 34 - To compile this driver as a module, choose M here: the 35 - module will be called ade7854-spi. 36 - 37 - endmenu
-8
drivers/staging/iio/meter/Makefile
··· 1 - # SPDX-License-Identifier: GPL-2.0 2 - # 3 - # Makefile for metering ic drivers 4 - # 5 - 6 - obj-$(CONFIG_ADE7854) += ade7854.o 7 - obj-$(CONFIG_ADE7854_I2C) += ade7854-i2c.o 8 - obj-$(CONFIG_ADE7854_SPI) += ade7854-spi.o
-153
drivers/staging/iio/meter/ade7854-i2c.c
··· 1 - // SPDX-License-Identifier: GPL-2.0+ 2 - /* 3 - * ADE7854/58/68/78 Polyphase Multifunction Energy Metering IC Driver (I2C Bus) 4 - * 5 - * Copyright 2010 Analog Devices Inc. 6 - */ 7 - 8 - #include <linux/device.h> 9 - #include <linux/kernel.h> 10 - #include <linux/i2c.h> 11 - #include <linux/slab.h> 12 - #include <linux/module.h> 13 - 14 - #include <linux/iio/iio.h> 15 - #include "ade7854.h" 16 - 17 - static int ade7854_i2c_write_reg(struct device *dev, 18 - u16 reg_address, 19 - u32 val, 20 - int bits) 21 - { 22 - int ret; 23 - int count; 24 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 25 - struct ade7854_state *st = iio_priv(indio_dev); 26 - 27 - mutex_lock(&st->buf_lock); 28 - st->tx[0] = (reg_address >> 8) & 0xFF; 29 - st->tx[1] = reg_address & 0xFF; 30 - 31 - switch (bits) { 32 - case 8: 33 - st->tx[2] = val & 0xFF; 34 - count = 3; 35 - break; 36 - case 16: 37 - st->tx[2] = (val >> 8) & 0xFF; 38 - st->tx[3] = val & 0xFF; 39 - count = 4; 40 - break; 41 - case 24: 42 - st->tx[2] = (val >> 16) & 0xFF; 43 - st->tx[3] = (val >> 8) & 0xFF; 44 - st->tx[4] = val & 0xFF; 45 - count = 5; 46 - break; 47 - case 32: 48 - st->tx[2] = (val >> 24) & 0xFF; 49 - st->tx[3] = (val >> 16) & 0xFF; 50 - st->tx[4] = (val >> 8) & 0xFF; 51 - st->tx[5] = val & 0xFF; 52 - count = 6; 53 - break; 54 - default: 55 - ret = -EINVAL; 56 - goto unlock; 57 - } 58 - 59 - ret = i2c_master_send(st->i2c, st->tx, count); 60 - 61 - unlock: 62 - mutex_unlock(&st->buf_lock); 63 - 64 - if (ret < 0) 65 - return ret; 66 - 67 - return 0; 68 - } 69 - 70 - static int ade7854_i2c_read_reg(struct device *dev, 71 - u16 reg_address, 72 - u32 *val, 73 - int bits) 74 - { 75 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 76 - struct ade7854_state *st = iio_priv(indio_dev); 77 - int ret; 78 - 79 - mutex_lock(&st->buf_lock); 80 - st->tx[0] = (reg_address >> 8) & 0xFF; 81 - st->tx[1] = reg_address & 0xFF; 82 - 83 - ret = i2c_master_send(st->i2c, st->tx, 2); 84 - if (ret < 0) 85 - goto unlock; 86 - 87 - ret = i2c_master_recv(st->i2c, st->rx, bits); 88 - if (ret < 0) 89 - goto unlock; 90 - 91 - switch (bits) { 92 - case 8: 93 - *val = st->rx[0]; 94 - break; 95 - case 16: 96 - *val = (st->rx[0] << 8) | st->rx[1]; 97 - break; 98 - case 24: 99 - *val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2]; 100 - break; 101 - case 32: 102 - *val = (st->rx[0] << 24) | (st->rx[1] << 16) | 103 - (st->rx[2] << 8) | st->rx[3]; 104 - break; 105 - default: 106 - ret = -EINVAL; 107 - goto unlock; 108 - } 109 - 110 - unlock: 111 - mutex_unlock(&st->buf_lock); 112 - return ret; 113 - } 114 - 115 - static int ade7854_i2c_probe(struct i2c_client *client) 116 - { 117 - struct ade7854_state *st; 118 - struct iio_dev *indio_dev; 119 - 120 - indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st)); 121 - if (!indio_dev) 122 - return -ENOMEM; 123 - st = iio_priv(indio_dev); 124 - i2c_set_clientdata(client, indio_dev); 125 - st->read_reg = ade7854_i2c_read_reg; 126 - st->write_reg = ade7854_i2c_write_reg; 127 - st->i2c = client; 128 - st->irq = client->irq; 129 - 130 - return ade7854_probe(indio_dev, &client->dev); 131 - } 132 - 133 - static const struct i2c_device_id ade7854_id[] = { 134 - { "ade7854", 0 }, 135 - { "ade7858", 0 }, 136 - { "ade7868", 0 }, 137 - { "ade7878", 0 }, 138 - { } 139 - }; 140 - MODULE_DEVICE_TABLE(i2c, ade7854_id); 141 - 142 - static struct i2c_driver ade7854_i2c_driver = { 143 - .driver = { 144 - .name = "ade7854", 145 - }, 146 - .probe_new = ade7854_i2c_probe, 147 - .id_table = ade7854_id, 148 - }; 149 - module_i2c_driver(ade7854_i2c_driver); 150 - 151 - MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 152 - MODULE_DESCRIPTION("Analog Devices ADE7854/58/68/78 Polyphase Multifunction Energy Metering IC I2C Driver"); 153 - MODULE_LICENSE("GPL v2");
-160
drivers/staging/iio/meter/ade7854-spi.c
··· 1 - // SPDX-License-Identifier: GPL-2.0+ 2 - /* 3 - * ADE7854/58/68/78 Polyphase Multifunction Energy Metering IC Driver (SPI Bus) 4 - * 5 - * Copyright 2010 Analog Devices Inc. 6 - */ 7 - 8 - #include <linux/device.h> 9 - #include <linux/kernel.h> 10 - #include <linux/spi/spi.h> 11 - #include <linux/slab.h> 12 - #include <linux/module.h> 13 - 14 - #include <linux/iio/iio.h> 15 - #include "ade7854.h" 16 - 17 - static int ade7854_spi_write_reg(struct device *dev, 18 - u16 reg_address, 19 - u32 val, 20 - int bits) 21 - { 22 - int ret; 23 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 24 - struct ade7854_state *st = iio_priv(indio_dev); 25 - struct spi_transfer xfer = { 26 - .tx_buf = st->tx, 27 - .bits_per_word = 8, 28 - .len = 4, 29 - }; 30 - 31 - mutex_lock(&st->buf_lock); 32 - st->tx[0] = ADE7854_WRITE_REG; 33 - st->tx[1] = (reg_address >> 8) & 0xFF; 34 - st->tx[2] = reg_address & 0xFF; 35 - switch (bits) { 36 - case 8: 37 - st->tx[3] = val & 0xFF; 38 - break; 39 - case 16: 40 - xfer.len = 5; 41 - st->tx[3] = (val >> 8) & 0xFF; 42 - st->tx[4] = val & 0xFF; 43 - break; 44 - case 24: 45 - xfer.len = 6; 46 - st->tx[3] = (val >> 16) & 0xFF; 47 - st->tx[4] = (val >> 8) & 0xFF; 48 - st->tx[5] = val & 0xFF; 49 - break; 50 - case 32: 51 - xfer.len = 7; 52 - st->tx[3] = (val >> 24) & 0xFF; 53 - st->tx[4] = (val >> 16) & 0xFF; 54 - st->tx[5] = (val >> 8) & 0xFF; 55 - st->tx[6] = val & 0xFF; 56 - break; 57 - default: 58 - ret = -EINVAL; 59 - goto unlock; 60 - } 61 - 62 - ret = spi_sync_transfer(st->spi, &xfer, 1); 63 - unlock: 64 - mutex_unlock(&st->buf_lock); 65 - 66 - return ret; 67 - } 68 - 69 - static int ade7854_spi_read_reg(struct device *dev, 70 - u16 reg_address, 71 - u32 *val, 72 - int bits) 73 - { 74 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 75 - struct ade7854_state *st = iio_priv(indio_dev); 76 - int ret; 77 - struct spi_transfer xfers[] = { 78 - { 79 - .tx_buf = st->tx, 80 - .bits_per_word = 8, 81 - .len = 3, 82 - }, { 83 - .rx_buf = st->rx, 84 - .bits_per_word = 8, 85 - .len = bits, 86 - } 87 - }; 88 - 89 - mutex_lock(&st->buf_lock); 90 - 91 - st->tx[0] = ADE7854_READ_REG; 92 - st->tx[1] = (reg_address >> 8) & 0xFF; 93 - st->tx[2] = reg_address & 0xFF; 94 - 95 - ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers)); 96 - if (ret < 0) { 97 - dev_err(&st->spi->dev, "problem when reading register 0x%02X", 98 - reg_address); 99 - goto unlock; 100 - } 101 - 102 - switch (bits) { 103 - case 8: 104 - *val = st->rx[0]; 105 - break; 106 - case 16: 107 - *val = be16_to_cpup((const __be16 *)st->rx); 108 - break; 109 - case 24: 110 - *val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2]; 111 - break; 112 - case 32: 113 - *val = be32_to_cpup((const __be32 *)st->rx); 114 - break; 115 - } 116 - 117 - unlock: 118 - mutex_unlock(&st->buf_lock); 119 - return ret; 120 - } 121 - 122 - static int ade7854_spi_probe(struct spi_device *spi) 123 - { 124 - struct ade7854_state *st; 125 - struct iio_dev *indio_dev; 126 - 127 - indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 128 - if (!indio_dev) 129 - return -ENOMEM; 130 - st = iio_priv(indio_dev); 131 - spi_set_drvdata(spi, indio_dev); 132 - st->read_reg = ade7854_spi_read_reg; 133 - st->write_reg = ade7854_spi_write_reg; 134 - st->irq = spi->irq; 135 - st->spi = spi; 136 - 137 - return ade7854_probe(indio_dev, &spi->dev); 138 - } 139 - 140 - static const struct spi_device_id ade7854_id[] = { 141 - { "ade7854", 0 }, 142 - { "ade7858", 0 }, 143 - { "ade7868", 0 }, 144 - { "ade7878", 0 }, 145 - { } 146 - }; 147 - MODULE_DEVICE_TABLE(spi, ade7854_id); 148 - 149 - static struct spi_driver ade7854_driver = { 150 - .driver = { 151 - .name = "ade7854", 152 - }, 153 - .probe = ade7854_spi_probe, 154 - .id_table = ade7854_id, 155 - }; 156 - module_spi_driver(ade7854_driver); 157 - 158 - MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 159 - MODULE_DESCRIPTION("Analog Devices ADE7854/58/68/78 SPI Driver"); 160 - MODULE_LICENSE("GPL v2");
-556
drivers/staging/iio/meter/ade7854.c
··· 1 - // SPDX-License-Identifier: GPL-2.0+ 2 - /* 3 - * ADE7854/58/68/78 Polyphase Multifunction Energy Metering IC Driver 4 - * 5 - * Copyright 2010 Analog Devices Inc. 6 - */ 7 - 8 - #include <linux/interrupt.h> 9 - #include <linux/irq.h> 10 - #include <linux/delay.h> 11 - #include <linux/mutex.h> 12 - #include <linux/device.h> 13 - #include <linux/kernel.h> 14 - #include <linux/slab.h> 15 - #include <linux/sysfs.h> 16 - #include <linux/list.h> 17 - #include <linux/module.h> 18 - 19 - #include <linux/iio/iio.h> 20 - #include <linux/iio/sysfs.h> 21 - #include "meter.h" 22 - #include "ade7854.h" 23 - 24 - static ssize_t ade7854_read_8bit(struct device *dev, 25 - struct device_attribute *attr, 26 - char *buf) 27 - { 28 - int ret; 29 - u32 val = 0; 30 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 31 - struct ade7854_state *st = iio_priv(indio_dev); 32 - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 33 - 34 - ret = st->read_reg(dev, this_attr->address, &val, 8); 35 - if (ret < 0) 36 - return ret; 37 - 38 - return sprintf(buf, "%u\n", val); 39 - } 40 - 41 - static ssize_t ade7854_read_16bit(struct device *dev, 42 - struct device_attribute *attr, 43 - char *buf) 44 - { 45 - int ret; 46 - u32 val = 0; 47 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 48 - struct ade7854_state *st = iio_priv(indio_dev); 49 - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 50 - 51 - ret = st->read_reg(dev, this_attr->address, &val, 16); 52 - if (ret < 0) 53 - return ret; 54 - 55 - return sprintf(buf, "%u\n", val); 56 - } 57 - 58 - static ssize_t ade7854_read_24bit(struct device *dev, 59 - struct device_attribute *attr, 60 - char *buf) 61 - { 62 - int ret; 63 - u32 val; 64 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 65 - struct ade7854_state *st = iio_priv(indio_dev); 66 - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 67 - 68 - ret = st->read_reg(dev, this_attr->address, &val, 24); 69 - if (ret < 0) 70 - return ret; 71 - 72 - return sprintf(buf, "%u\n", val); 73 - } 74 - 75 - static ssize_t ade7854_read_32bit(struct device *dev, 76 - struct device_attribute *attr, 77 - char *buf) 78 - { 79 - int ret; 80 - u32 val = 0; 81 - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 82 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 83 - struct ade7854_state *st = iio_priv(indio_dev); 84 - 85 - ret = st->read_reg(dev, this_attr->address, &val, 32); 86 - if (ret < 0) 87 - return ret; 88 - 89 - return sprintf(buf, "%u\n", val); 90 - } 91 - 92 - static ssize_t ade7854_write_8bit(struct device *dev, 93 - struct device_attribute *attr, 94 - const char *buf, 95 - size_t len) 96 - { 97 - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 98 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 99 - struct ade7854_state *st = iio_priv(indio_dev); 100 - 101 - int ret; 102 - u8 val; 103 - 104 - ret = kstrtou8(buf, 10, &val); 105 - if (ret) 106 - goto error_ret; 107 - ret = st->write_reg(dev, this_attr->address, val, 8); 108 - 109 - error_ret: 110 - return ret ? ret : len; 111 - } 112 - 113 - static ssize_t ade7854_write_16bit(struct device *dev, 114 - struct device_attribute *attr, 115 - const char *buf, 116 - size_t len) 117 - { 118 - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 119 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 120 - struct ade7854_state *st = iio_priv(indio_dev); 121 - 122 - int ret; 123 - u16 val; 124 - 125 - ret = kstrtou16(buf, 10, &val); 126 - if (ret) 127 - goto error_ret; 128 - ret = st->write_reg(dev, this_attr->address, val, 16); 129 - 130 - error_ret: 131 - return ret ? ret : len; 132 - } 133 - 134 - static ssize_t ade7854_write_24bit(struct device *dev, 135 - struct device_attribute *attr, 136 - const char *buf, 137 - size_t len) 138 - { 139 - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 140 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 141 - struct ade7854_state *st = iio_priv(indio_dev); 142 - 143 - int ret; 144 - u32 val; 145 - 146 - ret = kstrtou32(buf, 10, &val); 147 - if (ret) 148 - goto error_ret; 149 - ret = st->write_reg(dev, this_attr->address, val, 24); 150 - 151 - error_ret: 152 - return ret ? ret : len; 153 - } 154 - 155 - static ssize_t ade7854_write_32bit(struct device *dev, 156 - struct device_attribute *attr, 157 - const char *buf, 158 - size_t len) 159 - { 160 - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 161 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 162 - struct ade7854_state *st = iio_priv(indio_dev); 163 - 164 - int ret; 165 - u32 val; 166 - 167 - ret = kstrtou32(buf, 10, &val); 168 - if (ret) 169 - goto error_ret; 170 - ret = st->write_reg(dev, this_attr->address, val, 32); 171 - 172 - error_ret: 173 - return ret ? ret : len; 174 - } 175 - 176 - static int ade7854_reset(struct device *dev) 177 - { 178 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 179 - struct ade7854_state *st = iio_priv(indio_dev); 180 - u32 val; 181 - 182 - st->read_reg(dev, ADE7854_CONFIG, &val, 16); 183 - val |= BIT(7); /* Software Chip Reset */ 184 - 185 - return st->write_reg(dev, ADE7854_CONFIG, val, 16); 186 - } 187 - 188 - static IIO_DEV_ATTR_AIGAIN(0644, 189 - ade7854_read_24bit, 190 - ade7854_write_24bit, 191 - ADE7854_AIGAIN); 192 - static IIO_DEV_ATTR_BIGAIN(0644, 193 - ade7854_read_24bit, 194 - ade7854_write_24bit, 195 - ADE7854_BIGAIN); 196 - static IIO_DEV_ATTR_CIGAIN(0644, 197 - ade7854_read_24bit, 198 - ade7854_write_24bit, 199 - ADE7854_CIGAIN); 200 - static IIO_DEV_ATTR_NIGAIN(0644, 201 - ade7854_read_24bit, 202 - ade7854_write_24bit, 203 - ADE7854_NIGAIN); 204 - static IIO_DEV_ATTR_AVGAIN(0644, 205 - ade7854_read_24bit, 206 - ade7854_write_24bit, 207 - ADE7854_AVGAIN); 208 - static IIO_DEV_ATTR_BVGAIN(0644, 209 - ade7854_read_24bit, 210 - ade7854_write_24bit, 211 - ADE7854_BVGAIN); 212 - static IIO_DEV_ATTR_CVGAIN(0644, 213 - ade7854_read_24bit, 214 - ade7854_write_24bit, 215 - ADE7854_CVGAIN); 216 - static IIO_DEV_ATTR_APPARENT_POWER_A_GAIN(0644, 217 - ade7854_read_24bit, 218 - ade7854_write_24bit, 219 - ADE7854_AVAGAIN); 220 - static IIO_DEV_ATTR_APPARENT_POWER_B_GAIN(0644, 221 - ade7854_read_24bit, 222 - ade7854_write_24bit, 223 - ADE7854_BVAGAIN); 224 - static IIO_DEV_ATTR_APPARENT_POWER_C_GAIN(0644, 225 - ade7854_read_24bit, 226 - ade7854_write_24bit, 227 - ADE7854_CVAGAIN); 228 - static IIO_DEV_ATTR_ACTIVE_POWER_A_OFFSET(0644, 229 - ade7854_read_24bit, 230 - ade7854_write_24bit, 231 - ADE7854_AWATTOS); 232 - static IIO_DEV_ATTR_ACTIVE_POWER_B_OFFSET(0644, 233 - ade7854_read_24bit, 234 - ade7854_write_24bit, 235 - ADE7854_BWATTOS); 236 - static IIO_DEV_ATTR_ACTIVE_POWER_C_OFFSET(0644, 237 - ade7854_read_24bit, 238 - ade7854_write_24bit, 239 - ADE7854_CWATTOS); 240 - static IIO_DEV_ATTR_REACTIVE_POWER_A_GAIN(0644, 241 - ade7854_read_24bit, 242 - ade7854_write_24bit, 243 - ADE7854_AVARGAIN); 244 - static IIO_DEV_ATTR_REACTIVE_POWER_B_GAIN(0644, 245 - ade7854_read_24bit, 246 - ade7854_write_24bit, 247 - ADE7854_BVARGAIN); 248 - static IIO_DEV_ATTR_REACTIVE_POWER_C_GAIN(0644, 249 - ade7854_read_24bit, 250 - ade7854_write_24bit, 251 - ADE7854_CVARGAIN); 252 - static IIO_DEV_ATTR_REACTIVE_POWER_A_OFFSET(0644, 253 - ade7854_read_24bit, 254 - ade7854_write_24bit, 255 - ADE7854_AVAROS); 256 - static IIO_DEV_ATTR_REACTIVE_POWER_B_OFFSET(0644, 257 - ade7854_read_24bit, 258 - ade7854_write_24bit, 259 - ADE7854_BVAROS); 260 - static IIO_DEV_ATTR_REACTIVE_POWER_C_OFFSET(0644, 261 - ade7854_read_24bit, 262 - ade7854_write_24bit, 263 - ADE7854_CVAROS); 264 - static IIO_DEV_ATTR_VPEAK(0644, 265 - ade7854_read_32bit, 266 - ade7854_write_32bit, 267 - ADE7854_VPEAK); 268 - static IIO_DEV_ATTR_IPEAK(0644, 269 - ade7854_read_32bit, 270 - ade7854_write_32bit, 271 - ADE7854_IPEAK); 272 - static IIO_DEV_ATTR_APHCAL(0644, 273 - ade7854_read_16bit, 274 - ade7854_write_16bit, 275 - ADE7854_APHCAL); 276 - static IIO_DEV_ATTR_BPHCAL(0644, 277 - ade7854_read_16bit, 278 - ade7854_write_16bit, 279 - ADE7854_BPHCAL); 280 - static IIO_DEV_ATTR_CPHCAL(0644, 281 - ade7854_read_16bit, 282 - ade7854_write_16bit, 283 - ADE7854_CPHCAL); 284 - static IIO_DEV_ATTR_CF1DEN(0644, 285 - ade7854_read_16bit, 286 - ade7854_write_16bit, 287 - ADE7854_CF1DEN); 288 - static IIO_DEV_ATTR_CF2DEN(0644, 289 - ade7854_read_16bit, 290 - ade7854_write_16bit, 291 - ADE7854_CF2DEN); 292 - static IIO_DEV_ATTR_CF3DEN(0644, 293 - ade7854_read_16bit, 294 - ade7854_write_16bit, 295 - ADE7854_CF3DEN); 296 - static IIO_DEV_ATTR_LINECYC(0644, 297 - ade7854_read_16bit, 298 - ade7854_write_16bit, 299 - ADE7854_LINECYC); 300 - static IIO_DEV_ATTR_SAGCYC(0644, 301 - ade7854_read_8bit, 302 - ade7854_write_8bit, 303 - ADE7854_SAGCYC); 304 - static IIO_DEV_ATTR_CFCYC(0644, 305 - ade7854_read_8bit, 306 - ade7854_write_8bit, 307 - ADE7854_CFCYC); 308 - static IIO_DEV_ATTR_PEAKCYC(0644, 309 - ade7854_read_8bit, 310 - ade7854_write_8bit, 311 - ADE7854_PEAKCYC); 312 - static IIO_DEV_ATTR_CHKSUM(ade7854_read_24bit, 313 - ADE7854_CHECKSUM); 314 - static IIO_DEV_ATTR_ANGLE0(ade7854_read_24bit, 315 - ADE7854_ANGLE0); 316 - static IIO_DEV_ATTR_ANGLE1(ade7854_read_24bit, 317 - ADE7854_ANGLE1); 318 - static IIO_DEV_ATTR_ANGLE2(ade7854_read_24bit, 319 - ADE7854_ANGLE2); 320 - static IIO_DEV_ATTR_AIRMS(0444, 321 - ade7854_read_24bit, 322 - NULL, 323 - ADE7854_AIRMS); 324 - static IIO_DEV_ATTR_BIRMS(0444, 325 - ade7854_read_24bit, 326 - NULL, 327 - ADE7854_BIRMS); 328 - static IIO_DEV_ATTR_CIRMS(0444, 329 - ade7854_read_24bit, 330 - NULL, 331 - ADE7854_CIRMS); 332 - static IIO_DEV_ATTR_NIRMS(0444, 333 - ade7854_read_24bit, 334 - NULL, 335 - ADE7854_NIRMS); 336 - static IIO_DEV_ATTR_AVRMS(0444, 337 - ade7854_read_24bit, 338 - NULL, 339 - ADE7854_AVRMS); 340 - static IIO_DEV_ATTR_BVRMS(0444, 341 - ade7854_read_24bit, 342 - NULL, 343 - ADE7854_BVRMS); 344 - static IIO_DEV_ATTR_CVRMS(0444, 345 - ade7854_read_24bit, 346 - NULL, 347 - ADE7854_CVRMS); 348 - static IIO_DEV_ATTR_AIRMSOS(0444, 349 - ade7854_read_16bit, 350 - ade7854_write_16bit, 351 - ADE7854_AIRMSOS); 352 - static IIO_DEV_ATTR_BIRMSOS(0444, 353 - ade7854_read_16bit, 354 - ade7854_write_16bit, 355 - ADE7854_BIRMSOS); 356 - static IIO_DEV_ATTR_CIRMSOS(0444, 357 - ade7854_read_16bit, 358 - ade7854_write_16bit, 359 - ADE7854_CIRMSOS); 360 - static IIO_DEV_ATTR_AVRMSOS(0444, 361 - ade7854_read_16bit, 362 - ade7854_write_16bit, 363 - ADE7854_AVRMSOS); 364 - static IIO_DEV_ATTR_BVRMSOS(0444, 365 - ade7854_read_16bit, 366 - ade7854_write_16bit, 367 - ADE7854_BVRMSOS); 368 - static IIO_DEV_ATTR_CVRMSOS(0444, 369 - ade7854_read_16bit, 370 - ade7854_write_16bit, 371 - ADE7854_CVRMSOS); 372 - static IIO_DEV_ATTR_VOLT_A(ade7854_read_24bit, 373 - ADE7854_VAWV); 374 - static IIO_DEV_ATTR_VOLT_B(ade7854_read_24bit, 375 - ADE7854_VBWV); 376 - static IIO_DEV_ATTR_VOLT_C(ade7854_read_24bit, 377 - ADE7854_VCWV); 378 - static IIO_DEV_ATTR_CURRENT_A(ade7854_read_24bit, 379 - ADE7854_IAWV); 380 - static IIO_DEV_ATTR_CURRENT_B(ade7854_read_24bit, 381 - ADE7854_IBWV); 382 - static IIO_DEV_ATTR_CURRENT_C(ade7854_read_24bit, 383 - ADE7854_ICWV); 384 - static IIO_DEV_ATTR_AWATTHR(ade7854_read_32bit, 385 - ADE7854_AWATTHR); 386 - static IIO_DEV_ATTR_BWATTHR(ade7854_read_32bit, 387 - ADE7854_BWATTHR); 388 - static IIO_DEV_ATTR_CWATTHR(ade7854_read_32bit, 389 - ADE7854_CWATTHR); 390 - static IIO_DEV_ATTR_AFWATTHR(ade7854_read_32bit, 391 - ADE7854_AFWATTHR); 392 - static IIO_DEV_ATTR_BFWATTHR(ade7854_read_32bit, 393 - ADE7854_BFWATTHR); 394 - static IIO_DEV_ATTR_CFWATTHR(ade7854_read_32bit, 395 - ADE7854_CFWATTHR); 396 - static IIO_DEV_ATTR_AVARHR(ade7854_read_32bit, 397 - ADE7854_AVARHR); 398 - static IIO_DEV_ATTR_BVARHR(ade7854_read_32bit, 399 - ADE7854_BVARHR); 400 - static IIO_DEV_ATTR_CVARHR(ade7854_read_32bit, 401 - ADE7854_CVARHR); 402 - static IIO_DEV_ATTR_AVAHR(ade7854_read_32bit, 403 - ADE7854_AVAHR); 404 - static IIO_DEV_ATTR_BVAHR(ade7854_read_32bit, 405 - ADE7854_BVAHR); 406 - static IIO_DEV_ATTR_CVAHR(ade7854_read_32bit, 407 - ADE7854_CVAHR); 408 - 409 - static int ade7854_set_irq(struct device *dev, bool enable) 410 - { 411 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 412 - struct ade7854_state *st = iio_priv(indio_dev); 413 - 414 - int ret; 415 - u32 irqen; 416 - 417 - ret = st->read_reg(dev, ADE7854_MASK0, &irqen, 32); 418 - if (ret < 0) 419 - return ret; 420 - 421 - if (enable) 422 - irqen |= BIT(17); /* 1: interrupt enabled when all periodical 423 - * (at 8 kHz rate) DSP computations finish. 424 - */ 425 - else 426 - irqen &= ~BIT(17); 427 - 428 - return st->write_reg(dev, ADE7854_MASK0, irqen, 32); 429 - } 430 - 431 - static int ade7854_initial_setup(struct iio_dev *indio_dev) 432 - { 433 - int ret; 434 - struct device *dev = &indio_dev->dev; 435 - 436 - /* Disable IRQ */ 437 - ret = ade7854_set_irq(dev, false); 438 - if (ret) { 439 - dev_err(dev, "disable irq failed"); 440 - goto err_ret; 441 - } 442 - 443 - ade7854_reset(dev); 444 - usleep_range(ADE7854_STARTUP_DELAY, ADE7854_STARTUP_DELAY + 100); 445 - 446 - err_ret: 447 - return ret; 448 - } 449 - 450 - static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("8000"); 451 - 452 - static IIO_CONST_ATTR(name, "ade7854"); 453 - 454 - static struct attribute *ade7854_attributes[] = { 455 - &iio_dev_attr_aigain.dev_attr.attr, 456 - &iio_dev_attr_bigain.dev_attr.attr, 457 - &iio_dev_attr_cigain.dev_attr.attr, 458 - &iio_dev_attr_nigain.dev_attr.attr, 459 - &iio_dev_attr_avgain.dev_attr.attr, 460 - &iio_dev_attr_bvgain.dev_attr.attr, 461 - &iio_dev_attr_cvgain.dev_attr.attr, 462 - &iio_dev_attr_linecyc.dev_attr.attr, 463 - &iio_dev_attr_sagcyc.dev_attr.attr, 464 - &iio_dev_attr_cfcyc.dev_attr.attr, 465 - &iio_dev_attr_peakcyc.dev_attr.attr, 466 - &iio_dev_attr_chksum.dev_attr.attr, 467 - &iio_dev_attr_apparent_power_a_gain.dev_attr.attr, 468 - &iio_dev_attr_apparent_power_b_gain.dev_attr.attr, 469 - &iio_dev_attr_apparent_power_c_gain.dev_attr.attr, 470 - &iio_dev_attr_active_power_a_offset.dev_attr.attr, 471 - &iio_dev_attr_active_power_b_offset.dev_attr.attr, 472 - &iio_dev_attr_active_power_c_offset.dev_attr.attr, 473 - &iio_dev_attr_reactive_power_a_gain.dev_attr.attr, 474 - &iio_dev_attr_reactive_power_b_gain.dev_attr.attr, 475 - &iio_dev_attr_reactive_power_c_gain.dev_attr.attr, 476 - &iio_dev_attr_reactive_power_a_offset.dev_attr.attr, 477 - &iio_dev_attr_reactive_power_b_offset.dev_attr.attr, 478 - &iio_dev_attr_reactive_power_c_offset.dev_attr.attr, 479 - &iio_dev_attr_awatthr.dev_attr.attr, 480 - &iio_dev_attr_bwatthr.dev_attr.attr, 481 - &iio_dev_attr_cwatthr.dev_attr.attr, 482 - &iio_dev_attr_afwatthr.dev_attr.attr, 483 - &iio_dev_attr_bfwatthr.dev_attr.attr, 484 - &iio_dev_attr_cfwatthr.dev_attr.attr, 485 - &iio_dev_attr_avarhr.dev_attr.attr, 486 - &iio_dev_attr_bvarhr.dev_attr.attr, 487 - &iio_dev_attr_cvarhr.dev_attr.attr, 488 - &iio_dev_attr_angle0.dev_attr.attr, 489 - &iio_dev_attr_angle1.dev_attr.attr, 490 - &iio_dev_attr_angle2.dev_attr.attr, 491 - &iio_dev_attr_avahr.dev_attr.attr, 492 - &iio_dev_attr_bvahr.dev_attr.attr, 493 - &iio_dev_attr_cvahr.dev_attr.attr, 494 - &iio_const_attr_sampling_frequency_available.dev_attr.attr, 495 - &iio_const_attr_name.dev_attr.attr, 496 - &iio_dev_attr_vpeak.dev_attr.attr, 497 - &iio_dev_attr_ipeak.dev_attr.attr, 498 - &iio_dev_attr_aphcal.dev_attr.attr, 499 - &iio_dev_attr_bphcal.dev_attr.attr, 500 - &iio_dev_attr_cphcal.dev_attr.attr, 501 - &iio_dev_attr_cf1den.dev_attr.attr, 502 - &iio_dev_attr_cf2den.dev_attr.attr, 503 - &iio_dev_attr_cf3den.dev_attr.attr, 504 - &iio_dev_attr_airms.dev_attr.attr, 505 - &iio_dev_attr_birms.dev_attr.attr, 506 - &iio_dev_attr_cirms.dev_attr.attr, 507 - &iio_dev_attr_nirms.dev_attr.attr, 508 - &iio_dev_attr_avrms.dev_attr.attr, 509 - &iio_dev_attr_bvrms.dev_attr.attr, 510 - &iio_dev_attr_cvrms.dev_attr.attr, 511 - &iio_dev_attr_airmsos.dev_attr.attr, 512 - &iio_dev_attr_birmsos.dev_attr.attr, 513 - &iio_dev_attr_cirmsos.dev_attr.attr, 514 - &iio_dev_attr_avrmsos.dev_attr.attr, 515 - &iio_dev_attr_bvrmsos.dev_attr.attr, 516 - &iio_dev_attr_cvrmsos.dev_attr.attr, 517 - &iio_dev_attr_volt_a.dev_attr.attr, 518 - &iio_dev_attr_volt_b.dev_attr.attr, 519 - &iio_dev_attr_volt_c.dev_attr.attr, 520 - &iio_dev_attr_current_a.dev_attr.attr, 521 - &iio_dev_attr_current_b.dev_attr.attr, 522 - &iio_dev_attr_current_c.dev_attr.attr, 523 - NULL, 524 - }; 525 - 526 - static const struct attribute_group ade7854_attribute_group = { 527 - .attrs = ade7854_attributes, 528 - }; 529 - 530 - static const struct iio_info ade7854_info = { 531 - .attrs = &ade7854_attribute_group, 532 - }; 533 - 534 - int ade7854_probe(struct iio_dev *indio_dev, struct device *dev) 535 - { 536 - int ret; 537 - struct ade7854_state *st = iio_priv(indio_dev); 538 - /* setup the industrialio driver allocated elements */ 539 - mutex_init(&st->buf_lock); 540 - 541 - indio_dev->dev.parent = dev; 542 - indio_dev->info = &ade7854_info; 543 - indio_dev->modes = INDIO_DIRECT_MODE; 544 - 545 - ret = devm_iio_device_register(dev, indio_dev); 546 - if (ret) 547 - return ret; 548 - 549 - /* Get the device into a sane initial state */ 550 - return ade7854_initial_setup(indio_dev); 551 - } 552 - EXPORT_SYMBOL(ade7854_probe); 553 - 554 - MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 555 - MODULE_DESCRIPTION("Analog Devices ADE7854/58/68/78 Polyphase Energy Meter"); 556 - MODULE_LICENSE("GPL v2");
-173
drivers/staging/iio/meter/ade7854.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - #ifndef _ADE7854_H 3 - #define _ADE7854_H 4 - 5 - #define ADE7854_AIGAIN 0x4380 6 - #define ADE7854_AVGAIN 0x4381 7 - #define ADE7854_BIGAIN 0x4382 8 - #define ADE7854_BVGAIN 0x4383 9 - #define ADE7854_CIGAIN 0x4384 10 - #define ADE7854_CVGAIN 0x4385 11 - #define ADE7854_NIGAIN 0x4386 12 - #define ADE7854_AIRMSOS 0x4387 13 - #define ADE7854_AVRMSOS 0x4388 14 - #define ADE7854_BIRMSOS 0x4389 15 - #define ADE7854_BVRMSOS 0x438A 16 - #define ADE7854_CIRMSOS 0x438B 17 - #define ADE7854_CVRMSOS 0x438C 18 - #define ADE7854_NIRMSOS 0x438D 19 - #define ADE7854_AVAGAIN 0x438E 20 - #define ADE7854_BVAGAIN 0x438F 21 - #define ADE7854_CVAGAIN 0x4390 22 - #define ADE7854_AWGAIN 0x4391 23 - #define ADE7854_AWATTOS 0x4392 24 - #define ADE7854_BWGAIN 0x4393 25 - #define ADE7854_BWATTOS 0x4394 26 - #define ADE7854_CWGAIN 0x4395 27 - #define ADE7854_CWATTOS 0x4396 28 - #define ADE7854_AVARGAIN 0x4397 29 - #define ADE7854_AVAROS 0x4398 30 - #define ADE7854_BVARGAIN 0x4399 31 - #define ADE7854_BVAROS 0x439A 32 - #define ADE7854_CVARGAIN 0x439B 33 - #define ADE7854_CVAROS 0x439C 34 - #define ADE7854_AFWGAIN 0x439D 35 - #define ADE7854_AFWATTOS 0x439E 36 - #define ADE7854_BFWGAIN 0x439F 37 - #define ADE7854_BFWATTOS 0x43A0 38 - #define ADE7854_CFWGAIN 0x43A1 39 - #define ADE7854_CFWATTOS 0x43A2 40 - #define ADE7854_AFVARGAIN 0x43A3 41 - #define ADE7854_AFVAROS 0x43A4 42 - #define ADE7854_BFVARGAIN 0x43A5 43 - #define ADE7854_BFVAROS 0x43A6 44 - #define ADE7854_CFVARGAIN 0x43A7 45 - #define ADE7854_CFVAROS 0x43A8 46 - #define ADE7854_VATHR1 0x43A9 47 - #define ADE7854_VATHR0 0x43AA 48 - #define ADE7854_WTHR1 0x43AB 49 - #define ADE7854_WTHR0 0x43AC 50 - #define ADE7854_VARTHR1 0x43AD 51 - #define ADE7854_VARTHR0 0x43AE 52 - #define ADE7854_RSV 0x43AF 53 - #define ADE7854_VANOLOAD 0x43B0 54 - #define ADE7854_APNOLOAD 0x43B1 55 - #define ADE7854_VARNOLOAD 0x43B2 56 - #define ADE7854_VLEVEL 0x43B3 57 - #define ADE7854_DICOEFF 0x43B5 58 - #define ADE7854_HPFDIS 0x43B6 59 - #define ADE7854_ISUMLVL 0x43B8 60 - #define ADE7854_ISUM 0x43BF 61 - #define ADE7854_AIRMS 0x43C0 62 - #define ADE7854_AVRMS 0x43C1 63 - #define ADE7854_BIRMS 0x43C2 64 - #define ADE7854_BVRMS 0x43C3 65 - #define ADE7854_CIRMS 0x43C4 66 - #define ADE7854_CVRMS 0x43C5 67 - #define ADE7854_NIRMS 0x43C6 68 - #define ADE7854_RUN 0xE228 69 - #define ADE7854_AWATTHR 0xE400 70 - #define ADE7854_BWATTHR 0xE401 71 - #define ADE7854_CWATTHR 0xE402 72 - #define ADE7854_AFWATTHR 0xE403 73 - #define ADE7854_BFWATTHR 0xE404 74 - #define ADE7854_CFWATTHR 0xE405 75 - #define ADE7854_AVARHR 0xE406 76 - #define ADE7854_BVARHR 0xE407 77 - #define ADE7854_CVARHR 0xE408 78 - #define ADE7854_AFVARHR 0xE409 79 - #define ADE7854_BFVARHR 0xE40A 80 - #define ADE7854_CFVARHR 0xE40B 81 - #define ADE7854_AVAHR 0xE40C 82 - #define ADE7854_BVAHR 0xE40D 83 - #define ADE7854_CVAHR 0xE40E 84 - #define ADE7854_IPEAK 0xE500 85 - #define ADE7854_VPEAK 0xE501 86 - #define ADE7854_STATUS0 0xE502 87 - #define ADE7854_STATUS1 0xE503 88 - #define ADE7854_OILVL 0xE507 89 - #define ADE7854_OVLVL 0xE508 90 - #define ADE7854_SAGLVL 0xE509 91 - #define ADE7854_MASK0 0xE50A 92 - #define ADE7854_MASK1 0xE50B 93 - #define ADE7854_IAWV 0xE50C 94 - #define ADE7854_IBWV 0xE50D 95 - #define ADE7854_ICWV 0xE50E 96 - #define ADE7854_VAWV 0xE510 97 - #define ADE7854_VBWV 0xE511 98 - #define ADE7854_VCWV 0xE512 99 - #define ADE7854_AWATT 0xE513 100 - #define ADE7854_BWATT 0xE514 101 - #define ADE7854_CWATT 0xE515 102 - #define ADE7854_AVA 0xE519 103 - #define ADE7854_BVA 0xE51A 104 - #define ADE7854_CVA 0xE51B 105 - #define ADE7854_CHECKSUM 0xE51F 106 - #define ADE7854_VNOM 0xE520 107 - #define ADE7854_PHSTATUS 0xE600 108 - #define ADE7854_ANGLE0 0xE601 109 - #define ADE7854_ANGLE1 0xE602 110 - #define ADE7854_ANGLE2 0xE603 111 - #define ADE7854_PERIOD 0xE607 112 - #define ADE7854_PHNOLOAD 0xE608 113 - #define ADE7854_LINECYC 0xE60C 114 - #define ADE7854_ZXTOUT 0xE60D 115 - #define ADE7854_COMPMODE 0xE60E 116 - #define ADE7854_GAIN 0xE60F 117 - #define ADE7854_CFMODE 0xE610 118 - #define ADE7854_CF1DEN 0xE611 119 - #define ADE7854_CF2DEN 0xE612 120 - #define ADE7854_CF3DEN 0xE613 121 - #define ADE7854_APHCAL 0xE614 122 - #define ADE7854_BPHCAL 0xE615 123 - #define ADE7854_CPHCAL 0xE616 124 - #define ADE7854_PHSIGN 0xE617 125 - #define ADE7854_CONFIG 0xE618 126 - #define ADE7854_MMODE 0xE700 127 - #define ADE7854_ACCMODE 0xE701 128 - #define ADE7854_LCYCMODE 0xE702 129 - #define ADE7854_PEAKCYC 0xE703 130 - #define ADE7854_SAGCYC 0xE704 131 - #define ADE7854_CFCYC 0xE705 132 - #define ADE7854_HSDC_CFG 0xE706 133 - #define ADE7854_CONFIG2 0xEC01 134 - 135 - #define ADE7854_READ_REG 0x1 136 - #define ADE7854_WRITE_REG 0x0 137 - 138 - #define ADE7854_MAX_TX 7 139 - #define ADE7854_MAX_RX 7 140 - #define ADE7854_STARTUP_DELAY 1000 141 - 142 - #define ADE7854_SPI_SLOW (u32)(300 * 1000) 143 - #define ADE7854_SPI_BURST (u32)(1000 * 1000) 144 - #define ADE7854_SPI_FAST (u32)(2000 * 1000) 145 - 146 - /** 147 - * struct ade7854_state - device instance specific data 148 - * @spi: actual spi_device 149 - * @read_reg Wrapper function for I2C and SPI read 150 - * @write_reg Wrapper function for I2C and SPI write 151 - * @indio_dev: industrial I/O device structure 152 - * @buf_lock: mutex to protect tx and rx 153 - * @tx: transmit buffer 154 - * @rx: receive buffer 155 - **/ 156 - struct ade7854_state { 157 - struct spi_device *spi; 158 - struct i2c_client *i2c; 159 - int (*read_reg)(struct device *dev, u16 reg_address, u32 *val, 160 - int bits); 161 - int (*write_reg)(struct device *dev, u16 reg_address, u32 val, 162 - int bits); 163 - int irq; 164 - struct mutex buf_lock; 165 - u8 tx[ADE7854_MAX_TX] __aligned(IIO_DMA_MINALIGN); 166 - u8 rx[ADE7854_MAX_RX]; 167 - 168 - }; 169 - 170 - int ade7854_probe(struct iio_dev *indio_dev, struct device *dev); 171 - int ade7854_remove(struct iio_dev *indio_dev); 172 - 173 - #endif
-398
drivers/staging/iio/meter/meter.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - #ifndef _METER_H 3 - #define _METER_H 4 - 5 - #include <linux/iio/sysfs.h> 6 - 7 - /* metering ic types of attribute */ 8 - 9 - #define IIO_DEV_ATTR_CURRENT_A_OFFSET(_mode, _show, _store, _addr) \ 10 - IIO_DEVICE_ATTR(current_a_offset, _mode, _show, _store, _addr) 11 - 12 - #define IIO_DEV_ATTR_CURRENT_B_OFFSET(_mode, _show, _store, _addr) \ 13 - IIO_DEVICE_ATTR(current_b_offset, _mode, _show, _store, _addr) 14 - 15 - #define IIO_DEV_ATTR_CURRENT_C_OFFSET(_mode, _show, _store, _addr) \ 16 - IIO_DEVICE_ATTR(current_c_offset, _mode, _show, _store, _addr) 17 - 18 - #define IIO_DEV_ATTR_VOLT_A_OFFSET(_mode, _show, _store, _addr) \ 19 - IIO_DEVICE_ATTR(volt_a_offset, _mode, _show, _store, _addr) 20 - 21 - #define IIO_DEV_ATTR_VOLT_B_OFFSET(_mode, _show, _store, _addr) \ 22 - IIO_DEVICE_ATTR(volt_b_offset, _mode, _show, _store, _addr) 23 - 24 - #define IIO_DEV_ATTR_VOLT_C_OFFSET(_mode, _show, _store, _addr) \ 25 - IIO_DEVICE_ATTR(volt_c_offset, _mode, _show, _store, _addr) 26 - 27 - #define IIO_DEV_ATTR_REACTIVE_POWER_A_OFFSET(_mode, _show, _store, _addr) \ 28 - IIO_DEVICE_ATTR(reactive_power_a_offset, _mode, _show, _store, _addr) 29 - 30 - #define IIO_DEV_ATTR_REACTIVE_POWER_B_OFFSET(_mode, _show, _store, _addr) \ 31 - IIO_DEVICE_ATTR(reactive_power_b_offset, _mode, _show, _store, _addr) 32 - 33 - #define IIO_DEV_ATTR_REACTIVE_POWER_C_OFFSET(_mode, _show, _store, _addr) \ 34 - IIO_DEVICE_ATTR(reactive_power_c_offset, _mode, _show, _store, _addr) 35 - 36 - #define IIO_DEV_ATTR_ACTIVE_POWER_A_OFFSET(_mode, _show, _store, _addr) \ 37 - IIO_DEVICE_ATTR(active_power_a_offset, _mode, _show, _store, _addr) 38 - 39 - #define IIO_DEV_ATTR_ACTIVE_POWER_B_OFFSET(_mode, _show, _store, _addr) \ 40 - IIO_DEVICE_ATTR(active_power_b_offset, _mode, _show, _store, _addr) 41 - 42 - #define IIO_DEV_ATTR_ACTIVE_POWER_C_OFFSET(_mode, _show, _store, _addr) \ 43 - IIO_DEVICE_ATTR(active_power_c_offset, _mode, _show, _store, _addr) 44 - 45 - #define IIO_DEV_ATTR_CURRENT_A_GAIN(_mode, _show, _store, _addr) \ 46 - IIO_DEVICE_ATTR(current_a_gain, _mode, _show, _store, _addr) 47 - 48 - #define IIO_DEV_ATTR_CURRENT_B_GAIN(_mode, _show, _store, _addr) \ 49 - IIO_DEVICE_ATTR(current_b_gain, _mode, _show, _store, _addr) 50 - 51 - #define IIO_DEV_ATTR_CURRENT_C_GAIN(_mode, _show, _store, _addr) \ 52 - IIO_DEVICE_ATTR(current_c_gain, _mode, _show, _store, _addr) 53 - 54 - #define IIO_DEV_ATTR_APPARENT_POWER_A_GAIN(_mode, _show, _store, _addr) \ 55 - IIO_DEVICE_ATTR(apparent_power_a_gain, _mode, _show, _store, _addr) 56 - 57 - #define IIO_DEV_ATTR_APPARENT_POWER_B_GAIN(_mode, _show, _store, _addr) \ 58 - IIO_DEVICE_ATTR(apparent_power_b_gain, _mode, _show, _store, _addr) 59 - 60 - #define IIO_DEV_ATTR_APPARENT_POWER_C_GAIN(_mode, _show, _store, _addr) \ 61 - IIO_DEVICE_ATTR(apparent_power_c_gain, _mode, _show, _store, _addr) 62 - 63 - #define IIO_DEV_ATTR_ACTIVE_POWER_GAIN(_mode, _show, _store, _addr) \ 64 - IIO_DEVICE_ATTR(active_power_gain, _mode, _show, _store, _addr) 65 - 66 - #define IIO_DEV_ATTR_ACTIVE_POWER_A_GAIN(_mode, _show, _store, _addr) \ 67 - IIO_DEVICE_ATTR(active_power_a_gain, _mode, _show, _store, _addr) 68 - 69 - #define IIO_DEV_ATTR_ACTIVE_POWER_B_GAIN(_mode, _show, _store, _addr) \ 70 - IIO_DEVICE_ATTR(active_power_b_gain, _mode, _show, _store, _addr) 71 - 72 - #define IIO_DEV_ATTR_ACTIVE_POWER_C_GAIN(_mode, _show, _store, _addr) \ 73 - IIO_DEVICE_ATTR(active_power_c_gain, _mode, _show, _store, _addr) 74 - 75 - #define IIO_DEV_ATTR_REACTIVE_POWER_A_GAIN(_mode, _show, _store, _addr) \ 76 - IIO_DEVICE_ATTR(reactive_power_a_gain, _mode, _show, _store, _addr) 77 - 78 - #define IIO_DEV_ATTR_REACTIVE_POWER_B_GAIN(_mode, _show, _store, _addr) \ 79 - IIO_DEVICE_ATTR(reactive_power_b_gain, _mode, _show, _store, _addr) 80 - 81 - #define IIO_DEV_ATTR_REACTIVE_POWER_C_GAIN(_mode, _show, _store, _addr) \ 82 - IIO_DEVICE_ATTR(reactive_power_c_gain, _mode, _show, _store, _addr) 83 - 84 - #define IIO_DEV_ATTR_CURRENT_A(_show, _addr) \ 85 - IIO_DEVICE_ATTR(current_a, 0444, _show, NULL, _addr) 86 - 87 - #define IIO_DEV_ATTR_CURRENT_B(_show, _addr) \ 88 - IIO_DEVICE_ATTR(current_b, 0444, _show, NULL, _addr) 89 - 90 - #define IIO_DEV_ATTR_CURRENT_C(_show, _addr) \ 91 - IIO_DEVICE_ATTR(current_c, 0444, _show, NULL, _addr) 92 - 93 - #define IIO_DEV_ATTR_VOLT_A(_show, _addr) \ 94 - IIO_DEVICE_ATTR(volt_a, 0444, _show, NULL, _addr) 95 - 96 - #define IIO_DEV_ATTR_VOLT_B(_show, _addr) \ 97 - IIO_DEVICE_ATTR(volt_b, 0444, _show, NULL, _addr) 98 - 99 - #define IIO_DEV_ATTR_VOLT_C(_show, _addr) \ 100 - IIO_DEVICE_ATTR(volt_c, 0444, _show, NULL, _addr) 101 - 102 - #define IIO_DEV_ATTR_AENERGY(_show, _addr) \ 103 - IIO_DEVICE_ATTR(aenergy, 0444, _show, NULL, _addr) 104 - 105 - #define IIO_DEV_ATTR_LENERGY(_show, _addr) \ 106 - IIO_DEVICE_ATTR(lenergy, 0444, _show, NULL, _addr) 107 - 108 - #define IIO_DEV_ATTR_RAENERGY(_show, _addr) \ 109 - IIO_DEVICE_ATTR(raenergy, 0444, _show, NULL, _addr) 110 - 111 - #define IIO_DEV_ATTR_LAENERGY(_show, _addr) \ 112 - IIO_DEVICE_ATTR(laenergy, 0444, _show, NULL, _addr) 113 - 114 - #define IIO_DEV_ATTR_VAENERGY(_show, _addr) \ 115 - IIO_DEVICE_ATTR(vaenergy, 0444, _show, NULL, _addr) 116 - 117 - #define IIO_DEV_ATTR_LVAENERGY(_show, _addr) \ 118 - IIO_DEVICE_ATTR(lvaenergy, 0444, _show, NULL, _addr) 119 - 120 - #define IIO_DEV_ATTR_RVAENERGY(_show, _addr) \ 121 - IIO_DEVICE_ATTR(rvaenergy, 0444, _show, NULL, _addr) 122 - 123 - #define IIO_DEV_ATTR_LVARENERGY(_show, _addr) \ 124 - IIO_DEVICE_ATTR(lvarenergy, 0444, _show, NULL, _addr) 125 - 126 - #define IIO_DEV_ATTR_CHKSUM(_show, _addr) \ 127 - IIO_DEVICE_ATTR(chksum, 0444, _show, NULL, _addr) 128 - 129 - #define IIO_DEV_ATTR_ANGLE0(_show, _addr) \ 130 - IIO_DEVICE_ATTR(angle0, 0444, _show, NULL, _addr) 131 - 132 - #define IIO_DEV_ATTR_ANGLE1(_show, _addr) \ 133 - IIO_DEVICE_ATTR(angle1, 0444, _show, NULL, _addr) 134 - 135 - #define IIO_DEV_ATTR_ANGLE2(_show, _addr) \ 136 - IIO_DEVICE_ATTR(angle2, 0444, _show, NULL, _addr) 137 - 138 - #define IIO_DEV_ATTR_AWATTHR(_show, _addr) \ 139 - IIO_DEVICE_ATTR(awatthr, 0444, _show, NULL, _addr) 140 - 141 - #define IIO_DEV_ATTR_BWATTHR(_show, _addr) \ 142 - IIO_DEVICE_ATTR(bwatthr, 0444, _show, NULL, _addr) 143 - 144 - #define IIO_DEV_ATTR_CWATTHR(_show, _addr) \ 145 - IIO_DEVICE_ATTR(cwatthr, 0444, _show, NULL, _addr) 146 - 147 - #define IIO_DEV_ATTR_AFWATTHR(_show, _addr) \ 148 - IIO_DEVICE_ATTR(afwatthr, 0444, _show, NULL, _addr) 149 - 150 - #define IIO_DEV_ATTR_BFWATTHR(_show, _addr) \ 151 - IIO_DEVICE_ATTR(bfwatthr, 0444, _show, NULL, _addr) 152 - 153 - #define IIO_DEV_ATTR_CFWATTHR(_show, _addr) \ 154 - IIO_DEVICE_ATTR(cfwatthr, 0444, _show, NULL, _addr) 155 - 156 - #define IIO_DEV_ATTR_AVARHR(_show, _addr) \ 157 - IIO_DEVICE_ATTR(avarhr, 0444, _show, NULL, _addr) 158 - 159 - #define IIO_DEV_ATTR_BVARHR(_show, _addr) \ 160 - IIO_DEVICE_ATTR(bvarhr, 0444, _show, NULL, _addr) 161 - 162 - #define IIO_DEV_ATTR_CVARHR(_show, _addr) \ 163 - IIO_DEVICE_ATTR(cvarhr, 0444, _show, NULL, _addr) 164 - 165 - #define IIO_DEV_ATTR_AVAHR(_show, _addr) \ 166 - IIO_DEVICE_ATTR(avahr, 0444, _show, NULL, _addr) 167 - 168 - #define IIO_DEV_ATTR_BVAHR(_show, _addr) \ 169 - IIO_DEVICE_ATTR(bvahr, 0444, _show, NULL, _addr) 170 - 171 - #define IIO_DEV_ATTR_CVAHR(_show, _addr) \ 172 - IIO_DEVICE_ATTR(cvahr, 0444, _show, NULL, _addr) 173 - 174 - #define IIO_DEV_ATTR_IOS(_mode, _show, _store, _addr) \ 175 - IIO_DEVICE_ATTR(ios, _mode, _show, _store, _addr) 176 - 177 - #define IIO_DEV_ATTR_VOS(_mode, _show, _store, _addr) \ 178 - IIO_DEVICE_ATTR(vos, _mode, _show, _store, _addr) 179 - 180 - #define IIO_DEV_ATTR_PHCAL(_mode, _show, _store, _addr) \ 181 - IIO_DEVICE_ATTR(phcal, _mode, _show, _store, _addr) 182 - 183 - #define IIO_DEV_ATTR_APHCAL(_mode, _show, _store, _addr) \ 184 - IIO_DEVICE_ATTR(aphcal, _mode, _show, _store, _addr) 185 - 186 - #define IIO_DEV_ATTR_BPHCAL(_mode, _show, _store, _addr) \ 187 - IIO_DEVICE_ATTR(bphcal, _mode, _show, _store, _addr) 188 - 189 - #define IIO_DEV_ATTR_CPHCAL(_mode, _show, _store, _addr) \ 190 - IIO_DEVICE_ATTR(cphcal, _mode, _show, _store, _addr) 191 - 192 - #define IIO_DEV_ATTR_APOS(_mode, _show, _store, _addr) \ 193 - IIO_DEVICE_ATTR(apos, _mode, _show, _store, _addr) 194 - 195 - #define IIO_DEV_ATTR_AAPOS(_mode, _show, _store, _addr) \ 196 - IIO_DEVICE_ATTR(aapos, _mode, _show, _store, _addr) 197 - 198 - #define IIO_DEV_ATTR_BAPOS(_mode, _show, _store, _addr) \ 199 - IIO_DEVICE_ATTR(bapos, _mode, _show, _store, _addr) 200 - 201 - #define IIO_DEV_ATTR_CAPOS(_mode, _show, _store, _addr) \ 202 - IIO_DEVICE_ATTR(capos, _mode, _show, _store, _addr) 203 - 204 - #define IIO_DEV_ATTR_AVRMSGAIN(_mode, _show, _store, _addr) \ 205 - IIO_DEVICE_ATTR(avrmsgain, _mode, _show, _store, _addr) 206 - 207 - #define IIO_DEV_ATTR_BVRMSGAIN(_mode, _show, _store, _addr) \ 208 - IIO_DEVICE_ATTR(bvrmsgain, _mode, _show, _store, _addr) 209 - 210 - #define IIO_DEV_ATTR_CVRMSGAIN(_mode, _show, _store, _addr) \ 211 - IIO_DEVICE_ATTR(cvrmsgain, _mode, _show, _store, _addr) 212 - 213 - #define IIO_DEV_ATTR_AIGAIN(_mode, _show, _store, _addr) \ 214 - IIO_DEVICE_ATTR(aigain, _mode, _show, _store, _addr) 215 - 216 - #define IIO_DEV_ATTR_BIGAIN(_mode, _show, _store, _addr) \ 217 - IIO_DEVICE_ATTR(bigain, _mode, _show, _store, _addr) 218 - 219 - #define IIO_DEV_ATTR_CIGAIN(_mode, _show, _store, _addr) \ 220 - IIO_DEVICE_ATTR(cigain, _mode, _show, _store, _addr) 221 - 222 - #define IIO_DEV_ATTR_NIGAIN(_mode, _show, _store, _addr) \ 223 - IIO_DEVICE_ATTR(nigain, _mode, _show, _store, _addr) 224 - 225 - #define IIO_DEV_ATTR_AVGAIN(_mode, _show, _store, _addr) \ 226 - IIO_DEVICE_ATTR(avgain, _mode, _show, _store, _addr) 227 - 228 - #define IIO_DEV_ATTR_BVGAIN(_mode, _show, _store, _addr) \ 229 - IIO_DEVICE_ATTR(bvgain, _mode, _show, _store, _addr) 230 - 231 - #define IIO_DEV_ATTR_CVGAIN(_mode, _show, _store, _addr) \ 232 - IIO_DEVICE_ATTR(cvgain, _mode, _show, _store, _addr) 233 - 234 - #define IIO_DEV_ATTR_WGAIN(_mode, _show, _store, _addr) \ 235 - IIO_DEVICE_ATTR(wgain, _mode, _show, _store, _addr) 236 - 237 - #define IIO_DEV_ATTR_WDIV(_mode, _show, _store, _addr) \ 238 - IIO_DEVICE_ATTR(wdiv, _mode, _show, _store, _addr) 239 - 240 - #define IIO_DEV_ATTR_CFNUM(_mode, _show, _store, _addr) \ 241 - IIO_DEVICE_ATTR(cfnum, _mode, _show, _store, _addr) 242 - 243 - #define IIO_DEV_ATTR_CFDEN(_mode, _show, _store, _addr) \ 244 - IIO_DEVICE_ATTR(cfden, _mode, _show, _store, _addr) 245 - 246 - #define IIO_DEV_ATTR_CF1DEN(_mode, _show, _store, _addr) \ 247 - IIO_DEVICE_ATTR(cf1den, _mode, _show, _store, _addr) 248 - 249 - #define IIO_DEV_ATTR_CF2DEN(_mode, _show, _store, _addr) \ 250 - IIO_DEVICE_ATTR(cf2den, _mode, _show, _store, _addr) 251 - 252 - #define IIO_DEV_ATTR_CF3DEN(_mode, _show, _store, _addr) \ 253 - IIO_DEVICE_ATTR(cf3den, _mode, _show, _store, _addr) 254 - 255 - #define IIO_DEV_ATTR_IRMS(_mode, _show, _store, _addr) \ 256 - IIO_DEVICE_ATTR(irms, _mode, _show, _store, _addr) 257 - 258 - #define IIO_DEV_ATTR_VRMS(_mode, _show, _store, _addr) \ 259 - IIO_DEVICE_ATTR(vrms, _mode, _show, _store, _addr) 260 - 261 - #define IIO_DEV_ATTR_AIRMS(_mode, _show, _store, _addr) \ 262 - IIO_DEVICE_ATTR(airms, _mode, _show, _store, _addr) 263 - 264 - #define IIO_DEV_ATTR_BIRMS(_mode, _show, _store, _addr) \ 265 - IIO_DEVICE_ATTR(birms, _mode, _show, _store, _addr) 266 - 267 - #define IIO_DEV_ATTR_CIRMS(_mode, _show, _store, _addr) \ 268 - IIO_DEVICE_ATTR(cirms, _mode, _show, _store, _addr) 269 - 270 - #define IIO_DEV_ATTR_NIRMS(_mode, _show, _store, _addr) \ 271 - IIO_DEVICE_ATTR(nirms, _mode, _show, _store, _addr) 272 - 273 - #define IIO_DEV_ATTR_AVRMS(_mode, _show, _store, _addr) \ 274 - IIO_DEVICE_ATTR(avrms, _mode, _show, _store, _addr) 275 - 276 - #define IIO_DEV_ATTR_BVRMS(_mode, _show, _store, _addr) \ 277 - IIO_DEVICE_ATTR(bvrms, _mode, _show, _store, _addr) 278 - 279 - #define IIO_DEV_ATTR_CVRMS(_mode, _show, _store, _addr) \ 280 - IIO_DEVICE_ATTR(cvrms, _mode, _show, _store, _addr) 281 - 282 - #define IIO_DEV_ATTR_IRMSOS(_mode, _show, _store, _addr) \ 283 - IIO_DEVICE_ATTR(irmsos, _mode, _show, _store, _addr) 284 - 285 - #define IIO_DEV_ATTR_VRMSOS(_mode, _show, _store, _addr) \ 286 - IIO_DEVICE_ATTR(vrmsos, _mode, _show, _store, _addr) 287 - 288 - #define IIO_DEV_ATTR_AIRMSOS(_mode, _show, _store, _addr) \ 289 - IIO_DEVICE_ATTR(airmsos, _mode, _show, _store, _addr) 290 - 291 - #define IIO_DEV_ATTR_BIRMSOS(_mode, _show, _store, _addr) \ 292 - IIO_DEVICE_ATTR(birmsos, _mode, _show, _store, _addr) 293 - 294 - #define IIO_DEV_ATTR_CIRMSOS(_mode, _show, _store, _addr) \ 295 - IIO_DEVICE_ATTR(cirmsos, _mode, _show, _store, _addr) 296 - 297 - #define IIO_DEV_ATTR_AVRMSOS(_mode, _show, _store, _addr) \ 298 - IIO_DEVICE_ATTR(avrmsos, _mode, _show, _store, _addr) 299 - 300 - #define IIO_DEV_ATTR_BVRMSOS(_mode, _show, _store, _addr) \ 301 - IIO_DEVICE_ATTR(bvrmsos, _mode, _show, _store, _addr) 302 - 303 - #define IIO_DEV_ATTR_CVRMSOS(_mode, _show, _store, _addr) \ 304 - IIO_DEVICE_ATTR(cvrmsos, _mode, _show, _store, _addr) 305 - 306 - #define IIO_DEV_ATTR_VAGAIN(_mode, _show, _store, _addr) \ 307 - IIO_DEVICE_ATTR(vagain, _mode, _show, _store, _addr) 308 - 309 - #define IIO_DEV_ATTR_PGA_GAIN(_mode, _show, _store, _addr) \ 310 - IIO_DEVICE_ATTR(pga_gain, _mode, _show, _store, _addr) 311 - 312 - #define IIO_DEV_ATTR_VADIV(_mode, _show, _store, _addr) \ 313 - IIO_DEVICE_ATTR(vadiv, _mode, _show, _store, _addr) 314 - 315 - #define IIO_DEV_ATTR_LINECYC(_mode, _show, _store, _addr) \ 316 - IIO_DEVICE_ATTR(linecyc, _mode, _show, _store, _addr) 317 - 318 - #define IIO_DEV_ATTR_SAGCYC(_mode, _show, _store, _addr) \ 319 - IIO_DEVICE_ATTR(sagcyc, _mode, _show, _store, _addr) 320 - 321 - #define IIO_DEV_ATTR_CFCYC(_mode, _show, _store, _addr) \ 322 - IIO_DEVICE_ATTR(cfcyc, _mode, _show, _store, _addr) 323 - 324 - #define IIO_DEV_ATTR_PEAKCYC(_mode, _show, _store, _addr) \ 325 - IIO_DEVICE_ATTR(peakcyc, _mode, _show, _store, _addr) 326 - 327 - #define IIO_DEV_ATTR_SAGLVL(_mode, _show, _store, _addr) \ 328 - IIO_DEVICE_ATTR(saglvl, _mode, _show, _store, _addr) 329 - 330 - #define IIO_DEV_ATTR_IPKLVL(_mode, _show, _store, _addr) \ 331 - IIO_DEVICE_ATTR(ipklvl, _mode, _show, _store, _addr) 332 - 333 - #define IIO_DEV_ATTR_VPKLVL(_mode, _show, _store, _addr) \ 334 - IIO_DEVICE_ATTR(vpklvl, _mode, _show, _store, _addr) 335 - 336 - #define IIO_DEV_ATTR_IPEAK(_mode, _show, _store, _addr) \ 337 - IIO_DEVICE_ATTR(ipeak, _mode, _show, _store, _addr) 338 - 339 - #define IIO_DEV_ATTR_RIPEAK(_mode, _show, _store, _addr) \ 340 - IIO_DEVICE_ATTR(ripeak, _mode, _show, _store, _addr) 341 - 342 - #define IIO_DEV_ATTR_VPEAK(_mode, _show, _store, _addr) \ 343 - IIO_DEVICE_ATTR(vpeak, _mode, _show, _store, _addr) 344 - 345 - #define IIO_DEV_ATTR_RVPEAK(_mode, _show, _store, _addr) \ 346 - IIO_DEVICE_ATTR(rvpeak, _mode, _show, _store, _addr) 347 - 348 - #define IIO_DEV_ATTR_VPERIOD(_mode, _show, _store, _addr) \ 349 - IIO_DEVICE_ATTR(vperiod, _mode, _show, _store, _addr) 350 - 351 - /* active energy register, AENERGY, is more than half full */ 352 - #define IIO_EVENT_ATTR_AENERGY_HALF_FULL(_evlist, _show, _store, _mask) \ 353 - IIO_EVENT_ATTR_SH(aenergy_half_full, _evlist, _show, _store, _mask) 354 - 355 - /* a SAG on the line voltage */ 356 - #define IIO_EVENT_ATTR_LINE_VOLT_SAG(_evlist, _show, _store, _mask) \ 357 - IIO_EVENT_ATTR_SH(line_volt_sag, _evlist, _show, _store, _mask) 358 - 359 - /* 360 - * Indicates the end of energy accumulation over an integer number 361 - * of half line cycles 362 - */ 363 - #define IIO_EVENT_ATTR_CYCEND(_evlist, _show, _store, _mask) \ 364 - IIO_EVENT_ATTR_SH(cycend, _evlist, _show, _store, _mask) 365 - 366 - /* on the rising and falling edge of the voltage waveform */ 367 - #define IIO_EVENT_ATTR_ZERO_CROSS(_evlist, _show, _store, _mask) \ 368 - IIO_EVENT_ATTR_SH(zero_cross, _evlist, _show, _store, _mask) 369 - 370 - /* the active energy register has overflowed */ 371 - #define IIO_EVENT_ATTR_AENERGY_OVERFLOW(_evlist, _show, _store, _mask) \ 372 - IIO_EVENT_ATTR_SH(aenergy_overflow, _evlist, _show, _store, _mask) 373 - 374 - /* the apparent energy register has overflowed */ 375 - #define IIO_EVENT_ATTR_VAENERGY_OVERFLOW(_evlist, _show, _store, _mask) \ 376 - IIO_EVENT_ATTR_SH(vaenergy_overflow, _evlist, _show, _store, _mask) 377 - 378 - /* the active energy register, VAENERGY, is more than half full */ 379 - #define IIO_EVENT_ATTR_VAENERGY_HALF_FULL(_evlist, _show, _store, _mask) \ 380 - IIO_EVENT_ATTR_SH(vaenergy_half_full, _evlist, _show, _store, _mask) 381 - 382 - /* the power has gone from negative to positive */ 383 - #define IIO_EVENT_ATTR_PPOS(_evlist, _show, _store, _mask) \ 384 - IIO_EVENT_ATTR_SH(ppos, _evlist, _show, _store, _mask) 385 - 386 - /* the power has gone from positive to negative */ 387 - #define IIO_EVENT_ATTR_PNEG(_evlist, _show, _store, _mask) \ 388 - IIO_EVENT_ATTR_SH(pneg, _evlist, _show, _store, _mask) 389 - 390 - /* waveform sample from Channel 1 has exceeded the IPKLVL value */ 391 - #define IIO_EVENT_ATTR_IPKLVL_EXC(_evlist, _show, _store, _mask) \ 392 - IIO_EVENT_ATTR_SH(ipklvl_exc, _evlist, _show, _store, _mask) 393 - 394 - /* waveform sample from Channel 2 has exceeded the VPKLVL value */ 395 - #define IIO_EVENT_ATTR_VPKLVL_EXC(_evlist, _show, _store, _mask) \ 396 - IIO_EVENT_ATTR_SH(vpklvl_exc, _evlist, _show, _store, _mask) 397 - 398 - #endif /* _METER_H */
+1 -1
drivers/staging/iio/resolver/ad2s1210.c
··· 101 101 static const int ad2s1210_mode_vals[4][2] = { 102 102 [MOD_POS] = { 0, 0 }, 103 103 [MOD_VEL] = { 0, 1 }, 104 - [MOD_CONFIG] = { 1, 0 }, 104 + [MOD_CONFIG] = { 1, 1 }, 105 105 }; 106 106 107 107 static inline void ad2s1210_set_mode(enum ad2s1210_mode mode,
+206
include/linux/iio/iio-gts-helper.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-only */ 2 + /* gain-time-scale conversion helpers for IIO light sensors 3 + * 4 + * Copyright (c) 2023 Matti Vaittinen <mazziesaccount@gmail.com> 5 + */ 6 + 7 + #ifndef __IIO_GTS_HELPER__ 8 + #define __IIO_GTS_HELPER__ 9 + 10 + #include <linux/types.h> 11 + 12 + struct device; 13 + 14 + /** 15 + * struct iio_gain_sel_pair - gain - selector values 16 + * 17 + * In many cases devices like light sensors allow setting signal amplification 18 + * (gain) using a register interface. This structure describes amplification 19 + * and corresponding selector (register value) 20 + * 21 + * @gain: Gain (multiplication) value. Gain must be positive, negative 22 + * values are reserved for error handling. 23 + * @sel: Selector (usually register value) used to indicate this gain. 24 + * NOTE: Only selectors >= 0 supported. 25 + */ 26 + struct iio_gain_sel_pair { 27 + int gain; 28 + int sel; 29 + }; 30 + 31 + /** 32 + * struct iio_itime_sel_mul - integration time description 33 + * 34 + * In many cases devices like light sensors allow setting the duration of 35 + * collecting data. Typically this duration has also an impact to the magnitude 36 + * of measured values (gain). This structure describes the relation of 37 + * integration time and amplification as well as corresponding selector 38 + * (register value). 39 + * 40 + * An example could be a sensor allowing 50, 100, 200 and 400 mS times. The 41 + * respective multiplication values could be 50 mS => 1, 100 mS => 2, 42 + * 200 mS => 4 and 400 mS => 8 assuming the impact of integration time would be 43 + * linear in a way that when collecting data for 50 mS caused value X, doubling 44 + * the data collection time caused value 2X etc. 45 + * 46 + * @time_us: Integration time in microseconds. Time values must be positive, 47 + * negative values are reserved for error handling. 48 + * @sel: Selector (usually register value) used to indicate this time 49 + * NOTE: Only selectors >= 0 supported. 50 + * @mul: Multiplication to the values caused by this time. 51 + * NOTE: Only multipliers > 0 supported. 52 + */ 53 + struct iio_itime_sel_mul { 54 + int time_us; 55 + int sel; 56 + int mul; 57 + }; 58 + 59 + struct iio_gts { 60 + u64 max_scale; 61 + const struct iio_gain_sel_pair *hwgain_table; 62 + int num_hwgain; 63 + const struct iio_itime_sel_mul *itime_table; 64 + int num_itime; 65 + int **per_time_avail_scale_tables; 66 + int *avail_all_scales_table; 67 + int num_avail_all_scales; 68 + int *avail_time_tables; 69 + int num_avail_time_tables; 70 + }; 71 + 72 + #define GAIN_SCALE_GAIN(_gain, _sel) \ 73 + { \ 74 + .gain = (_gain), \ 75 + .sel = (_sel), \ 76 + } 77 + 78 + #define GAIN_SCALE_ITIME_US(_itime, _sel, _mul) \ 79 + { \ 80 + .time_us = (_itime), \ 81 + .sel = (_sel), \ 82 + .mul = (_mul), \ 83 + } 84 + 85 + static inline const struct iio_itime_sel_mul * 86 + iio_gts_find_itime_by_time(struct iio_gts *gts, int time) 87 + { 88 + int i; 89 + 90 + if (!gts->num_itime) 91 + return NULL; 92 + 93 + for (i = 0; i < gts->num_itime; i++) 94 + if (gts->itime_table[i].time_us == time) 95 + return &gts->itime_table[i]; 96 + 97 + return NULL; 98 + } 99 + 100 + static inline const struct iio_itime_sel_mul * 101 + iio_gts_find_itime_by_sel(struct iio_gts *gts, int sel) 102 + { 103 + int i; 104 + 105 + for (i = 0; i < gts->num_itime; i++) 106 + if (gts->itime_table[i].sel == sel) 107 + return &gts->itime_table[i]; 108 + 109 + return NULL; 110 + } 111 + 112 + int devm_iio_init_iio_gts(struct device *dev, int max_scale_int, int max_scale_nano, 113 + const struct iio_gain_sel_pair *gain_tbl, int num_gain, 114 + const struct iio_itime_sel_mul *tim_tbl, int num_times, 115 + struct iio_gts *gts); 116 + /** 117 + * iio_gts_find_int_time_by_sel - find integration time matching a selector 118 + * @gts: Gain time scale descriptor 119 + * @sel: selector for which matching integration time is searched for 120 + * 121 + * Return: integration time matching given selector or -EINVAL if 122 + * integration time was not found. 123 + */ 124 + static inline int iio_gts_find_int_time_by_sel(struct iio_gts *gts, int sel) 125 + { 126 + const struct iio_itime_sel_mul *itime; 127 + 128 + itime = iio_gts_find_itime_by_sel(gts, sel); 129 + if (!itime) 130 + return -EINVAL; 131 + 132 + return itime->time_us; 133 + } 134 + 135 + /** 136 + * iio_gts_find_sel_by_int_time - find selector matching integration time 137 + * @gts: Gain time scale descriptor 138 + * @gain: HW-gain for which matching selector is searched for 139 + * 140 + * Return: a selector matching given integration time or -EINVAL if 141 + * selector was not found. 142 + */ 143 + static inline int iio_gts_find_sel_by_int_time(struct iio_gts *gts, int time) 144 + { 145 + const struct iio_itime_sel_mul *itime; 146 + 147 + itime = iio_gts_find_itime_by_time(gts, time); 148 + if (!itime) 149 + return -EINVAL; 150 + 151 + return itime->sel; 152 + } 153 + 154 + /** 155 + * iio_gts_valid_time - check if given integration time is valid 156 + * @gts: Gain time scale descriptor 157 + * @time_us: Integration time to check 158 + * 159 + * Return: True if given time is supported by device. False if not. 160 + */ 161 + static inline bool iio_gts_valid_time(struct iio_gts *gts, int time_us) 162 + { 163 + return iio_gts_find_itime_by_time(gts, time_us) != NULL; 164 + } 165 + 166 + int iio_gts_find_sel_by_gain(struct iio_gts *gts, int gain); 167 + 168 + /** 169 + * iio_gts_valid_gain - check if given HW-gain is valid 170 + * @gts: Gain time scale descriptor 171 + * @gain: HW-gain to check 172 + * 173 + * Return: True if given time is supported by device. False if not. 174 + */ 175 + static inline bool iio_gts_valid_gain(struct iio_gts *gts, int gain) 176 + { 177 + return iio_gts_find_sel_by_gain(gts, gain) >= 0; 178 + } 179 + 180 + int iio_find_closest_gain_low(struct iio_gts *gts, int gain, bool *in_range); 181 + int iio_gts_find_gain_by_sel(struct iio_gts *gts, int sel); 182 + int iio_gts_get_min_gain(struct iio_gts *gts); 183 + int iio_gts_find_int_time_by_sel(struct iio_gts *gts, int sel); 184 + int iio_gts_find_sel_by_int_time(struct iio_gts *gts, int time); 185 + 186 + int iio_gts_total_gain_to_scale(struct iio_gts *gts, int total_gain, 187 + int *scale_int, int *scale_nano); 188 + int iio_gts_find_gain_sel_for_scale_using_time(struct iio_gts *gts, int time_sel, 189 + int scale_int, int scale_nano, 190 + int *gain_sel); 191 + int iio_gts_get_scale(struct iio_gts *gts, int gain, int time, int *scale_int, 192 + int *scale_nano); 193 + int iio_gts_find_new_gain_sel_by_old_gain_time(struct iio_gts *gts, 194 + int old_gain, int old_time_sel, 195 + int new_time_sel, int *new_gain); 196 + int iio_gts_find_new_gain_by_old_gain_time(struct iio_gts *gts, int old_gain, 197 + int old_time, int new_time, 198 + int *new_gain); 199 + int iio_gts_avail_times(struct iio_gts *gts, const int **vals, int *type, 200 + int *length); 201 + int iio_gts_all_avail_scales(struct iio_gts *gts, const int **vals, int *type, 202 + int *length); 203 + int iio_gts_avail_scales_for_time(struct iio_gts *gts, int time, 204 + const int **vals, int *type, int *length); 205 + 206 + #endif
+1 -7
include/linux/iio/trigger.h
··· 151 151 **/ 152 152 int iio_trigger_set_immutable(struct iio_dev *indio_dev, struct iio_trigger *trig); 153 153 154 - /** 155 - * iio_trigger_poll() - called on a trigger occurring 156 - * @trig: trigger which occurred 157 - * 158 - * Typically called in relevant hardware interrupt handler. 159 - **/ 160 154 void iio_trigger_poll(struct iio_trigger *trig); 161 - void iio_trigger_poll_chained(struct iio_trigger *trig); 155 + void iio_trigger_poll_nested(struct iio_trigger *trig); 162 156 163 157 irqreturn_t iio_trigger_generic_data_rdy_poll(int irq, void *private); 164 158