Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clocksource: ARM sp804: allow clocksource name to be specified

This allows platforms to specify the clocksource name upon
registration, which is necessary should they wish to register more
than one sp804 clocksource.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

+8 -8
+2 -2
arch/arm/common/timer-sp.c
··· 32 32 #define TIMER_FREQ_KHZ (1000) 33 33 #define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ) 34 34 35 - void __init sp804_clocksource_init(void __iomem *base) 35 + void __init sp804_clocksource_init(void __iomem *base, const char *name) 36 36 { 37 37 /* setup timer 0 as free-running clocksource */ 38 38 writel(0, base + TIMER_CTRL); ··· 41 41 writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, 42 42 base + TIMER_CTRL); 43 43 44 - clocksource_mmio_init(base + TIMER_VALUE, "timer3", 44 + clocksource_mmio_init(base + TIMER_VALUE, name, 45 45 TIMER_FREQ_KHZ * 1000, 200, 32, clocksource_mmio_readl_down); 46 46 } 47 47
+1 -1
arch/arm/include/asm/hardware/timer-sp.h
··· 1 - void sp804_clocksource_init(void __iomem *); 1 + void sp804_clocksource_init(void __iomem *, const char *); 2 2 void sp804_clockevents_init(void __iomem *, unsigned int);
+1 -1
arch/arm/mach-integrator/integrator_cp.c
··· 476 476 writel(0, TIMER1_VA_BASE + TIMER_CTRL); 477 477 writel(0, TIMER2_VA_BASE + TIMER_CTRL); 478 478 479 - sp804_clocksource_init(TIMER2_VA_BASE); 479 + sp804_clocksource_init(TIMER2_VA_BASE, "timer2"); 480 480 sp804_clockevents_init(TIMER1_VA_BASE, IRQ_TIMERINT1); 481 481 } 482 482
+1 -1
arch/arm/mach-realview/core.c
··· 545 545 writel(0, timer2_va_base + TIMER_CTRL); 546 546 writel(0, timer3_va_base + TIMER_CTRL); 547 547 548 - sp804_clocksource_init(timer3_va_base); 548 + sp804_clocksource_init(timer3_va_base, "timer3"); 549 549 sp804_clockevents_init(timer0_va_base, timer_irq); 550 550 } 551 551
+1 -1
arch/arm/mach-versatile/core.c
··· 764 764 writel(0, TIMER2_VA_BASE + TIMER_CTRL); 765 765 writel(0, TIMER3_VA_BASE + TIMER_CTRL); 766 766 767 - sp804_clocksource_init(TIMER3_VA_BASE); 767 + sp804_clocksource_init(TIMER3_VA_BASE, "timer3"); 768 768 sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMERINT0_1); 769 769 } 770 770
+1 -1
arch/arm/mach-vexpress/ct-ca9x4.c
··· 71 71 writel(0, MMIO_P2V(CT_CA9X4_TIMER0) + TIMER_CTRL); 72 72 writel(0, MMIO_P2V(CT_CA9X4_TIMER1) + TIMER_CTRL); 73 73 74 - sp804_clocksource_init(MMIO_P2V(CT_CA9X4_TIMER1)); 74 + sp804_clocksource_init(MMIO_P2V(CT_CA9X4_TIMER1), "ct-timer1"); 75 75 sp804_clockevents_init(MMIO_P2V(CT_CA9X4_TIMER0), IRQ_CT_CA9X4_TIMER0); 76 76 } 77 77
+1 -1
arch/arm/mach-vexpress/v2m.c
··· 65 65 writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL); 66 66 writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL); 67 67 68 - sp804_clocksource_init(MMIO_P2V(V2M_TIMER1)); 68 + sp804_clocksource_init(MMIO_P2V(V2M_TIMER1), "v2m-timer1"); 69 69 sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0); 70 70 } 71 71