Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

arch: remove unicore32 port

The unicore32 port do not seem maintained for a long time now, there is no
upstream toolchain that can create unicore32 binaries and all the links to
prebuilt toolchains for unicore32 are dead. Even compilers that were
available are not supported by the kernel anymore.

Guenter Roeck says:

I have stopped building unicore32 images since v4.19 since there is no
available compiler that is still supported by the kernel. I am surprised
that support for it has not been removed from the kernel.

Remove unicore32 port.

Signed-off-by: Mike Rapoport <rppt@linux.ibm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Guenter Roeck <linux@roeck-us.net>

+1 -15705
-1
Documentation/features/core/cBPF-JIT/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | ok | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | TODO | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/core/eBPF-JIT/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | ok | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/core/generic-idle-thread/arch-support.txt
··· 28 28 | sh: | ok | 29 29 | sparc: | ok | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | ok | 34 33 -----------------------
-1
Documentation/features/core/jump-labels/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | ok | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | ok | 34 33 -----------------------
-1
Documentation/features/core/tracehook/arch-support.txt
··· 28 28 | sh: | ok | 29 29 | sparc: | ok | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | ok | 34 33 -----------------------
-1
Documentation/features/debug/KASAN/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | TODO | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | ok | 34 33 -----------------------
-1
Documentation/features/debug/debug-vm-pgtable/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | TODO | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/debug/gcov-profile-all/arch-support.txt
··· 28 28 | sh: | ok | 29 29 | sparc: | TODO | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/debug/kgdb/arch-support.txt
··· 28 28 | sh: | ok | 29 29 | sparc: | ok | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/debug/kprobes-on-ftrace/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | TODO | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/debug/kprobes/arch-support.txt
··· 28 28 | sh: | ok | 29 29 | sparc: | ok | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/debug/kretprobes/arch-support.txt
··· 28 28 | sh: | ok | 29 29 | sparc: | ok | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/debug/optprobes/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | TODO | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/debug/stackprotector/arch-support.txt
··· 28 28 | sh: | ok | 29 29 | sparc: | TODO | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | ok | 34 33 -----------------------
-1
Documentation/features/debug/uprobes/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | ok | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/debug/user-ret-profiler/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | TODO | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/io/dma-contiguous/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | TODO | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | ok | 34 33 -----------------------
-1
Documentation/features/locking/cmpxchg-local/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | TODO | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/locking/lockdep/arch-support.txt
··· 28 28 | sh: | ok | 29 29 | sparc: | ok | 30 30 | um: | ok | 31 - | unicore32: | ok | 32 31 | x86: | ok | 33 32 | xtensa: | ok | 34 33 -----------------------
-1
Documentation/features/locking/queued-rwlocks/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | ok | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | ok | 34 33 -----------------------
-1
Documentation/features/locking/queued-spinlocks/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | ok | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | ok | 34 33 -----------------------
-1
Documentation/features/perf/kprobes-event/arch-support.txt
··· 28 28 | sh: | ok | 29 29 | sparc: | ok | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/perf/perf-regs/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | TODO | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/perf/perf-stackdump/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | TODO | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/sched/membarrier-sync-core/arch-support.txt
··· 51 51 | sh: | TODO | 52 52 | sparc: | TODO | 53 53 | um: | TODO | 54 - | unicore32: | TODO | 55 54 | x86: | ok | 56 55 | xtensa: | TODO | 57 56 -----------------------
-1
Documentation/features/sched/numa-balancing/arch-support.txt
··· 28 28 | sh: | .. | 29 29 | sparc: | TODO | 30 30 | um: | .. | 31 - | unicore32: | .. | 32 31 | x86: | ok | 33 32 | xtensa: | .. | 34 33 -----------------------
-1
Documentation/features/seccomp/seccomp-filter/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | TODO | 30 30 | um: | ok | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/time/arch-tick-broadcast/arch-support.txt
··· 28 28 | sh: | ok | 29 29 | sparc: | TODO | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | TODO | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/time/clockevents/arch-support.txt
··· 28 28 | sh: | ok | 29 29 | sparc: | ok | 30 30 | um: | ok | 31 - | unicore32: | ok | 32 31 | x86: | ok | 33 32 | xtensa: | ok | 34 33 -----------------------
-1
Documentation/features/time/context-tracking/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | ok | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/time/irq-time-acct/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | .. | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | ok | 34 33 -----------------------
-1
Documentation/features/time/modern-timekeeping/arch-support.txt
··· 28 28 | sh: | ok | 29 29 | sparc: | ok | 30 30 | um: | ok | 31 - | unicore32: | ok | 32 31 | x86: | ok | 33 32 | xtensa: | ok | 34 33 -----------------------
-1
Documentation/features/time/virt-cpuacct/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | ok | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/vm/ELF-ASLR/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | TODO | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/vm/PG_uncached/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | TODO | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/vm/THP/arch-support.txt
··· 28 28 | sh: | .. | 29 29 | sparc: | ok | 30 30 | um: | .. | 31 - | unicore32: | .. | 32 31 | x86: | ok | 33 32 | xtensa: | .. | 34 33 -----------------------
-1
Documentation/features/vm/TLB/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | TODO | 30 30 | um: | .. | 31 - | unicore32: | .. | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/vm/huge-vmap/arch-support.txt
··· 28 28 | sh: | TODO | 29 29 | sparc: | TODO | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/vm/ioremap_prot/arch-support.txt
··· 28 28 | sh: | ok | 29 29 | sparc: | TODO | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-1
Documentation/features/vm/pte_special/arch-support.txt
··· 28 28 | sh: | ok | 29 29 | sparc: | ok | 30 30 | um: | TODO | 31 - | unicore32: | TODO | 32 31 | x86: | ok | 33 32 | xtensa: | TODO | 34 33 -----------------------
-7
MAINTAINERS
··· 17532 17532 S: Supported 17533 17533 F: fs/unicode/ 17534 17534 17535 - UNICORE32 ARCHITECTURE 17536 - M: Guan Xuetao <gxt@pku.edu.cn> 17537 - S: Maintained 17538 - W: http://mprc.pku.edu.cn/~guanxuetao/linux 17539 - T: git git://github.com/gxt/linux.git 17540 - F: arch/unicore32/ 17541 - 17542 17535 UNIFDEF 17543 17536 M: Tony Finch <dot@dotat.at> 17544 17537 S: Maintained
-22
arch/unicore32/.gitignore
··· 1 - # SPDX-License-Identifier: GPL-2.0-only 2 - # 3 - # Generated include files 4 - # 5 - include/generated 6 - # 7 - # Generated ld script file 8 - # 9 - kernel/vmlinux.lds 10 - # 11 - # Generated images in boot 12 - # 13 - boot/Image 14 - boot/zImage 15 - boot/uImage 16 - # 17 - # Generated files in boot/compressed 18 - # 19 - boot/compressed/piggy.S 20 - boot/compressed/piggy.gzip 21 - boot/compressed/vmlinux 22 - boot/compressed/vmlinux.lds
-200
arch/unicore32/Kconfig
··· 1 - # SPDX-License-Identifier: GPL-2.0 2 - config UNICORE32 3 - def_bool y 4 - select ARCH_32BIT_OFF_T 5 - select ARCH_HAS_DEVMEM_IS_ALLOWED 6 - select ARCH_HAS_KEEPINITRD 7 - select ARCH_MIGHT_HAVE_PC_PARPORT 8 - select ARCH_MIGHT_HAVE_PC_SERIO 9 - select HAVE_KERNEL_GZIP 10 - select HAVE_KERNEL_BZIP2 11 - select GENERIC_ATOMIC64 12 - select HAVE_KERNEL_LZO 13 - select HAVE_KERNEL_LZMA 14 - select HAVE_PCI 15 - select VIRT_TO_BUS 16 - select ARCH_HAVE_CUSTOM_GPIO_H 17 - select GENERIC_FIND_FIRST_BIT 18 - select GENERIC_IRQ_PROBE 19 - select GENERIC_IRQ_SHOW 20 - select ARCH_WANT_FRAME_POINTERS 21 - select GENERIC_IOMAP 22 - select MODULES_USE_ELF_REL 23 - select NEED_DMA_MAP_STATE 24 - select MMU_GATHER_NO_RANGE if MMU 25 - help 26 - UniCore-32 is 32-bit Instruction Set Architecture, 27 - including a series of low-power-consumption RISC chip 28 - designs licensed by PKUnity Ltd. 29 - Please see web page at <http://www.pkunity.com/>. 30 - 31 - config GENERIC_CSUM 32 - def_bool y 33 - 34 - config NO_IOPORT_MAP 35 - bool 36 - 37 - config STACKTRACE_SUPPORT 38 - def_bool y 39 - 40 - config LOCKDEP_SUPPORT 41 - def_bool y 42 - 43 - config ARCH_HAS_ILOG2_U32 44 - bool 45 - 46 - config ARCH_HAS_ILOG2_U64 47 - bool 48 - 49 - config GENERIC_HWEIGHT 50 - def_bool y 51 - 52 - config GENERIC_CALIBRATE_DELAY 53 - def_bool y 54 - 55 - config ARCH_MAY_HAVE_PC_FDC 56 - bool 57 - 58 - config ZONE_DMA 59 - def_bool y 60 - 61 - menu "System Type" 62 - 63 - config MMU 64 - def_bool y 65 - 66 - config ARCH_FPGA 67 - bool 68 - 69 - config ARCH_PUV3 70 - def_bool y 71 - select CPU_UCV2 72 - select GENERIC_CLOCKEVENTS 73 - select HAVE_LEGACY_CLK 74 - select GPIOLIB 75 - 76 - # CONFIGs for ARCH_PUV3 77 - 78 - if ARCH_PUV3 79 - 80 - choice 81 - prompt "Board Selection" 82 - default PUV3_DB0913 83 - 84 - config PUV3_FPGA_DLX200 85 - select ARCH_FPGA 86 - bool "FPGA board" 87 - 88 - config PUV3_DB0913 89 - bool "DEBUG board (0913)" 90 - 91 - config PUV3_NB0916 92 - bool "NetBook board (0916)" 93 - select PWM 94 - select PWM_PUV3 95 - 96 - config PUV3_SMW0919 97 - bool "Security Mini-Workstation board (0919)" 98 - 99 - endchoice 100 - 101 - config PUV3_PM 102 - def_bool y if !ARCH_FPGA 103 - 104 - endif 105 - 106 - source "arch/unicore32/mm/Kconfig" 107 - 108 - comment "Floating point support" 109 - 110 - config UNICORE_FPU_F64 111 - def_bool y if !ARCH_FPGA 112 - 113 - endmenu 114 - 115 - menu "Kernel Features" 116 - 117 - source "kernel/Kconfig.hz" 118 - 119 - config LEDS 120 - def_bool y 121 - depends on GPIOLIB 122 - 123 - config ALIGNMENT_TRAP 124 - def_bool y 125 - help 126 - Unicore processors can not fetch/store information which is not 127 - naturally aligned on the bus, i.e., a 4 byte fetch must start at an 128 - address divisible by 4. On 32-bit Unicore processors, these non-aligned 129 - fetch/store instructions will be emulated in software if you say 130 - here, which has a severe performance impact. This is necessary for 131 - correct operation of some network protocols. With an IP-only 132 - configuration it is safe to say N, otherwise say Y. 133 - 134 - endmenu 135 - 136 - menu "Boot options" 137 - 138 - config CMDLINE 139 - string "Default kernel command string" 140 - default "" 141 - 142 - config CMDLINE_FORCE 143 - bool "Always use the default kernel command string" 144 - depends on CMDLINE != "" 145 - help 146 - Always use the default kernel command string, even if the boot 147 - loader passes other arguments to the kernel. 148 - This is useful if you cannot or don't want to change the 149 - command-line options your boot loader passes to the kernel. 150 - 151 - If unsure, say N. 152 - 153 - endmenu 154 - 155 - menu "Power management options" 156 - 157 - source "kernel/power/Kconfig" 158 - 159 - source "drivers/cpufreq/Kconfig" 160 - 161 - config ARCH_SUSPEND_POSSIBLE 162 - def_bool y if !ARCH_FPGA 163 - 164 - config ARCH_HIBERNATION_POSSIBLE 165 - def_bool y if !ARCH_FPGA 166 - 167 - endmenu 168 - 169 - if ARCH_PUV3 170 - 171 - config PUV3_GPIO 172 - bool 173 - depends on !ARCH_FPGA 174 - select GPIO_SYSFS 175 - default y 176 - 177 - if PUV3_NB0916 178 - 179 - menu "PKUnity NetBook-0916 Features" 180 - 181 - config I2C_BATTERY_BQ27200 182 - tristate "I2C Battery BQ27200 Support" 183 - select I2C_PUV3 184 - select POWER_SUPPLY 185 - select BATTERY_BQ27XXX 186 - 187 - config I2C_EEPROM_AT24 188 - tristate "I2C EEPROMs AT24 support" 189 - select I2C_PUV3 190 - select EEPROM_AT24 191 - 192 - config LCD_BACKLIGHT 193 - tristate "LCD Backlight support" 194 - select BACKLIGHT_PWM 195 - 196 - endmenu 197 - 198 - endif 199 - 200 - endif
-29
arch/unicore32/Kconfig.debug
··· 1 - # SPDX-License-Identifier: GPL-2.0 2 - 3 - config EARLY_PRINTK 4 - def_bool DEBUG_OCD 5 - help 6 - Write kernel log output directly into the ocd or to a serial port. 7 - 8 - This is useful for kernel debugging when your machine crashes very 9 - early before the console code is initialized. For normal operation 10 - it is not recommended because it looks ugly and doesn't cooperate 11 - with klogd/syslogd or the X server. You should normally N here, 12 - unless you want to debug such a crash. 13 - 14 - # These options are only for real kernel hackers who want to get their hands dirty. 15 - config DEBUG_LL 16 - bool "Kernel low-level debugging functions" 17 - depends on DEBUG_KERNEL 18 - help 19 - Say Y here to include definitions of printascii, printch, printhex 20 - in the kernel. This is helpful if you are debugging code that 21 - executes before the console is initialized. 22 - 23 - config DEBUG_OCD 24 - bool "Kernel low-level debugging via On-Chip-Debugger" 25 - depends on DEBUG_LL 26 - default y 27 - help 28 - Say Y here if you want the debug print routines to direct their 29 - output to the UniCore On-Chip-Debugger channel using CP #1.
-59
arch/unicore32/Makefile
··· 1 - # 2 - # arch/unicore32/Makefile 3 - # 4 - # This file is included by the global makefile so that you can add your own 5 - # architecture-specific flags and dependencies. 6 - # 7 - # This file is subject to the terms and conditions of the GNU General Public 8 - # License. See the file "COPYING" in the main directory of this archive 9 - # for more details. 10 - # 11 - # Copyright (C) 2002~2010 by Guan Xue-tao 12 - # 13 - ifneq ($(SUBARCH),$(ARCH)) 14 - ifeq ($(CROSS_COMPILE),) 15 - CROSS_COMPILE := $(call cc-cross-prefix, unicore32-linux-) 16 - endif 17 - endif 18 - 19 - LDFLAGS_vmlinux := -p --no-undefined -X 20 - 21 - OBJCOPYFLAGS := -O binary -R .note -R .note.gnu.build-id -R .comment -S 22 - 23 - # Never generate .eh_frame 24 - KBUILD_CFLAGS += $(call cc-option,-fno-dwarf2-cfi-asm) 25 - 26 - # Never use hard float in kernel 27 - KBUILD_CFLAGS += -msoft-float 28 - 29 - ifeq ($(CONFIG_FRAME_POINTER),y) 30 - KBUILD_CFLAGS += -mno-sched-prolog 31 - endif 32 - 33 - CHECKFLAGS += -D__unicore32__ 34 - 35 - head-y := arch/unicore32/kernel/head.o 36 - 37 - core-y += arch/unicore32/kernel/ 38 - core-y += arch/unicore32/mm/ 39 - 40 - libs-y += arch/unicore32/lib/ 41 - 42 - boot := arch/unicore32/boot 43 - 44 - # Default target when executing plain make 45 - KBUILD_IMAGE := $(boot)/zImage 46 - 47 - all: zImage 48 - 49 - zImage Image uImage: vmlinux 50 - $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ 51 - 52 - archclean: 53 - $(Q)$(MAKE) $(clean)=$(boot) 54 - 55 - define archhelp 56 - echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/zImage)' 57 - echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)' 58 - echo ' uImage - U-Boot wrapped zImage' 59 - endef
-39
arch/unicore32/boot/Makefile
··· 1 - # 2 - # arch/unicore32/boot/Makefile 3 - # 4 - # This file is included by the global makefile so that you can add your own 5 - # architecture-specific flags and dependencies. 6 - # 7 - # This file is subject to the terms and conditions of the GNU General Public 8 - # License. See the file "COPYING" in the main directory of this archive 9 - # for more details. 10 - # 11 - # Copyright (C) 2001~2010 GUAN Xue-tao 12 - # 13 - 14 - targets := Image zImage uImage 15 - 16 - $(obj)/Image: vmlinux FORCE 17 - $(call if_changed,objcopy) 18 - @echo ' Kernel: $@ is ready' 19 - 20 - $(obj)/compressed/vmlinux: $(obj)/Image FORCE 21 - $(Q)$(MAKE) $(build)=$(obj)/compressed $@ 22 - 23 - $(obj)/zImage: $(obj)/compressed/vmlinux FORCE 24 - $(call if_changed,objcopy) 25 - @echo ' Kernel: $@ is ready' 26 - 27 - UIMAGE_ARCH = unicore 28 - UIMAGE_LOADADDR = 0x0 29 - 30 - $(obj)/uImage: $(obj)/zImage FORCE 31 - $(call if_changed,uimage) 32 - @echo ' Image $@ is ready' 33 - 34 - PHONY += initrd 35 - initrd: 36 - @test "$(INITRD)" != "" || \ 37 - (echo You must specify INITRD; exit -1) 38 - 39 - subdir- := compressed
-64
arch/unicore32/boot/compressed/Makefile
··· 1 - # 2 - # linux/arch/unicore32/boot/compressed/Makefile 3 - # 4 - # create a compressed vmlinuz image from the original vmlinux 5 - # 6 - # This file is subject to the terms and conditions of the GNU General Public 7 - # License. See the file "COPYING" in the main directory of this archive 8 - # for more details. 9 - # 10 - # Copyright (C) 2001~2010 GUAN Xue-tao 11 - # 12 - 13 - ccflags-y := -fpic -fno-builtin 14 - asflags-y := -Wa,-march=all 15 - 16 - OBJS := misc.o 17 - 18 - # font.c and font.o 19 - CFLAGS_font.o := -Dstatic= 20 - $(obj)/font.c: $(srctree)/lib/fonts/font_8x8.c 21 - $(call cmd,shipped) 22 - 23 - # piggy.S and piggy.o 24 - suffix_$(CONFIG_KERNEL_GZIP) := gzip 25 - suffix_$(CONFIG_KERNEL_BZIP2) := bz2 26 - suffix_$(CONFIG_KERNEL_LZO) := lzo 27 - suffix_$(CONFIG_KERNEL_LZMA) := lzma 28 - 29 - $(obj)/piggy.$(suffix_y): $(obj)/../Image FORCE 30 - $(call if_changed,$(suffix_y)) 31 - 32 - SEDFLAGS_piggy = s/DECOMP_SUFFIX/$(suffix_y)/ 33 - $(obj)/piggy.S: $(obj)/piggy.S.in 34 - @sed "$(SEDFLAGS_piggy)" < $< > $@ 35 - 36 - $(obj)/piggy.o: $(obj)/piggy.$(suffix_y) $(obj)/piggy.S FORCE 37 - 38 - targets := vmlinux vmlinux.lds font.o font.c head.o misc.o \ 39 - piggy.$(suffix_y) piggy.o piggy.S \ 40 - 41 - # Make sure files are removed during clean 42 - extra-y += piggy.gzip piggy.bz2 piggy.lzo piggy.lzma 43 - 44 - # ? 45 - LDFLAGS_vmlinux += -p 46 - # Report unresolved symbol references 47 - LDFLAGS_vmlinux += --no-undefined 48 - # Delete all temporary local symbols 49 - LDFLAGS_vmlinux += -X 50 - # Next argument is a linker script 51 - LDFLAGS_vmlinux += -T 52 - 53 - # For uidivmod 54 - $(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/head.o $(obj)/piggy.o \ 55 - $(obj)/misc.o FORCE 56 - $(call if_changed,ld) 57 - 58 - # We now have a PIC decompressor implementation. Decompressors running 59 - # from RAM should not define ZTEXTADDR. Decompressors running directly 60 - # from ROM or Flash must define ZTEXTADDR (preferably via the config) 61 - ZTEXTADDR := 0x03000000 62 - ZBSSADDR := ALIGN(4) 63 - 64 - CPPFLAGS_vmlinux.lds = -DTEXT_START="$(ZTEXTADDR)" -DBSS_START="$(ZBSSADDR)"
-201
arch/unicore32/boot/compressed/head.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/boot/compressed/head.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/linkage.h> 10 - #include <mach/memory.h> 11 - 12 - #define csub cmpsub 13 - #define cand cmpand 14 - #define nop8 nop; nop; nop; nop; nop; nop; nop; nop 15 - 16 - .section ".start", #alloc, #execinstr 17 - .text 18 - start: 19 - .type start,#function 20 - 21 - /* Initialize ASR, PRIV mode and INTR off */ 22 - mov r0, #0xD3 23 - mov.a asr, r0 24 - 25 - adr r0, LC0 26 - ldm (r1, r2, r3, r5, r6, r7, r8), [r0]+ 27 - ldw sp, [r0+], #28 28 - sub.a r0, r0, r1 @ calculate the delta offset 29 - 30 - /* 31 - * if delta is zero, we are running at the address 32 - * we were linked at. 33 - */ 34 - beq not_relocated 35 - 36 - /* 37 - * We're running at a different address. We need to fix 38 - * up various pointers: 39 - * r5 - zImage base address (_start) 40 - * r7 - GOT start 41 - * r8 - GOT end 42 - */ 43 - add r5, r5, r0 44 - add r7, r7, r0 45 - add r8, r8, r0 46 - 47 - /* 48 - * we need to fix up pointers into the BSS region. 49 - * r2 - BSS start 50 - * r3 - BSS end 51 - * sp - stack pointer 52 - */ 53 - add r2, r2, r0 54 - add r3, r3, r0 55 - add sp, sp, r0 56 - 57 - /* 58 - * Relocate all entries in the GOT table. 59 - * This fixes up the C references. 60 - * r7 - GOT start 61 - * r8 - GOT end 62 - */ 63 - 1001: ldw r1, [r7+], #0 64 - add r1, r1, r0 65 - stw.w r1, [r7]+, #4 66 - csub.a r7, r8 67 - bub 1001b 68 - 69 - not_relocated: 70 - /* 71 - * Clear BSS region. 72 - * r2 - BSS start 73 - * r3 - BSS end 74 - */ 75 - mov r0, #0 76 - 1002: stw.w r0, [r2]+, #4 77 - csub.a r2, r3 78 - bub 1002b 79 - 80 - /* 81 - * Turn on the cache. 82 - */ 83 - mov r0, #0 84 - movc p0.c5, r0, #28 @ cache invalidate all 85 - nop8 86 - movc p0.c6, r0, #6 @ tlb invalidate all 87 - nop8 88 - 89 - mov r0, #0x1c @ en icache and wb dcache 90 - movc p0.c1, r0, #0 91 - nop8 92 - 93 - /* 94 - * Set up some pointers, for starting decompressing. 95 - */ 96 - 97 - mov r1, sp @ malloc space above stack 98 - add r2, sp, #0x10000 @ 64k max 99 - 100 - /* 101 - * Check to see if we will overwrite ourselves. 102 - * r4 = final kernel address 103 - * r5 = start of this image 104 - * r6 = size of decompressed image 105 - * r2 = end of malloc space (and therefore this image) 106 - * We basically want: 107 - * r4 >= r2 -> OK 108 - * r4 + image length <= r5 -> OK 109 - */ 110 - ldw r4, =KERNEL_IMAGE_START 111 - csub.a r4, r2 112 - bea wont_overwrite 113 - add r0, r4, r6 114 - csub.a r0, r5 115 - beb wont_overwrite 116 - 117 - /* 118 - * If overwrite, just print error message 119 - */ 120 - b __error_overwrite 121 - 122 - /* 123 - * We're not in danger of overwriting ourselves. 124 - * Do this the simple way. 125 - */ 126 - wont_overwrite: 127 - /* 128 - * decompress_kernel: 129 - * r0: output_start 130 - * r1: free_mem_ptr_p 131 - * r2: free_mem_ptr_end_p 132 - */ 133 - mov r0, r4 134 - b.l decompress_kernel @ C functions 135 - 136 - /* 137 - * Clean and flush the cache to maintain consistency. 138 - */ 139 - mov r0, #0 140 - movc p0.c5, r0, #14 @ flush dcache 141 - nop8 142 - movc p0.c5, r0, #20 @ icache invalidate all 143 - nop8 144 - 145 - /* 146 - * Turn off the Cache and MMU. 147 - */ 148 - mov r0, #0 @ disable i/d cache and MMU 149 - movc p0.c1, r0, #0 150 - nop8 151 - 152 - mov r0, #0 @ must be zero 153 - ldw r4, =KERNEL_IMAGE_START 154 - mov pc, r4 @ call kernel 155 - 156 - 157 - .align 2 158 - .type LC0, #object 159 - LC0: .word LC0 @ r1 160 - .word __bss_start @ r2 161 - .word _end @ r3 162 - .word _start @ r5 163 - .word _image_size @ r6 164 - .word _got_start @ r7 165 - .word _got_end @ r8 166 - .word decompress_stack_end @ sp 167 - .size LC0, . - LC0 168 - 169 - print_string: 170 - #ifdef CONFIG_DEBUG_OCD 171 - 2001: ldb.w r1, [r0]+, #1 172 - csub.a r1, #0 173 - bne 2002f 174 - mov pc, lr 175 - 2002: 176 - movc r2, p1.c0, #0 177 - cand.a r2, #2 178 - bne 2002b 179 - movc p1.c1, r1, #1 180 - csub.a r1, #'\n' 181 - cmoveq r1, #'\r' 182 - beq 2002b 183 - b 2001b 184 - #else 185 - mov pc, lr 186 - #endif 187 - 188 - __error_overwrite: 189 - adr r0, str_error 190 - b.l print_string 191 - 2001: nop8 192 - b 2001b 193 - str_error: .asciz "\nError: Kernel address OVERWRITE\n" 194 - .align 195 - 196 - .ltorg 197 - 198 - .align 4 199 - .section ".stack", "aw", %nobits 200 - decompress_stack: .space 4096 201 - decompress_stack_end:
-123
arch/unicore32/boot/compressed/misc.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/boot/compressed/misc.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - #include <asm/unaligned.h> 11 - #include <mach/uncompress.h> 12 - 13 - /* 14 - * gzip delarations 15 - */ 16 - unsigned char *output_data; 17 - unsigned long output_ptr; 18 - 19 - unsigned int free_mem_ptr; 20 - unsigned int free_mem_end_ptr; 21 - 22 - #define STATIC static 23 - #define STATIC_RW_DATA /* non-static please */ 24 - 25 - /* 26 - * arch-dependent implementations 27 - */ 28 - #ifndef ARCH_HAVE_DECOMP_ERROR 29 - #define arch_decomp_error(x) 30 - #endif 31 - 32 - #ifndef ARCH_HAVE_DECOMP_SETUP 33 - #define arch_decomp_setup() 34 - #endif 35 - 36 - #ifndef ARCH_HAVE_DECOMP_PUTS 37 - #define arch_decomp_puts(p) 38 - #endif 39 - 40 - void *memcpy(void *dest, const void *src, size_t n) 41 - { 42 - int i = 0; 43 - unsigned char *d = (unsigned char *)dest, *s = (unsigned char *)src; 44 - 45 - for (i = n >> 3; i > 0; i--) { 46 - *d++ = *s++; 47 - *d++ = *s++; 48 - *d++ = *s++; 49 - *d++ = *s++; 50 - *d++ = *s++; 51 - *d++ = *s++; 52 - *d++ = *s++; 53 - *d++ = *s++; 54 - } 55 - 56 - if (n & 1 << 2) { 57 - *d++ = *s++; 58 - *d++ = *s++; 59 - *d++ = *s++; 60 - *d++ = *s++; 61 - } 62 - 63 - if (n & 1 << 1) { 64 - *d++ = *s++; 65 - *d++ = *s++; 66 - } 67 - 68 - if (n & 1) 69 - *d++ = *s++; 70 - 71 - return dest; 72 - } 73 - 74 - void error(char *x) 75 - { 76 - arch_decomp_puts("\n\n"); 77 - arch_decomp_puts(x); 78 - arch_decomp_puts("\n\n -- System halted"); 79 - 80 - arch_decomp_error(x); 81 - 82 - for (;;) 83 - ; /* Halt */ 84 - } 85 - 86 - /* Heap size should be adjusted for different decompress method */ 87 - #ifdef CONFIG_KERNEL_GZIP 88 - #include "../../../../lib/decompress_inflate.c" 89 - #endif 90 - 91 - #ifdef CONFIG_KERNEL_BZIP2 92 - #include "../../../../lib/decompress_bunzip2.c" 93 - #endif 94 - 95 - #ifdef CONFIG_KERNEL_LZO 96 - #include "../../../../lib/decompress_unlzo.c" 97 - #endif 98 - 99 - #ifdef CONFIG_KERNEL_LZMA 100 - #include "../../../../lib/decompress_unlzma.c" 101 - #endif 102 - 103 - unsigned long decompress_kernel(unsigned long output_start, 104 - unsigned long free_mem_ptr_p, 105 - unsigned long free_mem_ptr_end_p) 106 - { 107 - unsigned char *tmp; 108 - 109 - output_data = (unsigned char *)output_start; 110 - free_mem_ptr = free_mem_ptr_p; 111 - free_mem_end_ptr = free_mem_ptr_end_p; 112 - 113 - arch_decomp_setup(); 114 - 115 - tmp = (unsigned char *) (((unsigned long)input_data_end) - 4); 116 - output_ptr = get_unaligned_le32(tmp); 117 - 118 - arch_decomp_puts("Uncompressing Linux..."); 119 - __decompress(input_data, input_data_end - input_data, NULL, NULL, 120 - output_data, 0, NULL, error); 121 - arch_decomp_puts(" done, booting the kernel.\n"); 122 - return output_ptr; 123 - }
-6
arch/unicore32/boot/compressed/piggy.S.in
··· 1 - .section .piggydata,#alloc 2 - .globl input_data 3 - input_data: 4 - .incbin "arch/unicore32/boot/compressed/piggy.DECOMP_SUFFIX" 5 - .globl input_data_end 6 - input_data_end:
-58
arch/unicore32/boot/compressed/vmlinux.lds.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore/boot/compressed/vmlinux.lds.in 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - OUTPUT_ARCH(unicore32) 10 - ENTRY(_start) 11 - SECTIONS 12 - { 13 - /DISCARD/ : { 14 - /* 15 - * Discard any r/w data - this produces a link error if we have any, 16 - * which is required for PIC decompression. Local data generates 17 - * GOTOFF relocations, which prevents it being relocated independently 18 - * of the text/got segments. 19 - */ 20 - *(.data) 21 - } 22 - 23 - . = TEXT_START; 24 - _text = .; 25 - 26 - .text : { 27 - _start = .; 28 - *(.start) 29 - *(.text) 30 - *(.text.*) 31 - *(.fixup) 32 - *(.gnu.warning) 33 - *(.rodata) 34 - *(.rodata.*) 35 - *(.piggydata) 36 - . = ALIGN(4); 37 - } 38 - 39 - _etext = .; 40 - 41 - /* Assume size of decompressed image is 4x the compressed image */ 42 - _image_size = (_etext - _text) * 4; 43 - 44 - _got_start = .; 45 - .got : { *(.got) } 46 - _got_end = .; 47 - .got.plt : { *(.got.plt) } 48 - _edata = .; 49 - 50 - . = BSS_START; 51 - __bss_start = .; 52 - .bss : { *(.bss) } 53 - _end = .; 54 - 55 - .stack : { *(.stack) } 56 - .comment 0 : { *(.comment) } 57 - } 58 -
-214
arch/unicore32/configs/defconfig
··· 1 - ### General setup 2 - CONFIG_EXPERIMENTAL=y 3 - CONFIG_LOCALVERSION="-unicore32" 4 - CONFIG_SWAP=y 5 - CONFIG_SYSVIPC=y 6 - CONFIG_POSIX_MQUEUE=y 7 - CONFIG_HOTPLUG=y 8 - # Initial RAM filesystem and RAM disk (initramfs/initrd) support 9 - #CONFIG_BLK_DEV_INITRD=y 10 - #CONFIG_INITRAMFS_SOURCE="arch/unicore/ramfs/ramfs_config" 11 - 12 - ### Enable loadable module support 13 - CONFIG_MODULES=n 14 - CONFIG_MODULE_UNLOAD=y 15 - 16 - ### System Type 17 - CONFIG_ARCH_PUV3=y 18 - # Board Selection 19 - CONFIG_PUV3_NB0916=y 20 - # Processor Features 21 - CONFIG_CPU_DCACHE_LINE_DISABLE=y 22 - CONFIG_CPU_TLB_SINGLE_ENTRY_DISABLE=n 23 - 24 - ### Bus support 25 - CONFIG_PCI=y 26 - CONFIG_PCI_LEGACY=n 27 - 28 - ### Boot options 29 - # for debug, adding: earlyprintk=ocd,keep initcall_debug 30 - # others support: test_suspend=mem root=/dev/sda 31 - # hibernate support: resume=/dev/sda3 32 - CONFIG_CMDLINE="earlyprintk=ocd,keep ignore_loglevel" 33 - # TODO: mem=512M video=unifb:1024x600-16@75 34 - # for nfs: root=/dev/nfs rw nfsroot=192.168.10.88:/home/udb/nfs/,rsize=1024,wsize=1024 35 - # ip=192.168.10.83:192.168.10.88:192.168.10.1:255.255.255.0::eth0:off 36 - CONFIG_CMDLINE_FORCE=y 37 - 38 - ### Power management options 39 - CONFIG_PM=y 40 - CONFIG_HIBERNATION=y 41 - CONFIG_PM_STD_PARTITION="/dev/sda3" 42 - CONFIG_CPU_FREQ=n 43 - CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y 44 - 45 - ### Networking support 46 - CONFIG_NET=y 47 - # Networking options 48 - CONFIG_PACKET=m 49 - CONFIG_UNIX=m 50 - # TCP/IP networking 51 - CONFIG_INET=y 52 - CONFIG_IP_MULTICAST=y 53 - CONFIG_IP_PNP=y 54 - CONFIG_IPV6=n 55 - # Wireless 56 - CONFIG_WIRELESS=y 57 - CONFIG_WIRELESS_EXT=y 58 - CONFIG_MAC80211=m 59 - 60 - ### PKUnity SoC Features 61 - CONFIG_USB_WLAN_HED_AQ3=n 62 - CONFIG_USB_CMMB_INNOFIDEI=n 63 - CONFIG_I2C_BATTERY_BQ27200=n 64 - CONFIG_I2C_EEPROM_AT24=n 65 - CONFIG_LCD_BACKLIGHT=n 66 - 67 - CONFIG_PUV3_UMAL=y 68 - CONFIG_PUV3_MUSB=n 69 - CONFIG_PUV3_AC97=n 70 - CONFIG_PUV3_NAND=n 71 - CONFIG_PUV3_MMC=n 72 - CONFIG_PUV3_UART=n 73 - 74 - ### Device Drivers 75 - # Memory Technology Device (MTD) support 76 - CONFIG_MTD=m 77 - CONFIG_MTD_UBI=m 78 - CONFIG_MTD_PARTITIONS=y 79 - CONFIG_MTD_CHAR=m 80 - CONFIG_MTD_BLKDEVS=m 81 - # RAM/ROM/Flash chip drivers 82 - CONFIG_MTD_CFI=m 83 - CONFIG_MTD_JEDECPROBE=m 84 - CONFIG_MTD_CFI_AMDSTD=m 85 - # Mapping drivers for chip access 86 - CONFIG_MTD_PHYSMAP=m 87 - 88 - # Block devices 89 - CONFIG_BLK_DEV_LOOP=m 90 - 91 - # SCSI device support 92 - CONFIG_SCSI=y 93 - CONFIG_BLK_DEV_SD=y 94 - CONFIG_BLK_DEV_SR=m 95 - CONFIG_CHR_DEV_SG=m 96 - 97 - # Serial ATA (prod) and Parallel ATA (experimental) drivers 98 - CONFIG_ATA=y 99 - CONFIG_SATA_VIA=y 100 - 101 - # Network device support 102 - CONFIG_NETDEVICES=y 103 - CONFIG_NET_ETHERNET=y 104 - CONFIG_NETDEV_1000=y 105 - # Wireless LAN 106 - CONFIG_WLAN_80211=n 107 - CONFIG_RT2X00=n 108 - CONFIG_RT73USB=n 109 - 110 - # Input device support 111 - CONFIG_INPUT_EVDEV=m 112 - # Keyboards 113 - CONFIG_KEYBOARD_GPIO=m 114 - 115 - # I2C support 116 - CONFIG_I2C=y 117 - CONFIG_I2C_PUV3=y 118 - 119 - # Hardware Monitoring support 120 - #CONFIG_SENSORS_LM75=m 121 - # Generic Thermal sysfs driver 122 - #CONFIG_THERMAL=y 123 - #CONFIG_THERMAL_HWMON=y 124 - 125 - # Multimedia support 126 - CONFIG_MEDIA_SUPPORT=n 127 - CONFIG_VIDEO_DEV=n 128 - CONFIG_USB_VIDEO_CLASS=n 129 - 130 - # Graphics support 131 - CONFIG_FB=y 132 - CONFIG_FB_PUV3_UNIGFX=y 133 - # Console display driver support 134 - CONFIG_VGA_CONSOLE=n 135 - CONFIG_FRAMEBUFFER_CONSOLE=y 136 - CONFIG_FONTS=y 137 - CONFIG_FONT_8x8=y 138 - CONFIG_FONT_8x16=y 139 - # Bootup logo 140 - CONFIG_LOGO=n 141 - 142 - # Sound card support 143 - CONFIG_SOUND=m 144 - # Advanced Linux Sound Architecture 145 - CONFIG_SND=m 146 - CONFIG_SND_MIXER_OSS=m 147 - CONFIG_SND_PCM_OSS=m 148 - 149 - # USB support 150 - CONFIG_USB_ARCH_HAS_HCD=n 151 - CONFIG_USB=n 152 - CONFIG_USB_PRINTER=n 153 - CONFIG_USB_STORAGE=n 154 - # Inventra Highspeed Dual Role Controller 155 - CONFIG_USB_MUSB_HDRC=n 156 - 157 - # LED Support 158 - CONFIG_NEW_LEDS=y 159 - CONFIG_LEDS_CLASS=y 160 - CONFIG_LEDS_GPIO=y 161 - # LED Triggers 162 - CONFIG_LEDS_TRIGGERS=y 163 - CONFIG_LEDS_TRIGGER_TIMER=y 164 - CONFIG_LEDS_TRIGGER_DISK=y 165 - CONFIG_LEDS_TRIGGER_HEARTBEAT=y 166 - 167 - # Real Time Clock 168 - CONFIG_RTC_LIB=y 169 - CONFIG_RTC_CLASS=y 170 - CONFIG_RTC_DRV_PUV3=y 171 - 172 - ### File systems 173 - CONFIG_EXT2_FS=m 174 - CONFIG_EXT3_FS=y 175 - CONFIG_EXT4_FS=y 176 - CONFIG_FUSE_FS=m 177 - # CD-ROM/DVD Filesystems 178 - CONFIG_ISO9660_FS=m 179 - CONFIG_JOLIET=y 180 - CONFIG_UDF_FS=m 181 - # DOS/FAT/NT Filesystems 182 - CONFIG_VFAT_FS=m 183 - # Pseudo filesystems 184 - CONFIG_PROC_FS=y 185 - CONFIG_SYSFS=y 186 - CONFIG_TMPFS=y 187 - # Miscellaneous filesystems 188 - CONFIG_MISC_FILESYSTEMS=y 189 - CONFIG_JFFS2_FS=m 190 - CONFIG_UBIFS_FS=m 191 - # Network File Systems 192 - CONFIG_NETWORK_FILESYSTEMS=y 193 - CONFIG_NFS_FS=y 194 - CONFIG_NFS_V3=y 195 - CONFIG_ROOT_NFS=y 196 - # Partition Types 197 - CONFIG_PARTITION_ADVANCED=y 198 - CONFIG_MSDOS_PARTITION=y 199 - # Native language support 200 - CONFIG_NLS=y 201 - CONFIG_NLS_CODEPAGE_437=m 202 - CONFIG_NLS_CODEPAGE_936=m 203 - CONFIG_NLS_ISO8859_1=m 204 - CONFIG_NLS_UTF8=m 205 - 206 - ### Kernel hacking 207 - CONFIG_FRAME_WARN=8096 208 - CONFIG_MAGIC_SYSRQ=y 209 - CONFIG_DEBUG_KERNEL=y 210 - CONFIG_PROVE_LOCKING=n 211 - CONFIG_DEBUG_BUGVERBOSE=y 212 - CONFIG_FRAME_POINTER=y 213 - CONFIG_DEBUG_LL=y 214 -
-7
arch/unicore32/include/asm/Kbuild
··· 1 - # SPDX-License-Identifier: GPL-2.0 2 - generic-y += extable.h 3 - generic-y += kvm_para.h 4 - generic-y += mcs_spinlock.h 5 - generic-y += parport.h 6 - generic-y += syscalls.h 7 - generic-y += user.h
-128
arch/unicore32/include/asm/assembler.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/assembler.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * Do not include any C declarations in this file - it is included by 10 - * assembler source. 11 - */ 12 - #ifndef __ASSEMBLY__ 13 - #error "Only include this from assembly code" 14 - #endif 15 - 16 - #include <asm/ptrace.h> 17 - 18 - /* 19 - * Little Endian independent macros for shifting bytes within registers. 20 - */ 21 - #define pull >> 22 - #define push << 23 - #define get_byte_0 << #0 24 - #define get_byte_1 >> #8 25 - #define get_byte_2 >> #16 26 - #define get_byte_3 >> #24 27 - #define put_byte_0 << #0 28 - #define put_byte_1 << #8 29 - #define put_byte_2 << #16 30 - #define put_byte_3 << #24 31 - 32 - #define cadd cmpadd 33 - #define cand cmpand 34 - #define csub cmpsub 35 - #define cxor cmpxor 36 - 37 - /* 38 - * Enable and disable interrupts 39 - */ 40 - .macro disable_irq, temp 41 - mov \temp, asr 42 - andn \temp, \temp, #0xFF 43 - or \temp, \temp, #PSR_I_BIT | PRIV_MODE 44 - mov.a asr, \temp 45 - .endm 46 - 47 - .macro enable_irq, temp 48 - mov \temp, asr 49 - andn \temp, \temp, #0xFF 50 - or \temp, \temp, #PRIV_MODE 51 - mov.a asr, \temp 52 - .endm 53 - 54 - #define USER(x...) \ 55 - 9999: x; \ 56 - .pushsection __ex_table, "a"; \ 57 - .align 3; \ 58 - .long 9999b, 9001f; \ 59 - .popsection 60 - 61 - .macro notcond, cond, nexti = .+8 62 - .ifc \cond, eq 63 - bne \nexti 64 - .else; .ifc \cond, ne 65 - beq \nexti 66 - .else; .ifc \cond, ea 67 - bub \nexti 68 - .else; .ifc \cond, ub 69 - bea \nexti 70 - .else; .ifc \cond, fs 71 - bns \nexti 72 - .else; .ifc \cond, ns 73 - bfs \nexti 74 - .else; .ifc \cond, fv 75 - bnv \nexti 76 - .else; .ifc \cond, nv 77 - bfv \nexti 78 - .else; .ifc \cond, ua 79 - beb \nexti 80 - .else; .ifc \cond, eb 81 - bua \nexti 82 - .else; .ifc \cond, eg 83 - bsl \nexti 84 - .else; .ifc \cond, sl 85 - beg \nexti 86 - .else; .ifc \cond, sg 87 - bel \nexti 88 - .else; .ifc \cond, el 89 - bsg \nexti 90 - .else; .ifnc \cond, al 91 - .error "Unknown cond in notcond macro argument" 92 - .endif; .endif; .endif; .endif; .endif; .endif; .endif 93 - .endif; .endif; .endif; .endif; .endif; .endif; .endif 94 - .endif 95 - .endm 96 - 97 - .macro usracc, instr, reg, ptr, inc, cond, rept, abort 98 - .rept \rept 99 - notcond \cond, .+8 100 - 9999 : 101 - .if \inc == 1 102 - \instr\()b.u \reg, [\ptr], #\inc 103 - .elseif \inc == 4 104 - \instr\()w.u \reg, [\ptr], #\inc 105 - .else 106 - .error "Unsupported inc macro argument" 107 - .endif 108 - 109 - .pushsection __ex_table, "a" 110 - .align 3 111 - .long 9999b, \abort 112 - .popsection 113 - .endr 114 - .endm 115 - 116 - .macro strusr, reg, ptr, inc, cond = al, rept = 1, abort = 9001f 117 - usracc st, \reg, \ptr, \inc, \cond, \rept, \abort 118 - .endm 119 - 120 - .macro ldrusr, reg, ptr, inc, cond = al, rept = 1, abort = 9001f 121 - usracc ld, \reg, \ptr, \inc, \cond, \rept, \abort 122 - .endm 123 - 124 - .macro nop8 125 - .rept 8 126 - nop 127 - .endr 128 - .endm
-16
arch/unicore32/include/asm/barrier.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * Memory barrier implementations for PKUnity SoC and UniCore ISA 4 - * 5 - * Copyright (C) 2001-2012 GUAN Xue-tao 6 - */ 7 - #ifndef __UNICORE_BARRIER_H__ 8 - #define __UNICORE_BARRIER_H__ 9 - 10 - #define isb() __asm__ __volatile__ ("" : : : "memory") 11 - #define dsb() __asm__ __volatile__ ("" : : : "memory") 12 - #define dmb() __asm__ __volatile__ ("" : : : "memory") 13 - 14 - #include <asm-generic/barrier.h> 15 - 16 - #endif /* __UNICORE_BARRIER_H__ */
-46
arch/unicore32/include/asm/bitops.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/bitops.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - #ifndef __UNICORE_BITOPS_H__ 11 - #define __UNICORE_BITOPS_H__ 12 - 13 - #define _ASM_GENERIC_BITOPS_FLS_H_ 14 - #define _ASM_GENERIC_BITOPS___FLS_H_ 15 - #define _ASM_GENERIC_BITOPS_FFS_H_ 16 - #define _ASM_GENERIC_BITOPS___FFS_H_ 17 - /* 18 - * On UNICORE, those functions can be implemented around 19 - * the cntlz instruction for much better code efficiency. 20 - */ 21 - 22 - static inline int fls(unsigned int x) 23 - { 24 - int ret; 25 - 26 - asm("cntlz\t%0, %1" : "=r" (ret) : "r" (x) : "cc"); 27 - ret = 32 - ret; 28 - 29 - return ret; 30 - } 31 - 32 - #define __fls(x) (fls(x) - 1) 33 - #define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); }) 34 - #define __ffs(x) (ffs(x) - 1) 35 - 36 - #include <asm-generic/bitops.h> 37 - 38 - /* following definitions: to avoid using codes in lib/find_*.c */ 39 - #define find_next_bit find_next_bit 40 - #define find_next_zero_bit find_next_zero_bit 41 - #define find_first_bit find_first_bit 42 - #define find_first_zero_bit find_first_zero_bit 43 - 44 - #include <asm-generic/bitops/find.h> 45 - 46 - #endif /* __UNICORE_BITOPS_H__ */
-20
arch/unicore32/include/asm/bug.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * Bug handling for PKUnity SoC and UniCore ISA 4 - * 5 - * Copyright (C) 2001-2012 GUAN Xue-tao 6 - */ 7 - #ifndef __UNICORE_BUG_H__ 8 - #define __UNICORE_BUG_H__ 9 - 10 - #include <asm-generic/bug.h> 11 - 12 - struct pt_regs; 13 - struct siginfo; 14 - 15 - extern void die(const char *msg, struct pt_regs *regs, int err); 16 - extern void uc32_notify_die(const char *str, struct pt_regs *regs, 17 - int sig, int code, void __user *addr, 18 - unsigned long err, unsigned long trap); 19 - 20 - #endif /* __UNICORE_BUG_H__ */
-24
arch/unicore32/include/asm/cache.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/cache.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_CACHE_H__ 10 - #define __UNICORE_CACHE_H__ 11 - 12 - #define L1_CACHE_SHIFT (5) 13 - #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 14 - 15 - /* 16 - * Memory returned by kmalloc() may be used for DMA, so we must make 17 - * sure that all such allocations are cache aligned. Otherwise, 18 - * unrelated code may cause parts of the buffer to be read into the 19 - * cache before the transfer is done, causing old data to be seen by 20 - * the CPU. 21 - */ 22 - #define ARCH_DMA_MINALIGN L1_CACHE_BYTES 23 - 24 - #endif
-186
arch/unicore32/include/asm/cacheflush.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/cacheflush.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_CACHEFLUSH_H__ 10 - #define __UNICORE_CACHEFLUSH_H__ 11 - 12 - #include <linux/mm.h> 13 - 14 - #include <asm/shmparam.h> 15 - 16 - #define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT) 17 - 18 - /* 19 - * This flag is used to indicate that the page pointed to by a pte is clean 20 - * and does not require cleaning before returning it to the user. 21 - */ 22 - #define PG_dcache_clean PG_arch_1 23 - 24 - /* 25 - * MM Cache Management 26 - * =================== 27 - * 28 - * The arch/unicore32/mm/cache.S files implement these methods. 29 - * 30 - * Start addresses are inclusive and end addresses are exclusive; 31 - * start addresses should be rounded down, end addresses up. 32 - * 33 - * See Documentation/core-api/cachetlb.rst for more information. 34 - * Please note that the implementation of these, and the required 35 - * effects are cache-type (VIVT/VIPT/PIPT) specific. 36 - * 37 - * flush_icache_all() 38 - * 39 - * Unconditionally clean and invalidate the entire icache. 40 - * Currently only needed for cache-v6.S and cache-v7.S, see 41 - * __flush_icache_all for the generic implementation. 42 - * 43 - * flush_kern_all() 44 - * 45 - * Unconditionally clean and invalidate the entire cache. 46 - * 47 - * flush_user_all() 48 - * 49 - * Clean and invalidate all user space cache entries 50 - * before a change of page tables. 51 - * 52 - * flush_user_range(start, end, flags) 53 - * 54 - * Clean and invalidate a range of cache entries in the 55 - * specified address space before a change of page tables. 56 - * - start - user start address (inclusive, page aligned) 57 - * - end - user end address (exclusive, page aligned) 58 - * - flags - vma->vm_flags field 59 - * 60 - * coherent_kern_range(start, end) 61 - * 62 - * Ensure coherency between the Icache and the Dcache in the 63 - * region described by start, end. If you have non-snooping 64 - * Harvard caches, you need to implement this function. 65 - * - start - virtual start address 66 - * - end - virtual end address 67 - * 68 - * coherent_user_range(start, end) 69 - * 70 - * Ensure coherency between the Icache and the Dcache in the 71 - * region described by start, end. If you have non-snooping 72 - * Harvard caches, you need to implement this function. 73 - * - start - virtual start address 74 - * - end - virtual end address 75 - * 76 - * flush_kern_dcache_area(kaddr, size) 77 - * 78 - * Ensure that the data held in page is written back. 79 - * - kaddr - page address 80 - * - size - region size 81 - * 82 - * DMA Cache Coherency 83 - * =================== 84 - * 85 - * dma_flush_range(start, end) 86 - * 87 - * Clean and invalidate the specified virtual address range. 88 - * - start - virtual start address 89 - * - end - virtual end address 90 - */ 91 - 92 - extern void __cpuc_flush_icache_all(void); 93 - extern void __cpuc_flush_kern_all(void); 94 - extern void __cpuc_flush_user_all(void); 95 - extern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned int); 96 - extern void __cpuc_coherent_kern_range(unsigned long, unsigned long); 97 - extern void __cpuc_coherent_user_range(unsigned long, unsigned long); 98 - extern void __cpuc_flush_dcache_area(void *, size_t); 99 - extern void __cpuc_flush_kern_dcache_area(void *addr, size_t size); 100 - 101 - /* 102 - * Copy user data from/to a page which is mapped into a different 103 - * processes address space. Really, we want to allow our "user 104 - * space" model to handle this. 105 - */ 106 - extern void copy_to_user_page(struct vm_area_struct *, struct page *, 107 - unsigned long, void *, const void *, unsigned long); 108 - #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ 109 - do { \ 110 - memcpy(dst, src, len); \ 111 - } while (0) 112 - 113 - /* 114 - * Convert calls to our calling convention. 115 - */ 116 - /* Invalidate I-cache */ 117 - static inline void __flush_icache_all(void) 118 - { 119 - asm("movc p0.c5, %0, #20;\n" 120 - "nop; nop; nop; nop; nop; nop; nop; nop\n" 121 - : 122 - : "r" (0)); 123 - } 124 - 125 - #define flush_cache_all() __cpuc_flush_kern_all() 126 - 127 - extern void flush_cache_mm(struct mm_struct *mm); 128 - extern void flush_cache_range(struct vm_area_struct *vma, 129 - unsigned long start, unsigned long end); 130 - extern void flush_cache_page(struct vm_area_struct *vma, 131 - unsigned long user_addr, unsigned long pfn); 132 - 133 - #define flush_cache_dup_mm(mm) flush_cache_mm(mm) 134 - 135 - /* 136 - * Perform necessary cache operations to ensure that data previously 137 - * stored within this range of addresses can be executed by the CPU. 138 - */ 139 - #define flush_icache_range(s, e) __cpuc_coherent_kern_range(s, e) 140 - 141 - /* 142 - * Perform necessary cache operations to ensure that the TLB will 143 - * see data written in the specified area. 144 - */ 145 - #define clean_dcache_area(start, size) cpu_dcache_clean_area(start, size) 146 - 147 - /* 148 - * flush_dcache_page is used when the kernel has written to the page 149 - * cache page at virtual address page->virtual. 150 - * 151 - * If this page isn't mapped (ie, page_mapping == NULL), or it might 152 - * have userspace mappings, then we _must_ always clean + invalidate 153 - * the dcache entries associated with the kernel mapping. 154 - * 155 - * Otherwise we can defer the operation, and clean the cache when we are 156 - * about to change to user space. This is the same method as used on SPARC64. 157 - * See update_mmu_cache for the user space part. 158 - */ 159 - #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 160 - extern void flush_dcache_page(struct page *); 161 - 162 - #define flush_dcache_mmap_lock(mapping) do { } while (0) 163 - #define flush_dcache_mmap_unlock(mapping) do { } while (0) 164 - 165 - /* 166 - * We don't appear to need to do anything here. In fact, if we did, we'd 167 - * duplicate cache flushing elsewhere performed by flush_dcache_page(). 168 - */ 169 - #define flush_icache_page(vma, page) do { } while (0) 170 - 171 - /* 172 - * flush_cache_vmap() is used when creating mappings (eg, via vmap, 173 - * vmalloc, ioremap etc) in kernel space for pages. On non-VIPT 174 - * caches, since the direct-mappings of these pages may contain cached 175 - * data, we need to do a full cache flush to ensure that writebacks 176 - * don't corrupt data placed into these pages via the new mappings. 177 - */ 178 - static inline void flush_cache_vmap(unsigned long start, unsigned long end) 179 - { 180 - } 181 - 182 - static inline void flush_cache_vunmap(unsigned long start, unsigned long end) 183 - { 184 - } 185 - 186 - #endif
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arch/unicore32/include/asm/checksum.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/checksum.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * IP checksum routines 10 - */ 11 - #ifndef __UNICORE_CHECKSUM_H__ 12 - #define __UNICORE_CHECKSUM_H__ 13 - 14 - /* 15 - * computes the checksum of the TCP/UDP pseudo-header 16 - * returns a 16-bit checksum, already complemented 17 - */ 18 - 19 - static inline __wsum 20 - csum_tcpudp_nofold(__be32 saddr, __be32 daddr, __u32 len, 21 - __u8 proto, __wsum sum) 22 - { 23 - __asm__( 24 - "add.a %0, %1, %2\n" 25 - "addc.a %0, %0, %3\n" 26 - "addc.a %0, %0, %4 << #8\n" 27 - "addc.a %0, %0, %5\n" 28 - "addc %0, %0, #0\n" 29 - : "=&r"(sum) 30 - : "r" (sum), "r" (daddr), "r" (saddr), "r" (len), "Ir" (htons(proto)) 31 - : "cc"); 32 - return sum; 33 - } 34 - #define csum_tcpudp_nofold csum_tcpudp_nofold 35 - 36 - #include <asm-generic/checksum.h> 37 - 38 - #endif
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arch/unicore32/include/asm/cmpxchg.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * Atomics xchg/cmpxchg for PKUnity SoC and UniCore ISA 4 - * 5 - * Copyright (C) 2001-2012 GUAN Xue-tao 6 - */ 7 - #ifndef __UNICORE_CMPXCHG_H__ 8 - #define __UNICORE_CMPXCHG_H__ 9 - 10 - /* 11 - * Generate a link failure on undefined symbol if the pointer points to a value 12 - * of unsupported size. 13 - */ 14 - extern void __xchg_bad_pointer(void); 15 - 16 - static inline unsigned long __xchg(unsigned long x, volatile void *ptr, 17 - int size) 18 - { 19 - unsigned long ret; 20 - 21 - switch (size) { 22 - case 1: 23 - asm volatile("swapb %0, %1, [%2]" 24 - : "=&r" (ret) 25 - : "r" (x), "r" (ptr) 26 - : "memory", "cc"); 27 - break; 28 - case 4: 29 - asm volatile("swapw %0, %1, [%2]" 30 - : "=&r" (ret) 31 - : "r" (x), "r" (ptr) 32 - : "memory", "cc"); 33 - break; 34 - default: 35 - __xchg_bad_pointer(); 36 - } 37 - 38 - return ret; 39 - } 40 - 41 - #define xchg(ptr, x) \ 42 - ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr)))) 43 - 44 - #include <asm-generic/cmpxchg-local.h> 45 - 46 - /* 47 - * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make 48 - * them available. 49 - */ 50 - #define cmpxchg_local(ptr, o, n) \ 51 - ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), \ 52 - (unsigned long)(o), (unsigned long)(n), sizeof(*(ptr)))) 53 - #define cmpxchg64_local(ptr, o, n) \ 54 - __cmpxchg64_local_generic((ptr), (o), (n)) 55 - 56 - #include <asm-generic/cmpxchg.h> 57 - 58 - #endif /* __UNICORE_CMPXCHG_H__ */
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arch/unicore32/include/asm/cpu-single.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/cpu-single.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_CPU_SINGLE_H__ 10 - #define __UNICORE_CPU_SINGLE_H__ 11 - 12 - #include <asm/page.h> 13 - #include <asm/memory.h> 14 - 15 - #ifdef __KERNEL__ 16 - #ifndef __ASSEMBLY__ 17 - 18 - #define cpu_switch_mm(pgd, mm) cpu_do_switch_mm(virt_to_phys(pgd), mm) 19 - 20 - #define cpu_get_pgd() \ 21 - ({ \ 22 - unsigned long pg; \ 23 - __asm__("movc %0, p0.c2, #0" \ 24 - : "=r" (pg) : : "cc"); \ 25 - pg &= ~0x0fff; \ 26 - (pgd_t *)phys_to_virt(pg); \ 27 - }) 28 - 29 - struct mm_struct; 30 - 31 - /* declare all the functions as extern */ 32 - extern void cpu_proc_fin(void); 33 - extern int cpu_do_idle(void); 34 - extern void cpu_dcache_clean_area(void *, int); 35 - extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm); 36 - extern void cpu_set_pte(pte_t *ptep, pte_t pte); 37 - extern void cpu_reset(unsigned long addr) __attribute__((noreturn)); 38 - 39 - #endif /* __ASSEMBLY__ */ 40 - #endif /* __KERNEL__ */ 41 - 42 - #endif /* __UNICORE_CPU_SINGLE_H__ */
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arch/unicore32/include/asm/cputype.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/cputype.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_CPUTYPE_H__ 10 - #define __UNICORE_CPUTYPE_H__ 11 - 12 - #include <linux/stringify.h> 13 - 14 - #define CPUID_CPUID 0 15 - #define CPUID_CACHETYPE 1 16 - 17 - #define read_cpuid(reg) \ 18 - ({ \ 19 - unsigned int __val; \ 20 - asm("movc %0, p0.c0, #" __stringify(reg) \ 21 - : "=r" (__val) \ 22 - : \ 23 - : "cc"); \ 24 - __val; \ 25 - }) 26 - 27 - #define uc32_cpuid read_cpuid(CPUID_CPUID) 28 - #define uc32_cachetype read_cpuid(CPUID_CACHETYPE) 29 - 30 - #endif
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arch/unicore32/include/asm/delay.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/delay.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * Delay routines, using a pre-computed "loops_per_second" value. 10 - */ 11 - #ifndef __UNICORE_DELAY_H__ 12 - #define __UNICORE_DELAY_H__ 13 - 14 - #include <asm/param.h> /* HZ */ 15 - 16 - extern void __delay(int loops); 17 - 18 - /* 19 - * This function intentionally does not exist; if you see references to 20 - * it, it means that you're calling udelay() with an out of range value. 21 - * 22 - * With currently imposed limits, this means that we support a max delay 23 - * of 2000us. Further limits: HZ<=1000 and bogomips<=3355 24 - */ 25 - extern void __bad_udelay(void); 26 - 27 - /* 28 - * division by multiplication: you don't have to worry about 29 - * loss of precision. 30 - * 31 - * Use only for very small delays ( < 1 msec). Should probably use a 32 - * lookup table, really, as the multiplications take much too long with 33 - * short delays. This is a "reasonable" implementation, though (and the 34 - * first constant multiplications gets optimized away if the delay is 35 - * a constant) 36 - */ 37 - extern void __udelay(unsigned long usecs); 38 - extern void __const_udelay(unsigned long); 39 - 40 - #define MAX_UDELAY_MS 2 41 - 42 - #define udelay(n) \ 43 - (__builtin_constant_p(n) ? \ 44 - ((n) > (MAX_UDELAY_MS * 1000) ? __bad_udelay() : \ 45 - __const_udelay((n) * ((2199023U*HZ)>>11))) : \ 46 - __udelay(n)) 47 - 48 - #endif /* __UNICORE_DELAY_H__ */ 49 -
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arch/unicore32/include/asm/dma.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/dma.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - #ifndef __UNICORE_DMA_H__ 11 - #define __UNICORE_DMA_H__ 12 - 13 - #include <asm/memory.h> 14 - #include <asm-generic/dma.h> 15 - 16 - #ifdef CONFIG_PCI 17 - extern int isa_dma_bridge_buggy; 18 - #endif 19 - 20 - #endif /* __UNICORE_DMA_H__ */
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arch/unicore32/include/asm/elf.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/elf.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - #ifndef __UNICORE_ELF_H__ 11 - #define __UNICORE_ELF_H__ 12 - 13 - #include <asm/hwcap.h> 14 - 15 - /* 16 - * ELF register definitions.. 17 - */ 18 - #include <asm/ptrace.h> 19 - #include <linux/elf-em.h> 20 - 21 - typedef unsigned long elf_greg_t; 22 - typedef unsigned long elf_freg_t[3]; 23 - 24 - #define ELF_NGREG (sizeof(struct pt_regs) / sizeof(elf_greg_t)) 25 - typedef elf_greg_t elf_gregset_t[ELF_NGREG]; 26 - 27 - typedef struct fp_state elf_fpregset_t; 28 - 29 - #define R_UNICORE_NONE 0 30 - #define R_UNICORE_PC24 1 31 - #define R_UNICORE_ABS32 2 32 - #define R_UNICORE_CALL 28 33 - #define R_UNICORE_JUMP24 29 34 - 35 - /* 36 - * These are used to set parameters in the core dumps. 37 - */ 38 - #define ELF_CLASS ELFCLASS32 39 - #define ELF_DATA ELFDATA2LSB 40 - #define ELF_ARCH EM_UNICORE 41 - 42 - /* 43 - * This yields a string that ld.so will use to load implementation 44 - * specific libraries for optimization. This is more specific in 45 - * intent than poking at uname or /proc/cpuinfo. 46 - * 47 - */ 48 - #define ELF_PLATFORM_SIZE 8 49 - #define ELF_PLATFORM (elf_platform) 50 - 51 - extern char elf_platform[]; 52 - 53 - struct elf32_hdr; 54 - 55 - /* 56 - * This is used to ensure we don't load something for the wrong architecture. 57 - */ 58 - extern int elf_check_arch(const struct elf32_hdr *); 59 - #define elf_check_arch elf_check_arch 60 - 61 - struct task_struct; 62 - int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs); 63 - #define ELF_CORE_COPY_TASK_REGS dump_task_regs 64 - 65 - #define ELF_EXEC_PAGESIZE 4096 66 - 67 - /* This is the location that an ET_DYN program is loaded if exec'ed. Typical 68 - use of this is to invoke "./ld.so someprog" to test out a new version of 69 - the loader. We need to make sure that it is out of the way of the program 70 - that it will "exec", and that there is sufficient room for the brk. */ 71 - 72 - #define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3) 73 - 74 - /* When the program starts, a1 contains a pointer to a function to be 75 - registered with atexit, as per the SVR4 ABI. A value of 0 means we 76 - have no such handler. */ 77 - #define ELF_PLAT_INIT(_r, load_addr) {(_r)->UCreg_00 = 0; } 78 - 79 - extern void elf_set_personality(const struct elf32_hdr *); 80 - #define SET_PERSONALITY(ex) elf_set_personality(&(ex)) 81 - 82 - struct mm_struct; 83 - extern unsigned long arch_randomize_brk(struct mm_struct *mm); 84 - #define arch_randomize_brk arch_randomize_brk 85 - 86 - extern int vectors_user_mapping(void); 87 - #define arch_setup_additional_pages(bprm, uses_interp) vectors_user_mapping() 88 - #define ARCH_HAS_SETUP_ADDITIONAL_PAGES 89 - 90 - #endif
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arch/unicore32/include/asm/fpstate.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/fpstate.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - #ifndef __UNICORE_FPSTATE_H__ 11 - #define __UNICORE_FPSTATE_H__ 12 - 13 - #ifndef __ASSEMBLY__ 14 - 15 - #define FP_REGS_NUMBER 33 16 - 17 - struct fp_state { 18 - unsigned int regs[FP_REGS_NUMBER]; 19 - } __attribute__((aligned(8))); 20 - 21 - #endif 22 - 23 - #endif
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arch/unicore32/include/asm/fpu-ucf64.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/fpu-ucf64.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn> 8 - * Copyright (C) 2001-2010 Guan Xuetao 9 - */ 10 - #define FPSCR s31 11 - 12 - /* FPSCR bits */ 13 - #define FPSCR_DEFAULT_NAN (1<<25) 14 - 15 - #define FPSCR_CMPINSTR_BIT (1<<31) 16 - 17 - #define FPSCR_CON (1<<29) 18 - #define FPSCR_TRAP (1<<27) 19 - 20 - /* RND mode */ 21 - #define FPSCR_ROUND_NEAREST (0<<0) 22 - #define FPSCR_ROUND_PLUSINF (2<<0) 23 - #define FPSCR_ROUND_MINUSINF (3<<0) 24 - #define FPSCR_ROUND_TOZERO (1<<0) 25 - #define FPSCR_RMODE_BIT (0) 26 - #define FPSCR_RMODE_MASK (7 << FPSCR_RMODE_BIT) 27 - 28 - /* trap enable */ 29 - #define FPSCR_IOE (1<<16) 30 - #define FPSCR_OFE (1<<14) 31 - #define FPSCR_UFE (1<<13) 32 - #define FPSCR_IXE (1<<12) 33 - #define FPSCR_HIE (1<<11) 34 - #define FPSCR_NDE (1<<10) /* non denomal */ 35 - 36 - /* flags */ 37 - #define FPSCR_IDC (1<<24) 38 - #define FPSCR_HIC (1<<23) 39 - #define FPSCR_IXC (1<<22) 40 - #define FPSCR_OFC (1<<21) 41 - #define FPSCR_UFC (1<<20) 42 - #define FPSCR_IOC (1<<19) 43 - 44 - /* stick bits */ 45 - #define FPSCR_IOS (1<<9) 46 - #define FPSCR_OFS (1<<7) 47 - #define FPSCR_UFS (1<<6) 48 - #define FPSCR_IXS (1<<5) 49 - #define FPSCR_HIS (1<<4) 50 - #define FPSCR_NDS (1<<3) /*non denomal */
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arch/unicore32/include/asm/gpio.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/gpio.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - #ifndef __UNICORE_GPIO_H__ 11 - #define __UNICORE_GPIO_H__ 12 - 13 - #include <linux/io.h> 14 - #include <asm/irq.h> 15 - #include <mach/hardware.h> 16 - #include <asm-generic/gpio.h> 17 - 18 - #define GPI_OTP_INT 0 19 - #define GPI_PCI_INTA 1 20 - #define GPI_PCI_INTB 2 21 - #define GPI_PCI_INTC 3 22 - #define GPI_PCI_INTD 4 23 - #define GPI_BAT_DET 5 24 - #define GPI_SD_CD 6 25 - #define GPI_SOFF_REQ 7 26 - #define GPI_SD_WP 8 27 - #define GPI_LCD_CASE_OFF 9 28 - #define GPO_WIFI_EN 10 29 - #define GPO_HDD_LED 11 30 - #define GPO_VGA_EN 12 31 - #define GPO_LCD_EN 13 32 - #define GPO_LED_DATA 14 33 - #define GPO_LED_CLK 15 34 - #define GPO_CAM_PWR_EN 16 35 - #define GPO_LCD_VCC_EN 17 36 - #define GPO_SOFT_OFF 18 37 - #define GPO_BT_EN 19 38 - #define GPO_FAN_ON 20 39 - #define GPO_SPKR 21 40 - #define GPO_SET_V1 23 41 - #define GPO_SET_V2 24 42 - #define GPO_CPU_HEALTH 25 43 - #define GPO_LAN_SEL 26 44 - 45 - #ifdef CONFIG_PUV3_NB0916 46 - #define GPI_BTN_TOUCH 14 47 - #define GPIO_IN 0x000043ff /* 1 for input */ 48 - #define GPIO_OUT 0x0fffbc00 /* 1 for output */ 49 - #endif /* CONFIG_PUV3_NB0916 */ 50 - 51 - #ifdef CONFIG_PUV3_SMW0919 52 - #define GPIO_IN 0x000003ff /* 1 for input */ 53 - #define GPIO_OUT 0x0ffffc00 /* 1 for output */ 54 - #endif /* CONFIG_PUV3_SMW0919 */ 55 - 56 - #ifdef CONFIG_PUV3_DB0913 57 - #define GPIO_IN 0x000001df /* 1 for input */ 58 - #define GPIO_OUT 0x03fee800 /* 1 for output */ 59 - #endif /* CONFIG_PUV3_DB0913 */ 60 - 61 - #define GPIO_DIR (~((GPIO_IN) | 0xf0000000)) 62 - /* 0 input, 1 output */ 63 - 64 - static inline int gpio_get_value(unsigned gpio) 65 - { 66 - if (__builtin_constant_p(gpio) && (gpio <= GPIO_MAX)) 67 - return readl(GPIO_GPLR) & GPIO_GPIO(gpio); 68 - else 69 - return __gpio_get_value(gpio); 70 - } 71 - 72 - static inline void gpio_set_value(unsigned gpio, int value) 73 - { 74 - if (__builtin_constant_p(gpio) && (gpio <= GPIO_MAX)) 75 - if (value) 76 - writel(GPIO_GPIO(gpio), GPIO_GPSR); 77 - else 78 - writel(GPIO_GPIO(gpio), GPIO_GPCR); 79 - else 80 - __gpio_set_value(gpio, value); 81 - } 82 - 83 - #define gpio_cansleep __gpio_cansleep 84 - 85 - static inline unsigned gpio_to_irq(unsigned gpio) 86 - { 87 - if ((gpio < IRQ_GPIOHIGH) && (FIELD(1, 1, gpio) & readl(GPIO_GPIR))) 88 - return IRQ_GPIOLOW0 + gpio; 89 - else 90 - return IRQ_GPIO0 + gpio; 91 - } 92 - 93 - static inline unsigned irq_to_gpio(unsigned irq) 94 - { 95 - if (irq < IRQ_GPIOHIGH) 96 - return irq - IRQ_GPIOLOW0; 97 - else 98 - return irq - IRQ_GPIO0; 99 - } 100 - 101 - #endif /* __UNICORE_GPIO_H__ */
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arch/unicore32/include/asm/hwcap.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/hwcap.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_HWCAP_H__ 10 - #define __UNICORE_HWCAP_H__ 11 - 12 - /* 13 - * HWCAP flags 14 - */ 15 - #define HWCAP_MSP 1 16 - #define HWCAP_UNICORE16 2 17 - #define HWCAP_CMOV 4 18 - #define HWCAP_UNICORE_F64 8 19 - #define HWCAP_TLS 0x80 20 - 21 - #if defined(__KERNEL__) && !defined(__ASSEMBLY__) 22 - /* 23 - * This yields a mask that user programs can use to figure out what 24 - * instruction set this cpu supports. 25 - */ 26 - #define ELF_HWCAP (HWCAP_CMOV | HWCAP_UNICORE_F64) 27 - #endif 28 - 29 - #endif
-45
arch/unicore32/include/asm/hwdef-copro.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * Co-processor register definitions for PKUnity SoC and UniCore ISA 4 - * 5 - * Copyright (C) 2001-2012 GUAN Xue-tao 6 - */ 7 - #ifndef __UNICORE_HWDEF_COPRO_H__ 8 - #define __UNICORE_HWDEF_COPRO_H__ 9 - 10 - /* 11 - * Control Register bits (CP#0 CR1) 12 - */ 13 - #define CR_M (1 << 0) /* MMU enable */ 14 - #define CR_A (1 << 1) /* Alignment abort enable */ 15 - #define CR_D (1 << 2) /* Dcache enable */ 16 - #define CR_I (1 << 3) /* Icache enable */ 17 - #define CR_B (1 << 4) /* Dcache write mechanism: write back */ 18 - #define CR_T (1 << 5) /* Burst enable */ 19 - #define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */ 20 - 21 - #ifndef __ASSEMBLY__ 22 - 23 - #define vectors_high() (cr_alignment & CR_V) 24 - 25 - extern unsigned long cr_no_alignment; /* defined in entry.S */ 26 - extern unsigned long cr_alignment; /* defined in entry.S */ 27 - 28 - static inline unsigned int get_cr(void) 29 - { 30 - unsigned int val; 31 - asm("movc %0, p0.c1, #0" : "=r" (val) : : "cc"); 32 - return val; 33 - } 34 - 35 - static inline void set_cr(unsigned int val) 36 - { 37 - asm volatile("movc p0.c1, %0, #0" : : "r" (val) : "cc"); 38 - isb(); 39 - } 40 - 41 - extern void adjust_cr(unsigned long mask, unsigned long set); 42 - 43 - #endif /* __ASSEMBLY__ */ 44 - 45 - #endif /* __UNICORE_HWDEF_COPRO_H__ */
-69
arch/unicore32/include/asm/io.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/io.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_IO_H__ 10 - #define __UNICORE_IO_H__ 11 - 12 - #ifdef __KERNEL__ 13 - 14 - #include <asm/byteorder.h> 15 - #include <asm/memory.h> 16 - 17 - #define PCI_IOBASE PKUNITY_PCILIO_BASE 18 - #include <asm-generic/io.h> 19 - 20 - /* 21 - * __uc32_ioremap takes CPU physical address. 22 - */ 23 - extern void __iomem *__uc32_ioremap(unsigned long, size_t); 24 - extern void __uc32_iounmap(volatile void __iomem *addr); 25 - 26 - /* 27 - * ioremap and friends. 28 - * 29 - * ioremap takes a PCI memory address, as specified in 30 - * Documentation/driver-api/io-mapping.rst. 31 - * 32 - */ 33 - #define ioremap(cookie, size) __uc32_ioremap(cookie, size) 34 - #define iounmap(cookie) __uc32_iounmap(cookie) 35 - 36 - #define readb_relaxed readb 37 - #define readw_relaxed readw 38 - #define readl_relaxed readl 39 - 40 - #define HAVE_ARCH_PIO_SIZE 41 - #define PIO_OFFSET (unsigned int)(PCI_IOBASE) 42 - #define PIO_MASK (unsigned int)(IO_SPACE_LIMIT) 43 - #define PIO_RESERVED (PIO_OFFSET + PIO_MASK + 1) 44 - 45 - #ifdef CONFIG_STRICT_DEVMEM 46 - 47 - #include <linux/ioport.h> 48 - #include <linux/mm.h> 49 - 50 - /* 51 - * devmem_is_allowed() checks to see if /dev/mem access to a certain 52 - * address is valid. The argument is a physical page number. 53 - * We mimic x86 here by disallowing access to system RAM as well as 54 - * device-exclusive MMIO regions. This effectively disable read()/write() 55 - * on /dev/mem. 56 - */ 57 - static inline int devmem_is_allowed(unsigned long pfn) 58 - { 59 - if (iomem_is_exclusive(pfn << PAGE_SHIFT)) 60 - return 0; 61 - if (!page_is_ram(pfn)) 62 - return 1; 63 - return 0; 64 - } 65 - 66 - #endif /* CONFIG_STRICT_DEVMEM */ 67 - 68 - #endif /* __KERNEL__ */ 69 - #endif /* __UNICORE_IO_H__ */
-102
arch/unicore32/include/asm/irq.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/irq.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_IRQ_H__ 10 - #define __UNICORE_IRQ_H__ 11 - 12 - #include <asm-generic/irq.h> 13 - 14 - #define IRQ_GPIOLOW0 0x00 15 - #define IRQ_GPIOLOW1 0x01 16 - #define IRQ_GPIOLOW2 0x02 17 - #define IRQ_GPIOLOW3 0x03 18 - #define IRQ_GPIOLOW4 0x04 19 - #define IRQ_GPIOLOW5 0x05 20 - #define IRQ_GPIOLOW6 0x06 21 - #define IRQ_GPIOLOW7 0x07 22 - #define IRQ_GPIOHIGH 0x08 23 - #define IRQ_USB 0x09 24 - #define IRQ_SDC 0x0a 25 - #define IRQ_AC97 0x0b 26 - #define IRQ_SATA 0x0c 27 - #define IRQ_MME 0x0d 28 - #define IRQ_PCI_BRIDGE 0x0e 29 - #define IRQ_DDR 0x0f 30 - #define IRQ_SPI 0x10 31 - #define IRQ_UNIGFX 0x11 32 - #define IRQ_I2C 0x11 33 - #define IRQ_UART1 0x12 34 - #define IRQ_UART0 0x13 35 - #define IRQ_UMAL 0x14 36 - #define IRQ_NAND 0x15 37 - #define IRQ_PS2_KBD 0x16 38 - #define IRQ_PS2_AUX 0x17 39 - #define IRQ_DMA 0x18 40 - #define IRQ_DMAERR 0x19 41 - #define IRQ_TIMER0 0x1a 42 - #define IRQ_TIMER1 0x1b 43 - #define IRQ_TIMER2 0x1c 44 - #define IRQ_TIMER3 0x1d 45 - #define IRQ_RTC 0x1e 46 - #define IRQ_RTCAlarm 0x1f 47 - 48 - #define IRQ_GPIO0 0x20 49 - #define IRQ_GPIO1 0x21 50 - #define IRQ_GPIO2 0x22 51 - #define IRQ_GPIO3 0x23 52 - #define IRQ_GPIO4 0x24 53 - #define IRQ_GPIO5 0x25 54 - #define IRQ_GPIO6 0x26 55 - #define IRQ_GPIO7 0x27 56 - #define IRQ_GPIO8 0x28 57 - #define IRQ_GPIO9 0x29 58 - #define IRQ_GPIO10 0x2a 59 - #define IRQ_GPIO11 0x2b 60 - #define IRQ_GPIO12 0x2c 61 - #define IRQ_GPIO13 0x2d 62 - #define IRQ_GPIO14 0x2e 63 - #define IRQ_GPIO15 0x2f 64 - #define IRQ_GPIO16 0x30 65 - #define IRQ_GPIO17 0x31 66 - #define IRQ_GPIO18 0x32 67 - #define IRQ_GPIO19 0x33 68 - #define IRQ_GPIO20 0x34 69 - #define IRQ_GPIO21 0x35 70 - #define IRQ_GPIO22 0x36 71 - #define IRQ_GPIO23 0x37 72 - #define IRQ_GPIO24 0x38 73 - #define IRQ_GPIO25 0x39 74 - #define IRQ_GPIO26 0x3a 75 - #define IRQ_GPIO27 0x3b 76 - 77 - #ifdef CONFIG_ARCH_FPGA 78 - #define IRQ_PCIINTA IRQ_GPIOLOW2 79 - #define IRQ_PCIINTB IRQ_GPIOLOW1 80 - #define IRQ_PCIINTC IRQ_GPIOLOW0 81 - #define IRQ_PCIINTD IRQ_GPIOLOW6 82 - #endif 83 - 84 - #if defined(CONFIG_PUV3_DB0913) || defined(CONFIG_PUV3_NB0916) \ 85 - || defined(CONFIG_PUV3_SMW0919) 86 - #define IRQ_PCIINTA IRQ_GPIOLOW1 87 - #define IRQ_PCIINTB IRQ_GPIOLOW2 88 - #define IRQ_PCIINTC IRQ_GPIOLOW3 89 - #define IRQ_PCIINTD IRQ_GPIOLOW4 90 - #endif 91 - 92 - #define IRQ_SD_CD IRQ_GPIO6 /* falling or rising trigger */ 93 - 94 - #ifndef __ASSEMBLY__ 95 - struct pt_regs; 96 - 97 - extern void asm_do_IRQ(unsigned int, struct pt_regs *); 98 - 99 - #endif 100 - 101 - #endif 102 -
-50
arch/unicore32/include/asm/irqflags.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/irqflags.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_IRQFLAGS_H__ 10 - #define __UNICORE_IRQFLAGS_H__ 11 - 12 - #ifdef __KERNEL__ 13 - 14 - #include <asm/ptrace.h> 15 - 16 - #define ARCH_IRQ_DISABLED (PRIV_MODE | PSR_I_BIT) 17 - #define ARCH_IRQ_ENABLED (PRIV_MODE) 18 - 19 - /* 20 - * Save the current interrupt enable state. 21 - */ 22 - static inline unsigned long arch_local_save_flags(void) 23 - { 24 - unsigned long temp; 25 - 26 - asm volatile("mov %0, asr" : "=r" (temp) : : "memory", "cc"); 27 - 28 - return temp & PSR_c; 29 - } 30 - 31 - /* 32 - * restore saved IRQ state 33 - */ 34 - static inline void arch_local_irq_restore(unsigned long flags) 35 - { 36 - unsigned long temp; 37 - 38 - asm volatile( 39 - "mov %0, asr\n" 40 - "mov.a asr, %1\n" 41 - "mov.f asr, %0" 42 - : "=&r" (temp) 43 - : "r" (flags) 44 - : "memory", "cc"); 45 - } 46 - 47 - #include <asm-generic/irqflags.h> 48 - 49 - #endif 50 - #endif
-19
arch/unicore32/include/asm/linkage.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/linkage.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_LINKAGE_H__ 10 - #define __UNICORE_LINKAGE_H__ 11 - 12 - #define __ALIGN .align 0 13 - #define __ALIGN_STR ".align 0" 14 - 15 - #define ENDPROC(name) \ 16 - .type name, %function; \ 17 - END(name) 18 - 19 - #endif
-43
arch/unicore32/include/asm/memblock.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/memblock.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - #ifndef __UNICORE_MEMBLOCK_H__ 11 - #define __UNICORE_MEMBLOCK_H__ 12 - 13 - /* 14 - * Memory map description 15 - */ 16 - # define NR_BANKS 8 17 - 18 - struct membank { 19 - unsigned long start; 20 - unsigned long size; 21 - unsigned int highmem; 22 - }; 23 - 24 - struct meminfo { 25 - int nr_banks; 26 - struct membank bank[NR_BANKS]; 27 - }; 28 - 29 - extern struct meminfo meminfo; 30 - 31 - #define for_each_bank(iter, mi) \ 32 - for (iter = 0; iter < (mi)->nr_banks; iter++) 33 - 34 - #define bank_pfn_start(bank) __phys_to_pfn((bank)->start) 35 - #define bank_pfn_end(bank) __phys_to_pfn((bank)->start + (bank)->size) 36 - #define bank_pfn_size(bank) ((bank)->size >> PAGE_SHIFT) 37 - #define bank_phys_start(bank) ((bank)->start) 38 - #define bank_phys_end(bank) ((bank)->start + (bank)->size) 39 - #define bank_phys_size(bank) ((bank)->size) 40 - 41 - extern void uc32_memblock_init(struct meminfo *); 42 - 43 - #endif
-102
arch/unicore32/include/asm/memory.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/memory.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * Note: this file should not be included by non-asm/.h files 10 - */ 11 - #ifndef __UNICORE_MEMORY_H__ 12 - #define __UNICORE_MEMORY_H__ 13 - 14 - #include <linux/compiler.h> 15 - #include <linux/const.h> 16 - #include <linux/sizes.h> 17 - #include <mach/memory.h> 18 - 19 - /* 20 - * PAGE_OFFSET - the virtual address of the start of the kernel image 21 - * TASK_SIZE - the maximum size of a user space task. 22 - * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area 23 - */ 24 - #define PAGE_OFFSET UL(0xC0000000) 25 - #define TASK_SIZE (PAGE_OFFSET - UL(0x41000000)) 26 - #define TASK_UNMAPPED_BASE (PAGE_OFFSET / 3) 27 - 28 - /* 29 - * The module space lives between the addresses given by TASK_SIZE 30 - * and PAGE_OFFSET - it must be within 32MB of the kernel text. 31 - */ 32 - #define MODULES_VADDR (PAGE_OFFSET - 16*1024*1024) 33 - #if TASK_SIZE > MODULES_VADDR 34 - #error Top of user space clashes with start of module space 35 - #endif 36 - 37 - #define MODULES_END (PAGE_OFFSET) 38 - 39 - /* 40 - * Allow 16MB-aligned ioremap pages 41 - */ 42 - #define IOREMAP_MAX_ORDER 24 43 - 44 - /* 45 - * Physical vs virtual RAM address space conversion. These are 46 - * private definitions which should NOT be used outside memory.h 47 - * files. Use virt_to_phys/phys_to_virt/__pa/__va instead. 48 - */ 49 - #ifndef __virt_to_phys 50 - #define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET) 51 - #define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET) 52 - #endif 53 - 54 - /* 55 - * Convert a page to/from a physical address 56 - */ 57 - #define page_to_phys(page) (__pfn_to_phys(page_to_pfn(page))) 58 - #define phys_to_page(phys) (pfn_to_page(__phys_to_pfn(phys))) 59 - 60 - #ifndef __ASSEMBLY__ 61 - 62 - #ifndef arch_adjust_zones 63 - #define arch_adjust_zones(max_zone_pfn) do { } while (0) 64 - #endif 65 - 66 - /* 67 - * PFNs are used to describe any physical page; this means 68 - * PFN 0 == physical address 0. 69 - * 70 - * This is the PFN of the first RAM page in the kernel 71 - * direct-mapped view. We assume this is the first page 72 - * of RAM in the mem_map as well. 73 - */ 74 - #define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT) 75 - 76 - /* 77 - * Drivers should NOT use these either. 78 - */ 79 - #define __pa(x) __virt_to_phys((unsigned long)(x)) 80 - #define __va(x) ((void *)__phys_to_virt((unsigned long)(x))) 81 - #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) 82 - 83 - /* 84 - * Conversion between a struct page and a physical address. 85 - * 86 - * page_to_pfn(page) convert a struct page * to a PFN number 87 - * pfn_to_page(pfn) convert a _valid_ PFN number to struct page * 88 - * 89 - * virt_to_page(k) convert a _valid_ virtual address to struct page * 90 - * virt_addr_valid(k) indicates whether a virtual address is valid 91 - */ 92 - #define ARCH_PFN_OFFSET PHYS_PFN_OFFSET 93 - 94 - #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) 95 - #define virt_addr_valid(kaddr) ((unsigned long)(kaddr) >= PAGE_OFFSET && \ 96 - (unsigned long)(kaddr) < (unsigned long)high_memory) 97 - 98 - #endif 99 - 100 - #include <asm-generic/memory_model.h> 101 - 102 - #endif
-14
arch/unicore32/include/asm/mmu.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/mmu.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_MMU_H__ 10 - #define __UNICORE_MMU_H__ 11 - 12 - typedef unsigned long mm_context_t; 13 - 14 - #endif
-98
arch/unicore32/include/asm/mmu_context.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/mmu_context.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_MMU_CONTEXT_H__ 10 - #define __UNICORE_MMU_CONTEXT_H__ 11 - 12 - #include <linux/compiler.h> 13 - #include <linux/sched.h> 14 - #include <linux/mm.h> 15 - #include <linux/vmacache.h> 16 - #include <linux/io.h> 17 - 18 - #include <asm/cacheflush.h> 19 - #include <asm/cpu-single.h> 20 - 21 - #define init_new_context(tsk, mm) 0 22 - 23 - #define destroy_context(mm) do { } while (0) 24 - 25 - /* 26 - * This is called when "tsk" is about to enter lazy TLB mode. 27 - * 28 - * mm: describes the currently active mm context 29 - * tsk: task which is entering lazy tlb 30 - * cpu: cpu number which is entering lazy tlb 31 - * 32 - * tsk->mm will be NULL 33 - */ 34 - static inline void 35 - enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) 36 - { 37 - } 38 - 39 - /* 40 - * This is the actual mm switch as far as the scheduler 41 - * is concerned. No registers are touched. We avoid 42 - * calling the CPU specific function when the mm hasn't 43 - * actually changed. 44 - */ 45 - static inline void 46 - switch_mm(struct mm_struct *prev, struct mm_struct *next, 47 - struct task_struct *tsk) 48 - { 49 - unsigned int cpu = smp_processor_id(); 50 - 51 - if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)) || prev != next) 52 - cpu_switch_mm(next->pgd, next); 53 - } 54 - 55 - #define deactivate_mm(tsk, mm) do { } while (0) 56 - #define activate_mm(prev, next) switch_mm(prev, next, NULL) 57 - 58 - /* 59 - * We are inserting a "fake" vma for the user-accessible vector page so 60 - * gdb and friends can get to it through ptrace and /proc/<pid>/mem. 61 - * But we also want to remove it before the generic code gets to see it 62 - * during process exit or the unmapping of it would cause total havoc. 63 - * (the macro is used as remove_vma() is static to mm/mmap.c) 64 - */ 65 - #define arch_exit_mmap(mm) \ 66 - do { \ 67 - struct vm_area_struct *high_vma = find_vma(mm, 0xffff0000); \ 68 - if (high_vma) { \ 69 - BUG_ON(high_vma->vm_next); /* it should be last */ \ 70 - if (high_vma->vm_prev) \ 71 - high_vma->vm_prev->vm_next = NULL; \ 72 - else \ 73 - mm->mmap = NULL; \ 74 - rb_erase(&high_vma->vm_rb, &mm->mm_rb); \ 75 - vmacache_invalidate(mm); \ 76 - mm->map_count--; \ 77 - remove_vma(high_vma); \ 78 - } \ 79 - } while (0) 80 - 81 - static inline int arch_dup_mmap(struct mm_struct *oldmm, 82 - struct mm_struct *mm) 83 - { 84 - return 0; 85 - } 86 - 87 - static inline void arch_unmap(struct mm_struct *mm, 88 - unsigned long start, unsigned long end) 89 - { 90 - } 91 - 92 - static inline bool arch_vma_access_permitted(struct vm_area_struct *vma, 93 - bool write, bool execute, bool foreign) 94 - { 95 - /* by default, allow everything */ 96 - return true; 97 - } 98 - #endif
-74
arch/unicore32/include/asm/page.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/page.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_PAGE_H__ 10 - #define __UNICORE_PAGE_H__ 11 - 12 - /* PAGE_SHIFT determines the page size */ 13 - #define PAGE_SHIFT 12 14 - #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) 15 - #define PAGE_MASK (~(PAGE_SIZE-1)) 16 - 17 - #ifndef __ASSEMBLY__ 18 - 19 - struct page; 20 - struct vm_area_struct; 21 - 22 - #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) 23 - extern void copy_page(void *to, const void *from); 24 - 25 - #define clear_user_page(page, vaddr, pg) clear_page(page) 26 - #define copy_user_page(to, from, vaddr, pg) copy_page(to, from) 27 - 28 - #undef STRICT_MM_TYPECHECKS 29 - 30 - #ifdef STRICT_MM_TYPECHECKS 31 - /* 32 - * These are used to make use of C type-checking.. 33 - */ 34 - typedef struct { unsigned long pte; } pte_t; 35 - typedef struct { unsigned long pgd; } pgd_t; 36 - typedef struct { unsigned long pgprot; } pgprot_t; 37 - 38 - #define pte_val(x) ((x).pte) 39 - #define pgd_val(x) ((x).pgd) 40 - #define pgprot_val(x) ((x).pgprot) 41 - 42 - #define __pte(x) ((pte_t) { (x) }) 43 - #define __pgd(x) ((pgd_t) { (x) }) 44 - #define __pgprot(x) ((pgprot_t) { (x) }) 45 - 46 - #else 47 - /* 48 - * .. while these make it easier on the compiler 49 - */ 50 - typedef unsigned long pte_t; 51 - typedef unsigned long pgd_t; 52 - typedef unsigned long pgprot_t; 53 - 54 - #define pte_val(x) (x) 55 - #define pgd_val(x) (x) 56 - #define pgprot_val(x) (x) 57 - 58 - #define __pte(x) (x) 59 - #define __pgd(x) (x) 60 - #define __pgprot(x) (x) 61 - 62 - #endif /* STRICT_MM_TYPECHECKS */ 63 - 64 - typedef struct page *pgtable_t; 65 - 66 - extern int pfn_valid(unsigned long); 67 - 68 - #include <asm/memory.h> 69 - 70 - #endif /* !__ASSEMBLY__ */ 71 - 72 - #include <asm-generic/getorder.h> 73 - 74 - #endif
-20
arch/unicore32/include/asm/pci.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/pci.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_PCI_H__ 10 - #define __UNICORE_PCI_H__ 11 - 12 - #ifdef __KERNEL__ 13 - #include <asm-generic/pci.h> 14 - #include <mach/hardware.h> /* for PCIBIOS_MIN_* */ 15 - 16 - #define HAVE_PCI_MMAP 17 - #define ARCH_GENERIC_PCI_MMAP_RESOURCE 18 - 19 - #endif /* __KERNEL__ */ 20 - #endif
-87
arch/unicore32/include/asm/pgalloc.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/pgalloc.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_PGALLOC_H__ 10 - #define __UNICORE_PGALLOC_H__ 11 - 12 - #include <asm/pgtable-hwdef.h> 13 - #include <asm/processor.h> 14 - #include <asm/cacheflush.h> 15 - #include <asm/tlbflush.h> 16 - 17 - #define __HAVE_ARCH_PTE_ALLOC_ONE_KERNEL 18 - #define __HAVE_ARCH_PTE_ALLOC_ONE 19 - #include <asm-generic/pgalloc.h> 20 - 21 - #define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_PRESENT) 22 - #define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_PRESENT) 23 - 24 - extern pgd_t *get_pgd_slow(struct mm_struct *mm); 25 - extern void free_pgd_slow(struct mm_struct *mm, pgd_t *pgd); 26 - 27 - #define pgd_alloc(mm) get_pgd_slow(mm) 28 - #define pgd_free(mm, pgd) free_pgd_slow(mm, pgd) 29 - 30 - /* 31 - * Allocate one PTE table. 32 - */ 33 - static inline pte_t * 34 - pte_alloc_one_kernel(struct mm_struct *mm) 35 - { 36 - pte_t *pte = __pte_alloc_one_kernel(mm); 37 - 38 - if (pte) 39 - clean_dcache_area(pte, PTRS_PER_PTE * sizeof(pte_t)); 40 - 41 - return pte; 42 - } 43 - 44 - static inline pgtable_t 45 - pte_alloc_one(struct mm_struct *mm) 46 - { 47 - struct page *pte; 48 - 49 - pte = __pte_alloc_one(mm, GFP_PGTABLE_USER); 50 - if (!pte) 51 - return NULL; 52 - if (!PageHighMem(pte)) 53 - clean_pte_table(page_address(pte)); 54 - return pte; 55 - } 56 - 57 - static inline void __pmd_populate(pmd_t *pmdp, unsigned long pmdval) 58 - { 59 - set_pmd(pmdp, __pmd(pmdval)); 60 - flush_pmd_entry(pmdp); 61 - } 62 - 63 - /* 64 - * Populate the pmdp entry with a pointer to the pte. This pmd is part 65 - * of the mm address space. 66 - */ 67 - static inline void 68 - pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep) 69 - { 70 - unsigned long pte_ptr = (unsigned long)ptep; 71 - 72 - /* 73 - * The pmd must be loaded with the physical 74 - * address of the PTE table 75 - */ 76 - __pmd_populate(pmdp, __pa(pte_ptr) | _PAGE_KERNEL_TABLE); 77 - } 78 - 79 - static inline void 80 - pmd_populate(struct mm_struct *mm, pmd_t *pmdp, pgtable_t ptep) 81 - { 82 - __pmd_populate(pmdp, 83 - page_to_pfn(ptep) << PAGE_SHIFT | _PAGE_USER_TABLE); 84 - } 85 - #define pmd_pgtable(pmd) pmd_page(pmd) 86 - 87 - #endif
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arch/unicore32/include/asm/pgtable-hwdef.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/pgtable-hwdef.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_PGTABLE_HWDEF_H__ 10 - #define __UNICORE_PGTABLE_HWDEF_H__ 11 - 12 - /* 13 - * Hardware page table definitions. 14 - * 15 - * + Level 1 descriptor (PMD) 16 - * - common 17 - */ 18 - #define PMD_TYPE_MASK (3 << 0) 19 - #define PMD_TYPE_TABLE (0 << 0) 20 - /*#define PMD_TYPE_LARGE (1 << 0) */ 21 - #define PMD_TYPE_INVALID (2 << 0) 22 - #define PMD_TYPE_SECT (3 << 0) 23 - 24 - #define PMD_PRESENT (1 << 2) 25 - #define PMD_YOUNG (1 << 3) 26 - 27 - /*#define PMD_SECT_DIRTY (1 << 4) */ 28 - #define PMD_SECT_CACHEABLE (1 << 5) 29 - #define PMD_SECT_EXEC (1 << 6) 30 - #define PMD_SECT_WRITE (1 << 7) 31 - #define PMD_SECT_READ (1 << 8) 32 - 33 - /* 34 - * + Level 2 descriptor (PTE) 35 - * - common 36 - */ 37 - #define PTE_TYPE_MASK (3 << 0) 38 - #define PTE_TYPE_SMALL (0 << 0) 39 - #define PTE_TYPE_MIDDLE (1 << 0) 40 - #define PTE_TYPE_LARGE (2 << 0) 41 - #define PTE_TYPE_INVALID (3 << 0) 42 - 43 - #define PTE_PRESENT (1 << 2) 44 - #define PTE_YOUNG (1 << 3) 45 - #define PTE_DIRTY (1 << 4) 46 - #define PTE_CACHEABLE (1 << 5) 47 - #define PTE_EXEC (1 << 6) 48 - #define PTE_WRITE (1 << 7) 49 - #define PTE_READ (1 << 8) 50 - 51 - #endif
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arch/unicore32/include/asm/pgtable.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/pgtable.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_PGTABLE_H__ 10 - #define __UNICORE_PGTABLE_H__ 11 - 12 - #include <asm-generic/pgtable-nopmd.h> 13 - #include <asm/cpu-single.h> 14 - 15 - #include <asm/memory.h> 16 - #include <asm/pgtable-hwdef.h> 17 - 18 - /* 19 - * Just any arbitrary offset to the start of the vmalloc VM area: the 20 - * current 8MB value just means that there will be a 8MB "hole" after the 21 - * physical memory until the kernel virtual memory starts. That means that 22 - * any out-of-bounds memory accesses will hopefully be caught. 23 - * The vmalloc() routines leaves a hole of 4kB between each vmalloced 24 - * area for the same reason. ;) 25 - * 26 - * Note that platforms may override VMALLOC_START, but they must provide 27 - * VMALLOC_END. VMALLOC_END defines the (exclusive) limit of this space, 28 - * which may not overlap IO space. 29 - */ 30 - #ifndef VMALLOC_START 31 - #define VMALLOC_OFFSET SZ_8M 32 - #define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) \ 33 - & ~(VMALLOC_OFFSET-1)) 34 - #define VMALLOC_END (0xff000000UL) 35 - #endif 36 - 37 - #define PTRS_PER_PTE 1024 38 - #define PTRS_PER_PGD 1024 39 - 40 - /* 41 - * PGDIR_SHIFT determines what a third-level page table entry can map 42 - */ 43 - #define PGDIR_SHIFT 22 44 - 45 - #ifndef __ASSEMBLY__ 46 - extern void __pte_error(const char *file, int line, unsigned long val); 47 - extern void __pgd_error(const char *file, int line, unsigned long val); 48 - 49 - #define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte)) 50 - #define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd)) 51 - #endif /* !__ASSEMBLY__ */ 52 - 53 - #define PGDIR_SIZE (1UL << PGDIR_SHIFT) 54 - #define PGDIR_MASK (~(PGDIR_SIZE-1)) 55 - 56 - /* 57 - * This is the lowest virtual address we can permit any user space 58 - * mapping to be mapped at. This is particularly important for 59 - * non-high vector CPUs. 60 - */ 61 - #define FIRST_USER_ADDRESS PAGE_SIZE 62 - 63 - #define FIRST_USER_PGD_NR 1 64 - #define USER_PTRS_PER_PGD ((TASK_SIZE/PGDIR_SIZE) - FIRST_USER_PGD_NR) 65 - 66 - /* 67 - * section address mask and size definitions. 68 - */ 69 - #define SECTION_SHIFT 22 70 - #define SECTION_SIZE (1UL << SECTION_SHIFT) 71 - #define SECTION_MASK (~(SECTION_SIZE-1)) 72 - 73 - #ifndef __ASSEMBLY__ 74 - 75 - /* 76 - * The pgprot_* and protection_map entries will be fixed up in runtime 77 - * to include the cachable bits based on memory policy, as well as any 78 - * architecture dependent bits. 79 - */ 80 - #define _PTE_DEFAULT (PTE_PRESENT | PTE_YOUNG | PTE_CACHEABLE) 81 - 82 - extern pgprot_t pgprot_user; 83 - extern pgprot_t pgprot_kernel; 84 - 85 - #define PAGE_NONE pgprot_user 86 - #define PAGE_SHARED __pgprot(pgprot_val(pgprot_user | PTE_READ \ 87 - | PTE_WRITE)) 88 - #define PAGE_SHARED_EXEC __pgprot(pgprot_val(pgprot_user | PTE_READ \ 89 - | PTE_WRITE \ 90 - | PTE_EXEC)) 91 - #define PAGE_COPY __pgprot(pgprot_val(pgprot_user | PTE_READ) 92 - #define PAGE_COPY_EXEC __pgprot(pgprot_val(pgprot_user | PTE_READ \ 93 - | PTE_EXEC)) 94 - #define PAGE_READONLY __pgprot(pgprot_val(pgprot_user | PTE_READ)) 95 - #define PAGE_READONLY_EXEC __pgprot(pgprot_val(pgprot_user | PTE_READ \ 96 - | PTE_EXEC)) 97 - #define PAGE_KERNEL pgprot_kernel 98 - #define PAGE_KERNEL_EXEC __pgprot(pgprot_val(pgprot_kernel | PTE_EXEC)) 99 - 100 - #define __PAGE_NONE __pgprot(_PTE_DEFAULT) 101 - #define __PAGE_SHARED __pgprot(_PTE_DEFAULT | PTE_READ \ 102 - | PTE_WRITE) 103 - #define __PAGE_SHARED_EXEC __pgprot(_PTE_DEFAULT | PTE_READ \ 104 - | PTE_WRITE \ 105 - | PTE_EXEC) 106 - #define __PAGE_COPY __pgprot(_PTE_DEFAULT | PTE_READ) 107 - #define __PAGE_COPY_EXEC __pgprot(_PTE_DEFAULT | PTE_READ \ 108 - | PTE_EXEC) 109 - #define __PAGE_READONLY __pgprot(_PTE_DEFAULT | PTE_READ) 110 - #define __PAGE_READONLY_EXEC __pgprot(_PTE_DEFAULT | PTE_READ \ 111 - | PTE_EXEC) 112 - 113 - #endif /* __ASSEMBLY__ */ 114 - 115 - /* 116 - * The table below defines the page protection levels that we insert into our 117 - * Linux page table version. These get translated into the best that the 118 - * architecture can perform. Note that on UniCore hardware: 119 - * 1) We cannot do execute protection 120 - * 2) If we could do execute protection, then read is implied 121 - * 3) write implies read permissions 122 - */ 123 - #define __P000 __PAGE_NONE 124 - #define __P001 __PAGE_READONLY 125 - #define __P010 __PAGE_COPY 126 - #define __P011 __PAGE_COPY 127 - #define __P100 __PAGE_READONLY_EXEC 128 - #define __P101 __PAGE_READONLY_EXEC 129 - #define __P110 __PAGE_COPY_EXEC 130 - #define __P111 __PAGE_COPY_EXEC 131 - 132 - #define __S000 __PAGE_NONE 133 - #define __S001 __PAGE_READONLY 134 - #define __S010 __PAGE_SHARED 135 - #define __S011 __PAGE_SHARED 136 - #define __S100 __PAGE_READONLY_EXEC 137 - #define __S101 __PAGE_READONLY_EXEC 138 - #define __S110 __PAGE_SHARED_EXEC 139 - #define __S111 __PAGE_SHARED_EXEC 140 - 141 - #ifndef __ASSEMBLY__ 142 - /* 143 - * ZERO_PAGE is a global shared page that is always zero: used 144 - * for zero-mapped memory areas etc.. 145 - */ 146 - extern struct page *empty_zero_page; 147 - #define ZERO_PAGE(vaddr) (empty_zero_page) 148 - 149 - #define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT) 150 - #define pfn_pte(pfn, prot) (__pte(((pfn) << PAGE_SHIFT) \ 151 - | pgprot_val(prot))) 152 - 153 - #define pte_none(pte) (!pte_val(pte)) 154 - #define pte_clear(mm, addr, ptep) set_pte(ptep, __pte(0)) 155 - #define pte_page(pte) (pfn_to_page(pte_pfn(pte))) 156 - 157 - #define set_pte(ptep, pte) cpu_set_pte(ptep, pte) 158 - 159 - #define set_pte_at(mm, addr, ptep, pteval) \ 160 - do { \ 161 - set_pte(ptep, pteval); \ 162 - } while (0) 163 - 164 - /* 165 - * The following only work if pte_present() is true. 166 - * Undefined behaviour if not.. 167 - */ 168 - #define pte_present(pte) (pte_val(pte) & PTE_PRESENT) 169 - #define pte_write(pte) (pte_val(pte) & PTE_WRITE) 170 - #define pte_dirty(pte) (pte_val(pte) & PTE_DIRTY) 171 - #define pte_young(pte) (pte_val(pte) & PTE_YOUNG) 172 - #define pte_exec(pte) (pte_val(pte) & PTE_EXEC) 173 - 174 - #define PTE_BIT_FUNC(fn, op) \ 175 - static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; } 176 - 177 - PTE_BIT_FUNC(wrprotect, &= ~PTE_WRITE); 178 - PTE_BIT_FUNC(mkwrite, |= PTE_WRITE); 179 - PTE_BIT_FUNC(mkclean, &= ~PTE_DIRTY); 180 - PTE_BIT_FUNC(mkdirty, |= PTE_DIRTY); 181 - PTE_BIT_FUNC(mkold, &= ~PTE_YOUNG); 182 - PTE_BIT_FUNC(mkyoung, |= PTE_YOUNG); 183 - 184 - /* 185 - * Mark the prot value as uncacheable. 186 - */ 187 - #define pgprot_noncached(prot) \ 188 - __pgprot(pgprot_val(prot) & ~PTE_CACHEABLE) 189 - #define pgprot_writecombine(prot) \ 190 - __pgprot(pgprot_val(prot) & ~PTE_CACHEABLE) 191 - 192 - #define pmd_none(pmd) (!pmd_val(pmd)) 193 - #define pmd_present(pmd) (pmd_val(pmd) & PMD_PRESENT) 194 - #define pmd_bad(pmd) (((pmd_val(pmd) & \ 195 - (PMD_PRESENT | PMD_TYPE_MASK)) \ 196 - != (PMD_PRESENT | PMD_TYPE_TABLE))) 197 - 198 - #define set_pmd(pmdpd, pmdval) \ 199 - do { \ 200 - *(pmdpd) = pmdval; \ 201 - } while (0) 202 - 203 - #define pmd_clear(pmdp) \ 204 - do { \ 205 - set_pmd(pmdp, __pmd(0));\ 206 - clean_pmd_entry(pmdp); \ 207 - } while (0) 208 - 209 - #define pmd_page_vaddr(pmd) ((pte_t *)__va(pmd_val(pmd) & PAGE_MASK)) 210 - #define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd))) 211 - 212 - /* 213 - * Conversion functions: convert a page and protection to a page entry, 214 - * and a page entry and page directory to the page they refer to. 215 - */ 216 - #define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) 217 - 218 - static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 219 - { 220 - const unsigned long mask = PTE_EXEC | PTE_WRITE | PTE_READ; 221 - pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); 222 - return pte; 223 - } 224 - 225 - extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; 226 - 227 - /* 228 - * Encode and decode a swap entry. Swap entries are stored in the Linux 229 - * page tables as follows: 230 - * 231 - * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 232 - * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 233 - * <--------------- offset --------------> <--- type --> 0 0 0 0 0 234 - * 235 - * This gives us up to 127 swap files and 32GB per swap file. Note that 236 - * the offset field is always non-zero. 237 - */ 238 - #define __SWP_TYPE_SHIFT 5 239 - #define __SWP_TYPE_BITS 7 240 - #define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1) 241 - #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT) 242 - 243 - #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) \ 244 - & __SWP_TYPE_MASK) 245 - #define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT) 246 - #define __swp_entry(type, offset) ((swp_entry_t) { \ 247 - ((type) << __SWP_TYPE_SHIFT) | \ 248 - ((offset) << __SWP_OFFSET_SHIFT) }) 249 - 250 - #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 251 - #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val }) 252 - 253 - /* 254 - * It is an error for the kernel to have more swap files than we can 255 - * encode in the PTEs. This ensures that we know when MAX_SWAPFILES 256 - * is increased beyond what we presently support. 257 - */ 258 - #define MAX_SWAPFILES_CHECK() \ 259 - BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS) 260 - 261 - /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ 262 - /* FIXME: this is not correct */ 263 - #define kern_addr_valid(addr) (1) 264 - 265 - #endif /* !__ASSEMBLY__ */ 266 - 267 - #endif /* __UNICORE_PGTABLE_H__ */
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arch/unicore32/include/asm/processor.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/processor.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - #ifndef __UNICORE_PROCESSOR_H__ 11 - #define __UNICORE_PROCESSOR_H__ 12 - 13 - #ifdef __KERNEL__ 14 - 15 - #include <asm/ptrace.h> 16 - #include <asm/types.h> 17 - 18 - #ifdef __KERNEL__ 19 - #define STACK_TOP TASK_SIZE 20 - #define STACK_TOP_MAX TASK_SIZE 21 - #endif 22 - 23 - struct debug_entry { 24 - u32 address; 25 - u32 insn; 26 - }; 27 - 28 - struct debug_info { 29 - int nsaved; 30 - struct debug_entry bp[2]; 31 - }; 32 - 33 - struct thread_struct { 34 - /* fault info */ 35 - unsigned long address; 36 - unsigned long trap_no; 37 - unsigned long error_code; 38 - /* debugging */ 39 - struct debug_info debug; 40 - }; 41 - 42 - #define INIT_THREAD { } 43 - 44 - #define start_thread(regs, pc, sp) \ 45 - ({ \ 46 - unsigned long *stack = (unsigned long *)sp; \ 47 - memset(regs->uregs, 0, sizeof(regs->uregs)); \ 48 - regs->UCreg_asr = USER_MODE; \ 49 - regs->UCreg_pc = pc & ~1; /* pc */ \ 50 - regs->UCreg_sp = sp; /* sp */ \ 51 - regs->UCreg_02 = stack[2]; /* r2 (envp) */ \ 52 - regs->UCreg_01 = stack[1]; /* r1 (argv) */ \ 53 - regs->UCreg_00 = stack[0]; /* r0 (argc) */ \ 54 - }) 55 - 56 - /* Forward declaration, a strange C thing */ 57 - struct task_struct; 58 - 59 - /* Free all resources held by a thread. */ 60 - extern void release_thread(struct task_struct *); 61 - 62 - unsigned long get_wchan(struct task_struct *p); 63 - 64 - #define cpu_relax() barrier() 65 - 66 - #define task_pt_regs(p) \ 67 - ((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1) 68 - 69 - #define KSTK_EIP(tsk) (task_pt_regs(tsk)->UCreg_pc) 70 - #define KSTK_ESP(tsk) (task_pt_regs(tsk)->UCreg_sp) 71 - 72 - #endif 73 - 74 - #endif /* __UNICORE_PROCESSOR_H__ */
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arch/unicore32/include/asm/ptrace.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/ptrace.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_PTRACE_H__ 10 - #define __UNICORE_PTRACE_H__ 11 - 12 - #include <uapi/asm/ptrace.h> 13 - 14 - #ifndef __ASSEMBLY__ 15 - 16 - #define user_mode(regs) \ 17 - (processor_mode(regs) == USER_MODE) 18 - 19 - #define processor_mode(regs) \ 20 - ((regs)->UCreg_asr & MODE_MASK) 21 - 22 - #define interrupts_enabled(regs) \ 23 - (!((regs)->UCreg_asr & PSR_I_BIT)) 24 - 25 - #define fast_interrupts_enabled(regs) \ 26 - (!((regs)->UCreg_asr & PSR_R_BIT)) 27 - 28 - /* Are the current registers suitable for user mode? 29 - * (used to maintain security in signal handlers) 30 - */ 31 - static inline int valid_user_regs(struct pt_regs *regs) 32 - { 33 - unsigned long mode = regs->UCreg_asr & MODE_MASK; 34 - 35 - /* 36 - * Always clear the R (REAL) bits 37 - */ 38 - regs->UCreg_asr &= ~(PSR_R_BIT); 39 - 40 - if ((regs->UCreg_asr & PSR_I_BIT) == 0) { 41 - if (mode == USER_MODE) 42 - return 1; 43 - } 44 - 45 - /* 46 - * Force ASR to something logical... 47 - */ 48 - regs->UCreg_asr &= PSR_f | USER_MODE; 49 - 50 - return 0; 51 - } 52 - 53 - #define instruction_pointer(regs) ((regs)->UCreg_pc) 54 - #define user_stack_pointer(regs) ((regs)->UCreg_sp) 55 - #define profile_pc(regs) instruction_pointer(regs) 56 - 57 - #endif /* __ASSEMBLY__ */ 58 - #endif
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arch/unicore32/include/asm/stacktrace.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/stacktrace.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - #ifndef __UNICORE_STACKTRACE_H__ 11 - #define __UNICORE_STACKTRACE_H__ 12 - 13 - struct stackframe { 14 - unsigned long fp; 15 - unsigned long sp; 16 - unsigned long lr; 17 - unsigned long pc; 18 - }; 19 - 20 - #ifdef CONFIG_FRAME_POINTER 21 - extern int unwind_frame(struct stackframe *frame); 22 - #else 23 - #define unwind_frame(f) (-EINVAL) 24 - #endif 25 - extern void walk_stackframe(struct stackframe *frame, 26 - int (*fn)(struct stackframe *, void *), void *data); 27 - 28 - #endif /* __UNICORE_STACKTRACE_H__ */
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arch/unicore32/include/asm/string.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/string.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_STRING_H__ 10 - #define __UNICORE_STRING_H__ 11 - 12 - /* 13 - * We don't do inline string functions, since the 14 - * optimised inline asm versions are not small. 15 - */ 16 - 17 - #define __HAVE_ARCH_STRRCHR 18 - extern char *strrchr(const char *s, int c); 19 - 20 - #define __HAVE_ARCH_STRCHR 21 - extern char *strchr(const char *s, int c); 22 - 23 - #define __HAVE_ARCH_MEMCPY 24 - extern void *memcpy(void *, const void *, __kernel_size_t); 25 - 26 - #define __HAVE_ARCH_MEMMOVE 27 - extern void *memmove(void *, const void *, __kernel_size_t); 28 - 29 - #define __HAVE_ARCH_MEMCHR 30 - extern void *memchr(const void *, int, __kernel_size_t); 31 - 32 - #define __HAVE_ARCH_MEMSET 33 - extern void *memset(void *, int, __kernel_size_t); 34 - 35 - #endif
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arch/unicore32/include/asm/suspend.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/suspend.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - #ifndef __UNICORE_SUSPEND_H__ 11 - #define __UNICORE_SUSPEND_H__ 12 - 13 - #ifndef __ASSEMBLY__ 14 - 15 - #include <asm/ptrace.h> 16 - 17 - struct swsusp_arch_regs { 18 - struct cpu_context_save cpu_context; /* cpu context */ 19 - #ifdef CONFIG_UNICORE_FPU_F64 20 - struct fp_state fpstate __attribute__((aligned(8))); 21 - #endif 22 - }; 23 - #endif 24 - 25 - #endif /* __UNICORE_SUSPEND_H__ */ 26 -
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arch/unicore32/include/asm/switch_to.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * Task switching for PKUnity SoC and UniCore ISA 4 - * 5 - * Copyright (C) 2001-2012 GUAN Xue-tao 6 - */ 7 - #ifndef __UNICORE_SWITCH_TO_H__ 8 - #define __UNICORE_SWITCH_TO_H__ 9 - 10 - struct task_struct; 11 - struct thread_info; 12 - 13 - /* 14 - * switch_to(prev, next) should switch from task `prev' to `next' 15 - * `prev' will never be the same as `next'. schedule() itself 16 - * contains the memory barrier to tell GCC not to cache `current'. 17 - */ 18 - extern struct task_struct *__switch_to(struct task_struct *, 19 - struct thread_info *, struct thread_info *); 20 - 21 - #define switch_to(prev, next, last) \ 22 - do { \ 23 - last = __switch_to(prev, task_thread_info(prev), \ 24 - task_thread_info(next)); \ 25 - } while (0) 26 - 27 - #endif /* __UNICORE_SWITCH_TO_H__ */
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arch/unicore32/include/asm/syscall.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - #ifndef _ASM_UNICORE_SYSCALL_H 3 - #define _ASM_UNICORE_SYSCALL_H 4 - 5 - #include <uapi/linux/audit.h> 6 - 7 - static inline int syscall_get_arch(struct task_struct *task) 8 - { 9 - return AUDIT_ARCH_UNICORE; 10 - } 11 - 12 - #endif /* _ASM_UNICORE_SYSCALL_H */
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arch/unicore32/include/asm/thread_info.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/thread_info.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_THREAD_INFO_H__ 10 - #define __UNICORE_THREAD_INFO_H__ 11 - 12 - #ifdef __KERNEL__ 13 - 14 - #include <linux/compiler.h> 15 - #include <asm/fpstate.h> 16 - 17 - #define THREAD_SIZE_ORDER 1 18 - #define THREAD_SIZE 8192 19 - #define THREAD_START_SP (THREAD_SIZE - 8) 20 - 21 - #ifndef __ASSEMBLY__ 22 - 23 - struct task_struct; 24 - 25 - #include <asm/types.h> 26 - 27 - typedef struct { 28 - unsigned long seg; 29 - } mm_segment_t; 30 - 31 - struct cpu_context_save { 32 - __u32 r4; 33 - __u32 r5; 34 - __u32 r6; 35 - __u32 r7; 36 - __u32 r8; 37 - __u32 r9; 38 - __u32 r10; 39 - __u32 r11; 40 - __u32 r12; 41 - __u32 r13; 42 - __u32 r14; 43 - __u32 r15; 44 - __u32 r16; 45 - __u32 r17; 46 - __u32 r18; 47 - __u32 r19; 48 - __u32 r20; 49 - __u32 r21; 50 - __u32 r22; 51 - __u32 r23; 52 - __u32 r24; 53 - __u32 r25; 54 - __u32 r26; 55 - __u32 fp; 56 - __u32 sp; 57 - __u32 pc; 58 - }; 59 - 60 - /* 61 - * low level task data that entry.S needs immediate access to. 62 - * __switch_to() assumes cpu_context follows immediately after cpu_domain. 63 - */ 64 - struct thread_info { 65 - unsigned long flags; /* low level flags */ 66 - int preempt_count; /* 0 => preemptable */ 67 - /* <0 => bug */ 68 - mm_segment_t addr_limit; /* address limit */ 69 - struct task_struct *task; /* main task structure */ 70 - __u32 cpu; /* cpu */ 71 - struct cpu_context_save cpu_context; /* cpu context */ 72 - __u32 syscall; /* syscall number */ 73 - __u8 used_cp[16]; /* thread used copro */ 74 - #ifdef CONFIG_UNICORE_FPU_F64 75 - struct fp_state fpstate __attribute__((aligned(8))); 76 - #endif 77 - }; 78 - 79 - #define INIT_THREAD_INFO(tsk) \ 80 - { \ 81 - .task = &tsk, \ 82 - .flags = 0, \ 83 - .preempt_count = INIT_PREEMPT_COUNT, \ 84 - .addr_limit = KERNEL_DS, \ 85 - } 86 - 87 - /* 88 - * how to get the thread information struct from C 89 - */ 90 - static inline struct thread_info *current_thread_info(void) __attribute_const__; 91 - 92 - static inline struct thread_info *current_thread_info(void) 93 - { 94 - register unsigned long sp asm ("sp"); 95 - return (struct thread_info *)(sp & ~(THREAD_SIZE - 1)); 96 - } 97 - 98 - #define thread_saved_pc(tsk) \ 99 - ((unsigned long)(task_thread_info(tsk)->cpu_context.pc)) 100 - #define thread_saved_sp(tsk) \ 101 - ((unsigned long)(task_thread_info(tsk)->cpu_context.sp)) 102 - #define thread_saved_fp(tsk) \ 103 - ((unsigned long)(task_thread_info(tsk)->cpu_context.fp)) 104 - 105 - #endif 106 - 107 - /* 108 - * thread information flags: 109 - * TIF_SYSCALL_TRACE - syscall trace active 110 - * TIF_SIGPENDING - signal pending 111 - * TIF_NEED_RESCHED - rescheduling necessary 112 - * TIF_NOTIFY_RESUME - callback before returning to user 113 - */ 114 - #define TIF_SIGPENDING 0 115 - #define TIF_NEED_RESCHED 1 116 - #define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ 117 - #define TIF_SYSCALL_TRACE 8 118 - #define TIF_MEMDIE 18 119 - #define TIF_RESTORE_SIGMASK 20 120 - 121 - #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) 122 - #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) 123 - #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) 124 - #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) 125 - 126 - /* 127 - * Change these and you break ASM code in entry-common.S 128 - */ 129 - #define _TIF_WORK_MASK \ 130 - (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_NOTIFY_RESUME) 131 - 132 - #endif /* __KERNEL__ */ 133 - #endif /* __UNICORE_THREAD_INFO_H__ */
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arch/unicore32/include/asm/timex.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/timex.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - #ifndef __UNICORE_TIMEX_H__ 11 - #define __UNICORE_TIMEX_H__ 12 - 13 - #ifdef CONFIG_ARCH_FPGA 14 - 15 - /* in FPGA, APB clock is 33M, and OST clock is 32K, */ 16 - /* so, 1M is selected for timer interrupt correctly */ 17 - #define CLOCK_TICK_RATE (32*1024) 18 - 19 - #endif 20 - 21 - #if defined(CONFIG_PUV3_DB0913) \ 22 - || defined(CONFIG_PUV3_NB0916) \ 23 - || defined(CONFIG_PUV3_SMW0919) 24 - 25 - #define CLOCK_TICK_RATE (14318000) 26 - 27 - #endif 28 - 29 - #include <asm-generic/timex.h> 30 - 31 - #endif
-24
arch/unicore32/include/asm/tlb.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/tlb.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_TLB_H__ 10 - #define __UNICORE_TLB_H__ 11 - 12 - /* 13 - * unicore32 lacks an efficient flush_tlb_range(), use flush_tlb_mm(). 14 - */ 15 - 16 - #define __pte_free_tlb(tlb, pte, addr) \ 17 - do { \ 18 - pgtable_pte_page_dtor(pte); \ 19 - tlb_remove_page((tlb), (pte)); \ 20 - } while (0) 21 - 22 - #include <asm-generic/tlb.h> 23 - 24 - #endif
-192
arch/unicore32/include/asm/tlbflush.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/tlbflush.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_TLBFLUSH_H__ 10 - #define __UNICORE_TLBFLUSH_H__ 11 - 12 - #ifndef __ASSEMBLY__ 13 - 14 - #include <linux/sched.h> 15 - 16 - extern void __cpu_flush_user_tlb_range(unsigned long, unsigned long, 17 - struct vm_area_struct *); 18 - extern void __cpu_flush_kern_tlb_range(unsigned long, unsigned long); 19 - 20 - /* 21 - * TLB Management 22 - * ============== 23 - * 24 - * The arch/unicore/mm/tlb-*.S files implement these methods. 25 - * 26 - * The TLB specific code is expected to perform whatever tests it 27 - * needs to determine if it should invalidate the TLB for each 28 - * call. Start addresses are inclusive and end addresses are 29 - * exclusive; it is safe to round these addresses down. 30 - * 31 - * flush_tlb_all() 32 - * 33 - * Invalidate the entire TLB. 34 - * 35 - * flush_tlb_mm(mm) 36 - * 37 - * Invalidate all TLB entries in a particular address 38 - * space. 39 - * - mm - mm_struct describing address space 40 - * 41 - * flush_tlb_range(mm,start,end) 42 - * 43 - * Invalidate a range of TLB entries in the specified 44 - * address space. 45 - * - mm - mm_struct describing address space 46 - * - start - start address (may not be aligned) 47 - * - end - end address (exclusive, may not be aligned) 48 - * 49 - * flush_tlb_page(vaddr,vma) 50 - * 51 - * Invalidate the specified page in the specified address range. 52 - * - vaddr - virtual address (may not be aligned) 53 - * - vma - vma_struct describing address range 54 - * 55 - * flush_kern_tlb_page(kaddr) 56 - * 57 - * Invalidate the TLB entry for the specified page. The address 58 - * will be in the kernels virtual memory space. Current uses 59 - * only require the D-TLB to be invalidated. 60 - * - kaddr - Kernel virtual memory address 61 - */ 62 - 63 - static inline void local_flush_tlb_all(void) 64 - { 65 - const int zero = 0; 66 - 67 - /* TLB invalidate all */ 68 - asm("movc p0.c6, %0, #6; nop; nop; nop; nop; nop; nop; nop; nop" 69 - : : "r" (zero) : "cc"); 70 - } 71 - 72 - static inline void local_flush_tlb_mm(struct mm_struct *mm) 73 - { 74 - const int zero = 0; 75 - 76 - if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) { 77 - /* TLB invalidate all */ 78 - asm("movc p0.c6, %0, #6; nop; nop; nop; nop; nop; nop; nop; nop" 79 - : : "r" (zero) : "cc"); 80 - } 81 - put_cpu(); 82 - } 83 - 84 - static inline void 85 - local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) 86 - { 87 - if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { 88 - #ifndef CONFIG_CPU_TLB_SINGLE_ENTRY_DISABLE 89 - /* iTLB invalidate page */ 90 - asm("movc p0.c6, %0, #5; nop; nop; nop; nop; nop; nop; nop; nop" 91 - : : "r" (uaddr & PAGE_MASK) : "cc"); 92 - /* dTLB invalidate page */ 93 - asm("movc p0.c6, %0, #3; nop; nop; nop; nop; nop; nop; nop; nop" 94 - : : "r" (uaddr & PAGE_MASK) : "cc"); 95 - #else 96 - /* TLB invalidate all */ 97 - asm("movc p0.c6, %0, #6; nop; nop; nop; nop; nop; nop; nop; nop" 98 - : : "r" (uaddr & PAGE_MASK) : "cc"); 99 - #endif 100 - } 101 - } 102 - 103 - static inline void local_flush_tlb_kernel_page(unsigned long kaddr) 104 - { 105 - #ifndef CONFIG_CPU_TLB_SINGLE_ENTRY_DISABLE 106 - /* iTLB invalidate page */ 107 - asm("movc p0.c6, %0, #5; nop; nop; nop; nop; nop; nop; nop; nop" 108 - : : "r" (kaddr & PAGE_MASK) : "cc"); 109 - /* dTLB invalidate page */ 110 - asm("movc p0.c6, %0, #3; nop; nop; nop; nop; nop; nop; nop; nop" 111 - : : "r" (kaddr & PAGE_MASK) : "cc"); 112 - #else 113 - /* TLB invalidate all */ 114 - asm("movc p0.c6, %0, #6; nop; nop; nop; nop; nop; nop; nop; nop" 115 - : : "r" (kaddr & PAGE_MASK) : "cc"); 116 - #endif 117 - } 118 - 119 - /* 120 - * flush_pmd_entry 121 - * 122 - * Flush a PMD entry (word aligned, or double-word aligned) to 123 - * RAM if the TLB for the CPU we are running on requires this. 124 - * This is typically used when we are creating PMD entries. 125 - * 126 - * clean_pmd_entry 127 - * 128 - * Clean (but don't drain the write buffer) if the CPU requires 129 - * these operations. This is typically used when we are removing 130 - * PMD entries. 131 - */ 132 - static inline void flush_pmd_entry(pmd_t *pmd) 133 - { 134 - #ifndef CONFIG_CPU_DCACHE_LINE_DISABLE 135 - /* flush dcache line, see dcacheline_flush in proc-macros.S */ 136 - asm("mov r1, %0 << #20\n" 137 - "ldw r2, =_stext\n" 138 - "add r2, r2, r1 >> #20\n" 139 - "ldw r1, [r2+], #0x0000\n" 140 - "ldw r1, [r2+], #0x1000\n" 141 - "ldw r1, [r2+], #0x2000\n" 142 - "ldw r1, [r2+], #0x3000\n" 143 - : : "r" (pmd) : "r1", "r2"); 144 - #else 145 - /* flush dcache all */ 146 - asm("movc p0.c5, %0, #14; nop; nop; nop; nop; nop; nop; nop; nop" 147 - : : "r" (pmd) : "cc"); 148 - #endif 149 - } 150 - 151 - static inline void clean_pmd_entry(pmd_t *pmd) 152 - { 153 - #ifndef CONFIG_CPU_DCACHE_LINE_DISABLE 154 - /* clean dcache line */ 155 - asm("movc p0.c5, %0, #11; nop; nop; nop; nop; nop; nop; nop; nop" 156 - : : "r" (__pa(pmd) & ~(L1_CACHE_BYTES - 1)) : "cc"); 157 - #else 158 - /* clean dcache all */ 159 - asm("movc p0.c5, %0, #10; nop; nop; nop; nop; nop; nop; nop; nop" 160 - : : "r" (pmd) : "cc"); 161 - #endif 162 - } 163 - 164 - /* 165 - * Convert calls to our calling convention. 166 - */ 167 - #define local_flush_tlb_range(vma, start, end) \ 168 - __cpu_flush_user_tlb_range(start, end, vma) 169 - #define local_flush_tlb_kernel_range(s, e) \ 170 - __cpu_flush_kern_tlb_range(s, e) 171 - 172 - #define flush_tlb_all local_flush_tlb_all 173 - #define flush_tlb_mm local_flush_tlb_mm 174 - #define flush_tlb_page local_flush_tlb_page 175 - #define flush_tlb_kernel_page local_flush_tlb_kernel_page 176 - #define flush_tlb_range local_flush_tlb_range 177 - #define flush_tlb_kernel_range local_flush_tlb_kernel_range 178 - 179 - /* 180 - * if PG_dcache_clean is not set for the page, we need to ensure that any 181 - * cache entries for the kernels virtual memory range are written 182 - * back to the page. 183 - */ 184 - extern void update_mmu_cache(struct vm_area_struct *vma, 185 - unsigned long addr, pte_t *ptep); 186 - 187 - extern void do_bad_area(unsigned long addr, unsigned int fsr, 188 - struct pt_regs *regs); 189 - 190 - #endif 191 - 192 - #endif
-18
arch/unicore32/include/asm/traps.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/traps.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_TRAP_H__ 10 - #define __UNICORE_TRAP_H__ 11 - 12 - extern void __init early_trap_init(void); 13 - extern void dump_backtrace_entry(unsigned long where, 14 - unsigned long from, unsigned long frame); 15 - 16 - extern void do_DataAbort(unsigned long addr, unsigned int fsr, 17 - struct pt_regs *regs); 18 - #endif
-38
arch/unicore32/include/asm/uaccess.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/asm/uaccess.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_UACCESS_H__ 10 - #define __UNICORE_UACCESS_H__ 11 - 12 - #include <asm/memory.h> 13 - 14 - #define __strncpy_from_user __strncpy_from_user 15 - #define __strnlen_user __strnlen_user 16 - #define __clear_user __clear_user 17 - 18 - #define __kernel_ok (uaccess_kernel()) 19 - #define __user_ok(addr, size) (((size) <= TASK_SIZE) \ 20 - && ((addr) <= TASK_SIZE - (size))) 21 - #define __access_ok(addr, size) (__kernel_ok || __user_ok((addr), (size))) 22 - 23 - extern unsigned long __must_check 24 - raw_copy_from_user(void *to, const void __user *from, unsigned long n); 25 - extern unsigned long __must_check 26 - raw_copy_to_user(void __user *to, const void *from, unsigned long n); 27 - extern unsigned long __must_check 28 - __clear_user(void __user *addr, unsigned long n); 29 - extern unsigned long __must_check 30 - __strncpy_from_user(char *to, const char __user *from, unsigned long count); 31 - extern unsigned long 32 - __strnlen_user(const char __user *s, long n); 33 - #define INLINE_COPY_FROM_USER 34 - #define INLINE_COPY_TO_USER 35 - 36 - #include <asm-generic/uaccess.h> 37 - 38 - #endif /* __UNICORE_UACCESS_H__ */
-4
arch/unicore32/include/asm/vmalloc.h
··· 1 - #ifndef _ASM_UNICORE32_VMALLOC_H 2 - #define _ASM_UNICORE32_VMALLOC_H 3 - 4 - #endif /* _ASM_UNICORE32_VMALLOC_H */
-95
arch/unicore32/include/mach/PKUnity.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/mach/PKUnity.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - /* Be sure that virtual mapping is defined right */ 11 - #ifndef __MACH_PUV3_HARDWARE_H__ 12 - #error You must include hardware.h not PKUnity.h 13 - #endif 14 - 15 - #include <mach/bitfield.h> 16 - 17 - /* 18 - * Memory Definitions 19 - */ 20 - #define PKUNITY_SDRAM_BASE 0x00000000 /* 0x00000000 - 0x7FFFFFFF 2GB */ 21 - #define PKUNITY_MMIO_BASE 0x80000000 /* 0x80000000 - 0xFFFFFFFF 2GB */ 22 - 23 - /* 24 - * PKUNITY System Bus Addresses (PCI): 0x80000000 - 0xBFFFFFFF (1GB) 25 - * 0x80000000 - 0x8000000B 12B PCI Configuration regs 26 - * 0x80010000 - 0x80010250 592B PCI Bridge Base 27 - * 0x80030000 - 0x8003FFFF 64KB PCI Legacy IO 28 - * 0x90000000 - 0x97FFFFFF 128MB PCI AHB-PCI MEM-mapping 29 - * 0x98000000 - 0x9FFFFFFF 128MB PCI PCI-AHB MEM-mapping 30 - */ 31 - #define PKUNITY_PCI_BASE io_p2v(0x80000000) /* 0x80000000 - 0xBFFFFFFF 1GB */ 32 - #include <mach/regs-pci.h> 33 - 34 - #define PKUNITY_PCICFG_BASE (PKUNITY_PCI_BASE + 0x0) 35 - #define PKUNITY_PCIBRI_BASE (PKUNITY_PCI_BASE + 0x00010000) 36 - #define PKUNITY_PCILIO_BASE (PKUNITY_PCI_BASE + 0x00030000) 37 - #define PKUNITY_PCIMEM_BASE (PKUNITY_PCI_BASE + 0x10000000) 38 - #define PKUNITY_PCIAHB_BASE (PKUNITY_PCI_BASE + 0x18000000) 39 - 40 - /* 41 - * PKUNITY System Bus Addresses (AHB): 0xC0000000 - 0xEDFFFFFF (640MB) 42 - */ 43 - #define PKUNITY_AHB_BASE io_p2v(0xC0000000) 44 - 45 - /* AHB-0 is DDR2 SDRAM */ 46 - /* AHB-1 is PCI Space */ 47 - #define PKUNITY_ARBITER_BASE (PKUNITY_AHB_BASE + 0x000000) /* AHB-2 */ 48 - #define PKUNITY_DDR2CTRL_BASE (PKUNITY_AHB_BASE + 0x100000) /* AHB-3 */ 49 - #define PKUNITY_DMAC_BASE (PKUNITY_AHB_BASE + 0x200000) /* AHB-4 */ 50 - #include <mach/regs-dmac.h> 51 - #define PKUNITY_UMAL_BASE (PKUNITY_AHB_BASE + 0x300000) /* AHB-5 */ 52 - #include <mach/regs-umal.h> 53 - #define PKUNITY_USB_BASE (PKUNITY_AHB_BASE + 0x400000) /* AHB-6 */ 54 - #define PKUNITY_SATA_BASE (PKUNITY_AHB_BASE + 0x500000) /* AHB-7 */ 55 - #define PKUNITY_SMC_BASE (PKUNITY_AHB_BASE + 0x600000) /* AHB-8 */ 56 - /* AHB-9 is for APB bridge */ 57 - #define PKUNITY_MME_BASE (PKUNITY_AHB_BASE + 0x700000) /* AHB-10 */ 58 - #define PKUNITY_UNIGFX_BASE (PKUNITY_AHB_BASE + 0x800000) /* AHB-11 */ 59 - #include <mach/regs-unigfx.h> 60 - #define PKUNITY_NAND_BASE (PKUNITY_AHB_BASE + 0x900000) /* AHB-12 */ 61 - #include <mach/regs-nand.h> 62 - #define PKUNITY_H264D_BASE (PKUNITY_AHB_BASE + 0xA00000) /* AHB-13 */ 63 - #define PKUNITY_H264E_BASE (PKUNITY_AHB_BASE + 0xB00000) /* AHB-14 */ 64 - 65 - /* 66 - * PKUNITY Peripheral Bus Addresses (APB): 0xEE000000 - 0xEFFFFFFF (128MB) 67 - */ 68 - #define PKUNITY_APB_BASE io_p2v(0xEE000000) 69 - 70 - #define PKUNITY_UART0_BASE (PKUNITY_APB_BASE + 0x000000) /* APB-0 */ 71 - #define PKUNITY_UART1_BASE (PKUNITY_APB_BASE + 0x100000) /* APB-1 */ 72 - #include <mach/regs-uart.h> 73 - #define PKUNITY_I2C_BASE (PKUNITY_APB_BASE + 0x200000) /* APB-2 */ 74 - #include <mach/regs-i2c.h> 75 - #define PKUNITY_SPI_BASE (PKUNITY_APB_BASE + 0x300000) /* APB-3 */ 76 - #include <mach/regs-spi.h> 77 - #define PKUNITY_AC97_BASE (PKUNITY_APB_BASE + 0x400000) /* APB-4 */ 78 - #include <mach/regs-ac97.h> 79 - #define PKUNITY_GPIO_BASE (PKUNITY_APB_BASE + 0x500000) /* APB-5 */ 80 - #include <mach/regs-gpio.h> 81 - #define PKUNITY_INTC_BASE (PKUNITY_APB_BASE + 0x600000) /* APB-6 */ 82 - #include <mach/regs-intc.h> 83 - #define PKUNITY_RTC_BASE (PKUNITY_APB_BASE + 0x700000) /* APB-7 */ 84 - #include <mach/regs-rtc.h> 85 - #define PKUNITY_OST_BASE (PKUNITY_APB_BASE + 0x800000) /* APB-8 */ 86 - #include <mach/regs-ost.h> 87 - #define PKUNITY_RESETC_BASE (PKUNITY_APB_BASE + 0x900000) /* APB-9 */ 88 - #include <mach/regs-resetc.h> 89 - #define PKUNITY_PM_BASE (PKUNITY_APB_BASE + 0xA00000) /* APB-10 */ 90 - #include <mach/regs-pm.h> 91 - #define PKUNITY_PS2_BASE (PKUNITY_APB_BASE + 0xB00000) /* APB-11 */ 92 - #include <mach/regs-ps2.h> 93 - #define PKUNITY_SDC_BASE (PKUNITY_APB_BASE + 0xC00000) /* APB-12 */ 94 - #include <mach/regs-sdc.h> 95 -
-21
arch/unicore32/include/mach/bitfield.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/mach/bitfield.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __MACH_PUV3_BITFIELD_H__ 10 - #define __MACH_PUV3_BITFIELD_H__ 11 - 12 - #ifndef __ASSEMBLY__ 13 - #define UData(Data) ((unsigned long) (Data)) 14 - #else 15 - #define UData(Data) (Data) 16 - #endif 17 - 18 - #define FIELD(val, vmask, vshift) (((val) & ((UData(1) << (vmask)) - 1)) << (vshift)) 19 - #define FMASK(vmask, vshift) (((UData(1) << (vmask)) - 1) << (vshift)) 20 - 21 - #endif /* __MACH_PUV3_BITFIELD_H__ */
-45
arch/unicore32/include/mach/dma.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/mach/dma.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __MACH_PUV3_DMA_H__ 10 - #define __MACH_PUV3_DMA_H__ 11 - 12 - /* 13 - * The PKUnity has six internal DMA channels. 14 - */ 15 - #define MAX_DMA_CHANNELS 6 16 - 17 - typedef enum { 18 - DMA_PRIO_HIGH = 0, 19 - DMA_PRIO_MEDIUM = 1, 20 - DMA_PRIO_LOW = 2 21 - } puv3_dma_prio; 22 - 23 - /* 24 - * DMA registration 25 - */ 26 - 27 - extern int puv3_request_dma(char *name, 28 - puv3_dma_prio prio, 29 - void (*irq_handler)(int, void *), 30 - void (*err_handler)(int, void *), 31 - void *data); 32 - 33 - extern void puv3_free_dma(int dma_ch); 34 - 35 - static inline void puv3_stop_dma(int ch) 36 - { 37 - writel(readl(DMAC_CONFIG(ch)) & ~DMAC_CONFIG_EN, DMAC_CONFIG(ch)); 38 - } 39 - 40 - static inline void puv3_resume_dma(int ch) 41 - { 42 - writel(readl(DMAC_CONFIG(ch)) | DMAC_CONFIG_EN, DMAC_CONFIG(ch)); 43 - } 44 - 45 - #endif /* __MACH_PUV3_DMA_H__ */
-30
arch/unicore32/include/mach/hardware.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/mach/hardware.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * This file contains the hardware definitions for PKUnity architecture 10 - */ 11 - 12 - #ifndef __MACH_PUV3_HARDWARE_H__ 13 - #define __MACH_PUV3_HARDWARE_H__ 14 - 15 - #include <mach/PKUnity.h> 16 - 17 - #ifndef __ASSEMBLY__ 18 - #define io_p2v(x) (void __iomem *)((x) - PKUNITY_MMIO_BASE) 19 - #define io_v2p(x) (phys_addr_t)((x) + PKUNITY_MMIO_BASE) 20 - #else 21 - #define io_p2v(x) ((x) - PKUNITY_MMIO_BASE) 22 - #define io_v2p(x) ((x) + PKUNITY_MMIO_BASE) 23 - #endif 24 - 25 - #define PCIBIOS_MIN_IO 0x4000 /* should lower than 64KB */ 26 - #define PCIBIOS_MIN_MEM io_v2p(PKUNITY_PCIMEM_BASE) 27 - 28 - #define pcibios_assign_all_busses() 1 29 - 30 - #endif /* __MACH_PUV3_HARDWARE_H__ */
-17
arch/unicore32/include/mach/map.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/mach/map.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * Page table mapping constructs and function prototypes 10 - */ 11 - #define MT_DEVICE 0 12 - #define MT_DEVICE_CACHED 2 13 - #define MT_KUSER 7 14 - #define MT_HIGH_VECTORS 8 15 - #define MT_MEMORY 9 16 - #define MT_ROM 10 17 -
-54
arch/unicore32/include/mach/memory.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/mach/memory.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __MACH_PUV3_MEMORY_H__ 10 - #define __MACH_PUV3_MEMORY_H__ 11 - 12 - #include <mach/hardware.h> 13 - 14 - /* Physical DRAM offset. */ 15 - #define PHYS_OFFSET UL(0x00000000) 16 - /* The base address of exception vectors. */ 17 - #define VECTORS_BASE UL(0xffff0000) 18 - /* The base address of kuser area. */ 19 - #define KUSER_BASE UL(0x80000000) 20 - 21 - #ifdef __ASSEMBLY__ 22 - /* The byte offset of the kernel image in RAM from the start of RAM. */ 23 - #define KERNEL_IMAGE_START 0x00408000 24 - #endif 25 - 26 - #if !defined(__ASSEMBLY__) && defined(CONFIG_PCI) 27 - 28 - void puv3_pci_adjust_zones(unsigned long *max_zone_pfn); 29 - 30 - #define arch_adjust_zones(max_zone_pfn) \ 31 - puv3_pci_adjust_zones(max_zone_pfn) 32 - 33 - #endif 34 - 35 - /* 36 - * PCI controller in PKUnity-3 masks highest 5-bit for upstream channel, 37 - * so we must limit the DMA allocation within 128M physical memory for 38 - * supporting PCI devices. 39 - */ 40 - #define PCI_DMA_THRESHOLD (PHYS_OFFSET + SZ_128M - 1) 41 - 42 - #define is_pcibus_device(dev) (dev && \ 43 - (strncmp(dev->bus->name, "pci", 3) == 0)) 44 - 45 - #define __virt_to_pcibus(x) (__virt_to_phys((x) + PKUNITY_PCIAHB_BASE)) 46 - #define __pcibus_to_virt(x) (__phys_to_virt(x) - PKUNITY_PCIAHB_BASE) 47 - 48 - /* kuser area */ 49 - #define KUSER_VECPAGE_BASE (KUSER_BASE + UL(0x3fff0000)) 50 - /* kuser_vecpage (0xbfff0000) is ro, and vectors page (0xffff0000) is rw */ 51 - #define kuser_vecpage_to_vectors(x) ((x) - (KUSER_VECPAGE_BASE) \ 52 - + (VECTORS_BASE)) 53 - 54 - #endif
-33
arch/unicore32/include/mach/ocd.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/mach/ocd.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - #ifndef __MACH_PUV3_OCD_H__ 11 - #define __MACH_PUV3_OCD_H__ 12 - 13 - #if defined(CONFIG_DEBUG_OCD) 14 - static inline void ocd_putc(unsigned int c) 15 - { 16 - int status, i = 0x2000000; 17 - 18 - do { 19 - if (--i < 0) 20 - return; 21 - 22 - asm volatile ("movc %0, p1.c0, #0" : "=r" (status)); 23 - } while (status & 2); 24 - 25 - asm("movc p1.c1, %0, #1" : : "r" (c)); 26 - } 27 - 28 - #define putc(ch) ocd_putc(ch) 29 - #else 30 - #define putc(ch) 31 - #endif 32 - 33 - #endif
-37
arch/unicore32/include/mach/pm.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore/include/mach/pm.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __PUV3_PM_H__ 10 - #define __PUV3_PM_H__ 11 - 12 - #include <linux/suspend.h> 13 - 14 - struct puv3_cpu_pm_fns { 15 - int save_count; 16 - void (*save)(unsigned long *); 17 - void (*restore)(unsigned long *); 18 - int (*valid)(suspend_state_t state); 19 - void (*enter)(suspend_state_t state); 20 - int (*prepare)(void); 21 - void (*finish)(void); 22 - }; 23 - 24 - extern struct puv3_cpu_pm_fns *puv3_cpu_pm_fns; 25 - 26 - /* sleep.S */ 27 - extern void puv3_cpu_suspend(unsigned int); 28 - 29 - extern void puv3_cpu_resume(void); 30 - 31 - extern int puv3_pm_enter(suspend_state_t state); 32 - 33 - /* Defined in hibernate_asm.S */ 34 - extern int restore_image(pgd_t *resume_pg_dir, struct pbe *restore_pblist); 35 - 36 - extern struct pbe *restore_pblist; 37 - #endif
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arch/unicore32/include/mach/regs-ac97.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * PKUnity AC97 Registers 4 - */ 5 - 6 - #define PKUNITY_AC97_CONR (PKUNITY_AC97_BASE + 0x0000) 7 - #define PKUNITY_AC97_OCR (PKUNITY_AC97_BASE + 0x0004) 8 - #define PKUNITY_AC97_ICR (PKUNITY_AC97_BASE + 0x0008) 9 - #define PKUNITY_AC97_CRAC (PKUNITY_AC97_BASE + 0x000C) 10 - #define PKUNITY_AC97_INTR (PKUNITY_AC97_BASE + 0x0010) 11 - #define PKUNITY_AC97_INTRSTAT (PKUNITY_AC97_BASE + 0x0014) 12 - #define PKUNITY_AC97_INTRCLEAR (PKUNITY_AC97_BASE + 0x0018) 13 - #define PKUNITY_AC97_ENABLE (PKUNITY_AC97_BASE + 0x001C) 14 - #define PKUNITY_AC97_OUT_FIFO (PKUNITY_AC97_BASE + 0x0020) 15 - #define PKUNITY_AC97_IN_FIFO (PKUNITY_AC97_BASE + 0x0030) 16 - 17 - #define AC97_CODEC_REG(v) FIELD((v), 7, 16) 18 - #define AC97_CODEC_VAL(v) FIELD((v), 16, 0) 19 - #define AC97_CODEC_WRITECOMPLETE FIELD(1, 1, 2) 20 - 21 - /* 22 - * VAR PLAY SAMPLE RATE 23 - */ 24 - #define AC97_CMD_VPSAMPLE (FIELD(3, 2, 16) | FIELD(3, 2, 0)) 25 - 26 - /* 27 - * FIX CAPTURE SAMPLE RATE 28 - */ 29 - #define AC97_CMD_FCSAMPLE FIELD(7, 3, 0) 30 - 31 - #define AC97_CMD_RESET FIELD(1, 1, 0) 32 - #define AC97_CMD_ENABLE FIELD(1, 1, 0) 33 - #define AC97_CMD_DISABLE FIELD(0, 1, 0)
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arch/unicore32/include/mach/regs-dmac.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * PKUnity Direct Memory Access Controller (DMAC) 4 - */ 5 - 6 - /* 7 - * Interrupt Status Reg DMAC_ISR. 8 - */ 9 - #define DMAC_ISR (PKUNITY_DMAC_BASE + 0x0020) 10 - /* 11 - * Interrupt Transfer Complete Status Reg DMAC_ITCSR. 12 - */ 13 - #define DMAC_ITCSR (PKUNITY_DMAC_BASE + 0x0050) 14 - /* 15 - * Interrupt Transfer Complete Clear Reg DMAC_ITCCR. 16 - */ 17 - #define DMAC_ITCCR (PKUNITY_DMAC_BASE + 0x0060) 18 - /* 19 - * Interrupt Error Status Reg DMAC_IESR. 20 - */ 21 - #define DMAC_IESR (PKUNITY_DMAC_BASE + 0x0080) 22 - /* 23 - * Interrupt Error Clear Reg DMAC_IECR. 24 - */ 25 - #define DMAC_IECR (PKUNITY_DMAC_BASE + 0x0090) 26 - /* 27 - * Enable Channels Reg DMAC_ENCH. 28 - */ 29 - #define DMAC_ENCH (PKUNITY_DMAC_BASE + 0x00B0) 30 - 31 - /* 32 - * DMA control reg. Space [byte] 33 - */ 34 - #define DMASp 0x00000100 35 - 36 - /* 37 - * Source Addr DMAC_SRCADDR(ch). 38 - */ 39 - #define DMAC_SRCADDR(ch) (PKUNITY_DMAC_BASE + (ch)*DMASp + 0x00) 40 - /* 41 - * Destination Addr DMAC_DESTADDR(ch). 42 - */ 43 - #define DMAC_DESTADDR(ch) (PKUNITY_DMAC_BASE + (ch)*DMASp + 0x04) 44 - /* 45 - * Control Reg DMAC_CONTROL(ch). 46 - */ 47 - #define DMAC_CONTROL(ch) (PKUNITY_DMAC_BASE + (ch)*DMASp + 0x0C) 48 - /* 49 - * Configuration Reg DMAC_CONFIG(ch). 50 - */ 51 - #define DMAC_CONFIG(ch) (PKUNITY_DMAC_BASE + (ch)*DMASp + 0x10) 52 - 53 - #define DMAC_IR_MASK FMASK(6, 0) 54 - /* 55 - * select channel (ch) 56 - */ 57 - #define DMAC_CHANNEL(ch) FIELD(1, 1, (ch)) 58 - 59 - #define DMAC_CONTROL_SIZE_BYTE(v) (FIELD((v), 12, 14) | \ 60 - FIELD(0, 3, 9) | FIELD(0, 3, 6)) 61 - #define DMAC_CONTROL_SIZE_HWORD(v) (FIELD((v) >> 1, 12, 14) | \ 62 - FIELD(1, 3, 9) | FIELD(1, 3, 6)) 63 - #define DMAC_CONTROL_SIZE_WORD(v) (FIELD((v) >> 2, 12, 14) | \ 64 - FIELD(2, 3, 9) | FIELD(2, 3, 6)) 65 - #define DMAC_CONTROL_DI FIELD(1, 1, 13) 66 - #define DMAC_CONTROL_SI FIELD(1, 1, 12) 67 - #define DMAC_CONTROL_BURST_1BYTE (FIELD(0, 3, 3) | FIELD(0, 3, 0)) 68 - #define DMAC_CONTROL_BURST_4BYTE (FIELD(3, 3, 3) | FIELD(3, 3, 0)) 69 - #define DMAC_CONTROL_BURST_8BYTE (FIELD(5, 3, 3) | FIELD(5, 3, 0)) 70 - #define DMAC_CONTROL_BURST_16BYTE (FIELD(7, 3, 3) | FIELD(7, 3, 0)) 71 - 72 - #define DMAC_CONFIG_UART0_WR (FIELD(2, 4, 11) | FIELD(1, 2, 1)) 73 - #define DMAC_CONFIG_UART0_RD (FIELD(2, 4, 7) | FIELD(2, 2, 1)) 74 - #define DMAC_CONFIG_UART1_WR (FIELD(3, 4, 11) | FIELD(1, 2, 1)) 75 - #define DMAC_CONFIG_UART1RD (FIELD(3, 4, 7) | FIELD(2, 2, 1)) 76 - #define DMAC_CONFIG_AC97WR (FIELD(4, 4, 11) | FIELD(1, 2, 1)) 77 - #define DMAC_CONFIG_AC97RD (FIELD(4, 4, 7) | FIELD(2, 2, 1)) 78 - #define DMAC_CONFIG_MMCWR (FIELD(7, 4, 11) | FIELD(1, 2, 1)) 79 - #define DMAC_CONFIG_MMCRD (FIELD(7, 4, 7) | FIELD(2, 2, 1)) 80 - #define DMAC_CONFIG_MASKITC FIELD(1, 1, 4) 81 - #define DMAC_CONFIG_MASKIE FIELD(1, 1, 3) 82 - #define DMAC_CONFIG_EN FIELD(1, 1, 0)
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arch/unicore32/include/mach/regs-gpio.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * PKUnity General-Purpose Input/Output (GPIO) Registers 4 - */ 5 - 6 - /* 7 - * Voltage Status Reg GPIO_GPLR. 8 - */ 9 - #define GPIO_GPLR (PKUNITY_GPIO_BASE + 0x0000) 10 - /* 11 - * Pin Direction Reg GPIO_GPDR. 12 - */ 13 - #define GPIO_GPDR (PKUNITY_GPIO_BASE + 0x0004) 14 - /* 15 - * Output Pin Set Reg GPIO_GPSR. 16 - */ 17 - #define GPIO_GPSR (PKUNITY_GPIO_BASE + 0x0008) 18 - /* 19 - * Output Pin Clear Reg GPIO_GPCR. 20 - */ 21 - #define GPIO_GPCR (PKUNITY_GPIO_BASE + 0x000C) 22 - /* 23 - * Raise Edge Detect Reg GPIO_GRER. 24 - */ 25 - #define GPIO_GRER (PKUNITY_GPIO_BASE + 0x0010) 26 - /* 27 - * Fall Edge Detect Reg GPIO_GFER. 28 - */ 29 - #define GPIO_GFER (PKUNITY_GPIO_BASE + 0x0014) 30 - /* 31 - * Edge Status Reg GPIO_GEDR. 32 - */ 33 - #define GPIO_GEDR (PKUNITY_GPIO_BASE + 0x0018) 34 - /* 35 - * Special Voltage Detect Reg GPIO_GPIR. 36 - */ 37 - #define GPIO_GPIR (PKUNITY_GPIO_BASE + 0x0020) 38 - 39 - #define GPIO_MIN (0) 40 - #define GPIO_MAX (27) 41 - 42 - #define GPIO_GPIO(Nb) (0x00000001 << (Nb)) /* GPIO [0..27] */ 43 - #define GPIO_GPIO0 GPIO_GPIO(0) /* GPIO [0] */ 44 - #define GPIO_GPIO1 GPIO_GPIO(1) /* GPIO [1] */ 45 - #define GPIO_GPIO2 GPIO_GPIO(2) /* GPIO [2] */ 46 - #define GPIO_GPIO3 GPIO_GPIO(3) /* GPIO [3] */ 47 - #define GPIO_GPIO4 GPIO_GPIO(4) /* GPIO [4] */ 48 - #define GPIO_GPIO5 GPIO_GPIO(5) /* GPIO [5] */ 49 - #define GPIO_GPIO6 GPIO_GPIO(6) /* GPIO [6] */ 50 - #define GPIO_GPIO7 GPIO_GPIO(7) /* GPIO [7] */ 51 - #define GPIO_GPIO8 GPIO_GPIO(8) /* GPIO [8] */ 52 - #define GPIO_GPIO9 GPIO_GPIO(9) /* GPIO [9] */ 53 - #define GPIO_GPIO10 GPIO_GPIO(10) /* GPIO [10] */ 54 - #define GPIO_GPIO11 GPIO_GPIO(11) /* GPIO [11] */ 55 - #define GPIO_GPIO12 GPIO_GPIO(12) /* GPIO [12] */ 56 - #define GPIO_GPIO13 GPIO_GPIO(13) /* GPIO [13] */ 57 - #define GPIO_GPIO14 GPIO_GPIO(14) /* GPIO [14] */ 58 - #define GPIO_GPIO15 GPIO_GPIO(15) /* GPIO [15] */ 59 - #define GPIO_GPIO16 GPIO_GPIO(16) /* GPIO [16] */ 60 - #define GPIO_GPIO17 GPIO_GPIO(17) /* GPIO [17] */ 61 - #define GPIO_GPIO18 GPIO_GPIO(18) /* GPIO [18] */ 62 - #define GPIO_GPIO19 GPIO_GPIO(19) /* GPIO [19] */ 63 - #define GPIO_GPIO20 GPIO_GPIO(20) /* GPIO [20] */ 64 - #define GPIO_GPIO21 GPIO_GPIO(21) /* GPIO [21] */ 65 - #define GPIO_GPIO22 GPIO_GPIO(22) /* GPIO [22] */ 66 - #define GPIO_GPIO23 GPIO_GPIO(23) /* GPIO [23] */ 67 - #define GPIO_GPIO24 GPIO_GPIO(24) /* GPIO [24] */ 68 - #define GPIO_GPIO25 GPIO_GPIO(25) /* GPIO [25] */ 69 - #define GPIO_GPIO26 GPIO_GPIO(26) /* GPIO [26] */ 70 - #define GPIO_GPIO27 GPIO_GPIO(27) /* GPIO [27] */ 71 -
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arch/unicore32/include/mach/regs-i2c.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * PKUnity Inter-integrated Circuit (I2C) Registers 4 - */ 5 - 6 - /* 7 - * Control Reg I2C_CON. 8 - */ 9 - #define I2C_CON (PKUNITY_I2C_BASE + 0x0000) 10 - /* 11 - * Target Address Reg I2C_TAR. 12 - */ 13 - #define I2C_TAR (PKUNITY_I2C_BASE + 0x0004) 14 - /* 15 - * Data buffer and command Reg I2C_DATACMD. 16 - */ 17 - #define I2C_DATACMD (PKUNITY_I2C_BASE + 0x0010) 18 - /* 19 - * Enable Reg I2C_ENABLE. 20 - */ 21 - #define I2C_ENABLE (PKUNITY_I2C_BASE + 0x006C) 22 - /* 23 - * Status Reg I2C_STATUS. 24 - */ 25 - #define I2C_STATUS (PKUNITY_I2C_BASE + 0x0070) 26 - /* 27 - * Tx FIFO Length Reg I2C_TXFLR. 28 - */ 29 - #define I2C_TXFLR (PKUNITY_I2C_BASE + 0x0074) 30 - /* 31 - * Rx FIFO Length Reg I2C_RXFLR. 32 - */ 33 - #define I2C_RXFLR (PKUNITY_I2C_BASE + 0x0078) 34 - /* 35 - * Enable Status Reg I2C_ENSTATUS. 36 - */ 37 - #define I2C_ENSTATUS (PKUNITY_I2C_BASE + 0x009C) 38 - 39 - #define I2C_CON_MASTER FIELD(1, 1, 0) 40 - #define I2C_CON_SPEED_STD FIELD(1, 2, 1) 41 - #define I2C_CON_SPEED_FAST FIELD(2, 2, 1) 42 - #define I2C_CON_RESTART FIELD(1, 1, 5) 43 - #define I2C_CON_SLAVEDISABLE FIELD(1, 1, 6) 44 - 45 - #define I2C_DATACMD_READ FIELD(1, 1, 8) 46 - #define I2C_DATACMD_WRITE FIELD(0, 1, 8) 47 - #define I2C_DATACMD_DAT_MASK FMASK(8, 0) 48 - #define I2C_DATACMD_DAT(v) FIELD((v), 8, 0) 49 - 50 - #define I2C_ENABLE_ENABLE FIELD(1, 1, 0) 51 - #define I2C_ENABLE_DISABLE FIELD(0, 1, 0) 52 - 53 - #define I2C_STATUS_RFF FIELD(1, 1, 4) 54 - #define I2C_STATUS_RFNE FIELD(1, 1, 3) 55 - #define I2C_STATUS_TFE FIELD(1, 1, 2) 56 - #define I2C_STATUS_TFNF FIELD(1, 1, 1) 57 - #define I2C_STATUS_ACTIVITY FIELD(1, 1, 0) 58 - 59 - #define I2C_ENSTATUS_ENABLE FIELD(1, 1, 0) 60 - 61 - #define I2C_TAR_THERMAL 0x4f 62 - #define I2C_TAR_SPD 0x50 63 - #define I2C_TAR_PWIC 0x55 64 - #define I2C_TAR_EEPROM 0x57
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arch/unicore32/include/mach/regs-intc.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * PKUNITY Interrupt Controller (INTC) Registers 4 - */ 5 - /* 6 - * INTC Level Reg INTC_ICLR. 7 - */ 8 - #define INTC_ICLR (PKUNITY_INTC_BASE + 0x0000) 9 - /* 10 - * INTC Mask Reg INTC_ICMR. 11 - */ 12 - #define INTC_ICMR (PKUNITY_INTC_BASE + 0x0004) 13 - /* 14 - * INTC Pending Reg INTC_ICPR. 15 - */ 16 - #define INTC_ICPR (PKUNITY_INTC_BASE + 0x0008) 17 - /* 18 - * INTC IRQ Pending Reg INTC_ICIP. 19 - */ 20 - #define INTC_ICIP (PKUNITY_INTC_BASE + 0x000C) 21 - /* 22 - * INTC REAL Pending Reg INTC_ICFP. 23 - */ 24 - #define INTC_ICFP (PKUNITY_INTC_BASE + 0x0010) 25 - /* 26 - * INTC Control Reg INTC_ICCR. 27 - */ 28 - #define INTC_ICCR (PKUNITY_INTC_BASE + 0x0014) 29 -
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arch/unicore32/include/mach/regs-nand.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * PKUnity NAND Controller Registers 4 - */ 5 - /* 6 - * ID Reg. 0 NAND_IDR0 7 - */ 8 - #define NAND_IDR0 (PKUNITY_NAND_BASE + 0x0000) 9 - /* 10 - * ID Reg. 1 NAND_IDR1 11 - */ 12 - #define NAND_IDR1 (PKUNITY_NAND_BASE + 0x0004) 13 - /* 14 - * ID Reg. 2 NAND_IDR2 15 - */ 16 - #define NAND_IDR2 (PKUNITY_NAND_BASE + 0x0008) 17 - /* 18 - * ID Reg. 3 NAND_IDR3 19 - */ 20 - #define NAND_IDR3 (PKUNITY_NAND_BASE + 0x000C) 21 - /* 22 - * Page Address Reg 0 NAND_PAR0 23 - */ 24 - #define NAND_PAR0 (PKUNITY_NAND_BASE + 0x0010) 25 - /* 26 - * Page Address Reg 1 NAND_PAR1 27 - */ 28 - #define NAND_PAR1 (PKUNITY_NAND_BASE + 0x0014) 29 - /* 30 - * Page Address Reg 2 NAND_PAR2 31 - */ 32 - #define NAND_PAR2 (PKUNITY_NAND_BASE + 0x0018) 33 - /* 34 - * ECC Enable Reg NAND_ECCEN 35 - */ 36 - #define NAND_ECCEN (PKUNITY_NAND_BASE + 0x001C) 37 - /* 38 - * Buffer Reg NAND_BUF 39 - */ 40 - #define NAND_BUF (PKUNITY_NAND_BASE + 0x0020) 41 - /* 42 - * ECC Status Reg NAND_ECCSR 43 - */ 44 - #define NAND_ECCSR (PKUNITY_NAND_BASE + 0x0024) 45 - /* 46 - * Command Reg NAND_CMD 47 - */ 48 - #define NAND_CMD (PKUNITY_NAND_BASE + 0x0028) 49 - /* 50 - * DMA Configure Reg NAND_DMACR 51 - */ 52 - #define NAND_DMACR (PKUNITY_NAND_BASE + 0x002C) 53 - /* 54 - * Interrupt Reg NAND_IR 55 - */ 56 - #define NAND_IR (PKUNITY_NAND_BASE + 0x0030) 57 - /* 58 - * Interrupt Mask Reg NAND_IMR 59 - */ 60 - #define NAND_IMR (PKUNITY_NAND_BASE + 0x0034) 61 - /* 62 - * Chip Enable Reg NAND_CHIPEN 63 - */ 64 - #define NAND_CHIPEN (PKUNITY_NAND_BASE + 0x0038) 65 - /* 66 - * Address Reg NAND_ADDR 67 - */ 68 - #define NAND_ADDR (PKUNITY_NAND_BASE + 0x003C) 69 - 70 - /* 71 - * Command bits NAND_CMD_CMD_MASK 72 - */ 73 - #define NAND_CMD_CMD_MASK FMASK(4, 4) 74 - #define NAND_CMD_CMD_READPAGE FIELD(0x0, 4, 4) 75 - #define NAND_CMD_CMD_ERASEBLOCK FIELD(0x6, 4, 4) 76 - #define NAND_CMD_CMD_READSTATUS FIELD(0x7, 4, 4) 77 - #define NAND_CMD_CMD_WRITEPAGE FIELD(0x8, 4, 4) 78 - #define NAND_CMD_CMD_READID FIELD(0x9, 4, 4) 79 - #define NAND_CMD_CMD_RESET FIELD(0xf, 4, 4) 80 -
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arch/unicore32/include/mach/regs-ost.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * PKUnity Operating System Timer (OST) Registers 4 - */ 5 - /* 6 - * Match Reg 0 OST_OSMR0 7 - */ 8 - #define OST_OSMR0 (PKUNITY_OST_BASE + 0x0000) 9 - /* 10 - * Match Reg 1 OST_OSMR1 11 - */ 12 - #define OST_OSMR1 (PKUNITY_OST_BASE + 0x0004) 13 - /* 14 - * Match Reg 2 OST_OSMR2 15 - */ 16 - #define OST_OSMR2 (PKUNITY_OST_BASE + 0x0008) 17 - /* 18 - * Match Reg 3 OST_OSMR3 19 - */ 20 - #define OST_OSMR3 (PKUNITY_OST_BASE + 0x000C) 21 - /* 22 - * Counter Reg OST_OSCR 23 - */ 24 - #define OST_OSCR (PKUNITY_OST_BASE + 0x0010) 25 - /* 26 - * Status Reg OST_OSSR 27 - */ 28 - #define OST_OSSR (PKUNITY_OST_BASE + 0x0014) 29 - /* 30 - * Watchdog Enable Reg OST_OWER 31 - */ 32 - #define OST_OWER (PKUNITY_OST_BASE + 0x0018) 33 - /* 34 - * Interrupt Enable Reg OST_OIER 35 - */ 36 - #define OST_OIER (PKUNITY_OST_BASE + 0x001C) 37 - 38 - /* 39 - * PWM Registers: IO base address: PKUNITY_OST_BASE + 0x80 40 - * PWCR: Pulse Width Control Reg 41 - * DCCR: Duty Cycle Control Reg 42 - * PCR: Period Control Reg 43 - */ 44 - #define OST_PWM_PWCR (0x00) 45 - #define OST_PWM_DCCR (0x04) 46 - #define OST_PWM_PCR (0x08) 47 - 48 - /* 49 - * Match detected 0 OST_OSSR_M0 50 - */ 51 - #define OST_OSSR_M0 FIELD(1, 1, 0) 52 - /* 53 - * Match detected 1 OST_OSSR_M1 54 - */ 55 - #define OST_OSSR_M1 FIELD(1, 1, 1) 56 - /* 57 - * Match detected 2 OST_OSSR_M2 58 - */ 59 - #define OST_OSSR_M2 FIELD(1, 1, 2) 60 - /* 61 - * Match detected 3 OST_OSSR_M3 62 - */ 63 - #define OST_OSSR_M3 FIELD(1, 1, 3) 64 - 65 - /* 66 - * Interrupt enable 0 OST_OIER_E0 67 - */ 68 - #define OST_OIER_E0 FIELD(1, 1, 0) 69 - /* 70 - * Interrupt enable 1 OST_OIER_E1 71 - */ 72 - #define OST_OIER_E1 FIELD(1, 1, 1) 73 - /* 74 - * Interrupt enable 2 OST_OIER_E2 75 - */ 76 - #define OST_OIER_E2 FIELD(1, 1, 2) 77 - /* 78 - * Interrupt enable 3 OST_OIER_E3 79 - */ 80 - #define OST_OIER_E3 FIELD(1, 1, 3) 81 - 82 - /* 83 - * Watchdog Match Enable OST_OWER_WME 84 - */ 85 - #define OST_OWER_WME FIELD(1, 1, 0) 86 - 87 - /* 88 - * PWM Full Duty Cycle OST_PWMDCCR_FDCYCLE 89 - */ 90 - #define OST_PWMDCCR_FDCYCLE FIELD(1, 1, 10) 91 -
-95
arch/unicore32/include/mach/regs-pci.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * PKUnity AHB-PCI Bridge Registers 4 - */ 5 - 6 - /* 7 - * AHB/PCI fixed physical address for pci addess configuration 8 - */ 9 - /* 10 - * PCICFG Bridge Base Reg. 11 - */ 12 - #define PCICFG_BRIBASE (PKUNITY_PCICFG_BASE + 0x0000) 13 - /* 14 - * PCICFG Address Reg. 15 - */ 16 - #define PCICFG_ADDR (PKUNITY_PCICFG_BASE + 0x0004) 17 - /* 18 - * PCICFG Address Reg. 19 - */ 20 - #define PCICFG_DATA (PKUNITY_PCICFG_BASE + 0x0008) 21 - 22 - /* 23 - * PCI Bridge configuration space 24 - */ 25 - #define PCIBRI_ID (PKUNITY_PCIBRI_BASE + 0x0000) 26 - #define PCIBRI_CMD (PKUNITY_PCIBRI_BASE + 0x0004) 27 - #define PCIBRI_CLASS (PKUNITY_PCIBRI_BASE + 0x0008) 28 - #define PCIBRI_LTR (PKUNITY_PCIBRI_BASE + 0x000C) 29 - #define PCIBRI_BAR0 (PKUNITY_PCIBRI_BASE + 0x0010) 30 - #define PCIBRI_BAR1 (PKUNITY_PCIBRI_BASE + 0x0014) 31 - #define PCIBRI_BAR2 (PKUNITY_PCIBRI_BASE + 0x0018) 32 - #define PCIBRI_BAR3 (PKUNITY_PCIBRI_BASE + 0x001C) 33 - #define PCIBRI_BAR4 (PKUNITY_PCIBRI_BASE + 0x0020) 34 - #define PCIBRI_BAR5 (PKUNITY_PCIBRI_BASE + 0x0024) 35 - 36 - #define PCIBRI_PCICTL0 (PKUNITY_PCIBRI_BASE + 0x0100) 37 - #define PCIBRI_PCIBAR0 (PKUNITY_PCIBRI_BASE + 0x0104) 38 - #define PCIBRI_PCIAMR0 (PKUNITY_PCIBRI_BASE + 0x0108) 39 - #define PCIBRI_PCITAR0 (PKUNITY_PCIBRI_BASE + 0x010C) 40 - #define PCIBRI_PCICTL1 (PKUNITY_PCIBRI_BASE + 0x0110) 41 - #define PCIBRI_PCIBAR1 (PKUNITY_PCIBRI_BASE + 0x0114) 42 - #define PCIBRI_PCIAMR1 (PKUNITY_PCIBRI_BASE + 0x0118) 43 - #define PCIBRI_PCITAR1 (PKUNITY_PCIBRI_BASE + 0x011C) 44 - #define PCIBRI_PCICTL2 (PKUNITY_PCIBRI_BASE + 0x0120) 45 - #define PCIBRI_PCIBAR2 (PKUNITY_PCIBRI_BASE + 0x0124) 46 - #define PCIBRI_PCIAMR2 (PKUNITY_PCIBRI_BASE + 0x0128) 47 - #define PCIBRI_PCITAR2 (PKUNITY_PCIBRI_BASE + 0x012C) 48 - #define PCIBRI_PCICTL3 (PKUNITY_PCIBRI_BASE + 0x0130) 49 - #define PCIBRI_PCIBAR3 (PKUNITY_PCIBRI_BASE + 0x0134) 50 - #define PCIBRI_PCIAMR3 (PKUNITY_PCIBRI_BASE + 0x0138) 51 - #define PCIBRI_PCITAR3 (PKUNITY_PCIBRI_BASE + 0x013C) 52 - #define PCIBRI_PCICTL4 (PKUNITY_PCIBRI_BASE + 0x0140) 53 - #define PCIBRI_PCIBAR4 (PKUNITY_PCIBRI_BASE + 0x0144) 54 - #define PCIBRI_PCIAMR4 (PKUNITY_PCIBRI_BASE + 0x0148) 55 - #define PCIBRI_PCITAR4 (PKUNITY_PCIBRI_BASE + 0x014C) 56 - #define PCIBRI_PCICTL5 (PKUNITY_PCIBRI_BASE + 0x0150) 57 - #define PCIBRI_PCIBAR5 (PKUNITY_PCIBRI_BASE + 0x0154) 58 - #define PCIBRI_PCIAMR5 (PKUNITY_PCIBRI_BASE + 0x0158) 59 - #define PCIBRI_PCITAR5 (PKUNITY_PCIBRI_BASE + 0x015C) 60 - 61 - #define PCIBRI_AHBCTL0 (PKUNITY_PCIBRI_BASE + 0x0180) 62 - #define PCIBRI_AHBBAR0 (PKUNITY_PCIBRI_BASE + 0x0184) 63 - #define PCIBRI_AHBAMR0 (PKUNITY_PCIBRI_BASE + 0x0188) 64 - #define PCIBRI_AHBTAR0 (PKUNITY_PCIBRI_BASE + 0x018C) 65 - #define PCIBRI_AHBCTL1 (PKUNITY_PCIBRI_BASE + 0x0190) 66 - #define PCIBRI_AHBBAR1 (PKUNITY_PCIBRI_BASE + 0x0194) 67 - #define PCIBRI_AHBAMR1 (PKUNITY_PCIBRI_BASE + 0x0198) 68 - #define PCIBRI_AHBTAR1 (PKUNITY_PCIBRI_BASE + 0x019C) 69 - #define PCIBRI_AHBCTL2 (PKUNITY_PCIBRI_BASE + 0x01A0) 70 - #define PCIBRI_AHBBAR2 (PKUNITY_PCIBRI_BASE + 0x01A4) 71 - #define PCIBRI_AHBAMR2 (PKUNITY_PCIBRI_BASE + 0x01A8) 72 - #define PCIBRI_AHBTAR2 (PKUNITY_PCIBRI_BASE + 0x01AC) 73 - #define PCIBRI_AHBCTL3 (PKUNITY_PCIBRI_BASE + 0x01B0) 74 - #define PCIBRI_AHBBAR3 (PKUNITY_PCIBRI_BASE + 0x01B4) 75 - #define PCIBRI_AHBAMR3 (PKUNITY_PCIBRI_BASE + 0x01B8) 76 - #define PCIBRI_AHBTAR3 (PKUNITY_PCIBRI_BASE + 0x01BC) 77 - #define PCIBRI_AHBCTL4 (PKUNITY_PCIBRI_BASE + 0x01C0) 78 - #define PCIBRI_AHBBAR4 (PKUNITY_PCIBRI_BASE + 0x01C4) 79 - #define PCIBRI_AHBAMR4 (PKUNITY_PCIBRI_BASE + 0x01C8) 80 - #define PCIBRI_AHBTAR4 (PKUNITY_PCIBRI_BASE + 0x01CC) 81 - #define PCIBRI_AHBCTL5 (PKUNITY_PCIBRI_BASE + 0x01D0) 82 - #define PCIBRI_AHBBAR5 (PKUNITY_PCIBRI_BASE + 0x01D4) 83 - #define PCIBRI_AHBAMR5 (PKUNITY_PCIBRI_BASE + 0x01D8) 84 - #define PCIBRI_AHBTAR5 (PKUNITY_PCIBRI_BASE + 0x01DC) 85 - 86 - #define PCIBRI_CTLx_AT FIELD(1, 1, 2) 87 - #define PCIBRI_CTLx_PREF FIELD(1, 1, 1) 88 - #define PCIBRI_CTLx_MRL FIELD(1, 1, 0) 89 - 90 - #define PCIBRI_BARx_ADDR FIELD(0xFFFFFFFC, 30, 2) 91 - #define PCIBRI_BARx_IO FIELD(1, 1, 0) 92 - #define PCIBRI_BARx_MEM FIELD(0, 1, 0) 93 - 94 - #define PCIBRI_CMD_IO FIELD(1, 1, 0) 95 - #define PCIBRI_CMD_MEM FIELD(1, 1, 1)
-127
arch/unicore32/include/mach/regs-pm.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * PKUNITY Power Manager (PM) Registers 4 - */ 5 - /* 6 - * PM Control Reg PM_PMCR 7 - */ 8 - #define PM_PMCR (PKUNITY_PM_BASE + 0x0000) 9 - /* 10 - * PM General Conf. Reg PM_PGCR 11 - */ 12 - #define PM_PGCR (PKUNITY_PM_BASE + 0x0004) 13 - /* 14 - * PM PLL Conf. Reg PM_PPCR 15 - */ 16 - #define PM_PPCR (PKUNITY_PM_BASE + 0x0008) 17 - /* 18 - * PM Wakeup Enable Reg PM_PWER 19 - */ 20 - #define PM_PWER (PKUNITY_PM_BASE + 0x000C) 21 - /* 22 - * PM GPIO Sleep Status Reg PM_PGSR 23 - */ 24 - #define PM_PGSR (PKUNITY_PM_BASE + 0x0010) 25 - /* 26 - * PM Clock Gate Reg PM_PCGR 27 - */ 28 - #define PM_PCGR (PKUNITY_PM_BASE + 0x0014) 29 - /* 30 - * PM SYS PLL Conf. Reg PM_PLLSYSCFG 31 - */ 32 - #define PM_PLLSYSCFG (PKUNITY_PM_BASE + 0x0018) 33 - /* 34 - * PM DDR PLL Conf. Reg PM_PLLDDRCFG 35 - */ 36 - #define PM_PLLDDRCFG (PKUNITY_PM_BASE + 0x001C) 37 - /* 38 - * PM VGA PLL Conf. Reg PM_PLLVGACFG 39 - */ 40 - #define PM_PLLVGACFG (PKUNITY_PM_BASE + 0x0020) 41 - /* 42 - * PM Div Conf. Reg PM_DIVCFG 43 - */ 44 - #define PM_DIVCFG (PKUNITY_PM_BASE + 0x0024) 45 - /* 46 - * PM SYS PLL Status Reg PM_PLLSYSSTATUS 47 - */ 48 - #define PM_PLLSYSSTATUS (PKUNITY_PM_BASE + 0x0028) 49 - /* 50 - * PM DDR PLL Status Reg PM_PLLDDRSTATUS 51 - */ 52 - #define PM_PLLDDRSTATUS (PKUNITY_PM_BASE + 0x002C) 53 - /* 54 - * PM VGA PLL Status Reg PM_PLLVGASTATUS 55 - */ 56 - #define PM_PLLVGASTATUS (PKUNITY_PM_BASE + 0x0030) 57 - /* 58 - * PM Div Status Reg PM_DIVSTATUS 59 - */ 60 - #define PM_DIVSTATUS (PKUNITY_PM_BASE + 0x0034) 61 - /* 62 - * PM Software Reset Reg PM_SWRESET 63 - */ 64 - #define PM_SWRESET (PKUNITY_PM_BASE + 0x0038) 65 - /* 66 - * PM DDR2 PAD Start Reg PM_DDR2START 67 - */ 68 - #define PM_DDR2START (PKUNITY_PM_BASE + 0x003C) 69 - /* 70 - * PM DDR2 PAD Status Reg PM_DDR2CAL0 71 - */ 72 - #define PM_DDR2CAL0 (PKUNITY_PM_BASE + 0x0040) 73 - /* 74 - * PM PLL DFC Done Reg PM_PLLDFCDONE 75 - */ 76 - #define PM_PLLDFCDONE (PKUNITY_PM_BASE + 0x0044) 77 - 78 - #define PM_PMCR_SFB FIELD(1, 1, 0) 79 - #define PM_PMCR_IFB FIELD(1, 1, 1) 80 - #define PM_PMCR_CFBSYS FIELD(1, 1, 2) 81 - #define PM_PMCR_CFBDDR FIELD(1, 1, 3) 82 - #define PM_PMCR_CFBVGA FIELD(1, 1, 4) 83 - #define PM_PMCR_CFBDIVBCLK FIELD(1, 1, 5) 84 - 85 - /* 86 - * GPIO 8~27 wake-up enable PM_PWER_GPIOHIGH 87 - */ 88 - #define PM_PWER_GPIOHIGH FIELD(1, 1, 8) 89 - /* 90 - * RTC alarm wake-up enable PM_PWER_RTC 91 - */ 92 - #define PM_PWER_RTC FIELD(1, 1, 31) 93 - 94 - #define PM_PCGR_BCLK64DDR FIELD(1, 1, 0) 95 - #define PM_PCGR_BCLK64VGA FIELD(1, 1, 1) 96 - #define PM_PCGR_BCLKDDR FIELD(1, 1, 2) 97 - #define PM_PCGR_BCLKPCI FIELD(1, 1, 4) 98 - #define PM_PCGR_BCLKDMAC FIELD(1, 1, 5) 99 - #define PM_PCGR_BCLKUMAL FIELD(1, 1, 6) 100 - #define PM_PCGR_BCLKUSB FIELD(1, 1, 7) 101 - #define PM_PCGR_BCLKMME FIELD(1, 1, 10) 102 - #define PM_PCGR_BCLKNAND FIELD(1, 1, 11) 103 - #define PM_PCGR_BCLKH264E FIELD(1, 1, 12) 104 - #define PM_PCGR_BCLKVGA FIELD(1, 1, 13) 105 - #define PM_PCGR_BCLKH264D FIELD(1, 1, 14) 106 - #define PM_PCGR_VECLK FIELD(1, 1, 15) 107 - #define PM_PCGR_HECLK FIELD(1, 1, 16) 108 - #define PM_PCGR_HDCLK FIELD(1, 1, 17) 109 - #define PM_PCGR_NANDCLK FIELD(1, 1, 18) 110 - #define PM_PCGR_GECLK FIELD(1, 1, 19) 111 - #define PM_PCGR_VGACLK FIELD(1, 1, 20) 112 - #define PM_PCGR_PCICLK FIELD(1, 1, 21) 113 - #define PM_PCGR_SATACLK FIELD(1, 1, 25) 114 - 115 - /* 116 - * [23:20]PM_DIVCFG_VGACLK(v) 117 - */ 118 - #define PM_DIVCFG_VGACLK_MASK FMASK(4, 20) 119 - #define PM_DIVCFG_VGACLK(v) FIELD((v), 4, 20) 120 - 121 - #define PM_SWRESET_USB FIELD(1, 1, 6) 122 - #define PM_SWRESET_VGADIV FIELD(1, 1, 26) 123 - #define PM_SWRESET_GEDIV FIELD(1, 1, 27) 124 - 125 - #define PM_PLLDFCDONE_SYSDFC FIELD(1, 1, 0) 126 - #define PM_PLLDFCDONE_DDRDFC FIELD(1, 1, 1) 127 - #define PM_PLLDFCDONE_VGADFC FIELD(1, 1, 2)
-21
arch/unicore32/include/mach/regs-ps2.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * PKUnity PS2 Controller Registers 4 - */ 5 - /* 6 - * the same as I8042_DATA_REG PS2_DATA 7 - */ 8 - #define PS2_DATA (PKUNITY_PS2_BASE + 0x0060) 9 - /* 10 - * the same as I8042_COMMAND_REG PS2_COMMAND 11 - */ 12 - #define PS2_COMMAND (PKUNITY_PS2_BASE + 0x0064) 13 - /* 14 - * the same as I8042_STATUS_REG PS2_STATUS 15 - */ 16 - #define PS2_STATUS (PKUNITY_PS2_BASE + 0x0064) 17 - /* 18 - * counter reg PS2_CNT 19 - */ 20 - #define PS2_CNT (PKUNITY_PS2_BASE + 0x0068) 21 -
-35
arch/unicore32/include/mach/regs-resetc.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * PKUnity Reset Controller (RC) Registers 4 - */ 5 - /* 6 - * Software Reset Register 7 - */ 8 - #define RESETC_SWRR (PKUNITY_RESETC_BASE + 0x0000) 9 - /* 10 - * Reset Status Register 11 - */ 12 - #define RESETC_RSSR (PKUNITY_RESETC_BASE + 0x0004) 13 - 14 - /* 15 - * Software Reset Bit 16 - */ 17 - #define RESETC_SWRR_SRB FIELD(1, 1, 0) 18 - 19 - /* 20 - * Hardware Reset 21 - */ 22 - #define RESETC_RSSR_HWR FIELD(1, 1, 0) 23 - /* 24 - * Software Reset 25 - */ 26 - #define RESETC_RSSR_SWR FIELD(1, 1, 1) 27 - /* 28 - * Watchdog Reset 29 - */ 30 - #define RESETC_RSSR_WDR FIELD(1, 1, 2) 31 - /* 32 - * Sleep Mode Reset 33 - */ 34 - #define RESETC_RSSR_SMR FIELD(1, 1, 3) 35 -
-38
arch/unicore32/include/mach/regs-rtc.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * PKUnity Real-Time Clock (RTC) control registers 4 - */ 5 - /* 6 - * RTC Alarm Reg RTC_RTAR 7 - */ 8 - #define RTC_RTAR (PKUNITY_RTC_BASE + 0x0000) 9 - /* 10 - * RTC Count Reg RTC_RCNR 11 - */ 12 - #define RTC_RCNR (PKUNITY_RTC_BASE + 0x0004) 13 - /* 14 - * RTC Trim Reg RTC_RTTR 15 - */ 16 - #define RTC_RTTR (PKUNITY_RTC_BASE + 0x0008) 17 - /* 18 - * RTC Status Reg RTC_RTSR 19 - */ 20 - #define RTC_RTSR (PKUNITY_RTC_BASE + 0x0010) 21 - 22 - /* 23 - * ALarm detected RTC_RTSR_AL 24 - */ 25 - #define RTC_RTSR_AL FIELD(1, 1, 0) 26 - /* 27 - * 1 Hz clock detected RTC_RTSR_HZ 28 - */ 29 - #define RTC_RTSR_HZ FIELD(1, 1, 1) 30 - /* 31 - * ALarm interrupt Enable RTC_RTSR_ALE 32 - */ 33 - #define RTC_RTSR_ALE FIELD(1, 1, 2) 34 - /* 35 - * 1 Hz clock interrupt Enable RTC_RTSR_HZE 36 - */ 37 - #define RTC_RTSR_HZE FIELD(1, 1, 3) 38 -
-157
arch/unicore32/include/mach/regs-sdc.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * PKUnity Multi-Media Card and Security Digital Card (MMC/SD) Registers 4 - */ 5 - /* 6 - * Clock Control Reg SDC_CCR 7 - */ 8 - #define SDC_CCR (PKUNITY_SDC_BASE + 0x0000) 9 - /* 10 - * Software Reset Reg SDC_SRR 11 - */ 12 - #define SDC_SRR (PKUNITY_SDC_BASE + 0x0004) 13 - /* 14 - * Argument Reg SDC_ARGUMENT 15 - */ 16 - #define SDC_ARGUMENT (PKUNITY_SDC_BASE + 0x0008) 17 - /* 18 - * Command Reg SDC_COMMAND 19 - */ 20 - #define SDC_COMMAND (PKUNITY_SDC_BASE + 0x000C) 21 - /* 22 - * Block Size Reg SDC_BLOCKSIZE 23 - */ 24 - #define SDC_BLOCKSIZE (PKUNITY_SDC_BASE + 0x0010) 25 - /* 26 - * Block Cound Reg SDC_BLOCKCOUNT 27 - */ 28 - #define SDC_BLOCKCOUNT (PKUNITY_SDC_BASE + 0x0014) 29 - /* 30 - * Transfer Mode Reg SDC_TMR 31 - */ 32 - #define SDC_TMR (PKUNITY_SDC_BASE + 0x0018) 33 - /* 34 - * Response Reg. 0 SDC_RES0 35 - */ 36 - #define SDC_RES0 (PKUNITY_SDC_BASE + 0x001C) 37 - /* 38 - * Response Reg. 1 SDC_RES1 39 - */ 40 - #define SDC_RES1 (PKUNITY_SDC_BASE + 0x0020) 41 - /* 42 - * Response Reg. 2 SDC_RES2 43 - */ 44 - #define SDC_RES2 (PKUNITY_SDC_BASE + 0x0024) 45 - /* 46 - * Response Reg. 3 SDC_RES3 47 - */ 48 - #define SDC_RES3 (PKUNITY_SDC_BASE + 0x0028) 49 - /* 50 - * Read Timeout Control Reg SDC_RTCR 51 - */ 52 - #define SDC_RTCR (PKUNITY_SDC_BASE + 0x002C) 53 - /* 54 - * Interrupt Status Reg SDC_ISR 55 - */ 56 - #define SDC_ISR (PKUNITY_SDC_BASE + 0x0030) 57 - /* 58 - * Interrupt Status Mask Reg SDC_ISMR 59 - */ 60 - #define SDC_ISMR (PKUNITY_SDC_BASE + 0x0034) 61 - /* 62 - * RX FIFO SDC_RXFIFO 63 - */ 64 - #define SDC_RXFIFO (PKUNITY_SDC_BASE + 0x0038) 65 - /* 66 - * TX FIFO SDC_TXFIFO 67 - */ 68 - #define SDC_TXFIFO (PKUNITY_SDC_BASE + 0x003C) 69 - 70 - /* 71 - * SD Clock Enable SDC_CCR_CLKEN 72 - */ 73 - #define SDC_CCR_CLKEN FIELD(1, 1, 2) 74 - /* 75 - * [15:8] SDC_CCR_PDIV(v) 76 - */ 77 - #define SDC_CCR_PDIV(v) FIELD((v), 8, 8) 78 - 79 - /* 80 - * Software reset enable SDC_SRR_ENABLE 81 - */ 82 - #define SDC_SRR_ENABLE FIELD(0, 1, 0) 83 - /* 84 - * Software reset disable SDC_SRR_DISABLE 85 - */ 86 - #define SDC_SRR_DISABLE FIELD(1, 1, 0) 87 - 88 - /* 89 - * Response type SDC_COMMAND_RESTYPE_MASK 90 - */ 91 - #define SDC_COMMAND_RESTYPE_MASK FMASK(2, 0) 92 - /* 93 - * No response SDC_COMMAND_RESTYPE_NONE 94 - */ 95 - #define SDC_COMMAND_RESTYPE_NONE FIELD(0, 2, 0) 96 - /* 97 - * 136-bit long response SDC_COMMAND_RESTYPE_LONG 98 - */ 99 - #define SDC_COMMAND_RESTYPE_LONG FIELD(1, 2, 0) 100 - /* 101 - * 48-bit short response SDC_COMMAND_RESTYPE_SHORT 102 - */ 103 - #define SDC_COMMAND_RESTYPE_SHORT FIELD(2, 2, 0) 104 - /* 105 - * 48-bit short and test if busy response SDC_COMMAND_RESTYPE_SHORTBUSY 106 - */ 107 - #define SDC_COMMAND_RESTYPE_SHORTBUSY FIELD(3, 2, 0) 108 - /* 109 - * data ready SDC_COMMAND_DATAREADY 110 - */ 111 - #define SDC_COMMAND_DATAREADY FIELD(1, 1, 2) 112 - #define SDC_COMMAND_CMDEN FIELD(1, 1, 3) 113 - /* 114 - * [10:5] SDC_COMMAND_CMDINDEX(v) 115 - */ 116 - #define SDC_COMMAND_CMDINDEX(v) FIELD((v), 6, 5) 117 - 118 - /* 119 - * [10:0] SDC_BLOCKSIZE_BSMASK(v) 120 - */ 121 - #define SDC_BLOCKSIZE_BSMASK(v) FIELD((v), 11, 0) 122 - /* 123 - * [11:0] SDC_BLOCKCOUNT_BCMASK(v) 124 - */ 125 - #define SDC_BLOCKCOUNT_BCMASK(v) FIELD((v), 12, 0) 126 - 127 - /* 128 - * Data Width 1bit SDC_TMR_WTH_1BIT 129 - */ 130 - #define SDC_TMR_WTH_1BIT FIELD(0, 1, 0) 131 - /* 132 - * Data Width 4bit SDC_TMR_WTH_4BIT 133 - */ 134 - #define SDC_TMR_WTH_4BIT FIELD(1, 1, 0) 135 - /* 136 - * Read SDC_TMR_DIR_READ 137 - */ 138 - #define SDC_TMR_DIR_READ FIELD(0, 1, 1) 139 - /* 140 - * Write SDC_TMR_DIR_WRITE 141 - */ 142 - #define SDC_TMR_DIR_WRITE FIELD(1, 1, 1) 143 - 144 - #define SDC_IR_MASK FMASK(13, 0) 145 - #define SDC_IR_RESTIMEOUT FIELD(1, 1, 0) 146 - #define SDC_IR_WRITECRC FIELD(1, 1, 1) 147 - #define SDC_IR_READCRC FIELD(1, 1, 2) 148 - #define SDC_IR_TXFIFOREAD FIELD(1, 1, 3) 149 - #define SDC_IR_RXFIFOWRITE FIELD(1, 1, 4) 150 - #define SDC_IR_READTIMEOUT FIELD(1, 1, 5) 151 - #define SDC_IR_DATACOMPLETE FIELD(1, 1, 6) 152 - #define SDC_IR_CMDCOMPLETE FIELD(1, 1, 7) 153 - #define SDC_IR_RXFIFOFULL FIELD(1, 1, 8) 154 - #define SDC_IR_RXFIFOEMPTY FIELD(1, 1, 9) 155 - #define SDC_IR_TXFIFOFULL FIELD(1, 1, 10) 156 - #define SDC_IR_TXFIFOEMPTY FIELD(1, 1, 11) 157 - #define SDC_IR_ENDCMDWITHRES FIELD(1, 1, 12)
-99
arch/unicore32/include/mach/regs-spi.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * PKUnity Serial Peripheral Interface (SPI) Registers 4 - */ 5 - /* 6 - * Control reg. 0 SPI_CR0 7 - */ 8 - #define SPI_CR0 (PKUNITY_SPI_BASE + 0x0000) 9 - /* 10 - * Control reg. 1 SPI_CR1 11 - */ 12 - #define SPI_CR1 (PKUNITY_SPI_BASE + 0x0004) 13 - /* 14 - * Enable reg SPI_SSIENR 15 - */ 16 - #define SPI_SSIENR (PKUNITY_SPI_BASE + 0x0008) 17 - /* 18 - * Status reg SPI_SR 19 - */ 20 - #define SPI_SR (PKUNITY_SPI_BASE + 0x0028) 21 - /* 22 - * Interrupt Mask reg SPI_IMR 23 - */ 24 - #define SPI_IMR (PKUNITY_SPI_BASE + 0x002C) 25 - /* 26 - * Interrupt Status reg SPI_ISR 27 - */ 28 - #define SPI_ISR (PKUNITY_SPI_BASE + 0x0030) 29 - 30 - /* 31 - * Enable SPI Controller SPI_SSIENR_EN 32 - */ 33 - #define SPI_SSIENR_EN FIELD(1, 1, 0) 34 - 35 - /* 36 - * SPI Busy SPI_SR_BUSY 37 - */ 38 - #define SPI_SR_BUSY FIELD(1, 1, 0) 39 - /* 40 - * Transmit FIFO Not Full SPI_SR_TFNF 41 - */ 42 - #define SPI_SR_TFNF FIELD(1, 1, 1) 43 - /* 44 - * Transmit FIFO Empty SPI_SR_TFE 45 - */ 46 - #define SPI_SR_TFE FIELD(1, 1, 2) 47 - /* 48 - * Receive FIFO Not Empty SPI_SR_RFNE 49 - */ 50 - #define SPI_SR_RFNE FIELD(1, 1, 3) 51 - /* 52 - * Receive FIFO Full SPI_SR_RFF 53 - */ 54 - #define SPI_SR_RFF FIELD(1, 1, 4) 55 - 56 - /* 57 - * Trans. FIFO Empty Interrupt Status SPI_ISR_TXEIS 58 - */ 59 - #define SPI_ISR_TXEIS FIELD(1, 1, 0) 60 - /* 61 - * Trans. FIFO Overflow Interrupt Status SPI_ISR_TXOIS 62 - */ 63 - #define SPI_ISR_TXOIS FIELD(1, 1, 1) 64 - /* 65 - * Receiv. FIFO Underflow Interrupt Status SPI_ISR_RXUIS 66 - */ 67 - #define SPI_ISR_RXUIS FIELD(1, 1, 2) 68 - /* 69 - * Receiv. FIFO Overflow Interrupt Status SPI_ISR_RXOIS 70 - */ 71 - #define SPI_ISR_RXOIS FIELD(1, 1, 3) 72 - /* 73 - * Receiv. FIFO Full Interrupt Status SPI_ISR_RXFIS 74 - */ 75 - #define SPI_ISR_RXFIS FIELD(1, 1, 4) 76 - #define SPI_ISR_MSTIS FIELD(1, 1, 5) 77 - 78 - /* 79 - * Trans. FIFO Empty Interrupt Mask SPI_IMR_TXEIM 80 - */ 81 - #define SPI_IMR_TXEIM FIELD(1, 1, 0) 82 - /* 83 - * Trans. FIFO Overflow Interrupt Mask SPI_IMR_TXOIM 84 - */ 85 - #define SPI_IMR_TXOIM FIELD(1, 1, 1) 86 - /* 87 - * Receiv. FIFO Underflow Interrupt Mask SPI_IMR_RXUIM 88 - */ 89 - #define SPI_IMR_RXUIM FIELD(1, 1, 2) 90 - /* 91 - * Receiv. FIFO Overflow Interrupt Mask SPI_IMR_RXOIM 92 - */ 93 - #define SPI_IMR_RXOIM FIELD(1, 1, 3) 94 - /* 95 - * Receiv. FIFO Full Interrupt Mask SPI_IMR_RXFIM 96 - */ 97 - #define SPI_IMR_RXFIM FIELD(1, 1, 4) 98 - #define SPI_IMR_MSTIM FIELD(1, 1, 5) 99 -
-3
arch/unicore32/include/mach/regs-uart.h
··· 1 - /* 2 - * PKUnity Universal Asynchronous Receiver/Transmitter (UART) Registers 3 - */
-230
arch/unicore32/include/mach/regs-umal.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * PKUnity Ultra Media Access Layer (UMAL) Ethernet MAC Registers 4 - */ 5 - 6 - /* MAC module of UMAL */ 7 - /* UMAL's MAC module includes G/MII interface, several additional PHY 8 - * interfaces, and MAC control sub-layer, which provides support for control 9 - * frames (e.g. PAUSE frames). 10 - */ 11 - /* 12 - * TX/RX reset and control UMAL_CFG1 13 - */ 14 - #define UMAL_CFG1 (PKUNITY_UMAL_BASE + 0x0000) 15 - /* 16 - * MAC interface mode control UMAL_CFG2 17 - */ 18 - #define UMAL_CFG2 (PKUNITY_UMAL_BASE + 0x0004) 19 - /* 20 - * Inter Packet/Frame Gap UMAL_IPGIFG 21 - */ 22 - #define UMAL_IPGIFG (PKUNITY_UMAL_BASE + 0x0008) 23 - /* 24 - * Collision retry or backoff UMAL_HALFDUPLEX 25 - */ 26 - #define UMAL_HALFDUPLEX (PKUNITY_UMAL_BASE + 0x000c) 27 - /* 28 - * Maximum Frame Length UMAL_MAXFRAME 29 - */ 30 - #define UMAL_MAXFRAME (PKUNITY_UMAL_BASE + 0x0010) 31 - /* 32 - * Test Regsiter UMAL_TESTREG 33 - */ 34 - #define UMAL_TESTREG (PKUNITY_UMAL_BASE + 0x001c) 35 - /* 36 - * MII Management Configure UMAL_MIICFG 37 - */ 38 - #define UMAL_MIICFG (PKUNITY_UMAL_BASE + 0x0020) 39 - /* 40 - * MII Management Command UMAL_MIICMD 41 - */ 42 - #define UMAL_MIICMD (PKUNITY_UMAL_BASE + 0x0024) 43 - /* 44 - * MII Management Address UMAL_MIIADDR 45 - */ 46 - #define UMAL_MIIADDR (PKUNITY_UMAL_BASE + 0x0028) 47 - /* 48 - * MII Management Control UMAL_MIICTRL 49 - */ 50 - #define UMAL_MIICTRL (PKUNITY_UMAL_BASE + 0x002c) 51 - /* 52 - * MII Management Status UMAL_MIISTATUS 53 - */ 54 - #define UMAL_MIISTATUS (PKUNITY_UMAL_BASE + 0x0030) 55 - /* 56 - * MII Management Indicator UMAL_MIIIDCT 57 - */ 58 - #define UMAL_MIIIDCT (PKUNITY_UMAL_BASE + 0x0034) 59 - /* 60 - * Interface Control UMAL_IFCTRL 61 - */ 62 - #define UMAL_IFCTRL (PKUNITY_UMAL_BASE + 0x0038) 63 - /* 64 - * Interface Status UMAL_IFSTATUS 65 - */ 66 - #define UMAL_IFSTATUS (PKUNITY_UMAL_BASE + 0x003c) 67 - /* 68 - * MAC address (high 4 bytes) UMAL_STADDR1 69 - */ 70 - #define UMAL_STADDR1 (PKUNITY_UMAL_BASE + 0x0040) 71 - /* 72 - * MAC address (low 2 bytes) UMAL_STADDR2 73 - */ 74 - #define UMAL_STADDR2 (PKUNITY_UMAL_BASE + 0x0044) 75 - 76 - /* FIFO MODULE OF UMAL */ 77 - /* UMAL's FIFO module provides data queuing for increased system level 78 - * throughput 79 - */ 80 - #define UMAL_FIFOCFG0 (PKUNITY_UMAL_BASE + 0x0048) 81 - #define UMAL_FIFOCFG1 (PKUNITY_UMAL_BASE + 0x004c) 82 - #define UMAL_FIFOCFG2 (PKUNITY_UMAL_BASE + 0x0050) 83 - #define UMAL_FIFOCFG3 (PKUNITY_UMAL_BASE + 0x0054) 84 - #define UMAL_FIFOCFG4 (PKUNITY_UMAL_BASE + 0x0058) 85 - #define UMAL_FIFOCFG5 (PKUNITY_UMAL_BASE + 0x005c) 86 - #define UMAL_FIFORAM0 (PKUNITY_UMAL_BASE + 0x0060) 87 - #define UMAL_FIFORAM1 (PKUNITY_UMAL_BASE + 0x0064) 88 - #define UMAL_FIFORAM2 (PKUNITY_UMAL_BASE + 0x0068) 89 - #define UMAL_FIFORAM3 (PKUNITY_UMAL_BASE + 0x006c) 90 - #define UMAL_FIFORAM4 (PKUNITY_UMAL_BASE + 0x0070) 91 - #define UMAL_FIFORAM5 (PKUNITY_UMAL_BASE + 0x0074) 92 - #define UMAL_FIFORAM6 (PKUNITY_UMAL_BASE + 0x0078) 93 - #define UMAL_FIFORAM7 (PKUNITY_UMAL_BASE + 0x007c) 94 - 95 - /* MAHBE MODULE OF UMAL */ 96 - /* UMAL's MAHBE module interfaces to the host system through 32-bit AHB Master 97 - * and Slave ports.Registers within the M-AHBE provide Control and Status 98 - * information concerning these transfers. 99 - */ 100 - /* 101 - * Transmit Control UMAL_DMATxCtrl 102 - */ 103 - #define UMAL_DMATxCtrl (PKUNITY_UMAL_BASE + 0x0180) 104 - /* 105 - * Pointer to TX Descripter UMAL_DMATxDescriptor 106 - */ 107 - #define UMAL_DMATxDescriptor (PKUNITY_UMAL_BASE + 0x0184) 108 - /* 109 - * Status of Tx Packet Transfers UMAL_DMATxStatus 110 - */ 111 - #define UMAL_DMATxStatus (PKUNITY_UMAL_BASE + 0x0188) 112 - /* 113 - * Receive Control UMAL_DMARxCtrl 114 - */ 115 - #define UMAL_DMARxCtrl (PKUNITY_UMAL_BASE + 0x018c) 116 - /* 117 - * Pointer to Rx Descriptor UMAL_DMARxDescriptor 118 - */ 119 - #define UMAL_DMARxDescriptor (PKUNITY_UMAL_BASE + 0x0190) 120 - /* 121 - * Status of Rx Packet Transfers UMAL_DMARxStatus 122 - */ 123 - #define UMAL_DMARxStatus (PKUNITY_UMAL_BASE + 0x0194) 124 - /* 125 - * Interrupt Mask UMAL_DMAIntrMask 126 - */ 127 - #define UMAL_DMAIntrMask (PKUNITY_UMAL_BASE + 0x0198) 128 - /* 129 - * Interrupts, read only UMAL_DMAInterrupt 130 - */ 131 - #define UMAL_DMAInterrupt (PKUNITY_UMAL_BASE + 0x019c) 132 - 133 - /* 134 - * Commands for UMAL_CFG1 register 135 - */ 136 - #define UMAL_CFG1_TXENABLE FIELD(1, 1, 0) 137 - #define UMAL_CFG1_RXENABLE FIELD(1, 1, 2) 138 - #define UMAL_CFG1_TXFLOWCTL FIELD(1, 1, 4) 139 - #define UMAL_CFG1_RXFLOWCTL FIELD(1, 1, 5) 140 - #define UMAL_CFG1_CONFLPBK FIELD(1, 1, 8) 141 - #define UMAL_CFG1_RESET FIELD(1, 1, 31) 142 - #define UMAL_CFG1_CONFFLCTL (MAC_TX_FLOW_CTL | MAC_RX_FLOW_CTL) 143 - 144 - /* 145 - * Commands for UMAL_CFG2 register 146 - */ 147 - #define UMAL_CFG2_FULLDUPLEX FIELD(1, 1, 0) 148 - #define UMAL_CFG2_CRCENABLE FIELD(1, 1, 1) 149 - #define UMAL_CFG2_PADCRC FIELD(1, 1, 2) 150 - #define UMAL_CFG2_LENGTHCHECK FIELD(1, 1, 4) 151 - #define UMAL_CFG2_MODEMASK FMASK(2, 8) 152 - #define UMAL_CFG2_NIBBLEMODE FIELD(1, 2, 8) 153 - #define UMAL_CFG2_BYTEMODE FIELD(2, 2, 8) 154 - #define UMAL_CFG2_PREAMBLENMASK FMASK(4, 12) 155 - #define UMAL_CFG2_DEFPREAMBLEN FIELD(7, 4, 12) 156 - #define UMAL_CFG2_FD100 (UMAL_CFG2_DEFPREAMBLEN | UMAL_CFG2_NIBBLEMODE \ 157 - | UMAL_CFG2_LENGTHCHECK | UMAL_CFG2_PADCRC \ 158 - | UMAL_CFG2_CRCENABLE | UMAL_CFG2_FULLDUPLEX) 159 - #define UMAL_CFG2_FD1000 (UMAL_CFG2_DEFPREAMBLEN | UMAL_CFG2_BYTEMODE \ 160 - | UMAL_CFG2_LENGTHCHECK | UMAL_CFG2_PADCRC \ 161 - | UMAL_CFG2_CRCENABLE | UMAL_CFG2_FULLDUPLEX) 162 - #define UMAL_CFG2_HD100 (UMAL_CFG2_DEFPREAMBLEN | UMAL_CFG2_NIBBLEMODE \ 163 - | UMAL_CFG2_LENGTHCHECK | UMAL_CFG2_PADCRC \ 164 - | UMAL_CFG2_CRCENABLE) 165 - 166 - /* 167 - * Command for UMAL_IFCTRL register 168 - */ 169 - #define UMAL_IFCTRL_RESET FIELD(1, 1, 31) 170 - 171 - /* 172 - * Command for UMAL_MIICFG register 173 - */ 174 - #define UMAL_MIICFG_RESET FIELD(1, 1, 31) 175 - 176 - /* 177 - * Command for UMAL_MIICMD register 178 - */ 179 - #define UMAL_MIICMD_READ FIELD(1, 1, 0) 180 - 181 - /* 182 - * Command for UMAL_MIIIDCT register 183 - */ 184 - #define UMAL_MIIIDCT_BUSY FIELD(1, 1, 0) 185 - #define UMAL_MIIIDCT_NOTVALID FIELD(1, 1, 2) 186 - 187 - /* 188 - * Commands for DMATxCtrl regesters 189 - */ 190 - #define UMAL_DMA_Enable FIELD(1, 1, 0) 191 - 192 - /* 193 - * Commands for DMARxCtrl regesters 194 - */ 195 - #define UMAL_DMAIntrMask_ENABLEHALFWORD FIELD(1, 1, 16) 196 - 197 - /* 198 - * Command for DMARxStatus 199 - */ 200 - #define CLR_RX_BUS_ERR FIELD(1, 1, 3) 201 - #define CLR_RX_OVERFLOW FIELD(1, 1, 2) 202 - #define CLR_RX_PKT FIELD(1, 1, 0) 203 - 204 - /* 205 - * Command for DMATxStatus 206 - */ 207 - #define CLR_TX_BUS_ERR FIELD(1, 1, 3) 208 - #define CLR_TX_UNDERRUN FIELD(1, 1, 1) 209 - #define CLR_TX_PKT FIELD(1, 1, 0) 210 - 211 - /* 212 - * Commands for DMAIntrMask and DMAInterrupt register 213 - */ 214 - #define INT_RX_MASK FIELD(0xd, 4, 4) 215 - #define INT_TX_MASK FIELD(0xb, 4, 0) 216 - 217 - #define INT_RX_BUS_ERR FIELD(1, 1, 7) 218 - #define INT_RX_OVERFLOW FIELD(1, 1, 6) 219 - #define INT_RX_PKT FIELD(1, 1, 4) 220 - #define INT_TX_BUS_ERR FIELD(1, 1, 3) 221 - #define INT_TX_UNDERRUN FIELD(1, 1, 1) 222 - #define INT_TX_PKT FIELD(1, 1, 0) 223 - 224 - /* 225 - * MARCOS of UMAL's descriptors 226 - */ 227 - #define UMAL_DESC_PACKETSIZE_EMPTY FIELD(1, 1, 31) 228 - #define UMAL_DESC_PACKETSIZE_NONEMPTY FIELD(0, 1, 31) 229 - #define UMAL_DESC_PACKETSIZE_SIZEMASK FMASK(12, 0) 230 -
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arch/unicore32/include/mach/regs-unigfx.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * PKUnity UNIGFX Registers 4 - */ 5 - 6 - #define UDE_BASE (PKUNITY_UNIGFX_BASE + 0x1400) 7 - #define UGE_BASE (PKUNITY_UNIGFX_BASE + 0x0000) 8 - 9 - /* 10 - * command reg for UNIGFX DE 11 - */ 12 - /* 13 - * control reg UDE_CFG 14 - */ 15 - #define UDE_CFG (UDE_BASE + 0x0000) 16 - /* 17 - * framebuffer start address reg UDE_FSA 18 - */ 19 - #define UDE_FSA (UDE_BASE + 0x0004) 20 - /* 21 - * line size reg UDE_LS 22 - */ 23 - #define UDE_LS (UDE_BASE + 0x0008) 24 - /* 25 - * pitch size reg UDE_PS 26 - */ 27 - #define UDE_PS (UDE_BASE + 0x000C) 28 - /* 29 - * horizontal active time reg UDE_HAT 30 - */ 31 - #define UDE_HAT (UDE_BASE + 0x0010) 32 - /* 33 - * horizontal blank time reg UDE_HBT 34 - */ 35 - #define UDE_HBT (UDE_BASE + 0x0014) 36 - /* 37 - * horizontal sync time reg UDE_HST 38 - */ 39 - #define UDE_HST (UDE_BASE + 0x0018) 40 - /* 41 - * vertival active time reg UDE_VAT 42 - */ 43 - #define UDE_VAT (UDE_BASE + 0x001C) 44 - /* 45 - * vertival blank time reg UDE_VBT 46 - */ 47 - #define UDE_VBT (UDE_BASE + 0x0020) 48 - /* 49 - * vertival sync time reg UDE_VST 50 - */ 51 - #define UDE_VST (UDE_BASE + 0x0024) 52 - /* 53 - * cursor position UDE_CXY 54 - */ 55 - #define UDE_CXY (UDE_BASE + 0x0028) 56 - /* 57 - * cursor front color UDE_CC0 58 - */ 59 - #define UDE_CC0 (UDE_BASE + 0x002C) 60 - /* 61 - * cursor background color UDE_CC1 62 - */ 63 - #define UDE_CC1 (UDE_BASE + 0x0030) 64 - /* 65 - * video position UDE_VXY 66 - */ 67 - #define UDE_VXY (UDE_BASE + 0x0034) 68 - /* 69 - * video start address reg UDE_VSA 70 - */ 71 - #define UDE_VSA (UDE_BASE + 0x0040) 72 - /* 73 - * video size reg UDE_VS 74 - */ 75 - #define UDE_VS (UDE_BASE + 0x004C) 76 - 77 - /* 78 - * command reg for UNIGFX GE 79 - */ 80 - /* 81 - * src xy reg UGE_SRCXY 82 - */ 83 - #define UGE_SRCXY (UGE_BASE + 0x0000) 84 - /* 85 - * dst xy reg UGE_DSTXY 86 - */ 87 - #define UGE_DSTXY (UGE_BASE + 0x0004) 88 - /* 89 - * pitch reg UGE_PITCH 90 - */ 91 - #define UGE_PITCH (UGE_BASE + 0x0008) 92 - /* 93 - * src start reg UGE_SRCSTART 94 - */ 95 - #define UGE_SRCSTART (UGE_BASE + 0x000C) 96 - /* 97 - * dst start reg UGE_DSTSTART 98 - */ 99 - #define UGE_DSTSTART (UGE_BASE + 0x0010) 100 - /* 101 - * width height reg UGE_WIDHEIGHT 102 - */ 103 - #define UGE_WIDHEIGHT (UGE_BASE + 0x0014) 104 - /* 105 - * rop alpah reg UGE_ROPALPHA 106 - */ 107 - #define UGE_ROPALPHA (UGE_BASE + 0x0018) 108 - /* 109 - * front color UGE_FCOLOR 110 - */ 111 - #define UGE_FCOLOR (UGE_BASE + 0x001C) 112 - /* 113 - * background color UGE_BCOLOR 114 - */ 115 - #define UGE_BCOLOR (UGE_BASE + 0x0020) 116 - /* 117 - * src color key for high value UGE_SCH 118 - */ 119 - #define UGE_SCH (UGE_BASE + 0x0024) 120 - /* 121 - * dst color key for high value UGE_DCH 122 - */ 123 - #define UGE_DCH (UGE_BASE + 0x0028) 124 - /* 125 - * src color key for low value UGE_SCL 126 - */ 127 - #define UGE_SCL (UGE_BASE + 0x002C) 128 - /* 129 - * dst color key for low value UGE_DCL 130 - */ 131 - #define UGE_DCL (UGE_BASE + 0x0030) 132 - /* 133 - * clip 0 reg UGE_CLIP0 134 - */ 135 - #define UGE_CLIP0 (UGE_BASE + 0x0034) 136 - /* 137 - * clip 1 reg UGE_CLIP1 138 - */ 139 - #define UGE_CLIP1 (UGE_BASE + 0x0038) 140 - /* 141 - * command reg UGE_COMMAND 142 - */ 143 - #define UGE_COMMAND (UGE_BASE + 0x003C) 144 - /* 145 - * pattern 0 UGE_P0 146 - */ 147 - #define UGE_P0 (UGE_BASE + 0x0040) 148 - #define UGE_P1 (UGE_BASE + 0x0044) 149 - #define UGE_P2 (UGE_BASE + 0x0048) 150 - #define UGE_P3 (UGE_BASE + 0x004C) 151 - #define UGE_P4 (UGE_BASE + 0x0050) 152 - #define UGE_P5 (UGE_BASE + 0x0054) 153 - #define UGE_P6 (UGE_BASE + 0x0058) 154 - #define UGE_P7 (UGE_BASE + 0x005C) 155 - #define UGE_P8 (UGE_BASE + 0x0060) 156 - #define UGE_P9 (UGE_BASE + 0x0064) 157 - #define UGE_P10 (UGE_BASE + 0x0068) 158 - #define UGE_P11 (UGE_BASE + 0x006C) 159 - #define UGE_P12 (UGE_BASE + 0x0070) 160 - #define UGE_P13 (UGE_BASE + 0x0074) 161 - #define UGE_P14 (UGE_BASE + 0x0078) 162 - #define UGE_P15 (UGE_BASE + 0x007C) 163 - #define UGE_P16 (UGE_BASE + 0x0080) 164 - #define UGE_P17 (UGE_BASE + 0x0084) 165 - #define UGE_P18 (UGE_BASE + 0x0088) 166 - #define UGE_P19 (UGE_BASE + 0x008C) 167 - #define UGE_P20 (UGE_BASE + 0x0090) 168 - #define UGE_P21 (UGE_BASE + 0x0094) 169 - #define UGE_P22 (UGE_BASE + 0x0098) 170 - #define UGE_P23 (UGE_BASE + 0x009C) 171 - #define UGE_P24 (UGE_BASE + 0x00A0) 172 - #define UGE_P25 (UGE_BASE + 0x00A4) 173 - #define UGE_P26 (UGE_BASE + 0x00A8) 174 - #define UGE_P27 (UGE_BASE + 0x00AC) 175 - #define UGE_P28 (UGE_BASE + 0x00B0) 176 - #define UGE_P29 (UGE_BASE + 0x00B4) 177 - #define UGE_P30 (UGE_BASE + 0x00B8) 178 - #define UGE_P31 (UGE_BASE + 0x00BC) 179 - 180 - #define UDE_CFG_DST_MASK FMASK(2, 8) 181 - #define UDE_CFG_DST8 FIELD(0x0, 2, 8) 182 - #define UDE_CFG_DST16 FIELD(0x1, 2, 8) 183 - #define UDE_CFG_DST24 FIELD(0x2, 2, 8) 184 - #define UDE_CFG_DST32 FIELD(0x3, 2, 8) 185 - 186 - /* 187 - * GDEN enable UDE_CFG_GDEN_ENABLE 188 - */ 189 - #define UDE_CFG_GDEN_ENABLE FIELD(1, 1, 3) 190 - /* 191 - * VDEN enable UDE_CFG_VDEN_ENABLE 192 - */ 193 - #define UDE_CFG_VDEN_ENABLE FIELD(1, 1, 4) 194 - /* 195 - * CDEN enable UDE_CFG_CDEN_ENABLE 196 - */ 197 - #define UDE_CFG_CDEN_ENABLE FIELD(1, 1, 5) 198 - /* 199 - * TIMEUP enable UDE_CFG_TIMEUP_ENABLE 200 - */ 201 - #define UDE_CFG_TIMEUP_ENABLE FIELD(1, 1, 6)
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arch/unicore32/include/mach/uncompress.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/include/mach/uncompress.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - #ifndef __MACH_PUV3_UNCOMPRESS_H__ 11 - #define __MACH_PUV3_UNCOMPRESS_H__ 12 - 13 - #include <mach/hardware.h> 14 - #include <mach/ocd.h> 15 - 16 - extern char input_data[]; 17 - extern char input_data_end[]; 18 - 19 - static void arch_decomp_puts(const char *ptr) 20 - { 21 - char c; 22 - 23 - while ((c = *ptr++) != '\0') { 24 - if (c == '\n') 25 - putc('\r'); 26 - putc(c); 27 - } 28 - } 29 - #define ARCH_HAVE_DECOMP_PUTS 30 - 31 - #endif /* __MACH_PUV3_UNCOMPRESS_H__ */
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arch/unicore32/include/uapi/asm/Kbuild
··· 1 - # SPDX-License-Identifier: GPL-2.0 2 - generic-y += ucontext.h
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arch/unicore32/include/uapi/asm/byteorder.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 - /* 3 - * linux/arch/unicore32/include/asm/byteorder.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * This program is free software; you can redistribute it and/or modify 10 - * it under the terms of the GNU General Public License version 2 as 11 - * published by the Free Software Foundation. 12 - * 13 - * UniCore ONLY support Little Endian mode, the data bus is connected such 14 - * that byte accesses appear as: 15 - * 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31 16 - * and word accesses (data or instruction) appear as: 17 - * d0...d31 18 - */ 19 - #ifndef __UNICORE_BYTEORDER_H__ 20 - #define __UNICORE_BYTEORDER_H__ 21 - 22 - #include <linux/byteorder/little_endian.h> 23 - 24 - #endif 25 -
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arch/unicore32/include/uapi/asm/ptrace.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 - /* 3 - * linux/arch/unicore32/include/asm/ptrace.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * This program is free software; you can redistribute it and/or modify 10 - * it under the terms of the GNU General Public License version 2 as 11 - * published by the Free Software Foundation. 12 - */ 13 - #ifndef _UAPI__UNICORE_PTRACE_H__ 14 - #define _UAPI__UNICORE_PTRACE_H__ 15 - 16 - #define PTRACE_GET_THREAD_AREA 22 17 - 18 - /* 19 - * PSR bits 20 - */ 21 - #define USER_MODE 0x00000010 22 - #define REAL_MODE 0x00000011 23 - #define INTR_MODE 0x00000012 24 - #define PRIV_MODE 0x00000013 25 - #define ABRT_MODE 0x00000017 26 - #define EXTN_MODE 0x0000001b 27 - #define SUSR_MODE 0x0000001f 28 - #define MODE_MASK 0x0000001f 29 - #define PSR_R_BIT 0x00000040 30 - #define PSR_I_BIT 0x00000080 31 - #define PSR_V_BIT 0x10000000 32 - #define PSR_C_BIT 0x20000000 33 - #define PSR_Z_BIT 0x40000000 34 - #define PSR_S_BIT 0x80000000 35 - 36 - /* 37 - * Groups of PSR bits 38 - */ 39 - #define PSR_f 0xff000000 /* Flags */ 40 - #define PSR_c 0x000000ff /* Control */ 41 - 42 - #ifndef __ASSEMBLY__ 43 - 44 - /* 45 - * This struct defines the way the registers are stored on the 46 - * stack during a system call. Note that sizeof(struct pt_regs) 47 - * has to be a multiple of 8. 48 - */ 49 - struct pt_regs { 50 - unsigned long uregs[34]; 51 - }; 52 - 53 - #define UCreg_asr uregs[32] 54 - #define UCreg_pc uregs[31] 55 - #define UCreg_lr uregs[30] 56 - #define UCreg_sp uregs[29] 57 - #define UCreg_ip uregs[28] 58 - #define UCreg_fp uregs[27] 59 - #define UCreg_26 uregs[26] 60 - #define UCreg_25 uregs[25] 61 - #define UCreg_24 uregs[24] 62 - #define UCreg_23 uregs[23] 63 - #define UCreg_22 uregs[22] 64 - #define UCreg_21 uregs[21] 65 - #define UCreg_20 uregs[20] 66 - #define UCreg_19 uregs[19] 67 - #define UCreg_18 uregs[18] 68 - #define UCreg_17 uregs[17] 69 - #define UCreg_16 uregs[16] 70 - #define UCreg_15 uregs[15] 71 - #define UCreg_14 uregs[14] 72 - #define UCreg_13 uregs[13] 73 - #define UCreg_12 uregs[12] 74 - #define UCreg_11 uregs[11] 75 - #define UCreg_10 uregs[10] 76 - #define UCreg_09 uregs[9] 77 - #define UCreg_08 uregs[8] 78 - #define UCreg_07 uregs[7] 79 - #define UCreg_06 uregs[6] 80 - #define UCreg_05 uregs[5] 81 - #define UCreg_04 uregs[4] 82 - #define UCreg_03 uregs[3] 83 - #define UCreg_02 uregs[2] 84 - #define UCreg_01 uregs[1] 85 - #define UCreg_00 uregs[0] 86 - #define UCreg_ORIG_00 uregs[33] 87 - 88 - 89 - #endif /* __ASSEMBLY__ */ 90 - 91 - #endif /* _UAPI__UNICORE_PTRACE_H__ */
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arch/unicore32/include/uapi/asm/sigcontext.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 - /* 3 - * linux/arch/unicore32/include/asm/sigcontext.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * This program is free software; you can redistribute it and/or modify 10 - * it under the terms of the GNU General Public License version 2 as 11 - * published by the Free Software Foundation. 12 - */ 13 - #ifndef __UNICORE_SIGCONTEXT_H__ 14 - #define __UNICORE_SIGCONTEXT_H__ 15 - 16 - #include <asm/ptrace.h> 17 - /* 18 - * Signal context structure - contains all info to do with the state 19 - * before the signal handler was invoked. Note: only add new entries 20 - * to the end of the structure. 21 - */ 22 - struct sigcontext { 23 - unsigned long trap_no; 24 - unsigned long error_code; 25 - unsigned long oldmask; 26 - unsigned long fault_address; 27 - struct pt_regs regs; 28 - }; 29 - 30 - #endif
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arch/unicore32/include/uapi/asm/unistd.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 - /* 3 - * linux/arch/unicore32/include/asm/unistd.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * This program is free software; you can redistribute it and/or modify 10 - * it under the terms of the GNU General Public License version 2 as 11 - * published by the Free Software Foundation. 12 - */ 13 - 14 - #define __ARCH_WANT_RENAMEAT 15 - #define __ARCH_WANT_SET_GET_RLIMIT 16 - #define __ARCH_WANT_STAT64 17 - #define __ARCH_WANT_TIME32_SYSCALLS 18 - 19 - /* Use the standard ABI for syscalls. */ 20 - #include <asm-generic/unistd.h> 21 - #define __ARCH_WANT_SYS_CLONE
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arch/unicore32/kernel/Makefile
··· 1 - # SPDX-License-Identifier: GPL-2.0 2 - # 3 - # Makefile for the linux kernel. 4 - # 5 - 6 - # Object file lists. 7 - obj-y := dma.o elf.o entry.o process.o ptrace.o 8 - obj-y += setup.o signal.o sys.o stacktrace.o traps.o 9 - 10 - obj-$(CONFIG_MODULES) += ksyms.o module.o 11 - obj-$(CONFIG_EARLY_PRINTK) += early_printk.o 12 - 13 - obj-$(CONFIG_UNICORE_FPU_F64) += fpu-ucf64.o 14 - 15 - # obj-y for architecture PKUnity v3 16 - obj-$(CONFIG_ARCH_PUV3) += clock.o irq.o time.o 17 - 18 - obj-$(CONFIG_PUV3_GPIO) += gpio.o 19 - obj-$(CONFIG_PUV3_PM) += pm.o sleep.o 20 - obj-$(CONFIG_HIBERNATION) += hibernate.o hibernate_asm.o 21 - 22 - obj-$(CONFIG_PCI) += pci.o 23 - 24 - # obj-y for specific machines 25 - obj-$(CONFIG_ARCH_PUV3) += puv3-core.o 26 - obj-$(CONFIG_PUV3_NB0916) += puv3-nb0916.o 27 - 28 - head-y := head.o 29 - obj-$(CONFIG_DEBUG_LL) += debug.o 30 - 31 - extra-y := $(head-y) vmlinux.lds
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arch/unicore32/kernel/asm-offsets.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/asm-offsets.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * Generate definitions needed by assembly language modules. 10 - * This code generates raw asm output which is post-processed to extract 11 - * and format the required data. 12 - */ 13 - #include <linux/sched.h> 14 - #include <linux/mm.h> 15 - #include <linux/dma-mapping.h> 16 - #include <linux/kbuild.h> 17 - #include <linux/suspend.h> 18 - #include <linux/thread_info.h> 19 - #include <asm/memory.h> 20 - #include <asm/suspend.h> 21 - 22 - /* 23 - * GCC 3.0, 3.1: general bad code generation. 24 - * GCC 3.2.0: incorrect function argument offset calculation. 25 - * GCC 3.2.x: miscompiles NEW_AUX_ENT in fs/binfmt_elf.c 26 - * (http://gcc.gnu.org/PR8896) and incorrect structure 27 - * initialisation in fs/jffs2/erase.c 28 - */ 29 - #if (__GNUC__ < 4) 30 - #error Your compiler should upgrade to uc4 31 - #error Known good compilers: 4.2.2 32 - #endif 33 - 34 - int main(void) 35 - { 36 - DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm)); 37 - BLANK(); 38 - DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); 39 - DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); 40 - DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit)); 41 - DEFINE(TI_TASK, offsetof(struct thread_info, task)); 42 - DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); 43 - DEFINE(TI_CPU_SAVE, offsetof(struct thread_info, cpu_context)); 44 - DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp)); 45 - #ifdef CONFIG_UNICORE_FPU_F64 46 - DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate)); 47 - #endif 48 - BLANK(); 49 - DEFINE(S_R0, offsetof(struct pt_regs, UCreg_00)); 50 - DEFINE(S_R1, offsetof(struct pt_regs, UCreg_01)); 51 - DEFINE(S_R2, offsetof(struct pt_regs, UCreg_02)); 52 - DEFINE(S_R3, offsetof(struct pt_regs, UCreg_03)); 53 - DEFINE(S_R4, offsetof(struct pt_regs, UCreg_04)); 54 - DEFINE(S_R5, offsetof(struct pt_regs, UCreg_05)); 55 - DEFINE(S_R6, offsetof(struct pt_regs, UCreg_06)); 56 - DEFINE(S_R7, offsetof(struct pt_regs, UCreg_07)); 57 - DEFINE(S_R8, offsetof(struct pt_regs, UCreg_08)); 58 - DEFINE(S_R9, offsetof(struct pt_regs, UCreg_09)); 59 - DEFINE(S_R10, offsetof(struct pt_regs, UCreg_10)); 60 - DEFINE(S_R11, offsetof(struct pt_regs, UCreg_11)); 61 - DEFINE(S_R12, offsetof(struct pt_regs, UCreg_12)); 62 - DEFINE(S_R13, offsetof(struct pt_regs, UCreg_13)); 63 - DEFINE(S_R14, offsetof(struct pt_regs, UCreg_14)); 64 - DEFINE(S_R15, offsetof(struct pt_regs, UCreg_15)); 65 - DEFINE(S_R16, offsetof(struct pt_regs, UCreg_16)); 66 - DEFINE(S_R17, offsetof(struct pt_regs, UCreg_17)); 67 - DEFINE(S_R18, offsetof(struct pt_regs, UCreg_18)); 68 - DEFINE(S_R19, offsetof(struct pt_regs, UCreg_19)); 69 - DEFINE(S_R20, offsetof(struct pt_regs, UCreg_20)); 70 - DEFINE(S_R21, offsetof(struct pt_regs, UCreg_21)); 71 - DEFINE(S_R22, offsetof(struct pt_regs, UCreg_22)); 72 - DEFINE(S_R23, offsetof(struct pt_regs, UCreg_23)); 73 - DEFINE(S_R24, offsetof(struct pt_regs, UCreg_24)); 74 - DEFINE(S_R25, offsetof(struct pt_regs, UCreg_25)); 75 - DEFINE(S_R26, offsetof(struct pt_regs, UCreg_26)); 76 - DEFINE(S_FP, offsetof(struct pt_regs, UCreg_fp)); 77 - DEFINE(S_IP, offsetof(struct pt_regs, UCreg_ip)); 78 - DEFINE(S_SP, offsetof(struct pt_regs, UCreg_sp)); 79 - DEFINE(S_LR, offsetof(struct pt_regs, UCreg_lr)); 80 - DEFINE(S_PC, offsetof(struct pt_regs, UCreg_pc)); 81 - DEFINE(S_PSR, offsetof(struct pt_regs, UCreg_asr)); 82 - DEFINE(S_OLD_R0, offsetof(struct pt_regs, UCreg_ORIG_00)); 83 - DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs)); 84 - BLANK(); 85 - DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm)); 86 - DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags)); 87 - BLANK(); 88 - DEFINE(VM_EXEC, VM_EXEC); 89 - BLANK(); 90 - DEFINE(PAGE_SZ, PAGE_SIZE); 91 - BLANK(); 92 - DEFINE(SYS_ERROR0, 0x9f0000); 93 - BLANK(); 94 - DEFINE(PBE_ADDRESS, offsetof(struct pbe, address)); 95 - DEFINE(PBE_ORIN_ADDRESS, offsetof(struct pbe, orig_address)); 96 - DEFINE(PBE_NEXT, offsetof(struct pbe, next)); 97 - DEFINE(SWSUSP_CPU, offsetof(struct swsusp_arch_regs, \ 98 - cpu_context)); 99 - #ifdef CONFIG_UNICORE_FPU_F64 100 - DEFINE(SWSUSP_FPSTATE, offsetof(struct swsusp_arch_regs, \ 101 - fpstate)); 102 - #endif 103 - BLANK(); 104 - DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL); 105 - DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE); 106 - DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE); 107 - return 0; 108 - }
-387
arch/unicore32/kernel/clock.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/clock.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn> 8 - * Copyright (C) 2001-2010 Guan Xuetao 9 - */ 10 - #include <linux/module.h> 11 - #include <linux/kernel.h> 12 - #include <linux/device.h> 13 - #include <linux/list.h> 14 - #include <linux/errno.h> 15 - #include <linux/err.h> 16 - #include <linux/string.h> 17 - #include <linux/clk.h> 18 - #include <linux/mutex.h> 19 - #include <linux/delay.h> 20 - #include <linux/io.h> 21 - 22 - #include <mach/hardware.h> 23 - 24 - /* 25 - * Very simple clock implementation 26 - */ 27 - struct clk { 28 - struct list_head node; 29 - unsigned long rate; 30 - const char *name; 31 - }; 32 - 33 - static struct clk clk_ost_clk = { 34 - .name = "OST_CLK", 35 - .rate = CLOCK_TICK_RATE, 36 - }; 37 - 38 - static struct clk clk_mclk_clk = { 39 - .name = "MAIN_CLK", 40 - }; 41 - 42 - static struct clk clk_bclk32_clk = { 43 - .name = "BUS32_CLK", 44 - }; 45 - 46 - static struct clk clk_ddr_clk = { 47 - .name = "DDR_CLK", 48 - }; 49 - 50 - static struct clk clk_vga_clk = { 51 - .name = "VGA_CLK", 52 - }; 53 - 54 - static LIST_HEAD(clocks); 55 - static DEFINE_MUTEX(clocks_mutex); 56 - 57 - struct clk *clk_get(struct device *dev, const char *id) 58 - { 59 - struct clk *p, *clk = ERR_PTR(-ENOENT); 60 - 61 - mutex_lock(&clocks_mutex); 62 - list_for_each_entry(p, &clocks, node) { 63 - if (strcmp(id, p->name) == 0) { 64 - clk = p; 65 - break; 66 - } 67 - } 68 - mutex_unlock(&clocks_mutex); 69 - 70 - return clk; 71 - } 72 - EXPORT_SYMBOL(clk_get); 73 - 74 - void clk_put(struct clk *clk) 75 - { 76 - } 77 - EXPORT_SYMBOL(clk_put); 78 - 79 - int clk_enable(struct clk *clk) 80 - { 81 - return 0; 82 - } 83 - EXPORT_SYMBOL(clk_enable); 84 - 85 - void clk_disable(struct clk *clk) 86 - { 87 - } 88 - EXPORT_SYMBOL(clk_disable); 89 - 90 - unsigned long clk_get_rate(struct clk *clk) 91 - { 92 - return clk->rate; 93 - } 94 - EXPORT_SYMBOL(clk_get_rate); 95 - 96 - struct { 97 - unsigned long rate; 98 - unsigned long cfg; 99 - unsigned long div; 100 - } vga_clk_table[] = { 101 - {.rate = 25175000, .cfg = 0x00002001, .div = 0x9}, 102 - {.rate = 31500000, .cfg = 0x00002001, .div = 0x7}, 103 - {.rate = 40000000, .cfg = 0x00003801, .div = 0x9}, 104 - {.rate = 49500000, .cfg = 0x00003801, .div = 0x7}, 105 - {.rate = 65000000, .cfg = 0x00002c01, .div = 0x4}, 106 - {.rate = 78750000, .cfg = 0x00002400, .div = 0x7}, 107 - {.rate = 108000000, .cfg = 0x00002c01, .div = 0x2}, 108 - {.rate = 106500000, .cfg = 0x00003c01, .div = 0x3}, 109 - {.rate = 50650000, .cfg = 0x00106400, .div = 0x9}, 110 - {.rate = 61500000, .cfg = 0x00106400, .div = 0xa}, 111 - {.rate = 85500000, .cfg = 0x00002800, .div = 0x6}, 112 - }; 113 - 114 - struct { 115 - unsigned long mrate; 116 - unsigned long prate; 117 - } mclk_clk_table[] = { 118 - {.mrate = 500000000, .prate = 0x00109801}, 119 - {.mrate = 525000000, .prate = 0x00104C00}, 120 - {.mrate = 550000000, .prate = 0x00105000}, 121 - {.mrate = 575000000, .prate = 0x00105400}, 122 - {.mrate = 600000000, .prate = 0x00105800}, 123 - {.mrate = 625000000, .prate = 0x00105C00}, 124 - {.mrate = 650000000, .prate = 0x00106000}, 125 - {.mrate = 675000000, .prate = 0x00106400}, 126 - {.mrate = 700000000, .prate = 0x00106800}, 127 - {.mrate = 725000000, .prate = 0x00106C00}, 128 - {.mrate = 750000000, .prate = 0x00107000}, 129 - {.mrate = 775000000, .prate = 0x00107400}, 130 - {.mrate = 800000000, .prate = 0x00107800}, 131 - }; 132 - 133 - int clk_set_rate(struct clk *clk, unsigned long rate) 134 - { 135 - if (clk == &clk_vga_clk) { 136 - unsigned long pll_vgacfg, pll_vgadiv; 137 - int ret, i; 138 - 139 - /* lookup vga_clk_table */ 140 - ret = -EINVAL; 141 - for (i = 0; i < ARRAY_SIZE(vga_clk_table); i++) { 142 - if (rate == vga_clk_table[i].rate) { 143 - pll_vgacfg = vga_clk_table[i].cfg; 144 - pll_vgadiv = vga_clk_table[i].div; 145 - ret = 0; 146 - break; 147 - } 148 - } 149 - 150 - if (ret) 151 - return ret; 152 - 153 - if (readl(PM_PLLVGACFG) == pll_vgacfg) 154 - return 0; 155 - 156 - /* set pll vga cfg reg. */ 157 - writel(pll_vgacfg, PM_PLLVGACFG); 158 - 159 - writel(PM_PMCR_CFBVGA, PM_PMCR); 160 - while ((readl(PM_PLLDFCDONE) & PM_PLLDFCDONE_VGADFC) 161 - != PM_PLLDFCDONE_VGADFC) 162 - udelay(100); /* about 1ms */ 163 - 164 - /* set div cfg reg. */ 165 - writel(readl(PM_PCGR) | PM_PCGR_VGACLK, PM_PCGR); 166 - 167 - writel((readl(PM_DIVCFG) & ~PM_DIVCFG_VGACLK_MASK) 168 - | PM_DIVCFG_VGACLK(pll_vgadiv), PM_DIVCFG); 169 - 170 - writel(readl(PM_SWRESET) | PM_SWRESET_VGADIV, PM_SWRESET); 171 - while ((readl(PM_SWRESET) & PM_SWRESET_VGADIV) 172 - == PM_SWRESET_VGADIV) 173 - udelay(100); /* 65536 bclk32, about 320us */ 174 - 175 - writel(readl(PM_PCGR) & ~PM_PCGR_VGACLK, PM_PCGR); 176 - } 177 - #ifdef CONFIG_CPU_FREQ 178 - if (clk == &clk_mclk_clk) { 179 - u32 pll_rate, divstatus = readl(PM_DIVSTATUS); 180 - int ret, i; 181 - 182 - /* lookup mclk_clk_table */ 183 - ret = -EINVAL; 184 - for (i = 0; i < ARRAY_SIZE(mclk_clk_table); i++) { 185 - if (rate == mclk_clk_table[i].mrate) { 186 - pll_rate = mclk_clk_table[i].prate; 187 - clk_mclk_clk.rate = mclk_clk_table[i].mrate; 188 - ret = 0; 189 - break; 190 - } 191 - } 192 - 193 - if (ret) 194 - return ret; 195 - 196 - if (clk_mclk_clk.rate) 197 - clk_bclk32_clk.rate = clk_mclk_clk.rate 198 - / (((divstatus & 0x0000f000) >> 12) + 1); 199 - 200 - /* set pll sys cfg reg. */ 201 - writel(pll_rate, PM_PLLSYSCFG); 202 - 203 - writel(PM_PMCR_CFBSYS, PM_PMCR); 204 - while ((readl(PM_PLLDFCDONE) & PM_PLLDFCDONE_SYSDFC) 205 - != PM_PLLDFCDONE_SYSDFC) 206 - udelay(100); 207 - /* about 1ms */ 208 - } 209 - #endif 210 - return 0; 211 - } 212 - EXPORT_SYMBOL(clk_set_rate); 213 - 214 - int clk_register(struct clk *clk) 215 - { 216 - mutex_lock(&clocks_mutex); 217 - list_add(&clk->node, &clocks); 218 - mutex_unlock(&clocks_mutex); 219 - printk(KERN_DEFAULT "PKUnity PM: %s %lu.%02luM\n", clk->name, 220 - (clk->rate)/1000000, (clk->rate)/10000 % 100); 221 - return 0; 222 - } 223 - EXPORT_SYMBOL(clk_register); 224 - 225 - void clk_unregister(struct clk *clk) 226 - { 227 - mutex_lock(&clocks_mutex); 228 - list_del(&clk->node); 229 - mutex_unlock(&clocks_mutex); 230 - } 231 - EXPORT_SYMBOL(clk_unregister); 232 - 233 - struct { 234 - unsigned long prate; 235 - unsigned long rate; 236 - } pllrate_table[] = { 237 - {.prate = 0x00002001, .rate = 250000000}, 238 - {.prate = 0x00104801, .rate = 250000000}, 239 - {.prate = 0x00104C01, .rate = 262500000}, 240 - {.prate = 0x00002401, .rate = 275000000}, 241 - {.prate = 0x00105001, .rate = 275000000}, 242 - {.prate = 0x00105401, .rate = 287500000}, 243 - {.prate = 0x00002801, .rate = 300000000}, 244 - {.prate = 0x00105801, .rate = 300000000}, 245 - {.prate = 0x00105C01, .rate = 312500000}, 246 - {.prate = 0x00002C01, .rate = 325000000}, 247 - {.prate = 0x00106001, .rate = 325000000}, 248 - {.prate = 0x00106401, .rate = 337500000}, 249 - {.prate = 0x00003001, .rate = 350000000}, 250 - {.prate = 0x00106801, .rate = 350000000}, 251 - {.prate = 0x00106C01, .rate = 362500000}, 252 - {.prate = 0x00003401, .rate = 375000000}, 253 - {.prate = 0x00107001, .rate = 375000000}, 254 - {.prate = 0x00107401, .rate = 387500000}, 255 - {.prate = 0x00003801, .rate = 400000000}, 256 - {.prate = 0x00107801, .rate = 400000000}, 257 - {.prate = 0x00107C01, .rate = 412500000}, 258 - {.prate = 0x00003C01, .rate = 425000000}, 259 - {.prate = 0x00108001, .rate = 425000000}, 260 - {.prate = 0x00108401, .rate = 437500000}, 261 - {.prate = 0x00004001, .rate = 450000000}, 262 - {.prate = 0x00108801, .rate = 450000000}, 263 - {.prate = 0x00108C01, .rate = 462500000}, 264 - {.prate = 0x00004401, .rate = 475000000}, 265 - {.prate = 0x00109001, .rate = 475000000}, 266 - {.prate = 0x00109401, .rate = 487500000}, 267 - {.prate = 0x00004801, .rate = 500000000}, 268 - {.prate = 0x00109801, .rate = 500000000}, 269 - {.prate = 0x00104C00, .rate = 525000000}, 270 - {.prate = 0x00002400, .rate = 550000000}, 271 - {.prate = 0x00105000, .rate = 550000000}, 272 - {.prate = 0x00105400, .rate = 575000000}, 273 - {.prate = 0x00002800, .rate = 600000000}, 274 - {.prate = 0x00105800, .rate = 600000000}, 275 - {.prate = 0x00105C00, .rate = 625000000}, 276 - {.prate = 0x00002C00, .rate = 650000000}, 277 - {.prate = 0x00106000, .rate = 650000000}, 278 - {.prate = 0x00106400, .rate = 675000000}, 279 - {.prate = 0x00003000, .rate = 700000000}, 280 - {.prate = 0x00106800, .rate = 700000000}, 281 - {.prate = 0x00106C00, .rate = 725000000}, 282 - {.prate = 0x00003400, .rate = 750000000}, 283 - {.prate = 0x00107000, .rate = 750000000}, 284 - {.prate = 0x00107400, .rate = 775000000}, 285 - {.prate = 0x00003800, .rate = 800000000}, 286 - {.prate = 0x00107800, .rate = 800000000}, 287 - {.prate = 0x00107C00, .rate = 825000000}, 288 - {.prate = 0x00003C00, .rate = 850000000}, 289 - {.prate = 0x00108000, .rate = 850000000}, 290 - {.prate = 0x00108400, .rate = 875000000}, 291 - {.prate = 0x00004000, .rate = 900000000}, 292 - {.prate = 0x00108800, .rate = 900000000}, 293 - {.prate = 0x00108C00, .rate = 925000000}, 294 - {.prate = 0x00004400, .rate = 950000000}, 295 - {.prate = 0x00109000, .rate = 950000000}, 296 - {.prate = 0x00109400, .rate = 975000000}, 297 - {.prate = 0x00004800, .rate = 1000000000}, 298 - {.prate = 0x00109800, .rate = 1000000000}, 299 - }; 300 - 301 - struct { 302 - unsigned long prate; 303 - unsigned long drate; 304 - } pddr_table[] = { 305 - {.prate = 0x00100800, .drate = 44236800}, 306 - {.prate = 0x00100C00, .drate = 66355200}, 307 - {.prate = 0x00101000, .drate = 88473600}, 308 - {.prate = 0x00101400, .drate = 110592000}, 309 - {.prate = 0x00101800, .drate = 132710400}, 310 - {.prate = 0x00101C01, .drate = 154828800}, 311 - {.prate = 0x00102001, .drate = 176947200}, 312 - {.prate = 0x00102401, .drate = 199065600}, 313 - {.prate = 0x00102801, .drate = 221184000}, 314 - {.prate = 0x00102C01, .drate = 243302400}, 315 - {.prate = 0x00103001, .drate = 265420800}, 316 - {.prate = 0x00103401, .drate = 287539200}, 317 - {.prate = 0x00103801, .drate = 309657600}, 318 - {.prate = 0x00103C01, .drate = 331776000}, 319 - {.prate = 0x00104001, .drate = 353894400}, 320 - }; 321 - 322 - static int __init clk_init(void) 323 - { 324 - #ifdef CONFIG_PUV3_PM 325 - u32 pllrate, divstatus = readl(PM_DIVSTATUS); 326 - u32 pcgr_val = readl(PM_PCGR); 327 - int i; 328 - 329 - pcgr_val |= PM_PCGR_BCLKMME | PM_PCGR_BCLKH264E | PM_PCGR_BCLKH264D 330 - | PM_PCGR_HECLK | PM_PCGR_HDCLK; 331 - writel(pcgr_val, PM_PCGR); 332 - 333 - pllrate = readl(PM_PLLSYSSTATUS); 334 - 335 - /* lookup pmclk_table */ 336 - clk_mclk_clk.rate = 0; 337 - for (i = 0; i < ARRAY_SIZE(pllrate_table); i++) { 338 - if (pllrate == pllrate_table[i].prate) { 339 - clk_mclk_clk.rate = pllrate_table[i].rate; 340 - break; 341 - } 342 - } 343 - 344 - if (clk_mclk_clk.rate) 345 - clk_bclk32_clk.rate = clk_mclk_clk.rate / 346 - (((divstatus & 0x0000f000) >> 12) + 1); 347 - 348 - pllrate = readl(PM_PLLDDRSTATUS); 349 - 350 - /* lookup pddr_table */ 351 - clk_ddr_clk.rate = 0; 352 - for (i = 0; i < ARRAY_SIZE(pddr_table); i++) { 353 - if (pllrate == pddr_table[i].prate) { 354 - clk_ddr_clk.rate = pddr_table[i].drate; 355 - break; 356 - } 357 - } 358 - 359 - pllrate = readl(PM_PLLVGASTATUS); 360 - 361 - /* lookup pvga_table */ 362 - clk_vga_clk.rate = 0; 363 - for (i = 0; i < ARRAY_SIZE(pllrate_table); i++) { 364 - if (pllrate == pllrate_table[i].prate) { 365 - clk_vga_clk.rate = pllrate_table[i].rate; 366 - break; 367 - } 368 - } 369 - 370 - if (clk_vga_clk.rate) 371 - clk_vga_clk.rate = clk_vga_clk.rate / 372 - (((divstatus & 0x00f00000) >> 20) + 1); 373 - 374 - clk_register(&clk_vga_clk); 375 - #endif 376 - #ifdef CONFIG_ARCH_FPGA 377 - clk_ddr_clk.rate = 33000000; 378 - clk_mclk_clk.rate = 33000000; 379 - clk_bclk32_clk.rate = 33000000; 380 - #endif 381 - clk_register(&clk_ddr_clk); 382 - clk_register(&clk_mclk_clk); 383 - clk_register(&clk_bclk32_clk); 384 - clk_register(&clk_ost_clk); 385 - return 0; 386 - } 387 - core_initcall(clk_init);
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arch/unicore32/kernel/debug-macro.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/kernel/debug-macro.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * Debugging macro include header 10 - */ 11 - #include <generated/asm-offsets.h> 12 - #include <mach/hardware.h> 13 - 14 - .macro put_word_ocd, rd, rx=r16 15 - 1001: movc \rx, p1.c0, #0 16 - cand.a \rx, #2 17 - bne 1001b 18 - movc p1.c1, \rd, #1 19 - .endm 20 - 21 - #ifdef CONFIG_DEBUG_OCD 22 - /* debug using UniCore On-Chip-Debugger */ 23 - .macro addruart, rx 24 - .endm 25 - 26 - .macro senduart, rd, rx 27 - put_word_ocd \rd, \rx 28 - .endm 29 - 30 - .macro busyuart, rd, rx 31 - .endm 32 - 33 - .macro waituart, rd, rx 34 - .endm 35 - #else 36 - #define UART_CLK_DEFAULT 3686400 * 20 37 - /* Uartclk = MCLK/ 2, The MCLK on my board is 3686400 * 40 */ 38 - #define BAUD_RATE_DEFAULT 115200 39 - /* The baud rate of the serial port */ 40 - 41 - #define UART_DIVISOR_DEFAULT (UART_CLK_DEFAULT \ 42 - / (16 * BAUD_RATE_DEFAULT) - 1) 43 - 44 - .macro addruart,rx 45 - mrc p0, #0, \rx, c1, c0 46 - tst \rx, #1 @ MMU enabled? 47 - moveq \rx, #0xee000000 @ physical base address 48 - movne \rx, #0x6e000000 @ virtual address 49 - 50 - @ We probe for the active serial port here 51 - @ However, now we assume UART0 is active: epip4d 52 - @ We assume r1 and r2 can be clobbered. 53 - 54 - movl r2, #UART_DIVISOR_DEFAULT 55 - mov r1, #0x80 56 - str r1, [\rx, #UART_LCR_OFFSET] 57 - and r1, r2, #0xff00 58 - mov r1, r1, lsr #8 59 - str r1, [\rx, #UART_DLH_OFFSET] 60 - and r1, r2, #0xff 61 - str r1, [\rx, #UART_DLL_OFFSET] 62 - mov r1, #0x7 63 - str r1, [\rx, #UART_FCR_OFFSET] 64 - mov r1, #0x3 65 - str r1, [\rx, #UART_LCR_OFFSET] 66 - mov r1, #0x0 67 - str r1, [\rx, #UART_IER_OFFSET] 68 - .endm 69 - 70 - .macro senduart,rd,rx 71 - str \rd, [\rx, #UART_THR_OFFSET] 72 - .endm 73 - 74 - .macro waituart,rd,rx 75 - 1001: ldr \rd, [\rx, #UART_LSR_OFFSET] 76 - tst \rd, #UART_LSR_THRE 77 - beq 1001b 78 - .endm 79 - 80 - .macro busyuart,rd,rx 81 - 1001: ldr \rd, [\rx, #UART_LSR_OFFSET] 82 - tst \rd, #UART_LSR_TEMT 83 - bne 1001b 84 - .endm 85 - #endif 86 -
-82
arch/unicore32/kernel/debug.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/kernel/debug.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * 32-bit debugging code 10 - */ 11 - #include <linux/linkage.h> 12 - #include <asm/assembler.h> 13 - 14 - .text 15 - 16 - /* 17 - * Some debugging routines (useful if you've got MM problems and 18 - * printk isn't working). For DEBUGGING ONLY!!! Do not leave 19 - * references to these in a production kernel! 20 - */ 21 - #include "debug-macro.S" 22 - 23 - /* 24 - * Useful debugging routines 25 - */ 26 - ENTRY(printhex8) 27 - mov r1, #8 28 - b printhex 29 - ENDPROC(printhex8) 30 - 31 - ENTRY(printhex4) 32 - mov r1, #4 33 - b printhex 34 - ENDPROC(printhex4) 35 - 36 - ENTRY(printhex2) 37 - mov r1, #2 38 - printhex: adr r2, hexbuf 39 - add r3, r2, r1 40 - mov r1, #0 41 - stb r1, [r3] 42 - 1: and r1, r0, #15 43 - mov r0, r0 >> #4 44 - csub.a r1, #10 45 - beg 2f 46 - add r1, r1, #'0' - 'a' + 10 47 - 2: add r1, r1, #'a' - 10 48 - stb.w r1, [r3+], #-1 49 - cxor.a r3, r2 50 - bne 1b 51 - mov r0, r2 52 - b printascii 53 - ENDPROC(printhex2) 54 - 55 - .ltorg 56 - 57 - ENTRY(printascii) 58 - addruart r3 59 - b 2f 60 - 1: waituart r2, r3 61 - senduart r1, r3 62 - busyuart r2, r3 63 - cxor.a r1, #'\n' 64 - cmoveq r1, #'\r' 65 - beq 1b 66 - 2: cxor.a r0, #0 67 - beq 3f 68 - ldb.w r1, [r0]+, #1 69 - cxor.a r1, #0 70 - bne 1b 71 - 3: mov pc, lr 72 - ENDPROC(printascii) 73 - 74 - ENTRY(printch) 75 - addruart r3 76 - mov r1, r0 77 - mov r0, #0 78 - b 1b 79 - ENDPROC(printch) 80 - 81 - hexbuf: .space 16 82 -
-179
arch/unicore32/kernel/dma.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/dma.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn> 8 - * Copyright (C) 2001-2010 Guan Xuetao 9 - */ 10 - 11 - #include <linux/module.h> 12 - #include <linux/init.h> 13 - #include <linux/kernel.h> 14 - #include <linux/interrupt.h> 15 - #include <linux/errno.h> 16 - #include <linux/io.h> 17 - 18 - #include <asm/irq.h> 19 - #include <mach/hardware.h> 20 - #include <mach/dma.h> 21 - 22 - struct dma_channel { 23 - char *name; 24 - puv3_dma_prio prio; 25 - void (*irq_handler)(int, void *); 26 - void (*err_handler)(int, void *); 27 - void *data; 28 - }; 29 - 30 - static struct dma_channel dma_channels[MAX_DMA_CHANNELS]; 31 - 32 - int puv3_request_dma(char *name, puv3_dma_prio prio, 33 - void (*irq_handler)(int, void *), 34 - void (*err_handler)(int, void *), 35 - void *data) 36 - { 37 - unsigned long flags; 38 - int i, found = 0; 39 - 40 - /* basic sanity checks */ 41 - if (!name) 42 - return -EINVAL; 43 - 44 - local_irq_save(flags); 45 - 46 - do { 47 - /* try grabbing a DMA channel with the requested priority */ 48 - for (i = 0; i < MAX_DMA_CHANNELS; i++) { 49 - if ((dma_channels[i].prio == prio) && 50 - !dma_channels[i].name) { 51 - found = 1; 52 - break; 53 - } 54 - } 55 - /* if requested prio group is full, try a hier priority */ 56 - } while (!found && prio--); 57 - 58 - if (found) { 59 - dma_channels[i].name = name; 60 - dma_channels[i].irq_handler = irq_handler; 61 - dma_channels[i].err_handler = err_handler; 62 - dma_channels[i].data = data; 63 - } else { 64 - printk(KERN_WARNING "No more available DMA channels for %s\n", 65 - name); 66 - i = -ENODEV; 67 - } 68 - 69 - local_irq_restore(flags); 70 - return i; 71 - } 72 - EXPORT_SYMBOL(puv3_request_dma); 73 - 74 - void puv3_free_dma(int dma_ch) 75 - { 76 - unsigned long flags; 77 - 78 - if (!dma_channels[dma_ch].name) { 79 - printk(KERN_CRIT 80 - "%s: trying to free channel %d which is already freed\n", 81 - __func__, dma_ch); 82 - return; 83 - } 84 - 85 - local_irq_save(flags); 86 - dma_channels[dma_ch].name = NULL; 87 - dma_channels[dma_ch].err_handler = NULL; 88 - local_irq_restore(flags); 89 - } 90 - EXPORT_SYMBOL(puv3_free_dma); 91 - 92 - static irqreturn_t dma_irq_handler(int irq, void *dev_id) 93 - { 94 - int i, dint; 95 - 96 - dint = readl(DMAC_ITCSR); 97 - for (i = 0; i < MAX_DMA_CHANNELS; i++) { 98 - if (dint & DMAC_CHANNEL(i)) { 99 - struct dma_channel *channel = &dma_channels[i]; 100 - 101 - /* Clear TC interrupt of channel i */ 102 - writel(DMAC_CHANNEL(i), DMAC_ITCCR); 103 - writel(0, DMAC_ITCCR); 104 - 105 - if (channel->name && channel->irq_handler) { 106 - channel->irq_handler(i, channel->data); 107 - } else { 108 - /* 109 - * IRQ for an unregistered DMA channel: 110 - * let's clear the interrupts and disable it. 111 - */ 112 - printk(KERN_WARNING "spurious IRQ for" 113 - " DMA channel %d\n", i); 114 - } 115 - } 116 - } 117 - return IRQ_HANDLED; 118 - } 119 - 120 - static irqreturn_t dma_err_handler(int irq, void *dev_id) 121 - { 122 - int i, dint; 123 - 124 - dint = readl(DMAC_IESR); 125 - for (i = 0; i < MAX_DMA_CHANNELS; i++) { 126 - if (dint & DMAC_CHANNEL(i)) { 127 - struct dma_channel *channel = &dma_channels[i]; 128 - 129 - /* Clear Err interrupt of channel i */ 130 - writel(DMAC_CHANNEL(i), DMAC_IECR); 131 - writel(0, DMAC_IECR); 132 - 133 - if (channel->name && channel->err_handler) { 134 - channel->err_handler(i, channel->data); 135 - } else { 136 - /* 137 - * IRQ for an unregistered DMA channel: 138 - * let's clear the interrupts and disable it. 139 - */ 140 - printk(KERN_WARNING "spurious IRQ for" 141 - " DMA channel %d\n", i); 142 - } 143 - } 144 - } 145 - return IRQ_HANDLED; 146 - } 147 - 148 - int __init puv3_init_dma(void) 149 - { 150 - int i, ret; 151 - 152 - /* dma channel priorities on v8 processors: 153 - * ch 0 - 1 <--> (0) DMA_PRIO_HIGH 154 - * ch 2 - 3 <--> (1) DMA_PRIO_MEDIUM 155 - * ch 4 - 5 <--> (2) DMA_PRIO_LOW 156 - */ 157 - for (i = 0; i < MAX_DMA_CHANNELS; i++) { 158 - puv3_stop_dma(i); 159 - dma_channels[i].name = NULL; 160 - dma_channels[i].prio = min((i & 0x7) >> 1, DMA_PRIO_LOW); 161 - } 162 - 163 - ret = request_irq(IRQ_DMA, dma_irq_handler, 0, "DMA", NULL); 164 - if (ret) { 165 - printk(KERN_CRIT "Can't register IRQ for DMA\n"); 166 - return ret; 167 - } 168 - 169 - ret = request_irq(IRQ_DMAERR, dma_err_handler, 0, "DMAERR", NULL); 170 - if (ret) { 171 - printk(KERN_CRIT "Can't register IRQ for DMAERR\n"); 172 - free_irq(IRQ_DMA, "DMA"); 173 - return ret; 174 - } 175 - 176 - return 0; 177 - } 178 - 179 - postcore_initcall(puv3_init_dma);
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arch/unicore32/kernel/early_printk.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/early_printk.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/console.h> 10 - #include <linux/init.h> 11 - #include <linux/string.h> 12 - #include <mach/ocd.h> 13 - 14 - /* On-Chip-Debugger functions */ 15 - 16 - static void early_ocd_write(struct console *con, const char *s, unsigned n) 17 - { 18 - while (*s && n-- > 0) { 19 - if (*s == '\n') 20 - ocd_putc((int)'\r'); 21 - ocd_putc((int)*s); 22 - s++; 23 - } 24 - } 25 - 26 - static struct console early_ocd_console = { 27 - .name = "earlyocd", 28 - .write = early_ocd_write, 29 - .flags = CON_PRINTBUFFER, 30 - .index = -1, 31 - }; 32 - 33 - static int __init setup_early_printk(char *buf) 34 - { 35 - if (!buf || early_console) 36 - return 0; 37 - 38 - early_console = &early_ocd_console; 39 - if (strstr(buf, "keep")) 40 - early_console->flags &= ~CON_BOOT; 41 - else 42 - early_console->flags |= CON_BOOT; 43 - register_console(early_console); 44 - return 0; 45 - } 46 - early_param("earlyprintk", setup_early_printk);
-35
arch/unicore32/kernel/elf.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/elf.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/module.h> 10 - #include <linux/sched.h> 11 - #include <linux/personality.h> 12 - #include <linux/binfmts.h> 13 - #include <linux/elf.h> 14 - 15 - int elf_check_arch(const struct elf32_hdr *x) 16 - { 17 - /* Make sure it's an UniCore executable */ 18 - if (x->e_machine != EM_UNICORE) 19 - return 0; 20 - 21 - /* Make sure the entry address is reasonable */ 22 - if (x->e_entry & 3) 23 - return 0; 24 - 25 - return 1; 26 - } 27 - EXPORT_SYMBOL(elf_check_arch); 28 - 29 - void elf_set_personality(const struct elf32_hdr *x) 30 - { 31 - unsigned int personality = PER_LINUX; 32 - 33 - set_personality(personality); 34 - } 35 - EXPORT_SYMBOL(elf_set_personality);
-802
arch/unicore32/kernel/entry.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/kernel/entry.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * Low-level vector interface routines 10 - */ 11 - #include <linux/init.h> 12 - #include <linux/linkage.h> 13 - #include <asm/assembler.h> 14 - #include <asm/errno.h> 15 - #include <asm/thread_info.h> 16 - #include <asm/memory.h> 17 - #include <asm/unistd.h> 18 - #include <generated/asm-offsets.h> 19 - #include "debug-macro.S" 20 - 21 - @ 22 - @ Most of the stack format comes from struct pt_regs, but with 23 - @ the addition of 8 bytes for storing syscall args 5 and 6. 24 - @ 25 - #define S_OFF 8 26 - 27 - /* 28 - * The SWI code relies on the fact that R0 is at the bottom of the stack 29 - * (due to slow/fast restore user regs). 30 - */ 31 - #if S_R0 != 0 32 - #error "Please fix" 33 - #endif 34 - 35 - .macro zero_fp 36 - #ifdef CONFIG_FRAME_POINTER 37 - mov fp, #0 38 - #endif 39 - .endm 40 - 41 - .macro alignment_trap, rtemp 42 - #ifdef CONFIG_ALIGNMENT_TRAP 43 - ldw \rtemp, .LCcralign 44 - ldw \rtemp, [\rtemp] 45 - movc p0.c1, \rtemp, #0 46 - #endif 47 - .endm 48 - 49 - .macro load_user_sp_lr, rd, rtemp, offset = 0 50 - mov \rtemp, asr 51 - xor \rtemp, \rtemp, #(PRIV_MODE ^ SUSR_MODE) 52 - mov.a asr, \rtemp @ switch to the SUSR mode 53 - 54 - ldw sp, [\rd+], #\offset @ load sp_user 55 - ldw lr, [\rd+], #\offset + 4 @ load lr_user 56 - 57 - xor \rtemp, \rtemp, #(PRIV_MODE ^ SUSR_MODE) 58 - mov.a asr, \rtemp @ switch back to the PRIV mode 59 - .endm 60 - 61 - .macro priv_exit, rpsr 62 - mov.a bsr, \rpsr 63 - ldm.w (r0 - r15), [sp]+ 64 - ldm.b (r16 - pc), [sp]+ @ load r0 - pc, asr 65 - .endm 66 - 67 - .macro restore_user_regs, fast = 0, offset = 0 68 - ldw r1, [sp+], #\offset + S_PSR @ get calling asr 69 - ldw lr, [sp+], #\offset + S_PC @ get pc 70 - mov.a bsr, r1 @ save in bsr_priv 71 - .if \fast 72 - add sp, sp, #\offset + S_R1 @ r0 is syscall return value 73 - ldm.w (r1 - r15), [sp]+ @ get calling r1 - r15 74 - ldur (r16 - lr), [sp]+ @ get calling r16 - lr 75 - .else 76 - ldm.w (r0 - r15), [sp]+ @ get calling r0 - r15 77 - ldur (r16 - lr), [sp]+ @ get calling r16 - lr 78 - .endif 79 - nop 80 - add sp, sp, #S_FRAME_SIZE - S_R16 81 - mov.a pc, lr @ return 82 - @ and move bsr_priv into asr 83 - .endm 84 - 85 - .macro get_thread_info, rd 86 - mov \rd, sp >> #13 87 - mov \rd, \rd << #13 88 - .endm 89 - 90 - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 91 - ldw \base, =(PKUNITY_INTC_BASE) 92 - ldw \irqstat, [\base+], #0xC @ INTC_ICIP 93 - ldw \tmp, [\base+], #0x4 @ INTC_ICMR 94 - and.a \irqstat, \irqstat, \tmp 95 - beq 1001f 96 - cntlz \irqnr, \irqstat 97 - rsub \irqnr, \irqnr, #31 98 - 1001: /* EQ will be set if no irqs pending */ 99 - .endm 100 - 101 - #ifdef CONFIG_DEBUG_LL 102 - .macro printreg, reg, temp 103 - adr \temp, 901f 104 - stm (r0-r3), [\temp]+ 105 - stw lr, [\temp+], #0x10 106 - mov r0, \reg 107 - b.l printhex8 108 - mov r0, #':' 109 - b.l printch 110 - mov r0, pc 111 - b.l printhex8 112 - adr r0, 902f 113 - b.l printascii 114 - adr \temp, 901f 115 - ldm (r0-r3), [\temp]+ 116 - ldw lr, [\temp+], #0x10 117 - b 903f 118 - 901: .word 0, 0, 0, 0, 0 @ r0-r3, lr 119 - 902: .asciz ": epip4d\n" 120 - .align 121 - 903: 122 - .endm 123 - #endif 124 - 125 - /* 126 - * These are the registers used in the syscall handler, and allow us to 127 - * have in theory up to 7 arguments to a function - r0 to r6. 128 - * 129 - * Note that tbl == why is intentional. 130 - * 131 - * We must set at least "tsk" and "why" when calling ret_with_reschedule. 132 - */ 133 - scno .req r21 @ syscall number 134 - tbl .req r22 @ syscall table pointer 135 - why .req r22 @ Linux syscall (!= 0) 136 - tsk .req r23 @ current thread_info 137 - 138 - /* 139 - * Interrupt handling. Preserves r17, r18, r19 140 - */ 141 - .macro intr_handler 142 - 1: get_irqnr_and_base r0, r6, r5, lr 143 - beq 2f 144 - mov r1, sp 145 - @ 146 - @ routine called with r0 = irq number, r1 = struct pt_regs * 147 - @ 148 - adr lr, 1b 149 - b asm_do_IRQ 150 - 2: 151 - .endm 152 - 153 - /* 154 - * PRIV mode handlers 155 - */ 156 - .macro priv_entry 157 - sub sp, sp, #(S_FRAME_SIZE - 4) 158 - stm (r1 - r15), [sp]+ 159 - add r5, sp, #S_R15 160 - stm (r16 - r28), [r5]+ 161 - 162 - ldm (r1 - r3), [r0]+ 163 - add r5, sp, #S_SP - 4 @ here for interlock avoidance 164 - mov r4, #-1 @ "" "" "" "" 165 - add r0, sp, #(S_FRAME_SIZE - 4) 166 - stw.w r1, [sp+], #-4 @ save the "real" r0 copied 167 - @ from the exception stack 168 - 169 - mov r1, lr 170 - 171 - @ 172 - @ We are now ready to fill in the remaining blanks on the stack: 173 - @ 174 - @ r0 - sp_priv 175 - @ r1 - lr_priv 176 - @ r2 - lr_<exception>, already fixed up for correct return/restart 177 - @ r3 - bsr_<exception> 178 - @ r4 - orig_r0 (see pt_regs definition in ptrace.h) 179 - @ 180 - stm (r0 - r4), [r5]+ 181 - .endm 182 - 183 - /* 184 - * User mode handlers 185 - * 186 - */ 187 - .macro user_entry 188 - sub sp, sp, #S_FRAME_SIZE 189 - stm (r1 - r15), [sp+] 190 - add r4, sp, #S_R16 191 - stm (r16 - r28), [r4]+ 192 - 193 - ldm (r1 - r3), [r0]+ 194 - add r0, sp, #S_PC @ here for interlock avoidance 195 - mov r4, #-1 @ "" "" "" "" 196 - 197 - stw r1, [sp] @ save the "real" r0 copied 198 - @ from the exception stack 199 - 200 - @ 201 - @ We are now ready to fill in the remaining blanks on the stack: 202 - @ 203 - @ r2 - lr_<exception>, already fixed up for correct return/restart 204 - @ r3 - bsr_<exception> 205 - @ r4 - orig_r0 (see pt_regs definition in ptrace.h) 206 - @ 207 - @ Also, separately save sp_user and lr_user 208 - @ 209 - stm (r2 - r4), [r0]+ 210 - stur (sp, lr), [r0-] 211 - 212 - @ 213 - @ Enable the alignment trap while in kernel mode 214 - @ 215 - alignment_trap r0 216 - 217 - @ 218 - @ Clear FP to mark the first stack frame 219 - @ 220 - zero_fp 221 - .endm 222 - 223 - .text 224 - 225 - @ 226 - @ __invalid - generic code for failed exception 227 - @ (re-entrant version of handlers) 228 - @ 229 - __invalid: 230 - sub sp, sp, #S_FRAME_SIZE 231 - stm (r1 - r15), [sp+] 232 - add r1, sp, #S_R16 233 - stm (r16 - r28, sp, lr), [r1]+ 234 - 235 - zero_fp 236 - 237 - ldm (r4 - r6), [r0]+ 238 - add r0, sp, #S_PC @ here for interlock avoidance 239 - mov r7, #-1 @ "" "" "" "" 240 - stw r4, [sp] @ save preserved r0 241 - stm (r5 - r7), [r0]+ @ lr_<exception>, 242 - @ asr_<exception>, "old_r0" 243 - 244 - mov r0, sp 245 - mov r1, asr 246 - b bad_mode 247 - ENDPROC(__invalid) 248 - 249 - .align 5 250 - __dabt_priv: 251 - priv_entry 252 - 253 - @ 254 - @ get ready to re-enable interrupts if appropriate 255 - @ 256 - mov r17, asr 257 - cand.a r3, #PSR_I_BIT 258 - bne 1f 259 - andn r17, r17, #PSR_I_BIT 260 - 1: 261 - 262 - @ 263 - @ Call the processor-specific abort handler: 264 - @ 265 - @ r2 - aborted context pc 266 - @ r3 - aborted context asr 267 - @ 268 - @ The abort handler must return the aborted address in r0, and 269 - @ the fault status register in r1. 270 - @ 271 - movc r1, p0.c3, #0 @ get FSR 272 - movc r0, p0.c4, #0 @ get FAR 273 - 274 - @ 275 - @ set desired INTR state, then call main handler 276 - @ 277 - mov.a asr, r17 278 - mov r2, sp 279 - b.l do_DataAbort 280 - 281 - @ 282 - @ INTRs off again before pulling preserved data off the stack 283 - @ 284 - disable_irq r0 285 - 286 - @ 287 - @ restore BSR and restart the instruction 288 - @ 289 - ldw r2, [sp+], #S_PSR 290 - priv_exit r2 @ return from exception 291 - ENDPROC(__dabt_priv) 292 - 293 - .align 5 294 - __intr_priv: 295 - priv_entry 296 - 297 - intr_handler 298 - 299 - mov r0, #0 @ epip4d 300 - movc p0.c5, r0, #14 301 - nop; nop; nop; nop; nop; nop; nop; nop 302 - 303 - ldw r4, [sp+], #S_PSR @ irqs are already disabled 304 - 305 - priv_exit r4 @ return from exception 306 - ENDPROC(__intr_priv) 307 - 308 - .ltorg 309 - 310 - .align 5 311 - __extn_priv: 312 - priv_entry 313 - 314 - mov r0, sp @ struct pt_regs *regs 315 - mov r1, asr 316 - b bad_mode @ not supported 317 - ENDPROC(__extn_priv) 318 - 319 - .align 5 320 - __pabt_priv: 321 - priv_entry 322 - 323 - @ 324 - @ re-enable interrupts if appropriate 325 - @ 326 - mov r17, asr 327 - cand.a r3, #PSR_I_BIT 328 - bne 1f 329 - andn r17, r17, #PSR_I_BIT 330 - 1: 331 - 332 - @ 333 - @ set args, then call main handler 334 - @ 335 - @ r0 - address of faulting instruction 336 - @ r1 - pointer to registers on stack 337 - @ 338 - mov r0, r2 @ pass address of aborted instruction 339 - mov r1, #5 340 - mov.a asr, r17 341 - mov r2, sp @ regs 342 - b.l do_PrefetchAbort @ call abort handler 343 - 344 - @ 345 - @ INTRs off again before pulling preserved data off the stack 346 - @ 347 - disable_irq r0 348 - 349 - @ 350 - @ restore BSR and restart the instruction 351 - @ 352 - ldw r2, [sp+], #S_PSR 353 - priv_exit r2 @ return from exception 354 - ENDPROC(__pabt_priv) 355 - 356 - .align 5 357 - .LCcralign: 358 - .word cr_alignment 359 - 360 - .align 5 361 - __dabt_user: 362 - user_entry 363 - 364 - #ifdef CONFIG_UNICORE_FPU_F64 365 - cff ip, s31 366 - cand.a ip, #0x08000000 @ FPU execption traps? 367 - beq 209f 368 - 369 - ldw ip, [sp+], #S_PC 370 - add ip, ip, #4 371 - stw ip, [sp+], #S_PC 372 - @ 373 - @ fall through to the emulation code, which returns using r19 if 374 - @ it has emulated the instruction, or the more conventional lr 375 - @ if we are to treat this as a real extended instruction 376 - @ 377 - @ r0 - instruction 378 - @ 379 - 1: ldw.u r0, [r2] 380 - adr r19, ret_from_exception 381 - adr lr, 209f 382 - @ 383 - @ fallthrough to call do_uc_f64 384 - @ 385 - /* 386 - * Check whether the instruction is a co-processor instruction. 387 - * If yes, we need to call the relevant co-processor handler. 388 - * 389 - * Note that we don't do a full check here for the co-processor 390 - * instructions; all instructions with bit 27 set are well 391 - * defined. The only instructions that should fault are the 392 - * co-processor instructions. 393 - * 394 - * Emulators may wish to make use of the following registers: 395 - * r0 = instruction opcode. 396 - * r2 = PC 397 - * r19 = normal "successful" return address 398 - * r20 = this threads thread_info structure. 399 - * lr = unrecognised instruction return address 400 - */ 401 - get_thread_info r20 @ get current thread 402 - and r8, r0, #0x00003c00 @ mask out CP number 403 - mov r7, #1 404 - stb r7, [r20+], #TI_USED_CP + 2 @ set appropriate used_cp[] 405 - 406 - @ F64 hardware support entry point. 407 - @ r0 = faulted instruction 408 - @ r19 = return address 409 - @ r20 = fp_state 410 - enable_irq r4 411 - add r20, r20, #TI_FPSTATE @ r20 = workspace 412 - cff r1, s31 @ get fpu FPSCR 413 - andn r2, r1, #0x08000000 414 - ctf r2, s31 @ clear 27 bit 415 - mov r2, sp @ nothing stacked - regdump is at TOS 416 - mov lr, r19 @ setup for a return to the user code 417 - 418 - @ Now call the C code to package up the bounce to the support code 419 - @ r0 holds the trigger instruction 420 - @ r1 holds the FPSCR value 421 - @ r2 pointer to register dump 422 - b ucf64_exchandler 423 - 209: 424 - #endif 425 - @ 426 - @ Call the processor-specific abort handler: 427 - @ 428 - @ r2 - aborted context pc 429 - @ r3 - aborted context asr 430 - @ 431 - @ The abort handler must return the aborted address in r0, and 432 - @ the fault status register in r1. 433 - @ 434 - movc r1, p0.c3, #0 @ get FSR 435 - movc r0, p0.c4, #0 @ get FAR 436 - 437 - @ 438 - @ INTRs on, then call the main handler 439 - @ 440 - enable_irq r2 441 - mov r2, sp 442 - adr lr, ret_from_exception 443 - b do_DataAbort 444 - ENDPROC(__dabt_user) 445 - 446 - .align 5 447 - __intr_user: 448 - user_entry 449 - 450 - get_thread_info tsk 451 - 452 - intr_handler 453 - 454 - mov why, #0 455 - b ret_to_user 456 - ENDPROC(__intr_user) 457 - 458 - .ltorg 459 - 460 - .align 5 461 - __extn_user: 462 - user_entry 463 - 464 - mov r0, sp 465 - mov r1, asr 466 - b bad_mode 467 - ENDPROC(__extn_user) 468 - 469 - .align 5 470 - __pabt_user: 471 - user_entry 472 - 473 - mov r0, r2 @ pass address of aborted instruction. 474 - mov r1, #5 475 - enable_irq r1 @ Enable interrupts 476 - mov r2, sp @ regs 477 - b.l do_PrefetchAbort @ call abort handler 478 - /* fall through */ 479 - /* 480 - * This is the return code to user mode for abort handlers 481 - */ 482 - ENTRY(ret_from_exception) 483 - get_thread_info tsk 484 - mov why, #0 485 - b ret_to_user 486 - ENDPROC(__pabt_user) 487 - ENDPROC(ret_from_exception) 488 - 489 - /* 490 - * Register switch for UniCore V2 processors 491 - * r0 = previous task_struct, r1 = previous thread_info, r2 = next thread_info 492 - * previous and next are guaranteed not to be the same. 493 - */ 494 - ENTRY(__switch_to) 495 - add ip, r1, #TI_CPU_SAVE 496 - stm.w (r4 - r15), [ip]+ 497 - stm.w (r16 - r27, sp, lr), [ip]+ 498 - 499 - #ifdef CONFIG_UNICORE_FPU_F64 500 - add ip, r1, #TI_FPSTATE 501 - sfm.w (f0 - f7 ), [ip]+ 502 - sfm.w (f8 - f15), [ip]+ 503 - sfm.w (f16 - f23), [ip]+ 504 - sfm.w (f24 - f31), [ip]+ 505 - cff r4, s31 506 - stw r4, [ip] 507 - 508 - add ip, r2, #TI_FPSTATE 509 - lfm.w (f0 - f7 ), [ip]+ 510 - lfm.w (f8 - f15), [ip]+ 511 - lfm.w (f16 - f23), [ip]+ 512 - lfm.w (f24 - f31), [ip]+ 513 - ldw r4, [ip] 514 - ctf r4, s31 515 - #endif 516 - add ip, r2, #TI_CPU_SAVE 517 - ldm.w (r4 - r15), [ip]+ 518 - ldm (r16 - r27, sp, pc), [ip]+ @ Load all regs saved previously 519 - ENDPROC(__switch_to) 520 - 521 - .align 5 522 - /* 523 - * This is the fast syscall return path. We do as little as 524 - * possible here, and this includes saving r0 back into the PRIV 525 - * stack. 526 - */ 527 - ret_fast_syscall: 528 - disable_irq r1 @ disable interrupts 529 - ldw r1, [tsk+], #TI_FLAGS 530 - cand.a r1, #_TIF_WORK_MASK 531 - bne fast_work_pending 532 - 533 - @ fast_restore_user_regs 534 - restore_user_regs fast = 1, offset = S_OFF 535 - 536 - /* 537 - * Ok, we need to do extra processing, enter the slow path. 538 - */ 539 - fast_work_pending: 540 - stw.w r0, [sp+], #S_R0+S_OFF @ returned r0 541 - work_pending: 542 - cand.a r1, #_TIF_NEED_RESCHED 543 - bne work_resched 544 - mov r0, sp @ 'regs' 545 - mov r2, why @ 'syscall' 546 - cand.a r1, #_TIF_SIGPENDING @ delivering a signal? 547 - cmovne why, #0 @ prevent further restarts 548 - b.l do_notify_resume 549 - b ret_slow_syscall @ Check work again 550 - 551 - work_resched: 552 - b.l schedule 553 - /* 554 - * "slow" syscall return path. "why" tells us if this was a real syscall. 555 - */ 556 - ENTRY(ret_to_user) 557 - ret_slow_syscall: 558 - disable_irq r1 @ disable interrupts 559 - get_thread_info tsk @ epip4d, one path error?! 560 - ldw r1, [tsk+], #TI_FLAGS 561 - cand.a r1, #_TIF_WORK_MASK 562 - bne work_pending 563 - no_work_pending: 564 - @ slow_restore_user_regs 565 - restore_user_regs fast = 0, offset = 0 566 - ENDPROC(ret_to_user) 567 - 568 - /* 569 - * This is how we return from a fork. 570 - */ 571 - ENTRY(ret_from_fork) 572 - b.l schedule_tail 573 - b ret_slow_syscall 574 - ENDPROC(ret_from_fork) 575 - 576 - ENTRY(ret_from_kernel_thread) 577 - b.l schedule_tail 578 - mov r0, r5 579 - adr lr, ret_slow_syscall 580 - mov pc, r4 581 - ENDPROC(ret_from_kernel_thread) 582 - 583 - /*============================================================================= 584 - * SWI handler 585 - *----------------------------------------------------------------------------- 586 - */ 587 - .align 5 588 - ENTRY(vector_swi) 589 - sub sp, sp, #S_FRAME_SIZE 590 - stm (r0 - r15), [sp]+ @ Calling r0 - r15 591 - add r8, sp, #S_R16 592 - stm (r16 - r28), [r8]+ @ Calling r16 - r28 593 - add r8, sp, #S_PC 594 - stur (sp, lr), [r8-] @ Calling sp, lr 595 - mov r8, bsr @ called from non-REAL mode 596 - stw lr, [sp+], #S_PC @ Save calling PC 597 - stw r8, [sp+], #S_PSR @ Save ASR 598 - stw r0, [sp+], #S_OLD_R0 @ Save OLD_R0 599 - zero_fp 600 - 601 - /* 602 - * Get the system call number. 603 - */ 604 - sub ip, lr, #4 605 - ldw.u scno, [ip] @ get SWI instruction 606 - 607 - #ifdef CONFIG_ALIGNMENT_TRAP 608 - ldw ip, __cr_alignment 609 - ldw ip, [ip] 610 - movc p0.c1, ip, #0 @ update control register 611 - #endif 612 - enable_irq ip 613 - 614 - get_thread_info tsk 615 - ldw tbl, =sys_call_table @ load syscall table pointer 616 - 617 - andn scno, scno, #0xff000000 @ mask off SWI op-code 618 - andn scno, scno, #0x00ff0000 @ mask off SWI op-code 619 - 620 - stm.w (r4, r5), [sp-] @ push fifth and sixth args 621 - ldw ip, [tsk+], #TI_FLAGS @ check for syscall tracing 622 - cand.a ip, #_TIF_SYSCALL_TRACE @ are we tracing syscalls? 623 - bne __sys_trace 624 - 625 - csub.a scno, #__NR_syscalls @ check upper syscall limit 626 - adr lr, ret_fast_syscall @ return address 627 - bea 1f 628 - ldw pc, [tbl+], scno << #2 @ call sys_* routine 629 - 1: 630 - add r1, sp, #S_OFF 631 - 2: mov why, #0 @ no longer a real syscall 632 - b sys_ni_syscall @ not private func 633 - 634 - /* 635 - * This is the really slow path. We're going to be doing 636 - * context switches, and waiting for our parent to respond. 637 - */ 638 - __sys_trace: 639 - mov r2, scno 640 - add r1, sp, #S_OFF 641 - mov r0, #0 @ trace entry [IP = 0] 642 - b.l syscall_trace 643 - 644 - adr lr, __sys_trace_return @ return address 645 - mov scno, r0 @ syscall number (possibly new) 646 - add r1, sp, #S_R0 + S_OFF @ pointer to regs 647 - csub.a scno, #__NR_syscalls @ check upper syscall limit 648 - bea 2b 649 - ldm (r0 - r3), [r1]+ @ have to reload r0 - r3 650 - ldw pc, [tbl+], scno << #2 @ call sys_* routine 651 - 652 - __sys_trace_return: 653 - stw.w r0, [sp+], #S_R0 + S_OFF @ save returned r0 654 - mov r2, scno 655 - mov r1, sp 656 - mov r0, #1 @ trace exit [IP = 1] 657 - b.l syscall_trace 658 - b ret_slow_syscall 659 - 660 - .align 5 661 - #ifdef CONFIG_ALIGNMENT_TRAP 662 - .type __cr_alignment, #object 663 - __cr_alignment: 664 - .word cr_alignment 665 - #endif 666 - .ltorg 667 - 668 - ENTRY(sys_rt_sigreturn) 669 - add r0, sp, #S_OFF 670 - mov why, #0 @ prevent syscall restart handling 671 - b __sys_rt_sigreturn 672 - ENDPROC(sys_rt_sigreturn) 673 - 674 - __INIT 675 - 676 - /* 677 - * Vector stubs. 678 - * 679 - * This code is copied to 0xffff0200 so we can use branches in the 680 - * vectors, rather than ldr's. Note that this code must not 681 - * exceed 0x300 bytes. 682 - * 683 - * Common stub entry macro: 684 - * Enter in INTR mode, bsr = PRIV/USER ASR, lr = PRIV/USER PC 685 - * 686 - * SP points to a minimal amount of processor-private memory, the address 687 - * of which is copied into r0 for the mode specific abort handler. 688 - */ 689 - .macro vector_stub, name, mode 690 - .align 5 691 - 692 - vector_\name: 693 - @ 694 - @ Save r0, lr_<exception> (parent PC) and bsr_<exception> 695 - @ (parent ASR) 696 - @ 697 - stw r0, [sp] 698 - stw lr, [sp+], #4 @ save r0, lr 699 - mov lr, bsr 700 - stw lr, [sp+], #8 @ save bsr 701 - 702 - @ 703 - @ Prepare for PRIV mode. INTRs remain disabled. 704 - @ 705 - mov r0, asr 706 - xor r0, r0, #(\mode ^ PRIV_MODE) 707 - mov.a bsr, r0 708 - 709 - @ 710 - @ the branch table must immediately follow this code 711 - @ 712 - and lr, lr, #0x03 713 - add lr, lr, #1 714 - mov r0, sp 715 - ldw lr, [pc+], lr << #2 716 - mov.a pc, lr @ branch to handler in PRIV mode 717 - ENDPROC(vector_\name) 718 - .align 2 719 - @ handler addresses follow this label 720 - .endm 721 - 722 - .globl __stubs_start 723 - __stubs_start: 724 - /* 725 - * Interrupt dispatcher 726 - */ 727 - vector_stub intr, INTR_MODE 728 - 729 - .long __intr_user @ 0 (USER) 730 - .long __invalid @ 1 731 - .long __invalid @ 2 732 - .long __intr_priv @ 3 (PRIV) 733 - 734 - /* 735 - * Data abort dispatcher 736 - * Enter in ABT mode, bsr = USER ASR, lr = USER PC 737 - */ 738 - vector_stub dabt, ABRT_MODE 739 - 740 - .long __dabt_user @ 0 (USER) 741 - .long __invalid @ 1 742 - .long __invalid @ 2 (INTR) 743 - .long __dabt_priv @ 3 (PRIV) 744 - 745 - /* 746 - * Prefetch abort dispatcher 747 - * Enter in ABT mode, bsr = USER ASR, lr = USER PC 748 - */ 749 - vector_stub pabt, ABRT_MODE 750 - 751 - .long __pabt_user @ 0 (USER) 752 - .long __invalid @ 1 753 - .long __invalid @ 2 (INTR) 754 - .long __pabt_priv @ 3 (PRIV) 755 - 756 - /* 757 - * Undef instr entry dispatcher 758 - * Enter in EXTN mode, bsr = PRIV/USER ASR, lr = PRIV/USER PC 759 - */ 760 - vector_stub extn, EXTN_MODE 761 - 762 - .long __extn_user @ 0 (USER) 763 - .long __invalid @ 1 764 - .long __invalid @ 2 (INTR) 765 - .long __extn_priv @ 3 (PRIV) 766 - 767 - /* 768 - * We group all the following data together to optimise 769 - * for CPUs with separate I & D caches. 770 - */ 771 - .align 5 772 - 773 - .LCvswi: 774 - .word vector_swi 775 - 776 - .globl __stubs_end 777 - __stubs_end: 778 - 779 - .equ stubs_offset, __vectors_start + 0x200 - __stubs_start 780 - 781 - .globl __vectors_start 782 - __vectors_start: 783 - jepriv SYS_ERROR0 784 - b vector_extn + stubs_offset 785 - ldw pc, .LCvswi + stubs_offset 786 - b vector_pabt + stubs_offset 787 - b vector_dabt + stubs_offset 788 - jepriv SYS_ERROR0 789 - b vector_intr + stubs_offset 790 - jepriv SYS_ERROR0 791 - 792 - .globl __vectors_end 793 - __vectors_end: 794 - 795 - .data 796 - 797 - .globl cr_alignment 798 - .globl cr_no_alignment 799 - cr_alignment: 800 - .space 4 801 - cr_no_alignment: 802 - .space 4
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arch/unicore32/kernel/fpu-ucf64.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/fpu-ucf64.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/module.h> 10 - #include <linux/types.h> 11 - #include <linux/kernel.h> 12 - #include <linux/signal.h> 13 - #include <linux/sched/signal.h> 14 - #include <linux/init.h> 15 - 16 - #include <asm/fpu-ucf64.h> 17 - 18 - /* 19 - * A special flag to tell the normalisation code not to normalise. 20 - */ 21 - #define F64_NAN_FLAG 0x100 22 - 23 - /* 24 - * A bit pattern used to indicate the initial (unset) value of the 25 - * exception mask, in case nothing handles an instruction. This 26 - * doesn't include the NAN flag, which get masked out before 27 - * we check for an error. 28 - */ 29 - #define F64_EXCEPTION_ERROR ((u32)-1 & ~F64_NAN_FLAG) 30 - 31 - /* 32 - * Since we aren't building with -mfpu=f64, we need to code 33 - * these instructions using their MRC/MCR equivalents. 34 - */ 35 - #define f64reg(_f64_) #_f64_ 36 - 37 - #define cff(_f64_) ({ \ 38 - u32 __v; \ 39 - asm("cff %0, " f64reg(_f64_) "@ fmrx %0, " #_f64_ \ 40 - : "=r" (__v) : : "cc"); \ 41 - __v; \ 42 - }) 43 - 44 - #define ctf(_f64_, _var_) \ 45 - asm("ctf %0, " f64reg(_f64_) "@ fmxr " #_f64_ ", %0" \ 46 - : : "r" (_var_) : "cc") 47 - 48 - /* 49 - * Raise a SIGFPE for the current process. 50 - * sicode describes the signal being raised. 51 - */ 52 - void ucf64_raise_sigfpe(struct pt_regs *regs) 53 - { 54 - /* 55 - * This is the same as NWFPE, because it's not clear what 56 - * this is used for 57 - */ 58 - current->thread.error_code = 0; 59 - current->thread.trap_no = 6; 60 - 61 - send_sig_fault(SIGFPE, FPE_FLTUNK, 62 - (void __user *)(instruction_pointer(regs) - 4), 63 - current); 64 - } 65 - 66 - /* 67 - * Handle exceptions of UniCore-F64. 68 - */ 69 - void ucf64_exchandler(u32 inst, u32 fpexc, struct pt_regs *regs) 70 - { 71 - u32 tmp = fpexc; 72 - u32 exc = F64_EXCEPTION_ERROR & fpexc; 73 - 74 - pr_debug("UniCore-F64: instruction %08x fpscr %08x\n", 75 - inst, fpexc); 76 - 77 - if (exc & FPSCR_CMPINSTR_BIT) { 78 - if (exc & FPSCR_CON) 79 - tmp |= FPSCR_CON; 80 - else 81 - tmp &= ~(FPSCR_CON); 82 - exc &= ~(FPSCR_CMPINSTR_BIT | FPSCR_CON); 83 - } else { 84 - pr_debug("UniCore-F64 Error: unhandled exceptions\n"); 85 - pr_debug("UniCore-F64 FPSCR 0x%08x INST 0x%08x\n", 86 - cff(FPSCR), inst); 87 - 88 - ucf64_raise_sigfpe(regs); 89 - return; 90 - } 91 - 92 - /* 93 - * Update the FPSCR with the additional exception flags. 94 - * Comparison instructions always return at least one of 95 - * these flags set. 96 - */ 97 - tmp &= ~(FPSCR_TRAP | FPSCR_IOS | FPSCR_OFS | FPSCR_UFS | 98 - FPSCR_IXS | FPSCR_HIS | FPSCR_IOC | FPSCR_OFC | 99 - FPSCR_UFC | FPSCR_IXC | FPSCR_HIC); 100 - 101 - tmp |= exc; 102 - ctf(FPSCR, tmp); 103 - } 104 - 105 - /* 106 - * F64 support code initialisation. 107 - */ 108 - static int __init ucf64_init(void) 109 - { 110 - ctf(FPSCR, 0x0); /* FPSCR_UFE | FPSCR_NDE perhaps better */ 111 - 112 - printk(KERN_INFO "Enable UniCore-F64 support.\n"); 113 - 114 - return 0; 115 - } 116 - 117 - late_initcall(ucf64_init);
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arch/unicore32/kernel/gpio.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/gpio.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn> 8 - * Copyright (C) 2001-2010 Guan Xuetao 9 - */ 10 - /* in FPGA, no GPIO support */ 11 - 12 - #include <linux/init.h> 13 - #include <linux/module.h> 14 - #include <linux/gpio/driver.h> 15 - /* FIXME: needed for gpio_set_value() - convert to use descriptors or hogs */ 16 - #include <linux/gpio.h> 17 - #include <mach/hardware.h> 18 - 19 - #ifdef CONFIG_LEDS 20 - #include <linux/leds.h> 21 - #include <linux/platform_device.h> 22 - 23 - static const struct gpio_led puv3_gpio_leds[] = { 24 - { .name = "cpuhealth", .gpio = GPO_CPU_HEALTH, .active_low = 0, 25 - .default_trigger = "heartbeat", }, 26 - { .name = "hdd_led", .gpio = GPO_HDD_LED, .active_low = 1, 27 - .default_trigger = "disk-activity", }, 28 - }; 29 - 30 - static const struct gpio_led_platform_data puv3_gpio_led_data = { 31 - .num_leds = ARRAY_SIZE(puv3_gpio_leds), 32 - .leds = (void *) puv3_gpio_leds, 33 - }; 34 - 35 - static struct platform_device puv3_gpio_gpio_leds = { 36 - .name = "leds-gpio", 37 - .id = -1, 38 - .dev = { 39 - .platform_data = (void *) &puv3_gpio_led_data, 40 - } 41 - }; 42 - 43 - static int __init puv3_gpio_leds_init(void) 44 - { 45 - platform_device_register(&puv3_gpio_gpio_leds); 46 - return 0; 47 - } 48 - 49 - device_initcall(puv3_gpio_leds_init); 50 - #endif 51 - 52 - static int puv3_gpio_get(struct gpio_chip *chip, unsigned offset) 53 - { 54 - return !!(readl(GPIO_GPLR) & GPIO_GPIO(offset)); 55 - } 56 - 57 - static void puv3_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 58 - { 59 - if (value) 60 - writel(GPIO_GPIO(offset), GPIO_GPSR); 61 - else 62 - writel(GPIO_GPIO(offset), GPIO_GPCR); 63 - } 64 - 65 - static int puv3_direction_input(struct gpio_chip *chip, unsigned offset) 66 - { 67 - unsigned long flags; 68 - 69 - local_irq_save(flags); 70 - writel(readl(GPIO_GPDR) & ~GPIO_GPIO(offset), GPIO_GPDR); 71 - local_irq_restore(flags); 72 - return 0; 73 - } 74 - 75 - static int puv3_direction_output(struct gpio_chip *chip, unsigned offset, 76 - int value) 77 - { 78 - unsigned long flags; 79 - 80 - local_irq_save(flags); 81 - puv3_gpio_set(chip, offset, value); 82 - writel(readl(GPIO_GPDR) | GPIO_GPIO(offset), GPIO_GPDR); 83 - local_irq_restore(flags); 84 - return 0; 85 - } 86 - 87 - static struct gpio_chip puv3_gpio_chip = { 88 - .label = "gpio", 89 - .direction_input = puv3_direction_input, 90 - .direction_output = puv3_direction_output, 91 - .set = puv3_gpio_set, 92 - .get = puv3_gpio_get, 93 - .base = 0, 94 - .ngpio = GPIO_MAX + 1, 95 - }; 96 - 97 - void __init puv3_init_gpio(void) 98 - { 99 - writel(GPIO_DIR, GPIO_GPDR); 100 - #if defined(CONFIG_PUV3_NB0916) || defined(CONFIG_PUV3_SMW0919) \ 101 - || defined(CONFIG_PUV3_DB0913) 102 - gpio_set_value(GPO_WIFI_EN, 1); 103 - gpio_set_value(GPO_HDD_LED, 1); 104 - gpio_set_value(GPO_VGA_EN, 1); 105 - gpio_set_value(GPO_LCD_EN, 1); 106 - gpio_set_value(GPO_CAM_PWR_EN, 0); 107 - gpio_set_value(GPO_LCD_VCC_EN, 1); 108 - gpio_set_value(GPO_SOFT_OFF, 1); 109 - gpio_set_value(GPO_BT_EN, 1); 110 - gpio_set_value(GPO_FAN_ON, 0); 111 - gpio_set_value(GPO_SPKR, 0); 112 - gpio_set_value(GPO_CPU_HEALTH, 1); 113 - gpio_set_value(GPO_LAN_SEL, 1); 114 - /* 115 - * DO NOT modify the GPO_SET_V1 and GPO_SET_V2 in kernel 116 - * gpio_set_value(GPO_SET_V1, 1); 117 - * gpio_set_value(GPO_SET_V2, 1); 118 - */ 119 - #endif 120 - gpiochip_add_data(&puv3_gpio_chip, NULL); 121 - }
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arch/unicore32/kernel/head.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/kernel/head.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/linkage.h> 10 - #include <linux/init.h> 11 - 12 - #include <asm/assembler.h> 13 - #include <asm/ptrace.h> 14 - #include <generated/asm-offsets.h> 15 - #include <asm/memory.h> 16 - #include <asm/thread_info.h> 17 - #include <asm/hwdef-copro.h> 18 - #include <asm/pgtable-hwdef.h> 19 - 20 - #if (PHYS_OFFSET & 0x003fffff) 21 - #error "PHYS_OFFSET must be at an even 4MiB boundary!" 22 - #endif 23 - 24 - #define KERNEL_RAM_VADDR (PAGE_OFFSET + KERNEL_IMAGE_START) 25 - #define KERNEL_RAM_PADDR (PHYS_OFFSET + KERNEL_IMAGE_START) 26 - 27 - #define KERNEL_PGD_PADDR (KERNEL_RAM_PADDR - 0x1000) 28 - #define KERNEL_PGD_VADDR (KERNEL_RAM_VADDR - 0x1000) 29 - 30 - #define KERNEL_START KERNEL_RAM_VADDR 31 - #define KERNEL_END _end 32 - 33 - /* 34 - * swapper_pg_dir is the virtual address of the initial page table. 35 - * We place the page tables 4K below KERNEL_RAM_VADDR. Therefore, we must 36 - * make sure that KERNEL_RAM_VADDR is correctly set. Currently, we expect 37 - * the least significant 16 bits to be 0x8000, but we could probably 38 - * relax this restriction to KERNEL_RAM_VADDR >= PAGE_OFFSET + 0x1000. 39 - */ 40 - #if (KERNEL_RAM_VADDR & 0xffff) != 0x8000 41 - #error KERNEL_RAM_VADDR must start at 0xXXXX8000 42 - #endif 43 - 44 - .globl swapper_pg_dir 45 - .equ swapper_pg_dir, KERNEL_RAM_VADDR - 0x1000 46 - 47 - /* 48 - * Kernel startup entry point. 49 - * --------------------------- 50 - * 51 - * This is normally called from the decompressor code. The requirements 52 - * are: MMU = off, D-cache = off, I-cache = dont care 53 - * 54 - * This code is mostly position independent, so if you link the kernel at 55 - * 0xc0008000, you call this at __pa(0xc0008000). 56 - */ 57 - __HEAD 58 - ENTRY(stext) 59 - @ set asr 60 - mov r0, #PRIV_MODE @ ensure priv mode 61 - or r0, #PSR_R_BIT | PSR_I_BIT @ disable irqs 62 - mov.a asr, r0 63 - 64 - @ process identify 65 - movc r0, p0.c0, #0 @ cpuid 66 - movl r1, 0xff00ffff @ mask 67 - movl r2, 0x4d000863 @ value 68 - and r0, r1, r0 69 - cxor.a r0, r2 70 - bne __error_p @ invalid processor id 71 - 72 - /* 73 - * Clear the 4K level 1 swapper page table 74 - */ 75 - movl r0, #KERNEL_PGD_PADDR @ page table address 76 - mov r1, #0 77 - add r2, r0, #0x1000 78 - 101: stw.w r1, [r0]+, #4 79 - stw.w r1, [r0]+, #4 80 - stw.w r1, [r0]+, #4 81 - stw.w r1, [r0]+, #4 82 - cxor.a r0, r2 83 - bne 101b 84 - 85 - movl r4, #KERNEL_PGD_PADDR @ page table address 86 - mov r7, #PMD_TYPE_SECT | PMD_PRESENT @ page size: section 87 - or r7, r7, #PMD_SECT_CACHEABLE @ cacheable 88 - or r7, r7, #PMD_SECT_READ | PMD_SECT_WRITE | PMD_SECT_EXEC 89 - 90 - /* 91 - * Create identity mapping for first 4MB of kernel to 92 - * cater for the MMU enable. This identity mapping 93 - * will be removed by paging_init(). We use our current program 94 - * counter to determine corresponding section base address. 95 - */ 96 - mov r6, pc 97 - mov r6, r6 >> #22 @ start of kernel section 98 - or r1, r7, r6 << #22 @ flags + kernel base 99 - stw r1, [r4+], r6 << #2 @ identity mapping 100 - 101 - /* 102 - * Now setup the pagetables for our kernel direct 103 - * mapped region. 104 - */ 105 - add r0, r4, #(KERNEL_START & 0xff000000) >> 20 106 - stw.w r1, [r0+], #(KERNEL_START & 0x00c00000) >> 20 107 - movl r6, #(KERNEL_END - 1) 108 - add r0, r0, #4 109 - add r6, r4, r6 >> #20 110 - 102: csub.a r0, r6 111 - add r1, r1, #1 << 22 112 - bua 103f 113 - stw.w r1, [r0]+, #4 114 - b 102b 115 - 103: 116 - /* 117 - * Then map first 4MB of ram in case it contains our boot params. 118 - */ 119 - add r0, r4, #PAGE_OFFSET >> 20 120 - or r6, r7, #(PHYS_OFFSET & 0xffc00000) 121 - stw r6, [r0] 122 - 123 - ldw r15, __switch_data @ address to jump to after 124 - 125 - /* 126 - * Initialise TLB, Caches, and MMU state ready to switch the MMU 127 - * on. 128 - */ 129 - mov r0, #0 130 - movc p0.c5, r0, #28 @ cache invalidate all 131 - nop8 132 - movc p0.c6, r0, #6 @ TLB invalidate all 133 - nop8 134 - 135 - /* 136 - * ..V. .... ..TB IDAM 137 - * ..1. .... ..01 1111 138 - */ 139 - movl r0, #0x201f @ control register setting 140 - 141 - /* 142 - * Setup common bits before finally enabling the MMU. Essentially 143 - * this is just loading the page table pointer and domain access 144 - * registers. 145 - */ 146 - #ifndef CONFIG_ALIGNMENT_TRAP 147 - andn r0, r0, #CR_A 148 - #endif 149 - #ifdef CONFIG_CPU_DCACHE_DISABLE 150 - andn r0, r0, #CR_D 151 - #endif 152 - #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH 153 - andn r0, r0, #CR_B 154 - #endif 155 - #ifdef CONFIG_CPU_ICACHE_DISABLE 156 - andn r0, r0, #CR_I 157 - #endif 158 - 159 - movc p0.c2, r4, #0 @ set pgd 160 - b __turn_mmu_on 161 - ENDPROC(stext) 162 - 163 - /* 164 - * Enable the MMU. This completely changes the structure of the visible 165 - * memory space. You will not be able to trace execution through this. 166 - * 167 - * r0 = cp#0 control register 168 - * r15 = *virtual* address to jump to upon completion 169 - */ 170 - .align 5 171 - __turn_mmu_on: 172 - mov r0, r0 173 - movc p0.c1, r0, #0 @ write control reg 174 - nop @ fetch inst by phys addr 175 - mov pc, r15 176 - nop8 @ fetch inst by phys addr 177 - ENDPROC(__turn_mmu_on) 178 - 179 - /* 180 - * Setup the initial page tables. We only setup the barest 181 - * amount which are required to get the kernel running, which 182 - * generally means mapping in the kernel code. 183 - * 184 - * r9 = cpuid 185 - * r10 = procinfo 186 - * 187 - * Returns: 188 - * r0, r3, r6, r7 corrupted 189 - * r4 = physical page table address 190 - */ 191 - .ltorg 192 - 193 - .align 2 194 - .type __switch_data, %object 195 - __switch_data: 196 - .long __mmap_switched 197 - .long __bss_start @ r6 198 - .long _end @ r7 199 - .long cr_alignment @ r8 200 - .long init_thread_union + THREAD_START_SP @ sp 201 - 202 - /* 203 - * The following fragment of code is executed with the MMU on in MMU mode, 204 - * and uses absolute addresses; this is not position independent. 205 - * 206 - * r0 = cp#0 control register 207 - */ 208 - __mmap_switched: 209 - adr r3, __switch_data + 4 210 - 211 - ldm.w (r6, r7, r8), [r3]+ 212 - ldw sp, [r3] 213 - 214 - mov fp, #0 @ Clear BSS (and zero fp) 215 - 203: csub.a r6, r7 216 - bea 204f 217 - stw.w fp, [r6]+,#4 218 - b 203b 219 - 204: 220 - andn r1, r0, #CR_A @ Clear 'A' bit 221 - stm (r0, r1), [r8]+ @ Save control register values 222 - b start_kernel 223 - ENDPROC(__mmap_switched) 224 - 225 - /* 226 - * Exception handling. Something went wrong and we can't proceed. We 227 - * ought to tell the user, but since we don't have any guarantee that 228 - * we're even running on the right architecture, we do virtually nothing. 229 - * 230 - * If CONFIG_DEBUG_LL is set we try to print out something about the error 231 - * and hope for the best (useful if bootloader fails to pass a proper 232 - * machine ID for example). 233 - */ 234 - __error_p: 235 - #ifdef CONFIG_DEBUG_LL 236 - adr r0, str_p1 237 - b.l printascii 238 - mov r0, r9 239 - b.l printhex8 240 - adr r0, str_p2 241 - b.l printascii 242 - 901: nop8 243 - b 901b 244 - str_p1: .asciz "\nError: unrecognized processor variant (0x" 245 - str_p2: .asciz ").\n" 246 - .align 247 - #endif 248 - ENDPROC(__error_p) 249 -
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arch/unicore32/kernel/hibernate.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/hibernate.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn> 8 - * Copyright (C) 2001-2010 Guan Xuetao 9 - */ 10 - 11 - #include <linux/gfp.h> 12 - #include <linux/suspend.h> 13 - #include <linux/memblock.h> 14 - #include <linux/pgtable.h> 15 - 16 - #include <asm/page.h> 17 - #include <asm/pgalloc.h> 18 - #include <asm/sections.h> 19 - #include <asm/suspend.h> 20 - 21 - #include "mach/pm.h" 22 - 23 - /* Pointer to the temporary resume page tables */ 24 - pgd_t *resume_pg_dir; 25 - 26 - struct swsusp_arch_regs swsusp_arch_regs_cpu0; 27 - 28 - /* 29 - * Create a middle page table on a resume-safe page and put a pointer to it in 30 - * the given global directory entry. This only returns the gd entry 31 - * in non-PAE compilation mode, since the middle layer is folded. 32 - */ 33 - static pmd_t *resume_one_md_table_init(pgd_t *pgd) 34 - { 35 - pud_t *pud; 36 - p4d_t *p4d; 37 - pmd_t *pmd_table; 38 - 39 - p4d = p4d_offset(pgd, 0); 40 - pud = pud_offset(p4d, 0); 41 - pmd_table = pmd_offset(pud, 0); 42 - 43 - return pmd_table; 44 - } 45 - 46 - /* 47 - * Create a page table on a resume-safe page and place a pointer to it in 48 - * a middle page directory entry. 49 - */ 50 - static pte_t *resume_one_page_table_init(pmd_t *pmd) 51 - { 52 - if (pmd_none(*pmd)) { 53 - pte_t *page_table = (pte_t *)get_safe_page(GFP_ATOMIC); 54 - if (!page_table) 55 - return NULL; 56 - 57 - set_pmd(pmd, __pmd(__pa(page_table) | _PAGE_KERNEL_TABLE)); 58 - 59 - BUG_ON(page_table != pte_offset_kernel(pmd, 0)); 60 - 61 - return page_table; 62 - } 63 - 64 - return pte_offset_kernel(pmd, 0); 65 - } 66 - 67 - /* 68 - * This maps the physical memory to kernel virtual address space, a total 69 - * of max_low_pfn pages, by creating page tables starting from address 70 - * PAGE_OFFSET. The page tables are allocated out of resume-safe pages. 71 - */ 72 - static int resume_physical_mapping_init(pgd_t *pgd_base) 73 - { 74 - unsigned long pfn; 75 - pgd_t *pgd; 76 - pmd_t *pmd; 77 - pte_t *pte; 78 - int pgd_idx, pmd_idx; 79 - 80 - pgd_idx = pgd_index(PAGE_OFFSET); 81 - pgd = pgd_base + pgd_idx; 82 - pfn = 0; 83 - 84 - for (; pgd_idx < PTRS_PER_PGD; pgd++, pgd_idx++) { 85 - pmd = resume_one_md_table_init(pgd); 86 - if (!pmd) 87 - return -ENOMEM; 88 - 89 - if (pfn >= max_low_pfn) 90 - continue; 91 - 92 - for (pmd_idx = 0; pmd_idx < PTRS_PER_PMD; pmd++, pmd_idx++) { 93 - pte_t *max_pte; 94 - 95 - if (pfn >= max_low_pfn) 96 - break; 97 - 98 - /* Map with normal page tables. 99 - * NOTE: We can mark everything as executable here 100 - */ 101 - pte = resume_one_page_table_init(pmd); 102 - if (!pte) 103 - return -ENOMEM; 104 - 105 - max_pte = pte + PTRS_PER_PTE; 106 - for (; pte < max_pte; pte++, pfn++) { 107 - if (pfn >= max_low_pfn) 108 - break; 109 - 110 - set_pte(pte, pfn_pte(pfn, PAGE_KERNEL_EXEC)); 111 - } 112 - } 113 - } 114 - 115 - return 0; 116 - } 117 - 118 - static inline void resume_init_first_level_page_table(pgd_t *pg_dir) 119 - { 120 - } 121 - 122 - int swsusp_arch_resume(void) 123 - { 124 - int error; 125 - 126 - resume_pg_dir = (pgd_t *)get_safe_page(GFP_ATOMIC); 127 - if (!resume_pg_dir) 128 - return -ENOMEM; 129 - 130 - resume_init_first_level_page_table(resume_pg_dir); 131 - error = resume_physical_mapping_init(resume_pg_dir); 132 - if (error) 133 - return error; 134 - 135 - /* We have got enough memory and from now on we cannot recover */ 136 - restore_image(resume_pg_dir, restore_pblist); 137 - return 0; 138 - } 139 - 140 - /* 141 - * pfn_is_nosave - check if given pfn is in the 'nosave' section 142 - */ 143 - 144 - int pfn_is_nosave(unsigned long pfn) 145 - { 146 - unsigned long begin_pfn = __pa(&__nosave_begin) >> PAGE_SHIFT; 147 - unsigned long end_pfn = PAGE_ALIGN(__pa(&__nosave_end)) >> PAGE_SHIFT; 148 - 149 - return (pfn >= begin_pfn) && (pfn < end_pfn); 150 - } 151 - 152 - void save_processor_state(void) 153 - { 154 - } 155 - 156 - void restore_processor_state(void) 157 - { 158 - local_flush_tlb_all(); 159 - }
-114
arch/unicore32/kernel/hibernate_asm.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/kernel/hibernate_asm.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn> 8 - * Copyright (C) 2001-2010 Guan Xuetao 9 - */ 10 - 11 - #include <linux/sys.h> 12 - #include <linux/errno.h> 13 - #include <linux/linkage.h> 14 - #include <linux/pgtable.h> 15 - #include <generated/asm-offsets.h> 16 - #include <asm/page.h> 17 - #include <asm/assembler.h> 18 - 19 - @ restore_image(pgd_t *resume_pg_dir, struct pbe *restore_pblist) 20 - @ r0: resume_pg_dir 21 - @ r1: restore_pblist 22 - @ copy restore_pblist pages 23 - @ restore registers from swsusp_arch_regs_cpu0 24 - @ 25 - ENTRY(restore_image) 26 - sub r0, r0, #PAGE_OFFSET 27 - mov r5, #0 28 - movc p0.c6, r5, #6 @invalidate ITLB & DTLB 29 - movc p0.c2, r0, #0 30 - nop 31 - nop 32 - nop 33 - nop 34 - nop 35 - nop 36 - nop 37 - 38 - .p2align 4,,7 39 - 101: 40 - csub.a r1, #0 41 - beq 109f 42 - 43 - ldw r6, [r1+], #PBE_ADDRESS 44 - ldw r7, [r1+], #PBE_ORIN_ADDRESS 45 - 46 - movl ip, #128 47 - 102: ldm.w (r8 - r15), [r6]+ 48 - stm.w (r8 - r15), [r7]+ 49 - sub.a ip, ip, #1 50 - bne 102b 51 - 52 - ldw r1, [r1+], #PBE_NEXT 53 - b 101b 54 - 55 - .p2align 4,,7 56 - 109: 57 - /* go back to the original page tables */ 58 - ldw r0, =swapper_pg_dir 59 - sub r0, r0, #PAGE_OFFSET 60 - mov r5, #0 61 - movc p0.c6, r5, #6 62 - movc p0.c2, r0, #0 63 - nop 64 - nop 65 - nop 66 - nop 67 - nop 68 - nop 69 - nop 70 - 71 - #ifdef CONFIG_UNICORE_FPU_F64 72 - ldw ip, 1f 73 - add ip, ip, #SWSUSP_FPSTATE 74 - lfm.w (f0 - f7 ), [ip]+ 75 - lfm.w (f8 - f15), [ip]+ 76 - lfm.w (f16 - f23), [ip]+ 77 - lfm.w (f24 - f31), [ip]+ 78 - ldw r4, [ip] 79 - ctf r4, s31 80 - #endif 81 - mov r0, #0x0 82 - ldw ip, 1f 83 - add ip, ip, #SWSUSP_CPU 84 - ldm.w (r4 - r15), [ip]+ 85 - ldm (r16 - r27, sp, pc), [ip]+ @ Load all regs saved previously 86 - 87 - .align 2 88 - 1: .long swsusp_arch_regs_cpu0 89 - 90 - 91 - @ swsusp_arch_suspend() 92 - @ - prepare pc for resume, return from function without swsusp_save on resume 93 - @ - save registers in swsusp_arch_regs_cpu0 94 - @ - call swsusp_save write suspend image 95 - 96 - ENTRY(swsusp_arch_suspend) 97 - ldw ip, 1f 98 - add ip, ip, #SWSUSP_CPU 99 - stm.w (r4 - r15), [ip]+ 100 - stm.w (r16 - r27, sp, lr), [ip]+ 101 - 102 - #ifdef CONFIG_UNICORE_FPU_F64 103 - ldw ip, 1f 104 - add ip, ip, #SWSUSP_FPSTATE 105 - sfm.w (f0 - f7 ), [ip]+ 106 - sfm.w (f8 - f15), [ip]+ 107 - sfm.w (f16 - f23), [ip]+ 108 - sfm.w (f24 - f31), [ip]+ 109 - cff r4, s31 110 - stw r4, [ip] 111 - #endif 112 - b swsusp_save @ no return 113 - 114 - 1: .long swsusp_arch_regs_cpu0
-371
arch/unicore32/kernel/irq.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/irq.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/kernel_stat.h> 10 - #include <linux/module.h> 11 - #include <linux/signal.h> 12 - #include <linux/ioport.h> 13 - #include <linux/interrupt.h> 14 - #include <linux/irq.h> 15 - #include <linux/random.h> 16 - #include <linux/smp.h> 17 - #include <linux/init.h> 18 - #include <linux/seq_file.h> 19 - #include <linux/errno.h> 20 - #include <linux/list.h> 21 - #include <linux/kallsyms.h> 22 - #include <linux/proc_fs.h> 23 - #include <linux/syscore_ops.h> 24 - 25 - #include <mach/hardware.h> 26 - 27 - #include "setup.h" 28 - 29 - /* 30 - * PKUnity GPIO edge detection for IRQs: 31 - * IRQs are generated on Falling-Edge, Rising-Edge, or both. 32 - * Use this instead of directly setting GRER/GFER. 33 - */ 34 - static int GPIO_IRQ_rising_edge; 35 - static int GPIO_IRQ_falling_edge; 36 - static int GPIO_IRQ_mask = 0; 37 - 38 - #define GPIO_MASK(irq) (1 << (irq - IRQ_GPIO0)) 39 - 40 - static int puv3_gpio_type(struct irq_data *d, unsigned int type) 41 - { 42 - unsigned int mask; 43 - 44 - if (d->irq < IRQ_GPIOHIGH) 45 - mask = 1 << d->irq; 46 - else 47 - mask = GPIO_MASK(d->irq); 48 - 49 - if (type == IRQ_TYPE_PROBE) { 50 - if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask) 51 - return 0; 52 - type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; 53 - } 54 - 55 - if (type & IRQ_TYPE_EDGE_RISING) 56 - GPIO_IRQ_rising_edge |= mask; 57 - else 58 - GPIO_IRQ_rising_edge &= ~mask; 59 - if (type & IRQ_TYPE_EDGE_FALLING) 60 - GPIO_IRQ_falling_edge |= mask; 61 - else 62 - GPIO_IRQ_falling_edge &= ~mask; 63 - 64 - writel(GPIO_IRQ_rising_edge & GPIO_IRQ_mask, GPIO_GRER); 65 - writel(GPIO_IRQ_falling_edge & GPIO_IRQ_mask, GPIO_GFER); 66 - 67 - return 0; 68 - } 69 - 70 - /* 71 - * GPIO IRQs must be acknowledged. This is for IRQs from 0 to 7. 72 - */ 73 - static void puv3_low_gpio_ack(struct irq_data *d) 74 - { 75 - writel((1 << d->irq), GPIO_GEDR); 76 - } 77 - 78 - static void puv3_low_gpio_mask(struct irq_data *d) 79 - { 80 - writel(readl(INTC_ICMR) & ~(1 << d->irq), INTC_ICMR); 81 - } 82 - 83 - static void puv3_low_gpio_unmask(struct irq_data *d) 84 - { 85 - writel(readl(INTC_ICMR) | (1 << d->irq), INTC_ICMR); 86 - } 87 - 88 - static int puv3_low_gpio_wake(struct irq_data *d, unsigned int on) 89 - { 90 - if (on) 91 - writel(readl(PM_PWER) | (1 << d->irq), PM_PWER); 92 - else 93 - writel(readl(PM_PWER) & ~(1 << d->irq), PM_PWER); 94 - return 0; 95 - } 96 - 97 - static struct irq_chip puv3_low_gpio_chip = { 98 - .name = "GPIO-low", 99 - .irq_ack = puv3_low_gpio_ack, 100 - .irq_mask = puv3_low_gpio_mask, 101 - .irq_unmask = puv3_low_gpio_unmask, 102 - .irq_set_type = puv3_gpio_type, 103 - .irq_set_wake = puv3_low_gpio_wake, 104 - }; 105 - 106 - /* 107 - * IRQ8 (GPIO0 through 27) handler. We enter here with the 108 - * irq_controller_lock held, and IRQs disabled. Decode the IRQ 109 - * and call the handler. 110 - */ 111 - static void puv3_gpio_handler(struct irq_desc *desc) 112 - { 113 - unsigned int mask, irq; 114 - 115 - mask = readl(GPIO_GEDR); 116 - do { 117 - /* 118 - * clear down all currently active IRQ sources. 119 - * We will be processing them all. 120 - */ 121 - writel(mask, GPIO_GEDR); 122 - 123 - irq = IRQ_GPIO0; 124 - do { 125 - if (mask & 1) 126 - generic_handle_irq(irq); 127 - mask >>= 1; 128 - irq++; 129 - } while (mask); 130 - mask = readl(GPIO_GEDR); 131 - } while (mask); 132 - } 133 - 134 - /* 135 - * GPIO0-27 edge IRQs need to be handled specially. 136 - * In addition, the IRQs are all collected up into one bit in the 137 - * interrupt controller registers. 138 - */ 139 - static void puv3_high_gpio_ack(struct irq_data *d) 140 - { 141 - unsigned int mask = GPIO_MASK(d->irq); 142 - 143 - writel(mask, GPIO_GEDR); 144 - } 145 - 146 - static void puv3_high_gpio_mask(struct irq_data *d) 147 - { 148 - unsigned int mask = GPIO_MASK(d->irq); 149 - 150 - GPIO_IRQ_mask &= ~mask; 151 - 152 - writel(readl(GPIO_GRER) & ~mask, GPIO_GRER); 153 - writel(readl(GPIO_GFER) & ~mask, GPIO_GFER); 154 - } 155 - 156 - static void puv3_high_gpio_unmask(struct irq_data *d) 157 - { 158 - unsigned int mask = GPIO_MASK(d->irq); 159 - 160 - GPIO_IRQ_mask |= mask; 161 - 162 - writel(GPIO_IRQ_rising_edge & GPIO_IRQ_mask, GPIO_GRER); 163 - writel(GPIO_IRQ_falling_edge & GPIO_IRQ_mask, GPIO_GFER); 164 - } 165 - 166 - static int puv3_high_gpio_wake(struct irq_data *d, unsigned int on) 167 - { 168 - if (on) 169 - writel(readl(PM_PWER) | PM_PWER_GPIOHIGH, PM_PWER); 170 - else 171 - writel(readl(PM_PWER) & ~PM_PWER_GPIOHIGH, PM_PWER); 172 - return 0; 173 - } 174 - 175 - static struct irq_chip puv3_high_gpio_chip = { 176 - .name = "GPIO-high", 177 - .irq_ack = puv3_high_gpio_ack, 178 - .irq_mask = puv3_high_gpio_mask, 179 - .irq_unmask = puv3_high_gpio_unmask, 180 - .irq_set_type = puv3_gpio_type, 181 - .irq_set_wake = puv3_high_gpio_wake, 182 - }; 183 - 184 - /* 185 - * We don't need to ACK IRQs on the PKUnity unless they're GPIOs 186 - * this is for internal IRQs i.e. from 8 to 31. 187 - */ 188 - static void puv3_mask_irq(struct irq_data *d) 189 - { 190 - writel(readl(INTC_ICMR) & ~(1 << d->irq), INTC_ICMR); 191 - } 192 - 193 - static void puv3_unmask_irq(struct irq_data *d) 194 - { 195 - writel(readl(INTC_ICMR) | (1 << d->irq), INTC_ICMR); 196 - } 197 - 198 - /* 199 - * Apart form GPIOs, only the RTC alarm can be a wakeup event. 200 - */ 201 - static int puv3_set_wake(struct irq_data *d, unsigned int on) 202 - { 203 - if (d->irq == IRQ_RTCAlarm) { 204 - if (on) 205 - writel(readl(PM_PWER) | PM_PWER_RTC, PM_PWER); 206 - else 207 - writel(readl(PM_PWER) & ~PM_PWER_RTC, PM_PWER); 208 - return 0; 209 - } 210 - return -EINVAL; 211 - } 212 - 213 - static struct irq_chip puv3_normal_chip = { 214 - .name = "PKUnity-v3", 215 - .irq_ack = puv3_mask_irq, 216 - .irq_mask = puv3_mask_irq, 217 - .irq_unmask = puv3_unmask_irq, 218 - .irq_set_wake = puv3_set_wake, 219 - }; 220 - 221 - static struct resource irq_resource = { 222 - .name = "irqs", 223 - .start = io_v2p(PKUNITY_INTC_BASE), 224 - .end = io_v2p(PKUNITY_INTC_BASE) + 0xFFFFF, 225 - }; 226 - 227 - static struct puv3_irq_state { 228 - unsigned int saved; 229 - unsigned int icmr; 230 - unsigned int iclr; 231 - unsigned int iccr; 232 - } puv3_irq_state; 233 - 234 - static int puv3_irq_suspend(void) 235 - { 236 - struct puv3_irq_state *st = &puv3_irq_state; 237 - 238 - st->saved = 1; 239 - st->icmr = readl(INTC_ICMR); 240 - st->iclr = readl(INTC_ICLR); 241 - st->iccr = readl(INTC_ICCR); 242 - 243 - /* 244 - * Disable all GPIO-based interrupts. 245 - */ 246 - writel(readl(INTC_ICMR) & ~(0x1ff), INTC_ICMR); 247 - 248 - /* 249 - * Set the appropriate edges for wakeup. 250 - */ 251 - writel(readl(PM_PWER) & GPIO_IRQ_rising_edge, GPIO_GRER); 252 - writel(readl(PM_PWER) & GPIO_IRQ_falling_edge, GPIO_GFER); 253 - 254 - /* 255 - * Clear any pending GPIO interrupts. 256 - */ 257 - writel(readl(GPIO_GEDR), GPIO_GEDR); 258 - 259 - return 0; 260 - } 261 - 262 - static void puv3_irq_resume(void) 263 - { 264 - struct puv3_irq_state *st = &puv3_irq_state; 265 - 266 - if (st->saved) { 267 - writel(st->iccr, INTC_ICCR); 268 - writel(st->iclr, INTC_ICLR); 269 - 270 - writel(GPIO_IRQ_rising_edge & GPIO_IRQ_mask, GPIO_GRER); 271 - writel(GPIO_IRQ_falling_edge & GPIO_IRQ_mask, GPIO_GFER); 272 - 273 - writel(st->icmr, INTC_ICMR); 274 - } 275 - } 276 - 277 - static struct syscore_ops puv3_irq_syscore_ops = { 278 - .suspend = puv3_irq_suspend, 279 - .resume = puv3_irq_resume, 280 - }; 281 - 282 - static int __init puv3_irq_init_syscore(void) 283 - { 284 - register_syscore_ops(&puv3_irq_syscore_ops); 285 - return 0; 286 - } 287 - 288 - device_initcall(puv3_irq_init_syscore); 289 - 290 - void __init init_IRQ(void) 291 - { 292 - unsigned int irq; 293 - 294 - request_resource(&iomem_resource, &irq_resource); 295 - 296 - /* disable all IRQs */ 297 - writel(0, INTC_ICMR); 298 - 299 - /* all IRQs are IRQ, not REAL */ 300 - writel(0, INTC_ICLR); 301 - 302 - /* clear all GPIO edge detects */ 303 - writel(FMASK(8, 0) & ~FIELD(1, 1, GPI_SOFF_REQ), GPIO_GPIR); 304 - writel(0, GPIO_GFER); 305 - writel(0, GPIO_GRER); 306 - writel(0x0FFFFFFF, GPIO_GEDR); 307 - 308 - writel(1, INTC_ICCR); 309 - 310 - for (irq = 0; irq < IRQ_GPIOHIGH; irq++) { 311 - irq_set_chip(irq, &puv3_low_gpio_chip); 312 - irq_set_handler(irq, handle_edge_irq); 313 - irq_modify_status(irq, 314 - IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN, 315 - 0); 316 - } 317 - 318 - for (irq = IRQ_GPIOHIGH + 1; irq < IRQ_GPIO0; irq++) { 319 - irq_set_chip(irq, &puv3_normal_chip); 320 - irq_set_handler(irq, handle_level_irq); 321 - irq_modify_status(irq, 322 - IRQ_NOREQUEST | IRQ_NOAUTOEN, 323 - IRQ_NOPROBE); 324 - } 325 - 326 - for (irq = IRQ_GPIO0; irq <= IRQ_GPIO27; irq++) { 327 - irq_set_chip(irq, &puv3_high_gpio_chip); 328 - irq_set_handler(irq, handle_edge_irq); 329 - irq_modify_status(irq, 330 - IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN, 331 - 0); 332 - } 333 - 334 - /* 335 - * Install handler for GPIO 0-27 edge detect interrupts 336 - */ 337 - irq_set_chip(IRQ_GPIOHIGH, &puv3_normal_chip); 338 - irq_set_chained_handler(IRQ_GPIOHIGH, puv3_gpio_handler); 339 - 340 - #ifdef CONFIG_PUV3_GPIO 341 - puv3_init_gpio(); 342 - #endif 343 - } 344 - 345 - /* 346 - * do_IRQ handles all hardware IRQ's. Decoded IRQs should not 347 - * come via this function. Instead, they should provide their 348 - * own 'handler' 349 - */ 350 - asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs) 351 - { 352 - struct pt_regs *old_regs = set_irq_regs(regs); 353 - 354 - irq_enter(); 355 - 356 - /* 357 - * Some hardware gives randomly wrong interrupts. Rather 358 - * than crashing, do something sensible. 359 - */ 360 - if (unlikely(irq >= nr_irqs)) { 361 - if (printk_ratelimit()) 362 - printk(KERN_WARNING "Bad IRQ%u\n", irq); 363 - ack_bad_irq(irq); 364 - } else { 365 - generic_handle_irq(irq); 366 - } 367 - 368 - irq_exit(); 369 - set_irq_regs(old_regs); 370 - } 371 -
-57
arch/unicore32/kernel/ksyms.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/ksyms.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/module.h> 10 - #include <linux/sched.h> 11 - #include <linux/string.h> 12 - #include <linux/delay.h> 13 - #include <linux/in6.h> 14 - #include <linux/syscalls.h> 15 - #include <linux/uaccess.h> 16 - #include <linux/io.h> 17 - 18 - #include <asm/checksum.h> 19 - 20 - #include "ksyms.h" 21 - 22 - EXPORT_SYMBOL(find_first_bit); 23 - EXPORT_SYMBOL(find_first_zero_bit); 24 - EXPORT_SYMBOL(find_next_zero_bit); 25 - EXPORT_SYMBOL(find_next_bit); 26 - 27 - /* platform dependent support */ 28 - EXPORT_SYMBOL(__udelay); 29 - EXPORT_SYMBOL(__const_udelay); 30 - 31 - /* string / mem functions */ 32 - EXPORT_SYMBOL(strchr); 33 - EXPORT_SYMBOL(strrchr); 34 - EXPORT_SYMBOL(memset); 35 - EXPORT_SYMBOL(memcpy); 36 - EXPORT_SYMBOL(memmove); 37 - EXPORT_SYMBOL(memchr); 38 - 39 - /* user mem (segment) */ 40 - EXPORT_SYMBOL(__strnlen_user); 41 - EXPORT_SYMBOL(__strncpy_from_user); 42 - 43 - EXPORT_SYMBOL(copy_page); 44 - 45 - EXPORT_SYMBOL(raw_copy_from_user); 46 - EXPORT_SYMBOL(raw_copy_to_user); 47 - EXPORT_SYMBOL(__clear_user); 48 - 49 - EXPORT_SYMBOL(__ashldi3); 50 - EXPORT_SYMBOL(__ashrdi3); 51 - EXPORT_SYMBOL(__divsi3); 52 - EXPORT_SYMBOL(__lshrdi3); 53 - EXPORT_SYMBOL(__modsi3); 54 - EXPORT_SYMBOL(__ucmpdi2); 55 - EXPORT_SYMBOL(__udivsi3); 56 - EXPORT_SYMBOL(__umodsi3); 57 -
-14
arch/unicore32/kernel/ksyms.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - /* 3 - * libgcc functions - functions that are used internally by the 4 - * compiler... (prototypes are not correct though, but that 5 - * doesn't really matter since they're not versioned). 6 - */ 7 - extern void __ashldi3(void); 8 - extern void __ashrdi3(void); 9 - extern void __divsi3(void); 10 - extern void __lshrdi3(void); 11 - extern void __modsi3(void); 12 - extern void __ucmpdi2(void); 13 - extern void __udivsi3(void); 14 - extern void __umodsi3(void);
-105
arch/unicore32/kernel/module.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/module.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/module.h> 10 - #include <linux/moduleloader.h> 11 - #include <linux/kernel.h> 12 - #include <linux/mm.h> 13 - #include <linux/elf.h> 14 - #include <linux/vmalloc.h> 15 - #include <linux/fs.h> 16 - #include <linux/string.h> 17 - #include <linux/gfp.h> 18 - 19 - #include <asm/sections.h> 20 - 21 - void *module_alloc(unsigned long size) 22 - { 23 - return __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END, 24 - GFP_KERNEL, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE, 25 - __builtin_return_address(0)); 26 - } 27 - 28 - int 29 - apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, 30 - unsigned int relindex, struct module *module) 31 - { 32 - Elf32_Shdr *symsec = sechdrs + symindex; 33 - Elf32_Shdr *relsec = sechdrs + relindex; 34 - Elf32_Shdr *dstsec = sechdrs + relsec->sh_info; 35 - Elf32_Rel *rel = (void *)relsec->sh_addr; 36 - unsigned int i; 37 - 38 - for (i = 0; i < relsec->sh_size / sizeof(Elf32_Rel); i++, rel++) { 39 - unsigned long loc; 40 - Elf32_Sym *sym; 41 - s32 offset; 42 - 43 - offset = ELF32_R_SYM(rel->r_info); 44 - if (offset < 0 || offset > 45 - (symsec->sh_size / sizeof(Elf32_Sym))) { 46 - printk(KERN_ERR "%s: bad relocation, " 47 - "section %d reloc %d\n", 48 - module->name, relindex, i); 49 - return -ENOEXEC; 50 - } 51 - 52 - sym = ((Elf32_Sym *)symsec->sh_addr) + offset; 53 - 54 - if (rel->r_offset < 0 || rel->r_offset > 55 - dstsec->sh_size - sizeof(u32)) { 56 - printk(KERN_ERR "%s: out of bounds relocation, " 57 - "section %d reloc %d offset %d size %d\n", 58 - module->name, relindex, i, rel->r_offset, 59 - dstsec->sh_size); 60 - return -ENOEXEC; 61 - } 62 - 63 - loc = dstsec->sh_addr + rel->r_offset; 64 - 65 - switch (ELF32_R_TYPE(rel->r_info)) { 66 - case R_UNICORE_NONE: 67 - /* ignore */ 68 - break; 69 - 70 - case R_UNICORE_ABS32: 71 - *(u32 *)loc += sym->st_value; 72 - break; 73 - 74 - case R_UNICORE_PC24: 75 - case R_UNICORE_CALL: 76 - case R_UNICORE_JUMP24: 77 - offset = (*(u32 *)loc & 0x00ffffff) << 2; 78 - if (offset & 0x02000000) 79 - offset -= 0x04000000; 80 - 81 - offset += sym->st_value - loc; 82 - if (offset & 3 || 83 - offset <= (s32)0xfe000000 || 84 - offset >= (s32)0x02000000) { 85 - printk(KERN_ERR 86 - "%s: relocation out of range, section " 87 - "%d reloc %d sym '%s'\n", module->name, 88 - relindex, i, strtab + sym->st_name); 89 - return -ENOEXEC; 90 - } 91 - 92 - offset >>= 2; 93 - 94 - *(u32 *)loc &= 0xff000000; 95 - *(u32 *)loc |= offset & 0x00ffffff; 96 - break; 97 - 98 - default: 99 - printk(KERN_ERR "%s: unknown relocation: %u\n", 100 - module->name, ELF32_R_TYPE(rel->r_info)); 101 - return -ENOEXEC; 102 - } 103 - } 104 - return 0; 105 - }
-371
arch/unicore32/kernel/pci.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/pci.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * PCI bios-type initialisation for PCI machines 10 - */ 11 - #include <linux/module.h> 12 - #include <linux/kernel.h> 13 - #include <linux/interrupt.h> 14 - #include <linux/pci.h> 15 - #include <linux/slab.h> 16 - #include <linux/init.h> 17 - #include <linux/io.h> 18 - 19 - static int debug_pci; 20 - 21 - #define CONFIG_CMD(bus, devfn, where) \ 22 - (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3)) 23 - 24 - static int 25 - puv3_read_config(struct pci_bus *bus, unsigned int devfn, int where, 26 - int size, u32 *value) 27 - { 28 - writel(CONFIG_CMD(bus, devfn, where), PCICFG_ADDR); 29 - switch (size) { 30 - case 1: 31 - *value = (readl(PCICFG_DATA) >> ((where & 3) * 8)) & 0xFF; 32 - break; 33 - case 2: 34 - *value = (readl(PCICFG_DATA) >> ((where & 2) * 8)) & 0xFFFF; 35 - break; 36 - case 4: 37 - *value = readl(PCICFG_DATA); 38 - break; 39 - } 40 - return PCIBIOS_SUCCESSFUL; 41 - } 42 - 43 - static int 44 - puv3_write_config(struct pci_bus *bus, unsigned int devfn, int where, 45 - int size, u32 value) 46 - { 47 - writel(CONFIG_CMD(bus, devfn, where), PCICFG_ADDR); 48 - switch (size) { 49 - case 1: 50 - writel((readl(PCICFG_DATA) & ~FMASK(8, (where&3)*8)) 51 - | FIELD(value, 8, (where&3)*8), PCICFG_DATA); 52 - break; 53 - case 2: 54 - writel((readl(PCICFG_DATA) & ~FMASK(16, (where&2)*8)) 55 - | FIELD(value, 16, (where&2)*8), PCICFG_DATA); 56 - break; 57 - case 4: 58 - writel(value, PCICFG_DATA); 59 - break; 60 - } 61 - return PCIBIOS_SUCCESSFUL; 62 - } 63 - 64 - struct pci_ops pci_puv3_ops = { 65 - .read = puv3_read_config, 66 - .write = puv3_write_config, 67 - }; 68 - 69 - void pci_puv3_preinit(void) 70 - { 71 - printk(KERN_DEBUG "PCI: PKUnity PCI Controller Initializing ...\n"); 72 - /* config PCI bridge base */ 73 - writel(io_v2p(PKUNITY_PCIBRI_BASE), PCICFG_BRIBASE); 74 - 75 - writel(0, PCIBRI_AHBCTL0); 76 - writel(io_v2p(PKUNITY_PCIBRI_BASE) | PCIBRI_BARx_MEM, PCIBRI_AHBBAR0); 77 - writel(0xFFFF0000, PCIBRI_AHBAMR0); 78 - writel(0, PCIBRI_AHBTAR0); 79 - 80 - writel(PCIBRI_CTLx_AT, PCIBRI_AHBCTL1); 81 - writel(io_v2p(PKUNITY_PCILIO_BASE) | PCIBRI_BARx_IO, PCIBRI_AHBBAR1); 82 - writel(0xFFFF0000, PCIBRI_AHBAMR1); 83 - writel(0x00000000, PCIBRI_AHBTAR1); 84 - 85 - writel(PCIBRI_CTLx_PREF, PCIBRI_AHBCTL2); 86 - writel(io_v2p(PKUNITY_PCIMEM_BASE) | PCIBRI_BARx_MEM, PCIBRI_AHBBAR2); 87 - writel(0xF8000000, PCIBRI_AHBAMR2); 88 - writel(0, PCIBRI_AHBTAR2); 89 - 90 - writel(io_v2p(PKUNITY_PCIAHB_BASE) | PCIBRI_BARx_MEM, PCIBRI_BAR1); 91 - 92 - writel(PCIBRI_CTLx_AT | PCIBRI_CTLx_PREF, PCIBRI_PCICTL0); 93 - writel(io_v2p(PKUNITY_PCIAHB_BASE) | PCIBRI_BARx_MEM, PCIBRI_PCIBAR0); 94 - writel(0xF8000000, PCIBRI_PCIAMR0); 95 - writel(PKUNITY_SDRAM_BASE, PCIBRI_PCITAR0); 96 - 97 - writel(readl(PCIBRI_CMD) | PCIBRI_CMD_IO | PCIBRI_CMD_MEM, PCIBRI_CMD); 98 - } 99 - 100 - static int pci_puv3_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 101 - { 102 - if (dev->bus->number == 0) { 103 - #ifdef CONFIG_ARCH_FPGA /* 4 pci slots */ 104 - if (dev->devfn == 0x00) 105 - return IRQ_PCIINTA; 106 - else if (dev->devfn == 0x08) 107 - return IRQ_PCIINTB; 108 - else if (dev->devfn == 0x10) 109 - return IRQ_PCIINTC; 110 - else if (dev->devfn == 0x18) 111 - return IRQ_PCIINTD; 112 - #endif 113 - #ifdef CONFIG_PUV3_DB0913 /* 3 pci slots */ 114 - if (dev->devfn == 0x30) 115 - return IRQ_PCIINTB; 116 - else if (dev->devfn == 0x60) 117 - return IRQ_PCIINTC; 118 - else if (dev->devfn == 0x58) 119 - return IRQ_PCIINTD; 120 - #endif 121 - #if defined(CONFIG_PUV3_NB0916) || defined(CONFIG_PUV3_SMW0919) 122 - /* only support 2 pci devices */ 123 - if (dev->devfn == 0x00) 124 - return IRQ_PCIINTC; /* sata */ 125 - #endif 126 - } 127 - return -1; 128 - } 129 - 130 - /* 131 - * Only first 128MB of memory can be accessed via PCI. 132 - * We use GFP_DMA to allocate safe buffers to do map/unmap. 133 - * This is really ugly and we need a better way of specifying 134 - * DMA-capable regions of memory. 135 - */ 136 - void __init puv3_pci_adjust_zones(unsigned long max_zone_pfn) 137 - { 138 - unsigned int sz = SZ_128M >> PAGE_SHIFT; 139 - 140 - max_zone_pfn[ZONE_DMA] = sz; 141 - } 142 - 143 - /* 144 - * If the bus contains any of these devices, then we must not turn on 145 - * parity checking of any kind. 146 - */ 147 - static inline int pdev_bad_for_parity(struct pci_dev *dev) 148 - { 149 - return 0; 150 - } 151 - 152 - /* 153 - * pcibios_fixup_bus - Called after each bus is probed, 154 - * but before its children are examined. 155 - */ 156 - void pcibios_fixup_bus(struct pci_bus *bus) 157 - { 158 - struct pci_dev *dev; 159 - u16 features = PCI_COMMAND_SERR 160 - | PCI_COMMAND_PARITY 161 - | PCI_COMMAND_FAST_BACK; 162 - 163 - bus->resource[0] = &ioport_resource; 164 - bus->resource[1] = &iomem_resource; 165 - 166 - /* 167 - * Walk the devices on this bus, working out what we can 168 - * and can't support. 169 - */ 170 - list_for_each_entry(dev, &bus->devices, bus_list) { 171 - u16 status; 172 - 173 - pci_read_config_word(dev, PCI_STATUS, &status); 174 - 175 - /* 176 - * If any device on this bus does not support fast back 177 - * to back transfers, then the bus as a whole is not able 178 - * to support them. Having fast back to back transfers 179 - * on saves us one PCI cycle per transaction. 180 - */ 181 - if (!(status & PCI_STATUS_FAST_BACK)) 182 - features &= ~PCI_COMMAND_FAST_BACK; 183 - 184 - if (pdev_bad_for_parity(dev)) 185 - features &= ~(PCI_COMMAND_SERR 186 - | PCI_COMMAND_PARITY); 187 - 188 - switch (dev->class >> 8) { 189 - case PCI_CLASS_BRIDGE_PCI: 190 - pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &status); 191 - status |= PCI_BRIDGE_CTL_PARITY 192 - | PCI_BRIDGE_CTL_MASTER_ABORT; 193 - status &= ~(PCI_BRIDGE_CTL_BUS_RESET 194 - | PCI_BRIDGE_CTL_FAST_BACK); 195 - pci_write_config_word(dev, PCI_BRIDGE_CONTROL, status); 196 - break; 197 - 198 - case PCI_CLASS_BRIDGE_CARDBUS: 199 - pci_read_config_word(dev, PCI_CB_BRIDGE_CONTROL, 200 - &status); 201 - status |= PCI_CB_BRIDGE_CTL_PARITY 202 - | PCI_CB_BRIDGE_CTL_MASTER_ABORT; 203 - pci_write_config_word(dev, PCI_CB_BRIDGE_CONTROL, 204 - status); 205 - break; 206 - } 207 - } 208 - 209 - /* 210 - * Now walk the devices again, this time setting them up. 211 - */ 212 - list_for_each_entry(dev, &bus->devices, bus_list) { 213 - u16 cmd; 214 - 215 - pci_read_config_word(dev, PCI_COMMAND, &cmd); 216 - cmd |= features; 217 - pci_write_config_word(dev, PCI_COMMAND, cmd); 218 - 219 - pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 220 - L1_CACHE_BYTES >> 2); 221 - } 222 - 223 - /* 224 - * Propagate the flags to the PCI bridge. 225 - */ 226 - if (bus->self && bus->self->hdr_type == PCI_HEADER_TYPE_BRIDGE) { 227 - if (features & PCI_COMMAND_FAST_BACK) 228 - bus->bridge_ctl |= PCI_BRIDGE_CTL_FAST_BACK; 229 - if (features & PCI_COMMAND_PARITY) 230 - bus->bridge_ctl |= PCI_BRIDGE_CTL_PARITY; 231 - } 232 - 233 - /* 234 - * Report what we did for this bus 235 - */ 236 - printk(KERN_INFO "PCI: bus%d: Fast back to back transfers %sabled\n", 237 - bus->number, (features & PCI_COMMAND_FAST_BACK) ? "en" : "dis"); 238 - } 239 - EXPORT_SYMBOL(pcibios_fixup_bus); 240 - 241 - static struct resource busn_resource = { 242 - .name = "PCI busn", 243 - .start = 0, 244 - .end = 255, 245 - .flags = IORESOURCE_BUS, 246 - }; 247 - 248 - static int __init pci_common_init(void) 249 - { 250 - struct pci_bus *puv3_bus; 251 - struct pci_host_bridge *bridge; 252 - int ret; 253 - 254 - bridge = pci_alloc_host_bridge(0); 255 - if (!bridge) 256 - return -ENOMEM; 257 - 258 - pci_puv3_preinit(); 259 - 260 - pci_add_resource(&bridge->windows, &ioport_resource); 261 - pci_add_resource(&bridge->windows, &iomem_resource); 262 - pci_add_resource(&bridge->windows, &busn_resource); 263 - bridge->sysdata = NULL; 264 - bridge->busnr = 0; 265 - bridge->ops = &pci_puv3_ops; 266 - bridge->swizzle_irq = pci_common_swizzle; 267 - bridge->map_irq = pci_puv3_map_irq; 268 - 269 - /* Scan our single hose. */ 270 - ret = pci_scan_root_bus_bridge(bridge); 271 - if (ret) { 272 - pci_free_host_bridge(bridge); 273 - return; 274 - } 275 - 276 - puv3_bus = bridge->bus; 277 - 278 - if (!puv3_bus) 279 - panic("PCI: unable to scan bus!"); 280 - 281 - pci_bus_size_bridges(puv3_bus); 282 - pci_bus_assign_resources(puv3_bus); 283 - pci_bus_add_devices(puv3_bus); 284 - return 0; 285 - } 286 - subsys_initcall(pci_common_init); 287 - 288 - char * __init pcibios_setup(char *str) 289 - { 290 - if (!strcmp(str, "debug")) { 291 - debug_pci = 1; 292 - return NULL; 293 - } 294 - return str; 295 - } 296 - 297 - void pcibios_set_master(struct pci_dev *dev) 298 - { 299 - /* No special bus mastering setup handling */ 300 - } 301 - 302 - /* 303 - * From arch/i386/kernel/pci-i386.c: 304 - * 305 - * We need to avoid collisions with `mirrored' VGA ports 306 - * and other strange ISA hardware, so we always want the 307 - * addresses to be allocated in the 0x000-0x0ff region 308 - * modulo 0x400. 309 - * 310 - * Why? Because some silly external IO cards only decode 311 - * the low 10 bits of the IO address. The 0x00-0xff region 312 - * is reserved for motherboard devices that decode all 16 313 - * bits, so it's ok to allocate at, say, 0x2800-0x28ff, 314 - * but we want to try to avoid allocating at 0x2900-0x2bff 315 - * which might be mirrored at 0x0100-0x03ff.. 316 - */ 317 - resource_size_t pcibios_align_resource(void *data, const struct resource *res, 318 - resource_size_t size, resource_size_t align) 319 - { 320 - resource_size_t start = res->start; 321 - 322 - if (res->flags & IORESOURCE_IO && start & 0x300) 323 - start = (start + 0x3ff) & ~0x3ff; 324 - 325 - start = (start + align - 1) & ~(align - 1); 326 - 327 - return start; 328 - } 329 - 330 - /** 331 - * pcibios_enable_device - Enable I/O and memory. 332 - * @dev: PCI device to be enabled 333 - */ 334 - int pcibios_enable_device(struct pci_dev *dev, int mask) 335 - { 336 - u16 cmd, old_cmd; 337 - int idx; 338 - struct resource *r; 339 - 340 - pci_read_config_word(dev, PCI_COMMAND, &cmd); 341 - old_cmd = cmd; 342 - for (idx = 0; idx < 6; idx++) { 343 - /* Only set up the requested stuff */ 344 - if (!(mask & (1 << idx))) 345 - continue; 346 - 347 - r = dev->resource + idx; 348 - if (!r->start && r->end) { 349 - printk(KERN_ERR "PCI: Device %s not available because" 350 - " of resource collisions\n", pci_name(dev)); 351 - return -EINVAL; 352 - } 353 - if (r->flags & IORESOURCE_IO) 354 - cmd |= PCI_COMMAND_IO; 355 - if (r->flags & IORESOURCE_MEM) 356 - cmd |= PCI_COMMAND_MEMORY; 357 - } 358 - 359 - /* 360 - * Bridges (eg, cardbus bridges) need to be fully enabled 361 - */ 362 - if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE) 363 - cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY; 364 - 365 - if (cmd != old_cmd) { 366 - printk("PCI: enabling device %s (%04x -> %04x)\n", 367 - pci_name(dev), old_cmd, cmd); 368 - pci_write_config_word(dev, PCI_COMMAND, cmd); 369 - } 370 - return 0; 371 - }
-121
arch/unicore32/kernel/pm.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/pm.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn> 8 - * Copyright (C) 2001-2010 Guan Xuetao 9 - */ 10 - #include <linux/init.h> 11 - #include <linux/module.h> 12 - #include <linux/suspend.h> 13 - #include <linux/errno.h> 14 - #include <linux/slab.h> 15 - #include <linux/io.h> 16 - 17 - #include <mach/hardware.h> 18 - #include <mach/pm.h> 19 - 20 - #include "setup.h" 21 - 22 - struct puv3_cpu_pm_fns *puv3_cpu_pm_fns; 23 - static unsigned long *sleep_save; 24 - 25 - int puv3_pm_enter(suspend_state_t state) 26 - { 27 - unsigned long sleep_save_checksum = 0, checksum = 0; 28 - int i; 29 - 30 - /* skip registers saving for standby */ 31 - if (state != PM_SUSPEND_STANDBY) { 32 - puv3_cpu_pm_fns->save(sleep_save); 33 - /* before sleeping, calculate and save a checksum */ 34 - for (i = 0; i < puv3_cpu_pm_fns->save_count - 1; i++) 35 - sleep_save_checksum += sleep_save[i]; 36 - } 37 - 38 - /* *** go zzz *** */ 39 - puv3_cpu_pm_fns->enter(state); 40 - cpu_init(); 41 - #ifdef CONFIG_INPUT_KEYBOARD 42 - puv3_ps2_init(); 43 - #endif 44 - #ifdef CONFIG_PCI 45 - pci_puv3_preinit(); 46 - #endif 47 - if (state != PM_SUSPEND_STANDBY) { 48 - /* after sleeping, validate the checksum */ 49 - for (i = 0; i < puv3_cpu_pm_fns->save_count - 1; i++) 50 - checksum += sleep_save[i]; 51 - 52 - /* if invalid, display message and wait for a hardware reset */ 53 - if (checksum != sleep_save_checksum) { 54 - while (1) 55 - puv3_cpu_pm_fns->enter(state); 56 - } 57 - puv3_cpu_pm_fns->restore(sleep_save); 58 - } 59 - 60 - pr_debug("*** made it back from resume\n"); 61 - 62 - return 0; 63 - } 64 - EXPORT_SYMBOL_GPL(puv3_pm_enter); 65 - 66 - unsigned long sleep_phys_sp(void *sp) 67 - { 68 - return virt_to_phys(sp); 69 - } 70 - 71 - static int puv3_pm_valid(suspend_state_t state) 72 - { 73 - if (puv3_cpu_pm_fns) 74 - return puv3_cpu_pm_fns->valid(state); 75 - 76 - return -EINVAL; 77 - } 78 - 79 - static int puv3_pm_prepare(void) 80 - { 81 - int ret = 0; 82 - 83 - if (puv3_cpu_pm_fns && puv3_cpu_pm_fns->prepare) 84 - ret = puv3_cpu_pm_fns->prepare(); 85 - 86 - return ret; 87 - } 88 - 89 - static void puv3_pm_finish(void) 90 - { 91 - if (puv3_cpu_pm_fns && puv3_cpu_pm_fns->finish) 92 - puv3_cpu_pm_fns->finish(); 93 - } 94 - 95 - static struct platform_suspend_ops puv3_pm_ops = { 96 - .valid = puv3_pm_valid, 97 - .enter = puv3_pm_enter, 98 - .prepare = puv3_pm_prepare, 99 - .finish = puv3_pm_finish, 100 - }; 101 - 102 - static int __init puv3_pm_init(void) 103 - { 104 - if (!puv3_cpu_pm_fns) { 105 - printk(KERN_ERR "no valid puv3_cpu_pm_fns defined\n"); 106 - return -EINVAL; 107 - } 108 - 109 - sleep_save = kmalloc_array(puv3_cpu_pm_fns->save_count, 110 - sizeof(unsigned long), 111 - GFP_KERNEL); 112 - if (!sleep_save) { 113 - printk(KERN_ERR "failed to alloc memory for pm save\n"); 114 - return -ENOMEM; 115 - } 116 - 117 - suspend_set_ops(&puv3_pm_ops); 118 - return 0; 119 - } 120 - 121 - device_initcall(puv3_pm_init);
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arch/unicore32/kernel/process.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/process.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <stdarg.h> 10 - 11 - #include <linux/module.h> 12 - #include <linux/sched.h> 13 - #include <linux/sched/debug.h> 14 - #include <linux/sched/task.h> 15 - #include <linux/sched/task_stack.h> 16 - #include <linux/kernel.h> 17 - #include <linux/mm.h> 18 - #include <linux/stddef.h> 19 - #include <linux/unistd.h> 20 - #include <linux/delay.h> 21 - #include <linux/reboot.h> 22 - #include <linux/interrupt.h> 23 - #include <linux/init.h> 24 - #include <linux/cpu.h> 25 - #include <linux/elfcore.h> 26 - #include <linux/pm.h> 27 - #include <linux/tick.h> 28 - #include <linux/utsname.h> 29 - #include <linux/uaccess.h> 30 - #include <linux/random.h> 31 - #include <linux/gpio.h> 32 - #include <linux/stacktrace.h> 33 - 34 - #include <asm/cacheflush.h> 35 - #include <asm/processor.h> 36 - #include <asm/stacktrace.h> 37 - 38 - #include "setup.h" 39 - 40 - static const char * const processor_modes[] = { 41 - "UK00", "UK01", "UK02", "UK03", "UK04", "UK05", "UK06", "UK07", 42 - "UK08", "UK09", "UK0A", "UK0B", "UK0C", "UK0D", "UK0E", "UK0F", 43 - "USER", "REAL", "INTR", "PRIV", "UK14", "UK15", "UK16", "ABRT", 44 - "UK18", "UK19", "UK1A", "EXTN", "UK1C", "UK1D", "UK1E", "SUSR" 45 - }; 46 - 47 - void arch_cpu_idle(void) 48 - { 49 - cpu_do_idle(); 50 - local_irq_enable(); 51 - } 52 - 53 - void machine_halt(void) 54 - { 55 - gpio_set_value(GPO_SOFT_OFF, 0); 56 - } 57 - 58 - /* 59 - * Function pointers to optional machine specific functions 60 - */ 61 - void (*pm_power_off)(void) = NULL; 62 - EXPORT_SYMBOL(pm_power_off); 63 - 64 - void machine_power_off(void) 65 - { 66 - if (pm_power_off) 67 - pm_power_off(); 68 - machine_halt(); 69 - } 70 - 71 - void machine_restart(char *cmd) 72 - { 73 - /* Disable interrupts first */ 74 - local_irq_disable(); 75 - 76 - /* 77 - * Tell the mm system that we are going to reboot - 78 - * we may need it to insert some 1:1 mappings so that 79 - * soft boot works. 80 - */ 81 - setup_mm_for_reboot(); 82 - 83 - /* Clean and invalidate caches */ 84 - flush_cache_all(); 85 - 86 - /* Turn off caching */ 87 - cpu_proc_fin(); 88 - 89 - /* Push out any further dirty data, and ensure cache is empty */ 90 - flush_cache_all(); 91 - 92 - /* 93 - * Now handle reboot code. 94 - */ 95 - if (reboot_mode == REBOOT_SOFT) { 96 - /* Jump into ROM at address 0xffff0000 */ 97 - cpu_reset(VECTORS_BASE); 98 - } else { 99 - writel(0x00002001, PM_PLLSYSCFG); /* cpu clk = 250M */ 100 - writel(0x00100800, PM_PLLDDRCFG); /* ddr clk = 44M */ 101 - writel(0x00002001, PM_PLLVGACFG); /* vga clk = 250M */ 102 - 103 - /* Use on-chip reset capability */ 104 - /* following instructions must be in one icache line */ 105 - __asm__ __volatile__( 106 - " .align 5\n\t" 107 - " stw %1, [%0]\n\t" 108 - "201: ldw r0, [%0]\n\t" 109 - " cmpsub.a r0, #0\n\t" 110 - " bne 201b\n\t" 111 - " stw %3, [%2]\n\t" 112 - " nop; nop; nop\n\t" 113 - /* prefetch 3 instructions at most */ 114 - : 115 - : "r" (PM_PMCR), 116 - "r" (PM_PMCR_CFBSYS | PM_PMCR_CFBDDR 117 - | PM_PMCR_CFBVGA), 118 - "r" (RESETC_SWRR), 119 - "r" (RESETC_SWRR_SRB) 120 - : "r0", "memory"); 121 - } 122 - 123 - /* 124 - * Whoops - the architecture was unable to reboot. 125 - * Tell the user! 126 - */ 127 - mdelay(1000); 128 - printk(KERN_EMERG "Reboot failed -- System halted\n"); 129 - do { } while (1); 130 - } 131 - 132 - void __show_regs(struct pt_regs *regs) 133 - { 134 - unsigned long flags; 135 - char buf[64]; 136 - 137 - show_regs_print_info(KERN_DEFAULT); 138 - printk("PC is at %pS\n", (void *)instruction_pointer(regs)); 139 - printk("LR is at %pS\n", (void *)regs->UCreg_lr); 140 - printk(KERN_DEFAULT "pc : [<%08lx>] lr : [<%08lx>] psr: %08lx\n" 141 - "sp : %08lx ip : %08lx fp : %08lx\n", 142 - regs->UCreg_pc, regs->UCreg_lr, regs->UCreg_asr, 143 - regs->UCreg_sp, regs->UCreg_ip, regs->UCreg_fp); 144 - printk(KERN_DEFAULT "r26: %08lx r25: %08lx r24: %08lx\n", 145 - regs->UCreg_26, regs->UCreg_25, 146 - regs->UCreg_24); 147 - printk(KERN_DEFAULT "r23: %08lx r22: %08lx r21: %08lx r20: %08lx\n", 148 - regs->UCreg_23, regs->UCreg_22, 149 - regs->UCreg_21, regs->UCreg_20); 150 - printk(KERN_DEFAULT "r19: %08lx r18: %08lx r17: %08lx r16: %08lx\n", 151 - regs->UCreg_19, regs->UCreg_18, 152 - regs->UCreg_17, regs->UCreg_16); 153 - printk(KERN_DEFAULT "r15: %08lx r14: %08lx r13: %08lx r12: %08lx\n", 154 - regs->UCreg_15, regs->UCreg_14, 155 - regs->UCreg_13, regs->UCreg_12); 156 - printk(KERN_DEFAULT "r11: %08lx r10: %08lx r9 : %08lx r8 : %08lx\n", 157 - regs->UCreg_11, regs->UCreg_10, 158 - regs->UCreg_09, regs->UCreg_08); 159 - printk(KERN_DEFAULT "r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n", 160 - regs->UCreg_07, regs->UCreg_06, 161 - regs->UCreg_05, regs->UCreg_04); 162 - printk(KERN_DEFAULT "r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n", 163 - regs->UCreg_03, regs->UCreg_02, 164 - regs->UCreg_01, regs->UCreg_00); 165 - 166 - flags = regs->UCreg_asr; 167 - buf[0] = flags & PSR_S_BIT ? 'S' : 's'; 168 - buf[1] = flags & PSR_Z_BIT ? 'Z' : 'z'; 169 - buf[2] = flags & PSR_C_BIT ? 'C' : 'c'; 170 - buf[3] = flags & PSR_V_BIT ? 'V' : 'v'; 171 - buf[4] = '\0'; 172 - 173 - printk(KERN_DEFAULT "Flags: %s INTR o%s REAL o%s Mode %s Segment %s\n", 174 - buf, interrupts_enabled(regs) ? "n" : "ff", 175 - fast_interrupts_enabled(regs) ? "n" : "ff", 176 - processor_modes[processor_mode(regs)], 177 - uaccess_kernel() ? "kernel" : "user"); 178 - { 179 - unsigned int ctrl; 180 - 181 - buf[0] = '\0'; 182 - { 183 - unsigned int transbase; 184 - asm("movc %0, p0.c2, #0\n" 185 - : "=r" (transbase)); 186 - snprintf(buf, sizeof(buf), " Table: %08x", transbase); 187 - } 188 - asm("movc %0, p0.c1, #0\n" : "=r" (ctrl)); 189 - 190 - printk(KERN_DEFAULT "Control: %08x%s\n", ctrl, buf); 191 - } 192 - } 193 - 194 - void show_regs(struct pt_regs *regs) 195 - { 196 - printk(KERN_DEFAULT "\n"); 197 - printk(KERN_DEFAULT "Pid: %d, comm: %20s\n", 198 - task_pid_nr(current), current->comm); 199 - __show_regs(regs); 200 - __backtrace(); 201 - } 202 - 203 - void flush_thread(void) 204 - { 205 - struct thread_info *thread = current_thread_info(); 206 - struct task_struct *tsk = current; 207 - 208 - memset(thread->used_cp, 0, sizeof(thread->used_cp)); 209 - memset(&tsk->thread.debug, 0, sizeof(struct debug_info)); 210 - #ifdef CONFIG_UNICORE_FPU_F64 211 - memset(&thread->fpstate, 0, sizeof(struct fp_state)); 212 - #endif 213 - } 214 - 215 - void release_thread(struct task_struct *dead_task) 216 - { 217 - } 218 - 219 - asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); 220 - asmlinkage void ret_from_kernel_thread(void) __asm__("ret_from_kernel_thread"); 221 - 222 - int 223 - copy_thread(unsigned long clone_flags, unsigned long stack_start, 224 - unsigned long stk_sz, struct task_struct *p) 225 - { 226 - struct thread_info *thread = task_thread_info(p); 227 - struct pt_regs *childregs = task_pt_regs(p); 228 - 229 - memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save)); 230 - thread->cpu_context.sp = (unsigned long)childregs; 231 - if (unlikely(p->flags & PF_KTHREAD)) { 232 - thread->cpu_context.pc = (unsigned long)ret_from_kernel_thread; 233 - thread->cpu_context.r4 = stack_start; 234 - thread->cpu_context.r5 = stk_sz; 235 - memset(childregs, 0, sizeof(struct pt_regs)); 236 - } else { 237 - thread->cpu_context.pc = (unsigned long)ret_from_fork; 238 - *childregs = *current_pt_regs(); 239 - childregs->UCreg_00 = 0; 240 - if (stack_start) 241 - childregs->UCreg_sp = stack_start; 242 - 243 - if (clone_flags & CLONE_SETTLS) 244 - childregs->UCreg_16 = childregs->UCreg_03; 245 - } 246 - return 0; 247 - } 248 - 249 - /* 250 - * Fill in the task's elfregs structure for a core dump. 251 - */ 252 - int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs) 253 - { 254 - elf_core_copy_regs(elfregs, task_pt_regs(t)); 255 - return 1; 256 - } 257 - 258 - /* 259 - * fill in the fpe structure for a core dump... 260 - */ 261 - int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fp) 262 - { 263 - struct thread_info *thread = current_thread_info(); 264 - int used_math = thread->used_cp[1] | thread->used_cp[2]; 265 - 266 - #ifdef CONFIG_UNICORE_FPU_F64 267 - if (used_math) 268 - memcpy(fp, &thread->fpstate, sizeof(*fp)); 269 - #endif 270 - return used_math != 0; 271 - } 272 - EXPORT_SYMBOL(dump_fpu); 273 - 274 - unsigned long get_wchan(struct task_struct *p) 275 - { 276 - struct stackframe frame; 277 - int count = 0; 278 - if (!p || p == current || p->state == TASK_RUNNING) 279 - return 0; 280 - 281 - frame.fp = thread_saved_fp(p); 282 - frame.sp = thread_saved_sp(p); 283 - frame.lr = 0; /* recovered from the stack */ 284 - frame.pc = thread_saved_pc(p); 285 - do { 286 - int ret = unwind_frame(&frame); 287 - if (ret < 0) 288 - return 0; 289 - if (!in_sched_functions(frame.pc)) 290 - return frame.pc; 291 - } while ((count++) < 16); 292 - return 0; 293 - } 294 - 295 - unsigned long arch_randomize_brk(struct mm_struct *mm) 296 - { 297 - return randomize_page(mm->brk, 0x02000000); 298 - } 299 - 300 - /* 301 - * The vectors page is always readable from user space for the 302 - * atomic helpers and the signal restart code. Let's declare a mapping 303 - * for it so it is visible through ptrace and /proc/<pid>/mem. 304 - */ 305 - 306 - int vectors_user_mapping(void) 307 - { 308 - struct mm_struct *mm = current->mm; 309 - return install_special_mapping(mm, 0xffff0000, PAGE_SIZE, 310 - VM_READ | VM_EXEC | 311 - VM_MAYREAD | VM_MAYEXEC | 312 - VM_DONTEXPAND | VM_DONTDUMP, 313 - NULL); 314 - } 315 - 316 - const char *arch_vma_name(struct vm_area_struct *vma) 317 - { 318 - return (vma->vm_start == 0xffff0000) ? "[vectors]" : NULL; 319 - }
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arch/unicore32/kernel/ptrace.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/ptrace.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * By Ross Biro 1/23/92 10 - */ 11 - #include <linux/kernel.h> 12 - #include <linux/ptrace.h> 13 - #include <linux/signal.h> 14 - #include <linux/uaccess.h> 15 - #include <linux/sched/task_stack.h> 16 - 17 - /* 18 - * this routine will get a word off of the processes privileged stack. 19 - * the offset is how far from the base addr as stored in the THREAD. 20 - * this routine assumes that all the privileged stacks are in our 21 - * data space. 22 - */ 23 - static inline long get_user_reg(struct task_struct *task, int offset) 24 - { 25 - return task_pt_regs(task)->uregs[offset]; 26 - } 27 - 28 - /* 29 - * this routine will put a word on the processes privileged stack. 30 - * the offset is how far from the base addr as stored in the THREAD. 31 - * this routine assumes that all the privileged stacks are in our 32 - * data space. 33 - */ 34 - static inline int 35 - put_user_reg(struct task_struct *task, int offset, long data) 36 - { 37 - struct pt_regs newregs, *regs = task_pt_regs(task); 38 - int ret = -EINVAL; 39 - 40 - newregs = *regs; 41 - newregs.uregs[offset] = data; 42 - 43 - if (valid_user_regs(&newregs)) { 44 - regs->uregs[offset] = data; 45 - ret = 0; 46 - } 47 - 48 - return ret; 49 - } 50 - 51 - /* 52 - * Called by kernel/ptrace.c when detaching.. 53 - */ 54 - void ptrace_disable(struct task_struct *child) 55 - { 56 - } 57 - 58 - /* 59 - * We actually access the pt_regs stored on the kernel stack. 60 - */ 61 - static int ptrace_read_user(struct task_struct *tsk, unsigned long off, 62 - unsigned long __user *ret) 63 - { 64 - unsigned long tmp; 65 - 66 - tmp = 0; 67 - if (off < sizeof(struct pt_regs)) 68 - tmp = get_user_reg(tsk, off >> 2); 69 - 70 - return put_user(tmp, ret); 71 - } 72 - 73 - /* 74 - * We actually access the pt_regs stored on the kernel stack. 75 - */ 76 - static int ptrace_write_user(struct task_struct *tsk, unsigned long off, 77 - unsigned long val) 78 - { 79 - if (off >= sizeof(struct pt_regs)) 80 - return 0; 81 - 82 - return put_user_reg(tsk, off >> 2, val); 83 - } 84 - 85 - long arch_ptrace(struct task_struct *child, long request, 86 - unsigned long addr, unsigned long data) 87 - { 88 - int ret; 89 - unsigned long __user *datap = (unsigned long __user *) data; 90 - 91 - switch (request) { 92 - case PTRACE_PEEKUSR: 93 - ret = ptrace_read_user(child, addr, datap); 94 - break; 95 - 96 - case PTRACE_POKEUSR: 97 - ret = ptrace_write_user(child, addr, data); 98 - break; 99 - 100 - case PTRACE_GET_THREAD_AREA: 101 - ret = put_user(task_pt_regs(child)->UCreg_16, 102 - datap); 103 - break; 104 - 105 - default: 106 - ret = ptrace_request(child, request, addr, data); 107 - break; 108 - } 109 - 110 - return ret; 111 - } 112 - 113 - asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) 114 - { 115 - unsigned long ip; 116 - 117 - if (!test_thread_flag(TIF_SYSCALL_TRACE)) 118 - return scno; 119 - if (!(current->ptrace & PT_PTRACED)) 120 - return scno; 121 - 122 - /* 123 - * Save IP. IP is used to denote syscall entry/exit: 124 - * IP = 0 -> entry, = 1 -> exit 125 - */ 126 - ip = regs->UCreg_ip; 127 - regs->UCreg_ip = why; 128 - 129 - current_thread_info()->syscall = scno; 130 - 131 - /* the 0x80 provides a way for the tracing parent to distinguish 132 - between a syscall stop and SIGTRAP delivery */ 133 - ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) 134 - ? 0x80 : 0)); 135 - /* 136 - * this isn't the same as continuing with a signal, but it will do 137 - * for normal use. strace only continues with a signal if the 138 - * stopping signal is not SIGTRAP. -brl 139 - */ 140 - if (current->exit_code) { 141 - send_sig(current->exit_code, current, 1); 142 - current->exit_code = 0; 143 - } 144 - regs->UCreg_ip = ip; 145 - 146 - return current_thread_info()->syscall; 147 - }
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arch/unicore32/kernel/puv3-core.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/puv3-core.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn> 8 - * Copyright (C) 2001-2010 Guan Xuetao 9 - */ 10 - 11 - #include <linux/init.h> 12 - #include <linux/device.h> 13 - #include <linux/amba/bus.h> 14 - #include <linux/platform_device.h> 15 - #include <linux/io.h> 16 - #include <linux/cnt32_to_63.h> 17 - #include <linux/usb/musb.h> 18 - 19 - #include <asm/irq.h> 20 - #include <mach/hardware.h> 21 - #include <mach/pm.h> 22 - 23 - /* 24 - * This is the PKUnity sched_clock implementation. This has 25 - * a resolution of 271ns, and a maximum value of 32025597s (370 days). 26 - * 27 - * The return value is guaranteed to be monotonic in that range as 28 - * long as there is always less than 582 seconds between successive 29 - * calls to this function. 30 - * 31 - * ( * 1E9 / CLOCK_TICK_RATE ) -> about 2235/32 32 - */ 33 - unsigned long long sched_clock(void) 34 - { 35 - unsigned long long v = cnt32_to_63(readl(OST_OSCR)); 36 - 37 - /* original conservative method, but overflow frequently 38 - * v *= NSEC_PER_SEC >> 12; 39 - * do_div(v, CLOCK_TICK_RATE >> 12); 40 - */ 41 - v = ((v & 0x7fffffffffffffffULL) * 2235) >> 5; 42 - 43 - return v; 44 - } 45 - 46 - static struct resource puv3_usb_resources[] = { 47 - /* order is significant! */ 48 - { 49 - .start = io_v2p(PKUNITY_USB_BASE), 50 - .end = io_v2p(PKUNITY_USB_BASE) + 0x3ff, 51 - .flags = IORESOURCE_MEM, 52 - }, { 53 - .start = IRQ_USB, 54 - .flags = IORESOURCE_IRQ, 55 - }, { 56 - .start = IRQ_USB, 57 - .flags = IORESOURCE_IRQ, 58 - }, 59 - }; 60 - 61 - static struct musb_hdrc_config puv3_usb_config[] = { 62 - { 63 - .num_eps = 16, 64 - .multipoint = 1, 65 - #ifdef CONFIG_USB_INVENTRA_DMA 66 - .dma = 1, 67 - .dma_channels = 8, 68 - #endif 69 - }, 70 - }; 71 - 72 - static struct musb_hdrc_platform_data puv3_usb_plat = { 73 - .mode = MUSB_HOST, 74 - .min_power = 100, 75 - .clock = 0, 76 - .config = puv3_usb_config, 77 - }; 78 - 79 - static struct resource puv3_mmc_resources[] = { 80 - [0] = { 81 - .start = io_v2p(PKUNITY_SDC_BASE), 82 - .end = io_v2p(PKUNITY_SDC_BASE) + 0xfff, 83 - .flags = IORESOURCE_MEM, 84 - }, 85 - [1] = { 86 - .start = IRQ_SDC, 87 - .end = IRQ_SDC, 88 - .flags = IORESOURCE_IRQ, 89 - }, 90 - }; 91 - 92 - static struct resource puv3_unigfx_resources[] = { 93 - [0] = { 94 - .start = io_v2p(PKUNITY_UNIGFX_BASE), 95 - .end = io_v2p(PKUNITY_UNIGFX_BASE) + 0xfff, 96 - .flags = IORESOURCE_MEM, 97 - }, 98 - }; 99 - 100 - static struct resource puv3_rtc_resources[] = { 101 - [0] = { 102 - .start = io_v2p(PKUNITY_RTC_BASE), 103 - .end = io_v2p(PKUNITY_RTC_BASE) + 0xff, 104 - .flags = IORESOURCE_MEM, 105 - }, 106 - [1] = { 107 - .start = IRQ_RTCAlarm, 108 - .end = IRQ_RTCAlarm, 109 - .flags = IORESOURCE_IRQ, 110 - }, 111 - [2] = { 112 - .start = IRQ_RTC, 113 - .end = IRQ_RTC, 114 - .flags = IORESOURCE_IRQ 115 - } 116 - }; 117 - 118 - static struct resource puv3_pwm_resources[] = { 119 - [0] = { 120 - .start = io_v2p(PKUNITY_OST_BASE) + 0x80, 121 - .end = io_v2p(PKUNITY_OST_BASE) + 0xff, 122 - .flags = IORESOURCE_MEM, 123 - }, 124 - }; 125 - 126 - static struct resource puv3_uart0_resources[] = { 127 - [0] = { 128 - .start = io_v2p(PKUNITY_UART0_BASE), 129 - .end = io_v2p(PKUNITY_UART0_BASE) + 0xff, 130 - .flags = IORESOURCE_MEM, 131 - }, 132 - [1] = { 133 - .start = IRQ_UART0, 134 - .end = IRQ_UART0, 135 - .flags = IORESOURCE_IRQ 136 - } 137 - }; 138 - 139 - static struct resource puv3_uart1_resources[] = { 140 - [0] = { 141 - .start = io_v2p(PKUNITY_UART1_BASE), 142 - .end = io_v2p(PKUNITY_UART1_BASE) + 0xff, 143 - .flags = IORESOURCE_MEM, 144 - }, 145 - [1] = { 146 - .start = IRQ_UART1, 147 - .end = IRQ_UART1, 148 - .flags = IORESOURCE_IRQ 149 - } 150 - }; 151 - 152 - static struct resource puv3_umal_resources[] = { 153 - [0] = { 154 - .start = io_v2p(PKUNITY_UMAL_BASE), 155 - .end = io_v2p(PKUNITY_UMAL_BASE) + 0x1fff, 156 - .flags = IORESOURCE_MEM, 157 - }, 158 - [1] = { 159 - .start = IRQ_UMAL, 160 - .end = IRQ_UMAL, 161 - .flags = IORESOURCE_IRQ 162 - } 163 - }; 164 - 165 - #ifdef CONFIG_PUV3_PM 166 - 167 - #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x 168 - #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] 169 - 170 - /* 171 - * List of global PXA peripheral registers to preserve. 172 - * More ones like CP and general purpose register values are preserved 173 - * with the stack pointer in sleep.S. 174 - */ 175 - enum { 176 - SLEEP_SAVE_PM_PLLDDRCFG, 177 - SLEEP_SAVE_COUNT 178 - }; 179 - 180 - 181 - static void puv3_cpu_pm_save(unsigned long *sleep_save) 182 - { 183 - /* SAVE(PM_PLLDDRCFG); */ 184 - } 185 - 186 - static void puv3_cpu_pm_restore(unsigned long *sleep_save) 187 - { 188 - /* RESTORE(PM_PLLDDRCFG); */ 189 - } 190 - 191 - static int puv3_cpu_pm_prepare(void) 192 - { 193 - /* set resume return address */ 194 - writel(virt_to_phys(puv3_cpu_resume), PM_DIVCFG); 195 - return 0; 196 - } 197 - 198 - static void puv3_cpu_pm_enter(suspend_state_t state) 199 - { 200 - /* Clear reset status */ 201 - writel(RESETC_RSSR_HWR | RESETC_RSSR_WDR 202 - | RESETC_RSSR_SMR | RESETC_RSSR_SWR, RESETC_RSSR); 203 - 204 - switch (state) { 205 - /* case PM_SUSPEND_ON: 206 - puv3_cpu_idle(); 207 - break; */ 208 - case PM_SUSPEND_MEM: 209 - puv3_cpu_pm_prepare(); 210 - puv3_cpu_suspend(PM_PMCR_SFB); 211 - break; 212 - } 213 - } 214 - 215 - static int puv3_cpu_pm_valid(suspend_state_t state) 216 - { 217 - return state == PM_SUSPEND_MEM; 218 - } 219 - 220 - static void puv3_cpu_pm_finish(void) 221 - { 222 - /* ensure not to come back here if it wasn't intended */ 223 - /* PSPR = 0; */ 224 - } 225 - 226 - static struct puv3_cpu_pm_fns puv3_cpu_pm_fnss = { 227 - .save_count = SLEEP_SAVE_COUNT, 228 - .valid = puv3_cpu_pm_valid, 229 - .save = puv3_cpu_pm_save, 230 - .restore = puv3_cpu_pm_restore, 231 - .enter = puv3_cpu_pm_enter, 232 - .prepare = puv3_cpu_pm_prepare, 233 - .finish = puv3_cpu_pm_finish, 234 - }; 235 - 236 - static void __init puv3_init_pm(void) 237 - { 238 - puv3_cpu_pm_fns = &puv3_cpu_pm_fnss; 239 - } 240 - #else 241 - static inline void puv3_init_pm(void) {} 242 - #endif 243 - 244 - void puv3_ps2_init(void) 245 - { 246 - struct clk *bclk32; 247 - 248 - bclk32 = clk_get(NULL, "BUS32_CLK"); 249 - writel(clk_get_rate(bclk32) / 200000, PS2_CNT); /* should > 5us */ 250 - } 251 - 252 - void __init puv3_core_init(void) 253 - { 254 - puv3_init_pm(); 255 - puv3_ps2_init(); 256 - 257 - platform_device_register_simple("PKUnity-v3-RTC", -1, 258 - puv3_rtc_resources, ARRAY_SIZE(puv3_rtc_resources)); 259 - platform_device_register_simple("PKUnity-v3-UMAL", -1, 260 - puv3_umal_resources, ARRAY_SIZE(puv3_umal_resources)); 261 - platform_device_register_simple("PKUnity-v3-MMC", -1, 262 - puv3_mmc_resources, ARRAY_SIZE(puv3_mmc_resources)); 263 - platform_device_register_simple("PKUnity-v3-UNIGFX", -1, 264 - puv3_unigfx_resources, ARRAY_SIZE(puv3_unigfx_resources)); 265 - platform_device_register_simple("PKUnity-v3-PWM", -1, 266 - puv3_pwm_resources, ARRAY_SIZE(puv3_pwm_resources)); 267 - platform_device_register_simple("PKUnity-v3-UART", 0, 268 - puv3_uart0_resources, ARRAY_SIZE(puv3_uart0_resources)); 269 - platform_device_register_simple("PKUnity-v3-UART", 1, 270 - puv3_uart1_resources, ARRAY_SIZE(puv3_uart1_resources)); 271 - platform_device_register_simple("PKUnity-v3-AC97", -1, NULL, 0); 272 - platform_device_register_resndata(NULL, "musb_hdrc", -1, 273 - puv3_usb_resources, ARRAY_SIZE(puv3_usb_resources), 274 - &puv3_usb_plat, sizeof(puv3_usb_plat)); 275 - } 276 -
-147
arch/unicore32/kernel/puv3-nb0916.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/puv3-nb0916.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn> 8 - * Copyright (C) 2001-2010 Guan Xuetao 9 - */ 10 - 11 - #include <linux/init.h> 12 - #include <linux/device.h> 13 - #include <linux/platform_device.h> 14 - #include <linux/mtd/physmap.h> 15 - #include <linux/io.h> 16 - #include <linux/reboot.h> 17 - #include <linux/interrupt.h> 18 - #include <linux/i2c.h> 19 - #include <linux/pwm.h> 20 - #include <linux/pwm_backlight.h> 21 - #include <linux/gpio.h> 22 - #include <linux/gpio_keys.h> 23 - #include <linux/input.h> 24 - 25 - #include <mach/hardware.h> 26 - 27 - static struct physmap_flash_data physmap_flash_data = { 28 - .width = 1, 29 - }; 30 - 31 - static struct resource physmap_flash_resource = { 32 - .start = 0xFFF80000, 33 - .end = 0xFFFFFFFF, 34 - .flags = IORESOURCE_MEM, 35 - }; 36 - 37 - static struct resource puv3_i2c_resources[] = { 38 - [0] = { 39 - .start = io_v2p(PKUNITY_I2C_BASE), 40 - .end = io_v2p(PKUNITY_I2C_BASE) + 0xff, 41 - .flags = IORESOURCE_MEM, 42 - }, 43 - [1] = { 44 - .start = IRQ_I2C, 45 - .end = IRQ_I2C, 46 - .flags = IORESOURCE_IRQ, 47 - } 48 - }; 49 - 50 - static struct pwm_lookup nb0916_pwm_lookup[] = { 51 - PWM_LOOKUP("PKUnity-v3-PWM", 0, "pwm-backlight", NULL, 70 * 1024, 52 - PWM_POLARITY_NORMAL), 53 - }; 54 - 55 - static struct platform_pwm_backlight_data nb0916_backlight_data = { 56 - .max_brightness = 100, 57 - .dft_brightness = 100, 58 - }; 59 - 60 - static struct gpio_keys_button nb0916_gpio_keys[] = { 61 - { 62 - .type = EV_KEY, 63 - .code = KEY_POWER, 64 - .gpio = GPI_SOFF_REQ, 65 - .desc = "Power Button", 66 - .wakeup = 1, 67 - .active_low = 1, 68 - }, 69 - { 70 - .type = EV_KEY, 71 - .code = BTN_TOUCH, 72 - .gpio = GPI_BTN_TOUCH, 73 - .desc = "Touchpad Button", 74 - .wakeup = 1, 75 - .active_low = 1, 76 - }, 77 - }; 78 - 79 - static struct gpio_keys_platform_data nb0916_gpio_button_data = { 80 - .buttons = nb0916_gpio_keys, 81 - .nbuttons = ARRAY_SIZE(nb0916_gpio_keys), 82 - }; 83 - 84 - static irqreturn_t nb0916_lcdcaseoff_handler(int irq, void *dev_id) 85 - { 86 - if (gpio_get_value(GPI_LCD_CASE_OFF)) 87 - gpio_set_value(GPO_LCD_EN, 1); 88 - else 89 - gpio_set_value(GPO_LCD_EN, 0); 90 - 91 - return IRQ_HANDLED; 92 - } 93 - 94 - static irqreturn_t nb0916_overheat_handler(int irq, void *dev_id) 95 - { 96 - machine_halt(); 97 - /* SYSTEM HALT, NO RETURN */ 98 - return IRQ_HANDLED; 99 - } 100 - 101 - static struct i2c_board_info __initdata puv3_i2c_devices[] = { 102 - { I2C_BOARD_INFO("lm75", I2C_TAR_THERMAL), }, 103 - { I2C_BOARD_INFO("bq27200", I2C_TAR_PWIC), }, 104 - { I2C_BOARD_INFO("24c02", I2C_TAR_EEPROM), }, 105 - }; 106 - 107 - int __init mach_nb0916_init(void) 108 - { 109 - i2c_register_board_info(0, puv3_i2c_devices, 110 - ARRAY_SIZE(puv3_i2c_devices)); 111 - 112 - platform_device_register_simple("PKUnity-v3-I2C", -1, 113 - puv3_i2c_resources, ARRAY_SIZE(puv3_i2c_resources)); 114 - 115 - pwm_add_table(nb0916_pwm_lookup, ARRAY_SIZE(nb0916_pwm_lookup)); 116 - 117 - platform_device_register_data(NULL, "pwm-backlight", -1, 118 - &nb0916_backlight_data, sizeof(nb0916_backlight_data)); 119 - 120 - platform_device_register_data(NULL, "gpio-keys", -1, 121 - &nb0916_gpio_button_data, sizeof(nb0916_gpio_button_data)); 122 - 123 - platform_device_register_resndata(NULL, "physmap-flash", -1, 124 - &physmap_flash_resource, 1, 125 - &physmap_flash_data, sizeof(physmap_flash_data)); 126 - 127 - if (request_irq(gpio_to_irq(GPI_LCD_CASE_OFF), 128 - &nb0916_lcdcaseoff_handler, 129 - IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 130 - "NB0916 lcd case off", NULL) < 0) { 131 - 132 - printk(KERN_DEBUG "LCD-Case-OFF IRQ %d not available\n", 133 - gpio_to_irq(GPI_LCD_CASE_OFF)); 134 - } 135 - 136 - if (request_irq(gpio_to_irq(GPI_OTP_INT), &nb0916_overheat_handler, 137 - IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 138 - "NB0916 overheating protection", NULL) < 0) { 139 - 140 - printk(KERN_DEBUG "Overheating Protection IRQ %d not available\n", 141 - gpio_to_irq(GPI_OTP_INT)); 142 - } 143 - 144 - return 0; 145 - } 146 - 147 - subsys_initcall_sync(mach_nb0916_init);
-352
arch/unicore32/kernel/setup.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/setup.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/module.h> 10 - #include <linux/kernel.h> 11 - #include <linux/stddef.h> 12 - #include <linux/ioport.h> 13 - #include <linux/delay.h> 14 - #include <linux/utsname.h> 15 - #include <linux/initrd.h> 16 - #include <linux/console.h> 17 - #include <linux/memblock.h> 18 - #include <linux/seq_file.h> 19 - #include <linux/screen_info.h> 20 - #include <linux/init.h> 21 - #include <linux/root_dev.h> 22 - #include <linux/cpu.h> 23 - #include <linux/interrupt.h> 24 - #include <linux/smp.h> 25 - #include <linux/fs.h> 26 - #include <linux/proc_fs.h> 27 - #include <linux/elf.h> 28 - #include <linux/io.h> 29 - 30 - #include <asm/cputype.h> 31 - #include <asm/sections.h> 32 - #include <asm/setup.h> 33 - #include <asm/cacheflush.h> 34 - #include <asm/tlbflush.h> 35 - #include <asm/traps.h> 36 - #include <asm/memblock.h> 37 - 38 - #include "setup.h" 39 - 40 - #ifndef MEM_SIZE 41 - #define MEM_SIZE (16*1024*1024) 42 - #endif 43 - 44 - struct stack { 45 - u32 irq[3]; 46 - u32 abt[3]; 47 - u32 und[3]; 48 - } ____cacheline_aligned; 49 - 50 - static struct stack stacks[NR_CPUS]; 51 - 52 - #ifdef CONFIG_VGA_CONSOLE 53 - struct screen_info screen_info; 54 - #endif 55 - 56 - char elf_platform[ELF_PLATFORM_SIZE]; 57 - EXPORT_SYMBOL(elf_platform); 58 - 59 - static char __initdata cmd_line[COMMAND_LINE_SIZE]; 60 - 61 - static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE; 62 - 63 - /* 64 - * Standard memory resources 65 - */ 66 - static struct resource mem_res[] = { 67 - { 68 - .name = "Kernel code", 69 - .start = 0, 70 - .end = 0, 71 - .flags = IORESOURCE_SYSTEM_RAM 72 - }, 73 - { 74 - .name = "Kernel data", 75 - .start = 0, 76 - .end = 0, 77 - .flags = IORESOURCE_SYSTEM_RAM 78 - } 79 - }; 80 - 81 - #define kernel_code mem_res[0] 82 - #define kernel_data mem_res[1] 83 - 84 - /* 85 - * These functions re-use the assembly code in head.S, which 86 - * already provide the required functionality. 87 - */ 88 - static void __init setup_processor(void) 89 - { 90 - printk(KERN_DEFAULT "CPU: UniCore-II [%08x] revision %d, cr=%08lx\n", 91 - uc32_cpuid, (int)(uc32_cpuid >> 16) & 15, cr_alignment); 92 - 93 - sprintf(init_utsname()->machine, "puv3"); 94 - sprintf(elf_platform, "ucv2"); 95 - } 96 - 97 - /* 98 - * cpu_init - initialise one CPU. 99 - * 100 - * cpu_init sets up the per-CPU stacks. 101 - */ 102 - void cpu_init(void) 103 - { 104 - unsigned int cpu = smp_processor_id(); 105 - struct stack *stk = &stacks[cpu]; 106 - 107 - /* 108 - * setup stacks for re-entrant exception handlers 109 - */ 110 - __asm__ ( 111 - "mov.a asr, %1\n\t" 112 - "add sp, %0, %2\n\t" 113 - "mov.a asr, %3\n\t" 114 - "add sp, %0, %4\n\t" 115 - "mov.a asr, %5\n\t" 116 - "add sp, %0, %6\n\t" 117 - "mov.a asr, %7" 118 - : 119 - : "r" (stk), 120 - "r" (PSR_R_BIT | PSR_I_BIT | INTR_MODE), 121 - "I" (offsetof(struct stack, irq[0])), 122 - "r" (PSR_R_BIT | PSR_I_BIT | ABRT_MODE), 123 - "I" (offsetof(struct stack, abt[0])), 124 - "r" (PSR_R_BIT | PSR_I_BIT | EXTN_MODE), 125 - "I" (offsetof(struct stack, und[0])), 126 - "r" (PSR_R_BIT | PSR_I_BIT | PRIV_MODE) 127 - : "r30", "cc"); 128 - } 129 - 130 - static int __init uc32_add_memory(unsigned long start, unsigned long size) 131 - { 132 - struct membank *bank = &meminfo.bank[meminfo.nr_banks]; 133 - 134 - if (meminfo.nr_banks >= NR_BANKS) { 135 - printk(KERN_CRIT "NR_BANKS too low, " 136 - "ignoring memory at %#lx\n", start); 137 - return -EINVAL; 138 - } 139 - 140 - /* 141 - * Ensure that start/size are aligned to a page boundary. 142 - * Size is appropriately rounded down, start is rounded up. 143 - */ 144 - size -= start & ~PAGE_MASK; 145 - 146 - bank->start = PAGE_ALIGN(start); 147 - bank->size = size & PAGE_MASK; 148 - 149 - /* 150 - * Check whether this memory region has non-zero size or 151 - * invalid node number. 152 - */ 153 - if (bank->size == 0) 154 - return -EINVAL; 155 - 156 - meminfo.nr_banks++; 157 - return 0; 158 - } 159 - 160 - /* 161 - * Pick out the memory size. We look for mem=size@start, 162 - * where start and size are "size[KkMm]" 163 - */ 164 - static int __init early_mem(char *p) 165 - { 166 - static int usermem __initdata = 1; 167 - unsigned long size, start; 168 - char *endp; 169 - 170 - /* 171 - * If the user specifies memory size, we 172 - * blow away any automatically generated 173 - * size. 174 - */ 175 - if (usermem) { 176 - usermem = 0; 177 - meminfo.nr_banks = 0; 178 - } 179 - 180 - start = PHYS_OFFSET; 181 - size = memparse(p, &endp); 182 - if (*endp == '@') 183 - start = memparse(endp + 1, NULL); 184 - 185 - uc32_add_memory(start, size); 186 - 187 - return 0; 188 - } 189 - early_param("mem", early_mem); 190 - 191 - static void __init 192 - request_standard_resources(struct meminfo *mi) 193 - { 194 - struct resource *res; 195 - int i; 196 - 197 - kernel_code.start = virt_to_phys(_stext); 198 - kernel_code.end = virt_to_phys(_etext - 1); 199 - kernel_data.start = virt_to_phys(_sdata); 200 - kernel_data.end = virt_to_phys(_end - 1); 201 - 202 - for (i = 0; i < mi->nr_banks; i++) { 203 - if (mi->bank[i].size == 0) 204 - continue; 205 - 206 - res = memblock_alloc_low(sizeof(*res), SMP_CACHE_BYTES); 207 - if (!res) 208 - panic("%s: Failed to allocate %zu bytes align=%x\n", 209 - __func__, sizeof(*res), SMP_CACHE_BYTES); 210 - 211 - res->name = "System RAM"; 212 - res->start = mi->bank[i].start; 213 - res->end = mi->bank[i].start + mi->bank[i].size - 1; 214 - res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY; 215 - 216 - request_resource(&iomem_resource, res); 217 - 218 - if (kernel_code.start >= res->start && 219 - kernel_code.end <= res->end) 220 - request_resource(res, &kernel_code); 221 - if (kernel_data.start >= res->start && 222 - kernel_data.end <= res->end) 223 - request_resource(res, &kernel_data); 224 - } 225 - } 226 - 227 - static void (*init_machine)(void) __initdata; 228 - 229 - static int __init customize_machine(void) 230 - { 231 - /* customizes platform devices, or adds new ones */ 232 - if (init_machine) 233 - init_machine(); 234 - return 0; 235 - } 236 - arch_initcall(customize_machine); 237 - 238 - void __init setup_arch(char **cmdline_p) 239 - { 240 - char *from = default_command_line; 241 - 242 - setup_processor(); 243 - 244 - init_mm.start_code = (unsigned long) _stext; 245 - init_mm.end_code = (unsigned long) _etext; 246 - init_mm.end_data = (unsigned long) _edata; 247 - init_mm.brk = (unsigned long) _end; 248 - 249 - /* parse_early_param needs a boot_command_line */ 250 - strlcpy(boot_command_line, from, COMMAND_LINE_SIZE); 251 - 252 - /* populate cmd_line too for later use, preserving boot_command_line */ 253 - strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE); 254 - *cmdline_p = cmd_line; 255 - 256 - parse_early_param(); 257 - 258 - uc32_memblock_init(&meminfo); 259 - 260 - paging_init(); 261 - request_standard_resources(&meminfo); 262 - 263 - cpu_init(); 264 - 265 - /* 266 - * Set up various architecture-specific pointers 267 - */ 268 - init_machine = puv3_core_init; 269 - 270 - #ifdef CONFIG_VT 271 - #if defined(CONFIG_VGA_CONSOLE) 272 - conswitchp = &vga_con; 273 - #endif 274 - #endif 275 - early_trap_init(); 276 - } 277 - 278 - static struct cpu cpuinfo_unicore; 279 - 280 - static int __init topology_init(void) 281 - { 282 - int i; 283 - 284 - for_each_possible_cpu(i) 285 - register_cpu(&cpuinfo_unicore, i); 286 - 287 - return 0; 288 - } 289 - subsys_initcall(topology_init); 290 - 291 - #ifdef CONFIG_HAVE_PROC_CPU 292 - static int __init proc_cpu_init(void) 293 - { 294 - struct proc_dir_entry *res; 295 - 296 - res = proc_mkdir("cpu", NULL); 297 - if (!res) 298 - return -ENOMEM; 299 - return 0; 300 - } 301 - fs_initcall(proc_cpu_init); 302 - #endif 303 - 304 - static int c_show(struct seq_file *m, void *v) 305 - { 306 - seq_printf(m, "Processor\t: UniCore-II rev %d (%s)\n", 307 - (int)(uc32_cpuid >> 16) & 15, elf_platform); 308 - 309 - seq_printf(m, "BogoMIPS\t: %lu.%02lu\n", 310 - loops_per_jiffy / (500000/HZ), 311 - (loops_per_jiffy / (5000/HZ)) % 100); 312 - 313 - /* dump out the processor features */ 314 - seq_puts(m, "Features\t: CMOV UC-F64"); 315 - 316 - seq_printf(m, "\nCPU implementer\t: 0x%02x\n", uc32_cpuid >> 24); 317 - seq_printf(m, "CPU architecture: 2\n"); 318 - seq_printf(m, "CPU revision\t: %d\n", (uc32_cpuid >> 16) & 15); 319 - 320 - seq_printf(m, "Cache type\t: write-back\n" 321 - "Cache clean\t: cp0 c5 ops\n" 322 - "Cache lockdown\t: not support\n" 323 - "Cache format\t: Harvard\n"); 324 - 325 - seq_puts(m, "\n"); 326 - 327 - seq_printf(m, "Hardware\t: PKUnity v3\n"); 328 - 329 - return 0; 330 - } 331 - 332 - static void *c_start(struct seq_file *m, loff_t *pos) 333 - { 334 - return *pos < 1 ? (void *)1 : NULL; 335 - } 336 - 337 - static void *c_next(struct seq_file *m, void *v, loff_t *pos) 338 - { 339 - ++*pos; 340 - return NULL; 341 - } 342 - 343 - static void c_stop(struct seq_file *m, void *v) 344 - { 345 - } 346 - 347 - const struct seq_operations cpuinfo_op = { 348 - .start = c_start, 349 - .next = c_next, 350 - .stop = c_stop, 351 - .show = c_show 352 - };
-36
arch/unicore32/kernel/setup.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/kernel/setup.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #ifndef __UNICORE_KERNEL_SETUP_H__ 10 - #define __UNICORE_KERNEL_SETUP_H__ 11 - 12 - #include <asm/hwdef-copro.h> 13 - 14 - extern void paging_init(void); 15 - extern void puv3_core_init(void); 16 - extern void cpu_init(void); 17 - 18 - extern void puv3_ps2_init(void); 19 - extern void pci_puv3_preinit(void); 20 - extern void __init puv3_init_gpio(void); 21 - 22 - extern void setup_mm_for_reboot(void); 23 - 24 - extern char __stubs_start[], __stubs_end[]; 25 - extern char __vectors_start[], __vectors_end[]; 26 - 27 - extern void kernel_thread_helper(void); 28 - 29 - extern void __init early_signal_init(void); 30 - 31 - extern asmlinkage void __backtrace(void); 32 - extern asmlinkage void c_backtrace(unsigned long fp, const char *loglvl); 33 - 34 - extern void __show_regs(struct pt_regs *); 35 - 36 - #endif
-424
arch/unicore32/kernel/signal.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/signal.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/errno.h> 10 - #include <linux/signal.h> 11 - #include <linux/personality.h> 12 - #include <linux/uaccess.h> 13 - #include <linux/tracehook.h> 14 - #include <linux/elf.h> 15 - #include <linux/unistd.h> 16 - 17 - #include <asm/cacheflush.h> 18 - #include <asm/ucontext.h> 19 - 20 - /* 21 - * For UniCore syscalls, we encode the syscall number into the instruction. 22 - */ 23 - #define SWI_SYS_SIGRETURN (0xff000000) /* error number for new abi */ 24 - #define SWI_SYS_RT_SIGRETURN (0xff000000 | (__NR_rt_sigreturn)) 25 - #define SWI_SYS_RESTART (0xff000000 | (__NR_restart_syscall)) 26 - 27 - #define KERN_SIGRETURN_CODE (KUSER_VECPAGE_BASE + 0x00000500) 28 - #define KERN_RESTART_CODE (KERN_SIGRETURN_CODE + sizeof(sigreturn_codes)) 29 - 30 - const unsigned long sigreturn_codes[3] = { 31 - SWI_SYS_SIGRETURN, SWI_SYS_RT_SIGRETURN, 32 - }; 33 - 34 - const unsigned long syscall_restart_code[2] = { 35 - SWI_SYS_RESTART, /* swi __NR_restart_syscall */ 36 - 0x69efc004, /* ldr pc, [sp], #4 */ 37 - }; 38 - 39 - /* 40 - * Do a signal return; undo the signal stack. These are aligned to 64-bit. 41 - */ 42 - struct sigframe { 43 - struct ucontext uc; 44 - unsigned long retcode[2]; 45 - }; 46 - 47 - struct rt_sigframe { 48 - struct siginfo info; 49 - struct sigframe sig; 50 - }; 51 - 52 - static int restore_sigframe(struct pt_regs *regs, struct sigframe __user *sf) 53 - { 54 - sigset_t set; 55 - int err; 56 - 57 - err = __copy_from_user(&set, &sf->uc.uc_sigmask, sizeof(set)); 58 - if (err == 0) 59 - set_current_blocked(&set); 60 - 61 - err |= __get_user(regs->UCreg_00, &sf->uc.uc_mcontext.regs.UCreg_00); 62 - err |= __get_user(regs->UCreg_01, &sf->uc.uc_mcontext.regs.UCreg_01); 63 - err |= __get_user(regs->UCreg_02, &sf->uc.uc_mcontext.regs.UCreg_02); 64 - err |= __get_user(regs->UCreg_03, &sf->uc.uc_mcontext.regs.UCreg_03); 65 - err |= __get_user(regs->UCreg_04, &sf->uc.uc_mcontext.regs.UCreg_04); 66 - err |= __get_user(regs->UCreg_05, &sf->uc.uc_mcontext.regs.UCreg_05); 67 - err |= __get_user(regs->UCreg_06, &sf->uc.uc_mcontext.regs.UCreg_06); 68 - err |= __get_user(regs->UCreg_07, &sf->uc.uc_mcontext.regs.UCreg_07); 69 - err |= __get_user(regs->UCreg_08, &sf->uc.uc_mcontext.regs.UCreg_08); 70 - err |= __get_user(regs->UCreg_09, &sf->uc.uc_mcontext.regs.UCreg_09); 71 - err |= __get_user(regs->UCreg_10, &sf->uc.uc_mcontext.regs.UCreg_10); 72 - err |= __get_user(regs->UCreg_11, &sf->uc.uc_mcontext.regs.UCreg_11); 73 - err |= __get_user(regs->UCreg_12, &sf->uc.uc_mcontext.regs.UCreg_12); 74 - err |= __get_user(regs->UCreg_13, &sf->uc.uc_mcontext.regs.UCreg_13); 75 - err |= __get_user(regs->UCreg_14, &sf->uc.uc_mcontext.regs.UCreg_14); 76 - err |= __get_user(regs->UCreg_15, &sf->uc.uc_mcontext.regs.UCreg_15); 77 - err |= __get_user(regs->UCreg_16, &sf->uc.uc_mcontext.regs.UCreg_16); 78 - err |= __get_user(regs->UCreg_17, &sf->uc.uc_mcontext.regs.UCreg_17); 79 - err |= __get_user(regs->UCreg_18, &sf->uc.uc_mcontext.regs.UCreg_18); 80 - err |= __get_user(regs->UCreg_19, &sf->uc.uc_mcontext.regs.UCreg_19); 81 - err |= __get_user(regs->UCreg_20, &sf->uc.uc_mcontext.regs.UCreg_20); 82 - err |= __get_user(regs->UCreg_21, &sf->uc.uc_mcontext.regs.UCreg_21); 83 - err |= __get_user(regs->UCreg_22, &sf->uc.uc_mcontext.regs.UCreg_22); 84 - err |= __get_user(regs->UCreg_23, &sf->uc.uc_mcontext.regs.UCreg_23); 85 - err |= __get_user(regs->UCreg_24, &sf->uc.uc_mcontext.regs.UCreg_24); 86 - err |= __get_user(regs->UCreg_25, &sf->uc.uc_mcontext.regs.UCreg_25); 87 - err |= __get_user(regs->UCreg_26, &sf->uc.uc_mcontext.regs.UCreg_26); 88 - err |= __get_user(regs->UCreg_fp, &sf->uc.uc_mcontext.regs.UCreg_fp); 89 - err |= __get_user(regs->UCreg_ip, &sf->uc.uc_mcontext.regs.UCreg_ip); 90 - err |= __get_user(regs->UCreg_sp, &sf->uc.uc_mcontext.regs.UCreg_sp); 91 - err |= __get_user(regs->UCreg_lr, &sf->uc.uc_mcontext.regs.UCreg_lr); 92 - err |= __get_user(regs->UCreg_pc, &sf->uc.uc_mcontext.regs.UCreg_pc); 93 - err |= __get_user(regs->UCreg_asr, &sf->uc.uc_mcontext.regs.UCreg_asr); 94 - 95 - err |= !valid_user_regs(regs); 96 - 97 - return err; 98 - } 99 - 100 - asmlinkage int __sys_rt_sigreturn(struct pt_regs *regs) 101 - { 102 - struct rt_sigframe __user *frame; 103 - 104 - /* Always make any pending restarted system calls return -EINTR */ 105 - current->restart_block.fn = do_no_restart_syscall; 106 - 107 - /* 108 - * Since we stacked the signal on a 64-bit boundary, 109 - * then 'sp' should be word aligned here. If it's 110 - * not, then the user is trying to mess with us. 111 - */ 112 - if (regs->UCreg_sp & 7) 113 - goto badframe; 114 - 115 - frame = (struct rt_sigframe __user *)regs->UCreg_sp; 116 - 117 - if (!access_ok(frame, sizeof(*frame))) 118 - goto badframe; 119 - 120 - if (restore_sigframe(regs, &frame->sig)) 121 - goto badframe; 122 - 123 - if (restore_altstack(&frame->sig.uc.uc_stack)) 124 - goto badframe; 125 - 126 - return regs->UCreg_00; 127 - 128 - badframe: 129 - force_sig(SIGSEGV); 130 - return 0; 131 - } 132 - 133 - static int setup_sigframe(struct sigframe __user *sf, struct pt_regs *regs, 134 - sigset_t *set) 135 - { 136 - int err = 0; 137 - 138 - err |= __put_user(regs->UCreg_00, &sf->uc.uc_mcontext.regs.UCreg_00); 139 - err |= __put_user(regs->UCreg_01, &sf->uc.uc_mcontext.regs.UCreg_01); 140 - err |= __put_user(regs->UCreg_02, &sf->uc.uc_mcontext.regs.UCreg_02); 141 - err |= __put_user(regs->UCreg_03, &sf->uc.uc_mcontext.regs.UCreg_03); 142 - err |= __put_user(regs->UCreg_04, &sf->uc.uc_mcontext.regs.UCreg_04); 143 - err |= __put_user(regs->UCreg_05, &sf->uc.uc_mcontext.regs.UCreg_05); 144 - err |= __put_user(regs->UCreg_06, &sf->uc.uc_mcontext.regs.UCreg_06); 145 - err |= __put_user(regs->UCreg_07, &sf->uc.uc_mcontext.regs.UCreg_07); 146 - err |= __put_user(regs->UCreg_08, &sf->uc.uc_mcontext.regs.UCreg_08); 147 - err |= __put_user(regs->UCreg_09, &sf->uc.uc_mcontext.regs.UCreg_09); 148 - err |= __put_user(regs->UCreg_10, &sf->uc.uc_mcontext.regs.UCreg_10); 149 - err |= __put_user(regs->UCreg_11, &sf->uc.uc_mcontext.regs.UCreg_11); 150 - err |= __put_user(regs->UCreg_12, &sf->uc.uc_mcontext.regs.UCreg_12); 151 - err |= __put_user(regs->UCreg_13, &sf->uc.uc_mcontext.regs.UCreg_13); 152 - err |= __put_user(regs->UCreg_14, &sf->uc.uc_mcontext.regs.UCreg_14); 153 - err |= __put_user(regs->UCreg_15, &sf->uc.uc_mcontext.regs.UCreg_15); 154 - err |= __put_user(regs->UCreg_16, &sf->uc.uc_mcontext.regs.UCreg_16); 155 - err |= __put_user(regs->UCreg_17, &sf->uc.uc_mcontext.regs.UCreg_17); 156 - err |= __put_user(regs->UCreg_18, &sf->uc.uc_mcontext.regs.UCreg_18); 157 - err |= __put_user(regs->UCreg_19, &sf->uc.uc_mcontext.regs.UCreg_19); 158 - err |= __put_user(regs->UCreg_20, &sf->uc.uc_mcontext.regs.UCreg_20); 159 - err |= __put_user(regs->UCreg_21, &sf->uc.uc_mcontext.regs.UCreg_21); 160 - err |= __put_user(regs->UCreg_22, &sf->uc.uc_mcontext.regs.UCreg_22); 161 - err |= __put_user(regs->UCreg_23, &sf->uc.uc_mcontext.regs.UCreg_23); 162 - err |= __put_user(regs->UCreg_24, &sf->uc.uc_mcontext.regs.UCreg_24); 163 - err |= __put_user(regs->UCreg_25, &sf->uc.uc_mcontext.regs.UCreg_25); 164 - err |= __put_user(regs->UCreg_26, &sf->uc.uc_mcontext.regs.UCreg_26); 165 - err |= __put_user(regs->UCreg_fp, &sf->uc.uc_mcontext.regs.UCreg_fp); 166 - err |= __put_user(regs->UCreg_ip, &sf->uc.uc_mcontext.regs.UCreg_ip); 167 - err |= __put_user(regs->UCreg_sp, &sf->uc.uc_mcontext.regs.UCreg_sp); 168 - err |= __put_user(regs->UCreg_lr, &sf->uc.uc_mcontext.regs.UCreg_lr); 169 - err |= __put_user(regs->UCreg_pc, &sf->uc.uc_mcontext.regs.UCreg_pc); 170 - err |= __put_user(regs->UCreg_asr, &sf->uc.uc_mcontext.regs.UCreg_asr); 171 - 172 - err |= __put_user(current->thread.trap_no, 173 - &sf->uc.uc_mcontext.trap_no); 174 - err |= __put_user(current->thread.error_code, 175 - &sf->uc.uc_mcontext.error_code); 176 - err |= __put_user(current->thread.address, 177 - &sf->uc.uc_mcontext.fault_address); 178 - err |= __put_user(set->sig[0], &sf->uc.uc_mcontext.oldmask); 179 - 180 - err |= __copy_to_user(&sf->uc.uc_sigmask, set, sizeof(*set)); 181 - 182 - return err; 183 - } 184 - 185 - static inline void __user *get_sigframe(struct k_sigaction *ka, 186 - struct pt_regs *regs, int framesize) 187 - { 188 - unsigned long sp = regs->UCreg_sp; 189 - void __user *frame; 190 - 191 - /* 192 - * This is the X/Open sanctioned signal stack switching. 193 - */ 194 - if ((ka->sa.sa_flags & SA_ONSTACK) && !sas_ss_flags(sp)) 195 - sp = current->sas_ss_sp + current->sas_ss_size; 196 - 197 - /* 198 - * ATPCS B01 mandates 8-byte alignment 199 - */ 200 - frame = (void __user *)((sp - framesize) & ~7); 201 - 202 - /* 203 - * Check that we can actually write to the signal frame. 204 - */ 205 - if (!access_ok(frame, framesize)) 206 - frame = NULL; 207 - 208 - return frame; 209 - } 210 - 211 - static int setup_return(struct pt_regs *regs, struct k_sigaction *ka, 212 - unsigned long __user *rc, void __user *frame, int usig) 213 - { 214 - unsigned long handler = (unsigned long)ka->sa.sa_handler; 215 - unsigned long retcode; 216 - unsigned long asr = regs->UCreg_asr & ~PSR_f; 217 - 218 - unsigned int idx = 0; 219 - 220 - if (ka->sa.sa_flags & SA_SIGINFO) 221 - idx += 1; 222 - 223 - if (__put_user(sigreturn_codes[idx], rc) || 224 - __put_user(sigreturn_codes[idx+1], rc+1)) 225 - return 1; 226 - 227 - retcode = KERN_SIGRETURN_CODE + (idx << 2); 228 - 229 - regs->UCreg_00 = usig; 230 - regs->UCreg_sp = (unsigned long)frame; 231 - regs->UCreg_lr = retcode; 232 - regs->UCreg_pc = handler; 233 - regs->UCreg_asr = asr; 234 - 235 - return 0; 236 - } 237 - 238 - static int setup_frame(struct ksignal *ksig, sigset_t *set, 239 - struct pt_regs *regs) 240 - { 241 - struct sigframe __user *frame = get_sigframe(&ksig->ka, regs, sizeof(*frame)); 242 - int err = 0; 243 - 244 - if (!frame) 245 - return 1; 246 - 247 - /* 248 - * Set uc.uc_flags to a value which sc.trap_no would never have. 249 - */ 250 - err |= __put_user(0x5ac3c35a, &frame->uc.uc_flags); 251 - 252 - err |= setup_sigframe(frame, regs, set); 253 - if (err == 0) 254 - err |= setup_return(regs, &ksig->ka, frame->retcode, frame, 255 - ksig->sig); 256 - 257 - return err; 258 - } 259 - 260 - static int setup_rt_frame(struct ksignal *ksig, sigset_t *set, 261 - struct pt_regs *regs) 262 - { 263 - struct rt_sigframe __user *frame = 264 - get_sigframe(&ksig->ka, regs, sizeof(*frame)); 265 - int err = 0; 266 - 267 - if (!frame) 268 - return 1; 269 - 270 - err |= copy_siginfo_to_user(&frame->info, &ksig->info); 271 - 272 - err |= __put_user(0, &frame->sig.uc.uc_flags); 273 - err |= __put_user(NULL, &frame->sig.uc.uc_link); 274 - err |= __save_altstack(&frame->sig.uc.uc_stack, regs->UCreg_sp); 275 - err |= setup_sigframe(&frame->sig, regs, set); 276 - if (err == 0) 277 - err |= setup_return(regs, &ksig->ka, frame->sig.retcode, frame, 278 - ksig->sig); 279 - 280 - if (err == 0) { 281 - /* 282 - * For realtime signals we must also set the second and third 283 - * arguments for the signal handler. 284 - */ 285 - regs->UCreg_01 = (unsigned long)&frame->info; 286 - regs->UCreg_02 = (unsigned long)&frame->sig.uc; 287 - } 288 - 289 - return err; 290 - } 291 - 292 - static inline void setup_syscall_restart(struct pt_regs *regs) 293 - { 294 - regs->UCreg_00 = regs->UCreg_ORIG_00; 295 - regs->UCreg_pc -= 4; 296 - } 297 - 298 - /* 299 - * OK, we're invoking a handler 300 - */ 301 - static void handle_signal(struct ksignal *ksig, struct pt_regs *regs, 302 - int syscall) 303 - { 304 - struct thread_info *thread = current_thread_info(); 305 - sigset_t *oldset = sigmask_to_save(); 306 - int usig = ksig->sig; 307 - int ret; 308 - 309 - /* 310 - * If we were from a system call, check for system call restarting... 311 - */ 312 - if (syscall) { 313 - switch (regs->UCreg_00) { 314 - case -ERESTART_RESTARTBLOCK: 315 - case -ERESTARTNOHAND: 316 - regs->UCreg_00 = -EINTR; 317 - break; 318 - case -ERESTARTSYS: 319 - if (!(ksig->ka.sa.sa_flags & SA_RESTART)) { 320 - regs->UCreg_00 = -EINTR; 321 - break; 322 - } 323 - /* fallthrough */ 324 - case -ERESTARTNOINTR: 325 - setup_syscall_restart(regs); 326 - } 327 - } 328 - 329 - /* 330 - * Set up the stack frame 331 - */ 332 - if (ksig->ka.sa.sa_flags & SA_SIGINFO) 333 - ret = setup_rt_frame(ksig, oldset, regs); 334 - else 335 - ret = setup_frame(ksig, oldset, regs); 336 - 337 - /* 338 - * Check that the resulting registers are actually sane. 339 - */ 340 - ret |= !valid_user_regs(regs); 341 - 342 - signal_setup_done(ret, ksig, 0); 343 - } 344 - 345 - /* 346 - * Note that 'init' is a special process: it doesn't get signals it doesn't 347 - * want to handle. Thus you cannot kill init even with a SIGKILL even by 348 - * mistake. 349 - * 350 - * Note that we go through the signals twice: once to check the signals that 351 - * the kernel can handle, and then we build all the user-level signal handling 352 - * stack-frames in one go after that. 353 - */ 354 - static void do_signal(struct pt_regs *regs, int syscall) 355 - { 356 - struct ksignal ksig; 357 - 358 - /* 359 - * We want the common case to go fast, which 360 - * is why we may in certain cases get here from 361 - * kernel mode. Just return without doing anything 362 - * if so. 363 - */ 364 - if (!user_mode(regs)) 365 - return; 366 - 367 - if (get_signal(&ksig)) { 368 - handle_signal(&ksig, regs, syscall); 369 - return; 370 - } 371 - 372 - /* 373 - * No signal to deliver to the process - restart the syscall. 374 - */ 375 - if (syscall) { 376 - if (regs->UCreg_00 == -ERESTART_RESTARTBLOCK) { 377 - u32 __user *usp; 378 - 379 - regs->UCreg_sp -= 4; 380 - usp = (u32 __user *)regs->UCreg_sp; 381 - 382 - if (put_user(regs->UCreg_pc, usp) == 0) { 383 - regs->UCreg_pc = KERN_RESTART_CODE; 384 - } else { 385 - regs->UCreg_sp += 4; 386 - force_sigsegv(0); 387 - } 388 - } 389 - if (regs->UCreg_00 == -ERESTARTNOHAND || 390 - regs->UCreg_00 == -ERESTARTSYS || 391 - regs->UCreg_00 == -ERESTARTNOINTR) { 392 - setup_syscall_restart(regs); 393 - } 394 - } 395 - /* If there's no signal to deliver, we just put the saved 396 - * sigmask back. 397 - */ 398 - restore_saved_sigmask(); 399 - } 400 - 401 - asmlinkage void do_notify_resume(struct pt_regs *regs, 402 - unsigned int thread_flags, int syscall) 403 - { 404 - if (thread_flags & _TIF_SIGPENDING) 405 - do_signal(regs, syscall); 406 - 407 - if (thread_flags & _TIF_NOTIFY_RESUME) { 408 - clear_thread_flag(TIF_NOTIFY_RESUME); 409 - tracehook_notify_resume(regs); 410 - } 411 - } 412 - 413 - /* 414 - * Copy signal return handlers into the vector page, and 415 - * set sigreturn to be a pointer to these. 416 - */ 417 - void __init early_signal_init(void) 418 - { 419 - memcpy((void *)kuser_vecpage_to_vectors(KERN_SIGRETURN_CODE), 420 - sigreturn_codes, sizeof(sigreturn_codes)); 421 - memcpy((void *)kuser_vecpage_to_vectors(KERN_RESTART_CODE), 422 - syscall_restart_code, sizeof(syscall_restart_code)); 423 - /* Need not to flush icache, since early_trap_init will do it last. */ 424 - }
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arch/unicore32/kernel/sleep.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/kernel/sleep.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn> 8 - * Copyright (C) 2001-2010 Guan Xuetao 9 - */ 10 - 11 - #include <linux/linkage.h> 12 - #include <asm/assembler.h> 13 - #include <mach/hardware.h> 14 - 15 - .text 16 - 17 - pkunity_cpu_save_cp: 18 - 19 - @ get coprocessor registers 20 - 21 - movc r3, p0.c7, #0 @ PID 22 - movc r4, p0.c2, #0 @ translation table base addr 23 - movc r5, p0.c1, #0 @ control reg 24 - 25 - 26 - @ store them plus current virtual stack ptr on stack 27 - mov r6, sp 28 - stm.w (r3 - r6), [sp-] 29 - 30 - mov pc, lr 31 - 32 - pkunity_cpu_save_sp: 33 - @ preserve phys address of stack 34 - mov r0, sp 35 - stw.w lr, [sp+], #-4 36 - b.l sleep_phys_sp 37 - ldw r1, =sleep_save_sp 38 - stw r0, [r1] 39 - ldw.w pc, [sp]+, #4 40 - 41 - /* 42 - * puv3_cpu_suspend() 43 - * 44 - * Forces CPU into sleep state. 45 - * 46 - * r0 = value for PWRMODE M field for desired sleep state 47 - */ 48 - 49 - ENTRY(puv3_cpu_suspend) 50 - stm.w (r16 - r27, lr), [sp-] @ save registers on stack 51 - stm.w (r4 - r15), [sp-] @ save registers on stack 52 - 53 - #ifdef CONFIG_UNICORE_FPU_F64 54 - sfm.w (f0 - f7 ), [sp-] 55 - sfm.w (f8 - f15), [sp-] 56 - sfm.w (f16 - f23), [sp-] 57 - sfm.w (f24 - f31), [sp-] 58 - cff r4, s31 59 - stm.w (r4), [sp-] 60 - #endif 61 - b.l pkunity_cpu_save_cp 62 - 63 - b.l pkunity_cpu_save_sp 64 - 65 - @ clean data cache 66 - mov r1, #0 67 - movc p0.c5, r1, #14 68 - nop 69 - nop 70 - nop 71 - nop 72 - 73 - 74 - 75 - @ DDR2 BaseAddr 76 - ldw r0, =(PKUNITY_DDR2CTRL_BASE) 77 - 78 - @ PM BaseAddr 79 - ldw r1, =(PKUNITY_PM_BASE) 80 - 81 - @ set PLL_SYS_CFG reg, 275 82 - movl r6, #0x00002401 83 - stw r6, [r1+], #0x18 84 - @ set PLL_DDR_CFG reg, 66MHz 85 - movl r6, #0x00100c00 86 - stw r6, [r1+], #0x1c 87 - 88 - @ set wake up source 89 - movl r8, #0x800001ff @ epip4d 90 - stw r8, [r1+], #0xc 91 - 92 - @ set PGSR 93 - movl r5, #0x40000 94 - stw r5, [r1+], #0x10 95 - 96 - @ prepare DDR2 refresh settings 97 - ldw r5, [r0+], #0x24 98 - or r5, r5, #0x00000001 99 - 100 - @ prepare PMCR for PLL changing 101 - movl r6, #0xc 102 - 103 - @ prepare for closing PLL 104 - movl r7, #0x1 105 - 106 - @ prepare sleep mode 107 - mov r8, #0x1 108 - 109 - @ movl r0, 0x11111111 110 - @ put_word_ocd r0 111 - b pkunity_cpu_do_suspend 112 - 113 - .ltorg 114 - .align 5 115 - pkunity_cpu_do_suspend: 116 - b 101f 117 - @ put DDR2 into self-refresh 118 - 100: stw r5, [r0+], #0x24 119 - @ change PLL 120 - stw r6, [r1] 121 - b 1f 122 - 123 - .ltorg 124 - .align 5 125 - 101: b 102f 126 - @ wait for PLL changing complete 127 - 1: ldw r6, [r1+], #0x44 128 - csub.a r6, #0x1 129 - bne 1b 130 - b 2f 131 - 132 - .ltorg 133 - .align 5 134 - 102: b 100b 135 - @ close PLL 136 - 2: stw r7, [r1+], #0x4 137 - @ enter sleep mode 138 - stw r8, [r1] 139 - 3: b 3b 140 - 141 - 142 - 143 - 144 - /* 145 - * puv3_cpu_resume() 146 - * 147 - * entry point from bootloader into kernel during resume 148 - * 149 - * Note: Yes, part of the following code is located into the .data section. 150 - * This is to allow sleep_save_sp to be accessed with a relative load 151 - * while we can't rely on any MMU translation. We could have put 152 - * sleep_save_sp in the .text section as well, but some setups might 153 - * insist on it to be truly read-only. 154 - */ 155 - 156 - .data 157 - .align 5 158 - ENTRY(puv3_cpu_resume) 159 - @ movl r0, 0x20202020 160 - @ put_word_ocd r0 161 - 162 - ldw r0, sleep_save_sp @ stack phys addr 163 - ldw r2, =resume_after_mmu @ its absolute virtual address 164 - ldm (r3 - r6), [r0]+ @ CP regs + virt stack ptr 165 - mov sp, r6 @ CP regs + virt stack ptr 166 - 167 - mov r1, #0 168 - movc p0.c6, r1, #6 @ invalidate I & D TLBs 169 - movc p0.c5, r1, #28 @ invalidate I & D caches, BTB 170 - 171 - movc p0.c7, r3, #0 @ PID 172 - movc p0.c2, r4, #0 @ translation table base addr 173 - movc p0.c1, r5, #0 @ control reg, turn on mmu 174 - nop 175 - jump r2 176 - nop 177 - nop 178 - nop 179 - nop 180 - nop 181 - 182 - sleep_save_sp: 183 - .word 0 @ preserve stack phys ptr here 184 - 185 - .text 186 - resume_after_mmu: 187 - @ movl r0, 0x30303030 188 - @ put_word_ocd r0 189 - 190 - #ifdef CONFIG_UNICORE_FPU_F64 191 - lfm.w (f0 - f7 ), [sp]+ 192 - lfm.w (f8 - f15), [sp]+ 193 - lfm.w (f16 - f23), [sp]+ 194 - lfm.w (f24 - f31), [sp]+ 195 - ldm.w (r4), [sp]+ 196 - ctf r4, s31 197 - #endif 198 - ldm.w (r4 - r15), [sp]+ @ restore registers from stack 199 - ldm.w (r16 - r27, pc), [sp]+ @ return to caller
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arch/unicore32/kernel/stacktrace.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/stacktrace.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/module.h> 10 - #include <linux/sched.h> 11 - #include <linux/sched/debug.h> 12 - #include <linux/stacktrace.h> 13 - 14 - #include <asm/stacktrace.h> 15 - 16 - #if defined(CONFIG_FRAME_POINTER) 17 - /* 18 - * Unwind the current stack frame and store the new register values in the 19 - * structure passed as argument. Unwinding is equivalent to a function return, 20 - * hence the new PC value rather than LR should be used for backtrace. 21 - * 22 - * With framepointer enabled, a simple function prologue looks like this: 23 - * mov ip, sp 24 - * stmdb sp!, {fp, ip, lr, pc} 25 - * sub fp, ip, #4 26 - * 27 - * A simple function epilogue looks like this: 28 - * ldm sp, {fp, sp, pc} 29 - * 30 - * Note that with framepointer enabled, even the leaf functions have the same 31 - * prologue and epilogue, therefore we can ignore the LR value in this case. 32 - */ 33 - int notrace unwind_frame(struct stackframe *frame) 34 - { 35 - unsigned long high, low; 36 - unsigned long fp = frame->fp; 37 - 38 - /* only go to a higher address on the stack */ 39 - low = frame->sp; 40 - high = ALIGN(low, THREAD_SIZE); 41 - 42 - /* check current frame pointer is within bounds */ 43 - if (fp < (low + 12) || fp + 4 >= high) 44 - return -EINVAL; 45 - 46 - /* restore the registers from the stack frame */ 47 - frame->fp = *(unsigned long *)(fp - 12); 48 - frame->sp = *(unsigned long *)(fp - 8); 49 - frame->pc = *(unsigned long *)(fp - 4); 50 - 51 - return 0; 52 - } 53 - #endif 54 - 55 - void notrace walk_stackframe(struct stackframe *frame, 56 - int (*fn)(struct stackframe *, void *), void *data) 57 - { 58 - while (1) { 59 - int ret; 60 - 61 - if (fn(frame, data)) 62 - break; 63 - ret = unwind_frame(frame); 64 - if (ret < 0) 65 - break; 66 - } 67 - } 68 - EXPORT_SYMBOL(walk_stackframe); 69 - 70 - #ifdef CONFIG_STACKTRACE 71 - struct stack_trace_data { 72 - struct stack_trace *trace; 73 - unsigned int no_sched_functions; 74 - unsigned int skip; 75 - }; 76 - 77 - static int save_trace(struct stackframe *frame, void *d) 78 - { 79 - struct stack_trace_data *data = d; 80 - struct stack_trace *trace = data->trace; 81 - unsigned long addr = frame->pc; 82 - 83 - if (data->no_sched_functions && in_sched_functions(addr)) 84 - return 0; 85 - if (data->skip) { 86 - data->skip--; 87 - return 0; 88 - } 89 - 90 - trace->entries[trace->nr_entries++] = addr; 91 - 92 - return trace->nr_entries >= trace->max_entries; 93 - } 94 - 95 - void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) 96 - { 97 - struct stack_trace_data data; 98 - struct stackframe frame; 99 - 100 - data.trace = trace; 101 - data.skip = trace->skip; 102 - 103 - if (tsk != current) { 104 - data.no_sched_functions = 1; 105 - frame.fp = thread_saved_fp(tsk); 106 - frame.sp = thread_saved_sp(tsk); 107 - frame.lr = 0; /* recovered from the stack */ 108 - frame.pc = thread_saved_pc(tsk); 109 - } else { 110 - register unsigned long current_sp asm("sp"); 111 - 112 - data.no_sched_functions = 0; 113 - frame.fp = (unsigned long)__builtin_frame_address(0); 114 - frame.sp = current_sp; 115 - frame.lr = (unsigned long)__builtin_return_address(0); 116 - frame.pc = (unsigned long)save_stack_trace_tsk; 117 - } 118 - 119 - walk_stackframe(&frame, save_trace, &data); 120 - } 121 - 122 - void save_stack_trace(struct stack_trace *trace) 123 - { 124 - save_stack_trace_tsk(current, trace); 125 - } 126 - EXPORT_SYMBOL_GPL(save_stack_trace); 127 - #endif
-37
arch/unicore32/kernel/sys.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/sys.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/module.h> 10 - #include <linux/errno.h> 11 - #include <linux/sched.h> 12 - #include <linux/slab.h> 13 - #include <linux/mm.h> 14 - #include <linux/sem.h> 15 - #include <linux/msg.h> 16 - #include <linux/shm.h> 17 - #include <linux/stat.h> 18 - #include <linux/syscalls.h> 19 - #include <linux/mman.h> 20 - #include <linux/fs.h> 21 - #include <linux/file.h> 22 - #include <linux/ipc.h> 23 - #include <linux/uaccess.h> 24 - 25 - #include <asm/syscalls.h> 26 - #include <asm/cacheflush.h> 27 - 28 - /* Provide the actual syscall number to call mapping. */ 29 - #undef __SYSCALL 30 - #define __SYSCALL(nr, call) [nr] = (call), 31 - 32 - #define sys_mmap2 sys_mmap_pgoff 33 - /* Note that we don't include <linux/unistd.h> but <asm/unistd.h> */ 34 - void *sys_call_table[__NR_syscalls] = { 35 - [0 ... __NR_syscalls-1] = sys_ni_syscall, 36 - #include <asm/unistd.h> 37 - };
-128
arch/unicore32/kernel/time.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/time.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn> 8 - * Copyright (C) 2001-2010 Guan Xuetao 9 - */ 10 - #include <linux/init.h> 11 - #include <linux/errno.h> 12 - #include <linux/interrupt.h> 13 - #include <linux/irq.h> 14 - #include <linux/timex.h> 15 - #include <linux/clockchips.h> 16 - 17 - #include <mach/hardware.h> 18 - 19 - #define MIN_OSCR_DELTA 2 20 - 21 - static irqreturn_t puv3_ost0_interrupt(int irq, void *dev_id) 22 - { 23 - struct clock_event_device *c = dev_id; 24 - 25 - /* Disarm the compare/match, signal the event. */ 26 - writel(readl(OST_OIER) & ~OST_OIER_E0, OST_OIER); 27 - writel(readl(OST_OSSR) & ~OST_OSSR_M0, OST_OSSR); 28 - c->event_handler(c); 29 - 30 - return IRQ_HANDLED; 31 - } 32 - 33 - static int 34 - puv3_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c) 35 - { 36 - unsigned long next, oscr; 37 - 38 - writel(readl(OST_OIER) | OST_OIER_E0, OST_OIER); 39 - next = readl(OST_OSCR) + delta; 40 - writel(next, OST_OSMR0); 41 - oscr = readl(OST_OSCR); 42 - 43 - return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0; 44 - } 45 - 46 - static int puv3_osmr0_shutdown(struct clock_event_device *evt) 47 - { 48 - writel(readl(OST_OIER) & ~OST_OIER_E0, OST_OIER); 49 - writel(readl(OST_OSSR) & ~OST_OSSR_M0, OST_OSSR); 50 - return 0; 51 - } 52 - 53 - static struct clock_event_device ckevt_puv3_osmr0 = { 54 - .name = "osmr0", 55 - .features = CLOCK_EVT_FEAT_ONESHOT, 56 - .rating = 200, 57 - .set_next_event = puv3_osmr0_set_next_event, 58 - .set_state_shutdown = puv3_osmr0_shutdown, 59 - .set_state_oneshot = puv3_osmr0_shutdown, 60 - }; 61 - 62 - static u64 puv3_read_oscr(struct clocksource *cs) 63 - { 64 - return readl(OST_OSCR); 65 - } 66 - 67 - static struct clocksource cksrc_puv3_oscr = { 68 - .name = "oscr", 69 - .rating = 200, 70 - .read = puv3_read_oscr, 71 - .mask = CLOCKSOURCE_MASK(32), 72 - .flags = CLOCK_SOURCE_IS_CONTINUOUS, 73 - }; 74 - 75 - void __init time_init(void) 76 - { 77 - writel(0, OST_OIER); /* disable any timer interrupts */ 78 - writel(0, OST_OSSR); /* clear status on all timers */ 79 - 80 - clockevents_calc_mult_shift(&ckevt_puv3_osmr0, CLOCK_TICK_RATE, 5); 81 - 82 - ckevt_puv3_osmr0.max_delta_ns = 83 - clockevent_delta2ns(0x7fffffff, &ckevt_puv3_osmr0); 84 - ckevt_puv3_osmr0.max_delta_ticks = 0x7fffffff; 85 - ckevt_puv3_osmr0.min_delta_ns = 86 - clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_puv3_osmr0) + 1; 87 - ckevt_puv3_osmr0.min_delta_ticks = MIN_OSCR_DELTA * 2; 88 - ckevt_puv3_osmr0.cpumask = cpumask_of(0); 89 - 90 - if (request_irq(IRQ_TIMER0, puv3_ost0_interrupt, 91 - IRQF_TIMER | IRQF_IRQPOLL, "ost0", &ckevt_puv3_osmr0)) 92 - pr_err("Failed to register ost0 interrupt\n"); 93 - 94 - clocksource_register_hz(&cksrc_puv3_oscr, CLOCK_TICK_RATE); 95 - clockevents_register_device(&ckevt_puv3_osmr0); 96 - } 97 - 98 - #ifdef CONFIG_PM 99 - unsigned long osmr[4], oier; 100 - 101 - void puv3_timer_suspend(void) 102 - { 103 - osmr[0] = readl(OST_OSMR0); 104 - osmr[1] = readl(OST_OSMR1); 105 - osmr[2] = readl(OST_OSMR2); 106 - osmr[3] = readl(OST_OSMR3); 107 - oier = readl(OST_OIER); 108 - } 109 - 110 - void puv3_timer_resume(void) 111 - { 112 - writel(0, OST_OSSR); 113 - writel(osmr[0], OST_OSMR0); 114 - writel(osmr[1], OST_OSMR1); 115 - writel(osmr[2], OST_OSMR2); 116 - writel(osmr[3], OST_OSMR3); 117 - writel(oier, OST_OIER); 118 - 119 - /* 120 - * OSMR0 is the system timer: make sure OSCR is sufficiently behind 121 - */ 122 - writel(readl(OST_OSMR0) - LATCH, OST_OSCR); 123 - } 124 - #else 125 - void puv3_timer_suspend(void) { }; 126 - void puv3_timer_resume(void) { }; 127 - #endif 128 -
-322
arch/unicore32/kernel/traps.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/kernel/traps.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * 'traps.c' handles hardware exceptions after we have saved some state. 10 - * Mostly a debugging aid, but will probably kill the offending process. 11 - */ 12 - #include <linux/module.h> 13 - #include <linux/signal.h> 14 - #include <linux/sched/signal.h> 15 - #include <linux/sched/debug.h> 16 - #include <linux/sched/task_stack.h> 17 - #include <linux/spinlock.h> 18 - #include <linux/personality.h> 19 - #include <linux/kallsyms.h> 20 - #include <linux/kdebug.h> 21 - #include <linux/uaccess.h> 22 - #include <linux/delay.h> 23 - #include <linux/hardirq.h> 24 - #include <linux/init.h> 25 - #include <linux/atomic.h> 26 - #include <linux/unistd.h> 27 - 28 - #include <asm/cacheflush.h> 29 - #include <asm/traps.h> 30 - 31 - #include "setup.h" 32 - 33 - static void dump_mem(const char *, const char *, unsigned long, unsigned long); 34 - 35 - void dump_backtrace_entry(unsigned long where, 36 - unsigned long from, unsigned long frame) 37 - { 38 - #ifdef CONFIG_KALLSYMS 39 - printk(KERN_DEFAULT "[<%08lx>] (%pS) from [<%08lx>] (%pS)\n", 40 - where, (void *)where, from, (void *)from); 41 - #else 42 - printk(KERN_DEFAULT "Function entered at [<%08lx>] from [<%08lx>]\n", 43 - where, from); 44 - #endif 45 - } 46 - 47 - /* 48 - * Stack pointers should always be within the kernels view of 49 - * physical memory. If it is not there, then we can't dump 50 - * out any information relating to the stack. 51 - */ 52 - static int verify_stack(unsigned long sp) 53 - { 54 - if (sp < PAGE_OFFSET || 55 - (sp > (unsigned long)high_memory && high_memory != NULL)) 56 - return -EFAULT; 57 - 58 - return 0; 59 - } 60 - 61 - /* 62 - * Dump out the contents of some memory nicely... 63 - */ 64 - static void dump_mem(const char *lvl, const char *str, unsigned long bottom, 65 - unsigned long top) 66 - { 67 - unsigned long first; 68 - mm_segment_t fs; 69 - int i; 70 - 71 - /* 72 - * We need to switch to kernel mode so that we can use __get_user 73 - * to safely read from kernel space. Note that we now dump the 74 - * code first, just in case the backtrace kills us. 75 - */ 76 - fs = get_fs(); 77 - set_fs(KERNEL_DS); 78 - 79 - printk(KERN_DEFAULT "%s%s(0x%08lx to 0x%08lx)\n", 80 - lvl, str, bottom, top); 81 - 82 - for (first = bottom & ~31; first < top; first += 32) { 83 - unsigned long p; 84 - char str[sizeof(" 12345678") * 8 + 1]; 85 - 86 - memset(str, ' ', sizeof(str)); 87 - str[sizeof(str) - 1] = '\0'; 88 - 89 - for (p = first, i = 0; i < 8 && p < top; i++, p += 4) { 90 - if (p >= bottom && p < top) { 91 - unsigned long val; 92 - if (__get_user(val, (unsigned long *)p) == 0) 93 - sprintf(str + i * 9, " %08lx", val); 94 - else 95 - sprintf(str + i * 9, " ????????"); 96 - } 97 - } 98 - printk(KERN_DEFAULT "%s%04lx:%s\n", lvl, first & 0xffff, str); 99 - } 100 - 101 - set_fs(fs); 102 - } 103 - 104 - static void dump_instr(const char *lvl, struct pt_regs *regs) 105 - { 106 - unsigned long addr = instruction_pointer(regs); 107 - const int width = 8; 108 - mm_segment_t fs; 109 - char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str; 110 - int i; 111 - 112 - /* 113 - * We need to switch to kernel mode so that we can use __get_user 114 - * to safely read from kernel space. Note that we now dump the 115 - * code first, just in case the backtrace kills us. 116 - */ 117 - fs = get_fs(); 118 - set_fs(KERNEL_DS); 119 - 120 - for (i = -4; i < 1; i++) { 121 - unsigned int val, bad; 122 - 123 - bad = __get_user(val, &((u32 *)addr)[i]); 124 - 125 - if (!bad) 126 - p += sprintf(p, i == 0 ? "(%0*x) " : "%0*x ", 127 - width, val); 128 - else { 129 - p += sprintf(p, "bad PC value"); 130 - break; 131 - } 132 - } 133 - printk(KERN_DEFAULT "%sCode: %s\n", lvl, str); 134 - 135 - set_fs(fs); 136 - } 137 - 138 - static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk, 139 - const char *loglvl) 140 - { 141 - unsigned int fp; 142 - int ok = 1; 143 - 144 - printk("%sBacktrace: ", loglvl); 145 - 146 - if (!tsk) 147 - tsk = current; 148 - 149 - if (regs) 150 - fp = regs->UCreg_fp; 151 - else if (tsk != current) 152 - fp = thread_saved_fp(tsk); 153 - else 154 - asm("mov %0, fp" : "=r" (fp) : : "cc"); 155 - 156 - if (!fp) { 157 - printk("%sno frame pointer", loglvl); 158 - ok = 0; 159 - } else if (verify_stack(fp)) { 160 - printk("%sinvalid frame pointer 0x%08x", loglvl, fp); 161 - ok = 0; 162 - } else if (fp < (unsigned long)end_of_stack(tsk)) 163 - printk("%sframe pointer underflow", loglvl); 164 - printk("%s\n", loglvl); 165 - 166 - if (ok) 167 - c_backtrace(fp, loglvl); 168 - } 169 - 170 - void show_stack(struct task_struct *tsk, unsigned long *sp, 171 - const char *loglvl) 172 - { 173 - dump_backtrace(NULL, tsk, loglvl); 174 - barrier(); 175 - } 176 - 177 - static int __die(const char *str, int err, struct thread_info *thread, 178 - struct pt_regs *regs) 179 - { 180 - struct task_struct *tsk = thread->task; 181 - static int die_counter; 182 - int ret; 183 - 184 - printk(KERN_EMERG "Internal error: %s: %x [#%d]\n", 185 - str, err, ++die_counter); 186 - 187 - /* trap and error numbers are mostly meaningless on UniCore */ 188 - ret = notify_die(DIE_OOPS, str, regs, err, tsk->thread.trap_no, \ 189 - SIGSEGV); 190 - if (ret == NOTIFY_STOP) 191 - return ret; 192 - 193 - print_modules(); 194 - __show_regs(regs); 195 - printk(KERN_EMERG "Process %.*s (pid: %d, stack limit = 0x%p)\n", 196 - TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), thread + 1); 197 - 198 - if (!user_mode(regs) || in_interrupt()) { 199 - dump_mem(KERN_EMERG, "Stack: ", regs->UCreg_sp, 200 - THREAD_SIZE + (unsigned long)task_stack_page(tsk)); 201 - dump_backtrace(regs, tsk, KERN_EMERG); 202 - dump_instr(KERN_EMERG, regs); 203 - } 204 - 205 - return ret; 206 - } 207 - 208 - DEFINE_SPINLOCK(die_lock); 209 - 210 - /* 211 - * This function is protected against re-entrancy. 212 - */ 213 - void die(const char *str, struct pt_regs *regs, int err) 214 - { 215 - struct thread_info *thread = current_thread_info(); 216 - int ret; 217 - 218 - oops_enter(); 219 - 220 - spin_lock_irq(&die_lock); 221 - console_verbose(); 222 - bust_spinlocks(1); 223 - ret = __die(str, err, thread, regs); 224 - 225 - bust_spinlocks(0); 226 - add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE); 227 - spin_unlock_irq(&die_lock); 228 - oops_exit(); 229 - 230 - if (in_interrupt()) 231 - panic("Fatal exception in interrupt"); 232 - if (panic_on_oops) 233 - panic("Fatal exception"); 234 - if (ret != NOTIFY_STOP) 235 - do_exit(SIGSEGV); 236 - } 237 - 238 - void uc32_notify_die(const char *str, struct pt_regs *regs, 239 - int sig, int code, void __user *addr, 240 - unsigned long err, unsigned long trap) 241 - { 242 - if (user_mode(regs)) { 243 - current->thread.error_code = err; 244 - current->thread.trap_no = trap; 245 - 246 - force_sig_fault(sig, code, addr); 247 - } else 248 - die(str, regs, err); 249 - } 250 - 251 - /* 252 - * bad_mode handles the impossible case in the vectors. If you see one of 253 - * these, then it's extremely serious, and could mean you have buggy hardware. 254 - * It never returns, and never tries to sync. We hope that we can at least 255 - * dump out some state information... 256 - */ 257 - asmlinkage void bad_mode(struct pt_regs *regs, unsigned int reason) 258 - { 259 - console_verbose(); 260 - 261 - printk(KERN_CRIT "Bad mode detected with reason 0x%x\n", reason); 262 - 263 - die("Oops - bad mode", regs, 0); 264 - local_irq_disable(); 265 - panic("bad mode"); 266 - } 267 - 268 - void __pte_error(const char *file, int line, unsigned long val) 269 - { 270 - printk(KERN_DEFAULT "%s:%d: bad pte %08lx.\n", file, line, val); 271 - } 272 - 273 - void __pmd_error(const char *file, int line, unsigned long val) 274 - { 275 - printk(KERN_DEFAULT "%s:%d: bad pmd %08lx.\n", file, line, val); 276 - } 277 - 278 - void __pgd_error(const char *file, int line, unsigned long val) 279 - { 280 - printk(KERN_DEFAULT "%s:%d: bad pgd %08lx.\n", file, line, val); 281 - } 282 - 283 - asmlinkage void __div0(void) 284 - { 285 - printk(KERN_DEFAULT "Division by zero in kernel.\n"); 286 - dump_stack(); 287 - } 288 - EXPORT_SYMBOL(__div0); 289 - 290 - void abort(void) 291 - { 292 - BUG(); 293 - 294 - /* if that doesn't kill us, halt */ 295 - panic("Oops failed to kill thread"); 296 - } 297 - 298 - void __init trap_init(void) 299 - { 300 - return; 301 - } 302 - 303 - void __init early_trap_init(void) 304 - { 305 - unsigned long vectors = VECTORS_BASE; 306 - 307 - /* 308 - * Copy the vectors, stubs (in entry-unicore.S) 309 - * into the vector page, mapped at 0xffff0000, and ensure these 310 - * are visible to the instruction stream. 311 - */ 312 - memcpy((void *)vectors, 313 - __vectors_start, 314 - __vectors_end - __vectors_start); 315 - memcpy((void *)vectors + 0x200, 316 - __stubs_start, 317 - __stubs_end - __stubs_start); 318 - 319 - early_signal_init(); 320 - 321 - flush_icache_range(vectors, vectors + PAGE_SIZE); 322 - }
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arch/unicore32/kernel/vmlinux.lds.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/kernel/vmlinux.lds.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - #include <asm-generic/vmlinux.lds.h> 11 - #include <asm/thread_info.h> 12 - #include <asm/memory.h> 13 - #include <asm/page.h> 14 - #include <asm/cache.h> 15 - 16 - OUTPUT_ARCH(unicore32) 17 - ENTRY(stext) 18 - 19 - jiffies = jiffies_64; 20 - 21 - SECTIONS 22 - { 23 - . = PAGE_OFFSET + KERNEL_IMAGE_START; 24 - 25 - _text = .; 26 - __init_begin = .; 27 - HEAD_TEXT_SECTION 28 - INIT_TEXT_SECTION(PAGE_SIZE) 29 - INIT_DATA_SECTION(16) 30 - PERCPU_SECTION(L1_CACHE_BYTES) 31 - __init_end = .; 32 - 33 - _stext = .; 34 - .text : { /* Real text segment */ 35 - TEXT_TEXT 36 - SCHED_TEXT 37 - CPUIDLE_TEXT 38 - LOCK_TEXT 39 - 40 - *(.fixup) 41 - *(.gnu.warning) 42 - } 43 - _etext = .; 44 - 45 - _sdata = .; 46 - RO_DATA(PAGE_SIZE) 47 - RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE) 48 - _edata = .; 49 - 50 - EXCEPTION_TABLE(L1_CACHE_BYTES) 51 - 52 - BSS_SECTION(0, 0, 0) 53 - _end = .; 54 - 55 - STABS_DEBUG 56 - DWARF_DEBUG 57 - 58 - DISCARDS /* Exit code and data */ 59 - }
-28
arch/unicore32/lib/Makefile
··· 1 - # SPDX-License-Identifier: GPL-2.0 2 - # 3 - # linux/arch/unicore32/lib/Makefile 4 - # 5 - # Copyright (C) 2001-2010 GUAN Xue-tao 6 - # 7 - 8 - lib-y := backtrace.o delay.o findbit.o 9 - lib-y += strncpy_from_user.o strnlen_user.o 10 - lib-y += clear_user.o copy_page.o 11 - lib-y += copy_from_user.o copy_to_user.o 12 - 13 - GNU_LIBC_A = $(shell $(CC) $(KBUILD_CFLAGS) -print-file-name=libc.a) 14 - GNU_LIBC_A_OBJS := memchr.o memcpy.o memmove.o memset.o 15 - GNU_LIBC_A_OBJS += strchr.o strrchr.o 16 - GNU_LIBC_A_OBJS += rawmemchr.o # needed by strrchr.o 17 - 18 - GNU_LIBGCC_A = $(shell $(CC) $(KBUILD_CFLAGS) -print-file-name=libgcc.a) 19 - GNU_LIBGCC_A_OBJS := _ashldi3.o _ashrdi3.o _lshrdi3.o 20 - GNU_LIBGCC_A_OBJS += _divsi3.o _modsi3.o _ucmpdi2.o _umodsi3.o _udivsi3.o 21 - 22 - lib-y += $(GNU_LIBC_A_OBJS) $(GNU_LIBGCC_A_OBJS) 23 - 24 - $(addprefix $(obj)/, $(GNU_LIBC_A_OBJS)): 25 - $(Q)$(AR) p $(GNU_LIBC_A) $(notdir $@) > $@ 26 - 27 - $(addprefix $(obj)/, $(GNU_LIBGCC_A_OBJS)): 28 - $(Q)$(AR) p $(GNU_LIBGCC_A) $(notdir $@) > $@
-168
arch/unicore32/lib/backtrace.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/lib/backtrace.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/linkage.h> 10 - #include <asm/assembler.h> 11 - .text 12 - 13 - @ fp is 0 or stack frame 14 - 15 - #define frame v4 16 - #define sv_fp v5 17 - #define sv_pc v6 18 - #define offset v8 19 - #define loglvl v9 20 - 21 - ENTRY(__backtrace) 22 - mov r0, fp 23 - 24 - ENTRY(c_backtrace) 25 - 26 - #if !defined(CONFIG_FRAME_POINTER) || !defined(CONFIG_PRINTK) 27 - mov pc, lr 28 - ENDPROC(__backtrace) 29 - ENDPROC(c_backtrace) 30 - #else 31 - stm.w (v4 - v10, lr), [sp-] @ Save an extra register 32 - @ so we have a location... 33 - mov.a frame, r0 @ if frame pointer is zero 34 - beq no_frame @ we have no stack frames 35 - mov loglvl, r1 36 - 37 - 1: stm.w (pc), [sp-] @ calculate offset of PC stored 38 - ldw.w r0, [sp]+, #4 @ by stmfd for this CPU 39 - adr r1, 1b 40 - sub offset, r0, r1 41 - 42 - /* 43 - * Stack frame layout: 44 - * optionally saved caller registers (r4 - r10) 45 - * saved fp 46 - * saved sp 47 - * saved lr 48 - * frame => saved pc 49 - * optionally saved arguments (r0 - r3) 50 - * saved sp => <next word> 51 - * 52 - * Functions start with the following code sequence: 53 - * mov ip, sp 54 - * stm.w (r0 - r3), [sp-] (optional) 55 - * corrected pc => stm.w sp, (..., fp, ip, lr, pc) 56 - */ 57 - for_each_frame: 58 - 59 - 1001: ldw sv_pc, [frame+], #0 @ get saved pc 60 - 1002: ldw sv_fp, [frame+], #-12 @ get saved fp 61 - 62 - sub sv_pc, sv_pc, offset @ Correct PC for prefetching 63 - 64 - 1003: ldw r2, [sv_pc+], #-4 @ if stmfd sp, {args} exists, 65 - ldw r3, .Ldsi+4 @ adjust saved 'pc' back one 66 - cxor.a r3, r2 >> #14 @ instruction 67 - beq 201f 68 - sub r0, sv_pc, #4 @ allow for mov 69 - b 202f 70 - 201: 71 - sub r0, sv_pc, #8 @ allow for mov + stmia 72 - 202: 73 - ldw r1, [frame+], #-4 @ get saved lr 74 - mov r2, frame 75 - b.l dump_backtrace_entry 76 - 77 - ldw r1, [sv_pc+], #-4 @ if stmfd sp, {args} exists, 78 - ldw r3, .Ldsi+4 79 - cxor.a r3, r1 >> #14 80 - bne 1004f 81 - ldw r0, [frame+], #-8 @ get sp 82 - sub r0, r0, #4 @ point at the last arg 83 - b.l .Ldumpstm @ dump saved registers 84 - 85 - 1004: ldw r1, [sv_pc+], #0 @ if stmfd {, fp, ip, lr, pc} 86 - ldw r3, .Ldsi @ instruction exists, 87 - cxor.a r3, r1 >> #14 88 - bne 201f 89 - sub r0, frame, #16 90 - b.l .Ldumpstm @ dump saved registers 91 - 201: 92 - cxor.a sv_fp, #0 @ zero saved fp means 93 - beq no_frame @ no further frames 94 - 95 - csub.a sv_fp, frame @ next frame must be 96 - mov frame, sv_fp @ above the current frame 97 - bua for_each_frame 98 - 99 - 1006: adr r0, .Lbad 100 - mov r1, loglvl 101 - mov r2, frame 102 - b.l printk 103 - no_frame: ldm.w (v4 - v10, pc), [sp]+ 104 - ENDPROC(__backtrace) 105 - ENDPROC(c_backtrace) 106 - 107 - .pushsection __ex_table,"a" 108 - .align 3 109 - .long 1001b, 1006b 110 - .long 1002b, 1006b 111 - .long 1003b, 1006b 112 - .long 1004b, 1006b 113 - .popsection 114 - 115 - #define instr v4 116 - #define reg v5 117 - #define stack v6 118 - 119 - .Ldumpstm: stm.w (instr, reg, stack, v7, lr), [sp-] 120 - mov stack, r0 121 - mov instr, r1 122 - mov reg, #14 123 - mov v7, #0 124 - 1: mov r3, #1 125 - csub.a reg, #8 126 - bne 201f 127 - sub reg, reg, #3 128 - 201: 129 - cand.a instr, r3 << reg 130 - beq 2f 131 - add v7, v7, #1 132 - cxor.a v7, #6 133 - cmoveq v7, #1 134 - bne 201f 135 - adr r0, .Lcr 136 - mov r1, loglvl 137 - b.l printk 138 - 201: 139 - ldw.w r3, [stack]+, #-4 140 - mov r2, reg 141 - csub.a r2, #8 142 - bsl 201f 143 - sub r2, r2, #3 144 - 201: 145 - cand.a instr, #0x40 @ if H is 1, high 16 regs 146 - beq 201f 147 - add r2, r2, #0x10 @ so r2 need add 16 148 - 201: 149 - adr r0, .Lfp 150 - mov r1, loglvl 151 - b.l printk 152 - 2: sub.a reg, reg, #1 153 - bns 1b 154 - cxor.a v7, #0 155 - beq 201f 156 - adr r0, .Lcr 157 - mov r1, loglvl 158 - b.l printk 159 - 201: ldm.w (instr, reg, stack, v7, pc), [sp]+ 160 - 161 - .Lfp: .asciz "%sr%d:%08x " 162 - .Lcr: .asciz "%s\n" 163 - .Lbad: .asciz "%sBacktrace aborted due to bad frame pointer <%p>\n" 164 - .align 165 - .Ldsi: .word 0x92eec000 >> 14 @ stm.w sp, (... fp, ip, lr, pc) 166 - .word 0x92e10000 >> 14 @ stm.w sp, () 167 - 168 - #endif
-54
arch/unicore32/lib/clear_user.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/lib/clear_user.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/linkage.h> 10 - #include <asm/assembler.h> 11 - 12 - .text 13 - 14 - /* Prototype: int __clear_user(void *addr, size_t sz) 15 - * Purpose : clear some user memory 16 - * Params : addr - user memory address to clear 17 - * : sz - number of bytes to clear 18 - * Returns : number of bytes NOT cleared 19 - */ 20 - WEAK(__clear_user) 21 - stm.w (lr), [sp-] 22 - stm.w (r1), [sp-] 23 - mov r2, #0 24 - csub.a r1, #4 25 - bsl 2f 26 - and.a ip, r0, #3 27 - beq 1f 28 - csub.a ip, #2 29 - strusr r2, r0, 1 30 - strusr r2, r0, 1, el 31 - strusr r2, r0, 1, sl 32 - rsub ip, ip, #4 33 - sub r1, r1, ip @ 7 6 5 4 3 2 1 34 - 1: sub.a r1, r1, #8 @ -1 -2 -3 -4 -5 -6 -7 35 - strusr r2, r0, 4, ns, rept=2 36 - bns 1b 37 - add.a r1, r1, #4 @ 3 2 1 0 -1 -2 -3 38 - strusr r2, r0, 4, ns 39 - 2: cand.a r1, #2 @ 1x 1x 0x 0x 1x 1x 0x 40 - strusr r2, r0, 1, ne, rept=2 41 - cand.a r1, #1 @ x1 x0 x1 x0 x1 x0 x1 42 - beq 3f 43 - USER( stb.u r2, [r0]) 44 - 3: mov r0, #0 45 - ldm.w (r1), [sp]+ 46 - ldm.w (pc), [sp]+ 47 - ENDPROC(__clear_user) 48 - 49 - .pushsection .fixup,"ax" 50 - .align 0 51 - 9001: ldm.w (r0), [sp]+ 52 - ldm.w (pc), [sp]+ 53 - .popsection 54 -
-101
arch/unicore32/lib/copy_from_user.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/lib/copy_from_user.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - #include <linux/linkage.h> 11 - #include <asm/assembler.h> 12 - 13 - /* 14 - * Prototype: 15 - * 16 - * size_t raw_copy_from_user(void *to, const void *from, size_t n) 17 - * 18 - * Purpose: 19 - * 20 - * copy a block to kernel memory from user memory 21 - * 22 - * Params: 23 - * 24 - * to = kernel memory 25 - * from = user memory 26 - * n = number of bytes to copy 27 - * 28 - * Return value: 29 - * 30 - * Number of bytes NOT copied. 31 - */ 32 - 33 - .macro ldr1w ptr reg abort 34 - ldrusr \reg, \ptr, 4, abort=\abort 35 - .endm 36 - 37 - .macro ldr4w ptr reg1 reg2 reg3 reg4 abort 38 - 100: ldm.w (\reg1, \reg2, \reg3, \reg4), [\ptr]+ 39 - .pushsection __ex_table, "a" 40 - .align 3 41 - .long 100b, \abort 42 - .popsection 43 - .endm 44 - 45 - .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 46 - 100: ldm.w (\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8), [\ptr]+ 47 - .pushsection __ex_table, "a" 48 - .align 3 49 - .long 100b, \abort 50 - .popsection 51 - .endm 52 - 53 - .macro ldr1b ptr reg cond=al abort 54 - ldrusr \reg, \ptr, 1, \cond, abort=\abort 55 - .endm 56 - 57 - .macro str1w ptr reg abort 58 - stw.w \reg, [\ptr]+, #4 59 - .endm 60 - 61 - .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 62 - stm.w (\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8), [\ptr]+ 63 - .endm 64 - 65 - .macro str1b ptr reg cond=al abort 66 - .ifnc \cond, al 67 - b\cond 201f 68 - b 202f 69 - .endif 70 - 201: stb.w \reg, [\ptr]+, #1 71 - 202: 72 - .endm 73 - 74 - .macro enter 75 - mov r3, #0 76 - stm.w (r0, r2, r3), [sp-] 77 - .endm 78 - 79 - .macro exit 80 - add sp, sp, #8 81 - ldm.w (r0), [sp]+ 82 - mov pc, lr 83 - .endm 84 - 85 - .text 86 - 87 - ENTRY(raw_copy_from_user) 88 - 89 - #include "copy_template.S" 90 - 91 - ENDPROC(raw_copy_from_user) 92 - 93 - .pushsection .fixup,"ax" 94 - .align 0 95 - copy_abort_preamble 96 - ldm.w (r1, r2, r3), [sp]+ 97 - sub r0, r0, r1 98 - rsub r0, r0, r2 99 - copy_abort_end 100 - .popsection 101 -
-36
arch/unicore32/lib/copy_page.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/lib/copy_page.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * ASM optimised string functions 10 - */ 11 - #include <linux/linkage.h> 12 - #include <asm/assembler.h> 13 - #include <generated/asm-offsets.h> 14 - #include <asm/cache.h> 15 - 16 - #define COPY_COUNT (PAGE_SZ/256) 17 - 18 - .text 19 - .align 5 20 - /* 21 - * UniCore optimised copy_page routine 22 - */ 23 - ENTRY(copy_page) 24 - stm.w (r17 - r19, lr), [sp-] 25 - mov r17, r0 26 - mov r18, r1 27 - mov r19, #COPY_COUNT 28 - 1: 29 - .rept 4 30 - ldm.w (r0 - r15), [r18]+ 31 - stm.w (r0 - r15), [r17]+ 32 - .endr 33 - sub.a r19, r19, #1 34 - bne 1b 35 - ldm.w (r17 - r19, pc), [sp]+ 36 - ENDPROC(copy_page)
-211
arch/unicore32/lib/copy_template.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/lib/copy_template.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - /* 11 - * Theory of operation 12 - * ------------------- 13 - * 14 - * This file provides the core code for a forward memory copy used in 15 - * the implementation of memcopy(), copy_to_user() and copy_from_user(). 16 - * 17 - * The including file must define the following accessor macros 18 - * according to the need of the given function: 19 - * 20 - * ldr1w ptr reg abort 21 - * 22 - * This loads one word from 'ptr', stores it in 'reg' and increments 23 - * 'ptr' to the next word. The 'abort' argument is used for fixup tables. 24 - * 25 - * ldr4w ptr reg1 reg2 reg3 reg4 abort 26 - * ldr8w ptr, reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 27 - * 28 - * This loads four or eight words starting from 'ptr', stores them 29 - * in provided registers and increments 'ptr' past those words. 30 - * The'abort' argument is used for fixup tables. 31 - * 32 - * ldr1b ptr reg cond abort 33 - * 34 - * Similar to ldr1w, but it loads a byte and increments 'ptr' one byte. 35 - * It also must apply the condition code if provided, otherwise the 36 - * "al" condition is assumed by default. 37 - * 38 - * str1w ptr reg abort 39 - * str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 40 - * str1b ptr reg cond abort 41 - * 42 - * Same as their ldr* counterparts, but data is stored to 'ptr' location 43 - * rather than being loaded. 44 - * 45 - * enter 46 - * 47 - * Preserve the provided registers on the stack plus any additional 48 - * data as needed by the implementation including this code. Called 49 - * upon code entry. 50 - * 51 - * exit 52 - * 53 - * Restore registers with the values previously saved with the 54 - * 'preserv' macro. Called upon code termination. 55 - */ 56 - 57 - 58 - enter 59 - 60 - sub.a r2, r2, #4 61 - bsl 8f 62 - and.a ip, r0, #3 63 - bne 9f 64 - and.a ip, r1, #3 65 - bne 10f 66 - 67 - 1: sub.a r2, r2, #(28) 68 - stm.w (r5 - r8), [sp-] 69 - bsl 5f 70 - 71 - 3: 72 - 4: ldr8w r1, r3, r4, r5, r6, r7, r8, r10, r11, abort=20f 73 - sub.a r2, r2, #32 74 - str8w r0, r3, r4, r5, r6, r7, r8, r10, r11, abort=20f 75 - beg 3b 76 - 77 - 5: and.a ip, r2, #28 78 - rsub ip, ip, #32 79 - beq 7f 80 - add pc, pc, ip @ C is always clear here 81 - nop 82 - 83 - ldr1w r1, r3, abort=20f 84 - ldr1w r1, r4, abort=20f 85 - ldr1w r1, r5, abort=20f 86 - ldr1w r1, r6, abort=20f 87 - ldr1w r1, r7, abort=20f 88 - ldr1w r1, r8, abort=20f 89 - ldr1w r1, r11, abort=20f 90 - 91 - add pc, pc, ip 92 - nop 93 - 94 - str1w r0, r3, abort=20f 95 - str1w r0, r4, abort=20f 96 - str1w r0, r5, abort=20f 97 - str1w r0, r6, abort=20f 98 - str1w r0, r7, abort=20f 99 - str1w r0, r8, abort=20f 100 - str1w r0, r11, abort=20f 101 - 102 - 7: ldm.w (r5 - r8), [sp]+ 103 - 104 - 8: mov.a r2, r2 << #31 105 - ldr1b r1, r3, ne, abort=21f 106 - ldr1b r1, r4, ea, abort=21f 107 - ldr1b r1, r10, ea, abort=21f 108 - str1b r0, r3, ne, abort=21f 109 - str1b r0, r4, ea, abort=21f 110 - str1b r0, r10, ea, abort=21f 111 - 112 - exit 113 - 114 - 9: rsub ip, ip, #4 115 - csub.a ip, #2 116 - ldr1b r1, r3, sg, abort=21f 117 - ldr1b r1, r4, eg, abort=21f 118 - ldr1b r1, r11, abort=21f 119 - str1b r0, r3, sg, abort=21f 120 - str1b r0, r4, eg, abort=21f 121 - sub.a r2, r2, ip 122 - str1b r0, r11, abort=21f 123 - bsl 8b 124 - and.a ip, r1, #3 125 - beq 1b 126 - 127 - 10: andn r1, r1, #3 128 - csub.a ip, #2 129 - ldr1w r1, r11, abort=21f 130 - beq 17f 131 - bsg 18f 132 - 133 - 134 - .macro forward_copy_shift a b 135 - 136 - sub.a r2, r2, #28 137 - bsl 14f 138 - 139 - 11: stm.w (r5 - r9), [sp-] 140 - 141 - 12: 142 - ldr4w r1, r4, r5, r6, r7, abort=19f 143 - mov r3, r11 pull #\a 144 - sub.a r2, r2, #32 145 - ldr4w r1, r8, r9, r10, r11, abort=19f 146 - or r3, r3, r4 push #\b 147 - mov r4, r4 pull #\a 148 - or r4, r4, r5 push #\b 149 - mov r5, r5 pull #\a 150 - or r5, r5, r6 push #\b 151 - mov r6, r6 pull #\a 152 - or r6, r6, r7 push #\b 153 - mov r7, r7 pull #\a 154 - or r7, r7, r8 push #\b 155 - mov r8, r8 pull #\a 156 - or r8, r8, r9 push #\b 157 - mov r9, r9 pull #\a 158 - or r9, r9, r10 push #\b 159 - mov r10, r10 pull #\a 160 - or r10, r10, r11 push #\b 161 - str8w r0, r3, r4, r5, r6, r7, r8, r9, r10, , abort=19f 162 - beg 12b 163 - 164 - ldm.w (r5 - r9), [sp]+ 165 - 166 - 14: and.a ip, r2, #28 167 - beq 16f 168 - 169 - 15: mov r3, r11 pull #\a 170 - ldr1w r1, r11, abort=21f 171 - sub.a ip, ip, #4 172 - or r3, r3, r11 push #\b 173 - str1w r0, r3, abort=21f 174 - bsg 15b 175 - 176 - 16: sub r1, r1, #(\b / 8) 177 - b 8b 178 - 179 - .endm 180 - 181 - 182 - forward_copy_shift a=8 b=24 183 - 184 - 17: forward_copy_shift a=16 b=16 185 - 186 - 18: forward_copy_shift a=24 b=8 187 - 188 - 189 - /* 190 - * Abort preamble and completion macros. 191 - * If a fixup handler is required then those macros must surround it. 192 - * It is assumed that the fixup code will handle the private part of 193 - * the exit macro. 194 - */ 195 - 196 - .macro copy_abort_preamble 197 - 19: ldm.w (r5 - r9), [sp]+ 198 - b 21f 199 - 299: .word 0 @ store lr 200 - @ to avoid function call in fixup 201 - 20: ldm.w (r5 - r8), [sp]+ 202 - 21: 203 - adr r1, 299b 204 - stw lr, [r1] 205 - .endm 206 - 207 - .macro copy_abort_end 208 - adr lr, 299b 209 - ldw pc, [lr] 210 - .endm 211 -
-93
arch/unicore32/lib/copy_to_user.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/lib/copy_to_user.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - 10 - #include <linux/linkage.h> 11 - #include <asm/assembler.h> 12 - 13 - /* 14 - * Prototype: 15 - * 16 - * size_t raw_copy_to_user(void *to, const void *from, size_t n) 17 - * 18 - * Purpose: 19 - * 20 - * copy a block to user memory from kernel memory 21 - * 22 - * Params: 23 - * 24 - * to = user memory 25 - * from = kernel memory 26 - * n = number of bytes to copy 27 - * 28 - * Return value: 29 - * 30 - * Number of bytes NOT copied. 31 - */ 32 - 33 - .macro ldr1w ptr reg abort 34 - ldw.w \reg, [\ptr]+, #4 35 - .endm 36 - 37 - .macro ldr4w ptr reg1 reg2 reg3 reg4 abort 38 - ldm.w (\reg1, \reg2, \reg3, \reg4), [\ptr]+ 39 - .endm 40 - 41 - .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 42 - ldm.w (\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8), [\ptr]+ 43 - .endm 44 - 45 - .macro ldr1b ptr reg cond=al abort 46 - notcond \cond, .+8 47 - ldb.w \reg, [\ptr]+, #1 48 - .endm 49 - 50 - .macro str1w ptr reg abort 51 - strusr \reg, \ptr, 4, abort=\abort 52 - .endm 53 - 54 - .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 55 - 100: stm.w (\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8), [\ptr]+ 56 - 57 - .pushsection __ex_table, "a" 58 - .long 100b, \abort 59 - .popsection 60 - .endm 61 - 62 - .macro str1b ptr reg cond=al abort 63 - strusr \reg, \ptr, 1, \cond, abort=\abort 64 - .endm 65 - 66 - .macro enter 67 - mov r3, #0 68 - stm.w (r0, r2, r3), [sp-] 69 - .endm 70 - 71 - .macro exit 72 - add sp, sp, #8 73 - ldm.w (r0), [sp]+ 74 - mov pc, lr 75 - .endm 76 - 77 - .text 78 - 79 - WEAK(raw_copy_to_user) 80 - 81 - #include "copy_template.S" 82 - 83 - ENDPROC(raw_copy_to_user) 84 - 85 - .pushsection .fixup,"ax" 86 - .align 0 87 - copy_abort_preamble 88 - ldm.w (r1, r2, r3), [sp]+ 89 - sub r0, r0, r1 90 - rsub r0, r0, r2 91 - copy_abort_end 92 - .popsection 93 -
-48
arch/unicore32/lib/delay.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/lib/delay.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/linkage.h> 10 - #include <asm/assembler.h> 11 - #include <asm/param.h> 12 - .text 13 - 14 - .LC0: .word loops_per_jiffy 15 - .LC1: .word (2199023*HZ)>>11 16 - 17 - /* 18 - * r0 <= 2000 19 - * lpj <= 0x01ffffff (max. 3355 bogomips) 20 - * HZ <= 1000 21 - */ 22 - 23 - ENTRY(__udelay) 24 - ldw r2, .LC1 25 - mul r0, r2, r0 26 - ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06 27 - ldw r2, .LC0 28 - ldw r2, [r2] @ max = 0x01ffffff 29 - mov r0, r0 >> #14 @ max = 0x0001ffff 30 - mov r2, r2 >> #10 @ max = 0x00007fff 31 - mul r0, r2, r0 @ max = 2^32-1 32 - mov.a r0, r0 >> #6 33 - cmoveq pc, lr 34 - 35 - /* 36 - * loops = r0 * HZ * loops_per_jiffy / 1000000 37 - * 38 - * Oh, if only we had a cycle counter... 39 - */ 40 - 41 - @ Delay routine 42 - ENTRY(__delay) 43 - sub.a r0, r0, #2 44 - bua __delay 45 - mov pc, lr 46 - ENDPROC(__udelay) 47 - ENDPROC(__const_udelay) 48 - ENDPROC(__delay)
-97
arch/unicore32/lib/findbit.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/lib/findbit.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/linkage.h> 10 - #include <asm/assembler.h> 11 - .text 12 - 13 - /* 14 - * Purpose : Find a 'zero' bit 15 - * Prototype: int find_first_zero_bit(void *addr, unsigned int maxbit); 16 - */ 17 - ENTRY(find_first_zero_bit) 18 - cxor.a r1, #0 19 - beq 3f 20 - mov r2, #0 21 - 1: ldb r3, [r0+], r2 >> #3 22 - xor.a r3, r3, #0xff @ invert bits 23 - bne .L_found @ any now set - found zero bit 24 - add r2, r2, #8 @ next bit pointer 25 - 2: csub.a r2, r1 @ any more? 26 - bub 1b 27 - 3: mov r0, r1 @ no free bits 28 - mov pc, lr 29 - ENDPROC(find_first_zero_bit) 30 - 31 - /* 32 - * Purpose : Find next 'zero' bit 33 - * Prototype: int find_next_zero_bit 34 - * (void *addr, unsigned int maxbit, int offset) 35 - */ 36 - ENTRY(find_next_zero_bit) 37 - cxor.a r1, #0 38 - beq 3b 39 - and.a ip, r2, #7 40 - beq 1b @ If new byte, goto old routine 41 - ldb r3, [r0+], r2 >> #3 42 - xor r3, r3, #0xff @ now looking for a 1 bit 43 - mov.a r3, r3 >> ip @ shift off unused bits 44 - bne .L_found 45 - or r2, r2, #7 @ if zero, then no bits here 46 - add r2, r2, #1 @ align bit pointer 47 - b 2b @ loop for next bit 48 - ENDPROC(find_next_zero_bit) 49 - 50 - /* 51 - * Purpose : Find a 'one' bit 52 - * Prototype: int find_first_bit 53 - * (const unsigned long *addr, unsigned int maxbit); 54 - */ 55 - ENTRY(find_first_bit) 56 - cxor.a r1, #0 57 - beq 3f 58 - mov r2, #0 59 - 1: ldb r3, [r0+], r2 >> #3 60 - mov.a r3, r3 61 - bne .L_found @ any now set - found zero bit 62 - add r2, r2, #8 @ next bit pointer 63 - 2: csub.a r2, r1 @ any more? 64 - bub 1b 65 - 3: mov r0, r1 @ no free bits 66 - mov pc, lr 67 - ENDPROC(find_first_bit) 68 - 69 - /* 70 - * Purpose : Find next 'one' bit 71 - * Prototype: int find_next_zero_bit 72 - * (void *addr, unsigned int maxbit, int offset) 73 - */ 74 - ENTRY(find_next_bit) 75 - cxor.a r1, #0 76 - beq 3b 77 - and.a ip, r2, #7 78 - beq 1b @ If new byte, goto old routine 79 - ldb r3, [r0+], r2 >> #3 80 - mov.a r3, r3 >> ip @ shift off unused bits 81 - bne .L_found 82 - or r2, r2, #7 @ if zero, then no bits here 83 - add r2, r2, #1 @ align bit pointer 84 - b 2b @ loop for next bit 85 - ENDPROC(find_next_bit) 86 - 87 - /* 88 - * One or more bits in the LSB of r3 are assumed to be set. 89 - */ 90 - .L_found: 91 - rsub r1, r3, #0 92 - and r3, r3, r1 93 - cntlz r3, r3 94 - rsub r3, r3, #31 95 - add r0, r2, r3 96 - mov pc, lr 97 -
-42
arch/unicore32/lib/strncpy_from_user.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/lib/strncpy_from_user.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/linkage.h> 10 - #include <asm/assembler.h> 11 - #include <asm/errno.h> 12 - 13 - .text 14 - .align 5 15 - 16 - /* 17 - * Copy a string from user space to kernel space. 18 - * r0 = dst, r1 = src, r2 = byte length 19 - * returns the number of characters copied (strlen of copied string), 20 - * -EFAULT on exception, or "len" if we fill the whole buffer 21 - */ 22 - ENTRY(__strncpy_from_user) 23 - mov ip, r1 24 - 1: sub.a r2, r2, #1 25 - ldrusr r3, r1, 1, ns 26 - bfs 2f 27 - stb.w r3, [r0]+, #1 28 - cxor.a r3, #0 29 - bne 1b 30 - sub r1, r1, #1 @ take NUL character out of count 31 - 2: sub r0, r1, ip 32 - mov pc, lr 33 - ENDPROC(__strncpy_from_user) 34 - 35 - .pushsection .fixup,"ax" 36 - .align 0 37 - 9001: mov r3, #0 38 - stb r3, [r0+], #0 @ null terminate 39 - mov r0, #-EFAULT 40 - mov pc, lr 41 - .popsection 42 -
-39
arch/unicore32/lib/strnlen_user.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/lib/strnlen_user.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/linkage.h> 10 - #include <asm/assembler.h> 11 - #include <asm/errno.h> 12 - 13 - .text 14 - .align 5 15 - 16 - /* Prototype: unsigned long __strnlen_user(const char *str, long n) 17 - * Purpose : get length of a string in user memory 18 - * Params : str - address of string in user memory 19 - * Returns : length of string *including terminator* 20 - * or zero on exception, or n + 1 if too long 21 - */ 22 - ENTRY(__strnlen_user) 23 - mov r2, r0 24 - 1: 25 - ldrusr r3, r0, 1 26 - cxor.a r3, #0 27 - beq 2f 28 - sub.a r1, r1, #1 29 - bne 1b 30 - add r0, r0, #1 31 - 2: sub r0, r0, r2 32 - mov pc, lr 33 - ENDPROC(__strnlen_user) 34 - 35 - .pushsection .fixup,"ax" 36 - .align 0 37 - 9001: mov r0, #0 38 - mov pc, lr 39 - .popsection
-41
arch/unicore32/mm/Kconfig
··· 1 - # SPDX-License-Identifier: GPL-2.0 2 - comment "Processor Type" 3 - 4 - # Select CPU types depending on the architecture selected. This selects 5 - # which CPUs we support in the kernel image, and the compiler instruction 6 - # optimiser behaviour. 7 - 8 - config CPU_UCV2 9 - def_bool y 10 - 11 - comment "Processor Features" 12 - 13 - config CPU_ICACHE_DISABLE 14 - bool "Disable I-Cache (I-bit)" 15 - help 16 - Say Y here to disable the processor instruction cache. Unless 17 - you have a reason not to or are unsure, say N. 18 - 19 - config CPU_DCACHE_DISABLE 20 - bool "Disable D-Cache (D-bit)" 21 - help 22 - Say Y here to disable the processor data cache. Unless 23 - you have a reason not to or are unsure, say N. 24 - 25 - config CPU_DCACHE_WRITETHROUGH 26 - bool "Force write through D-cache" 27 - help 28 - Say Y here to use the data cache in writethrough mode. Unless you 29 - specifically require this or are unsure, say N. 30 - 31 - config CPU_DCACHE_LINE_DISABLE 32 - bool "Disable D-cache line ops" 33 - default y 34 - help 35 - Say Y here to disable the data cache line operations. 36 - 37 - config CPU_TLB_SINGLE_ENTRY_DISABLE 38 - bool "Disable TLB single entry ops" 39 - default y 40 - help 41 - Say Y here to disable the TLB single entry operations.
-14
arch/unicore32/mm/Makefile
··· 1 - # SPDX-License-Identifier: GPL-2.0 2 - # 3 - # Makefile for the linux unicore-specific parts of the memory manager. 4 - # 5 - 6 - obj-y := extable.o fault.o init.o pgd.o mmu.o 7 - obj-y += flush.o ioremap.o 8 - 9 - obj-$(CONFIG_MODULES) += proc-syms.o 10 - 11 - obj-$(CONFIG_ALIGNMENT_TRAP) += alignment.o 12 - 13 - obj-$(CONFIG_CPU_UCV2) += cache-ucv2.o tlb-ucv2.o proc-ucv2.o 14 -
-524
arch/unicore32/mm/alignment.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/mm/alignment.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - /* 10 - * TODO: 11 - * FPU ldm/stm not handling 12 - */ 13 - #include <linux/compiler.h> 14 - #include <linux/kernel.h> 15 - #include <linux/sched/debug.h> 16 - #include <linux/errno.h> 17 - #include <linux/string.h> 18 - #include <linux/init.h> 19 - #include <linux/sched.h> 20 - #include <linux/uaccess.h> 21 - #include <linux/pgtable.h> 22 - 23 - #include <asm/tlbflush.h> 24 - #include <asm/unaligned.h> 25 - 26 - #include "mm.h" 27 - 28 - #define CODING_BITS(i) (i & 0xe0000120) 29 - 30 - #define LDST_P_BIT(i) (i & (1 << 28)) /* Preindex */ 31 - #define LDST_U_BIT(i) (i & (1 << 27)) /* Add offset */ 32 - #define LDST_W_BIT(i) (i & (1 << 25)) /* Writeback */ 33 - #define LDST_L_BIT(i) (i & (1 << 24)) /* Load */ 34 - 35 - #define LDST_P_EQ_U(i) ((((i) ^ ((i) >> 1)) & (1 << 27)) == 0) 36 - 37 - #define LDSTH_I_BIT(i) (i & (1 << 26)) /* half-word immed */ 38 - #define LDM_S_BIT(i) (i & (1 << 26)) /* write ASR from BSR */ 39 - #define LDM_H_BIT(i) (i & (1 << 6)) /* select r0-r15 or r16-r31 */ 40 - 41 - #define RN_BITS(i) ((i >> 19) & 31) /* Rn */ 42 - #define RD_BITS(i) ((i >> 14) & 31) /* Rd */ 43 - #define RM_BITS(i) (i & 31) /* Rm */ 44 - 45 - #define REGMASK_BITS(i) (((i & 0x7fe00) >> 3) | (i & 0x3f)) 46 - #define OFFSET_BITS(i) (i & 0x03fff) 47 - 48 - #define SHIFT_BITS(i) ((i >> 9) & 0x1f) 49 - #define SHIFT_TYPE(i) (i & 0xc0) 50 - #define SHIFT_LSL 0x00 51 - #define SHIFT_LSR 0x40 52 - #define SHIFT_ASR 0x80 53 - #define SHIFT_RORRRX 0xc0 54 - 55 - union offset_union { 56 - unsigned long un; 57 - signed long sn; 58 - }; 59 - 60 - #define TYPE_ERROR 0 61 - #define TYPE_FAULT 1 62 - #define TYPE_LDST 2 63 - #define TYPE_DONE 3 64 - #define TYPE_SWAP 4 65 - #define TYPE_COLS 5 /* Coprocessor load/store */ 66 - 67 - #define get8_unaligned_check(val, addr, err) \ 68 - __asm__( \ 69 - "1: ldb.u %1, [%2], #1\n" \ 70 - "2:\n" \ 71 - " .pushsection .fixup,\"ax\"\n" \ 72 - " .align 2\n" \ 73 - "3: mov %0, #1\n" \ 74 - " b 2b\n" \ 75 - " .popsection\n" \ 76 - " .pushsection __ex_table,\"a\"\n" \ 77 - " .align 3\n" \ 78 - " .long 1b, 3b\n" \ 79 - " .popsection\n" \ 80 - : "=r" (err), "=&r" (val), "=r" (addr) \ 81 - : "0" (err), "2" (addr)) 82 - 83 - #define get8t_unaligned_check(val, addr, err) \ 84 - __asm__( \ 85 - "1: ldb.u %1, [%2], #1\n" \ 86 - "2:\n" \ 87 - " .pushsection .fixup,\"ax\"\n" \ 88 - " .align 2\n" \ 89 - "3: mov %0, #1\n" \ 90 - " b 2b\n" \ 91 - " .popsection\n" \ 92 - " .pushsection __ex_table,\"a\"\n" \ 93 - " .align 3\n" \ 94 - " .long 1b, 3b\n" \ 95 - " .popsection\n" \ 96 - : "=r" (err), "=&r" (val), "=r" (addr) \ 97 - : "0" (err), "2" (addr)) 98 - 99 - #define get16_unaligned_check(val, addr) \ 100 - do { \ 101 - unsigned int err = 0, v, a = addr; \ 102 - get8_unaligned_check(val, a, err); \ 103 - get8_unaligned_check(v, a, err); \ 104 - val |= v << 8; \ 105 - if (err) \ 106 - goto fault; \ 107 - } while (0) 108 - 109 - #define put16_unaligned_check(val, addr) \ 110 - do { \ 111 - unsigned int err = 0, v = val, a = addr; \ 112 - __asm__( \ 113 - "1: stb.u %1, [%2], #1\n" \ 114 - " mov %1, %1 >> #8\n" \ 115 - "2: stb.u %1, [%2]\n" \ 116 - "3:\n" \ 117 - " .pushsection .fixup,\"ax\"\n" \ 118 - " .align 2\n" \ 119 - "4: mov %0, #1\n" \ 120 - " b 3b\n" \ 121 - " .popsection\n" \ 122 - " .pushsection __ex_table,\"a\"\n" \ 123 - " .align 3\n" \ 124 - " .long 1b, 4b\n" \ 125 - " .long 2b, 4b\n" \ 126 - " .popsection\n" \ 127 - : "=r" (err), "=&r" (v), "=&r" (a) \ 128 - : "0" (err), "1" (v), "2" (a)); \ 129 - if (err) \ 130 - goto fault; \ 131 - } while (0) 132 - 133 - #define __put32_unaligned_check(ins, val, addr) \ 134 - do { \ 135 - unsigned int err = 0, v = val, a = addr; \ 136 - __asm__( \ 137 - "1: "ins" %1, [%2], #1\n" \ 138 - " mov %1, %1 >> #8\n" \ 139 - "2: "ins" %1, [%2], #1\n" \ 140 - " mov %1, %1 >> #8\n" \ 141 - "3: "ins" %1, [%2], #1\n" \ 142 - " mov %1, %1 >> #8\n" \ 143 - "4: "ins" %1, [%2]\n" \ 144 - "5:\n" \ 145 - " .pushsection .fixup,\"ax\"\n" \ 146 - " .align 2\n" \ 147 - "6: mov %0, #1\n" \ 148 - " b 5b\n" \ 149 - " .popsection\n" \ 150 - " .pushsection __ex_table,\"a\"\n" \ 151 - " .align 3\n" \ 152 - " .long 1b, 6b\n" \ 153 - " .long 2b, 6b\n" \ 154 - " .long 3b, 6b\n" \ 155 - " .long 4b, 6b\n" \ 156 - " .popsection\n" \ 157 - : "=r" (err), "=&r" (v), "=&r" (a) \ 158 - : "0" (err), "1" (v), "2" (a)); \ 159 - if (err) \ 160 - goto fault; \ 161 - } while (0) 162 - 163 - #define get32_unaligned_check(val, addr) \ 164 - do { \ 165 - unsigned int err = 0, v, a = addr; \ 166 - get8_unaligned_check(val, a, err); \ 167 - get8_unaligned_check(v, a, err); \ 168 - val |= v << 8; \ 169 - get8_unaligned_check(v, a, err); \ 170 - val |= v << 16; \ 171 - get8_unaligned_check(v, a, err); \ 172 - val |= v << 24; \ 173 - if (err) \ 174 - goto fault; \ 175 - } while (0) 176 - 177 - #define put32_unaligned_check(val, addr) \ 178 - __put32_unaligned_check("stb.u", val, addr) 179 - 180 - #define get32t_unaligned_check(val, addr) \ 181 - do { \ 182 - unsigned int err = 0, v, a = addr; \ 183 - get8t_unaligned_check(val, a, err); \ 184 - get8t_unaligned_check(v, a, err); \ 185 - val |= v << 8; \ 186 - get8t_unaligned_check(v, a, err); \ 187 - val |= v << 16; \ 188 - get8t_unaligned_check(v, a, err); \ 189 - val |= v << 24; \ 190 - if (err) \ 191 - goto fault; \ 192 - } while (0) 193 - 194 - #define put32t_unaligned_check(val, addr) \ 195 - __put32_unaligned_check("stb.u", val, addr) 196 - 197 - static void 198 - do_alignment_finish_ldst(unsigned long addr, unsigned long instr, 199 - struct pt_regs *regs, union offset_union offset) 200 - { 201 - if (!LDST_U_BIT(instr)) 202 - offset.un = -offset.un; 203 - 204 - if (!LDST_P_BIT(instr)) 205 - addr += offset.un; 206 - 207 - if (!LDST_P_BIT(instr) || LDST_W_BIT(instr)) 208 - regs->uregs[RN_BITS(instr)] = addr; 209 - } 210 - 211 - static int 212 - do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, 213 - struct pt_regs *regs) 214 - { 215 - unsigned int rd = RD_BITS(instr); 216 - 217 - /* old value 0x40002120, can't judge swap instr correctly */ 218 - if ((instr & 0x4b003fe0) == 0x40000120) 219 - goto swp; 220 - 221 - if (LDST_L_BIT(instr)) { 222 - unsigned long val; 223 - get16_unaligned_check(val, addr); 224 - 225 - /* signed half-word? */ 226 - if (instr & 0x80) 227 - val = (signed long)((signed short)val); 228 - 229 - regs->uregs[rd] = val; 230 - } else 231 - put16_unaligned_check(regs->uregs[rd], addr); 232 - 233 - return TYPE_LDST; 234 - 235 - swp: 236 - /* only handle swap word 237 - * for swap byte should not active this alignment exception */ 238 - get32_unaligned_check(regs->uregs[RD_BITS(instr)], addr); 239 - put32_unaligned_check(regs->uregs[RM_BITS(instr)], addr); 240 - return TYPE_SWAP; 241 - 242 - fault: 243 - return TYPE_FAULT; 244 - } 245 - 246 - static int 247 - do_alignment_ldrstr(unsigned long addr, unsigned long instr, 248 - struct pt_regs *regs) 249 - { 250 - unsigned int rd = RD_BITS(instr); 251 - 252 - if (!LDST_P_BIT(instr) && LDST_W_BIT(instr)) 253 - goto trans; 254 - 255 - if (LDST_L_BIT(instr)) 256 - get32_unaligned_check(regs->uregs[rd], addr); 257 - else 258 - put32_unaligned_check(regs->uregs[rd], addr); 259 - return TYPE_LDST; 260 - 261 - trans: 262 - if (LDST_L_BIT(instr)) 263 - get32t_unaligned_check(regs->uregs[rd], addr); 264 - else 265 - put32t_unaligned_check(regs->uregs[rd], addr); 266 - return TYPE_LDST; 267 - 268 - fault: 269 - return TYPE_FAULT; 270 - } 271 - 272 - /* 273 - * LDM/STM alignment handler. 274 - * 275 - * There are 4 variants of this instruction: 276 - * 277 - * B = rn pointer before instruction, A = rn pointer after instruction 278 - * ------ increasing address -----> 279 - * | | r0 | r1 | ... | rx | | 280 - * PU = 01 B A 281 - * PU = 11 B A 282 - * PU = 00 A B 283 - * PU = 10 A B 284 - */ 285 - static int 286 - do_alignment_ldmstm(unsigned long addr, unsigned long instr, 287 - struct pt_regs *regs) 288 - { 289 - unsigned int rd, rn, pc_correction, reg_correction, nr_regs, regbits; 290 - unsigned long eaddr, newaddr; 291 - 292 - if (LDM_S_BIT(instr)) 293 - goto bad; 294 - 295 - pc_correction = 4; /* processor implementation defined */ 296 - 297 - /* count the number of registers in the mask to be transferred */ 298 - nr_regs = hweight16(REGMASK_BITS(instr)) * 4; 299 - 300 - rn = RN_BITS(instr); 301 - newaddr = eaddr = regs->uregs[rn]; 302 - 303 - if (!LDST_U_BIT(instr)) 304 - nr_regs = -nr_regs; 305 - newaddr += nr_regs; 306 - if (!LDST_U_BIT(instr)) 307 - eaddr = newaddr; 308 - 309 - if (LDST_P_EQ_U(instr)) /* U = P */ 310 - eaddr += 4; 311 - 312 - /* 313 - * This is a "hint" - we already have eaddr worked out by the 314 - * processor for us. 315 - */ 316 - if (addr != eaddr) { 317 - printk(KERN_ERR "LDMSTM: PC = %08lx, instr = %08lx, " 318 - "addr = %08lx, eaddr = %08lx\n", 319 - instruction_pointer(regs), instr, addr, eaddr); 320 - show_regs(regs); 321 - } 322 - 323 - if (LDM_H_BIT(instr)) 324 - reg_correction = 0x10; 325 - else 326 - reg_correction = 0x00; 327 - 328 - for (regbits = REGMASK_BITS(instr), rd = 0; regbits; 329 - regbits >>= 1, rd += 1) 330 - if (regbits & 1) { 331 - if (LDST_L_BIT(instr)) 332 - get32_unaligned_check(regs-> 333 - uregs[rd + reg_correction], eaddr); 334 - else 335 - put32_unaligned_check(regs-> 336 - uregs[rd + reg_correction], eaddr); 337 - eaddr += 4; 338 - } 339 - 340 - if (LDST_W_BIT(instr)) 341 - regs->uregs[rn] = newaddr; 342 - return TYPE_DONE; 343 - 344 - fault: 345 - regs->UCreg_pc -= pc_correction; 346 - return TYPE_FAULT; 347 - 348 - bad: 349 - printk(KERN_ERR "Alignment trap: not handling ldm with s-bit set\n"); 350 - return TYPE_ERROR; 351 - } 352 - 353 - static int 354 - do_alignment(unsigned long addr, unsigned int error_code, struct pt_regs *regs) 355 - { 356 - union offset_union offset; 357 - unsigned long instr, instrptr; 358 - int (*handler) (unsigned long addr, unsigned long instr, 359 - struct pt_regs *regs); 360 - unsigned int type; 361 - 362 - instrptr = instruction_pointer(regs); 363 - if (instrptr >= PAGE_OFFSET) 364 - instr = *(unsigned long *)instrptr; 365 - else { 366 - __asm__ __volatile__( 367 - "ldw.u %0, [%1]\n" 368 - : "=&r"(instr) 369 - : "r"(instrptr)); 370 - } 371 - 372 - regs->UCreg_pc += 4; 373 - 374 - switch (CODING_BITS(instr)) { 375 - case 0x40000120: /* ldrh or strh */ 376 - if (LDSTH_I_BIT(instr)) 377 - offset.un = (instr & 0x3e00) >> 4 | (instr & 31); 378 - else 379 - offset.un = regs->uregs[RM_BITS(instr)]; 380 - handler = do_alignment_ldrhstrh; 381 - break; 382 - 383 - case 0x60000000: /* ldr or str immediate */ 384 - case 0x60000100: /* ldr or str immediate */ 385 - case 0x60000020: /* ldr or str immediate */ 386 - case 0x60000120: /* ldr or str immediate */ 387 - offset.un = OFFSET_BITS(instr); 388 - handler = do_alignment_ldrstr; 389 - break; 390 - 391 - case 0x40000000: /* ldr or str register */ 392 - offset.un = regs->uregs[RM_BITS(instr)]; 393 - { 394 - unsigned int shiftval = SHIFT_BITS(instr); 395 - 396 - switch (SHIFT_TYPE(instr)) { 397 - case SHIFT_LSL: 398 - offset.un <<= shiftval; 399 - break; 400 - 401 - case SHIFT_LSR: 402 - offset.un >>= shiftval; 403 - break; 404 - 405 - case SHIFT_ASR: 406 - offset.sn >>= shiftval; 407 - break; 408 - 409 - case SHIFT_RORRRX: 410 - if (shiftval == 0) { 411 - offset.un >>= 1; 412 - if (regs->UCreg_asr & PSR_C_BIT) 413 - offset.un |= 1 << 31; 414 - } else 415 - offset.un = offset.un >> shiftval | 416 - offset.un << (32 - shiftval); 417 - break; 418 - } 419 - } 420 - handler = do_alignment_ldrstr; 421 - break; 422 - 423 - case 0x80000000: /* ldm or stm */ 424 - case 0x80000020: /* ldm or stm */ 425 - handler = do_alignment_ldmstm; 426 - break; 427 - 428 - default: 429 - goto bad; 430 - } 431 - 432 - type = handler(addr, instr, regs); 433 - 434 - if (type == TYPE_ERROR || type == TYPE_FAULT) 435 - goto bad_or_fault; 436 - 437 - if (type == TYPE_LDST) 438 - do_alignment_finish_ldst(addr, instr, regs, offset); 439 - 440 - return 0; 441 - 442 - bad_or_fault: 443 - if (type == TYPE_ERROR) 444 - goto bad; 445 - regs->UCreg_pc -= 4; 446 - /* 447 - * We got a fault - fix it up, or die. 448 - */ 449 - do_bad_area(addr, error_code, regs); 450 - return 0; 451 - 452 - bad: 453 - /* 454 - * Oops, we didn't handle the instruction. 455 - * However, we must handle fpu instr firstly. 456 - */ 457 - #ifdef CONFIG_UNICORE_FPU_F64 458 - /* handle co.load/store */ 459 - #define CODING_COLS 0xc0000000 460 - #define COLS_OFFSET_BITS(i) (i & 0x1FF) 461 - #define COLS_L_BITS(i) (i & (1<<24)) 462 - #define COLS_FN_BITS(i) ((i>>14) & 31) 463 - if ((instr & 0xe0000000) == CODING_COLS) { 464 - unsigned int fn = COLS_FN_BITS(instr); 465 - unsigned long val = 0; 466 - if (COLS_L_BITS(instr)) { 467 - get32t_unaligned_check(val, addr); 468 - switch (fn) { 469 - #define ASM_MTF(n) case n: \ 470 - __asm__ __volatile__("MTF %0, F" __stringify(n) \ 471 - : : "r"(val)); \ 472 - break; 473 - ASM_MTF(0); ASM_MTF(1); ASM_MTF(2); ASM_MTF(3); 474 - ASM_MTF(4); ASM_MTF(5); ASM_MTF(6); ASM_MTF(7); 475 - ASM_MTF(8); ASM_MTF(9); ASM_MTF(10); ASM_MTF(11); 476 - ASM_MTF(12); ASM_MTF(13); ASM_MTF(14); ASM_MTF(15); 477 - ASM_MTF(16); ASM_MTF(17); ASM_MTF(18); ASM_MTF(19); 478 - ASM_MTF(20); ASM_MTF(21); ASM_MTF(22); ASM_MTF(23); 479 - ASM_MTF(24); ASM_MTF(25); ASM_MTF(26); ASM_MTF(27); 480 - ASM_MTF(28); ASM_MTF(29); ASM_MTF(30); ASM_MTF(31); 481 - #undef ASM_MTF 482 - } 483 - } else { 484 - switch (fn) { 485 - #define ASM_MFF(n) case n: \ 486 - __asm__ __volatile__("MFF %0, F" __stringify(n) \ 487 - : : "r"(val)); \ 488 - break; 489 - ASM_MFF(0); ASM_MFF(1); ASM_MFF(2); ASM_MFF(3); 490 - ASM_MFF(4); ASM_MFF(5); ASM_MFF(6); ASM_MFF(7); 491 - ASM_MFF(8); ASM_MFF(9); ASM_MFF(10); ASM_MFF(11); 492 - ASM_MFF(12); ASM_MFF(13); ASM_MFF(14); ASM_MFF(15); 493 - ASM_MFF(16); ASM_MFF(17); ASM_MFF(18); ASM_MFF(19); 494 - ASM_MFF(20); ASM_MFF(21); ASM_MFF(22); ASM_MFF(23); 495 - ASM_MFF(24); ASM_MFF(25); ASM_MFF(26); ASM_MFF(27); 496 - ASM_MFF(28); ASM_MFF(29); ASM_MFF(30); ASM_MFF(31); 497 - #undef ASM_MFF 498 - } 499 - put32t_unaligned_check(val, addr); 500 - } 501 - return TYPE_COLS; 502 - } 503 - fault: 504 - return TYPE_FAULT; 505 - #endif 506 - printk(KERN_ERR "Alignment trap: not handling instruction " 507 - "%08lx at [<%08lx>]\n", instr, instrptr); 508 - return 1; 509 - } 510 - 511 - /* 512 - * This needs to be done after sysctl_init, otherwise sys/ will be 513 - * overwritten. Actually, this shouldn't be in sys/ at all since 514 - * it isn't a sysctl, and it doesn't contain sysctl information. 515 - */ 516 - static int __init alignment_init(void) 517 - { 518 - hook_fault_code(1, do_alignment, SIGBUS, BUS_ADRALN, 519 - "alignment exception"); 520 - 521 - return 0; 522 - } 523 - 524 - fs_initcall(alignment_init);
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arch/unicore32/mm/cache-ucv2.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/mm/cache-ucv2.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * This is the "shell" of the UniCore-v2 processor support. 10 - */ 11 - #include <linux/linkage.h> 12 - #include <linux/init.h> 13 - #include <asm/assembler.h> 14 - #include <asm/page.h> 15 - 16 - #include "proc-macros.S" 17 - 18 - /* 19 - * __cpuc_flush_icache_all() 20 - * __cpuc_flush_kern_all() 21 - * __cpuc_flush_user_all() 22 - * 23 - * Flush the entire cache. 24 - */ 25 - ENTRY(__cpuc_flush_icache_all) 26 - /*FALLTHROUGH*/ 27 - ENTRY(__cpuc_flush_kern_all) 28 - /*FALLTHROUGH*/ 29 - ENTRY(__cpuc_flush_user_all) 30 - mov r0, #0 31 - movc p0.c5, r0, #14 @ Dcache flush all 32 - nop8 33 - 34 - mov r0, #0 35 - movc p0.c5, r0, #20 @ Icache invalidate all 36 - nop8 37 - 38 - mov pc, lr 39 - 40 - /* 41 - * __cpuc_flush_user_range(start, end, flags) 42 - * 43 - * Flush a range of TLB entries in the specified address space. 44 - * 45 - * - start - start address (may not be aligned) 46 - * - end - end address (exclusive, may not be aligned) 47 - * - flags - vm_area_struct flags describing address space 48 - */ 49 - ENTRY(__cpuc_flush_user_range) 50 - cxor.a r2, #0 51 - beq __cpuc_dma_flush_range 52 - 53 - #ifndef CONFIG_CPU_DCACHE_LINE_DISABLE 54 - andn r0, r0, #CACHE_LINESIZE - 1 @ Safety check 55 - sub r1, r1, r0 56 - csub.a r1, #MAX_AREA_SIZE 57 - bsg 2f 58 - 59 - andn r1, r1, #CACHE_LINESIZE - 1 60 - add r1, r1, #CACHE_LINESIZE 61 - 62 - 101: dcacheline_flush r0, r11, r12 63 - 64 - add r0, r0, #CACHE_LINESIZE 65 - sub.a r1, r1, #CACHE_LINESIZE 66 - bns 101b 67 - b 3f 68 - #endif 69 - 2: mov ip, #0 70 - movc p0.c5, ip, #14 @ Dcache flush all 71 - nop8 72 - 73 - 3: mov ip, #0 74 - movc p0.c5, ip, #20 @ Icache invalidate all 75 - nop8 76 - 77 - mov pc, lr 78 - 79 - /* 80 - * __cpuc_coherent_kern_range(start,end) 81 - * __cpuc_coherent_user_range(start,end) 82 - * 83 - * Ensure that the I and D caches are coherent within specified 84 - * region. This is typically used when code has been written to 85 - * a memory region, and will be executed. 86 - * 87 - * - start - virtual start address of region 88 - * - end - virtual end address of region 89 - */ 90 - ENTRY(__cpuc_coherent_kern_range) 91 - /* FALLTHROUGH */ 92 - ENTRY(__cpuc_coherent_user_range) 93 - #ifndef CONFIG_CPU_DCACHE_LINE_DISABLE 94 - andn r0, r0, #CACHE_LINESIZE - 1 @ Safety check 95 - sub r1, r1, r0 96 - csub.a r1, #MAX_AREA_SIZE 97 - bsg 2f 98 - 99 - andn r1, r1, #CACHE_LINESIZE - 1 100 - add r1, r1, #CACHE_LINESIZE 101 - 102 - @ r0 va2pa r10 103 - mov r9, #PAGE_SZ 104 - sub r9, r9, #1 @ PAGE_MASK 105 - 101: va2pa r0, r10, r11, r12, r13, 2f @ r10 is PA 106 - b 103f 107 - 102: cand.a r0, r9 108 - beq 101b 109 - 110 - 103: movc p0.c5, r10, #11 @ Dcache clean line of R10 111 - nop8 112 - 113 - add r0, r0, #CACHE_LINESIZE 114 - add r10, r10, #CACHE_LINESIZE 115 - sub.a r1, r1, #CACHE_LINESIZE 116 - bns 102b 117 - b 3f 118 - #endif 119 - 2: mov ip, #0 120 - movc p0.c5, ip, #10 @ Dcache clean all 121 - nop8 122 - 123 - 3: mov ip, #0 124 - movc p0.c5, ip, #20 @ Icache invalidate all 125 - nop8 126 - 127 - mov pc, lr 128 - 129 - /* 130 - * __cpuc_flush_kern_dcache_area(void *addr, size_t size) 131 - * 132 - * - addr - kernel address 133 - * - size - region size 134 - */ 135 - ENTRY(__cpuc_flush_kern_dcache_area) 136 - mov ip, #0 137 - movc p0.c5, ip, #14 @ Dcache flush all 138 - nop8 139 - mov pc, lr 140 - 141 - /* 142 - * __cpuc_dma_clean_range(start,end) 143 - * - start - virtual start address of region 144 - * - end - virtual end address of region 145 - */ 146 - ENTRY(__cpuc_dma_clean_range) 147 - #ifndef CONFIG_CPU_DCACHE_LINE_DISABLE 148 - andn r0, r0, #CACHE_LINESIZE - 1 149 - sub r1, r1, r0 150 - andn r1, r1, #CACHE_LINESIZE - 1 151 - add r1, r1, #CACHE_LINESIZE 152 - 153 - csub.a r1, #MAX_AREA_SIZE 154 - bsg 2f 155 - 156 - @ r0 va2pa r10 157 - mov r9, #PAGE_SZ 158 - sub r9, r9, #1 @ PAGE_MASK 159 - 101: va2pa r0, r10, r11, r12, r13, 2f @ r10 is PA 160 - b 1f 161 - 102: cand.a r0, r9 162 - beq 101b 163 - 164 - 1: movc p0.c5, r10, #11 @ Dcache clean line of R10 165 - nop8 166 - add r0, r0, #CACHE_LINESIZE 167 - add r10, r10, #CACHE_LINESIZE 168 - sub.a r1, r1, #CACHE_LINESIZE 169 - bns 102b 170 - mov pc, lr 171 - #endif 172 - 2: mov ip, #0 173 - movc p0.c5, ip, #10 @ Dcache clean all 174 - nop8 175 - 176 - mov pc, lr 177 - 178 - /* 179 - * __cpuc_dma_inv_range(start,end) 180 - * __cpuc_dma_flush_range(start,end) 181 - * - start - virtual start address of region 182 - * - end - virtual end address of region 183 - */ 184 - __cpuc_dma_inv_range: 185 - /* FALLTHROUGH */ 186 - ENTRY(__cpuc_dma_flush_range) 187 - #ifndef CONFIG_CPU_DCACHE_LINE_DISABLE 188 - andn r0, r0, #CACHE_LINESIZE - 1 189 - sub r1, r1, r0 190 - andn r1, r1, #CACHE_LINESIZE - 1 191 - add r1, r1, #CACHE_LINESIZE 192 - 193 - csub.a r1, #MAX_AREA_SIZE 194 - bsg 2f 195 - 196 - @ r0 va2pa r10 197 - 101: dcacheline_flush r0, r11, r12 198 - 199 - add r0, r0, #CACHE_LINESIZE 200 - sub.a r1, r1, #CACHE_LINESIZE 201 - bns 101b 202 - mov pc, lr 203 - #endif 204 - 2: mov ip, #0 205 - movc p0.c5, ip, #14 @ Dcache flush all 206 - nop8 207 - 208 - mov pc, lr 209 -
-21
arch/unicore32/mm/extable.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/mm/extable.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/extable.h> 10 - #include <linux/uaccess.h> 11 - 12 - int fixup_exception(struct pt_regs *regs) 13 - { 14 - const struct exception_table_entry *fixup; 15 - 16 - fixup = search_exception_tables(instruction_pointer(regs)); 17 - if (fixup) 18 - regs->UCreg_pc = fixup->fixup; 19 - 20 - return fixup != NULL; 21 - }
-481
arch/unicore32/mm/fault.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/mm/fault.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/extable.h> 10 - #include <linux/signal.h> 11 - #include <linux/mm.h> 12 - #include <linux/hardirq.h> 13 - #include <linux/init.h> 14 - #include <linux/kprobes.h> 15 - #include <linux/uaccess.h> 16 - #include <linux/page-flags.h> 17 - #include <linux/sched/signal.h> 18 - #include <linux/io.h> 19 - 20 - #include <asm/tlbflush.h> 21 - 22 - /* 23 - * Fault status register encodings. We steal bit 31 for our own purposes. 24 - */ 25 - #define FSR_LNX_PF (1 << 31) 26 - 27 - static inline int fsr_fs(unsigned int fsr) 28 - { 29 - /* xyabcde will be abcde+xy */ 30 - return (fsr & 31) + ((fsr & (3 << 5)) >> 5); 31 - } 32 - 33 - /* 34 - * This is useful to dump out the page tables associated with 35 - * 'addr' in mm 'mm'. 36 - */ 37 - void show_pte(struct mm_struct *mm, unsigned long addr) 38 - { 39 - pgd_t *pgd; 40 - 41 - if (!mm) 42 - mm = &init_mm; 43 - 44 - printk(KERN_ALERT "pgd = %p\n", mm->pgd); 45 - pgd = pgd_offset(mm, addr); 46 - printk(KERN_ALERT "[%08lx] *pgd=%08lx", addr, pgd_val(*pgd)); 47 - 48 - do { 49 - pmd_t *pmd; 50 - pte_t *pte; 51 - 52 - if (pgd_none(*pgd)) 53 - break; 54 - 55 - if (pgd_bad(*pgd)) { 56 - printk("(bad)"); 57 - break; 58 - } 59 - 60 - pmd = pmd_offset((pud_t *) pgd, addr); 61 - if (PTRS_PER_PMD != 1) 62 - printk(", *pmd=%08lx", pmd_val(*pmd)); 63 - 64 - if (pmd_none(*pmd)) 65 - break; 66 - 67 - if (pmd_bad(*pmd)) { 68 - printk("(bad)"); 69 - break; 70 - } 71 - 72 - /* We must not map this if we have highmem enabled */ 73 - if (PageHighMem(pfn_to_page(pmd_val(*pmd) >> PAGE_SHIFT))) 74 - break; 75 - 76 - pte = pte_offset_map(pmd, addr); 77 - printk(", *pte=%08lx", pte_val(*pte)); 78 - pte_unmap(pte); 79 - } while (0); 80 - 81 - printk("\n"); 82 - } 83 - 84 - /* 85 - * Oops. The kernel tried to access some page that wasn't present. 86 - */ 87 - static void __do_kernel_fault(struct mm_struct *mm, unsigned long addr, 88 - unsigned int fsr, struct pt_regs *regs) 89 - { 90 - /* 91 - * Are we prepared to handle this kernel fault? 92 - */ 93 - if (fixup_exception(regs)) 94 - return; 95 - 96 - /* 97 - * No handler, we'll have to terminate things with extreme prejudice. 98 - */ 99 - bust_spinlocks(1); 100 - printk(KERN_ALERT 101 - "Unable to handle kernel %s at virtual address %08lx\n", 102 - (addr < PAGE_SIZE) ? "NULL pointer dereference" : 103 - "paging request", addr); 104 - 105 - show_pte(mm, addr); 106 - die("Oops", regs, fsr); 107 - bust_spinlocks(0); 108 - do_exit(SIGKILL); 109 - } 110 - 111 - /* 112 - * Something tried to access memory that isn't in our memory map.. 113 - * User mode accesses just cause a SIGSEGV 114 - */ 115 - static void __do_user_fault(unsigned long addr, unsigned int fsr, 116 - unsigned int sig, int code, struct pt_regs *regs) 117 - { 118 - struct task_struct *tsk = current; 119 - 120 - tsk->thread.address = addr; 121 - tsk->thread.error_code = fsr; 122 - tsk->thread.trap_no = 14; 123 - force_sig_fault(sig, code, (void __user *)addr); 124 - } 125 - 126 - void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs) 127 - { 128 - struct task_struct *tsk = current; 129 - struct mm_struct *mm = tsk->active_mm; 130 - 131 - /* 132 - * If we are in kernel mode at this point, we 133 - * have no context to handle this fault with. 134 - */ 135 - if (user_mode(regs)) 136 - __do_user_fault(addr, fsr, SIGSEGV, SEGV_MAPERR, regs); 137 - else 138 - __do_kernel_fault(mm, addr, fsr, regs); 139 - } 140 - 141 - #define VM_FAULT_BADMAP 0x010000 142 - #define VM_FAULT_BADACCESS 0x020000 143 - 144 - /* 145 - * Check that the permissions on the VMA allow for the fault which occurred. 146 - * If we encountered a write fault, we must have write permission, otherwise 147 - * we allow any permission. 148 - */ 149 - static inline bool access_error(unsigned int fsr, struct vm_area_struct *vma) 150 - { 151 - unsigned int mask = VM_ACCESS_FLAGS; 152 - 153 - if (!(fsr ^ 0x12)) /* write? */ 154 - mask = VM_WRITE; 155 - if (fsr & FSR_LNX_PF) 156 - mask = VM_EXEC; 157 - 158 - return vma->vm_flags & mask ? false : true; 159 - } 160 - 161 - static vm_fault_t __do_pf(struct mm_struct *mm, unsigned long addr, 162 - unsigned int fsr, unsigned int flags, struct task_struct *tsk) 163 - { 164 - struct vm_area_struct *vma; 165 - vm_fault_t fault; 166 - 167 - vma = find_vma(mm, addr); 168 - fault = VM_FAULT_BADMAP; 169 - if (unlikely(!vma)) 170 - goto out; 171 - if (unlikely(vma->vm_start > addr)) 172 - goto check_stack; 173 - 174 - /* 175 - * Ok, we have a good vm_area for this 176 - * memory access, so we can handle it. 177 - */ 178 - good_area: 179 - if (access_error(fsr, vma)) { 180 - fault = VM_FAULT_BADACCESS; 181 - goto out; 182 - } 183 - 184 - /* 185 - * If for any reason at all we couldn't handle the fault, make 186 - * sure we exit gracefully rather than endlessly redo the fault. 187 - */ 188 - fault = handle_mm_fault(vma, addr & PAGE_MASK, flags); 189 - return fault; 190 - 191 - check_stack: 192 - if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr)) 193 - goto good_area; 194 - out: 195 - return fault; 196 - } 197 - 198 - static int do_pf(unsigned long addr, unsigned int fsr, struct pt_regs *regs) 199 - { 200 - struct task_struct *tsk; 201 - struct mm_struct *mm; 202 - int sig, code; 203 - vm_fault_t fault; 204 - unsigned int flags = FAULT_FLAG_DEFAULT; 205 - 206 - tsk = current; 207 - mm = tsk->mm; 208 - 209 - /* 210 - * If we're in an interrupt or have no user 211 - * context, we must not take the fault.. 212 - */ 213 - if (faulthandler_disabled() || !mm) 214 - goto no_context; 215 - 216 - if (user_mode(regs)) 217 - flags |= FAULT_FLAG_USER; 218 - if (!(fsr ^ 0x12)) 219 - flags |= FAULT_FLAG_WRITE; 220 - 221 - /* 222 - * As per x86, we may deadlock here. However, since the kernel only 223 - * validly references user space from well defined areas of the code, 224 - * we can bug out early if this is from code which shouldn't. 225 - */ 226 - if (!mmap_read_trylock(mm)) { 227 - if (!user_mode(regs) 228 - && !search_exception_tables(regs->UCreg_pc)) 229 - goto no_context; 230 - retry: 231 - mmap_read_lock(mm); 232 - } else { 233 - /* 234 - * The above down_read_trylock() might have succeeded in 235 - * which case, we'll have missed the might_sleep() from 236 - * down_read() 237 - */ 238 - might_sleep(); 239 - #ifdef CONFIG_DEBUG_VM 240 - if (!user_mode(regs) && 241 - !search_exception_tables(regs->UCreg_pc)) 242 - goto no_context; 243 - #endif 244 - } 245 - 246 - fault = __do_pf(mm, addr, fsr, flags, tsk); 247 - 248 - /* If we need to retry but a fatal signal is pending, handle the 249 - * signal first. We do not need to release the mmap_lock because 250 - * it would already be released in __lock_page_or_retry in 251 - * mm/filemap.c. */ 252 - if (fault_signal_pending(fault, regs)) 253 - return 0; 254 - 255 - if (!(fault & VM_FAULT_ERROR) && (flags & FAULT_FLAG_ALLOW_RETRY)) { 256 - if (fault & VM_FAULT_MAJOR) 257 - tsk->maj_flt++; 258 - else 259 - tsk->min_flt++; 260 - if (fault & VM_FAULT_RETRY) { 261 - flags |= FAULT_FLAG_TRIED; 262 - goto retry; 263 - } 264 - } 265 - 266 - mmap_read_unlock(mm); 267 - 268 - /* 269 - * Handle the "normal" case first - VM_FAULT_MAJOR 270 - */ 271 - if (likely(!(fault & 272 - (VM_FAULT_ERROR | VM_FAULT_BADMAP | VM_FAULT_BADACCESS)))) 273 - return 0; 274 - 275 - /* 276 - * If we are in kernel mode at this point, we 277 - * have no context to handle this fault with. 278 - */ 279 - if (!user_mode(regs)) 280 - goto no_context; 281 - 282 - if (fault & VM_FAULT_OOM) { 283 - /* 284 - * We ran out of memory, call the OOM killer, and return to 285 - * userspace (which will retry the fault, or kill us if we 286 - * got oom-killed) 287 - */ 288 - pagefault_out_of_memory(); 289 - return 0; 290 - } 291 - 292 - if (fault & VM_FAULT_SIGBUS) { 293 - /* 294 - * We had some memory, but were unable to 295 - * successfully fix up this page fault. 296 - */ 297 - sig = SIGBUS; 298 - code = BUS_ADRERR; 299 - } else { 300 - /* 301 - * Something tried to access memory that 302 - * isn't in our memory map.. 303 - */ 304 - sig = SIGSEGV; 305 - code = fault == VM_FAULT_BADACCESS ? SEGV_ACCERR : SEGV_MAPERR; 306 - } 307 - 308 - __do_user_fault(addr, fsr, sig, code, regs); 309 - return 0; 310 - 311 - no_context: 312 - __do_kernel_fault(mm, addr, fsr, regs); 313 - return 0; 314 - } 315 - 316 - /* 317 - * First Level Translation Fault Handler 318 - * 319 - * We enter here because the first level page table doesn't contain 320 - * a valid entry for the address. 321 - * 322 - * If the address is in kernel space (>= TASK_SIZE), then we are 323 - * probably faulting in the vmalloc() area. 324 - * 325 - * If the init_task's first level page tables contains the relevant 326 - * entry, we copy the it to this task. If not, we send the process 327 - * a signal, fixup the exception, or oops the kernel. 328 - * 329 - * NOTE! We MUST NOT take any locks for this case. We may be in an 330 - * interrupt or a critical region, and should only copy the information 331 - * from the master page table, nothing more. 332 - */ 333 - static int do_ifault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) 334 - { 335 - unsigned int index; 336 - pgd_t *pgd, *pgd_k; 337 - pmd_t *pmd, *pmd_k; 338 - 339 - if (addr < TASK_SIZE) 340 - return do_pf(addr, fsr, regs); 341 - 342 - if (user_mode(regs)) 343 - goto bad_area; 344 - 345 - index = pgd_index(addr); 346 - 347 - pgd = cpu_get_pgd() + index; 348 - pgd_k = init_mm.pgd + index; 349 - 350 - if (pgd_none(*pgd_k)) 351 - goto bad_area; 352 - 353 - pmd_k = pmd_offset((pud_t *) pgd_k, addr); 354 - pmd = pmd_offset((pud_t *) pgd, addr); 355 - 356 - if (pmd_none(*pmd_k)) 357 - goto bad_area; 358 - 359 - set_pmd(pmd, *pmd_k); 360 - flush_pmd_entry(pmd); 361 - return 0; 362 - 363 - bad_area: 364 - do_bad_area(addr, fsr, regs); 365 - return 0; 366 - } 367 - 368 - /* 369 - * This abort handler always returns "fault". 370 - */ 371 - static int do_bad(unsigned long addr, unsigned int fsr, struct pt_regs *regs) 372 - { 373 - return 1; 374 - } 375 - 376 - static int do_good(unsigned long addr, unsigned int fsr, struct pt_regs *regs) 377 - { 378 - unsigned int res1, res2; 379 - 380 - printk("dabt exception but no error!\n"); 381 - 382 - __asm__ __volatile__( 383 - "mff %0,f0\n" 384 - "mff %1,f1\n" 385 - : "=r"(res1), "=r"(res2) 386 - : 387 - : "memory"); 388 - 389 - printk(KERN_EMERG "r0 :%08x r1 :%08x\n", res1, res2); 390 - panic("shut up\n"); 391 - return 0; 392 - } 393 - 394 - static struct fsr_info { 395 - int (*fn) (unsigned long addr, unsigned int fsr, struct pt_regs *regs); 396 - int sig; 397 - int code; 398 - const char *name; 399 - } fsr_info[] = { 400 - /* 401 - * The following are the standard Unicore-I and UniCore-II aborts. 402 - */ 403 - { do_good, SIGBUS, 0, "no error" }, 404 - { do_bad, SIGBUS, BUS_ADRALN, "alignment exception" }, 405 - { do_bad, SIGBUS, BUS_OBJERR, "external exception" }, 406 - { do_bad, SIGBUS, 0, "burst operation" }, 407 - { do_bad, SIGBUS, 0, "unknown 00100" }, 408 - { do_ifault, SIGSEGV, SEGV_MAPERR, "2nd level pt non-exist"}, 409 - { do_bad, SIGBUS, 0, "2nd lvl large pt non-exist" }, 410 - { do_bad, SIGBUS, 0, "invalid pte" }, 411 - { do_pf, SIGSEGV, SEGV_MAPERR, "page miss" }, 412 - { do_bad, SIGBUS, 0, "middle page miss" }, 413 - { do_bad, SIGBUS, 0, "large page miss" }, 414 - { do_pf, SIGSEGV, SEGV_MAPERR, "super page (section) miss" }, 415 - { do_bad, SIGBUS, 0, "unknown 01100" }, 416 - { do_bad, SIGBUS, 0, "unknown 01101" }, 417 - { do_bad, SIGBUS, 0, "unknown 01110" }, 418 - { do_bad, SIGBUS, 0, "unknown 01111" }, 419 - { do_bad, SIGBUS, 0, "addr: up 3G or IO" }, 420 - { do_pf, SIGSEGV, SEGV_ACCERR, "read unreadable addr" }, 421 - { do_pf, SIGSEGV, SEGV_ACCERR, "write unwriteable addr"}, 422 - { do_pf, SIGSEGV, SEGV_ACCERR, "exec unexecutable addr"}, 423 - { do_bad, SIGBUS, 0, "unknown 10100" }, 424 - { do_bad, SIGBUS, 0, "unknown 10101" }, 425 - { do_bad, SIGBUS, 0, "unknown 10110" }, 426 - { do_bad, SIGBUS, 0, "unknown 10111" }, 427 - { do_bad, SIGBUS, 0, "unknown 11000" }, 428 - { do_bad, SIGBUS, 0, "unknown 11001" }, 429 - { do_bad, SIGBUS, 0, "unknown 11010" }, 430 - { do_bad, SIGBUS, 0, "unknown 11011" }, 431 - { do_bad, SIGBUS, 0, "unknown 11100" }, 432 - { do_bad, SIGBUS, 0, "unknown 11101" }, 433 - { do_bad, SIGBUS, 0, "unknown 11110" }, 434 - { do_bad, SIGBUS, 0, "unknown 11111" } 435 - }; 436 - 437 - void __init hook_fault_code(int nr, 438 - int (*fn) (unsigned long, unsigned int, struct pt_regs *), 439 - int sig, int code, const char *name) 440 - { 441 - if (nr < 0 || nr >= ARRAY_SIZE(fsr_info)) 442 - BUG(); 443 - 444 - fsr_info[nr].fn = fn; 445 - fsr_info[nr].sig = sig; 446 - fsr_info[nr].code = code; 447 - fsr_info[nr].name = name; 448 - } 449 - 450 - /* 451 - * Dispatch a data abort to the relevant handler. 452 - */ 453 - asmlinkage void do_DataAbort(unsigned long addr, unsigned int fsr, 454 - struct pt_regs *regs) 455 - { 456 - const struct fsr_info *inf = fsr_info + fsr_fs(fsr); 457 - 458 - if (!inf->fn(addr, fsr & ~FSR_LNX_PF, regs)) 459 - return; 460 - 461 - printk(KERN_ALERT "Unhandled fault: %s (0x%03x) at 0x%08lx\n", 462 - inf->name, fsr, addr); 463 - 464 - uc32_notify_die("", regs, inf->sig, inf->code, (void __user *)addr, 465 - fsr, 0); 466 - } 467 - 468 - asmlinkage void do_PrefetchAbort(unsigned long addr, 469 - unsigned int ifsr, struct pt_regs *regs) 470 - { 471 - const struct fsr_info *inf = fsr_info + fsr_fs(ifsr); 472 - 473 - if (!inf->fn(addr, ifsr | FSR_LNX_PF, regs)) 474 - return; 475 - 476 - printk(KERN_ALERT "Unhandled prefetch abort: %s (0x%03x) at 0x%08lx\n", 477 - inf->name, ifsr, addr); 478 - 479 - uc32_notify_die("", regs, inf->sig, inf->code, (void __user *)addr, 480 - ifsr, 0); 481 - }
-94
arch/unicore32/mm/flush.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/mm/flush.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/module.h> 10 - #include <linux/mm.h> 11 - #include <linux/pagemap.h> 12 - 13 - #include <asm/cacheflush.h> 14 - #include <asm/tlbflush.h> 15 - 16 - void flush_cache_mm(struct mm_struct *mm) 17 - { 18 - } 19 - 20 - void flush_cache_range(struct vm_area_struct *vma, unsigned long start, 21 - unsigned long end) 22 - { 23 - if (vma->vm_flags & VM_EXEC) 24 - __flush_icache_all(); 25 - } 26 - 27 - void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, 28 - unsigned long pfn) 29 - { 30 - } 31 - 32 - static void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, 33 - unsigned long uaddr, void *kaddr, unsigned long len) 34 - { 35 - /* VIPT non-aliasing D-cache */ 36 - if (vma->vm_flags & VM_EXEC) { 37 - unsigned long addr = (unsigned long)kaddr; 38 - 39 - __cpuc_coherent_kern_range(addr, addr + len); 40 - } 41 - } 42 - 43 - /* 44 - * Copy user data from/to a page which is mapped into a different 45 - * processes address space. Really, we want to allow our "user 46 - * space" model to handle this. 47 - * 48 - * Note that this code needs to run on the current CPU. 49 - */ 50 - void copy_to_user_page(struct vm_area_struct *vma, struct page *page, 51 - unsigned long uaddr, void *dst, const void *src, 52 - unsigned long len) 53 - { 54 - memcpy(dst, src, len); 55 - flush_ptrace_access(vma, page, uaddr, dst, len); 56 - } 57 - 58 - void __flush_dcache_page(struct address_space *mapping, struct page *page) 59 - { 60 - /* 61 - * Writeback any data associated with the kernel mapping of this 62 - * page. This ensures that data in the physical page is mutually 63 - * coherent with the kernels mapping. 64 - */ 65 - __cpuc_flush_kern_dcache_area(page_address(page), PAGE_SIZE); 66 - } 67 - 68 - /* 69 - * Ensure cache coherency between kernel mapping and userspace mapping 70 - * of this page. 71 - */ 72 - void flush_dcache_page(struct page *page) 73 - { 74 - struct address_space *mapping; 75 - 76 - /* 77 - * The zero page is never written to, so never has any dirty 78 - * cache lines, and therefore never needs to be flushed. 79 - */ 80 - if (page == ZERO_PAGE(0)) 81 - return; 82 - 83 - mapping = page_mapping_file(page); 84 - 85 - if (mapping && !mapping_mapped(mapping)) 86 - clear_bit(PG_dcache_clean, &page->flags); 87 - else { 88 - __flush_dcache_page(mapping, page); 89 - if (mapping) 90 - __flush_icache_all(); 91 - set_bit(PG_dcache_clean, &page->flags); 92 - } 93 - } 94 - EXPORT_SYMBOL(flush_dcache_page);
-261
arch/unicore32/mm/init.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/mm/init.c 4 - * 5 - * Copyright (C) 2010 GUAN Xue-tao 6 - */ 7 - #include <linux/kernel.h> 8 - #include <linux/errno.h> 9 - #include <linux/swap.h> 10 - #include <linux/init.h> 11 - #include <linux/memblock.h> 12 - #include <linux/mman.h> 13 - #include <linux/nodemask.h> 14 - #include <linux/initrd.h> 15 - #include <linux/highmem.h> 16 - #include <linux/gfp.h> 17 - #include <linux/sort.h> 18 - #include <linux/dma-mapping.h> 19 - #include <linux/export.h> 20 - 21 - #include <asm/sections.h> 22 - #include <asm/setup.h> 23 - #include <linux/sizes.h> 24 - #include <asm/tlb.h> 25 - #include <asm/memblock.h> 26 - #include <mach/map.h> 27 - 28 - #include "mm.h" 29 - 30 - /* 31 - * This keeps memory configuration data used by a couple memory 32 - * initialization functions, as well as show_mem() for the skipping 33 - * of holes in the memory map. It is populated by uc32_add_memory(). 34 - */ 35 - struct meminfo meminfo; 36 - 37 - static void __init find_limits(unsigned long *min, unsigned long *max_low, 38 - unsigned long *max_high) 39 - { 40 - struct meminfo *mi = &meminfo; 41 - int i; 42 - 43 - *min = -1UL; 44 - *max_low = *max_high = 0; 45 - 46 - for_each_bank(i, mi) { 47 - struct membank *bank = &mi->bank[i]; 48 - unsigned long start, end; 49 - 50 - start = bank_pfn_start(bank); 51 - end = bank_pfn_end(bank); 52 - 53 - if (*min > start) 54 - *min = start; 55 - if (*max_high < end) 56 - *max_high = end; 57 - if (bank->highmem) 58 - continue; 59 - if (*max_low < end) 60 - *max_low = end; 61 - } 62 - } 63 - 64 - static void __init uc32_bootmem_free(unsigned long max_low) 65 - { 66 - unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0 }; 67 - 68 - max_zone_pfn[ZONE_DMA] = max_low; 69 - max_zone_pfn[ZONE_NORMAL] = max_low; 70 - 71 - /* 72 - * Adjust the sizes according to any special requirements for 73 - * this machine type. 74 - * This might lower ZONE_DMA limit. 75 - */ 76 - arch_adjust_zones(max_zone_pfn); 77 - 78 - free_area_init(max_zone_pfn); 79 - } 80 - 81 - int pfn_valid(unsigned long pfn) 82 - { 83 - return memblock_is_memory(pfn << PAGE_SHIFT); 84 - } 85 - EXPORT_SYMBOL(pfn_valid); 86 - 87 - static void uc32_memory_present(void) 88 - { 89 - } 90 - 91 - static int __init meminfo_cmp(const void *_a, const void *_b) 92 - { 93 - const struct membank *a = _a, *b = _b; 94 - long cmp = bank_pfn_start(a) - bank_pfn_start(b); 95 - return cmp < 0 ? -1 : cmp > 0 ? 1 : 0; 96 - } 97 - 98 - void __init uc32_memblock_init(struct meminfo *mi) 99 - { 100 - int i; 101 - 102 - sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), 103 - meminfo_cmp, NULL); 104 - 105 - for (i = 0; i < mi->nr_banks; i++) 106 - memblock_add(mi->bank[i].start, mi->bank[i].size); 107 - 108 - /* Register the kernel text, kernel data and initrd with memblock. */ 109 - memblock_reserve(__pa(_text), _end - _text); 110 - 111 - #ifdef CONFIG_BLK_DEV_INITRD 112 - if (!phys_initrd_size) { 113 - phys_initrd_start = 0x01000000; 114 - phys_initrd_size = SZ_8M; 115 - } 116 - 117 - if (phys_initrd_size) { 118 - memblock_reserve(phys_initrd_start, phys_initrd_size); 119 - 120 - /* Now convert initrd to virtual addresses */ 121 - initrd_start = __phys_to_virt(phys_initrd_start); 122 - initrd_end = initrd_start + phys_initrd_size; 123 - } 124 - #endif 125 - 126 - uc32_mm_memblock_reserve(); 127 - 128 - memblock_allow_resize(); 129 - memblock_dump_all(); 130 - } 131 - 132 - void __init bootmem_init(void) 133 - { 134 - unsigned long min, max_low, max_high; 135 - 136 - max_low = max_high = 0; 137 - 138 - find_limits(&min, &max_low, &max_high); 139 - 140 - node_set_online(0); 141 - 142 - /* 143 - * Sparsemem tries to allocate bootmem in memory_present(), 144 - * so must be done after the fixed reservations 145 - */ 146 - uc32_memory_present(); 147 - 148 - /* 149 - * sparse_init() needs the bootmem allocator up and running. 150 - */ 151 - sparse_init(); 152 - 153 - /* 154 - * Now free the memory - free_area_init needs 155 - * the sparse mem_map arrays initialized by sparse_init() 156 - * for memmap_init_zone(), otherwise all PFNs are invalid. 157 - */ 158 - uc32_bootmem_free(max_low); 159 - 160 - high_memory = __va((max_low << PAGE_SHIFT) - 1) + 1; 161 - 162 - /* 163 - * This doesn't seem to be used by the Linux memory manager any 164 - * more, but is used by ll_rw_block. If we can get rid of it, we 165 - * also get rid of some of the stuff above as well. 166 - * 167 - * Note: max_low_pfn and max_pfn reflect the number of _pages_ in 168 - * the system, not the maximum PFN. 169 - */ 170 - max_low_pfn = max_low - PHYS_PFN_OFFSET; 171 - max_pfn = max_high - PHYS_PFN_OFFSET; 172 - } 173 - 174 - static inline void 175 - free_memmap(unsigned long start_pfn, unsigned long end_pfn) 176 - { 177 - struct page *start_pg, *end_pg; 178 - unsigned long pg, pgend; 179 - 180 - /* 181 - * Convert start_pfn/end_pfn to a struct page pointer. 182 - */ 183 - start_pg = pfn_to_page(start_pfn - 1) + 1; 184 - end_pg = pfn_to_page(end_pfn); 185 - 186 - /* 187 - * Convert to physical addresses, and 188 - * round start upwards and end downwards. 189 - */ 190 - pg = PAGE_ALIGN(__pa(start_pg)); 191 - pgend = __pa(end_pg) & PAGE_MASK; 192 - 193 - /* 194 - * If there are free pages between these, 195 - * free the section of the memmap array. 196 - */ 197 - if (pg < pgend) 198 - memblock_free(pg, pgend - pg); 199 - } 200 - 201 - /* 202 - * The mem_map array can get very big. Free the unused area of the memory map. 203 - */ 204 - static void __init free_unused_memmap(struct meminfo *mi) 205 - { 206 - unsigned long bank_start, prev_bank_end = 0; 207 - unsigned int i; 208 - 209 - /* 210 - * This relies on each bank being in address order. 211 - * The banks are sorted previously in bootmem_init(). 212 - */ 213 - for_each_bank(i, mi) { 214 - struct membank *bank = &mi->bank[i]; 215 - 216 - bank_start = bank_pfn_start(bank); 217 - 218 - /* 219 - * If we had a previous bank, and there is a space 220 - * between the current bank and the previous, free it. 221 - */ 222 - if (prev_bank_end && prev_bank_end < bank_start) 223 - free_memmap(prev_bank_end, bank_start); 224 - 225 - /* 226 - * Align up here since the VM subsystem insists that the 227 - * memmap entries are valid from the bank end aligned to 228 - * MAX_ORDER_NR_PAGES. 229 - */ 230 - prev_bank_end = ALIGN(bank_pfn_end(bank), MAX_ORDER_NR_PAGES); 231 - } 232 - } 233 - 234 - /* 235 - * mem_init() marks the free areas in the mem_map and tells us how much 236 - * memory is free. This is done after various parts of the system have 237 - * claimed their memory after the kernel image. 238 - */ 239 - void __init mem_init(void) 240 - { 241 - max_mapnr = pfn_to_page(max_pfn + PHYS_PFN_OFFSET) - mem_map; 242 - 243 - free_unused_memmap(&meminfo); 244 - 245 - /* this will put all unused low memory onto the freelists */ 246 - memblock_free_all(); 247 - 248 - mem_init_print_info(NULL); 249 - 250 - BUILD_BUG_ON(TASK_SIZE > MODULES_VADDR); 251 - BUG_ON(TASK_SIZE > MODULES_VADDR); 252 - 253 - if (PAGE_SIZE >= 16384 && get_num_physpages() <= 128) { 254 - /* 255 - * On a machine this small we won't get 256 - * anywhere without overcommit, so turn 257 - * it on by default. 258 - */ 259 - sysctl_overcommit_memory = OVERCOMMIT_ALWAYS; 260 - } 261 - }
-242
arch/unicore32/mm/ioremap.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/mm/ioremap.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * Re-map IO memory to kernel address space so that we can access it. 10 - * 11 - * This allows a driver to remap an arbitrary region of bus memory into 12 - * virtual space. One should *only* use readl, writel, memcpy_toio and 13 - * so on with such remapped areas. 14 - * 15 - * Because UniCore only has a 32-bit address space we can't address the 16 - * whole of the (physical) PCI space at once. PCI huge-mode addressing 17 - * allows us to circumvent this restriction by splitting PCI space into 18 - * two 2GB chunks and mapping only one at a time into processor memory. 19 - * We use MMU protection domains to trap any attempt to access the bank 20 - * that is not currently mapped. (This isn't fully implemented yet.) 21 - */ 22 - #include <linux/module.h> 23 - #include <linux/errno.h> 24 - #include <linux/mm.h> 25 - #include <linux/vmalloc.h> 26 - #include <linux/io.h> 27 - 28 - #include <asm/cputype.h> 29 - #include <asm/cacheflush.h> 30 - #include <asm/mmu_context.h> 31 - #include <asm/pgalloc.h> 32 - #include <asm/tlbflush.h> 33 - #include <linux/sizes.h> 34 - 35 - #include <mach/map.h> 36 - #include "mm.h" 37 - 38 - /* 39 - * Used by ioremap() and iounmap() code to mark (super)section-mapped 40 - * I/O regions in vm_struct->flags field. 41 - */ 42 - #define VM_UNICORE_SECTION_MAPPING 0x80000000 43 - 44 - int ioremap_page(unsigned long virt, unsigned long phys, 45 - const struct mem_type *mtype) 46 - { 47 - return ioremap_page_range(virt, virt + PAGE_SIZE, phys, 48 - __pgprot(mtype->prot_pte)); 49 - } 50 - EXPORT_SYMBOL(ioremap_page); 51 - 52 - /* 53 - * Section support is unsafe on SMP - If you iounmap and ioremap a region, 54 - * the other CPUs will not see this change until their next context switch. 55 - * Meanwhile, (eg) if an interrupt comes in on one of those other CPUs 56 - * which requires the new ioremap'd region to be referenced, the CPU will 57 - * reference the _old_ region. 58 - * 59 - * Note that get_vm_area_caller() allocates a guard 4K page, so we need to 60 - * mask the size back to 4MB aligned or we will overflow in the loop below. 61 - */ 62 - static void unmap_area_sections(unsigned long virt, unsigned long size) 63 - { 64 - unsigned long addr = virt, end = virt + (size & ~(SZ_4M - 1)); 65 - pgd_t *pgd; 66 - 67 - flush_cache_vunmap(addr, end); 68 - pgd = pgd_offset_k(addr); 69 - do { 70 - pmd_t pmd, *pmdp = pmd_offset((pud_t *)pgd, addr); 71 - 72 - pmd = *pmdp; 73 - if (!pmd_none(pmd)) { 74 - /* 75 - * Clear the PMD from the page table, and 76 - * increment the kvm sequence so others 77 - * notice this change. 78 - * 79 - * Note: this is still racy on SMP machines. 80 - */ 81 - pmd_clear(pmdp); 82 - 83 - /* 84 - * Free the page table, if there was one. 85 - */ 86 - if ((pmd_val(pmd) & PMD_TYPE_MASK) == PMD_TYPE_TABLE) 87 - pte_free_kernel(&init_mm, pmd_page_vaddr(pmd)); 88 - } 89 - 90 - addr += PGDIR_SIZE; 91 - pgd++; 92 - } while (addr < end); 93 - 94 - flush_tlb_kernel_range(virt, end); 95 - } 96 - 97 - static int 98 - remap_area_sections(unsigned long virt, unsigned long pfn, 99 - size_t size, const struct mem_type *type) 100 - { 101 - unsigned long addr = virt, end = virt + size; 102 - pgd_t *pgd; 103 - 104 - /* 105 - * Remove and free any PTE-based mapping, and 106 - * sync the current kernel mapping. 107 - */ 108 - unmap_area_sections(virt, size); 109 - 110 - pgd = pgd_offset_k(addr); 111 - do { 112 - pmd_t *pmd = pmd_offset((pud_t *)pgd, addr); 113 - 114 - set_pmd(pmd, __pmd(__pfn_to_phys(pfn) | type->prot_sect)); 115 - pfn += SZ_4M >> PAGE_SHIFT; 116 - flush_pmd_entry(pmd); 117 - 118 - addr += PGDIR_SIZE; 119 - pgd++; 120 - } while (addr < end); 121 - 122 - return 0; 123 - } 124 - 125 - void __iomem *__uc32_ioremap_pfn_caller(unsigned long pfn, 126 - unsigned long offset, size_t size, unsigned int mtype, void *caller) 127 - { 128 - const struct mem_type *type; 129 - int err; 130 - unsigned long addr; 131 - struct vm_struct *area; 132 - 133 - /* 134 - * High mappings must be section aligned 135 - */ 136 - if (pfn >= 0x100000 && (__pfn_to_phys(pfn) & ~SECTION_MASK)) 137 - return NULL; 138 - 139 - /* 140 - * Don't allow RAM to be mapped 141 - */ 142 - if (pfn_valid(pfn)) { 143 - WARN(1, "BUG: Your driver calls ioremap() on\n" 144 - "system memory. This leads to architecturally\n" 145 - "unpredictable behaviour, and ioremap() will fail in\n" 146 - "the next kernel release. Please fix your driver.\n"); 147 - return NULL; 148 - } 149 - 150 - type = get_mem_type(mtype); 151 - if (!type) 152 - return NULL; 153 - 154 - /* 155 - * Page align the mapping size, taking account of any offset. 156 - */ 157 - size = PAGE_ALIGN(offset + size); 158 - 159 - area = get_vm_area_caller(size, VM_IOREMAP, caller); 160 - if (!area) 161 - return NULL; 162 - addr = (unsigned long)area->addr; 163 - 164 - if (!((__pfn_to_phys(pfn) | size | addr) & ~PMD_MASK)) { 165 - area->flags |= VM_UNICORE_SECTION_MAPPING; 166 - err = remap_area_sections(addr, pfn, size, type); 167 - } else 168 - err = ioremap_page_range(addr, addr + size, __pfn_to_phys(pfn), 169 - __pgprot(type->prot_pte)); 170 - 171 - if (err) { 172 - vunmap((void *)addr); 173 - return NULL; 174 - } 175 - 176 - flush_cache_vmap(addr, addr + size); 177 - return (void __iomem *) (offset + addr); 178 - } 179 - 180 - void __iomem *__uc32_ioremap_caller(unsigned long phys_addr, size_t size, 181 - unsigned int mtype, void *caller) 182 - { 183 - unsigned long last_addr; 184 - unsigned long offset = phys_addr & ~PAGE_MASK; 185 - unsigned long pfn = __phys_to_pfn(phys_addr); 186 - 187 - /* 188 - * Don't allow wraparound or zero size 189 - */ 190 - last_addr = phys_addr + size - 1; 191 - if (!size || last_addr < phys_addr) 192 - return NULL; 193 - 194 - return __uc32_ioremap_pfn_caller(pfn, offset, size, mtype, caller); 195 - } 196 - 197 - /* 198 - * Remap an arbitrary physical address space into the kernel virtual 199 - * address space. Needed when the kernel wants to access high addresses 200 - * directly. 201 - * 202 - * NOTE! We need to allow non-page-aligned mappings too: we will obviously 203 - * have to convert them into an offset in a page-aligned mapping, but the 204 - * caller shouldn't need to know that small detail. 205 - */ 206 - void __iomem * 207 - __uc32_ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size, 208 - unsigned int mtype) 209 - { 210 - return __uc32_ioremap_pfn_caller(pfn, offset, size, mtype, 211 - __builtin_return_address(0)); 212 - } 213 - EXPORT_SYMBOL(__uc32_ioremap_pfn); 214 - 215 - void __iomem * 216 - __uc32_ioremap(unsigned long phys_addr, size_t size) 217 - { 218 - return __uc32_ioremap_caller(phys_addr, size, MT_DEVICE, 219 - __builtin_return_address(0)); 220 - } 221 - EXPORT_SYMBOL(__uc32_ioremap); 222 - 223 - void __uc32_iounmap(volatile void __iomem *io_addr) 224 - { 225 - void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr); 226 - struct vm_struct *vm; 227 - 228 - /* 229 - * If this is a section based mapping we need to handle it 230 - * specially as the VM subsystem does not know how to handle 231 - * such a beast. We need the lock here b/c we need to clear 232 - * all the mappings before the area can be reclaimed 233 - * by someone else. 234 - */ 235 - vm = find_vm_area(addr); 236 - if (vm && (vm->flags & VM_IOREMAP) && 237 - (vm->flags & VM_UNICORE_SECTION_MAPPING)) 238 - unmap_area_sections((unsigned long)vm->addr, vm->size); 239 - 240 - vunmap(addr); 241 - } 242 - EXPORT_SYMBOL(__uc32_iounmap);
-31
arch/unicore32/mm/mm.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/mm/mm.h 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <asm/hwdef-copro.h> 10 - 11 - /* the upper-most page table pointer */ 12 - extern pmd_t *top_pmd; 13 - extern int sysctl_overcommit_memory; 14 - 15 - #define TOP_PTE(x) pte_offset_kernel(top_pmd, x) 16 - 17 - struct mem_type { 18 - unsigned int prot_pte; 19 - unsigned int prot_l1; 20 - unsigned int prot_sect; 21 - }; 22 - 23 - const struct mem_type *get_mem_type(unsigned int type); 24 - 25 - extern void __flush_dcache_page(struct address_space *, struct page *); 26 - extern void hook_fault_code(int nr, int (*fn) 27 - (unsigned long, unsigned int, struct pt_regs *), 28 - int sig, int code, const char *name); 29 - 30 - void __init bootmem_init(void); 31 - void uc32_mm_memblock_reserve(void);
-513
arch/unicore32/mm/mmu.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/mm/mmu.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/module.h> 10 - #include <linux/kernel.h> 11 - #include <linux/errno.h> 12 - #include <linux/init.h> 13 - #include <linux/mman.h> 14 - #include <linux/nodemask.h> 15 - #include <linux/memblock.h> 16 - #include <linux/fs.h> 17 - #include <linux/io.h> 18 - 19 - #include <asm/cputype.h> 20 - #include <asm/sections.h> 21 - #include <asm/setup.h> 22 - #include <linux/sizes.h> 23 - #include <asm/tlb.h> 24 - #include <asm/memblock.h> 25 - 26 - #include <mach/map.h> 27 - 28 - #include "mm.h" 29 - 30 - /* 31 - * empty_zero_page is a special page that is used for 32 - * zero-initialized data and COW. 33 - */ 34 - struct page *empty_zero_page; 35 - EXPORT_SYMBOL(empty_zero_page); 36 - 37 - /* 38 - * The pmd table for the upper-most set of pages. 39 - */ 40 - pmd_t *top_pmd; 41 - 42 - pgprot_t pgprot_user; 43 - EXPORT_SYMBOL(pgprot_user); 44 - 45 - pgprot_t pgprot_kernel; 46 - EXPORT_SYMBOL(pgprot_kernel); 47 - 48 - static int __init noalign_setup(char *__unused) 49 - { 50 - cr_alignment &= ~CR_A; 51 - cr_no_alignment &= ~CR_A; 52 - set_cr(cr_alignment); 53 - return 1; 54 - } 55 - __setup("noalign", noalign_setup); 56 - 57 - void adjust_cr(unsigned long mask, unsigned long set) 58 - { 59 - unsigned long flags; 60 - 61 - mask &= ~CR_A; 62 - 63 - set &= mask; 64 - 65 - local_irq_save(flags); 66 - 67 - cr_no_alignment = (cr_no_alignment & ~mask) | set; 68 - cr_alignment = (cr_alignment & ~mask) | set; 69 - 70 - set_cr((get_cr() & ~mask) | set); 71 - 72 - local_irq_restore(flags); 73 - } 74 - 75 - struct map_desc { 76 - unsigned long virtual; 77 - unsigned long pfn; 78 - unsigned long length; 79 - unsigned int type; 80 - }; 81 - 82 - #define PROT_PTE_DEVICE (PTE_PRESENT | PTE_YOUNG | \ 83 - PTE_DIRTY | PTE_READ | PTE_WRITE) 84 - #define PROT_SECT_DEVICE (PMD_TYPE_SECT | PMD_PRESENT | \ 85 - PMD_SECT_READ | PMD_SECT_WRITE) 86 - 87 - static struct mem_type mem_types[] = { 88 - [MT_DEVICE] = { /* Strongly ordered */ 89 - .prot_pte = PROT_PTE_DEVICE, 90 - .prot_l1 = PMD_TYPE_TABLE | PMD_PRESENT, 91 - .prot_sect = PROT_SECT_DEVICE, 92 - }, 93 - /* 94 - * MT_KUSER: pte for vecpage -- cacheable, 95 - * and sect for unigfx mmap -- noncacheable 96 - */ 97 - [MT_KUSER] = { 98 - .prot_pte = PTE_PRESENT | PTE_YOUNG | PTE_DIRTY | 99 - PTE_CACHEABLE | PTE_READ | PTE_EXEC, 100 - .prot_l1 = PMD_TYPE_TABLE | PMD_PRESENT, 101 - .prot_sect = PROT_SECT_DEVICE, 102 - }, 103 - [MT_HIGH_VECTORS] = { 104 - .prot_pte = PTE_PRESENT | PTE_YOUNG | PTE_DIRTY | 105 - PTE_CACHEABLE | PTE_READ | PTE_WRITE | 106 - PTE_EXEC, 107 - .prot_l1 = PMD_TYPE_TABLE | PMD_PRESENT, 108 - }, 109 - [MT_MEMORY] = { 110 - .prot_pte = PTE_PRESENT | PTE_YOUNG | PTE_DIRTY | 111 - PTE_WRITE | PTE_EXEC, 112 - .prot_l1 = PMD_TYPE_TABLE | PMD_PRESENT, 113 - .prot_sect = PMD_TYPE_SECT | PMD_PRESENT | PMD_SECT_CACHEABLE | 114 - PMD_SECT_READ | PMD_SECT_WRITE | PMD_SECT_EXEC, 115 - }, 116 - [MT_ROM] = { 117 - .prot_sect = PMD_TYPE_SECT | PMD_PRESENT | PMD_SECT_CACHEABLE | 118 - PMD_SECT_READ, 119 - }, 120 - }; 121 - 122 - const struct mem_type *get_mem_type(unsigned int type) 123 - { 124 - return type < ARRAY_SIZE(mem_types) ? &mem_types[type] : NULL; 125 - } 126 - EXPORT_SYMBOL(get_mem_type); 127 - 128 - /* 129 - * Adjust the PMD section entries according to the CPU in use. 130 - */ 131 - static void __init build_mem_type_table(void) 132 - { 133 - pgprot_user = __pgprot(PTE_PRESENT | PTE_YOUNG | PTE_CACHEABLE); 134 - pgprot_kernel = __pgprot(PTE_PRESENT | PTE_YOUNG | 135 - PTE_DIRTY | PTE_READ | PTE_WRITE | 136 - PTE_EXEC | PTE_CACHEABLE); 137 - } 138 - 139 - #define vectors_base() (vectors_high() ? 0xffff0000 : 0) 140 - 141 - static pte_t * __init early_pte_alloc(pmd_t *pmd, unsigned long addr, 142 - unsigned long prot) 143 - { 144 - if (pmd_none(*pmd)) { 145 - size_t size = PTRS_PER_PTE * sizeof(pte_t); 146 - pte_t *pte = memblock_alloc(size, size); 147 - 148 - if (!pte) 149 - panic("%s: Failed to allocate %zu bytes align=%zx\n", 150 - __func__, size, size); 151 - 152 - __pmd_populate(pmd, __pa(pte) | prot); 153 - } 154 - BUG_ON(pmd_bad(*pmd)); 155 - return pte_offset_kernel(pmd, addr); 156 - } 157 - 158 - static void __init alloc_init_pte(pmd_t *pmd, unsigned long addr, 159 - unsigned long end, unsigned long pfn, 160 - const struct mem_type *type) 161 - { 162 - pte_t *pte = early_pte_alloc(pmd, addr, type->prot_l1); 163 - do { 164 - set_pte(pte, pfn_pte(pfn, __pgprot(type->prot_pte))); 165 - pfn++; 166 - } while (pte++, addr += PAGE_SIZE, addr != end); 167 - } 168 - 169 - static void __init alloc_init_section(pgd_t *pgd, unsigned long addr, 170 - unsigned long end, unsigned long phys, 171 - const struct mem_type *type) 172 - { 173 - pmd_t *pmd = pmd_offset((pud_t *)pgd, addr); 174 - 175 - /* 176 - * Try a section mapping - end, addr and phys must all be aligned 177 - * to a section boundary. 178 - */ 179 - if (((addr | end | phys) & ~SECTION_MASK) == 0) { 180 - pmd_t *p = pmd; 181 - 182 - do { 183 - set_pmd(pmd, __pmd(phys | type->prot_sect)); 184 - phys += SECTION_SIZE; 185 - } while (pmd++, addr += SECTION_SIZE, addr != end); 186 - 187 - flush_pmd_entry(p); 188 - } else { 189 - /* 190 - * No need to loop; pte's aren't interested in the 191 - * individual L1 entries. 192 - */ 193 - alloc_init_pte(pmd, addr, end, __phys_to_pfn(phys), type); 194 - } 195 - } 196 - 197 - /* 198 - * Create the page directory entries and any necessary 199 - * page tables for the mapping specified by `md'. We 200 - * are able to cope here with varying sizes and address 201 - * offsets, and we take full advantage of sections. 202 - */ 203 - static void __init create_mapping(struct map_desc *md) 204 - { 205 - unsigned long phys, addr, length, end; 206 - const struct mem_type *type; 207 - pgd_t *pgd; 208 - 209 - if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) { 210 - printk(KERN_WARNING "BUG: not creating mapping for " 211 - "0x%08llx at 0x%08lx in user region\n", 212 - __pfn_to_phys((u64)md->pfn), md->virtual); 213 - return; 214 - } 215 - 216 - if ((md->type == MT_DEVICE || md->type == MT_ROM) && 217 - md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) { 218 - printk(KERN_WARNING "BUG: mapping for 0x%08llx at 0x%08lx " 219 - "overlaps vmalloc space\n", 220 - __pfn_to_phys((u64)md->pfn), md->virtual); 221 - } 222 - 223 - type = &mem_types[md->type]; 224 - 225 - addr = md->virtual & PAGE_MASK; 226 - phys = (unsigned long)__pfn_to_phys(md->pfn); 227 - length = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK)); 228 - 229 - if (type->prot_l1 == 0 && ((addr | phys | length) & ~SECTION_MASK)) { 230 - printk(KERN_WARNING "BUG: map for 0x%08lx at 0x%08lx can not " 231 - "be mapped using pages, ignoring.\n", 232 - __pfn_to_phys(md->pfn), addr); 233 - return; 234 - } 235 - 236 - pgd = pgd_offset_k(addr); 237 - end = addr + length; 238 - do { 239 - unsigned long next = pgd_addr_end(addr, end); 240 - 241 - alloc_init_section(pgd, addr, next, phys, type); 242 - 243 - phys += next - addr; 244 - addr = next; 245 - } while (pgd++, addr != end); 246 - } 247 - 248 - static void * __initdata vmalloc_min = (void *)(VMALLOC_END - SZ_128M); 249 - 250 - /* 251 - * vmalloc=size forces the vmalloc area to be exactly 'size' 252 - * bytes. This can be used to increase (or decrease) the vmalloc 253 - * area - the default is 128m. 254 - */ 255 - static int __init early_vmalloc(char *arg) 256 - { 257 - unsigned long vmalloc_reserve = memparse(arg, NULL); 258 - 259 - if (vmalloc_reserve < SZ_16M) { 260 - vmalloc_reserve = SZ_16M; 261 - printk(KERN_WARNING 262 - "vmalloc area too small, limiting to %luMB\n", 263 - vmalloc_reserve >> 20); 264 - } 265 - 266 - if (vmalloc_reserve > VMALLOC_END - (PAGE_OFFSET + SZ_32M)) { 267 - vmalloc_reserve = VMALLOC_END - (PAGE_OFFSET + SZ_32M); 268 - printk(KERN_WARNING 269 - "vmalloc area is too big, limiting to %luMB\n", 270 - vmalloc_reserve >> 20); 271 - } 272 - 273 - vmalloc_min = (void *)(VMALLOC_END - vmalloc_reserve); 274 - return 0; 275 - } 276 - early_param("vmalloc", early_vmalloc); 277 - 278 - static phys_addr_t lowmem_limit __initdata = SZ_1G; 279 - 280 - static void __init sanity_check_meminfo(void) 281 - { 282 - int i, j; 283 - 284 - lowmem_limit = __pa(vmalloc_min - 1) + 1; 285 - memblock_set_current_limit(lowmem_limit); 286 - 287 - for (i = 0, j = 0; i < meminfo.nr_banks; i++) { 288 - struct membank *bank = &meminfo.bank[j]; 289 - *bank = meminfo.bank[i]; 290 - j++; 291 - } 292 - meminfo.nr_banks = j; 293 - } 294 - 295 - static inline void prepare_page_table(void) 296 - { 297 - unsigned long addr; 298 - phys_addr_t end; 299 - 300 - /* 301 - * Clear out all the mappings below the kernel image. 302 - */ 303 - for (addr = 0; addr < MODULES_VADDR; addr += PGDIR_SIZE) 304 - pmd_clear(pmd_off_k(addr)); 305 - 306 - for ( ; addr < PAGE_OFFSET; addr += PGDIR_SIZE) 307 - pmd_clear(pmd_off_k(addr)); 308 - 309 - /* 310 - * Find the end of the first block of lowmem. 311 - */ 312 - end = memblock.memory.regions[0].base + memblock.memory.regions[0].size; 313 - if (end >= lowmem_limit) 314 - end = lowmem_limit; 315 - 316 - /* 317 - * Clear out all the kernel space mappings, except for the first 318 - * memory bank, up to the end of the vmalloc region. 319 - */ 320 - for (addr = __phys_to_virt(end); 321 - addr < VMALLOC_END; addr += PGDIR_SIZE) 322 - pmd_clear(pmd_off_k(addr)); 323 - } 324 - 325 - /* 326 - * Reserve the special regions of memory 327 - */ 328 - void __init uc32_mm_memblock_reserve(void) 329 - { 330 - /* 331 - * Reserve the page tables. These are already in use, 332 - * and can only be in node 0. 333 - */ 334 - memblock_reserve(__pa(swapper_pg_dir), PTRS_PER_PGD * sizeof(pgd_t)); 335 - } 336 - 337 - /* 338 - * Set up device the mappings. Since we clear out the page tables for all 339 - * mappings above VMALLOC_END, we will remove any debug device mappings. 340 - * This means you have to be careful how you debug this function, or any 341 - * called function. This means you can't use any function or debugging 342 - * method which may touch any device, otherwise the kernel _will_ crash. 343 - */ 344 - static void __init devicemaps_init(void) 345 - { 346 - struct map_desc map; 347 - unsigned long addr; 348 - void *vectors; 349 - 350 - /* 351 - * Allocate the vector page early. 352 - */ 353 - vectors = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 354 - if (!vectors) 355 - panic("%s: Failed to allocate %lu bytes align=0x%lx\n", 356 - __func__, PAGE_SIZE, PAGE_SIZE); 357 - 358 - for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE) 359 - pmd_clear(pmd_off_k(addr)); 360 - 361 - /* 362 - * Create a mapping for the machine vectors at the high-vectors 363 - * location (0xffff0000). If we aren't using high-vectors, also 364 - * create a mapping at the low-vectors virtual address. 365 - */ 366 - map.pfn = __phys_to_pfn(virt_to_phys(vectors)); 367 - map.virtual = VECTORS_BASE; 368 - map.length = PAGE_SIZE; 369 - map.type = MT_HIGH_VECTORS; 370 - create_mapping(&map); 371 - 372 - /* 373 - * Create a mapping for the kuser page at the special 374 - * location (0xbfff0000) to the same vectors location. 375 - */ 376 - map.pfn = __phys_to_pfn(virt_to_phys(vectors)); 377 - map.virtual = KUSER_VECPAGE_BASE; 378 - map.length = PAGE_SIZE; 379 - map.type = MT_KUSER; 380 - create_mapping(&map); 381 - 382 - /* 383 - * Finally flush the caches and tlb to ensure that we're in a 384 - * consistent state wrt the writebuffer. This also ensures that 385 - * any write-allocated cache lines in the vector page are written 386 - * back. After this point, we can start to touch devices again. 387 - */ 388 - local_flush_tlb_all(); 389 - flush_cache_all(); 390 - } 391 - 392 - static void __init map_lowmem(void) 393 - { 394 - struct memblock_region *reg; 395 - 396 - /* Map all the lowmem memory banks. */ 397 - for_each_memblock(memory, reg) { 398 - phys_addr_t start = reg->base; 399 - phys_addr_t end = start + reg->size; 400 - struct map_desc map; 401 - 402 - if (end > lowmem_limit) 403 - end = lowmem_limit; 404 - if (start >= end) 405 - break; 406 - 407 - map.pfn = __phys_to_pfn(start); 408 - map.virtual = __phys_to_virt(start); 409 - map.length = end - start; 410 - map.type = MT_MEMORY; 411 - 412 - create_mapping(&map); 413 - } 414 - } 415 - 416 - /* 417 - * paging_init() sets up the page tables, initialises the zone memory 418 - * maps, and sets up the zero page, bad page and bad page tables. 419 - */ 420 - void __init paging_init(void) 421 - { 422 - void *zero_page; 423 - 424 - build_mem_type_table(); 425 - sanity_check_meminfo(); 426 - prepare_page_table(); 427 - map_lowmem(); 428 - devicemaps_init(); 429 - 430 - top_pmd = pmd_off_k(0xffff0000); 431 - 432 - /* allocate the zero page. */ 433 - zero_page = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 434 - if (!zero_page) 435 - panic("%s: Failed to allocate %lu bytes align=0x%lx\n", 436 - __func__, PAGE_SIZE, PAGE_SIZE); 437 - 438 - bootmem_init(); 439 - 440 - empty_zero_page = virt_to_page(zero_page); 441 - __flush_dcache_page(NULL, empty_zero_page); 442 - } 443 - 444 - /* 445 - * In order to soft-boot, we need to insert a 1:1 mapping in place of 446 - * the user-mode pages. This will then ensure that we have predictable 447 - * results when turning the mmu off 448 - */ 449 - void setup_mm_for_reboot(void) 450 - { 451 - unsigned long base_pmdval; 452 - pgd_t *pgd; 453 - int i; 454 - 455 - /* 456 - * We need to access to user-mode page tables here. For kernel threads 457 - * we don't have any user-mode mappings so we use the context that we 458 - * "borrowed". 459 - */ 460 - pgd = current->active_mm->pgd; 461 - 462 - base_pmdval = PMD_SECT_WRITE | PMD_SECT_READ | PMD_TYPE_SECT; 463 - 464 - for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++, pgd++) { 465 - unsigned long pmdval = (i << PGDIR_SHIFT) | base_pmdval; 466 - pmd_t *pmd; 467 - 468 - pmd = pmd_off(pgd, i << PGDIR_SHIFT); 469 - set_pmd(pmd, __pmd(pmdval)); 470 - flush_pmd_entry(pmd); 471 - } 472 - 473 - local_flush_tlb_all(); 474 - } 475 - 476 - /* 477 - * Take care of architecture specific things when placing a new PTE into 478 - * a page table, or changing an existing PTE. Basically, there are two 479 - * things that we need to take care of: 480 - * 481 - * 1. If PG_dcache_clean is not set for the page, we need to ensure 482 - * that any cache entries for the kernels virtual memory 483 - * range are written back to the page. 484 - * 2. If we have multiple shared mappings of the same space in 485 - * an object, we need to deal with the cache aliasing issues. 486 - * 487 - * Note that the pte lock will be held. 488 - */ 489 - void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, 490 - pte_t *ptep) 491 - { 492 - unsigned long pfn = pte_pfn(*ptep); 493 - struct address_space *mapping; 494 - struct page *page; 495 - 496 - if (!pfn_valid(pfn)) 497 - return; 498 - 499 - /* 500 - * The zero page is never written to, so never has any dirty 501 - * cache lines, and therefore never needs to be flushed. 502 - */ 503 - page = pfn_to_page(pfn); 504 - if (page == ZERO_PAGE(0)) 505 - return; 506 - 507 - mapping = page_mapping_file(page); 508 - if (!test_and_set_bit(PG_dcache_clean, &page->flags)) 509 - __flush_dcache_page(mapping, page); 510 - if (mapping) 511 - if (vma->vm_flags & VM_EXEC) 512 - __flush_icache_all(); 513 - }
-102
arch/unicore32/mm/pgd.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/mm/pgd.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/mm.h> 10 - #include <linux/gfp.h> 11 - #include <linux/highmem.h> 12 - 13 - #include <asm/pgalloc.h> 14 - #include <asm/page.h> 15 - #include <asm/tlbflush.h> 16 - 17 - #include "mm.h" 18 - 19 - #define FIRST_KERNEL_PGD_NR (FIRST_USER_PGD_NR + USER_PTRS_PER_PGD) 20 - 21 - /* 22 - * need to get a 4k page for level 1 23 - */ 24 - pgd_t *get_pgd_slow(struct mm_struct *mm) 25 - { 26 - pgd_t *new_pgd, *init_pgd; 27 - pmd_t *new_pmd, *init_pmd; 28 - pte_t *new_pte, *init_pte; 29 - 30 - new_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL, 0); 31 - if (!new_pgd) 32 - goto no_pgd; 33 - 34 - memset(new_pgd, 0, FIRST_KERNEL_PGD_NR * sizeof(pgd_t)); 35 - 36 - /* 37 - * Copy over the kernel and IO PGD entries 38 - */ 39 - init_pgd = pgd_offset_k(0); 40 - memcpy(new_pgd + FIRST_KERNEL_PGD_NR, init_pgd + FIRST_KERNEL_PGD_NR, 41 - (PTRS_PER_PGD - FIRST_KERNEL_PGD_NR) * sizeof(pgd_t)); 42 - 43 - clean_dcache_area(new_pgd, PTRS_PER_PGD * sizeof(pgd_t)); 44 - 45 - if (!vectors_high()) { 46 - /* 47 - * On UniCore, first page must always be allocated since it 48 - * contains the machine vectors. 49 - */ 50 - new_pmd = pmd_alloc(mm, (pud_t *)new_pgd, 0); 51 - if (!new_pmd) 52 - goto no_pmd; 53 - 54 - new_pte = pte_alloc_map(mm, new_pmd, 0); 55 - if (!new_pte) 56 - goto no_pte; 57 - 58 - init_pmd = pmd_offset((pud_t *)init_pgd, 0); 59 - init_pte = pte_offset_map(init_pmd, 0); 60 - set_pte(new_pte, *init_pte); 61 - pte_unmap(init_pte); 62 - pte_unmap(new_pte); 63 - } 64 - 65 - return new_pgd; 66 - 67 - no_pte: 68 - pmd_free(mm, new_pmd); 69 - mm_dec_nr_pmds(mm); 70 - no_pmd: 71 - free_pages((unsigned long)new_pgd, 0); 72 - no_pgd: 73 - return NULL; 74 - } 75 - 76 - void free_pgd_slow(struct mm_struct *mm, pgd_t *pgd) 77 - { 78 - pmd_t *pmd; 79 - pgtable_t pte; 80 - 81 - if (!pgd) 82 - return; 83 - 84 - /* pgd is always present and good */ 85 - pmd = pmd_off(pgd, 0); 86 - if (pmd_none(*pmd)) 87 - goto free; 88 - if (pmd_bad(*pmd)) { 89 - pmd_ERROR(*pmd); 90 - pmd_clear(pmd); 91 - goto free; 92 - } 93 - 94 - pte = pmd_pgtable(*pmd); 95 - pmd_clear(pmd); 96 - pte_free(mm, pte); 97 - mm_dec_nr_ptes(mm); 98 - pmd_free(mm, pmd); 99 - mm_dec_nr_pmds(mm); 100 - free: 101 - free_pages((unsigned long) pgd, 0); 102 - }
-142
arch/unicore32/mm/proc-macros.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/mm/proc-macros.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - * 9 - * We need constants.h for: 10 - * VMA_VM_MM 11 - * VMA_VM_FLAGS 12 - * VM_EXEC 13 - */ 14 - #include <generated/asm-offsets.h> 15 - #include <asm/thread_info.h> 16 - #include <asm/memory.h> 17 - 18 - /* 19 - * the cache line sizes of the I and D cache are the same 20 - */ 21 - #define CACHE_LINESIZE 32 22 - 23 - /* 24 - * This is the maximum size of an area which will be invalidated 25 - * using the single invalidate entry instructions. Anything larger 26 - * than this, and we go for the whole cache. 27 - * 28 - * This value should be chosen such that we choose the cheapest 29 - * alternative. 30 - */ 31 - #ifdef CONFIG_CPU_UCV2 32 - #define MAX_AREA_SIZE 0x800 /* 64 cache line */ 33 - #endif 34 - 35 - /* 36 - * vma_vm_mm - get mm pointer from vma pointer (vma->vm_mm) 37 - */ 38 - .macro vma_vm_mm, rd, rn 39 - ldw \rd, [\rn+], #VMA_VM_MM 40 - .endm 41 - 42 - /* 43 - * vma_vm_flags - get vma->vm_flags 44 - */ 45 - .macro vma_vm_flags, rd, rn 46 - ldw \rd, [\rn+], #VMA_VM_FLAGS 47 - .endm 48 - 49 - .macro tsk_mm, rd, rn 50 - ldw \rd, [\rn+], #TI_TASK 51 - ldw \rd, [\rd+], #TSK_ACTIVE_MM 52 - .endm 53 - 54 - /* 55 - * act_mm - get current->active_mm 56 - */ 57 - .macro act_mm, rd 58 - andn \rd, sp, #8128 59 - andn \rd, \rd, #63 60 - ldw \rd, [\rd+], #TI_TASK 61 - ldw \rd, [\rd+], #TSK_ACTIVE_MM 62 - .endm 63 - 64 - /* 65 - * mmid - get context id from mm pointer (mm->context.id) 66 - */ 67 - .macro mmid, rd, rn 68 - ldw \rd, [\rn+], #MM_CONTEXT_ID 69 - .endm 70 - 71 - /* 72 - * mask_asid - mask the ASID from the context ID 73 - */ 74 - .macro asid, rd, rn 75 - and \rd, \rn, #255 76 - .endm 77 - 78 - .macro crval, clear, mmuset, ucset 79 - .word \clear 80 - .word \mmuset 81 - .endm 82 - 83 - #ifndef CONFIG_CPU_DCACHE_LINE_DISABLE 84 - /* 85 - * va2pa va, pa, tbl, msk, off, err 86 - * This macro is used to translate virtual address to its physical address. 87 - * 88 - * va: virtual address 89 - * pa: physical address, result is stored in this register 90 - * tbl, msk, off: temp registers, will be destroyed 91 - * err: jump to error label if the physical address not exist 92 - * NOTE: all regs must be different 93 - */ 94 - .macro va2pa, va, pa, tbl, msk, off, err=990f 95 - movc \pa, p0.c2, #0 96 - mov \off, \va >> #22 @ off <- index of 1st page table 97 - adr \tbl, 910f @ tbl <- table of 1st page table 98 - 900: @ ---- handle 1, 2 page table 99 - add \pa, \pa, #PAGE_OFFSET @ pa <- virt addr of page table 100 - ldw \pa, [\pa+], \off << #2 @ pa <- the content of pt 101 - cand.a \pa, #4 @ test exist bit 102 - beq \err @ if not exist 103 - and \off, \pa, #3 @ off <- the last 2 bits 104 - add \tbl, \tbl, \off << #3 @ cmove table pointer 105 - ldw \msk, [\tbl+], #0 @ get the mask 106 - ldw pc, [\tbl+], #4 107 - 930: @ ---- handle 2nd page table 108 - and \pa, \pa, \msk @ pa <- phys addr of 2nd pt 109 - mov \off, \va << #10 110 - cntlo \tbl, \msk @ use tbl as temp reg 111 - mov \off, \off >> \tbl 112 - mov \off, \off >> #2 @ off <- index of 2nd pt 113 - adr \tbl, 920f @ tbl <- table of 2nd pt 114 - b 900b 115 - 910: @ 1st level page table 116 - .word 0xfffff000, 930b @ second level page table 117 - .word 0xfffffc00, 930b @ second level large page table 118 - .word 0x00000000, \err @ invalid 119 - .word 0xffc00000, 980f @ super page 120 - 121 - 920: @ 2nd level page table 122 - .word 0xfffff000, 980f @ page 123 - .word 0xffffc000, 980f @ middle page 124 - .word 0xffff0000, 980f @ large page 125 - .word 0x00000000, \err @ invalid 126 - 980: 127 - andn \tbl, \va, \msk 128 - and \pa, \pa, \msk 129 - or \pa, \pa, \tbl 130 - 990: 131 - .endm 132 - #endif 133 - 134 - .macro dcacheline_flush, addr, t1, t2 135 - mov \t1, \addr << #20 136 - ldw \t2, =_stext @ _stext must ALIGN(4096) 137 - add \t2, \t2, \t1 >> #20 138 - ldw \t1, [\t2+], #0x0000 139 - ldw \t1, [\t2+], #0x1000 140 - ldw \t1, [\t2+], #0x2000 141 - ldw \t1, [\t2+], #0x3000 142 - .endm
-19
arch/unicore32/mm/proc-syms.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * linux/arch/unicore32/mm/proc-syms.c 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/module.h> 10 - #include <linux/mm.h> 11 - 12 - #include <asm/cacheflush.h> 13 - #include <asm/tlbflush.h> 14 - #include <asm/page.h> 15 - 16 - EXPORT_SYMBOL(cpu_dcache_clean_area); 17 - EXPORT_SYMBOL(cpu_set_pte); 18 - 19 - EXPORT_SYMBOL(__cpuc_coherent_kern_range);
-131
arch/unicore32/mm/proc-ucv2.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/mm/proc-ucv2.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/init.h> 10 - #include <linux/linkage.h> 11 - #include <linux/pgtable.h> 12 - #include <asm/assembler.h> 13 - #include <asm/hwcap.h> 14 - #include <asm/pgtable-hwdef.h> 15 - 16 - #include "proc-macros.S" 17 - 18 - ENTRY(cpu_proc_fin) 19 - stm.w (lr), [sp-] 20 - mov ip, #PSR_R_BIT | PSR_I_BIT | PRIV_MODE 21 - mov.a asr, ip 22 - b.l __cpuc_flush_kern_all 23 - ldm.w (pc), [sp]+ 24 - 25 - /* 26 - * cpu_reset(loc) 27 - * 28 - * Perform a soft reset of the system. Put the CPU into the 29 - * same state as it would be if it had been reset, and branch 30 - * to what would be the reset vector. 31 - * 32 - * - loc - location to jump to for soft reset 33 - */ 34 - .align 5 35 - ENTRY(cpu_reset) 36 - mov ip, #0 37 - movc p0.c5, ip, #28 @ Cache invalidate all 38 - nop8 39 - 40 - movc p0.c6, ip, #6 @ TLB invalidate all 41 - nop8 42 - 43 - movc ip, p0.c1, #0 @ ctrl register 44 - or ip, ip, #0x2000 @ vector base address 45 - andn ip, ip, #0x000f @ ............idam 46 - movc p0.c1, ip, #0 @ disable caches and mmu 47 - nop 48 - mov pc, r0 @ jump to loc 49 - nop8 50 - 51 - /* 52 - * cpu_do_idle() 53 - * 54 - * Idle the processor (eg, wait for interrupt). 55 - * 56 - * IRQs are already disabled. 57 - */ 58 - ENTRY(cpu_do_idle) 59 - mov r0, #0 @ PCI address 60 - .rept 8 61 - ldw r1, [r0] 62 - .endr 63 - mov pc, lr 64 - 65 - ENTRY(cpu_dcache_clean_area) 66 - #ifndef CONFIG_CPU_DCACHE_LINE_DISABLE 67 - csub.a r1, #MAX_AREA_SIZE 68 - bsg 101f 69 - mov r9, #PAGE_SZ 70 - sub r9, r9, #1 @ PAGE_MASK 71 - 1: va2pa r0, r10, r11, r12, r13 @ r10 is PA 72 - b 3f 73 - 2: cand.a r0, r9 74 - beq 1b 75 - 3: movc p0.c5, r10, #11 @ clean D entry 76 - nop8 77 - add r0, r0, #CACHE_LINESIZE 78 - add r10, r10, #CACHE_LINESIZE 79 - sub.a r1, r1, #CACHE_LINESIZE 80 - bua 2b 81 - mov pc, lr 82 - #endif 83 - 101: mov ip, #0 84 - movc p0.c5, ip, #10 @ Dcache clean all 85 - nop8 86 - 87 - mov pc, lr 88 - 89 - /* 90 - * cpu_do_switch_mm(pgd_phys) 91 - * 92 - * Set the translation table base pointer to be pgd_phys 93 - * 94 - * - pgd_phys - physical address of new pgd 95 - * 96 - * It is assumed that: 97 - * - we are not using split page tables 98 - */ 99 - .align 5 100 - ENTRY(cpu_do_switch_mm) 101 - movc p0.c2, r0, #0 @ update page table ptr 102 - nop8 103 - 104 - movc p0.c6, ip, #6 @ TLB invalidate all 105 - nop8 106 - 107 - mov pc, lr 108 - 109 - /* 110 - * cpu_set_pte(ptep, pte) 111 - * 112 - * Set a level 2 translation table entry. 113 - * 114 - * - ptep - pointer to level 2 translation table entry 115 - * - pte - PTE value to store 116 - */ 117 - .align 5 118 - ENTRY(cpu_set_pte) 119 - stw r1, [r0] 120 - #ifndef CONFIG_CPU_DCACHE_LINE_DISABLE 121 - sub r2, r0, #PAGE_OFFSET 122 - movc p0.c5, r2, #11 @ Dcache clean line 123 - nop8 124 - #else 125 - mov ip, #0 126 - movc p0.c5, ip, #10 @ Dcache clean all 127 - nop8 128 - @dcacheline_flush r0, r2, ip 129 - #endif 130 - mov pc, lr 131 -
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arch/unicore32/mm/tlb-ucv2.S
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * linux/arch/unicore32/mm/tlb-ucv2.S 4 - * 5 - * Code specific to PKUnity SoC and UniCore ISA 6 - * 7 - * Copyright (C) 2001-2010 GUAN Xue-tao 8 - */ 9 - #include <linux/init.h> 10 - #include <linux/linkage.h> 11 - #include <asm/assembler.h> 12 - #include <asm/page.h> 13 - #include <asm/tlbflush.h> 14 - #include "proc-macros.S" 15 - 16 - /* 17 - * __cpu_flush_user_tlb_range(start, end, vma) 18 - * 19 - * Invalidate a range of TLB entries in the specified address space. 20 - * 21 - * - start - start address (may not be aligned) 22 - * - end - end address (exclusive, may not be aligned) 23 - * - vma - vma_struct describing address range 24 - */ 25 - ENTRY(__cpu_flush_user_tlb_range) 26 - #ifndef CONFIG_CPU_TLB_SINGLE_ENTRY_DISABLE 27 - mov r0, r0 >> #PAGE_SHIFT @ align address 28 - mov r0, r0 << #PAGE_SHIFT 29 - vma_vm_flags r2, r2 @ get vma->vm_flags 30 - 1: 31 - movc p0.c6, r0, #3 32 - nop8 33 - 34 - cand.a r2, #VM_EXEC @ Executable area ? 35 - beq 2f 36 - 37 - movc p0.c6, r0, #5 38 - nop8 39 - 2: 40 - add r0, r0, #PAGE_SZ 41 - csub.a r0, r1 42 - beb 1b 43 - #else 44 - movc p0.c6, r0, #2 45 - nop8 46 - 47 - cand.a r2, #VM_EXEC @ Executable area ? 48 - beq 2f 49 - 50 - movc p0.c6, r0, #4 51 - nop8 52 - 2: 53 - #endif 54 - mov pc, lr 55 - 56 - /* 57 - * __cpu_flush_kern_tlb_range(start,end) 58 - * 59 - * Invalidate a range of kernel TLB entries 60 - * 61 - * - start - start address (may not be aligned) 62 - * - end - end address (exclusive, may not be aligned) 63 - */ 64 - ENTRY(__cpu_flush_kern_tlb_range) 65 - #ifndef CONFIG_CPU_TLB_SINGLE_ENTRY_DISABLE 66 - mov r0, r0 >> #PAGE_SHIFT @ align address 67 - mov r0, r0 << #PAGE_SHIFT 68 - 1: 69 - movc p0.c6, r0, #3 70 - nop8 71 - 72 - movc p0.c6, r0, #5 73 - nop8 74 - 75 - add r0, r0, #PAGE_SZ 76 - csub.a r0, r1 77 - beb 1b 78 - #else 79 - movc p0.c6, r0, #2 80 - nop8 81 - 82 - movc p0.c6, r0, #4 83 - nop8 84 - #endif 85 - mov pc, lr 86 -
+1 -1
kernel/reboot.c
··· 26 26 struct pid *cad_pid; 27 27 EXPORT_SYMBOL(cad_pid); 28 28 29 - #if defined(CONFIG_ARM) || defined(CONFIG_UNICORE32) 29 + #if defined(CONFIG_ARM) 30 30 #define DEFAULT_REBOOT_MODE = REBOOT_HARD 31 31 #else 32 32 #define DEFAULT_REBOOT_MODE