dt-bindings: clock: rockchip: remove CLK_NR_CLKS and CLKPMU_NR_CLKS

CLK_NR_CLKS and CLKPMU_NR_CLKS should not be part of the binding.
Remove since the kernel code no longer uses it.

Signed-off-by: Johan Jonker <[e-mail]>
Acked-by: Conor Dooley <[e-mail]>
Link: https://lore.kernel.org/r/[e-mail]
Signed-off-by: Heiko Stuebner <[e-mail]>

include/dt-bindings/clock/px30-cru.h

···
 #define PCLK_CIF		352
 #define PCLK_OTP_PHY		353
 
-#define CLK_NR_CLKS		(PCLK_OTP_PHY + 1)
-
 /* pmu-clocks indices */
 
 #define PLL_GPLL		1
···
 
 #define PCLK_GPIO0_PMU		20
 #define PCLK_UART0_PMU		21
-
-#define CLKPMU_NR_CLKS		(PCLK_UART0_PMU + 1)
 
 /* soft-reset indices */
 #define SRST_CORE0_PO		0

include/dt-bindings/clock/rk3036-cru.h

···
 #define HCLK_CPU		477
 #define HCLK_PERI		478
 
-#define CLK_NR_CLKS		(HCLK_PERI + 1)
-
 /* soft-reset indices */
 #define SRST_CORE0		0
 #define SRST_CORE1		1

include/dt-bindings/clock/rk3228-cru.h

···
 #define HCLK_S_CRYPTO		477
 #define HCLK_PERI		478
 
-#define CLK_NR_CLKS		(HCLK_PERI + 1)
-
 /* soft-reset indices */
 #define SRST_CORE0_PO		0
 #define SRST_CORE1_PO		1

include/dt-bindings/clock/rk3288-cru.h

···
 #define HCLK_CPU		477
 #define HCLK_PERI		478
 
-#define CLK_NR_CLKS		(HCLK_PERI + 1)
-
 /* soft-reset indices */
 #define SRST_CORE0		0
 #define SRST_CORE1		1

include/dt-bindings/clock/rk3308-cru.h

···
 #define PCLK_CAN		233
 #define PCLK_OWIRE		234
 
-#define CLK_NR_CLKS		(PCLK_OWIRE + 1)
-
 /* soft-reset indices */
 
 /* cru_softrst_con0 */

include/dt-bindings/clock/rk3328-cru.h

···
 #define HCLK_RGA		340
 #define HCLK_HDCP		341
 
-#define CLK_NR_CLKS		(HCLK_HDCP + 1)
-
 /* soft-reset indices */
 #define SRST_CORE0_PO		0
 #define SRST_CORE1_PO		1

include/dt-bindings/clock/rk3368-cru.h

···
 #define HCLK_BUS		477
 #define HCLK_PERI		478
 
-#define CLK_NR_CLKS		(HCLK_PERI + 1)
-
 /* soft-reset indices */
 #define SRST_CORE_B0		0
 #define SRST_CORE_B1		1

include/dt-bindings/clock/rk3399-cru.h

···
 #define HCLK_SDIO_NOC			495
 #define HCLK_SDIOAUDIO_NOC		496
 
-#define CLK_NR_CLKS			(HCLK_SDIOAUDIO_NOC + 1)
-
 /* pmu-clocks indices */
 
 #define PLL_PPLL			1
···
 #define DCLK_CM0S_PMU			48
 #define PCLK_INTR_ARB_PMU		49
 #define HCLK_NOC_PMU			50
-
-#define CLKPMU_NR_CLKS			(HCLK_NOC_PMU + 1)
 
 /* soft-reset indices */