PCI: collapse pcibios_resource_to_bus · tjh.dev/kernel@fb127cb

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arch/alpha/include/asm/pci.h

··· 100 100 return channel ? 15 : 14; 101 101 } 102 102 103 - #define ARCH_HAS_GENERIC_PCI_OFFSETS 104 - 105 103 #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index 106 104 107 105 static inline int pci_proc_domain(struct pci_bus *bus)

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arch/arm/include/asm/pci.h

··· 57 57 extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 58 58 enum pci_mmap_state mmap_state, int write_combine); 59 59 60 - #define ARCH_HAS_GENERIC_PCI_OFFSETS 61 - 62 60 /* 63 61 * Dummy implementation; always return 0. 64 62 */

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arch/ia64/include/asm/pci.h

··· 108 108 return (pci_domain_nr(bus) != 0); 109 109 } 110 110 111 - #define ARCH_HAS_GENERIC_PCI_OFFSETS 112 - 113 111 static inline struct resource * 114 112 pcibios_select_root(struct pci_dev *pdev, struct resource *res) 115 113 {

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arch/microblaze/include/asm/pci.h

··· 94 94 */ 95 95 #define PCI_DMA_BUS_IS_PHYS (1) 96 96 97 - #define ARCH_HAS_GENERIC_PCI_OFFSETS 98 - 99 97 static inline struct resource *pcibios_select_root(struct pci_dev *pdev, 100 98 struct resource *res) 101 99 {

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arch/mips/include/asm/pci.h

··· 113 113 } 114 114 #endif 115 115 116 - #define ARCH_HAS_GENERIC_PCI_OFFSETS 117 - 118 116 #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index 119 117 120 118 static inline int pci_proc_domain(struct pci_bus *bus)

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arch/mn10300/include/asm/pci.h

··· 85 85 /* implement the pci_ DMA API in terms of the generic device dma_ one */ 86 86 #include <asm-generic/pci-dma-compat.h> 87 87 88 - #define ARCH_HAS_GENERIC_PCI_OFFSETS 89 - 90 88 static inline struct resource * 91 89 pcibios_select_root(struct pci_dev *pdev, struct resource *res) 92 90 {

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arch/parisc/include/asm/pci.h

··· 215 215 } 216 216 #endif 217 217 218 - #define ARCH_HAS_GENERIC_PCI_OFFSETS 219 - 220 218 static inline void pcibios_penalize_isa_irq(int irq, int active) 221 219 { 222 220 /* We don't need to penalize isa irq's */

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arch/powerpc/include/asm/pci.h

··· 154 154 155 155 #endif /* CONFIG_PPC64 */ 156 156 157 - #define ARCH_HAS_GENERIC_PCI_OFFSETS 158 - 159 157 extern void pcibios_claim_one_bus(struct pci_bus *b); 160 158 161 159 extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);

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arch/sh/include/asm/pci.h

··· 114 114 /* Board-specific fixup routines. */ 115 115 int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin); 116 116 117 - #define ARCH_HAS_GENERIC_PCI_OFFSETS 118 - 119 117 #define pci_domain_nr(bus) ((struct pci_channel *)(bus)->sysdata)->index 120 118 121 119 static inline int pci_proc_domain(struct pci_bus *bus)

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arch/sparc/include/asm/pci_32.h

··· 52 52 * 64Kbytes by the Host controller. 53 53 */ 54 54 55 - #define ARCH_HAS_GENERIC_PCI_OFFSETS 56 - 57 55 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 58 56 { 59 57 return PCI_IRQ_NONE;

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arch/sparc/include/asm/pci_64.h

··· 73 73 enum pci_mmap_state mmap_state, 74 74 int write_combine); 75 75 76 - #define ARCH_HAS_GENERIC_PCI_OFFSETS 77 - 78 76 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 79 77 { 80 78 return PCI_IRQ_NONE;

+15 -29

drivers/pci/probe.c

··· 66 66 return res1->start <= res2->start && res1->end >= res2->end; 67 67 } 68 68 69 - void pci_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, 70 - struct resource *res) 69 + void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, 70 + struct resource *res) 71 71 { 72 72 struct pci_host_bridge *bridge = pci_host_bridge(dev); 73 73 struct pci_host_bridge_window *window; ··· 86 86 region->start = res->start - offset; 87 87 region->end = res->end - offset; 88 88 } 89 + EXPORT_SYMBOL(pcibios_resource_to_bus); 89 90 90 91 static bool region_contains(struct pci_bus_region *region1, 91 92 struct pci_bus_region *region2) ··· 94 93 return region1->start <= region2->start && region1->end >= region2->end; 95 94 } 96 95 97 - void pci_bus_to_resource(struct pci_dev *dev, struct resource *res, 98 - struct pci_bus_region *region) 96 + void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, 97 + struct pci_bus_region *region) 99 98 { 100 99 struct pci_host_bridge *bridge = pci_host_bridge(dev); 101 100 struct pci_host_bridge_window *window; ··· 118 117 res->start = region->start + offset; 119 118 res->end = region->end + offset; 120 119 } 121 - 122 - #ifdef ARCH_HAS_GENERIC_PCI_OFFSETS 123 - void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, 124 - struct resource *res) 125 - { 126 - pci_resource_to_bus(dev, region, res); 127 - } 128 - EXPORT_SYMBOL(pcibios_resource_to_bus); 129 - 130 - void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, 131 - struct pci_bus_region *region) 132 - { 133 - pci_bus_to_resource(dev, res, region); 134 - } 135 120 EXPORT_SYMBOL(pcibios_bus_to_resource); 136 - #endif 137 121 138 122 /* 139 123 * PCI Bus Class ··· 295 309 pci_write_config_dword(dev, pos + 4, 0); 296 310 region.start = 0; 297 311 region.end = sz64; 298 - pci_bus_to_resource(dev, res, &region); 312 + pcibios_bus_to_resource(dev, res, &region); 299 313 } else { 300 314 region.start = l64; 301 315 region.end = l64 + sz64; 302 - pci_bus_to_resource(dev, res, &region); 316 + pcibios_bus_to_resource(dev, res, &region); 303 317 dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", 304 318 pos, res); 305 319 } ··· 311 325 312 326 region.start = l; 313 327 region.end = l + sz; 314 - pci_bus_to_resource(dev, res, &region); 328 + pcibios_bus_to_resource(dev, res, &region); 315 329 316 330 dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res); 317 331 } ··· 369 383 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO; 370 384 region.start = base; 371 385 region.end = limit + 0xfff; 372 - pci_bus_to_resource(dev, &res2, &region); 386 + pcibios_bus_to_resource(dev, &res2, &region); 373 387 if (!res->start) 374 388 res->start = res2.start; 375 389 if (!res->end) ··· 395 409 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM; 396 410 region.start = base; 397 411 region.end = limit + 0xfffff; 398 - pci_bus_to_resource(dev, res, &region); 412 + pcibios_bus_to_resource(dev, res, &region); 399 413 dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res); 400 414 } 401 415 } ··· 444 458 res->flags |= IORESOURCE_MEM_64; 445 459 region.start = base; 446 460 region.end = limit + 0xfffff; 447 - pci_bus_to_resource(dev, res, &region); 461 + pcibios_bus_to_resource(dev, res, &region); 448 462 dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res); 449 463 } 450 464 } ··· 1057 1071 region.end = 0x1F7; 1058 1072 res = &dev->resource[0]; 1059 1073 res->flags = LEGACY_IO_RESOURCE; 1060 - pci_bus_to_resource(dev, res, &region); 1074 + pcibios_bus_to_resource(dev, res, &region); 1061 1075 region.start = 0x3F6; 1062 1076 region.end = 0x3F6; 1063 1077 res = &dev->resource[1]; 1064 1078 res->flags = LEGACY_IO_RESOURCE; 1065 - pci_bus_to_resource(dev, res, &region); 1079 + pcibios_bus_to_resource(dev, res, &region); 1066 1080 } 1067 1081 if ((progif & 4) == 0) { 1068 1082 region.start = 0x170; 1069 1083 region.end = 0x177; 1070 1084 res = &dev->resource[2]; 1071 1085 res->flags = LEGACY_IO_RESOURCE; 1072 - pci_bus_to_resource(dev, res, &region); 1086 + pcibios_bus_to_resource(dev, res, &region); 1073 1087 region.start = 0x376; 1074 1088 region.end = 0x376; 1075 1089 res = &dev->resource[3]; 1076 1090 res->flags = LEGACY_IO_RESOURCE; 1077 - pci_bus_to_resource(dev, res, &region); 1091 + pcibios_bus_to_resource(dev, res, &region); 1078 1092 } 1079 1093 } 1080 1094 break;

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include/asm-generic/pci.h

··· 6 6 #ifndef _ASM_GENERIC_PCI_H 7 7 #define _ASM_GENERIC_PCI_H 8 8 9 - #define ARCH_HAS_GENERIC_PCI_OFFSETS 10 - 11 9 static inline struct resource * 12 10 pcibios_select_root(struct pci_dev *pdev, struct resource *res) 13 11 {