tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
ARM: dts: nspire: use lower case hex addresses in node unit addresses
Convert all hex addresses in node unit addresses to lower case to fix
dt_binding_check and dtc W=1 warnings.
Conversion was done using sed:
$ sed -e 's/@\([a-zA-Z0-9_-]*\) {/@\L\1 {/' -i arch/arm/boot/dts/nspire*
$ sed -e 's/<0x\([a-zA-Z0-9_-]*\) /<0x\L\1 /g' -i arch/arm/boot/dts/nspire*
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220317115542.450032-2-krzysztof.kozlowski@canonical.com
+37
-37
+5
-5
arch/arm/boot/dts/nspire-classic.dtsi
+5
-5
arch/arm/boot/dts/nspire-classic.dtsi
···
17
17
18
18
&fast_timer {
19
19
/* compatible = "lsi,zevio-timer"; */
20
-
reg = <0x90010000 0x1000>, <0x900A0010 0x8>;
20
+
reg = <0x90010000 0x1000>, <0x900a0010 0x8>;
21
21
};
22
22
23
23
&uart {
···
30
30
31
31
&timer0 {
32
32
/* compatible = "lsi,zevio-timer"; */
33
-
reg = <0x900C0000 0x1000>, <0x900A0018 0x8>;
33
+
reg = <0x900c0000 0x1000>, <0x900a0018 0x8>;
34
34
};
35
35
36
36
&timer1 {
37
37
compatible = "lsi,zevio-timer";
38
-
reg = <0x900D0000 0x1000>, <0x900A0020 0x8>;
38
+
reg = <0x900d0000 0x1000>, <0x900a0020 0x8>;
39
39
};
40
40
41
41
&keypad {
···
66
66
#address-cells = <1>;
67
67
#size-cells = <1>;
68
68
69
-
intc: interrupt-controller@DC000000 {
69
+
intc: interrupt-controller@dc000000 {
70
70
compatible = "lsi,zevio-intc";
71
71
interrupt-controller;
72
-
reg = <0xDC000000 0x1000>;
72
+
reg = <0xdc000000 0x1000>;
73
73
#interrupt-cells = <1>;
74
74
};
75
75
};
+2
-2
arch/arm/boot/dts/nspire-cx.dts
+2
-2
arch/arm/boot/dts/nspire-cx.dts
···
92
92
#address-cells = <1>;
93
93
#size-cells = <1>;
94
94
95
-
intc: interrupt-controller@DC000000 {
95
+
intc: interrupt-controller@dc000000 {
96
96
compatible = "arm,pl190-vic";
97
97
interrupt-controller;
98
-
reg = <0xDC000000 0x1000>;
98
+
reg = <0xdc000000 0x1000>;
99
99
#interrupt-cells = <1>;
100
100
};
101
101
+30
-30
arch/arm/boot/dts/nspire.dtsi
+30
-30
arch/arm/boot/dts/nspire.dtsi
···
20
20
reg = <0x00000000 0x80000>;
21
21
};
22
22
23
-
sram: sram@A4000000 {
23
+
sram: sram@a4000000 {
24
24
device = "memory";
25
-
reg = <0xA4000000 0x20000>;
25
+
reg = <0xa4000000 0x20000>;
26
26
};
27
27
28
28
timer_clk: timer_clk {
···
33
33
34
34
base_clk: base_clk {
35
35
#clock-cells = <0>;
36
-
reg = <0x900B0024 0x4>;
36
+
reg = <0x900b0024 0x4>;
37
37
};
38
38
39
39
ahb_clk: ahb_clk {
40
40
#clock-cells = <0>;
41
-
reg = <0x900B0024 0x4>;
41
+
reg = <0x900b0024 0x4>;
42
42
clocks = <&base_clk>;
43
43
};
44
44
···
71
71
#size-cells = <1>;
72
72
ranges;
73
73
74
-
spi: spi@A9000000 {
75
-
reg = <0xA9000000 0x1000>;
74
+
spi: spi@a9000000 {
75
+
reg = <0xa9000000 0x1000>;
76
76
};
77
77
78
-
usb0: usb@B0000000 {
78
+
usb0: usb@b0000000 {
79
79
compatible = "lsi,zevio-usb";
80
-
reg = <0xB0000000 0x1000>;
80
+
reg = <0xb0000000 0x1000>;
81
81
interrupts = <8>;
82
82
83
83
usb-phy = <&usb_phy>;
84
84
vbus-supply = <&vbus_reg>;
85
85
};
86
86
87
-
usb1: usb@B4000000 {
88
-
reg = <0xB4000000 0x1000>;
87
+
usb1: usb@b4000000 {
88
+
reg = <0xb4000000 0x1000>;
89
89
interrupts = <9>;
90
90
status = "disabled";
91
91
};
92
92
93
-
lcd: lcd@C0000000 {
93
+
lcd: lcd@c0000000 {
94
94
compatible = "arm,pl111", "arm,primecell";
95
-
reg = <0xC0000000 0x1000>;
95
+
reg = <0xc0000000 0x1000>;
96
96
interrupts = <21>;
97
97
98
98
/*
···
105
105
clock-names = "clcdclk", "apb_pclk";
106
106
};
107
107
108
-
adc: adc@C4000000 {
109
-
reg = <0xC4000000 0x1000>;
108
+
adc: adc@c4000000 {
109
+
reg = <0xc4000000 0x1000>;
110
110
interrupts = <11>;
111
111
};
112
112
113
-
tdes: crypto@C8010000 {
114
-
reg = <0xC8010000 0x1000>;
113
+
tdes: crypto@c8010000 {
114
+
reg = <0xc8010000 0x1000>;
115
115
};
116
116
117
-
sha256: crypto@CC000000 {
118
-
reg = <0xCC000000 0x1000>;
117
+
sha256: crypto@cc000000 {
118
+
reg = <0xcc000000 0x1000>;
119
119
};
120
120
121
121
apb@90000000 {
···
143
143
interrupts = <1>;
144
144
};
145
145
146
-
timer0: timer@900C0000 {
147
-
reg = <0x900C0000 0x1000>;
146
+
timer0: timer@900c0000 {
147
+
reg = <0x900c0000 0x1000>;
148
148
clocks = <&timer_clk>, <&timer_clk>,
149
149
<&timer_clk>;
150
150
clock-names = "timer0clk", "timer1clk",
151
151
"apb_pclk";
152
152
};
153
153
154
-
timer1: timer@900D0000 {
155
-
reg = <0x900D0000 0x1000>;
154
+
timer1: timer@900d0000 {
155
+
reg = <0x900d0000 0x1000>;
156
156
interrupts = <19>;
157
157
clocks = <&timer_clk>, <&timer_clk>,
158
158
<&timer_clk>;
···
171
171
interrupts = <4>;
172
172
};
173
173
174
-
misc: misc@900A0000 {
175
-
reg = <0x900A0000 0x1000>;
174
+
misc: misc@900a0000 {
175
+
reg = <0x900a0000 0x1000>;
176
176
};
177
177
178
-
pwr: pwr@900B0000 {
179
-
reg = <0x900B0000 0x1000>;
178
+
pwr: pwr@900b0000 {
179
+
reg = <0x900b0000 0x1000>;
180
180
interrupts = <15>;
181
181
};
182
182
183
-
keypad: input@900E0000 {
183
+
keypad: input@900e0000 {
184
184
compatible = "ti,nspire-keypad";
185
-
reg = <0x900E0000 0x1000>;
185
+
reg = <0x900e0000 0x1000>;
186
186
interrupts = <16>;
187
187
188
188
scan-interval = <1000>;
···
191
191
clocks = <&apb_pclk>;
192
192
};
193
193
194
-
contrast: contrast@900F0000 {
195
-
reg = <0x900F0000 0x1000>;
194
+
contrast: contrast@900f0000 {
195
+
reg = <0x900f0000 0x1000>;
196
196
};
197
197
198
198
led: led@90110000 {