Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: xgene: convert from round_rate() to determine_rate()

The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Signed-off-by: Brian Masney <bmasney@redhat.com>

+24 -17
+24 -17
drivers/clk/clk-xgene.c
··· 271 271 return ret; 272 272 } 273 273 274 - static long xgene_clk_pmd_round_rate(struct clk_hw *hw, unsigned long rate, 275 - unsigned long *parent_rate) 274 + static int xgene_clk_pmd_determine_rate(struct clk_hw *hw, 275 + struct clk_rate_request *req) 276 276 { 277 277 struct xgene_clk_pmd *fd = to_xgene_clk_pmd(hw); 278 278 u64 ret, scale; 279 279 280 - if (!rate || rate >= *parent_rate) 281 - return *parent_rate; 280 + if (!req->rate || req->rate >= req->best_parent_rate) { 281 + req->rate = req->best_parent_rate; 282 + 283 + return 0; 284 + } 282 285 283 286 /* freq = parent_rate * scaler / denom */ 284 - ret = rate * fd->denom; 285 - scale = DIV_ROUND_UP_ULL(ret, *parent_rate); 287 + ret = req->rate * fd->denom; 288 + scale = DIV_ROUND_UP_ULL(ret, req->best_parent_rate); 286 289 287 - ret = (u64)*parent_rate * scale; 290 + ret = (u64)req->best_parent_rate * scale; 288 291 do_div(ret, fd->denom); 289 292 290 - return ret; 293 + req->rate = ret; 294 + 295 + return 0; 291 296 } 292 297 293 298 static int xgene_clk_pmd_set_rate(struct clk_hw *hw, unsigned long rate, ··· 338 333 339 334 static const struct clk_ops xgene_clk_pmd_ops = { 340 335 .recalc_rate = xgene_clk_pmd_recalc_rate, 341 - .round_rate = xgene_clk_pmd_round_rate, 336 + .determine_rate = xgene_clk_pmd_determine_rate, 342 337 .set_rate = xgene_clk_pmd_set_rate, 343 338 }; 344 339 ··· 598 593 return parent_rate / divider_save; 599 594 } 600 595 601 - static long xgene_clk_round_rate(struct clk_hw *hw, unsigned long rate, 602 - unsigned long *prate) 596 + static int xgene_clk_determine_rate(struct clk_hw *hw, 597 + struct clk_rate_request *req) 603 598 { 604 599 struct xgene_clk *pclk = to_xgene_clk(hw); 605 - unsigned long parent_rate = *prate; 600 + unsigned long parent_rate = req->best_parent_rate; 606 601 u32 divider; 607 602 608 603 if (pclk->param.divider_reg) { 609 604 /* Let's compute the divider */ 610 - if (rate > parent_rate) 611 - rate = parent_rate; 612 - divider = parent_rate / rate; /* Rounded down */ 605 + if (req->rate > parent_rate) 606 + req->rate = parent_rate; 607 + divider = parent_rate / req->rate; /* Rounded down */ 613 608 } else { 614 609 divider = 1; 615 610 } 616 611 617 - return parent_rate / divider; 612 + req->rate = parent_rate / divider; 613 + 614 + return 0; 618 615 } 619 616 620 617 static const struct clk_ops xgene_clk_ops = { ··· 625 618 .is_enabled = xgene_clk_is_enabled, 626 619 .recalc_rate = xgene_clk_recalc_rate, 627 620 .set_rate = xgene_clk_set_rate, 628 - .round_rate = xgene_clk_round_rate, 621 + .determine_rate = xgene_clk_determine_rate, 629 622 }; 630 623 631 624 static struct clk *xgene_register_clk(struct device *dev,