Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'usb-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB/PHY updates from Greg KH:
"Here is the big USB/PHY driver pull request for 5.1-rc1.

The usual set of gadget driver updates, phy driver updates, xhci
updates, and typec additions. Also included in here are a lot of small
cleanups and fixes and driver updates where needed.

All of these have been in linux-next for a while with no reported
issues"

* tag 'usb-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (167 commits)
wusb: Remove unnecessary static function ckhdid_printf
usb: core: make default autosuspend delay configurable
usb: core: Fix typo in description of "authorized_default"
usb: chipidea: Refactor USB PHY selection and keep a single PHY
usb: chipidea: Grab the (legacy) USB PHY by phandle first
usb: chipidea: imx: set power polarity
dt-bindings: usb: ci-hdrc-usb2: add property power-active-high
usb: chipidea: imx: remove unused header files
usb: chipidea: tegra: Fix missed ci_hdrc_remove_device()
usb: core: add option of only authorizing internal devices
usb: typec: tps6598x: handle block writes separately with plain-I2C adapters
usb: xhci: Fix for Enabling USB ROLE SWITCH QUIRK on INTEL_SUNRISEPOINT_LP_XHCI
usb: xhci: fix build warning - missing prototype
usb: xhci: dbc: Fixing typo error.
usb: xhci: remove unused member 'parent' in xhci_regset struct
xhci: tegra: Prevent error pointer dereference
USB: serial: option: add Telit ME910 ECM composition
usb: core: Replace hardcoded check with inline function from usb.h
usb: core: skip interfaces disabled in devicetree
usb: typec: mux: remove redundant check on variable match
...

+2951 -1110
+1 -1
Documentation/ABI/testing/sysfs-bus-usb
··· 186 186 Description: 187 187 Some platforms provide usb port connect types through ACPI. 188 188 This attribute is to expose these information to user space. 189 - The file will read "hotplug", "wired" and "not used" if the 189 + The file will read "hotplug", "hardwired" and "not used" if the 190 190 information is available, and "unknown" otherwise. 191 191 192 192 What: /sys/bus/usb/devices/.../(hub interface)/portX/location
+2 -1
Documentation/admin-guide/kernel-parameters.txt
··· 4718 4718 usbcore.authorized_default= 4719 4719 [USB] Default USB device authorization: 4720 4720 (default -1 = authorized except for wireless USB, 4721 - 0 = not authorized, 1 = authorized) 4721 + 0 = not authorized, 1 = authorized, 2 = authorized 4722 + if device connected to internal port) 4722 4723 4723 4724 usbcore.autosuspend= 4724 4725 [USB] The autosuspend time delay (in seconds) used
+1
Documentation/devicetree/bindings/arm/atmel-sysregs.txt
··· 147 147 - compatible: Should be "atmel,<chip>-sfr", "syscon" or 148 148 "atmel,<chip>-sfrbu", "syscon" 149 149 <chip> can be "sama5d3", "sama5d4" or "sama5d2". 150 + It also can be "microchip,sam9x60-sfr", "syscon". 150 151 - reg: Should contain registers location and length 151 152 152 153 sfr@f0038000 {
-21
Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt
··· 31 31 - one subnode per DSI device connected on the DSI bus. Each DSI device should 32 32 contain a reg property encoding its virtual channel. 33 33 34 - Cadence DPHY 35 - ============ 36 - 37 - Cadence DPHY block. 38 - 39 - Required properties: 40 - - compatible: should be set to "cdns,dphy". 41 - - reg: physical base address and length of the DPHY registers. 42 - - clocks: DPHY reference clocks. 43 - - clock-names: must contain "psm" and "pll_ref". 44 - - #phy-cells: must be set to 0. 45 - 46 - 47 34 Example: 48 - dphy0: dphy@fd0e0000{ 49 - compatible = "cdns,dphy"; 50 - reg = <0x0 0xfd0e0000 0x0 0x1000>; 51 - clocks = <&psm_clk>, <&pll_ref_clk>; 52 - clock-names = "psm", "pll_ref"; 53 - #phy-cells = <0>; 54 - }; 55 - 56 35 dsi0: dsi@fd0c0000 { 57 36 compatible = "cdns,dsi"; 58 37 reg = <0x0 0xfd0c0000 0x0 0x1000>;
+20
Documentation/devicetree/bindings/phy/cdns,dphy.txt
··· 1 + Cadence DPHY 2 + ============ 3 + 4 + Cadence DPHY block. 5 + 6 + Required properties: 7 + - compatible: should be set to "cdns,dphy". 8 + - reg: physical base address and length of the DPHY registers. 9 + - clocks: DPHY reference clocks. 10 + - clock-names: must contain "psm" and "pll_ref". 11 + - #phy-cells: must be set to 0. 12 + 13 + Example: 14 + dphy0: dphy@fd0e0000{ 15 + compatible = "cdns,dphy"; 16 + reg = <0x0 0xfd0e0000 0x0 0x1000>; 17 + clocks = <&psm_clk>, <&pll_ref_clk>; 18 + clock-names = "psm", "pll_ref"; 19 + #phy-cells = <0>; 20 + };
+53 -12
Documentation/devicetree/bindings/phy/phy-mvebu-comphy.txt
··· 1 - mvebu comphy driver 2 - ------------------- 1 + MVEBU comphy drivers 2 + -------------------- 3 3 4 - A comphy controller can be found on Marvell Armada 7k/8k on the CP110. It 5 - provides a number of shared PHYs used by various interfaces (network, sata, 6 - usb, PCIe...). 4 + COMPHY controllers can be found on the following Marvell MVEBU SoCs: 5 + * Armada 7k/8k (on the CP110) 6 + * Armada 3700 7 + It provides a number of shared PHYs used by various interfaces (network, SATA, 8 + USB, PCIe...). 7 9 8 10 Required properties: 9 11 10 - - compatible: should be "marvell,comphy-cp110" 11 - - reg: should contain the comphy register location and length. 12 - - marvell,system-controller: should contain a phandle to the 13 - system controller node. 12 + - compatible: should be one of: 13 + * "marvell,comphy-cp110" for Armada 7k/8k 14 + * "marvell,comphy-a3700" for Armada 3700 15 + - reg: should contain the COMPHY register(s) location(s) and length(s). 16 + * 1 entry for Armada 7k/8k 17 + * 4 entries for Armada 3700 along with the corresponding reg-names 18 + properties, memory areas are: 19 + * Generic COMPHY registers 20 + * Lane 1 (PCIe/GbE) 21 + * Lane 0 (USB3/GbE) 22 + * Lane 2 (SATA/USB3) 23 + - marvell,system-controller: should contain a phandle to the system 24 + controller node (only for Armada 7k/8k) 14 25 - #address-cells: should be 1. 15 26 - #size-cells: should be 0. 16 27 ··· 29 18 30 19 Required properties (child nodes): 31 20 32 - - reg: comphy lane number. 33 - - #phy-cells : from the generic phy bindings, must be 1. Defines the 21 + - reg: COMPHY lane number. 22 + - #phy-cells : from the generic PHY bindings, must be 1. Defines the 34 23 input port to use for a given comphy lane. 35 24 36 - Example: 25 + Examples: 37 26 38 27 cpm_comphy: phy@120000 { 39 28 compatible = "marvell,comphy-cp110"; ··· 49 38 50 39 cpm_comphy1: phy@1 { 51 40 reg = <1>; 41 + #phy-cells = <1>; 42 + }; 43 + }; 44 + 45 + comphy: phy@18300 { 46 + compatible = "marvell,comphy-a3700"; 47 + reg = <0x18300 0x300>, 48 + <0x1F000 0x400>, 49 + <0x5C000 0x400>, 50 + <0xe0178 0x8>; 51 + reg-names = "comphy", 52 + "lane1_pcie_gbe", 53 + "lane0_usb3_gbe", 54 + "lane2_sata_usb3"; 55 + #address-cells = <1>; 56 + #size-cells = <0>; 57 + 58 + 59 + comphy0: phy@0 { 60 + reg = <0>; 61 + #phy-cells = <1>; 62 + }; 63 + 64 + comphy1: phy@1 { 65 + reg = <1>; 66 + #phy-cells = <1>; 67 + }; 68 + 69 + comphy2: phy@2 { 70 + reg = <2>; 52 71 #phy-cells = <1>; 53 72 }; 54 73 };
+38
Documentation/devicetree/bindings/phy/phy-mvebu-utmi.txt
··· 1 + MVEBU A3700 UTMI PHY 2 + -------------------- 3 + 4 + USB2 UTMI+ PHY controllers can be found on the following Marvell MVEBU SoCs: 5 + * Armada 3700 6 + 7 + On Armada 3700, there are two USB controllers, one is compatible with the USB2 8 + and USB3 specifications and supports OTG. The other one is USB2 compliant and 9 + only supports host mode. Both of these controllers come with a slightly 10 + different UTMI PHY. 11 + 12 + Required Properties: 13 + 14 + - compatible: Should be one of: 15 + * "marvell,a3700-utmi-host-phy" for the PHY connected to 16 + the USB2 host-only controller. 17 + * "marvell,a3700-utmi-otg-phy" for the PHY connected to 18 + the USB3 and USB2 OTG capable controller. 19 + - reg: PHY IP register range. 20 + - marvell,usb-misc-reg: handle on the "USB miscellaneous registers" shared 21 + region covering registers related to both the host 22 + controller and the PHY. 23 + - #phy-cells: Standard property (Documentation: phy-bindings.txt) Should be 0. 24 + 25 + 26 + Example: 27 + 28 + usb2_utmi_host_phy: phy@5f000 { 29 + compatible = "marvell,armada-3700-utmi-host-phy"; 30 + reg = <0x5f000 0x800>; 31 + marvell,usb-misc-reg = <&usb2_syscon>; 32 + #phy-cells = <0>; 33 + }; 34 + 35 + usb2_syscon: system-controller@5f800 { 36 + compatible = "marvell,armada-3700-usb2-host-misc", "syscon"; 37 + reg = <0x5f800 0x800>; 38 + };
+2
Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
··· 23 23 register files". When set driver will request its 24 24 phandle as one companion-grf for some special SoCs 25 25 (e.g RV1108). 26 + - extcon : phandle to the extcon device providing the cable state for 27 + the otg phy. 26 28 27 29 Required nodes : a sub-node is required for each port the phy provides. 28 30 The sub-node name is used to identify host or otg port,
+9
Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt
··· 9 9 "qcom,ipq8074-qmp-pcie-phy" for PCIe phy on IPQ8074 10 10 "qcom,msm8996-qmp-pcie-phy" for 14nm PCIe phy on msm8996, 11 11 "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996, 12 + "qcom,msm8998-qmp-usb3-phy" for USB3 QMP V3 phy on msm8998, 13 + "qcom,msm8998-qmp-ufs-phy" for UFS QMP phy on msm8998, 12 14 "qcom,sdm845-qmp-usb3-phy" for USB3 QMP V3 phy on sdm845, 13 15 "qcom,sdm845-qmp-usb3-uni-phy" for USB3 QMP V3 UNI phy on sdm845, 14 16 "qcom,sdm845-qmp-ufs-phy" for UFS QMP phy on sdm845. ··· 44 42 "aux", "cfg_ahb", "ref". 45 43 For "qcom,msm8996-qmp-usb3-phy" must contain: 46 44 "aux", "cfg_ahb", "ref". 45 + For "qcom,msm8998-qmp-usb3-phy" must contain: 46 + "aux", "cfg_ahb", "ref". 47 + For "qcom,msm8998-qmp-ufs-phy" must contain: 48 + "ref", "ref_aux". 47 49 For "qcom,sdm845-qmp-usb3-phy" must contain: 48 50 "aux", "cfg_ahb", "ref", "com_aux". 49 51 For "qcom,sdm845-qmp-usb3-uni-phy" must contain: ··· 67 61 "phy", "common", "cfg". 68 62 For "qcom,msm8996-qmp-usb3-phy" must contain 69 63 "phy", "common". 64 + For "qcom,msm8998-qmp-usb3-phy" must contain 65 + "phy", "common". 66 + For "qcom,msm8998-qmp-ufs-phy": no resets are listed. 70 67 For "qcom,sdm845-qmp-usb3-phy" must contain: 71 68 "phy", "common". 72 69 For "qcom,sdm845-qmp-usb3-uni-phy" must contain:
+1
Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt
··· 6 6 Required properties: 7 7 - compatible: compatible list, contains 8 8 "qcom,msm8996-qusb2-phy" for 14nm PHY on msm8996, 9 + "qcom,msm8998-qusb2-phy" for 10nm PHY on msm8998, 9 10 "qcom,sdm845-qusb2-phy" for 10nm PHY on sdm845. 10 11 11 12 - reg: offset and length of the PHY register set.
+2
Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt
··· 6 6 Required properties: 7 7 - compatible: "renesas,usb2-phy-r8a774a1" if the device is a part of an R8A774A1 8 8 SoC. 9 + "renesas,usb2-phy-r8a774c0" if the device is a part of an R8A774C0 10 + SoC. 9 11 "renesas,usb2-phy-r8a7795" if the device is a part of an R8A7795 10 12 SoC. 11 13 "renesas,usb2-phy-r8a7796" if the device is a part of an R8A7796
+1
Documentation/devicetree/bindings/phy/ti-phy.txt
··· 35 35 DRA7x 36 36 Should be "ti,dra7x-usb2-phy2" for the 2nd instance of USB2 PHY 37 37 in DRA7x 38 + Should be "ti,am654-usb2" for the USB2 PHYs on AM654. 38 39 - reg : Address and length of the register set for the device. 39 40 - #phy-cells: determine the number of cells that should be given in the 40 41 phandle while referencing this phy.
+1
Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
··· 93 93 - over-current-active-low: over current signal polarity is active low. 94 94 - over-current-active-high: over current signal polarity is active high. 95 95 It's recommended to specify the over current polarity. 96 + - power-active-high: power signal polarity is active high 96 97 - external-vbus-divider: enables off-chip resistor divider for Vbus 97 98 98 99 Example:
+24
Documentation/devicetree/bindings/usb/ingenic,jz4740-musb.txt
··· 1 + Ingenic JZ4740 MUSB driver 2 + 3 + Required properties: 4 + 5 + - compatible: Must be "ingenic,jz4740-musb" 6 + - reg: Address range of the UDC register set 7 + - interrupts: IRQ number related to the UDC hardware 8 + - interrupt-names: must be "mc" 9 + - clocks: phandle to the "udc" clock 10 + - clock-names: must be "udc" 11 + 12 + Example: 13 + 14 + udc: usb@13040000 { 15 + compatible = "ingenic,jz4740-musb"; 16 + reg = <0x13040000 0x10000>; 17 + 18 + interrupt-parent = <&intc>; 19 + interrupts = <24>; 20 + interrupt-names = "mc"; 21 + 22 + clocks = <&cgu JZ4740_CLK_UDC>; 23 + clock-names = "udc"; 24 + };
+4 -2
Documentation/devicetree/bindings/usb/keystone-usb.txt
··· 3 3 DWC3 GLUE 4 4 5 5 Required properties: 6 - - compatible: should be "ti,keystone-dwc3". 6 + - compatible: should be 7 + "ti,keystone-dwc3" for Keystone 2 SoCs 8 + "ti,am654-dwc3" for AM654 SoC 7 9 - #address-cells, #size-cells : should be '1' if the device has sub-nodes 8 10 with 'reg' property. 9 11 - reg : Address and length of the register set for the USB subsystem on ··· 23 21 - clock-names: Must be "usb". 24 22 25 23 26 - The following are mandatory properties for Keystone 2 66AK2G SoCs only: 24 + The following are mandatory properties for 66AK2G and AM654: 27 25 28 26 - power-domains: Should contain a phandle to a PM domain provider node 29 27 and an args specifier containing the USB device id
+1
Documentation/devicetree/bindings/usb/qcom,dwc3.txt
··· 4 4 - compatible: Compatible list, contains 5 5 "qcom,dwc3" 6 6 "qcom,msm8996-dwc3" for msm8996 SOC. 7 + "qcom,msm8998-dwc3" for msm8998 SOC. 7 8 "qcom,sdm845-dwc3" for sdm845 SOC. 8 9 - reg: Offset and length of register set for QSCRATCH wrapper 9 10 - power-domains: specifies a phandle to PM domain provider node
+1
Documentation/devicetree/bindings/usb/renesas_usb3.txt
··· 3 3 Required properties: 4 4 - compatible: Must contain one of the following: 5 5 - "renesas,r8a774a1-usb3-peri" 6 + - "renesas,r8a774c0-usb3-peri" 6 7 - "renesas,r8a7795-usb3-peri" 7 8 - "renesas,r8a7796-usb3-peri" 8 9 - "renesas,r8a77965-usb3-peri"
+1
Documentation/devicetree/bindings/usb/renesas_usbhs.txt
··· 7 7 - "renesas,usbhs-r8a7744" for r8a7744 (RZ/G1N) compatible device 8 8 - "renesas,usbhs-r8a7745" for r8a7745 (RZ/G1E) compatible device 9 9 - "renesas,usbhs-r8a774a1" for r8a774a1 (RZ/G2M) compatible device 10 + - "renesas,usbhs-r8a774c0" for r8a774c0 (RZ/G2E) compatible device 10 11 - "renesas,usbhs-r8a7790" for r8a7790 (R-Car H2) compatible device 11 12 - "renesas,usbhs-r8a7791" for r8a7791 (R-Car M2-W) compatible device 12 13 - "renesas,usbhs-r8a7792" for r8a7792 (R-Car V2H) compatible device
+4
Documentation/devicetree/bindings/usb/usb251xb.txt
··· 64 64 - power-on-time-ms : Specifies the time it takes from the time the host 65 65 initiates the power-on sequence to a port until the port has adequate 66 66 power. The value is given in ms in a 0 - 510 range (default is 100ms). 67 + - swap-dx-lanes : Specifies the ports which will swap the differential-pair 68 + (D+/D-), default is not-swapped. 67 69 68 70 Examples: 69 71 usb2512b@2c { ··· 83 81 manufacturer = "Foo"; 84 82 product = "Foo-Bar"; 85 83 serial = "1234567890A"; 84 + /* correct misplaced usb connectors on port 1,2 */ 85 + swap-dx-lanes = <1 2>; 86 86 };
+3 -1
Documentation/usb/authorization.txt
··· 34 34 By default, Wired USB devices are authorized by default to 35 35 connect. Wireless USB hosts deauthorize by default all new connected 36 36 devices (this is so because we need to do an authentication phase 37 - before authorizing). 37 + before authorizing). Writing "2" to the authorized_default attribute 38 + causes kernel to only authorize by default devices connected to internal 39 + USB ports. 38 40 39 41 40 42 Example system lockdown (lame)
+8
MAINTAINERS
··· 9178 9178 F: include/uapi/drm/armada_drm.h 9179 9179 F: Documentation/devicetree/bindings/display/armada/ 9180 9180 9181 + MARVELL ARMADA 3700 PHY DRIVERS 9182 + M: Miquel Raynal <miquel.raynal@bootlin.com> 9183 + S: Maintained 9184 + F: drivers/phy/marvell/phy-mvebu-a3700-comphy.c 9185 + F: drivers/phy/marvell/phy-mvebu-a3700-utmi.c 9186 + F: Documentation/devicetree/bindings/phy/phy-mvebu-comphy.txt 9187 + F: Documentation/devicetree/bindings/phy/phy-mvebu-utmi.txt 9188 + 9181 9189 MARVELL CRYPTO DRIVER 9182 9190 M: Boris Brezillon <bbrezillon@kernel.org> 9183 9191 M: Arnaud Ebalard <arno@natisbad.org>
+59 -3
drivers/base/devcon.c
··· 7 7 */ 8 8 9 9 #include <linux/device.h> 10 + #include <linux/property.h> 10 11 11 12 static DEFINE_MUTEX(devcon_lock); 12 13 static LIST_HEAD(devcon_list); 14 + 15 + typedef void *(*devcon_match_fn_t)(struct device_connection *con, int ep, 16 + void *data); 17 + 18 + static void * 19 + fwnode_graph_devcon_match(struct fwnode_handle *fwnode, const char *con_id, 20 + void *data, devcon_match_fn_t match) 21 + { 22 + struct device_connection con = { .id = con_id }; 23 + struct fwnode_handle *ep; 24 + void *ret; 25 + 26 + fwnode_graph_for_each_endpoint(fwnode, ep) { 27 + con.fwnode = fwnode_graph_get_remote_port_parent(ep); 28 + if (!fwnode_device_is_available(con.fwnode)) 29 + continue; 30 + 31 + ret = match(&con, -1, data); 32 + fwnode_handle_put(con.fwnode); 33 + if (ret) { 34 + fwnode_handle_put(ep); 35 + return ret; 36 + } 37 + } 38 + return NULL; 39 + } 13 40 14 41 /** 15 42 * device_connection_find_match - Find physical connection to a device ··· 50 23 * caller is expecting to be returned. 51 24 */ 52 25 void *device_connection_find_match(struct device *dev, const char *con_id, 53 - void *data, 54 - void *(*match)(struct device_connection *con, 55 - int ep, void *data)) 26 + void *data, devcon_match_fn_t match) 56 27 { 28 + struct fwnode_handle *fwnode = dev_fwnode(dev); 57 29 const char *devname = dev_name(dev); 58 30 struct device_connection *con; 59 31 void *ret = NULL; ··· 60 34 61 35 if (!match) 62 36 return NULL; 37 + 38 + if (fwnode) { 39 + ret = fwnode_graph_devcon_match(fwnode, con_id, data, match); 40 + if (ret) 41 + return ret; 42 + } 63 43 64 44 mutex_lock(&devcon_lock); 65 45 ··· 107 75 NULL, 108 76 }; 109 77 78 + static int device_fwnode_match(struct device *dev, void *fwnode) 79 + { 80 + return dev_fwnode(dev) == fwnode; 81 + } 82 + 83 + static void *device_connection_fwnode_match(struct device_connection *con) 84 + { 85 + struct bus_type *bus; 86 + struct device *dev; 87 + 88 + for (bus = generic_match_buses[0]; bus; bus++) { 89 + dev = bus_find_device(bus, NULL, (void *)con->fwnode, 90 + device_fwnode_match); 91 + if (dev && !strncmp(dev_name(dev), con->id, strlen(con->id))) 92 + return dev; 93 + 94 + put_device(dev); 95 + } 96 + return NULL; 97 + } 98 + 110 99 /* This tries to find the device from the most common bus types by name. */ 111 100 static void *generic_match(struct device_connection *con, int ep, void *data) 112 101 { 113 102 struct bus_type *bus; 114 103 struct device *dev; 104 + 105 + if (con->fwnode) 106 + return device_connection_fwnode_match(con); 115 107 116 108 for (bus = generic_match_buses[0]; bus; bus++) { 117 109 dev = bus_find_device_by_name(bus, NULL, con->endpoint[ep]);
+2 -2
drivers/phy/broadcom/phy-bcm-sr-pcie.c
··· 78 78 static const u8 pipemux_table[] = { 79 79 /* PIPEMUX = 0, EP 1x16 */ 80 80 0x00, 81 - /* PIPEMUX = 1, EP 2x8 */ 82 - 0x00, 81 + /* PIPEMUX = 1, EP 1x8 + RC 1x8, core 7 */ 82 + 0x80, 83 83 /* PIPEMUX = 2, EP 4x4 */ 84 84 0x00, 85 85 /* PIPEMUX = 3, RC 2x8, cores 0, 7 */
+11
drivers/phy/cadence/Kconfig
··· 1 1 # 2 2 # Phy drivers for Cadence PHYs 3 3 # 4 + 4 5 config PHY_CADENCE_DP 5 6 tristate "Cadence MHDP DisplayPort PHY driver" 6 7 depends on OF ··· 9 8 select GENERIC_PHY 10 9 help 11 10 Support for Cadence MHDP DisplayPort PHY. 11 + 12 + config PHY_CADENCE_DPHY 13 + tristate "Cadence D-PHY Support" 14 + depends on HAS_IOMEM && OF 15 + select GENERIC_PHY 16 + select GENERIC_PHY_MIPI_DPHY 17 + help 18 + Choose this option if you have a Cadence D-PHY in your 19 + system. If M is selected, the module will be called 20 + cdns-dphy. 12 21 13 22 config PHY_CADENCE_SIERRA 14 23 tristate "Cadence Sierra PHY Driver"
+1
drivers/phy/cadence/Makefile
··· 1 1 obj-$(CONFIG_PHY_CADENCE_DP) += phy-cadence-dp.o 2 + obj-$(CONFIG_PHY_CADENCE_DPHY) += cdns-dphy.o 2 3 obj-$(CONFIG_PHY_CADENCE_SIERRA) += phy-cadence-sierra.o
+391
drivers/phy/cadence/cdns-dphy.c
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 2 + /* 3 + * Copyright: 2017-2018 Cadence Design Systems, Inc. 4 + */ 5 + 6 + #include <linux/bitops.h> 7 + #include <linux/clk.h> 8 + #include <linux/io.h> 9 + #include <linux/module.h> 10 + #include <linux/of_address.h> 11 + #include <linux/of_device.h> 12 + #include <linux/platform_device.h> 13 + #include <linux/reset.h> 14 + 15 + #include <linux/phy/phy.h> 16 + #include <linux/phy/phy-mipi-dphy.h> 17 + 18 + #define REG_WAKEUP_TIME_NS 800 19 + #define DPHY_PLL_RATE_HZ 108000000 20 + 21 + /* DPHY registers */ 22 + #define DPHY_PMA_CMN(reg) (reg) 23 + #define DPHY_PMA_LCLK(reg) (0x100 + (reg)) 24 + #define DPHY_PMA_LDATA(lane, reg) (0x200 + ((lane) * 0x100) + (reg)) 25 + #define DPHY_PMA_RCLK(reg) (0x600 + (reg)) 26 + #define DPHY_PMA_RDATA(lane, reg) (0x700 + ((lane) * 0x100) + (reg)) 27 + #define DPHY_PCS(reg) (0xb00 + (reg)) 28 + 29 + #define DPHY_CMN_SSM DPHY_PMA_CMN(0x20) 30 + #define DPHY_CMN_SSM_EN BIT(0) 31 + #define DPHY_CMN_TX_MODE_EN BIT(9) 32 + 33 + #define DPHY_CMN_PWM DPHY_PMA_CMN(0x40) 34 + #define DPHY_CMN_PWM_DIV(x) ((x) << 20) 35 + #define DPHY_CMN_PWM_LOW(x) ((x) << 10) 36 + #define DPHY_CMN_PWM_HIGH(x) (x) 37 + 38 + #define DPHY_CMN_FBDIV DPHY_PMA_CMN(0x4c) 39 + #define DPHY_CMN_FBDIV_VAL(low, high) (((high) << 11) | ((low) << 22)) 40 + #define DPHY_CMN_FBDIV_FROM_REG (BIT(10) | BIT(21)) 41 + 42 + #define DPHY_CMN_OPIPDIV DPHY_PMA_CMN(0x50) 43 + #define DPHY_CMN_IPDIV_FROM_REG BIT(0) 44 + #define DPHY_CMN_IPDIV(x) ((x) << 1) 45 + #define DPHY_CMN_OPDIV_FROM_REG BIT(6) 46 + #define DPHY_CMN_OPDIV(x) ((x) << 7) 47 + 48 + #define DPHY_PSM_CFG DPHY_PCS(0x4) 49 + #define DPHY_PSM_CFG_FROM_REG BIT(0) 50 + #define DPHY_PSM_CLK_DIV(x) ((x) << 1) 51 + 52 + #define DSI_HBP_FRAME_OVERHEAD 12 53 + #define DSI_HSA_FRAME_OVERHEAD 14 54 + #define DSI_HFP_FRAME_OVERHEAD 6 55 + #define DSI_HSS_VSS_VSE_FRAME_OVERHEAD 4 56 + #define DSI_BLANKING_FRAME_OVERHEAD 6 57 + #define DSI_NULL_FRAME_OVERHEAD 6 58 + #define DSI_EOT_PKT_SIZE 4 59 + 60 + struct cdns_dphy_cfg { 61 + u8 pll_ipdiv; 62 + u8 pll_opdiv; 63 + u16 pll_fbdiv; 64 + unsigned int nlanes; 65 + }; 66 + 67 + enum cdns_dphy_clk_lane_cfg { 68 + DPHY_CLK_CFG_LEFT_DRIVES_ALL = 0, 69 + DPHY_CLK_CFG_LEFT_DRIVES_RIGHT = 1, 70 + DPHY_CLK_CFG_LEFT_DRIVES_LEFT = 2, 71 + DPHY_CLK_CFG_RIGHT_DRIVES_ALL = 3, 72 + }; 73 + 74 + struct cdns_dphy; 75 + struct cdns_dphy_ops { 76 + int (*probe)(struct cdns_dphy *dphy); 77 + void (*remove)(struct cdns_dphy *dphy); 78 + void (*set_psm_div)(struct cdns_dphy *dphy, u8 div); 79 + void (*set_clk_lane_cfg)(struct cdns_dphy *dphy, 80 + enum cdns_dphy_clk_lane_cfg cfg); 81 + void (*set_pll_cfg)(struct cdns_dphy *dphy, 82 + const struct cdns_dphy_cfg *cfg); 83 + unsigned long (*get_wakeup_time_ns)(struct cdns_dphy *dphy); 84 + }; 85 + 86 + struct cdns_dphy { 87 + struct cdns_dphy_cfg cfg; 88 + void __iomem *regs; 89 + struct clk *psm_clk; 90 + struct clk *pll_ref_clk; 91 + const struct cdns_dphy_ops *ops; 92 + struct phy *phy; 93 + }; 94 + 95 + static int cdns_dsi_get_dphy_pll_cfg(struct cdns_dphy *dphy, 96 + struct cdns_dphy_cfg *cfg, 97 + struct phy_configure_opts_mipi_dphy *opts, 98 + unsigned int *dsi_hfp_ext) 99 + { 100 + unsigned long pll_ref_hz = clk_get_rate(dphy->pll_ref_clk); 101 + u64 dlane_bps; 102 + 103 + memset(cfg, 0, sizeof(*cfg)); 104 + 105 + if (pll_ref_hz < 9600000 || pll_ref_hz >= 150000000) 106 + return -EINVAL; 107 + else if (pll_ref_hz < 19200000) 108 + cfg->pll_ipdiv = 1; 109 + else if (pll_ref_hz < 38400000) 110 + cfg->pll_ipdiv = 2; 111 + else if (pll_ref_hz < 76800000) 112 + cfg->pll_ipdiv = 4; 113 + else 114 + cfg->pll_ipdiv = 8; 115 + 116 + dlane_bps = opts->hs_clk_rate; 117 + 118 + if (dlane_bps > 2500000000UL || dlane_bps < 160000000UL) 119 + return -EINVAL; 120 + else if (dlane_bps >= 1250000000) 121 + cfg->pll_opdiv = 1; 122 + else if (dlane_bps >= 630000000) 123 + cfg->pll_opdiv = 2; 124 + else if (dlane_bps >= 320000000) 125 + cfg->pll_opdiv = 4; 126 + else if (dlane_bps >= 160000000) 127 + cfg->pll_opdiv = 8; 128 + 129 + cfg->pll_fbdiv = DIV_ROUND_UP_ULL(dlane_bps * 2 * cfg->pll_opdiv * 130 + cfg->pll_ipdiv, 131 + pll_ref_hz); 132 + 133 + return 0; 134 + } 135 + 136 + static int cdns_dphy_setup_psm(struct cdns_dphy *dphy) 137 + { 138 + unsigned long psm_clk_hz = clk_get_rate(dphy->psm_clk); 139 + unsigned long psm_div; 140 + 141 + if (!psm_clk_hz || psm_clk_hz > 100000000) 142 + return -EINVAL; 143 + 144 + psm_div = DIV_ROUND_CLOSEST(psm_clk_hz, 1000000); 145 + if (dphy->ops->set_psm_div) 146 + dphy->ops->set_psm_div(dphy, psm_div); 147 + 148 + return 0; 149 + } 150 + 151 + static void cdns_dphy_set_clk_lane_cfg(struct cdns_dphy *dphy, 152 + enum cdns_dphy_clk_lane_cfg cfg) 153 + { 154 + if (dphy->ops->set_clk_lane_cfg) 155 + dphy->ops->set_clk_lane_cfg(dphy, cfg); 156 + } 157 + 158 + static void cdns_dphy_set_pll_cfg(struct cdns_dphy *dphy, 159 + const struct cdns_dphy_cfg *cfg) 160 + { 161 + if (dphy->ops->set_pll_cfg) 162 + dphy->ops->set_pll_cfg(dphy, cfg); 163 + } 164 + 165 + static unsigned long cdns_dphy_get_wakeup_time_ns(struct cdns_dphy *dphy) 166 + { 167 + return dphy->ops->get_wakeup_time_ns(dphy); 168 + } 169 + 170 + static unsigned long cdns_dphy_ref_get_wakeup_time_ns(struct cdns_dphy *dphy) 171 + { 172 + /* Default wakeup time is 800 ns (in a simulated environment). */ 173 + return 800; 174 + } 175 + 176 + static void cdns_dphy_ref_set_pll_cfg(struct cdns_dphy *dphy, 177 + const struct cdns_dphy_cfg *cfg) 178 + { 179 + u32 fbdiv_low, fbdiv_high; 180 + 181 + fbdiv_low = (cfg->pll_fbdiv / 4) - 2; 182 + fbdiv_high = cfg->pll_fbdiv - fbdiv_low - 2; 183 + 184 + writel(DPHY_CMN_IPDIV_FROM_REG | DPHY_CMN_OPDIV_FROM_REG | 185 + DPHY_CMN_IPDIV(cfg->pll_ipdiv) | 186 + DPHY_CMN_OPDIV(cfg->pll_opdiv), 187 + dphy->regs + DPHY_CMN_OPIPDIV); 188 + writel(DPHY_CMN_FBDIV_FROM_REG | 189 + DPHY_CMN_FBDIV_VAL(fbdiv_low, fbdiv_high), 190 + dphy->regs + DPHY_CMN_FBDIV); 191 + writel(DPHY_CMN_PWM_HIGH(6) | DPHY_CMN_PWM_LOW(0x101) | 192 + DPHY_CMN_PWM_DIV(0x8), 193 + dphy->regs + DPHY_CMN_PWM); 194 + } 195 + 196 + static void cdns_dphy_ref_set_psm_div(struct cdns_dphy *dphy, u8 div) 197 + { 198 + writel(DPHY_PSM_CFG_FROM_REG | DPHY_PSM_CLK_DIV(div), 199 + dphy->regs + DPHY_PSM_CFG); 200 + } 201 + 202 + /* 203 + * This is the reference implementation of DPHY hooks. Specific integration of 204 + * this IP may have to re-implement some of them depending on how they decided 205 + * to wire things in the SoC. 206 + */ 207 + static const struct cdns_dphy_ops ref_dphy_ops = { 208 + .get_wakeup_time_ns = cdns_dphy_ref_get_wakeup_time_ns, 209 + .set_pll_cfg = cdns_dphy_ref_set_pll_cfg, 210 + .set_psm_div = cdns_dphy_ref_set_psm_div, 211 + }; 212 + 213 + static int cdns_dphy_config_from_opts(struct phy *phy, 214 + struct phy_configure_opts_mipi_dphy *opts, 215 + struct cdns_dphy_cfg *cfg) 216 + { 217 + struct cdns_dphy *dphy = phy_get_drvdata(phy); 218 + unsigned int dsi_hfp_ext = 0; 219 + int ret; 220 + 221 + ret = phy_mipi_dphy_config_validate(opts); 222 + if (ret) 223 + return ret; 224 + 225 + ret = cdns_dsi_get_dphy_pll_cfg(dphy, cfg, 226 + opts, &dsi_hfp_ext); 227 + if (ret) 228 + return ret; 229 + 230 + opts->wakeup = cdns_dphy_get_wakeup_time_ns(dphy) / 1000; 231 + 232 + return 0; 233 + } 234 + 235 + static int cdns_dphy_validate(struct phy *phy, enum phy_mode mode, int submode, 236 + union phy_configure_opts *opts) 237 + { 238 + struct cdns_dphy_cfg cfg = { 0 }; 239 + 240 + if (mode != PHY_MODE_MIPI_DPHY) 241 + return -EINVAL; 242 + 243 + return cdns_dphy_config_from_opts(phy, &opts->mipi_dphy, &cfg); 244 + } 245 + 246 + static int cdns_dphy_configure(struct phy *phy, union phy_configure_opts *opts) 247 + { 248 + struct cdns_dphy *dphy = phy_get_drvdata(phy); 249 + struct cdns_dphy_cfg cfg = { 0 }; 250 + int ret; 251 + 252 + ret = cdns_dphy_config_from_opts(phy, &opts->mipi_dphy, &cfg); 253 + if (ret) 254 + return ret; 255 + 256 + /* 257 + * Configure the internal PSM clk divider so that the DPHY has a 258 + * 1MHz clk (or something close). 259 + */ 260 + ret = cdns_dphy_setup_psm(dphy); 261 + if (ret) 262 + return ret; 263 + 264 + /* 265 + * Configure attach clk lanes to data lanes: the DPHY has 2 clk lanes 266 + * and 8 data lanes, each clk lane can be attache different set of 267 + * data lanes. The 2 groups are named 'left' and 'right', so here we 268 + * just say that we want the 'left' clk lane to drive the 'left' data 269 + * lanes. 270 + */ 271 + cdns_dphy_set_clk_lane_cfg(dphy, DPHY_CLK_CFG_LEFT_DRIVES_LEFT); 272 + 273 + /* 274 + * Configure the DPHY PLL that will be used to generate the TX byte 275 + * clk. 276 + */ 277 + cdns_dphy_set_pll_cfg(dphy, &cfg); 278 + 279 + return 0; 280 + } 281 + 282 + static int cdns_dphy_power_on(struct phy *phy) 283 + { 284 + struct cdns_dphy *dphy = phy_get_drvdata(phy); 285 + 286 + clk_prepare_enable(dphy->psm_clk); 287 + clk_prepare_enable(dphy->pll_ref_clk); 288 + 289 + /* Start TX state machine. */ 290 + writel(DPHY_CMN_SSM_EN | DPHY_CMN_TX_MODE_EN, 291 + dphy->regs + DPHY_CMN_SSM); 292 + 293 + return 0; 294 + } 295 + 296 + static int cdns_dphy_power_off(struct phy *phy) 297 + { 298 + struct cdns_dphy *dphy = phy_get_drvdata(phy); 299 + 300 + clk_disable_unprepare(dphy->pll_ref_clk); 301 + clk_disable_unprepare(dphy->psm_clk); 302 + 303 + return 0; 304 + } 305 + 306 + static const struct phy_ops cdns_dphy_ops = { 307 + .configure = cdns_dphy_configure, 308 + .validate = cdns_dphy_validate, 309 + .power_on = cdns_dphy_power_on, 310 + .power_off = cdns_dphy_power_off, 311 + }; 312 + 313 + static int cdns_dphy_probe(struct platform_device *pdev) 314 + { 315 + struct phy_provider *phy_provider; 316 + struct cdns_dphy *dphy; 317 + struct resource *res; 318 + int ret; 319 + 320 + dphy = devm_kzalloc(&pdev->dev, sizeof(*dphy), GFP_KERNEL); 321 + if (!dphy) 322 + return -ENOMEM; 323 + dev_set_drvdata(&pdev->dev, dphy); 324 + 325 + dphy->ops = of_device_get_match_data(&pdev->dev); 326 + if (!dphy->ops) 327 + return -EINVAL; 328 + 329 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 330 + dphy->regs = devm_ioremap_resource(&pdev->dev, res); 331 + if (IS_ERR(dphy->regs)) 332 + return PTR_ERR(dphy->regs); 333 + 334 + dphy->psm_clk = devm_clk_get(&pdev->dev, "psm"); 335 + if (IS_ERR(dphy->psm_clk)) 336 + return PTR_ERR(dphy->psm_clk); 337 + 338 + dphy->pll_ref_clk = devm_clk_get(&pdev->dev, "pll_ref"); 339 + if (IS_ERR(dphy->pll_ref_clk)) 340 + return PTR_ERR(dphy->pll_ref_clk); 341 + 342 + if (dphy->ops->probe) { 343 + ret = dphy->ops->probe(dphy); 344 + if (ret) 345 + return ret; 346 + } 347 + 348 + dphy->phy = devm_phy_create(&pdev->dev, NULL, &cdns_dphy_ops); 349 + if (IS_ERR(dphy->phy)) { 350 + dev_err(&pdev->dev, "failed to create PHY\n"); 351 + if (dphy->ops->remove) 352 + dphy->ops->remove(dphy); 353 + return PTR_ERR(dphy->phy); 354 + } 355 + 356 + phy_set_drvdata(dphy->phy, dphy); 357 + phy_provider = devm_of_phy_provider_register(&pdev->dev, 358 + of_phy_simple_xlate); 359 + 360 + return PTR_ERR_OR_ZERO(phy_provider); 361 + } 362 + 363 + static int cdns_dphy_remove(struct platform_device *pdev) 364 + { 365 + struct cdns_dphy *dphy = dev_get_drvdata(&pdev->dev); 366 + 367 + if (dphy->ops->remove) 368 + dphy->ops->remove(dphy); 369 + 370 + return 0; 371 + } 372 + 373 + static const struct of_device_id cdns_dphy_of_match[] = { 374 + { .compatible = "cdns,dphy", .data = &ref_dphy_ops }, 375 + { /* sentinel */ }, 376 + }; 377 + MODULE_DEVICE_TABLE(of, cdns_dphy_of_match); 378 + 379 + static struct platform_driver cdns_dphy_platform_driver = { 380 + .probe = cdns_dphy_probe, 381 + .remove = cdns_dphy_remove, 382 + .driver = { 383 + .name = "cdns-mipi-dphy", 384 + .of_match_table = cdns_dphy_of_match, 385 + }, 386 + }; 387 + module_platform_driver(cdns_dphy_platform_driver); 388 + 389 + MODULE_AUTHOR("Maxime Ripard <maxime.ripard@bootlin.com>"); 390 + MODULE_DESCRIPTION("Cadence MIPI D-PHY Driver"); 391 + MODULE_LICENSE("GPL");
+1 -1
drivers/phy/freescale/Kconfig
··· 2 2 tristate "Freescale i.MX8M USB3 PHY" 3 3 depends on OF && HAS_IOMEM 4 4 select GENERIC_PHY 5 - default SOC_IMX8MQ 5 + default ARCH_MXC && ARM64
+21
drivers/phy/marvell/Kconfig
··· 21 21 help 22 22 Enable this to support the USB PHY on Marvell Berlin SoCs. 23 23 24 + config PHY_MVEBU_A3700_COMPHY 25 + tristate "Marvell A3700 comphy driver" 26 + depends on ARCH_MVEBU || COMPILE_TEST 27 + depends on OF 28 + depends on HAVE_ARM_SMCCC 29 + default y 30 + select GENERIC_PHY 31 + help 32 + This driver allows to control the comphy, a hardware block providing 33 + shared serdes PHYs on Marvell Armada 3700. Its serdes lanes can be 34 + used by various controllers: Ethernet, SATA, USB3, PCIe. 35 + 36 + config PHY_MVEBU_A3700_UTMI 37 + tristate "Marvell A3700 UTMI driver" 38 + depends on ARCH_MVEBU || COMPILE_TEST 39 + depends on OF 40 + default y 41 + select GENERIC_PHY 42 + help 43 + Enable this to support Marvell A3700 UTMI PHY driver. 44 + 24 45 config PHY_MVEBU_A38X_COMPHY 25 46 tristate "Marvell Armada 38x comphy driver" 26 47 depends on ARCH_MVEBU || COMPILE_TEST
+2
drivers/phy/marvell/Makefile
··· 2 2 obj-$(CONFIG_ARMADA375_USBCLUSTER_PHY) += phy-armada375-usb2.o 3 3 obj-$(CONFIG_PHY_BERLIN_SATA) += phy-berlin-sata.o 4 4 obj-$(CONFIG_PHY_BERLIN_USB) += phy-berlin-usb.o 5 + obj-$(CONFIG_PHY_MVEBU_A3700_COMPHY) += phy-mvebu-a3700-comphy.o 6 + obj-$(CONFIG_PHY_MVEBU_A3700_UTMI) += phy-mvebu-a3700-utmi.o 5 7 obj-$(CONFIG_PHY_MVEBU_A38X_COMPHY) += phy-armada38x-comphy.o 6 8 obj-$(CONFIG_PHY_MVEBU_CP110_COMPHY) += phy-mvebu-cp110-comphy.o 7 9 obj-$(CONFIG_PHY_MVEBU_SATA) += phy-mvebu-sata.o
+2 -11
drivers/phy/marvell/phy-armada375-usb2.c
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 1 2 /* 2 3 * USB cluster support for Armada 375 platform. 3 4 * 4 5 * Copyright (C) 2014 Marvell 5 6 * 6 7 * Gregory CLEMENT <gregory.clement@free-electrons.com> 7 - * 8 - * This file is licensed under the terms of the GNU General Public 9 - * License version 2 or later. This program is licensed "as is" 10 - * without any warranty of any kind, whether express or implied. 11 8 * 12 9 * Armada 375 comes with an USB2 host and device controller and an 13 10 * USB3 controller. The USB cluster control register allows to manage ··· 15 18 #include <linux/init.h> 16 19 #include <linux/io.h> 17 20 #include <linux/kernel.h> 18 - #include <linux/module.h> 19 21 #include <linux/of_address.h> 20 22 #include <linux/phy/phy.h> 21 23 #include <linux/platform_device.h> ··· 138 142 { .compatible = "marvell,armada-375-usb-cluster", }, 139 143 { /* end of list */ }, 140 144 }; 141 - MODULE_DEVICE_TABLE(of, of_usb_cluster_table); 142 145 143 146 static struct platform_driver armada375_usb_phy_driver = { 144 147 .probe = armada375_usb_phy_probe, ··· 146 151 .name = "armada-375-usb-cluster", 147 152 } 148 153 }; 149 - module_platform_driver(armada375_usb_phy_driver); 150 - 151 - MODULE_DESCRIPTION("Armada 375 USB cluster driver"); 152 - MODULE_AUTHOR("Gregory CLEMENT <gregory.clement@free-electrons.com>"); 153 - MODULE_LICENSE("GPL"); 154 + builtin_platform_driver(armada375_usb_phy_driver);
+318
drivers/phy/marvell/phy-mvebu-a3700-comphy.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Copyright (C) 2018 Marvell 4 + * 5 + * Authors: 6 + * Evan Wang <xswang@marvell.com> 7 + * Miquèl Raynal <miquel.raynal@bootlin.com> 8 + * 9 + * Structure inspired from phy-mvebu-cp110-comphy.c written by Antoine Tenart. 10 + * SMC call initial support done by Grzegorz Jaszczyk. 11 + */ 12 + 13 + #include <linux/arm-smccc.h> 14 + #include <linux/io.h> 15 + #include <linux/iopoll.h> 16 + #include <linux/mfd/syscon.h> 17 + #include <linux/module.h> 18 + #include <linux/phy.h> 19 + #include <linux/phy/phy.h> 20 + #include <linux/platform_device.h> 21 + 22 + #define MVEBU_A3700_COMPHY_LANES 3 23 + #define MVEBU_A3700_COMPHY_PORTS 2 24 + 25 + /* COMPHY Fast SMC function identifiers */ 26 + #define COMPHY_SIP_POWER_ON 0x82000001 27 + #define COMPHY_SIP_POWER_OFF 0x82000002 28 + #define COMPHY_SIP_PLL_LOCK 0x82000003 29 + 30 + #define COMPHY_FW_MODE_SATA 0x1 31 + #define COMPHY_FW_MODE_SGMII 0x2 32 + #define COMPHY_FW_MODE_HS_SGMII 0x3 33 + #define COMPHY_FW_MODE_USB3H 0x4 34 + #define COMPHY_FW_MODE_USB3D 0x5 35 + #define COMPHY_FW_MODE_PCIE 0x6 36 + #define COMPHY_FW_MODE_RXAUI 0x7 37 + #define COMPHY_FW_MODE_XFI 0x8 38 + #define COMPHY_FW_MODE_SFI 0x9 39 + #define COMPHY_FW_MODE_USB3 0xa 40 + 41 + #define COMPHY_FW_SPEED_1_25G 0 /* SGMII 1G */ 42 + #define COMPHY_FW_SPEED_2_5G 1 43 + #define COMPHY_FW_SPEED_3_125G 2 /* SGMII 2.5G */ 44 + #define COMPHY_FW_SPEED_5G 3 45 + #define COMPHY_FW_SPEED_5_15625G 4 /* XFI 5G */ 46 + #define COMPHY_FW_SPEED_6G 5 47 + #define COMPHY_FW_SPEED_10_3125G 6 /* XFI 10G */ 48 + #define COMPHY_FW_SPEED_MAX 0x3F 49 + 50 + #define COMPHY_FW_MODE(mode) ((mode) << 12) 51 + #define COMPHY_FW_NET(mode, idx, speed) (COMPHY_FW_MODE(mode) | \ 52 + ((idx) << 8) | \ 53 + ((speed) << 2)) 54 + #define COMPHY_FW_PCIE(mode, idx, speed, width) (COMPHY_FW_NET(mode, idx, speed) | \ 55 + ((width) << 18)) 56 + 57 + struct mvebu_a3700_comphy_conf { 58 + unsigned int lane; 59 + enum phy_mode mode; 60 + int submode; 61 + unsigned int port; 62 + u32 fw_mode; 63 + }; 64 + 65 + #define MVEBU_A3700_COMPHY_CONF(_lane, _mode, _smode, _port, _fw) \ 66 + { \ 67 + .lane = _lane, \ 68 + .mode = _mode, \ 69 + .submode = _smode, \ 70 + .port = _port, \ 71 + .fw_mode = _fw, \ 72 + } 73 + 74 + #define MVEBU_A3700_COMPHY_CONF_GEN(_lane, _mode, _port, _fw) \ 75 + MVEBU_A3700_COMPHY_CONF(_lane, _mode, PHY_INTERFACE_MODE_NA, _port, _fw) 76 + 77 + #define MVEBU_A3700_COMPHY_CONF_ETH(_lane, _smode, _port, _fw) \ 78 + MVEBU_A3700_COMPHY_CONF(_lane, PHY_MODE_ETHERNET, _smode, _port, _fw) 79 + 80 + static const struct mvebu_a3700_comphy_conf mvebu_a3700_comphy_modes[] = { 81 + /* lane 0 */ 82 + MVEBU_A3700_COMPHY_CONF_GEN(0, PHY_MODE_USB_HOST_SS, 0, 83 + COMPHY_FW_MODE_USB3H), 84 + MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_SGMII, 1, 85 + COMPHY_FW_MODE_SGMII), 86 + MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_2500BASEX, 1, 87 + COMPHY_FW_MODE_HS_SGMII), 88 + /* lane 1 */ 89 + MVEBU_A3700_COMPHY_CONF_GEN(1, PHY_MODE_PCIE, 0, 90 + COMPHY_FW_MODE_PCIE), 91 + MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_SGMII, 0, 92 + COMPHY_FW_MODE_SGMII), 93 + MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_2500BASEX, 0, 94 + COMPHY_FW_MODE_HS_SGMII), 95 + /* lane 2 */ 96 + MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_SATA, 0, 97 + COMPHY_FW_MODE_SATA), 98 + MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_USB_HOST_SS, 0, 99 + COMPHY_FW_MODE_USB3H), 100 + }; 101 + 102 + struct mvebu_a3700_comphy_lane { 103 + struct device *dev; 104 + unsigned int id; 105 + enum phy_mode mode; 106 + int submode; 107 + int port; 108 + }; 109 + 110 + static int mvebu_a3700_comphy_smc(unsigned long function, unsigned long lane, 111 + unsigned long mode) 112 + { 113 + struct arm_smccc_res res; 114 + 115 + arm_smccc_smc(function, lane, mode, 0, 0, 0, 0, 0, &res); 116 + 117 + return res.a0; 118 + } 119 + 120 + static int mvebu_a3700_comphy_get_fw_mode(int lane, int port, 121 + enum phy_mode mode, 122 + int submode) 123 + { 124 + int i, n = ARRAY_SIZE(mvebu_a3700_comphy_modes); 125 + 126 + /* Unused PHY mux value is 0x0 */ 127 + if (mode == PHY_MODE_INVALID) 128 + return -EINVAL; 129 + 130 + for (i = 0; i < n; i++) { 131 + if (mvebu_a3700_comphy_modes[i].lane == lane && 132 + mvebu_a3700_comphy_modes[i].port == port && 133 + mvebu_a3700_comphy_modes[i].mode == mode && 134 + mvebu_a3700_comphy_modes[i].submode == submode) 135 + break; 136 + } 137 + 138 + if (i == n) 139 + return -EINVAL; 140 + 141 + return mvebu_a3700_comphy_modes[i].fw_mode; 142 + } 143 + 144 + static int mvebu_a3700_comphy_set_mode(struct phy *phy, enum phy_mode mode, 145 + int submode) 146 + { 147 + struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); 148 + int fw_mode; 149 + 150 + if (submode == PHY_INTERFACE_MODE_1000BASEX) 151 + submode = PHY_INTERFACE_MODE_SGMII; 152 + 153 + fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, lane->port, mode, 154 + submode); 155 + if (fw_mode < 0) { 156 + dev_err(lane->dev, "invalid COMPHY mode\n"); 157 + return fw_mode; 158 + } 159 + 160 + /* Just remember the mode, ->power_on() will do the real setup */ 161 + lane->mode = mode; 162 + lane->submode = submode; 163 + 164 + return 0; 165 + } 166 + 167 + static int mvebu_a3700_comphy_power_on(struct phy *phy) 168 + { 169 + struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); 170 + u32 fw_param; 171 + int fw_mode; 172 + 173 + fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, lane->port, 174 + lane->mode, lane->submode); 175 + if (fw_mode < 0) { 176 + dev_err(lane->dev, "invalid COMPHY mode\n"); 177 + return fw_mode; 178 + } 179 + 180 + switch (lane->mode) { 181 + case PHY_MODE_USB_HOST_SS: 182 + dev_dbg(lane->dev, "set lane %d to USB3 host mode\n", lane->id); 183 + fw_param = COMPHY_FW_MODE(fw_mode); 184 + break; 185 + case PHY_MODE_SATA: 186 + dev_dbg(lane->dev, "set lane %d to SATA mode\n", lane->id); 187 + fw_param = COMPHY_FW_MODE(fw_mode); 188 + break; 189 + case PHY_MODE_ETHERNET: 190 + switch (lane->submode) { 191 + case PHY_INTERFACE_MODE_SGMII: 192 + dev_dbg(lane->dev, "set lane %d to SGMII mode\n", 193 + lane->id); 194 + fw_param = COMPHY_FW_NET(fw_mode, lane->port, 195 + COMPHY_FW_SPEED_1_25G); 196 + break; 197 + case PHY_INTERFACE_MODE_2500BASEX: 198 + dev_dbg(lane->dev, "set lane %d to HS SGMII mode\n", 199 + lane->id); 200 + fw_param = COMPHY_FW_NET(fw_mode, lane->port, 201 + COMPHY_FW_SPEED_3_125G); 202 + break; 203 + default: 204 + dev_err(lane->dev, "unsupported PHY submode (%d)\n", 205 + lane->submode); 206 + return -ENOTSUPP; 207 + } 208 + break; 209 + case PHY_MODE_PCIE: 210 + dev_dbg(lane->dev, "set lane %d to PCIe mode\n", lane->id); 211 + fw_param = COMPHY_FW_PCIE(fw_mode, lane->port, 212 + COMPHY_FW_SPEED_5G, 213 + phy->attrs.bus_width); 214 + break; 215 + default: 216 + dev_err(lane->dev, "unsupported PHY mode (%d)\n", lane->mode); 217 + return -ENOTSUPP; 218 + } 219 + 220 + return mvebu_a3700_comphy_smc(COMPHY_SIP_POWER_ON, lane->id, fw_param); 221 + } 222 + 223 + static int mvebu_a3700_comphy_power_off(struct phy *phy) 224 + { 225 + struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); 226 + 227 + return mvebu_a3700_comphy_smc(COMPHY_SIP_POWER_OFF, lane->id, 0); 228 + } 229 + 230 + static const struct phy_ops mvebu_a3700_comphy_ops = { 231 + .power_on = mvebu_a3700_comphy_power_on, 232 + .power_off = mvebu_a3700_comphy_power_off, 233 + .set_mode = mvebu_a3700_comphy_set_mode, 234 + .owner = THIS_MODULE, 235 + }; 236 + 237 + static struct phy *mvebu_a3700_comphy_xlate(struct device *dev, 238 + struct of_phandle_args *args) 239 + { 240 + struct mvebu_a3700_comphy_lane *lane; 241 + struct phy *phy; 242 + 243 + if (WARN_ON(args->args[0] >= MVEBU_A3700_COMPHY_PORTS)) 244 + return ERR_PTR(-EINVAL); 245 + 246 + phy = of_phy_simple_xlate(dev, args); 247 + if (IS_ERR(phy)) 248 + return phy; 249 + 250 + lane = phy_get_drvdata(phy); 251 + lane->port = args->args[0]; 252 + 253 + return phy; 254 + } 255 + 256 + static int mvebu_a3700_comphy_probe(struct platform_device *pdev) 257 + { 258 + struct phy_provider *provider; 259 + struct device_node *child; 260 + 261 + for_each_available_child_of_node(pdev->dev.of_node, child) { 262 + struct mvebu_a3700_comphy_lane *lane; 263 + struct phy *phy; 264 + int ret; 265 + u32 lane_id; 266 + 267 + ret = of_property_read_u32(child, "reg", &lane_id); 268 + if (ret < 0) { 269 + dev_err(&pdev->dev, "missing 'reg' property (%d)\n", 270 + ret); 271 + continue; 272 + } 273 + 274 + if (lane_id >= MVEBU_A3700_COMPHY_LANES) { 275 + dev_err(&pdev->dev, "invalid 'reg' property\n"); 276 + continue; 277 + } 278 + 279 + lane = devm_kzalloc(&pdev->dev, sizeof(*lane), GFP_KERNEL); 280 + if (!lane) 281 + return -ENOMEM; 282 + 283 + phy = devm_phy_create(&pdev->dev, child, 284 + &mvebu_a3700_comphy_ops); 285 + if (IS_ERR(phy)) 286 + return PTR_ERR(phy); 287 + 288 + lane->dev = &pdev->dev; 289 + lane->mode = PHY_MODE_INVALID; 290 + lane->submode = PHY_INTERFACE_MODE_NA; 291 + lane->id = lane_id; 292 + lane->port = -1; 293 + phy_set_drvdata(phy, lane); 294 + } 295 + 296 + provider = devm_of_phy_provider_register(&pdev->dev, 297 + mvebu_a3700_comphy_xlate); 298 + return PTR_ERR_OR_ZERO(provider); 299 + } 300 + 301 + static const struct of_device_id mvebu_a3700_comphy_of_match_table[] = { 302 + { .compatible = "marvell,comphy-a3700" }, 303 + { }, 304 + }; 305 + MODULE_DEVICE_TABLE(of, mvebu_a3700_comphy_of_match_table); 306 + 307 + static struct platform_driver mvebu_a3700_comphy_driver = { 308 + .probe = mvebu_a3700_comphy_probe, 309 + .driver = { 310 + .name = "mvebu-a3700-comphy", 311 + .of_match_table = mvebu_a3700_comphy_of_match_table, 312 + }, 313 + }; 314 + module_platform_driver(mvebu_a3700_comphy_driver); 315 + 316 + MODULE_AUTHOR("Miquèl Raynal <miquel.raynal@bootlin.com>"); 317 + MODULE_DESCRIPTION("Common PHY driver for A3700"); 318 + MODULE_LICENSE("GPL v2");
+278
drivers/phy/marvell/phy-mvebu-a3700-utmi.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Copyright (C) 2018 Marvell 4 + * 5 + * Authors: 6 + * Igal Liberman <igall@marvell.com> 7 + * Miquèl Raynal <miquel.raynal@bootlin.com> 8 + * 9 + * Marvell A3700 UTMI PHY driver 10 + */ 11 + 12 + #include <linux/io.h> 13 + #include <linux/iopoll.h> 14 + #include <linux/mfd/syscon.h> 15 + #include <linux/module.h> 16 + #include <linux/of_device.h> 17 + #include <linux/phy/phy.h> 18 + #include <linux/platform_device.h> 19 + #include <linux/regmap.h> 20 + 21 + /* Armada 3700 UTMI PHY registers */ 22 + #define USB2_PHY_PLL_CTRL_REG0 0x0 23 + #define PLL_REF_DIV_OFF 0 24 + #define PLL_REF_DIV_MASK GENMASK(6, 0) 25 + #define PLL_REF_DIV_5 5 26 + #define PLL_FB_DIV_OFF 16 27 + #define PLL_FB_DIV_MASK GENMASK(24, 16) 28 + #define PLL_FB_DIV_96 96 29 + #define PLL_SEL_LPFR_OFF 28 30 + #define PLL_SEL_LPFR_MASK GENMASK(29, 28) 31 + #define PLL_READY BIT(31) 32 + #define USB2_PHY_CAL_CTRL 0x8 33 + #define PHY_PLLCAL_DONE BIT(31) 34 + #define PHY_IMPCAL_DONE BIT(23) 35 + #define USB2_RX_CHAN_CTRL1 0x18 36 + #define USB2PHY_SQCAL_DONE BIT(31) 37 + #define USB2_PHY_OTG_CTRL 0x34 38 + #define PHY_PU_OTG BIT(4) 39 + #define USB2_PHY_CHRGR_DETECT 0x38 40 + #define PHY_CDP_EN BIT(2) 41 + #define PHY_DCP_EN BIT(3) 42 + #define PHY_PD_EN BIT(4) 43 + #define PHY_PU_CHRG_DTC BIT(5) 44 + #define PHY_CDP_DM_AUTO BIT(7) 45 + #define PHY_ENSWITCH_DP BIT(12) 46 + #define PHY_ENSWITCH_DM BIT(13) 47 + 48 + /* Armada 3700 USB miscellaneous registers */ 49 + #define USB2_PHY_CTRL(usb32) (usb32 ? 0x20 : 0x4) 50 + #define RB_USB2PHY_PU BIT(0) 51 + #define USB2_DP_PULLDN_DEV_MODE BIT(5) 52 + #define USB2_DM_PULLDN_DEV_MODE BIT(6) 53 + #define RB_USB2PHY_SUSPM(usb32) (usb32 ? BIT(14) : BIT(7)) 54 + 55 + #define PLL_LOCK_DELAY_US 10000 56 + #define PLL_LOCK_TIMEOUT_US 1000000 57 + 58 + /** 59 + * struct mvebu_a3700_utmi_caps - PHY capabilities 60 + * 61 + * @usb32: Flag indicating which PHY is in use (impacts the register map): 62 + * - The UTMI PHY wired to the USB3/USB2 controller (otg) 63 + * - The UTMI PHY wired to the USB2 controller (host only) 64 + * @ops: PHY operations 65 + */ 66 + struct mvebu_a3700_utmi_caps { 67 + int usb32; 68 + const struct phy_ops *ops; 69 + }; 70 + 71 + /** 72 + * struct mvebu_a3700_utmi - PHY driver data 73 + * 74 + * @regs: PHY registers 75 + * @usb_mis: Regmap with USB miscellaneous registers including PHY ones 76 + * @caps: PHY capabilities 77 + * @phy: PHY handle 78 + */ 79 + struct mvebu_a3700_utmi { 80 + void __iomem *regs; 81 + struct regmap *usb_misc; 82 + const struct mvebu_a3700_utmi_caps *caps; 83 + struct phy *phy; 84 + }; 85 + 86 + static int mvebu_a3700_utmi_phy_power_on(struct phy *phy) 87 + { 88 + struct mvebu_a3700_utmi *utmi = phy_get_drvdata(phy); 89 + struct device *dev = &phy->dev; 90 + int usb32 = utmi->caps->usb32; 91 + int ret = 0; 92 + u32 reg; 93 + 94 + /* 95 + * Setup PLL. 40MHz clock used to be the default, being 25MHz now. 96 + * See "PLL Settings for Typical REFCLK" table. 97 + */ 98 + reg = readl(utmi->regs + USB2_PHY_PLL_CTRL_REG0); 99 + reg &= ~(PLL_REF_DIV_MASK | PLL_FB_DIV_MASK | PLL_SEL_LPFR_MASK); 100 + reg |= (PLL_REF_DIV_5 << PLL_REF_DIV_OFF) | 101 + (PLL_FB_DIV_96 << PLL_FB_DIV_OFF); 102 + writel(reg, utmi->regs + USB2_PHY_PLL_CTRL_REG0); 103 + 104 + /* Enable PHY pull up and disable USB2 suspend */ 105 + regmap_update_bits(utmi->usb_misc, USB2_PHY_CTRL(usb32), 106 + RB_USB2PHY_SUSPM(usb32) | RB_USB2PHY_PU, 107 + RB_USB2PHY_SUSPM(usb32) | RB_USB2PHY_PU); 108 + 109 + if (usb32) { 110 + /* Power up OTG module */ 111 + reg = readl(utmi->regs + USB2_PHY_OTG_CTRL); 112 + reg |= PHY_PU_OTG; 113 + writel(reg, utmi->regs + USB2_PHY_OTG_CTRL); 114 + 115 + /* Disable PHY charger detection */ 116 + reg = readl(utmi->regs + USB2_PHY_CHRGR_DETECT); 117 + reg &= ~(PHY_CDP_EN | PHY_DCP_EN | PHY_PD_EN | PHY_PU_CHRG_DTC | 118 + PHY_CDP_DM_AUTO | PHY_ENSWITCH_DP | PHY_ENSWITCH_DM); 119 + writel(reg, utmi->regs + USB2_PHY_CHRGR_DETECT); 120 + 121 + /* Disable PHY DP/DM pull-down (used for device mode) */ 122 + regmap_update_bits(utmi->usb_misc, USB2_PHY_CTRL(usb32), 123 + USB2_DP_PULLDN_DEV_MODE | 124 + USB2_DM_PULLDN_DEV_MODE, 0); 125 + } 126 + 127 + /* Wait for PLL calibration */ 128 + ret = readl_poll_timeout(utmi->regs + USB2_PHY_CAL_CTRL, reg, 129 + reg & PHY_PLLCAL_DONE, 130 + PLL_LOCK_DELAY_US, PLL_LOCK_TIMEOUT_US); 131 + if (ret) { 132 + dev_err(dev, "Failed to end USB2 PLL calibration\n"); 133 + return ret; 134 + } 135 + 136 + /* Wait for impedance calibration */ 137 + ret = readl_poll_timeout(utmi->regs + USB2_PHY_CAL_CTRL, reg, 138 + reg & PHY_IMPCAL_DONE, 139 + PLL_LOCK_DELAY_US, PLL_LOCK_TIMEOUT_US); 140 + if (ret) { 141 + dev_err(dev, "Failed to end USB2 impedance calibration\n"); 142 + return ret; 143 + } 144 + 145 + /* Wait for squelch calibration */ 146 + ret = readl_poll_timeout(utmi->regs + USB2_RX_CHAN_CTRL1, reg, 147 + reg & USB2PHY_SQCAL_DONE, 148 + PLL_LOCK_DELAY_US, PLL_LOCK_TIMEOUT_US); 149 + if (ret) { 150 + dev_err(dev, "Failed to end USB2 unknown calibration\n"); 151 + return ret; 152 + } 153 + 154 + /* Wait for PLL to be locked */ 155 + ret = readl_poll_timeout(utmi->regs + USB2_PHY_PLL_CTRL_REG0, reg, 156 + reg & PLL_READY, 157 + PLL_LOCK_DELAY_US, PLL_LOCK_TIMEOUT_US); 158 + if (ret) 159 + dev_err(dev, "Failed to lock USB2 PLL\n"); 160 + 161 + return ret; 162 + } 163 + 164 + static int mvebu_a3700_utmi_phy_power_off(struct phy *phy) 165 + { 166 + struct mvebu_a3700_utmi *utmi = phy_get_drvdata(phy); 167 + int usb32 = utmi->caps->usb32; 168 + u32 reg; 169 + 170 + /* Disable PHY pull-up and enable USB2 suspend */ 171 + reg = readl(utmi->regs + USB2_PHY_CTRL(usb32)); 172 + reg &= ~(RB_USB2PHY_PU | RB_USB2PHY_SUSPM(usb32)); 173 + writel(reg, utmi->regs + USB2_PHY_CTRL(usb32)); 174 + 175 + /* Power down OTG module */ 176 + if (usb32) { 177 + reg = readl(utmi->regs + USB2_PHY_OTG_CTRL); 178 + reg &= ~PHY_PU_OTG; 179 + writel(reg, utmi->regs + USB2_PHY_OTG_CTRL); 180 + } 181 + 182 + return 0; 183 + } 184 + 185 + static const struct phy_ops mvebu_a3700_utmi_phy_ops = { 186 + .power_on = mvebu_a3700_utmi_phy_power_on, 187 + .power_off = mvebu_a3700_utmi_phy_power_off, 188 + .owner = THIS_MODULE, 189 + }; 190 + 191 + static const struct mvebu_a3700_utmi_caps mvebu_a3700_utmi_otg_phy_caps = { 192 + .usb32 = true, 193 + .ops = &mvebu_a3700_utmi_phy_ops, 194 + }; 195 + 196 + static const struct mvebu_a3700_utmi_caps mvebu_a3700_utmi_host_phy_caps = { 197 + .usb32 = false, 198 + .ops = &mvebu_a3700_utmi_phy_ops, 199 + }; 200 + 201 + static const struct of_device_id mvebu_a3700_utmi_of_match[] = { 202 + { 203 + .compatible = "marvell,a3700-utmi-otg-phy", 204 + .data = &mvebu_a3700_utmi_otg_phy_caps, 205 + }, 206 + { 207 + .compatible = "marvell,a3700-utmi-host-phy", 208 + .data = &mvebu_a3700_utmi_host_phy_caps, 209 + }, 210 + {}, 211 + }; 212 + MODULE_DEVICE_TABLE(of, mvebu_a3700_utmi_of_match); 213 + 214 + static int mvebu_a3700_utmi_phy_probe(struct platform_device *pdev) 215 + { 216 + struct device *dev = &pdev->dev; 217 + struct mvebu_a3700_utmi *utmi; 218 + struct phy_provider *provider; 219 + struct resource *res; 220 + 221 + utmi = devm_kzalloc(dev, sizeof(*utmi), GFP_KERNEL); 222 + if (!utmi) 223 + return -ENOMEM; 224 + 225 + /* Get UTMI memory region */ 226 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 227 + if (!res) { 228 + dev_err(dev, "Missing UTMI PHY memory resource\n"); 229 + return -ENODEV; 230 + } 231 + 232 + utmi->regs = devm_ioremap_resource(dev, res); 233 + if (IS_ERR(utmi->regs)) 234 + return PTR_ERR(utmi->regs); 235 + 236 + /* Get miscellaneous Host/PHY region */ 237 + utmi->usb_misc = syscon_regmap_lookup_by_phandle(dev->of_node, 238 + "marvell,usb-misc-reg"); 239 + if (IS_ERR(utmi->usb_misc)) { 240 + dev_err(dev, 241 + "Missing USB misc purpose system controller\n"); 242 + return PTR_ERR(utmi->usb_misc); 243 + } 244 + 245 + /* Retrieve PHY capabilities */ 246 + utmi->caps = of_device_get_match_data(dev); 247 + 248 + /* Instantiate the PHY */ 249 + utmi->phy = devm_phy_create(dev, NULL, utmi->caps->ops); 250 + if (IS_ERR(utmi->phy)) { 251 + dev_err(dev, "Failed to create the UTMI PHY\n"); 252 + return PTR_ERR(utmi->phy); 253 + } 254 + 255 + phy_set_drvdata(utmi->phy, utmi); 256 + 257 + /* Ensure the PHY is powered off */ 258 + utmi->caps->ops->power_off(utmi->phy); 259 + 260 + provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); 261 + 262 + return PTR_ERR_OR_ZERO(provider); 263 + } 264 + 265 + static struct platform_driver mvebu_a3700_utmi_driver = { 266 + .probe = mvebu_a3700_utmi_phy_probe, 267 + .driver = { 268 + .name = "mvebu-a3700-utmi-phy", 269 + .owner = THIS_MODULE, 270 + .of_match_table = mvebu_a3700_utmi_of_match, 271 + }, 272 + }; 273 + module_platform_driver(mvebu_a3700_utmi_driver); 274 + 275 + MODULE_AUTHOR("Igal Liberman <igall@marvell.com>"); 276 + MODULE_AUTHOR("Miquel Raynal <miquel.raynal@bootlin.com>"); 277 + MODULE_DESCRIPTION("Marvell EBU A3700 UTMI PHY driver"); 278 + MODULE_LICENSE("GPL v2");
-2
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
··· 580 580 return phy; 581 581 582 582 lane = phy_get_drvdata(phy); 583 - if (lane->port >= 0) 584 - return ERR_PTR(-EBUSY); 585 583 lane->port = args->args[0]; 586 584 587 585 return phy;
+2 -7
drivers/phy/marvell/phy-mvebu-sata.c
··· 10 10 */ 11 11 12 12 #include <linux/kernel.h> 13 - #include <linux/module.h> 13 + #include <linux/init.h> 14 14 #include <linux/clk.h> 15 15 #include <linux/phy/phy.h> 16 16 #include <linux/io.h> ··· 122 122 { .compatible = "marvell,mvebu-sata-phy" }, 123 123 { }, 124 124 }; 125 - MODULE_DEVICE_TABLE(of, phy_mvebu_sata_of_match); 126 125 127 126 static struct platform_driver phy_mvebu_sata_driver = { 128 127 .probe = phy_mvebu_sata_probe, ··· 130 131 .of_match_table = phy_mvebu_sata_of_match, 131 132 } 132 133 }; 133 - module_platform_driver(phy_mvebu_sata_driver); 134 - 135 - MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch>"); 136 - MODULE_DESCRIPTION("Marvell MVEBU SATA PHY driver"); 137 - MODULE_LICENSE("GPL v2"); 134 + builtin_platform_driver(phy_mvebu_sata_driver);
+4 -4
drivers/phy/phy-core-mipi-dphy.c
··· 65 65 */ 66 66 cfg->hs_trail = max(4 * 8 * ui, 60000 + 4 * 4 * ui); 67 67 68 - cfg->init = 100000000; 68 + cfg->init = 100; 69 69 cfg->lpx = 60000; 70 70 cfg->ta_get = 5 * cfg->lpx; 71 71 cfg->ta_go = 4 * cfg->lpx; 72 72 cfg->ta_sure = 2 * cfg->lpx; 73 - cfg->wakeup = 1000000000; 73 + cfg->wakeup = 1000; 74 74 75 75 cfg->hs_clk_rate = hs_clk_rate; 76 76 cfg->lanes = lanes; ··· 143 143 if (cfg->hs_trail < max(8 * ui, 60000 + 4 * ui)) 144 144 return -EINVAL; 145 145 146 - if (cfg->init < 100000000) 146 + if (cfg->init < 100) 147 147 return -EINVAL; 148 148 149 149 if (cfg->lpx < 50000) ··· 158 158 if (cfg->ta_sure < cfg->lpx || cfg->ta_sure > (2 * cfg->lpx)) 159 159 return -EINVAL; 160 160 161 - if (cfg->wakeup < 1000000000) 161 + if (cfg->wakeup < 1000) 162 162 return -EINVAL; 163 163 164 164 return 0;
+1 -11
drivers/phy/phy-core.c
··· 1112 1112 1113 1113 return 0; 1114 1114 } 1115 - module_init(phy_core_init); 1116 - 1117 - static void __exit phy_core_exit(void) 1118 - { 1119 - class_destroy(phy_class); 1120 - } 1121 - module_exit(phy_core_exit); 1122 - 1123 - MODULE_DESCRIPTION("Generic PHY Framework"); 1124 - MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>"); 1125 - MODULE_LICENSE("GPL v2"); 1115 + device_initcall(phy_core_init);
+143
drivers/phy/qualcomm/phy-qcom-qmp.c
··· 687 687 QMP_PHY_INIT_CFG(QPHY_V3_PCS_MULTI_LANE_CTRL1, 0x02), 688 688 }; 689 689 690 + static const struct qmp_phy_init_tbl msm8998_usb3_serdes_tbl[] = { 691 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_CLK_SELECT, 0x30), 692 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN, 0x04), 693 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_SYSCLK_EN_SEL, 0x14), 694 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_SYS_CLK_CTRL, 0x06), 695 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_RESETSM_CNTRL2, 0x08), 696 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_CMN_CONFIG, 0x06), 697 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_SVS_MODE_CLK_SEL, 0x01), 698 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_HSCLK_SEL, 0x80), 699 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_DEC_START_MODE0, 0x82), 700 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_DIV_FRAC_START1_MODE0, 0xab), 701 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_DIV_FRAC_START2_MODE0, 0xea), 702 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_DIV_FRAC_START3_MODE0, 0x02), 703 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_CP_CTRL_MODE0, 0x06), 704 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_PLL_RCTRL_MODE0, 0x16), 705 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_PLL_CCTRL_MODE0, 0x36), 706 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_INTEGLOOP_GAIN1_MODE0, 0x00), 707 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_INTEGLOOP_GAIN0_MODE0, 0x3f), 708 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_VCO_TUNE2_MODE0, 0x01), 709 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_VCO_TUNE1_MODE0, 0xc9), 710 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_CORECLK_DIV_MODE0, 0x0a), 711 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP3_MODE0, 0x00), 712 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP2_MODE0, 0x34), 713 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP1_MODE0, 0x15), 714 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP_EN, 0x04), 715 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_CORE_CLK_EN, 0x00), 716 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP_CFG, 0x00), 717 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_VCO_TUNE_MAP, 0x00), 718 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_BG_TIMER, 0x0a), 719 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_PLL_IVCO, 0x07), 720 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_INTEGLOOP_INITVAL, 0x80), 721 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_CMN_MODE, 0x01), 722 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_SSC_EN_CENTER, 0x01), 723 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_SSC_PER1, 0x31), 724 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_SSC_PER2, 0x01), 725 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_SSC_ADJ_PER1, 0x00), 726 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_SSC_ADJ_PER2, 0x00), 727 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_SSC_STEP_SIZE1, 0x85), 728 + QMP_PHY_INIT_CFG(QSERDES_V3_COM_SSC_STEP_SIZE2, 0x07), 729 + }; 730 + 731 + static const struct qmp_phy_init_tbl msm8998_usb3_tx_tbl[] = { 732 + QMP_PHY_INIT_CFG(QSERDES_V3_TX_HIGHZ_DRVR_EN, 0x10), 733 + QMP_PHY_INIT_CFG(QSERDES_V3_TX_RCV_DETECT_LVL_2, 0x12), 734 + QMP_PHY_INIT_CFG(QSERDES_V3_TX_LANE_MODE_1, 0x16), 735 + QMP_PHY_INIT_CFG(QSERDES_V3_TX_RES_CODE_LANE_OFFSET_TX, 0x00), 736 + }; 737 + 738 + static const struct qmp_phy_init_tbl msm8998_usb3_rx_tbl[] = { 739 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_FASTLOCK_FO_GAIN, 0x0b), 740 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL2, 0x0f), 741 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL3, 0x4e), 742 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL4, 0x18), 743 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1, 0x07), 744 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_OFFSET_ADAPTOR_CNTRL2, 0x80), 745 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_SIGDET_CNTRL, 0x43), 746 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_SIGDET_DEGLITCH_CNTRL, 0x1c), 747 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_SO_SATURATION_AND_ENABLE, 0x75), 748 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_FASTLOCK_COUNT_LOW, 0x00), 749 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_FASTLOCK_COUNT_HIGH, 0x00), 750 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_PI_CONTROLS, 0x80), 751 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_FO_GAIN, 0x0a), 752 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_SO_GAIN, 0x06), 753 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_SIGDET_ENABLES, 0x00), 754 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_VGA_CAL_CNTRL2, 0x03), 755 + QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_MODE_00, 0x05), 756 + }; 757 + 758 + static const struct qmp_phy_init_tbl msm8998_usb3_pcs_tbl[] = { 759 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_FLL_CNTRL2, 0x83), 760 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_FLL_CNT_VAL_L, 0x09), 761 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_FLL_CNT_VAL_H_TOL, 0xa2), 762 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_FLL_MAN_CODE, 0x40), 763 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_FLL_CNTRL1, 0x02), 764 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_LOCK_DETECT_CONFIG1, 0xd1), 765 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_LOCK_DETECT_CONFIG2, 0x1f), 766 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_LOCK_DETECT_CONFIG3, 0x47), 767 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_POWER_STATE_CONFIG2, 0x1b), 768 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXMGN_V0, 0x9f), 769 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXMGN_V1, 0x9f), 770 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXMGN_V2, 0xb7), 771 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXMGN_V3, 0x4e), 772 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXMGN_V4, 0x65), 773 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXMGN_LS, 0x6b), 774 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M6DB_V0, 0x15), 775 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M3P5DB_V0, 0x0d), 776 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TX_LARGE_AMP_DRV_LVL, 0x15), 777 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M3P5DB_V1, 0x0d), 778 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M6DB_V2, 0x15), 779 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M3P5DB_V2, 0x0d), 780 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M6DB_V3, 0x15), 781 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M3P5DB_V3, 0x0d), 782 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M6DB_V4, 0x15), 783 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M3P5DB_V4, 0x0d), 784 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M6DB_LS, 0x15), 785 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M3P5DB_LS, 0x0d), 786 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_RATE_SLEW_CNTRL, 0x02), 787 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_PWRUP_RESET_DLY_TIME_AUXCLK, 0x04), 788 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_TSYNC_RSYNC_TIME, 0x44), 789 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7), 790 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03), 791 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_RCVR_DTCT_DLY_U3_L, 0x40), 792 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_RCVR_DTCT_DLY_U3_H, 0x00), 793 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_RX_SIGDET_LVL, 0x8a), 794 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_RXEQTRAINING_WAIT_TIME, 0x75), 795 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_LFPS_TX_ECSTART_EQTLOCK, 0x86), 796 + QMP_PHY_INIT_CFG(QPHY_V3_PCS_RXEQTRAINING_RUN_TIME, 0x13), 797 + }; 798 + 799 + 690 800 /* struct qmp_phy_cfg - per-PHY initialization config */ 691 801 struct qmp_phy_cfg { 692 802 /* phy-type - PCIE/UFS/USB */ ··· 1144 1034 1145 1035 .is_dual_lane_phy = true, 1146 1036 .no_pcs_sw_reset = true, 1037 + }; 1038 + 1039 + static const struct qmp_phy_cfg msm8998_usb3phy_cfg = { 1040 + .type = PHY_TYPE_USB3, 1041 + .nlanes = 1, 1042 + 1043 + .serdes_tbl = msm8998_usb3_serdes_tbl, 1044 + .serdes_tbl_num = ARRAY_SIZE(msm8998_usb3_serdes_tbl), 1045 + .tx_tbl = msm8998_usb3_tx_tbl, 1046 + .tx_tbl_num = ARRAY_SIZE(msm8998_usb3_tx_tbl), 1047 + .rx_tbl = msm8998_usb3_rx_tbl, 1048 + .rx_tbl_num = ARRAY_SIZE(msm8998_usb3_rx_tbl), 1049 + .pcs_tbl = msm8998_usb3_pcs_tbl, 1050 + .pcs_tbl_num = ARRAY_SIZE(msm8998_usb3_pcs_tbl), 1051 + .clk_list = msm8996_phy_clk_l, 1052 + .num_clks = ARRAY_SIZE(msm8996_phy_clk_l), 1053 + .reset_list = msm8996_usb3phy_reset_l, 1054 + .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), 1055 + .vreg_list = qmp_phy_vreg_l, 1056 + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), 1057 + .regs = qmp_v3_usb3phy_regs_layout, 1058 + 1059 + .start_ctrl = SERDES_START | PCS_START, 1060 + .pwrdn_ctrl = SW_PWRDN, 1061 + .mask_pcs_ready = PHYSTATUS, 1062 + 1063 + .is_dual_lane_phy = true, 1147 1064 }; 1148 1065 1149 1066 static void qcom_qmp_phy_configure(void __iomem *base, ··· 1873 1736 .compatible = "qcom,msm8996-qmp-usb3-phy", 1874 1737 .data = &msm8996_usb3phy_cfg, 1875 1738 }, { 1739 + .compatible = "qcom,msm8998-qmp-ufs-phy", 1740 + .data = &sdm845_ufsphy_cfg, 1741 + }, { 1876 1742 .compatible = "qcom,ipq8074-qmp-pcie-phy", 1877 1743 .data = &ipq8074_pciephy_cfg, 1878 1744 }, { ··· 1887 1747 }, { 1888 1748 .compatible = "qcom,sdm845-qmp-ufs-phy", 1889 1749 .data = &sdm845_ufsphy_cfg, 1750 + }, { 1751 + .compatible = "qcom,msm8998-qmp-usb3-phy", 1752 + .data = &msm8998_usb3phy_cfg, 1890 1753 }, 1891 1754 { }, 1892 1755 };
+4
drivers/phy/qualcomm/phy-qcom-qmp.h
··· 174 174 #define QSERDES_V3_COM_DIV_FRAC_START1_MODE1 0x0c4 175 175 #define QSERDES_V3_COM_DIV_FRAC_START2_MODE1 0x0c8 176 176 #define QSERDES_V3_COM_DIV_FRAC_START3_MODE1 0x0cc 177 + #define QSERDES_V3_COM_INTEGLOOP_INITVAL 0x0d0 177 178 #define QSERDES_V3_COM_INTEGLOOP_GAIN0_MODE0 0x0d8 178 179 #define QSERDES_V3_COM_INTEGLOOP_GAIN1_MODE0 0x0dc 179 180 #define QSERDES_V3_COM_INTEGLOOP_GAIN0_MODE1 0x0e0 ··· 202 201 #define QSERDES_V3_COM_DEBUG_BUS2 0x170 203 202 #define QSERDES_V3_COM_DEBUG_BUS3 0x174 204 203 #define QSERDES_V3_COM_DEBUG_BUS_SEL 0x178 204 + #define QSERDES_V3_COM_CMN_MODE 0x184 205 205 206 206 /* Only for QMP V3 PHY - TX registers */ 207 207 #define QSERDES_V3_TX_RES_CODE_LANE_OFFSET_TX 0x044 ··· 213 211 #define QSERDES_V3_TX_RCV_DETECT_LVL_2 0x0a4 214 212 215 213 /* Only for QMP V3 PHY - RX registers */ 214 + #define QSERDES_V3_RX_UCDR_FO_GAIN 0x008 216 215 #define QSERDES_V3_RX_UCDR_SO_GAIN_HALF 0x00c 217 216 #define QSERDES_V3_RX_UCDR_SO_GAIN 0x014 218 217 #define QSERDES_V3_RX_UCDR_SVS_SO_GAIN_HALF 0x024 ··· 222 219 #define QSERDES_V3_RX_UCDR_FASTLOCK_FO_GAIN 0x030 223 220 #define QSERDES_V3_RX_UCDR_SO_SATURATION_AND_ENABLE 0x034 224 221 #define QSERDES_V3_RX_UCDR_FASTLOCK_COUNT_LOW 0x03c 222 + #define QSERDES_V3_RX_UCDR_FASTLOCK_COUNT_HIGH 0x040 225 223 #define QSERDES_V3_RX_UCDR_PI_CONTROLS 0x044 226 224 #define QSERDES_V3_RX_RX_TERM_BW 0x07c 227 225 #define QSERDES_V3_RX_VGA_CAL_CNTRL1 0x0bc
+40
drivers/phy/qualcomm/phy-qcom-qusb2.c
··· 152 152 QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_PWR_CTRL, 0x00), 153 153 }; 154 154 155 + static const unsigned int msm8998_regs_layout[] = { 156 + [QUSB2PHY_PLL_CORE_INPUT_OVERRIDE] = 0xa8, 157 + [QUSB2PHY_PLL_STATUS] = 0x1a0, 158 + [QUSB2PHY_PORT_TUNE1] = 0x23c, 159 + [QUSB2PHY_PORT_TUNE2] = 0x240, 160 + [QUSB2PHY_PORT_TUNE3] = 0x244, 161 + [QUSB2PHY_PORT_TUNE4] = 0x248, 162 + [QUSB2PHY_PORT_TEST1] = 0x24c, 163 + [QUSB2PHY_PORT_TEST2] = 0x250, 164 + [QUSB2PHY_PORT_POWERDOWN] = 0x210, 165 + [QUSB2PHY_INTR_CTRL] = 0x22c, 166 + }; 167 + 168 + static const struct qusb2_phy_init_tbl msm8998_init_tbl[] = { 169 + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_ANALOG_CONTROLS_TWO, 0x13), 170 + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_CLOCK_INVERTERS, 0x7c), 171 + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_CMODE, 0x80), 172 + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_LOCK_DELAY, 0x0a), 173 + 174 + QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE1, 0xa5), 175 + QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE2, 0x09), 176 + 177 + QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_DIGITAL_TIMERS_TWO, 0x19), 178 + }; 179 + 155 180 static const unsigned int sdm845_regs_layout[] = { 156 181 [QUSB2PHY_PLL_CORE_INPUT_OVERRIDE] = 0xa8, 157 182 [QUSB2PHY_PLL_STATUS] = 0x1a0, ··· 244 219 .disable_ctrl = (CLAMP_N_EN | FREEZIO_N | POWER_DOWN), 245 220 .mask_core_ready = PLL_LOCKED, 246 221 .autoresume_en = BIT(3), 222 + }; 223 + 224 + static const struct qusb2_phy_cfg msm8998_phy_cfg = { 225 + .tbl = msm8998_init_tbl, 226 + .tbl_num = ARRAY_SIZE(msm8998_init_tbl), 227 + .regs = msm8998_regs_layout, 228 + 229 + .disable_ctrl = POWER_DOWN, 230 + .mask_core_ready = CORE_READY_STATUS, 231 + .has_pll_override = true, 232 + .autoresume_en = BIT(0), 233 + .update_tune1_with_efuse = true, 247 234 }; 248 235 249 236 static const struct qusb2_phy_cfg sdm845_phy_cfg = { ··· 770 733 { 771 734 .compatible = "qcom,msm8996-qusb2-phy", 772 735 .data = &msm8996_phy_cfg, 736 + }, { 737 + .compatible = "qcom,msm8998-qusb2-phy", 738 + .data = &msm8998_phy_cfg, 773 739 }, { 774 740 .compatible = "qcom,sdm845-qusb2-phy", 775 741 .data = &sdm845_phy_cfg,
+1 -18
drivers/phy/qualcomm/phy-qcom-ufs-i.h
··· 23 23 #include <linux/platform_device.h> 24 24 #include <linux/io.h> 25 25 #include <linux/delay.h> 26 - 27 - #define readl_poll_timeout(addr, val, cond, sleep_us, timeout_us) \ 28 - ({ \ 29 - ktime_t timeout = ktime_add_us(ktime_get(), timeout_us); \ 30 - might_sleep_if(timeout_us); \ 31 - for (;;) { \ 32 - (val) = readl(addr); \ 33 - if (cond) \ 34 - break; \ 35 - if (timeout_us && ktime_compare(ktime_get(), timeout) > 0) { \ 36 - (val) = readl(addr); \ 37 - break; \ 38 - } \ 39 - if (sleep_us) \ 40 - usleep_range(DIV_ROUND_UP(sleep_us, 4), sleep_us); \ 41 - } \ 42 - (cond) ? 0 : -ETIMEDOUT; \ 43 - }) 26 + #include <linux/iopoll.h> 44 27 45 28 #define UFS_QCOM_PHY_CAL_ENTRY(reg, val) \ 46 29 { \
+20 -28
drivers/phy/rockchip/phy-rockchip-inno-usb2.c
··· 55 55 }; 56 56 57 57 /** 58 - * Different states involved in USB charger detection. 59 - * USB_CHG_STATE_UNDEFINED USB charger is not connected or detection 58 + * enum usb_chg_state - Different states involved in USB charger detection. 59 + * @USB_CHG_STATE_UNDEFINED: USB charger is not connected or detection 60 60 * process is not yet started. 61 - * USB_CHG_STATE_WAIT_FOR_DCD Waiting for Data pins contact. 62 - * USB_CHG_STATE_DCD_DONE Data pin contact is detected. 63 - * USB_CHG_STATE_PRIMARY_DONE Primary detection is completed (Detects 61 + * @USB_CHG_STATE_WAIT_FOR_DCD: Waiting for Data pins contact. 62 + * @USB_CHG_STATE_DCD_DONE: Data pin contact is detected. 63 + * @USB_CHG_STATE_PRIMARY_DONE: Primary detection is completed (Detects 64 64 * between SDP and DCP/CDP). 65 - * USB_CHG_STATE_SECONDARY_DONE Secondary detection is completed (Detects 66 - * between DCP and CDP). 67 - * USB_CHG_STATE_DETECTED USB charger type is determined. 65 + * @USB_CHG_STATE_SECONDARY_DONE: Secondary detection is completed (Detects 66 + * between DCP and CDP). 67 + * @USB_CHG_STATE_DETECTED: USB charger type is determined. 68 68 */ 69 69 enum usb_chg_state { 70 70 USB_CHG_STATE_UNDEFINED = 0, ··· 94 94 }; 95 95 96 96 /** 97 - * struct rockchip_chg_det_reg: usb charger detect registers 97 + * struct rockchip_chg_det_reg - usb charger detect registers 98 98 * @cp_det: charging port detected successfully. 99 99 * @dcp_det: dedicated charging port detected successfully. 100 100 * @dp_det: assert data pin connect successfully. ··· 120 120 }; 121 121 122 122 /** 123 - * struct rockchip_usb2phy_port_cfg: usb-phy port configuration. 123 + * struct rockchip_usb2phy_port_cfg - usb-phy port configuration. 124 124 * @phy_sus: phy suspend register. 125 125 * @bvalid_det_en: vbus valid rise detection enable register. 126 126 * @bvalid_det_st: vbus valid rise detection status register. ··· 148 148 }; 149 149 150 150 /** 151 - * struct rockchip_usb2phy_cfg: usb-phy configuration. 151 + * struct rockchip_usb2phy_cfg - usb-phy configuration. 152 152 * @reg: the address offset of grf for usb-phy config. 153 153 * @num_ports: specify how many ports that the phy has. 154 154 * @clkout_ctl: keep on/turn off output clk of phy. 155 + * @port_cfgs: usb-phy port configurations. 155 156 * @chg_det: charger detection registers. 156 157 */ 157 158 struct rockchip_usb2phy_cfg { ··· 164 163 }; 165 164 166 165 /** 167 - * struct rockchip_usb2phy_port: usb-phy port data. 166 + * struct rockchip_usb2phy_port - usb-phy port data. 167 + * @phy: generic phy. 168 168 * @port_id: flag for otg port or host port. 169 169 * @suspended: phy suspended flag. 170 - * @utmi_avalid: utmi avalid status usage flag. 171 - * true - use avalid to get vbus status 172 - * flase - use bvalid to get vbus status 173 170 * @vbus_attached: otg device vbus status. 174 171 * @bvalid_irq: IRQ number assigned for vbus valid rise detection. 175 172 * @ls_irq: IRQ number assigned for linestate detection. ··· 177 178 * @chg_work: charge detect work. 178 179 * @otg_sm_work: OTG state machine work. 179 180 * @sm_work: HOST state machine work. 180 - * @phy_cfg: port register configuration, assigned by driver data. 181 + * @port_cfg: port register configuration, assigned by driver data. 181 182 * @event_nb: hold event notification callback. 182 183 * @state: define OTG enumeration states before device reset. 183 184 * @mode: the dr_mode of the controller. ··· 186 187 struct phy *phy; 187 188 unsigned int port_id; 188 189 bool suspended; 189 - bool utmi_avalid; 190 190 bool vbus_attached; 191 191 int bvalid_irq; 192 192 int ls_irq; ··· 201 203 }; 202 204 203 205 /** 204 - * struct rockchip_usb2phy: usb2.0 phy driver data. 206 + * struct rockchip_usb2phy - usb2.0 phy driver data. 207 + * @dev: pointer to device. 205 208 * @grf: General Register Files regmap. 206 209 * @usbgrf: USB General Register Files regmap. 207 210 * @clk: clock struct of phy input clk. 208 211 * @clk480m: clock struct of phy output clk. 209 - * @clk_hw: clock struct of phy output clk management. 212 + * @clk480m_hw: clock struct of phy output clk management. 210 213 * @chg_state: states involved in USB charger detection. 211 214 * @chg_type: USB charger types. 212 215 * @dcd_retries: The retry count used to track Data contact ··· 541 542 unsigned long delay; 542 543 bool vbus_attach, sch_work, notify_charger; 543 544 544 - if (rport->utmi_avalid) 545 - vbus_attach = property_enabled(rphy->grf, 546 - &rport->port_cfg->utmi_avalid); 547 - else 548 - vbus_attach = property_enabled(rphy->grf, 549 - &rport->port_cfg->utmi_bvalid); 545 + vbus_attach = property_enabled(rphy->grf, 546 + &rport->port_cfg->utmi_bvalid); 550 547 551 548 sch_work = false; 552 549 notify_charger = false; ··· 1015 1020 1016 1021 INIT_DELAYED_WORK(&rport->chg_work, rockchip_chg_detect_work); 1017 1022 INIT_DELAYED_WORK(&rport->otg_sm_work, rockchip_usb2phy_otg_sm_work); 1018 - 1019 - rport->utmi_avalid = 1020 - of_property_read_bool(child_np, "rockchip,utmi-avalid"); 1021 1023 1022 1024 /* 1023 1025 * Some SoCs use one interrupt with otg-id/otg-bvalid/linestate
+2 -4
drivers/phy/ti/Kconfig
··· 33 33 34 34 config OMAP_USB2 35 35 tristate "OMAP USB2 PHY Driver" 36 - depends on ARCH_OMAP2PLUS 36 + depends on ARCH_OMAP2PLUS || ARCH_K3 37 37 depends on USB_SUPPORT 38 38 select GENERIC_PHY 39 39 select USB_PHY 40 - select OMAP_CONTROL_PHY 41 - depends on OMAP_OCP2SCP 40 + select OMAP_CONTROL_PHY if ARCH_OMAP2PLUS 42 41 help 43 42 Enable this to support the transceiver that is part of SOC. This 44 43 driver takes care of all the PHY functionality apart from comparator. ··· 49 50 depends on ARCH_OMAP2PLUS || COMPILE_TEST 50 51 select GENERIC_PHY 51 52 select OMAP_CONTROL_PHY 52 - depends on OMAP_OCP2SCP 53 53 help 54 54 Enable this to support the PIPE3 PHY that is part of TI SOCs. This 55 55 driver takes care of all the PHY functionality apart from comparator.
+66 -43
drivers/phy/ti/phy-omap-usb2.c
··· 36 36 #define USB2PHY_DISCON_BYP_LATCH (1 << 31) 37 37 #define USB2PHY_ANA_CONFIG1 0x4c 38 38 39 + #define AM654_USB2_OTG_PD BIT(8) 40 + #define AM654_USB2_VBUS_DET_EN BIT(5) 41 + #define AM654_USB2_VBUSVALID_DET_EN BIT(4) 42 + 39 43 /** 40 44 * omap_usb2_set_comparator - links the comparator present in the sytem with 41 45 * this phy ··· 139 135 140 136 static int omap_usb2_disable_clocks(struct omap_usb *phy) 141 137 { 142 - clk_disable(phy->wkupclk); 138 + clk_disable_unprepare(phy->wkupclk); 143 139 if (!IS_ERR(phy->optclk)) 144 - clk_disable(phy->optclk); 140 + clk_disable_unprepare(phy->optclk); 145 141 146 142 return 0; 147 143 } ··· 150 146 { 151 147 int ret; 152 148 153 - ret = clk_enable(phy->wkupclk); 149 + ret = clk_prepare_enable(phy->wkupclk); 154 150 if (ret < 0) { 155 151 dev_err(phy->dev, "Failed to enable wkupclk %d\n", ret); 156 152 goto err0; 157 153 } 158 154 159 155 if (!IS_ERR(phy->optclk)) { 160 - ret = clk_enable(phy->optclk); 156 + ret = clk_prepare_enable(phy->optclk); 161 157 if (ret < 0) { 162 158 dev_err(phy->dev, "Failed to enable optclk %d\n", ret); 163 159 goto err1; ··· 249 245 .power_off = AM437X_USB2_PHY_PD | AM437X_USB2_OTG_PD, 250 246 }; 251 247 248 + static const struct usb_phy_data am654_usb2_data = { 249 + .label = "am654_usb2", 250 + .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT, 251 + .mask = AM654_USB2_OTG_PD | AM654_USB2_VBUS_DET_EN | 252 + AM654_USB2_VBUSVALID_DET_EN, 253 + .power_on = AM654_USB2_VBUS_DET_EN | AM654_USB2_VBUSVALID_DET_EN, 254 + .power_off = AM654_USB2_OTG_PD, 255 + }; 256 + 252 257 static const struct of_device_id omap_usb2_id_table[] = { 253 258 { 254 259 .compatible = "ti,omap-usb2", ··· 278 265 { 279 266 .compatible = "ti,am437x-usb2", 280 267 .data = &am437x_usb2_data, 268 + }, 269 + { 270 + .compatible = "ti,am654-usb2", 271 + .data = &am654_usb2_data, 281 272 }, 282 273 {}, 283 274 }; ··· 363 346 } 364 347 } 365 348 366 - otg->set_host = omap_usb_set_host; 367 - otg->set_peripheral = omap_usb_set_peripheral; 349 + 350 + phy->wkupclk = devm_clk_get(phy->dev, "wkupclk"); 351 + if (IS_ERR(phy->wkupclk)) { 352 + if (PTR_ERR(phy->wkupclk) == -EPROBE_DEFER) 353 + return -EPROBE_DEFER; 354 + 355 + dev_warn(&pdev->dev, "unable to get wkupclk %ld, trying old name\n", 356 + PTR_ERR(phy->wkupclk)); 357 + phy->wkupclk = devm_clk_get(phy->dev, "usb_phy_cm_clk32k"); 358 + 359 + if (IS_ERR(phy->wkupclk)) { 360 + if (PTR_ERR(phy->wkupclk) != -EPROBE_DEFER) 361 + dev_err(&pdev->dev, "unable to get usb_phy_cm_clk32k\n"); 362 + return PTR_ERR(phy->wkupclk); 363 + } else { 364 + dev_warn(&pdev->dev, 365 + "found usb_phy_cm_clk32k, please fix DTS\n"); 366 + } 367 + } 368 + 369 + phy->optclk = devm_clk_get(phy->dev, "refclk"); 370 + if (IS_ERR(phy->optclk)) { 371 + if (PTR_ERR(phy->optclk) == -EPROBE_DEFER) 372 + return -EPROBE_DEFER; 373 + 374 + dev_dbg(&pdev->dev, "unable to get refclk, trying old name\n"); 375 + phy->optclk = devm_clk_get(phy->dev, "usb_otg_ss_refclk960m"); 376 + 377 + if (IS_ERR(phy->optclk)) { 378 + if (PTR_ERR(phy->optclk) != -EPROBE_DEFER) { 379 + dev_dbg(&pdev->dev, 380 + "unable to get usb_otg_ss_refclk960m\n"); 381 + } 382 + } else { 383 + dev_warn(&pdev->dev, 384 + "found usb_otg_ss_refclk960m, please fix DTS\n"); 385 + } 386 + } 387 + 388 + otg->set_host = omap_usb_set_host; 389 + otg->set_peripheral = omap_usb_set_peripheral; 368 390 if (phy_data->flags & OMAP_USB2_HAS_SET_VBUS) 369 - otg->set_vbus = omap_usb_set_vbus; 391 + otg->set_vbus = omap_usb_set_vbus; 370 392 if (phy_data->flags & OMAP_USB2_HAS_START_SRP) 371 - otg->start_srp = omap_usb_start_srp; 372 - otg->usb_phy = &phy->phy; 393 + otg->start_srp = omap_usb_start_srp; 394 + otg->usb_phy = &phy->phy; 373 395 374 396 platform_set_drvdata(pdev, phy); 375 397 pm_runtime_enable(phy->dev); ··· 423 367 omap_usb_power_off(generic_phy); 424 368 425 369 phy_provider = devm_of_phy_provider_register(phy->dev, 426 - of_phy_simple_xlate); 370 + of_phy_simple_xlate); 427 371 if (IS_ERR(phy_provider)) { 428 372 pm_runtime_disable(phy->dev); 429 373 return PTR_ERR(phy_provider); 430 374 } 431 375 432 - phy->wkupclk = devm_clk_get(phy->dev, "wkupclk"); 433 - if (IS_ERR(phy->wkupclk)) { 434 - dev_warn(&pdev->dev, "unable to get wkupclk, trying old name\n"); 435 - phy->wkupclk = devm_clk_get(phy->dev, "usb_phy_cm_clk32k"); 436 - if (IS_ERR(phy->wkupclk)) { 437 - dev_err(&pdev->dev, "unable to get usb_phy_cm_clk32k\n"); 438 - pm_runtime_disable(phy->dev); 439 - return PTR_ERR(phy->wkupclk); 440 - } else { 441 - dev_warn(&pdev->dev, 442 - "found usb_phy_cm_clk32k, please fix DTS\n"); 443 - } 444 - } 445 - clk_prepare(phy->wkupclk); 446 - 447 - phy->optclk = devm_clk_get(phy->dev, "refclk"); 448 - if (IS_ERR(phy->optclk)) { 449 - dev_dbg(&pdev->dev, "unable to get refclk, trying old name\n"); 450 - phy->optclk = devm_clk_get(phy->dev, "usb_otg_ss_refclk960m"); 451 - if (IS_ERR(phy->optclk)) { 452 - dev_dbg(&pdev->dev, 453 - "unable to get usb_otg_ss_refclk960m\n"); 454 - } else { 455 - dev_warn(&pdev->dev, 456 - "found usb_otg_ss_refclk960m, please fix DTS\n"); 457 - } 458 - } 459 - 460 - if (!IS_ERR(phy->optclk)) 461 - clk_prepare(phy->optclk); 462 376 463 377 usb_add_phy_dev(&phy->phy); 464 378 ··· 439 413 { 440 414 struct omap_usb *phy = platform_get_drvdata(pdev); 441 415 442 - clk_unprepare(phy->wkupclk); 443 - if (!IS_ERR(phy->optclk)) 444 - clk_unprepare(phy->optclk); 445 416 usb_remove_phy(&phy->phy); 446 417 pm_runtime_disable(phy->dev); 447 418
+6 -9
drivers/platform/x86/intel_cht_int33fe.c
··· 32 32 struct i2c_client *fusb302; 33 33 struct i2c_client *pi3usb30532; 34 34 /* Contain a list-head must be per device */ 35 - struct device_connection connections[5]; 35 + struct device_connection connections[4]; 36 36 }; 37 37 38 38 /* ··· 174 174 175 175 data->connections[0].endpoint[0] = "port0"; 176 176 data->connections[0].endpoint[1] = "i2c-pi3usb30532"; 177 - data->connections[0].id = "typec-switch"; 177 + data->connections[0].id = "orientation-switch"; 178 178 data->connections[1].endpoint[0] = "port0"; 179 179 data->connections[1].endpoint[1] = "i2c-pi3usb30532"; 180 - data->connections[1].id = "typec-mux"; 181 - data->connections[2].endpoint[0] = "port0"; 182 - data->connections[2].endpoint[1] = "i2c-pi3usb30532"; 183 - data->connections[2].id = "idff01m01"; 184 - data->connections[3].endpoint[0] = "i2c-fusb302"; 185 - data->connections[3].endpoint[1] = "intel_xhci_usb_sw-role-switch"; 186 - data->connections[3].id = "usb-role-switch"; 180 + data->connections[1].id = "mode-switch"; 181 + data->connections[2].endpoint[0] = "i2c-fusb302"; 182 + data->connections[2].endpoint[1] = "intel_xhci_usb_sw-role-switch"; 183 + data->connections[2].id = "usb-role-switch"; 187 184 188 185 device_connections_add(data->connections); 189 186
+1
drivers/usb/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 # 2 3 # USB device configuration 3 4 #
-54
drivers/usb/README
··· 1 - To understand all the Linux-USB framework, you'll use these resources: 2 - 3 - * This source code. This is necessarily an evolving work, and 4 - includes kerneldoc that should help you get a current overview. 5 - ("make pdfdocs", and then look at "usb.pdf" for host side and 6 - "gadget.pdf" for peripheral side.) Also, Documentation/usb has 7 - more information. 8 - 9 - * The USB 2.0 specification (from www.usb.org), with supplements 10 - such as those for USB OTG and the various device classes. 11 - The USB specification has a good overview chapter, and USB 12 - peripherals conform to the widely known "Chapter 9". 13 - 14 - * Chip specifications for USB controllers. Examples include 15 - host controllers (on PCs, servers, and more); peripheral 16 - controllers (in devices with Linux firmware, like printers or 17 - cell phones); and hard-wired peripherals like Ethernet adapters. 18 - 19 - * Specifications for other protocols implemented by USB peripheral 20 - functions. Some are vendor-specific; others are vendor-neutral 21 - but just standardized outside of the www.usb.org team. 22 - 23 - Here is a list of what each subdirectory here is, and what is contained in 24 - them. 25 - 26 - core/ - This is for the core USB host code, including the 27 - usbfs files and the hub class driver ("hub_wq"). 28 - 29 - host/ - This is for USB host controller drivers. This 30 - includes UHCI, OHCI, EHCI, and others that might 31 - be used with more specialized "embedded" systems. 32 - 33 - gadget/ - This is for USB peripheral controller drivers and 34 - the various gadget drivers which talk to them. 35 - 36 - 37 - Individual USB driver directories. A new driver should be added to the 38 - first subdirectory in the list below that it fits into. 39 - 40 - image/ - This is for still image drivers, like scanners or 41 - digital cameras. 42 - ../input/ - This is for any driver that uses the input subsystem, 43 - like keyboard, mice, touchscreens, tablets, etc. 44 - ../media/ - This is for multimedia drivers, like video cameras, 45 - radios, and any other drivers that talk to the v4l 46 - subsystem. 47 - ../net/ - This is for network drivers. 48 - serial/ - This is for USB to serial drivers. 49 - storage/ - This is for USB mass-storage drivers. 50 - class/ - This is for all USB device drivers that do not fit 51 - into any of the above categories, and work for a range 52 - of USB Class specified devices. 53 - misc/ - This is for all USB device drivers that do not fit 54 - into any of the above categories.
+1
drivers/usb/atm/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 # 2 3 # USB/ATM DSL configuration 3 4 #
+2
drivers/usb/chipidea/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + 1 3 config USB_CHIPIDEA 2 4 tristate "ChipIdea Highspeed Dual Role Controller" 3 5 depends on ((USB_EHCI_HCD && USB_GADGET) || (USB_EHCI_HCD && !USB_GADGET) || (!USB_EHCI_HCD && USB_GADGET)) && HAS_DMA
+2 -4
drivers/usb/chipidea/ci_hdrc_imx.c
··· 7 7 8 8 #include <linux/module.h> 9 9 #include <linux/of_platform.h> 10 - #include <linux/of_gpio.h> 11 10 #include <linux/platform_device.h> 12 11 #include <linux/pm_runtime.h> 13 - #include <linux/dma-mapping.h> 14 12 #include <linux/usb/chipidea.h> 15 13 #include <linux/usb/of.h> 16 14 #include <linux/clk.h> ··· 150 152 dev_warn(dev, "No over current polarity defined\n"); 151 153 } 152 154 153 - if (of_find_property(np, "external-vbus-divider", NULL)) 154 - data->evdo = 1; 155 + data->pwr_pol = of_property_read_bool(np, "power-active-high"); 156 + data->evdo = of_property_read_bool(np, "external-vbus-divider"); 155 157 156 158 if (of_usb_get_phy_mode(np) == USBPHY_INTERFACE_MODE_ULPI) 157 159 data->ulpi = 1;
+1
drivers/usb/chipidea/ci_hdrc_imx.h
··· 18 18 /* true if dt specifies polarity */ 19 19 unsigned int oc_pol_configured:1; 20 20 21 + unsigned int pwr_pol:1; /* power polarity */ 21 22 unsigned int evdo:1; /* set external vbus divider option */ 22 23 unsigned int ulpi:1; /* connected to an ULPI phy */ 23 24 unsigned int hsic:1; /* HSIC controlller */
+1
drivers/usb/chipidea/ci_hdrc_tegra.c
··· 130 130 { 131 131 struct tegra_udc *udc = platform_get_drvdata(pdev); 132 132 133 + ci_hdrc_remove_device(udc->dev); 133 134 usb_phy_set_suspend(udc->phy, 1); 134 135 clk_disable_unprepare(udc->clk); 135 136
+36 -14
drivers/usb/chipidea/core.c
··· 954 954 } else if (ci->platdata->usb_phy) { 955 955 ci->usb_phy = ci->platdata->usb_phy; 956 956 } else { 957 + /* Look for a generic PHY first */ 957 958 ci->phy = devm_phy_get(dev->parent, "usb-phy"); 958 - ci->usb_phy = devm_usb_get_phy(dev->parent, USB_PHY_TYPE_USB2); 959 959 960 - /* if both generic PHY and USB PHY layers aren't enabled */ 961 - if (PTR_ERR(ci->phy) == -ENOSYS && 962 - PTR_ERR(ci->usb_phy) == -ENXIO) { 960 + if (PTR_ERR(ci->phy) == -EPROBE_DEFER) { 961 + ret = -EPROBE_DEFER; 962 + goto ulpi_exit; 963 + } else if (IS_ERR(ci->phy)) { 964 + ci->phy = NULL; 965 + } 966 + 967 + /* Look for a legacy USB PHY from device-tree next */ 968 + if (!ci->phy) { 969 + ci->usb_phy = devm_usb_get_phy_by_phandle(dev->parent, 970 + "phys", 0); 971 + 972 + if (PTR_ERR(ci->usb_phy) == -EPROBE_DEFER) { 973 + ret = -EPROBE_DEFER; 974 + goto ulpi_exit; 975 + } else if (IS_ERR(ci->usb_phy)) { 976 + ci->usb_phy = NULL; 977 + } 978 + } 979 + 980 + /* Look for any registered legacy USB PHY as last resort */ 981 + if (!ci->phy && !ci->usb_phy) { 982 + ci->usb_phy = devm_usb_get_phy(dev->parent, 983 + USB_PHY_TYPE_USB2); 984 + 985 + if (PTR_ERR(ci->usb_phy) == -EPROBE_DEFER) { 986 + ret = -EPROBE_DEFER; 987 + goto ulpi_exit; 988 + } else if (IS_ERR(ci->usb_phy)) { 989 + ci->usb_phy = NULL; 990 + } 991 + } 992 + 993 + /* No USB PHY was found in the end */ 994 + if (!ci->phy && !ci->usb_phy) { 963 995 ret = -ENXIO; 964 996 goto ulpi_exit; 965 997 } 966 - 967 - if (IS_ERR(ci->phy) && IS_ERR(ci->usb_phy)) { 968 - ret = -EPROBE_DEFER; 969 - goto ulpi_exit; 970 - } 971 - 972 - if (IS_ERR(ci->phy)) 973 - ci->phy = NULL; 974 - else if (IS_ERR(ci->usb_phy)) 975 - ci->usb_phy = NULL; 976 998 } 977 999 978 1000 ret = ci_usb_phy_init(ci);
+7
drivers/usb/chipidea/usbmisc_imx.c
··· 63 63 #define MX6_BM_NON_BURST_SETTING BIT(1) 64 64 #define MX6_BM_OVER_CUR_DIS BIT(7) 65 65 #define MX6_BM_OVER_CUR_POLARITY BIT(8) 66 + #define MX6_BM_PWR_POLARITY BIT(9) 66 67 #define MX6_BM_WAKEUP_ENABLE BIT(10) 67 68 #define MX6_BM_UTMI_ON_CLOCK BIT(13) 68 69 #define MX6_BM_ID_WAKEUP BIT(16) ··· 384 383 else if (data->oc_pol_configured) 385 384 reg &= ~MX6_BM_OVER_CUR_POLARITY; 386 385 } 386 + /* If the polarity is not set keep it as setup by the bootlader */ 387 + if (data->pwr_pol == 1) 388 + reg |= MX6_BM_PWR_POLARITY; 387 389 writel(reg, usbmisc->base + data->index * 4); 388 390 389 391 /* SoC non-burst setting */ ··· 589 585 else if (data->oc_pol_configured) 590 586 reg &= ~MX6_BM_OVER_CUR_POLARITY; 591 587 } 588 + /* If the polarity is not set keep it as setup by the bootlader */ 589 + if (data->pwr_pol == 1) 590 + reg |= MX6_BM_PWR_POLARITY; 592 591 writel(reg, usbmisc->base); 593 592 594 593 reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
+1
drivers/usb/class/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 # 2 3 # USB Class driver configuration 3 4 #
+1 -1
drivers/usb/class/cdc-wdm.c
··· 1099 1099 rv = recover_from_urb_loss(desc); 1100 1100 mutex_unlock(&desc->wlock); 1101 1101 mutex_unlock(&desc->rlock); 1102 - return 0; 1102 + return rv; 1103 1103 } 1104 1104 1105 1105 static struct usb_driver wdm_driver = {
+13
drivers/usb/core/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 # 2 3 # USB Core configuration 3 4 # ··· 91 90 This driver allows LEDs to be controlled by USB events. Enabling this 92 91 trigger allows specifying list of USB ports that should turn on LED 93 92 when some USB device gets connected. 93 + 94 + config USB_AUTOSUSPEND_DELAY 95 + int "Default autosuspend delay" 96 + depends on USB 97 + default 2 98 + help 99 + The default autosuspend delay in seconds. Can be overridden 100 + with the usbcore.autosuspend command line or module parameter. 101 + 102 + The default value Linux has always had is 2 seconds. Change 103 + this value if you want a different delay and cannot modify 104 + the command line or module parameter.
+5 -9
drivers/usb/core/config.c
··· 552 552 unsigned char *buffer2; 553 553 int size2; 554 554 struct usb_descriptor_header *header; 555 - int len, retval; 555 + int retval; 556 556 u8 inums[USB_MAXINTERFACES], nalts[USB_MAXINTERFACES]; 557 557 unsigned iad_num = 0; 558 558 ··· 707 707 nalts[i] = j = USB_MAXALTSETTING; 708 708 } 709 709 710 - len = sizeof(*intfc) + sizeof(struct usb_host_interface) * j; 711 - config->intf_cache[i] = intfc = kzalloc(len, GFP_KERNEL); 710 + intfc = kzalloc(struct_size(intfc, altsetting, j), GFP_KERNEL); 711 + config->intf_cache[i] = intfc; 712 712 if (!intfc) 713 713 return -ENOMEM; 714 714 kref_init(&intfc->ref); ··· 800 800 { 801 801 struct device *ddev = &dev->dev; 802 802 int ncfg = dev->descriptor.bNumConfigurations; 803 - int result = 0; 803 + int result = -ENOMEM; 804 804 unsigned int cfgno, length; 805 805 unsigned char *bigbuffer; 806 806 struct usb_config_descriptor *desc; 807 807 808 - cfgno = 0; 809 - result = -ENOMEM; 810 808 if (ncfg > USB_MAXCONFIG) { 811 809 dev_warn(ddev, "too many configurations: %d, " 812 810 "using maximum allowed: %d\n", ncfg, USB_MAXCONFIG); ··· 830 832 if (!desc) 831 833 goto err2; 832 834 833 - result = 0; 834 - for (; cfgno < ncfg; cfgno++) { 835 + for (cfgno = 0; cfgno < ncfg; cfgno++) { 835 836 /* We grab just the first descriptor so we know how long 836 837 * the whole configuration is */ 837 838 result = usb_get_descriptor(dev, USB_DT_CONFIG, cfgno, ··· 886 889 goto err; 887 890 } 888 891 } 889 - result = 0; 890 892 891 893 err: 892 894 kfree(desc);
+4 -6
drivers/usb/core/devio.c
··· 604 604 snoop(&urb->dev->dev, "urb complete\n"); 605 605 snoop_urb(urb->dev, as->userurb, urb->pipe, urb->actual_length, 606 606 as->status, COMPLETE, NULL, 0); 607 - if ((urb->transfer_flags & URB_DIR_MASK) == URB_DIR_IN) 607 + if (usb_urb_dir_in(urb)) 608 608 snoop_urb_data(urb, urb->actual_length); 609 609 610 610 if (as->status < 0 && as->bulk_addr && as->status != -ECONNRESET && ··· 1564 1564 } 1565 1565 for (totlen = u = 0; u < number_of_packets; u++) { 1566 1566 /* 1567 - * arbitrary limit need for USB 3.0 1568 - * bMaxBurst (0~15 allowed, 1~16 packets) 1569 - * bmAttributes (bit 1:0, mult 0~2, 1~3 packets) 1570 - * sizemax: 1024 * 16 * 3 = 49152 1567 + * arbitrary limit need for USB 3.1 Gen2 1568 + * sizemax: 96 DPs at SSP, 96 * 1024 = 98304 1571 1569 */ 1572 - if (isopkt[u].length > 49152) { 1570 + if (isopkt[u].length > 98304) { 1573 1571 ret = -EINVAL; 1574 1572 goto error; 1575 1573 }
+19 -4
drivers/usb/core/driver.c
··· 1896 1896 return -EBUSY; 1897 1897 } 1898 1898 1899 - int usb_set_usb2_hardware_lpm(struct usb_device *udev, int enable) 1899 + static int usb_set_usb2_hardware_lpm(struct usb_device *udev, int enable) 1900 1900 { 1901 1901 struct usb_hcd *hcd = bus_to_hcd(udev->bus); 1902 1902 int ret = -EPERM; 1903 - 1904 - if (enable && !udev->usb2_hw_lpm_allowed) 1905 - return 0; 1906 1903 1907 1904 if (hcd->driver->set_usb2_hw_lpm) { 1908 1905 ret = hcd->driver->set_usb2_hw_lpm(hcd, udev, enable); ··· 1908 1911 } 1909 1912 1910 1913 return ret; 1914 + } 1915 + 1916 + int usb_enable_usb2_hardware_lpm(struct usb_device *udev) 1917 + { 1918 + if (!udev->usb2_hw_lpm_capable || 1919 + !udev->usb2_hw_lpm_allowed || 1920 + udev->usb2_hw_lpm_enabled) 1921 + return 0; 1922 + 1923 + return usb_set_usb2_hardware_lpm(udev, 1); 1924 + } 1925 + 1926 + int usb_disable_usb2_hardware_lpm(struct usb_device *udev) 1927 + { 1928 + if (!udev->usb2_hw_lpm_enabled) 1929 + return 0; 1930 + 1931 + return usb_set_usb2_hardware_lpm(udev, 0); 1911 1932 } 1912 1933 1913 1934 #endif /* CONFIG_PM */
+25 -19
drivers/usb/core/generic.c
··· 118 118 continue; 119 119 } 120 120 121 + /* 122 + * Select first configuration as default for audio so that 123 + * devices that don't comply with UAC3 protocol are supported. 124 + * But, still iterate through other configurations and 125 + * select UAC3 compliant config if present. 126 + */ 127 + if (desc && is_audio(desc)) { 128 + /* Always prefer the first found UAC3 config */ 129 + if (is_uac3_config(desc)) { 130 + best = c; 131 + break; 132 + } 133 + 134 + /* If there is no UAC3 config, prefer the first config */ 135 + else if (i == 0) 136 + best = c; 137 + 138 + /* Unconditional continue, because the rest of the code 139 + * in the loop is irrelevant for audio devices, and 140 + * because it can reassign best, which for audio devices 141 + * we don't want. 142 + */ 143 + continue; 144 + } 145 + 121 146 /* When the first config's first interface is one of Microsoft's 122 147 * pet nonstandard Ethernet-over-USB protocols, ignore it unless 123 148 * this kernel has enabled the necessary host side driver. ··· 155 130 #else 156 131 best = c; 157 132 #endif 158 - } 159 - 160 - /* 161 - * Select first configuration as default for audio so that 162 - * devices that don't comply with UAC3 protocol are supported. 163 - * But, still iterate through other configurations and 164 - * select UAC3 compliant config if present. 165 - */ 166 - if (i == 0 && num_configs > 1 && desc && is_audio(desc)) { 167 - best = c; 168 - continue; 169 - } 170 - 171 - if (i > 0 && desc && is_audio(desc)) { 172 - if (is_uac3_config(desc)) { 173 - best = c; 174 - break; 175 - } 176 - continue; 177 133 } 178 134 179 135 /* From the remaining configs, choose the first one whose
+36 -20
drivers/usb/core/hcd.c
··· 373 373 * -1 is authorized for all devices except wireless (old behaviour) 374 374 * 0 is unauthorized for all devices 375 375 * 1 is authorized for all devices 376 + * 2 is authorized for internal devices 376 377 */ 377 - static int authorized_default = -1; 378 + #define USB_AUTHORIZE_WIRED -1 379 + #define USB_AUTHORIZE_NONE 0 380 + #define USB_AUTHORIZE_ALL 1 381 + #define USB_AUTHORIZE_INTERNAL 2 382 + 383 + static int authorized_default = USB_AUTHORIZE_WIRED; 378 384 module_param(authorized_default, int, S_IRUGO|S_IWUSR); 379 385 MODULE_PARM_DESC(authorized_default, 380 386 "Default USB device authorization: 0 is not authorized, 1 is " 381 - "authorized, -1 is authorized except for wireless USB (default, " 382 - "old behaviour"); 387 + "authorized, 2 is authorized for internal devices, -1 is " 388 + "authorized except for wireless USB (default, old behaviour)"); 383 389 /*-------------------------------------------------------------------------*/ 384 390 385 391 /** ··· 890 884 struct usb_hcd *hcd; 891 885 892 886 hcd = bus_to_hcd(usb_bus); 893 - return snprintf(buf, PAGE_SIZE, "%u\n", !!HCD_DEV_AUTHORIZED(hcd)); 887 + return snprintf(buf, PAGE_SIZE, "%u\n", hcd->dev_policy); 894 888 } 895 889 896 890 static ssize_t authorized_default_store(struct device *dev, ··· 906 900 hcd = bus_to_hcd(usb_bus); 907 901 result = sscanf(buf, "%u\n", &val); 908 902 if (result == 1) { 909 - if (val) 910 - set_bit(HCD_FLAG_DEV_AUTHORIZED, &hcd->flags); 911 - else 912 - clear_bit(HCD_FLAG_DEV_AUTHORIZED, &hcd->flags); 913 - 903 + hcd->dev_policy = val <= USB_DEVICE_AUTHORIZE_INTERNAL ? 904 + val : USB_DEVICE_AUTHORIZE_ALL; 914 905 result = size; 915 906 } else { 916 907 result = -EINVAL; ··· 2739 2736 if (retval) 2740 2737 return retval; 2741 2738 2739 + retval = usb_phy_roothub_set_mode(hcd->phy_roothub, 2740 + PHY_MODE_USB_HOST_SS); 2741 + if (retval) 2742 + goto err_usb_phy_roothub_power_on; 2743 + 2742 2744 retval = usb_phy_roothub_power_on(hcd->phy_roothub); 2743 2745 if (retval) 2744 2746 goto err_usb_phy_roothub_power_on; ··· 2751 2743 2752 2744 dev_info(hcd->self.controller, "%s\n", hcd->product_desc); 2753 2745 2754 - /* Keep old behaviour if authorized_default is not in [0, 1]. */ 2755 - if (authorized_default < 0 || authorized_default > 1) { 2756 - if (hcd->wireless) 2757 - clear_bit(HCD_FLAG_DEV_AUTHORIZED, &hcd->flags); 2758 - else 2759 - set_bit(HCD_FLAG_DEV_AUTHORIZED, &hcd->flags); 2760 - } else { 2761 - if (authorized_default) 2762 - set_bit(HCD_FLAG_DEV_AUTHORIZED, &hcd->flags); 2763 - else 2764 - clear_bit(HCD_FLAG_DEV_AUTHORIZED, &hcd->flags); 2746 + switch (authorized_default) { 2747 + case USB_AUTHORIZE_NONE: 2748 + hcd->dev_policy = USB_DEVICE_AUTHORIZE_NONE; 2749 + break; 2750 + 2751 + case USB_AUTHORIZE_ALL: 2752 + hcd->dev_policy = USB_DEVICE_AUTHORIZE_ALL; 2753 + break; 2754 + 2755 + case USB_AUTHORIZE_INTERNAL: 2756 + hcd->dev_policy = USB_DEVICE_AUTHORIZE_INTERNAL; 2757 + break; 2758 + 2759 + case USB_AUTHORIZE_WIRED: 2760 + default: 2761 + hcd->dev_policy = hcd->wireless ? 2762 + USB_DEVICE_AUTHORIZE_NONE : USB_DEVICE_AUTHORIZE_ALL; 2763 + break; 2765 2764 } 2765 + 2766 2766 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 2767 2767 2768 2768 /* per default all interfaces are authorized */
+50 -16
drivers/usb/core/hub.c
··· 108 108 static void hub_release(struct kref *kref); 109 109 static int usb_reset_and_verify_device(struct usb_device *udev); 110 110 static int hub_port_disable(struct usb_hub *hub, int port1, int set_state); 111 + static bool hub_port_warm_reset_required(struct usb_hub *hub, int port1, 112 + u16 portstatus); 111 113 112 114 static inline char *portspeed(struct usb_hub *hub, int portstatus) 113 115 { ··· 609 607 status, change, NULL); 610 608 } 611 609 610 + static void hub_resubmit_irq_urb(struct usb_hub *hub) 611 + { 612 + unsigned long flags; 613 + int status; 614 + 615 + spin_lock_irqsave(&hub->irq_urb_lock, flags); 616 + 617 + if (hub->quiescing) { 618 + spin_unlock_irqrestore(&hub->irq_urb_lock, flags); 619 + return; 620 + } 621 + 622 + status = usb_submit_urb(hub->urb, GFP_ATOMIC); 623 + if (status && status != -ENODEV && status != -EPERM && 624 + status != -ESHUTDOWN) { 625 + dev_err(hub->intfdev, "resubmit --> %d\n", status); 626 + mod_timer(&hub->irq_urb_retry, jiffies + HZ); 627 + } 628 + 629 + spin_unlock_irqrestore(&hub->irq_urb_lock, flags); 630 + } 631 + 632 + static void hub_retry_irq_urb(struct timer_list *t) 633 + { 634 + struct usb_hub *hub = from_timer(hub, t, irq_urb_retry); 635 + 636 + hub_resubmit_irq_urb(hub); 637 + } 638 + 639 + 612 640 static void kick_hub_wq(struct usb_hub *hub) 613 641 { 614 642 struct usb_interface *intf; ··· 741 709 kick_hub_wq(hub); 742 710 743 711 resubmit: 744 - if (hub->quiescing) 745 - return; 746 - 747 - status = usb_submit_urb(hub->urb, GFP_ATOMIC); 748 - if (status != 0 && status != -ENODEV && status != -EPERM) 749 - dev_err(hub->intfdev, "resubmit --> %d\n", status); 712 + hub_resubmit_irq_urb(hub); 750 713 } 751 714 752 715 /* USB 2.0 spec Section 11.24.2.3 */ ··· 1139 1112 USB_PORT_FEAT_ENABLE); 1140 1113 } 1141 1114 1115 + /* Make sure a warm-reset request is handled by port_event */ 1116 + if (type == HUB_RESUME && 1117 + hub_port_warm_reset_required(hub, port1, portstatus)) 1118 + set_bit(port1, hub->event_bits); 1119 + 1142 1120 /* 1143 1121 * Add debounce if USB3 link is in polling/link training state. 1144 1122 * Link will automatically transition to Enabled state after ··· 1296 1264 static void hub_quiesce(struct usb_hub *hub, enum hub_quiescing_type type) 1297 1265 { 1298 1266 struct usb_device *hdev = hub->hdev; 1267 + unsigned long flags; 1299 1268 int i; 1300 1269 1301 1270 /* hub_wq and related activity won't re-trigger */ 1271 + spin_lock_irqsave(&hub->irq_urb_lock, flags); 1302 1272 hub->quiescing = 1; 1273 + spin_unlock_irqrestore(&hub->irq_urb_lock, flags); 1303 1274 1304 1275 if (type != HUB_SUSPEND) { 1305 1276 /* Disconnect all the children */ ··· 1313 1278 } 1314 1279 1315 1280 /* Stop hub_wq and related activity */ 1281 + del_timer_sync(&hub->irq_urb_retry); 1316 1282 usb_kill_urb(hub->urb); 1317 1283 if (hub->has_indicators) 1318 1284 cancel_delayed_work_sync(&hub->leds); ··· 1846 1810 INIT_DELAYED_WORK(&hub->leds, led_work); 1847 1811 INIT_DELAYED_WORK(&hub->init_work, NULL); 1848 1812 INIT_WORK(&hub->events, hub_event); 1813 + spin_lock_init(&hub->irq_urb_lock); 1814 + timer_setup(&hub->irq_urb_retry, hub_retry_irq_urb, 0); 1849 1815 usb_get_intf(intf); 1850 1816 usb_get_dev(hdev); 1851 1817 ··· 3258 3220 } 3259 3221 3260 3222 /* disable USB2 hardware LPM */ 3261 - if (udev->usb2_hw_lpm_enabled == 1) 3262 - usb_set_usb2_hardware_lpm(udev, 0); 3223 + usb_disable_usb2_hardware_lpm(udev); 3263 3224 3264 3225 if (usb_disable_ltm(udev)) { 3265 3226 dev_err(&udev->dev, "Failed to disable LTM before suspend\n"); ··· 3296 3259 usb_enable_ltm(udev); 3297 3260 err_ltm: 3298 3261 /* Try to enable USB2 hardware LPM again */ 3299 - if (udev->usb2_hw_lpm_capable == 1) 3300 - usb_set_usb2_hardware_lpm(udev, 1); 3262 + usb_enable_usb2_hardware_lpm(udev); 3301 3263 3302 3264 if (udev->do_remote_wakeup) 3303 3265 (void) usb_disable_remote_wakeup(udev); ··· 3579 3543 hub_port_logical_disconnect(hub, port1); 3580 3544 } else { 3581 3545 /* Try to enable USB2 hardware LPM */ 3582 - if (udev->usb2_hw_lpm_capable == 1) 3583 - usb_set_usb2_hardware_lpm(udev, 1); 3546 + usb_enable_usb2_hardware_lpm(udev); 3584 3547 3585 3548 /* Try to enable USB3 LTM */ 3586 3549 usb_enable_ltm(udev); ··· 4470 4435 if ((udev->bos->ext_cap->bmAttributes & cpu_to_le32(USB_BESL_SUPPORT)) || 4471 4436 connect_type == USB_PORT_CONNECT_TYPE_HARD_WIRED) { 4472 4437 udev->usb2_hw_lpm_allowed = 1; 4473 - usb_set_usb2_hardware_lpm(udev, 1); 4438 + usb_enable_usb2_hardware_lpm(udev); 4474 4439 } 4475 4440 } 4476 4441 ··· 5684 5649 /* Disable USB2 hardware LPM. 5685 5650 * It will be re-enabled by the enumeration process. 5686 5651 */ 5687 - if (udev->usb2_hw_lpm_enabled == 1) 5688 - usb_set_usb2_hardware_lpm(udev, 0); 5652 + usb_disable_usb2_hardware_lpm(udev); 5689 5653 5690 5654 /* Disable LPM while we reset the device and reinstall the alt settings. 5691 5655 * Device-initiated LPM, and system exit latency settings are cleared ··· 5787 5753 5788 5754 done: 5789 5755 /* Now that the alt settings are re-installed, enable LTM and LPM. */ 5790 - usb_set_usb2_hardware_lpm(udev, 1); 5756 + usb_enable_usb2_hardware_lpm(udev); 5791 5757 usb_unlocked_enable_lpm(udev); 5792 5758 usb_enable_ltm(udev); 5793 5759 usb_release_bos_descriptor(udev);
+2
drivers/usb/core/hub.h
··· 69 69 struct delayed_work leds; 70 70 struct delayed_work init_work; 71 71 struct work_struct events; 72 + spinlock_t irq_urb_lock; 73 + struct timer_list irq_urb_retry; 72 74 struct usb_port **ports; 73 75 }; 74 76
+8 -2
drivers/usb/core/message.c
··· 1243 1243 dev->actconfig->interface[i] = NULL; 1244 1244 } 1245 1245 1246 - if (dev->usb2_hw_lpm_enabled == 1) 1247 - usb_set_usb2_hardware_lpm(dev, 0); 1246 + usb_disable_usb2_hardware_lpm(dev); 1248 1247 usb_unlocked_disable_lpm(dev); 1249 1248 usb_disable_ltm(dev); 1250 1249 ··· 2005 2006 */ 2006 2007 for (i = 0; i < nintf; ++i) { 2007 2008 struct usb_interface *intf = cp->interface[i]; 2009 + 2010 + if (intf->dev.of_node && 2011 + !of_device_is_available(intf->dev.of_node)) { 2012 + dev_info(&dev->dev, "skipping disabled interface %d\n", 2013 + intf->cur_altsetting->desc.bInterfaceNumber); 2014 + continue; 2015 + } 2008 2016 2009 2017 dev_dbg(&dev->dev, 2010 2018 "adding %s (config #%d, interface %d)\n",
+28
drivers/usb/core/phy.c
··· 123 123 } 124 124 EXPORT_SYMBOL_GPL(usb_phy_roothub_exit); 125 125 126 + int usb_phy_roothub_set_mode(struct usb_phy_roothub *phy_roothub, 127 + enum phy_mode mode) 128 + { 129 + struct usb_phy_roothub *roothub_entry; 130 + struct list_head *head; 131 + int err; 132 + 133 + if (!phy_roothub) 134 + return 0; 135 + 136 + head = &phy_roothub->list; 137 + 138 + list_for_each_entry(roothub_entry, head, list) { 139 + err = phy_set_mode(roothub_entry->phy, mode); 140 + if (err) 141 + goto err_out; 142 + } 143 + 144 + return 0; 145 + 146 + err_out: 147 + list_for_each_entry_continue_reverse(roothub_entry, head, list) 148 + phy_power_off(roothub_entry->phy); 149 + 150 + return err; 151 + } 152 + EXPORT_SYMBOL_GPL(usb_phy_roothub_set_mode); 153 + 126 154 int usb_phy_roothub_power_on(struct usb_phy_roothub *phy_roothub) 127 155 { 128 156 struct usb_phy_roothub *roothub_entry;
+2
drivers/usb/core/phy.h
··· 16 16 int usb_phy_roothub_init(struct usb_phy_roothub *phy_roothub); 17 17 int usb_phy_roothub_exit(struct usb_phy_roothub *phy_roothub); 18 18 19 + int usb_phy_roothub_set_mode(struct usb_phy_roothub *phy_roothub, 20 + enum phy_mode mode); 19 21 int usb_phy_roothub_power_on(struct usb_phy_roothub *phy_roothub); 20 22 void usb_phy_roothub_power_off(struct usb_phy_roothub *phy_roothub); 21 23
+4 -1
drivers/usb/core/sysfs.c
··· 528 528 529 529 if (!ret) { 530 530 udev->usb2_hw_lpm_allowed = value; 531 - ret = usb_set_usb2_hardware_lpm(udev, value); 531 + if (value) 532 + ret = usb_enable_usb2_hardware_lpm(udev); 533 + else 534 + ret = usb_disable_usb2_hardware_lpm(udev); 532 535 } 533 536 534 537 usb_unlock_device(udev);
+2 -3
drivers/usb/core/urb.c
··· 70 70 { 71 71 struct urb *urb; 72 72 73 - urb = kmalloc(sizeof(struct urb) + 74 - iso_packets * sizeof(struct usb_iso_packet_descriptor), 75 - mem_flags); 73 + urb = kmalloc(struct_size(urb, iso_frame_desc, iso_packets), 74 + mem_flags); 76 75 if (!urb) 77 76 return NULL; 78 77 usb_init_urb(urb);
+28 -9
drivers/usb/core/usb.c
··· 46 46 #include <linux/mm.h> 47 47 #include <linux/dma-mapping.h> 48 48 49 - #include "usb.h" 50 - 49 + #include "hub.h" 51 50 52 51 const char *usbcore_name = "usbcore"; 53 52 ··· 64 65 EXPORT_SYMBOL_GPL(usb_disabled); 65 66 66 67 #ifdef CONFIG_PM 67 - static int usb_autosuspend_delay = 2; /* Default delay value, 68 - * in seconds */ 68 + /* Default delay value, in seconds */ 69 + static int usb_autosuspend_delay = CONFIG_USB_AUTOSUSPEND_DELAY; 69 70 module_param_named(autosuspend, usb_autosuspend_delay, int, 0644); 70 71 MODULE_PARM_DESC(autosuspend, "default autosuspend delay"); 71 72 ··· 535 536 return hcd->wireless; 536 537 } 537 538 539 + static bool usb_dev_authorized(struct usb_device *dev, struct usb_hcd *hcd) 540 + { 541 + struct usb_hub *hub; 542 + 543 + if (!dev->parent) 544 + return true; /* Root hub always ok [and always wired] */ 545 + 546 + switch (hcd->dev_policy) { 547 + case USB_DEVICE_AUTHORIZE_NONE: 548 + default: 549 + return false; 550 + 551 + case USB_DEVICE_AUTHORIZE_ALL: 552 + return true; 553 + 554 + case USB_DEVICE_AUTHORIZE_INTERNAL: 555 + hub = usb_hub_to_struct_hub(dev->parent); 556 + return hub->ports[dev->portnum - 1]->connect_type == 557 + USB_PORT_CONNECT_TYPE_HARD_WIRED; 558 + } 559 + } 538 560 539 561 /** 540 562 * usb_alloc_dev - usb device constructor (usbcore-internal) ··· 683 663 dev->connect_time = jiffies; 684 664 dev->active_duration = -jiffies; 685 665 #endif 686 - if (root_hub) /* Root hub always ok [and always wired] */ 687 - dev->authorized = 1; 688 - else { 689 - dev->authorized = !!HCD_DEV_AUTHORIZED(usb_hcd); 666 + 667 + dev->authorized = usb_dev_authorized(dev, usb_hcd); 668 + if (!root_hub) 690 669 dev->wusb = usb_bus_is_wusb(bus) ? 1 : 0; 691 - } 670 + 692 671 return dev; 693 672 } 694 673 EXPORT_SYMBOL_GPL(usb_alloc_dev);
+8 -2
drivers/usb/core/usb.h
··· 92 92 extern int usb_runtime_suspend(struct device *dev); 93 93 extern int usb_runtime_resume(struct device *dev); 94 94 extern int usb_runtime_idle(struct device *dev); 95 - extern int usb_set_usb2_hardware_lpm(struct usb_device *udev, int enable); 95 + extern int usb_enable_usb2_hardware_lpm(struct usb_device *udev); 96 + extern int usb_disable_usb2_hardware_lpm(struct usb_device *udev); 96 97 97 98 #else 98 99 ··· 113 112 return 0; 114 113 } 115 114 116 - static inline int usb_set_usb2_hardware_lpm(struct usb_device *udev, int enable) 115 + static inline int usb_enable_usb2_hardware_lpm(struct usb_device *udev) 116 + { 117 + return 0; 118 + } 119 + 120 + static inline int usb_disable_usb2_hardware_lpm(struct usb_device *udev) 117 121 { 118 122 return 0; 119 123 }
+2
drivers/usb/dwc2/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + 1 3 config USB_DWC2 2 4 tristate "DesignWare USB2 DRD Core Support" 3 5 depends on HAS_DMA
+78 -36
drivers/usb/dwc2/gadget.c
··· 768 768 return desc_size; 769 769 } 770 770 771 - /* 772 - * dwc2_gadget_config_nonisoc_xfer_ddma - prepare non ISOC DMA desc chain. 773 - * @hs_ep: The endpoint 774 - * @dma_buff: DMA address to use 775 - * @len: Length of the transfer 776 - * 777 - * This function will iterate over descriptor chain and fill its entries 778 - * with corresponding information based on transfer data. 779 - */ 780 - static void dwc2_gadget_config_nonisoc_xfer_ddma(struct dwc2_hsotg_ep *hs_ep, 771 + static void dwc2_gadget_fill_nonisoc_xfer_ddma_one(struct dwc2_hsotg_ep *hs_ep, 772 + struct dwc2_dma_desc **desc, 781 773 dma_addr_t dma_buff, 782 - unsigned int len) 774 + unsigned int len, 775 + bool true_last) 783 776 { 784 - struct dwc2_hsotg *hsotg = hs_ep->parent; 785 777 int dir_in = hs_ep->dir_in; 786 - struct dwc2_dma_desc *desc = hs_ep->desc_list; 787 778 u32 mps = hs_ep->ep.maxpacket; 788 779 u32 maxsize = 0; 789 780 u32 offset = 0; ··· 789 798 hs_ep->desc_count = 1; 790 799 791 800 for (i = 0; i < hs_ep->desc_count; ++i) { 792 - desc->status = 0; 793 - desc->status |= (DEV_DMA_BUFF_STS_HBUSY 801 + (*desc)->status = 0; 802 + (*desc)->status |= (DEV_DMA_BUFF_STS_HBUSY 794 803 << DEV_DMA_BUFF_STS_SHIFT); 795 804 796 805 if (len > maxsize) { 797 806 if (!hs_ep->index && !dir_in) 798 - desc->status |= (DEV_DMA_L | DEV_DMA_IOC); 807 + (*desc)->status |= (DEV_DMA_L | DEV_DMA_IOC); 799 808 800 - desc->status |= (maxsize << 801 - DEV_DMA_NBYTES_SHIFT & mask); 802 - desc->buf = dma_buff + offset; 809 + (*desc)->status |= 810 + maxsize << DEV_DMA_NBYTES_SHIFT & mask; 811 + (*desc)->buf = dma_buff + offset; 803 812 804 813 len -= maxsize; 805 814 offset += maxsize; 806 815 } else { 807 - desc->status |= (DEV_DMA_L | DEV_DMA_IOC); 816 + if (true_last) 817 + (*desc)->status |= (DEV_DMA_L | DEV_DMA_IOC); 808 818 809 819 if (dir_in) 810 - desc->status |= (len % mps) ? DEV_DMA_SHORT : 811 - ((hs_ep->send_zlp) ? DEV_DMA_SHORT : 0); 812 - if (len > maxsize) 813 - dev_err(hsotg->dev, "wrong len %d\n", len); 820 + (*desc)->status |= (len % mps) ? DEV_DMA_SHORT : 821 + ((hs_ep->send_zlp && true_last) ? 822 + DEV_DMA_SHORT : 0); 814 823 815 - desc->status |= 824 + (*desc)->status |= 816 825 len << DEV_DMA_NBYTES_SHIFT & mask; 817 - desc->buf = dma_buff + offset; 826 + (*desc)->buf = dma_buff + offset; 818 827 } 819 828 820 - desc->status &= ~DEV_DMA_BUFF_STS_MASK; 821 - desc->status |= (DEV_DMA_BUFF_STS_HREADY 829 + (*desc)->status &= ~DEV_DMA_BUFF_STS_MASK; 830 + (*desc)->status |= (DEV_DMA_BUFF_STS_HREADY 822 831 << DEV_DMA_BUFF_STS_SHIFT); 823 - desc++; 832 + (*desc)++; 824 833 } 834 + } 835 + 836 + /* 837 + * dwc2_gadget_config_nonisoc_xfer_ddma - prepare non ISOC DMA desc chain. 838 + * @hs_ep: The endpoint 839 + * @ureq: Request to transfer 840 + * @offset: offset in bytes 841 + * @len: Length of the transfer 842 + * 843 + * This function will iterate over descriptor chain and fill its entries 844 + * with corresponding information based on transfer data. 845 + */ 846 + static void dwc2_gadget_config_nonisoc_xfer_ddma(struct dwc2_hsotg_ep *hs_ep, 847 + struct usb_request *ureq, 848 + unsigned int offset, 849 + unsigned int len) 850 + { 851 + struct dwc2_dma_desc *desc = hs_ep->desc_list; 852 + struct scatterlist *sg; 853 + int i; 854 + u8 desc_count = 0; 855 + 856 + /* non-DMA sg buffer */ 857 + if (!ureq->num_sgs) { 858 + dwc2_gadget_fill_nonisoc_xfer_ddma_one(hs_ep, &desc, 859 + ureq->dma + offset, len, true); 860 + return; 861 + } 862 + 863 + /* DMA sg buffer */ 864 + for_each_sg(ureq->sg, sg, ureq->num_sgs, i) { 865 + dwc2_gadget_fill_nonisoc_xfer_ddma_one(hs_ep, &desc, 866 + sg_dma_address(sg) + sg->offset, sg_dma_len(sg), 867 + sg_is_last(sg)); 868 + desc_count += hs_ep->desc_count; 869 + } 870 + 871 + hs_ep->desc_count = desc_count; 825 872 } 826 873 827 874 /* ··· 973 944 974 945 hs_ep->next_desc = 0; 975 946 list_for_each_entry_safe(hs_req, treq, &hs_ep->queue, queue) { 976 - ret = dwc2_gadget_fill_isoc_desc(hs_ep, hs_req->req.dma, 947 + dma_addr_t dma_addr = hs_req->req.dma; 948 + 949 + if (hs_req->req.num_sgs) { 950 + WARN_ON(hs_req->req.num_sgs > 1); 951 + dma_addr = sg_dma_address(hs_req->req.sg); 952 + } 953 + ret = dwc2_gadget_fill_isoc_desc(hs_ep, dma_addr, 977 954 hs_req->req.length); 978 955 if (ret) 979 956 break; ··· 1135 1100 offset = ureq->actual; 1136 1101 1137 1102 /* Fill DDMA chain entries */ 1138 - dwc2_gadget_config_nonisoc_xfer_ddma(hs_ep, ureq->dma + offset, 1103 + dwc2_gadget_config_nonisoc_xfer_ddma(hs_ep, ureq, offset, 1139 1104 length); 1140 1105 1141 1106 /* write descriptor chain address to control register */ ··· 1434 1399 */ 1435 1400 if (using_desc_dma(hs) && hs_ep->isochronous) { 1436 1401 if (hs_ep->target_frame != TARGET_FRAME_INITIAL) { 1437 - dwc2_gadget_fill_isoc_desc(hs_ep, hs_req->req.dma, 1402 + dma_addr_t dma_addr = hs_req->req.dma; 1403 + 1404 + if (hs_req->req.num_sgs) { 1405 + WARN_ON(hs_req->req.num_sgs > 1); 1406 + dma_addr = sg_dma_address(hs_req->req.sg); 1407 + } 1408 + dwc2_gadget_fill_isoc_desc(hs_ep, dma_addr, 1438 1409 hs_req->req.length); 1439 1410 } 1440 1411 return 0; ··· 2028 1987 dev_dbg(hsotg->dev, "Receiving zero-length packet on ep%d\n", 2029 1988 index); 2030 1989 if (using_desc_dma(hsotg)) { 2031 - /* Not specific buffer needed for ep0 ZLP */ 2032 - dma_addr_t dma = hs_ep->desc_list_dma; 2033 - 2034 1990 if (!index) 2035 1991 dwc2_gadget_set_ep0_desc_chain(hsotg, hs_ep); 2036 1992 2037 - dwc2_gadget_config_nonisoc_xfer_ddma(hs_ep, dma, 0); 1993 + /* Not specific buffer needed for ep0 ZLP */ 1994 + dwc2_gadget_fill_nonisoc_xfer_ddma_one(hs_ep, &hs_ep->desc_list, 1995 + hs_ep->desc_list_dma, 0, true); 2038 1996 } else { 2039 1997 dwc2_writel(hsotg, DXEPTSIZ_MC(1) | DXEPTSIZ_PKTCNT(1) | 2040 1998 DXEPTSIZ_XFERSIZE(0), ··· 4045 4005 ret = -ENOMEM; 4046 4006 goto error1; 4047 4007 } 4008 + epctrl &= ~(DXEPCTL_TXFNUM_LIMIT << DXEPCTL_TXFNUM_SHIFT); 4048 4009 hsotg->fifo_map |= 1 << fifo_index; 4049 4010 epctrl |= DXEPCTL_TXFNUM(fifo_index); 4050 4011 hs_ep->fifo_index = fifo_index; ··· 4426 4385 hsotg->enabled = 0; 4427 4386 spin_unlock_irqrestore(&hsotg->lock, flags); 4428 4387 4388 + gadget->sg_supported = using_desc_dma(hsotg); 4429 4389 dev_info(hsotg->dev, "bound driver %s\n", driver->driver.name); 4430 4390 4431 4391 return 0;
+1 -3
drivers/usb/dwc2/hcd.c
··· 3981 3981 gfp_t mem_flags) 3982 3982 { 3983 3983 struct dwc2_hcd_urb *urb; 3984 - u32 size = sizeof(*urb) + iso_desc_count * 3985 - sizeof(struct dwc2_hcd_iso_packet_desc); 3986 3984 3987 - urb = kzalloc(size, mem_flags); 3985 + urb = kzalloc(struct_size(urb, iso_descs, iso_desc_count), mem_flags); 3988 3986 if (urb) 3989 3987 urb->packet_count = iso_desc_count; 3990 3988 return urb;
+5 -3
drivers/usb/dwc3/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + 1 3 config USB_DWC3 2 4 tristate "DesignWare USB3 DRD Core Support" 3 5 depends on (USB || USB_GADGET) && HAS_DMA ··· 88 86 platform, please say 'Y' or 'M' here. 89 87 90 88 config USB_DWC3_KEYSTONE 91 - tristate "Texas Instruments Keystone2 Platforms" 92 - depends on ARCH_KEYSTONE || COMPILE_TEST 89 + tristate "Texas Instruments Keystone2/AM654 Platforms" 90 + depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST 93 91 default USB_DWC3 94 92 help 95 - Support of USB2/3 functionality in TI Keystone2 platforms. 93 + Support of USB2/3 functionality in TI Keystone2 and AM654 platforms. 96 94 Say 'Y' or 'M' here if you have one such device 97 95 98 96 config USB_DWC3_OF_SIMPLE
+9 -3
drivers/usb/dwc3/core.h
··· 692 692 #define DWC3_EP_WEDGE BIT(2) 693 693 #define DWC3_EP_TRANSFER_STARTED BIT(3) 694 694 #define DWC3_EP_PENDING_REQUEST BIT(5) 695 - #define DWC3_EP_END_TRANSFER_PENDING BIT(7) 696 695 697 696 /* This last one is specific to EP0 */ 698 697 #define DWC3_EP0_DIR_IN BIT(31) ··· 862 863 * @num_pending_sgs: counter to pending sgs 863 864 * @num_queued_sgs: counter to the number of sgs which already got queued 864 865 * @remaining: amount of data remaining 866 + * @status: internal dwc3 request status tracking 865 867 * @epnum: endpoint number to which this request refers 866 868 * @trb: pointer to struct dwc3_trb 867 869 * @trb_dma: DMA address of @trb ··· 871 871 * or unaligned OUT) 872 872 * @direction: IN or OUT direction flag 873 873 * @mapped: true when request has been dma-mapped 874 - * @started: request is started 875 874 */ 876 875 struct dwc3_request { 877 876 struct usb_request request; ··· 882 883 unsigned num_pending_sgs; 883 884 unsigned int num_queued_sgs; 884 885 unsigned remaining; 886 + 887 + unsigned int status; 888 + #define DWC3_REQUEST_STATUS_QUEUED 0 889 + #define DWC3_REQUEST_STATUS_STARTED 1 890 + #define DWC3_REQUEST_STATUS_CANCELLED 2 891 + #define DWC3_REQUEST_STATUS_COMPLETED 3 892 + #define DWC3_REQUEST_STATUS_UNKNOWN -1 893 + 885 894 u8 epnum; 886 895 struct dwc3_trb *trb; 887 896 dma_addr_t trb_dma; ··· 899 892 unsigned needs_extra_trb:1; 900 893 unsigned direction:1; 901 894 unsigned mapped:1; 902 - unsigned started:1; 903 895 }; 904 896 905 897 /*
+85 -71
drivers/usb/dwc3/debug.h
··· 193 193 * dwc3_gadget_event_string - returns event name 194 194 * @event: the event code 195 195 */ 196 - static inline const char * 197 - dwc3_gadget_event_string(char *str, const struct dwc3_event_devt *event) 196 + static inline const char *dwc3_gadget_event_string(char *str, size_t size, 197 + const struct dwc3_event_devt *event) 198 198 { 199 199 enum dwc3_link_state state = event->event_info & DWC3_LINK_STATE_MASK; 200 200 201 201 switch (event->type) { 202 202 case DWC3_DEVICE_EVENT_DISCONNECT: 203 - sprintf(str, "Disconnect: [%s]", 203 + snprintf(str, size, "Disconnect: [%s]", 204 204 dwc3_gadget_link_string(state)); 205 205 break; 206 206 case DWC3_DEVICE_EVENT_RESET: 207 - sprintf(str, "Reset [%s]", dwc3_gadget_link_string(state)); 207 + snprintf(str, size, "Reset [%s]", 208 + dwc3_gadget_link_string(state)); 208 209 break; 209 210 case DWC3_DEVICE_EVENT_CONNECT_DONE: 210 - sprintf(str, "Connection Done [%s]", 211 + snprintf(str, size, "Connection Done [%s]", 211 212 dwc3_gadget_link_string(state)); 212 213 break; 213 214 case DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE: 214 - sprintf(str, "Link Change [%s]", 215 + snprintf(str, size, "Link Change [%s]", 215 216 dwc3_gadget_link_string(state)); 216 217 break; 217 218 case DWC3_DEVICE_EVENT_WAKEUP: 218 - sprintf(str, "WakeUp [%s]", dwc3_gadget_link_string(state)); 219 + snprintf(str, size, "WakeUp [%s]", 220 + dwc3_gadget_link_string(state)); 219 221 break; 220 222 case DWC3_DEVICE_EVENT_EOPF: 221 - sprintf(str, "End-Of-Frame [%s]", 223 + snprintf(str, size, "End-Of-Frame [%s]", 222 224 dwc3_gadget_link_string(state)); 223 225 break; 224 226 case DWC3_DEVICE_EVENT_SOF: 225 - sprintf(str, "Start-Of-Frame [%s]", 227 + snprintf(str, size, "Start-Of-Frame [%s]", 226 228 dwc3_gadget_link_string(state)); 227 229 break; 228 230 case DWC3_DEVICE_EVENT_ERRATIC_ERROR: 229 - sprintf(str, "Erratic Error [%s]", 231 + snprintf(str, size, "Erratic Error [%s]", 230 232 dwc3_gadget_link_string(state)); 231 233 break; 232 234 case DWC3_DEVICE_EVENT_CMD_CMPL: 233 - sprintf(str, "Command Complete [%s]", 235 + snprintf(str, size, "Command Complete [%s]", 234 236 dwc3_gadget_link_string(state)); 235 237 break; 236 238 case DWC3_DEVICE_EVENT_OVERFLOW: 237 - sprintf(str, "Overflow [%s]", dwc3_gadget_link_string(state)); 239 + snprintf(str, size, "Overflow [%s]", 240 + dwc3_gadget_link_string(state)); 238 241 break; 239 242 default: 240 - sprintf(str, "UNKNOWN"); 243 + snprintf(str, size, "UNKNOWN"); 241 244 } 242 245 243 246 return str; 244 247 } 245 248 246 - static inline void dwc3_decode_get_status(__u8 t, __u16 i, __u16 l, char *str) 249 + static inline void dwc3_decode_get_status(__u8 t, __u16 i, __u16 l, char *str, 250 + size_t size) 247 251 { 248 252 switch (t & USB_RECIP_MASK) { 249 253 case USB_RECIP_INTERFACE: 250 - sprintf(str, "Get Interface Status(Intf = %d, Length = %d)", 251 - i, l); 254 + snprintf(str, size, "Get Interface Status(Intf = %d, Length = %d)", 255 + i, l); 252 256 break; 253 257 case USB_RECIP_ENDPOINT: 254 - sprintf(str, "Get Endpoint Status(ep%d%s)", 258 + snprintf(str, size, "Get Endpoint Status(ep%d%s)", 255 259 i & ~USB_DIR_IN, 256 260 i & USB_DIR_IN ? "in" : "out"); 257 261 break; ··· 263 259 } 264 260 265 261 static inline void dwc3_decode_set_clear_feature(__u8 t, __u8 b, __u16 v, 266 - __u16 i, char *str) 262 + __u16 i, char *str, size_t size) 267 263 { 268 264 switch (t & USB_RECIP_MASK) { 269 265 case USB_RECIP_DEVICE: 270 - sprintf(str, "%s Device Feature(%s%s)", 266 + snprintf(str, size, "%s Device Feature(%s%s)", 271 267 b == USB_REQ_CLEAR_FEATURE ? "Clear" : "Set", 272 268 ({char *s; 273 269 switch (v) { ··· 315 311 } s; }) : ""); 316 312 break; 317 313 case USB_RECIP_INTERFACE: 318 - sprintf(str, "%s Interface Feature(%s)", 314 + snprintf(str, size, "%s Interface Feature(%s)", 319 315 b == USB_REQ_CLEAR_FEATURE ? "Clear" : "Set", 320 316 v == USB_INTRF_FUNC_SUSPEND ? 321 317 "Function Suspend" : "UNKNOWN"); 322 318 break; 323 319 case USB_RECIP_ENDPOINT: 324 - sprintf(str, "%s Endpoint Feature(%s ep%d%s)", 320 + snprintf(str, size, "%s Endpoint Feature(%s ep%d%s)", 325 321 b == USB_REQ_CLEAR_FEATURE ? "Clear" : "Set", 326 322 v == USB_ENDPOINT_HALT ? "Halt" : "UNKNOWN", 327 323 i & ~USB_DIR_IN, ··· 330 326 } 331 327 } 332 328 333 - static inline void dwc3_decode_set_address(__u16 v, char *str) 329 + static inline void dwc3_decode_set_address(__u16 v, char *str, size_t size) 334 330 { 335 - sprintf(str, "Set Address(Addr = %02x)", v); 331 + snprintf(str, size, "Set Address(Addr = %02x)", v); 336 332 } 337 333 338 334 static inline void dwc3_decode_get_set_descriptor(__u8 t, __u8 b, __u16 v, 339 - __u16 i, __u16 l, char *str) 335 + __u16 i, __u16 l, char *str, size_t size) 340 336 { 341 - sprintf(str, "%s %s Descriptor(Index = %d, Length = %d)", 337 + snprintf(str, size, "%s %s Descriptor(Index = %d, Length = %d)", 342 338 b == USB_REQ_GET_DESCRIPTOR ? "Get" : "Set", 343 339 ({ char *s; 344 340 switch (v >> 8) { ··· 397 393 } 398 394 399 395 400 - static inline void dwc3_decode_get_configuration(__u16 l, char *str) 396 + static inline void dwc3_decode_get_configuration(__u16 l, char *str, 397 + size_t size) 401 398 { 402 - sprintf(str, "Get Configuration(Length = %d)", l); 399 + snprintf(str, size, "Get Configuration(Length = %d)", l); 403 400 } 404 401 405 - static inline void dwc3_decode_set_configuration(__u8 v, char *str) 402 + static inline void dwc3_decode_set_configuration(__u8 v, char *str, size_t size) 406 403 { 407 - sprintf(str, "Set Configuration(Config = %d)", v); 404 + snprintf(str, size, "Set Configuration(Config = %d)", v); 408 405 } 409 406 410 - static inline void dwc3_decode_get_intf(__u16 i, __u16 l, char *str) 407 + static inline void dwc3_decode_get_intf(__u16 i, __u16 l, char *str, 408 + size_t size) 411 409 { 412 - sprintf(str, "Get Interface(Intf = %d, Length = %d)", i, l); 410 + snprintf(str, size, "Get Interface(Intf = %d, Length = %d)", i, l); 413 411 } 414 412 415 - static inline void dwc3_decode_set_intf(__u8 v, __u16 i, char *str) 413 + static inline void dwc3_decode_set_intf(__u8 v, __u16 i, char *str, size_t size) 416 414 { 417 - sprintf(str, "Set Interface(Intf = %d, Alt.Setting = %d)", i, v); 415 + snprintf(str, size, "Set Interface(Intf = %d, Alt.Setting = %d)", i, v); 418 416 } 419 417 420 - static inline void dwc3_decode_synch_frame(__u16 i, __u16 l, char *str) 418 + static inline void dwc3_decode_synch_frame(__u16 i, __u16 l, char *str, 419 + size_t size) 421 420 { 422 - sprintf(str, "Synch Frame(Endpoint = %d, Length = %d)", i, l); 421 + snprintf(str, size, "Synch Frame(Endpoint = %d, Length = %d)", i, l); 423 422 } 424 423 425 - static inline void dwc3_decode_set_sel(__u16 l, char *str) 424 + static inline void dwc3_decode_set_sel(__u16 l, char *str, size_t size) 426 425 { 427 - sprintf(str, "Set SEL(Length = %d)", l); 426 + snprintf(str, size, "Set SEL(Length = %d)", l); 428 427 } 429 428 430 - static inline void dwc3_decode_set_isoch_delay(__u8 v, char *str) 429 + static inline void dwc3_decode_set_isoch_delay(__u8 v, char *str, size_t size) 431 430 { 432 - sprintf(str, "Set Isochronous Delay(Delay = %d ns)", v); 431 + snprintf(str, size, "Set Isochronous Delay(Delay = %d ns)", v); 433 432 } 434 433 435 434 /** 436 435 * dwc3_decode_ctrl - returns a string represetion of ctrl request 437 436 */ 438 - static inline const char *dwc3_decode_ctrl(char *str, __u8 bRequestType, 439 - __u8 bRequest, __u16 wValue, __u16 wIndex, __u16 wLength) 437 + static inline const char *dwc3_decode_ctrl(char *str, size_t size, 438 + __u8 bRequestType, __u8 bRequest, __u16 wValue, __u16 wIndex, 439 + __u16 wLength) 440 440 { 441 441 switch (bRequest) { 442 442 case USB_REQ_GET_STATUS: 443 - dwc3_decode_get_status(bRequestType, wIndex, wLength, str); 443 + dwc3_decode_get_status(bRequestType, wIndex, wLength, str, 444 + size); 444 445 break; 445 446 case USB_REQ_CLEAR_FEATURE: 446 447 case USB_REQ_SET_FEATURE: 447 448 dwc3_decode_set_clear_feature(bRequestType, bRequest, wValue, 448 - wIndex, str); 449 + wIndex, str, size); 449 450 break; 450 451 case USB_REQ_SET_ADDRESS: 451 - dwc3_decode_set_address(wValue, str); 452 + dwc3_decode_set_address(wValue, str, size); 452 453 break; 453 454 case USB_REQ_GET_DESCRIPTOR: 454 455 case USB_REQ_SET_DESCRIPTOR: 455 456 dwc3_decode_get_set_descriptor(bRequestType, bRequest, wValue, 456 - wIndex, wLength, str); 457 + wIndex, wLength, str, size); 457 458 break; 458 459 case USB_REQ_GET_CONFIGURATION: 459 - dwc3_decode_get_configuration(wLength, str); 460 + dwc3_decode_get_configuration(wLength, str, size); 460 461 break; 461 462 case USB_REQ_SET_CONFIGURATION: 462 - dwc3_decode_set_configuration(wValue, str); 463 + dwc3_decode_set_configuration(wValue, str, size); 463 464 break; 464 465 case USB_REQ_GET_INTERFACE: 465 - dwc3_decode_get_intf(wIndex, wLength, str); 466 + dwc3_decode_get_intf(wIndex, wLength, str, size); 466 467 break; 467 468 case USB_REQ_SET_INTERFACE: 468 - dwc3_decode_set_intf(wValue, wIndex, str); 469 + dwc3_decode_set_intf(wValue, wIndex, str, size); 469 470 break; 470 471 case USB_REQ_SYNCH_FRAME: 471 - dwc3_decode_synch_frame(wIndex, wLength, str); 472 + dwc3_decode_synch_frame(wIndex, wLength, str, size); 472 473 break; 473 474 case USB_REQ_SET_SEL: 474 - dwc3_decode_set_sel(wLength, str); 475 + dwc3_decode_set_sel(wLength, str, size); 475 476 break; 476 477 case USB_REQ_SET_ISOCH_DELAY: 477 - dwc3_decode_set_isoch_delay(wValue, str); 478 + dwc3_decode_set_isoch_delay(wValue, str, size); 478 479 break; 479 480 default: 480 - sprintf(str, "%02x %02x %02x %02x %02x %02x %02x %02x", 481 + snprintf(str, size, "%02x %02x %02x %02x %02x %02x %02x %02x", 481 482 bRequestType, bRequest, 482 483 cpu_to_le16(wValue) & 0xff, 483 484 cpu_to_le16(wValue) >> 8, ··· 499 490 * dwc3_ep_event_string - returns event name 500 491 * @event: then event code 501 492 */ 502 - static inline const char * 503 - dwc3_ep_event_string(char *str, const struct dwc3_event_depevt *event, 504 - u32 ep0state) 493 + static inline const char *dwc3_ep_event_string(char *str, size_t size, 494 + const struct dwc3_event_depevt *event, u32 ep0state) 505 495 { 506 496 u8 epnum = event->endpoint_number; 507 497 size_t len; 508 498 int status; 509 499 int ret; 510 500 511 - ret = sprintf(str, "ep%d%s: ", epnum >> 1, 501 + ret = snprintf(str, size, "ep%d%s: ", epnum >> 1, 512 502 (epnum & 1) ? "in" : "out"); 513 503 if (ret < 0) 514 504 return "UNKNOWN"; ··· 517 509 switch (event->endpoint_event) { 518 510 case DWC3_DEPEVT_XFERCOMPLETE: 519 511 len = strlen(str); 520 - sprintf(str + len, "Transfer Complete (%c%c%c)", 512 + snprintf(str + len, size - len, "Transfer Complete (%c%c%c)", 521 513 status & DEPEVT_STATUS_SHORT ? 'S' : 's', 522 514 status & DEPEVT_STATUS_IOC ? 'I' : 'i', 523 515 status & DEPEVT_STATUS_LST ? 'L' : 'l'); ··· 525 517 len = strlen(str); 526 518 527 519 if (epnum <= 1) 528 - sprintf(str + len, " [%s]", dwc3_ep0_state_string(ep0state)); 520 + snprintf(str + len, size - len, " [%s]", 521 + dwc3_ep0_state_string(ep0state)); 529 522 break; 530 523 case DWC3_DEPEVT_XFERINPROGRESS: 531 524 len = strlen(str); 532 525 533 - sprintf(str + len, "Transfer In Progress [%d] (%c%c%c)", 526 + snprintf(str + len, size - len, "Transfer In Progress [%d] (%c%c%c)", 534 527 event->parameters, 535 528 status & DEPEVT_STATUS_SHORT ? 'S' : 's', 536 529 status & DEPEVT_STATUS_IOC ? 'I' : 'i', ··· 540 531 case DWC3_DEPEVT_XFERNOTREADY: 541 532 len = strlen(str); 542 533 543 - sprintf(str + len, "Transfer Not Ready [%d]%s", 534 + snprintf(str + len, size - len, "Transfer Not Ready [%d]%s", 544 535 event->parameters, 545 536 status & DEPEVT_STATUS_TRANSFER_ACTIVE ? 546 537 " (Active)" : " (Not Active)"); 538 + 539 + len = strlen(str); 547 540 548 541 /* Control Endpoints */ 549 542 if (epnum <= 1) { ··· 553 542 554 543 switch (phase) { 555 544 case DEPEVT_STATUS_CONTROL_DATA: 556 - strcat(str, " [Data Phase]"); 545 + snprintf(str + ret, size - ret, 546 + " [Data Phase]"); 557 547 break; 558 548 case DEPEVT_STATUS_CONTROL_STATUS: 559 - strcat(str, " [Status Phase]"); 549 + snprintf(str + ret, size - ret, 550 + " [Status Phase]"); 560 551 } 561 552 } 562 553 break; 563 554 case DWC3_DEPEVT_RXTXFIFOEVT: 564 - strcat(str, "FIFO"); 555 + snprintf(str + ret, size - ret, "FIFO"); 565 556 break; 566 557 case DWC3_DEPEVT_STREAMEVT: 567 558 status = event->status; 568 559 569 560 switch (status) { 570 561 case DEPEVT_STREAMEVT_FOUND: 571 - sprintf(str + ret, " Stream %d Found", 562 + snprintf(str + ret, size - ret, " Stream %d Found", 572 563 event->parameters); 573 564 break; 574 565 case DEPEVT_STREAMEVT_NOTFOUND: 575 566 default: 576 - strcat(str, " Stream Not Found"); 567 + snprintf(str + ret, size - ret, " Stream Not Found"); 577 568 break; 578 569 } 579 570 580 571 break; 581 572 case DWC3_DEPEVT_EPCMDCMPLT: 582 - strcat(str, "Endpoint Command Complete"); 573 + snprintf(str + ret, size - ret, "Endpoint Command Complete"); 583 574 break; 584 575 default: 585 - sprintf(str, "UNKNOWN"); 576 + snprintf(str, size, "UNKNOWN"); 586 577 } 587 578 588 579 return str; ··· 624 611 } 625 612 } 626 613 627 - static inline const char *dwc3_decode_event(char *str, u32 event, u32 ep0state) 614 + static inline const char *dwc3_decode_event(char *str, size_t size, u32 event, 615 + u32 ep0state) 628 616 { 629 617 const union dwc3_event evt = (union dwc3_event) event; 630 618 631 619 if (evt.type.is_devspec) 632 - return dwc3_gadget_event_string(str, &evt.devt); 620 + return dwc3_gadget_event_string(str, size, &evt.devt); 633 621 else 634 - return dwc3_ep_event_string(str, &evt.depevt, ep0state); 622 + return dwc3_ep_event_string(str, size, &evt.depevt, ep0state); 635 623 } 636 624 637 625 static inline const char *dwc3_ep_cmd_status_string(int status)
+7 -2
drivers/usb/dwc3/drd.c
··· 457 457 * This device property is for kernel internal use only and 458 458 * is expected to be set by the glue code. 459 459 */ 460 - if (device_property_read_string(dev, "linux,extcon-name", &name) == 0) 461 - return extcon_get_extcon_dev(name); 460 + if (device_property_read_string(dev, "linux,extcon-name", &name) == 0) { 461 + edev = extcon_get_extcon_dev(name); 462 + if (!edev) 463 + return ERR_PTR(-EPROBE_DEFER); 464 + 465 + return edev; 466 + } 462 467 463 468 np_phy = of_parse_phandle(dev->of_node, "phys", 0); 464 469 np_conn = of_graph_get_remote_node(np_phy, -1, -1);
+9
drivers/usb/dwc3/dwc3-haps.c
··· 106 106 { 107 107 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 108 108 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3), 109 + /* 110 + * i.MX6QP and i.MX7D platform use a PCIe controller with the 111 + * same VID and PID as this USB controller. The system may 112 + * incorrectly match this driver to that PCIe controller. To 113 + * workaround this, specifically use class type USB to prevent 114 + * incorrect driver matching. 115 + */ 116 + .class = (PCI_CLASS_SERIAL_USB << 8), 117 + .class_mask = 0xffff00, 109 118 }, 110 119 { 111 120 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS,
+10 -1
drivers/usb/dwc3/dwc3-keystone.c
··· 106 106 goto err_irq; 107 107 } 108 108 109 + /* IRQ processing not required currently for AM65 */ 110 + if (of_device_is_compatible(node, "ti,am654-dwc3")) 111 + goto skip_irq; 112 + 109 113 irq = platform_get_irq(pdev, 0); 110 114 if (irq < 0) { 111 115 dev_err(&pdev->dev, "missing irq\n"); ··· 127 123 128 124 kdwc3_enable_irqs(kdwc); 129 125 126 + skip_irq: 130 127 error = of_platform_populate(node, NULL, NULL, dev); 131 128 if (error) { 132 129 dev_err(&pdev->dev, "failed to create dwc3 core\n"); ··· 157 152 static int kdwc3_remove(struct platform_device *pdev) 158 153 { 159 154 struct dwc3_keystone *kdwc = platform_get_drvdata(pdev); 155 + struct device_node *node = pdev->dev.of_node; 160 156 161 - kdwc3_disable_irqs(kdwc); 157 + if (!of_device_is_compatible(node, "ti,am654-dwc3")) 158 + kdwc3_disable_irqs(kdwc); 159 + 162 160 device_for_each_child(&pdev->dev, NULL, kdwc3_remove_core); 163 161 pm_runtime_put_sync(kdwc->dev); 164 162 pm_runtime_disable(kdwc->dev); ··· 173 165 174 166 static const struct of_device_id kdwc3_of_match[] = { 175 167 { .compatible = "ti,keystone-dwc3", }, 168 + { .compatible = "ti,am654-dwc3" }, 176 169 {}, 177 170 }; 178 171 MODULE_DEVICE_TABLE(of, kdwc3_of_match);
+1
drivers/usb/dwc3/dwc3-qcom.c
··· 595 595 static const struct of_device_id dwc3_qcom_of_match[] = { 596 596 { .compatible = "qcom,dwc3" }, 597 597 { .compatible = "qcom,msm8996-dwc3" }, 598 + { .compatible = "qcom,msm8998-dwc3" }, 598 599 { .compatible = "qcom,sdm845-dwc3" }, 599 600 { } 600 601 };
+34 -31
drivers/usb/dwc3/gadget.c
··· 174 174 { 175 175 struct dwc3 *dwc = dep->dwc; 176 176 177 - req->started = false; 178 177 list_del(&req->list); 179 178 req->remaining = 0; 180 179 req->needs_extra_trb = false; ··· 208 209 struct dwc3 *dwc = dep->dwc; 209 210 210 211 dwc3_gadget_del_and_unmap_request(dep, req, status); 212 + req->status = DWC3_REQUEST_STATUS_COMPLETED; 211 213 212 214 spin_unlock(&dwc->lock); 213 215 usb_gadget_giveback_request(&dep->endpoint, &req->request); ··· 384 384 385 385 trace_dwc3_gadget_ep_cmd(dep, cmd, params, cmd_status); 386 386 387 - if (ret == 0) { 388 - switch (DWC3_DEPCMD_CMD(cmd)) { 389 - case DWC3_DEPCMD_STARTTRANSFER: 390 - dep->flags |= DWC3_EP_TRANSFER_STARTED; 391 - dwc3_gadget_ep_get_transfer_index(dep); 392 - break; 393 - case DWC3_DEPCMD_ENDTRANSFER: 394 - dep->flags &= ~DWC3_EP_TRANSFER_STARTED; 395 - break; 396 - default: 397 - /* nothing */ 398 - break; 399 - } 387 + if (ret == 0 && DWC3_DEPCMD_CMD(cmd) == DWC3_DEPCMD_STARTTRANSFER) { 388 + dep->flags |= DWC3_EP_TRANSFER_STARTED; 389 + dwc3_gadget_ep_get_transfer_index(dep); 400 390 } 401 391 402 392 if (saved_config) { ··· 632 642 633 643 dep->type = usb_endpoint_type(desc); 634 644 dep->flags |= DWC3_EP_ENABLED; 635 - dep->flags &= ~DWC3_EP_END_TRANSFER_PENDING; 636 645 637 646 reg = dwc3_readl(dwc->regs, DWC3_DALEPENA); 638 647 reg |= DWC3_DALEPENA_EP(dep->number); ··· 687 698 return 0; 688 699 } 689 700 690 - static void dwc3_stop_active_transfer(struct dwc3_ep *dep, bool force); 701 + static void dwc3_stop_active_transfer(struct dwc3_ep *dep, bool force, 702 + bool interrupt); 691 703 static void dwc3_remove_requests(struct dwc3 *dwc, struct dwc3_ep *dep) 692 704 { 693 705 struct dwc3_request *req; 694 706 695 - dwc3_stop_active_transfer(dep, true); 707 + dwc3_stop_active_transfer(dep, true, false); 696 708 697 709 /* - giveback all requests to gadget driver */ 698 710 while (!list_empty(&dep->started_list)) { ··· 738 748 739 749 dep->stream_capable = false; 740 750 dep->type = 0; 741 - dep->flags &= DWC3_EP_END_TRANSFER_PENDING; 751 + dep->flags = 0; 742 752 743 753 /* Clear out the ep descriptors for non-ep0 */ 744 754 if (dep->number > 1) { ··· 837 847 req->direction = dep->direction; 838 848 req->epnum = dep->number; 839 849 req->dep = dep; 850 + req->status = DWC3_REQUEST_STATUS_UNKNOWN; 840 851 841 852 trace_dwc3_alloc_request(req); 842 853 ··· 1351 1360 * to wait for the next XferNotReady to test the command again 1352 1361 */ 1353 1362 if (cmd_status == 0) { 1354 - dwc3_stop_active_transfer(dep, true); 1363 + dwc3_stop_active_transfer(dep, true, true); 1355 1364 return 0; 1356 1365 } 1357 1366 } ··· 1426 1435 &req->request, req->dep->name)) 1427 1436 return -EINVAL; 1428 1437 1438 + if (WARN(req->status < DWC3_REQUEST_STATUS_COMPLETED, 1439 + "%s: request %pK already in flight\n", 1440 + dep->name, &req->request)) 1441 + return -EINVAL; 1442 + 1429 1443 pm_runtime_get(dwc->dev); 1430 1444 1431 1445 req->request.actual = 0; ··· 1439 1443 trace_dwc3_ep_queue(req); 1440 1444 1441 1445 list_add_tail(&req->list, &dep->pending_list); 1446 + req->status = DWC3_REQUEST_STATUS_QUEUED; 1442 1447 1443 1448 /* 1444 1449 * NOTICE: Isochronous endpoints should NEVER be prestarted. We must ··· 1503 1506 trb->ctrl &= ~DWC3_TRB_CTRL_HWO; 1504 1507 dwc3_ep_inc_deq(dep); 1505 1508 } 1509 + 1510 + req->num_trbs = 0; 1506 1511 } 1507 1512 1508 1513 static void dwc3_gadget_ep_cleanup_cancelled_requests(struct dwc3_ep *dep) ··· 1546 1547 } 1547 1548 if (r == req) { 1548 1549 /* wait until it is processed */ 1549 - dwc3_stop_active_transfer(dep, true); 1550 + dwc3_stop_active_transfer(dep, true, true); 1550 1551 1551 1552 if (!r->trb) 1552 1553 goto out0; 1553 1554 1554 1555 dwc3_gadget_move_cancelled_request(req); 1555 - goto out0; 1556 + if (dep->flags & DWC3_EP_TRANSFER_STARTED) 1557 + goto out0; 1558 + else 1559 + goto out1; 1556 1560 } 1557 1561 dev_err(dwc->dev, "request %pK was not queued to %s\n", 1558 1562 request, ep->name); ··· 1563 1561 goto out0; 1564 1562 } 1565 1563 1564 + out1: 1566 1565 dwc3_gadget_giveback(dep, req, -ECONNRESET); 1567 1566 1568 1567 out0: ··· 2503 2500 dwc3_gadget_ep_cleanup_completed_requests(dep, event, status); 2504 2501 2505 2502 if (stop) { 2506 - dwc3_stop_active_transfer(dep, true); 2503 + dwc3_stop_active_transfer(dep, true, true); 2507 2504 dep->flags = DWC3_EP_ENABLED; 2508 2505 } 2509 2506 ··· 2550 2547 dep = dwc->eps[epnum]; 2551 2548 2552 2549 if (!(dep->flags & DWC3_EP_ENABLED)) { 2553 - if (!(dep->flags & DWC3_EP_END_TRANSFER_PENDING)) 2550 + if (!(dep->flags & DWC3_EP_TRANSFER_STARTED)) 2554 2551 return; 2555 2552 2556 2553 /* Handle only EPCMDCMPLT when EP disabled */ ··· 2574 2571 cmd = DEPEVT_PARAMETER_CMD(event->parameters); 2575 2572 2576 2573 if (cmd == DWC3_DEPCMD_ENDTRANSFER) { 2577 - dep->flags &= ~DWC3_EP_END_TRANSFER_PENDING; 2574 + dep->flags &= ~DWC3_EP_TRANSFER_STARTED; 2578 2575 dwc3_gadget_ep_cleanup_cancelled_requests(dep); 2579 2576 } 2580 2577 break; ··· 2624 2621 } 2625 2622 } 2626 2623 2627 - static void dwc3_stop_active_transfer(struct dwc3_ep *dep, bool force) 2624 + static void dwc3_stop_active_transfer(struct dwc3_ep *dep, bool force, 2625 + bool interrupt) 2628 2626 { 2629 2627 struct dwc3 *dwc = dep->dwc; 2630 2628 struct dwc3_gadget_ep_cmd_params params; 2631 2629 u32 cmd; 2632 2630 int ret; 2633 2631 2634 - if ((dep->flags & DWC3_EP_END_TRANSFER_PENDING) || 2635 - !dep->resource_index) 2632 + if (!(dep->flags & DWC3_EP_TRANSFER_STARTED)) 2636 2633 return; 2637 2634 2638 2635 /* ··· 2668 2665 2669 2666 cmd = DWC3_DEPCMD_ENDTRANSFER; 2670 2667 cmd |= force ? DWC3_DEPCMD_HIPRI_FORCERM : 0; 2671 - cmd |= DWC3_DEPCMD_CMDIOC; 2668 + cmd |= interrupt ? DWC3_DEPCMD_CMDIOC : 0; 2672 2669 cmd |= DWC3_DEPCMD_PARAM(dep->resource_index); 2673 2670 memset(&params, 0, sizeof(params)); 2674 2671 ret = dwc3_send_gadget_ep_cmd(dep, cmd, &params); 2675 2672 WARN_ON_ONCE(ret); 2676 2673 dep->resource_index = 0; 2677 2674 2678 - if (dwc3_is_usb31(dwc) || dwc->revision < DWC3_REVISION_310A) { 2679 - dep->flags |= DWC3_EP_END_TRANSFER_PENDING; 2675 + if (dwc3_is_usb31(dwc) || dwc->revision < DWC3_REVISION_310A) 2680 2676 udelay(100); 2681 - } 2682 2677 } 2683 2678 2684 2679 static void dwc3_clear_stall_all_ep(struct dwc3 *dwc) ··· 3339 3338 dev_err(dwc->dev, "failed to register udc\n"); 3340 3339 goto err4; 3341 3340 } 3341 + 3342 + dwc3_gadget_set_speed(&dwc->gadget, dwc->maximum_speed); 3342 3343 3343 3344 return 0; 3344 3345
+2 -2
drivers/usb/dwc3/gadget.h
··· 75 75 { 76 76 struct dwc3_ep *dep = req->dep; 77 77 78 - req->started = true; 78 + req->status = DWC3_REQUEST_STATUS_STARTED; 79 79 list_move_tail(&req->list, &dep->started_list); 80 80 } 81 81 ··· 90 90 { 91 91 struct dwc3_ep *dep = req->dep; 92 92 93 - req->started = false; 93 + req->status = DWC3_REQUEST_STATUS_CANCELLED; 94 94 list_move_tail(&req->list, &dep->cancelled_list); 95 95 } 96 96
+5 -5
drivers/usb/dwc3/trace.h
··· 59 59 __entry->ep0state = dwc->ep0state; 60 60 ), 61 61 TP_printk("event (%08x): %s", __entry->event, 62 - dwc3_decode_event(__get_str(str), __entry->event, 63 - __entry->ep0state)) 62 + dwc3_decode_event(__get_str(str), DWC3_MSG_MAX, 63 + __entry->event, __entry->ep0state)) 64 64 ); 65 65 66 66 DEFINE_EVENT(dwc3_log_event, dwc3_event, ··· 86 86 __entry->wIndex = le16_to_cpu(ctrl->wIndex); 87 87 __entry->wLength = le16_to_cpu(ctrl->wLength); 88 88 ), 89 - TP_printk("%s", dwc3_decode_ctrl(__get_str(str), __entry->bRequestType, 89 + TP_printk("%s", dwc3_decode_ctrl(__get_str(str), DWC3_MSG_MAX, 90 + __entry->bRequestType, 90 91 __entry->bRequest, __entry->wValue, 91 92 __entry->wIndex, __entry->wLength) 92 93 ) ··· 306 305 __entry->trb_enqueue = dep->trb_enqueue; 307 306 __entry->trb_dequeue = dep->trb_dequeue; 308 307 ), 309 - TP_printk("%s: mps %d/%d streams %d burst %d ring %d/%d flags %c:%c%c%c%c:%c:%c", 308 + TP_printk("%s: mps %d/%d streams %d burst %d ring %d/%d flags %c:%c%c%c%c:%c", 310 309 __get_str(name), __entry->maxpacket, 311 310 __entry->maxpacket_limit, __entry->max_streams, 312 311 __entry->maxburst, __entry->trb_enqueue, ··· 316 315 __entry->flags & DWC3_EP_WEDGE ? 'W' : 'w', 317 316 __entry->flags & DWC3_EP_TRANSFER_STARTED ? 'B' : 'b', 318 317 __entry->flags & DWC3_EP_PENDING_REQUEST ? 'P' : 'p', 319 - __entry->flags & DWC3_EP_END_TRANSFER_PENDING ? 'E' : 'e', 320 318 __entry->direction ? '<' : '>' 321 319 ) 322 320 );
+1
drivers/usb/gadget/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 # 2 3 # USB Gadget support on a system involves 3 4 # (a) a peripheral controller, and
+24 -17
drivers/usb/gadget/epautoconf.c
··· 67 67 ) 68 68 { 69 69 struct usb_ep *ep; 70 - u8 type; 71 - 72 - type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; 73 70 74 71 if (gadget->ops->match_ep) { 75 72 ep = gadget->ops->match_ep(gadget, desc, ep_comp); ··· 106 109 desc->bEndpointAddress |= gadget->out_epnum; 107 110 } 108 111 109 - /* report (variable) full speed bulk maxpacket */ 110 - if ((type == USB_ENDPOINT_XFER_BULK) && !ep_comp) { 111 - int size = ep->maxpacket_limit; 112 - 113 - /* min() doesn't work on bitfields with gcc-3.5 */ 114 - if (size > 64) 115 - size = 64; 116 - desc->wMaxPacketSize = cpu_to_le16(size); 117 - } 118 - 119 112 ep->address = desc->bEndpointAddress; 120 113 ep->desc = NULL; 121 114 ep->comp_desc = NULL; ··· 139 152 * 140 153 * On success, this returns an claimed usb_ep, and modifies the endpoint 141 154 * descriptor bEndpointAddress. For bulk endpoints, the wMaxPacket value 142 - * is initialized as if the endpoint were used at full speed. To prevent 143 - * the endpoint from being returned by a later autoconfig call, claims it 144 - * by assigning ep->claimed to true. 155 + * is initialized as if the endpoint were used at full speed. Because of 156 + * that the users must consider adjusting the autoconfigured descriptor. 157 + * To prevent the endpoint from being returned by a later autoconfig call, 158 + * claims it by assigning ep->claimed to true. 145 159 * 146 160 * On failure, this returns a null endpoint descriptor. 147 161 */ ··· 151 163 struct usb_endpoint_descriptor *desc 152 164 ) 153 165 { 154 - return usb_ep_autoconfig_ss(gadget, desc, NULL); 166 + struct usb_ep *ep; 167 + u8 type; 168 + 169 + ep = usb_ep_autoconfig_ss(gadget, desc, NULL); 170 + if (!ep) 171 + return NULL; 172 + 173 + type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; 174 + 175 + /* report (variable) full speed bulk maxpacket */ 176 + if (type == USB_ENDPOINT_XFER_BULK) { 177 + int size = ep->maxpacket_limit; 178 + 179 + /* min() doesn't work on bitfields with gcc-3.5 */ 180 + if (size > 64) 181 + size = 64; 182 + desc->wMaxPacketSize = cpu_to_le16(size); 183 + } 184 + 185 + return ep; 155 186 } 156 187 EXPORT_SYMBOL_GPL(usb_ep_autoconfig); 157 188
+12
drivers/usb/gadget/function/f_fs.c
··· 1082 1082 * condition with req->complete callback. 1083 1083 */ 1084 1084 usb_ep_dequeue(ep->ep, req); 1085 + wait_for_completion(&done); 1085 1086 interrupted = ep->status < 0; 1086 1087 } 1087 1088 ··· 2844 2843 struct usb_request *req; 2845 2844 struct usb_ep *ep; 2846 2845 u8 bEndpointAddress; 2846 + u16 wMaxPacketSize; 2847 2847 2848 2848 /* 2849 2849 * We back up bEndpointAddress because autoconfig overwrites 2850 2850 * it with physical endpoint address. 2851 2851 */ 2852 2852 bEndpointAddress = ds->bEndpointAddress; 2853 + /* 2854 + * We back up wMaxPacketSize because autoconfig treats 2855 + * endpoint descriptors as if they were full speed. 2856 + */ 2857 + wMaxPacketSize = ds->wMaxPacketSize; 2853 2858 pr_vdebug("autoconfig\n"); 2854 2859 ep = usb_ep_autoconfig(func->gadget, ds); 2855 2860 if (unlikely(!ep)) ··· 2876 2869 */ 2877 2870 if (func->ffs->user_flags & FUNCTIONFS_VIRTUAL_ADDR) 2878 2871 ds->bEndpointAddress = bEndpointAddress; 2872 + /* 2873 + * Restore wMaxPacketSize which was potentially 2874 + * overwritten by autoconfig. 2875 + */ 2876 + ds->wMaxPacketSize = wMaxPacketSize; 2879 2877 } 2880 2878 ffs_dump_mem(": Rewritten ep desc", ds, ds->bLength); 2881 2879
+6 -4
drivers/usb/gadget/function/f_uac1.c
··· 459 459 } else if (intf == uac1->as_in_intf) { 460 460 uac1->as_in_alt = alt; 461 461 462 - if (alt) 463 - ret = u_audio_start_playback(&uac1->g_audio); 464 - else 465 - u_audio_stop_playback(&uac1->g_audio); 462 + if (alt) 463 + ret = u_audio_start_playback(&uac1->g_audio); 464 + else 465 + u_audio_stop_playback(&uac1->g_audio); 466 466 } else { 467 467 dev_err(dev, "%s:%d Error!\n", __func__, __LINE__); 468 468 return -EINVAL; ··· 568 568 goto fail; 569 569 as_out_interface_alt_0_desc.bInterfaceNumber = status; 570 570 as_out_interface_alt_1_desc.bInterfaceNumber = status; 571 + ac_header_desc.baInterfaceNr[0] = status; 571 572 uac1->as_out_intf = status; 572 573 uac1->as_out_alt = 0; 573 574 ··· 577 576 goto fail; 578 577 as_in_interface_alt_0_desc.bInterfaceNumber = status; 579 578 as_in_interface_alt_1_desc.bInterfaceNumber = status; 579 + ac_header_desc.baInterfaceNr[1] = status; 580 580 uac1->as_in_intf = status; 581 581 uac1->as_in_alt = 0; 582 582
+1 -1
drivers/usb/gadget/function/u_ecm.h
··· 7 7 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 8 8 * http://www.samsung.com 9 9 * 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 13 13 #ifndef U_ECM_H
+1 -1
drivers/usb/gadget/function/u_eem.h
··· 7 7 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 8 8 * http://www.samsung.com 9 9 * 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 13 13 #ifndef U_EEM_H
+1 -1
drivers/usb/gadget/function/u_ether_configfs.h
··· 7 7 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 8 8 * http://www.samsung.com 9 9 * 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 13 13 #ifndef __U_ETHER_CONFIGFS_H
+1 -1
drivers/usb/gadget/function/u_fs.h
··· 7 7 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 8 8 * http://www.samsung.com 9 9 * 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 13 13 #ifndef U_FFS_H
+1 -1
drivers/usb/gadget/function/u_gether.h
··· 7 7 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 8 8 * http://www.samsung.com 9 9 * 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 13 13 #ifndef U_GETHER_H
+1 -1
drivers/usb/gadget/function/u_hid.h
··· 7 7 * Copyright (c) 2014 Samsung Electronics Co., Ltd. 8 8 * http://www.samsung.com 9 9 * 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 13 13 #ifndef U_HID_H
+1 -1
drivers/usb/gadget/function/u_midi.h
··· 7 7 * Copyright (c) 2014 Samsung Electronics Co., Ltd. 8 8 * http://www.samsung.com 9 9 * 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 13 13 #ifndef U_MIDI_H
+1 -1
drivers/usb/gadget/function/u_ncm.h
··· 7 7 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 8 8 * http://www.samsung.com 9 9 * 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 13 13 #ifndef U_NCM_H
+1 -1
drivers/usb/gadget/function/u_printer.h
··· 7 7 * Copyright (c) 2015 Samsung Electronics Co., Ltd. 8 8 * http://www.samsung.com 9 9 * 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 13 13 #ifndef U_PRINTER_H
+1 -1
drivers/usb/gadget/function/u_rndis.h
··· 7 7 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 8 8 * http://www.samsung.com 9 9 * 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 13 13 #ifndef U_RNDIS_H
+14 -21
drivers/usb/gadget/function/u_serial.c
··· 16 16 17 17 #include <linux/kernel.h> 18 18 #include <linux/sched.h> 19 - #include <linux/interrupt.h> 20 19 #include <linux/device.h> 21 20 #include <linux/delay.h> 22 21 #include <linux/tty.h> ··· 25 26 #include <linux/module.h> 26 27 #include <linux/console.h> 27 28 #include <linux/kthread.h> 29 + #include <linux/workqueue.h> 28 30 #include <linux/kfifo.h> 29 31 30 32 #include "u_serial.h" ··· 110 110 int read_allocated; 111 111 struct list_head read_queue; 112 112 unsigned n_read; 113 - struct tasklet_struct push; 113 + struct delayed_work push; 114 114 115 115 struct list_head write_pool; 116 116 int write_started; ··· 352 352 * So QUEUE_SIZE packets plus however many the FIFO holds (usually two) 353 353 * can be buffered before the TTY layer's buffers (currently 64 KB). 354 354 */ 355 - static void gs_rx_push(unsigned long _port) 355 + static void gs_rx_push(struct work_struct *work) 356 356 { 357 - struct gs_port *port = (void *)_port; 357 + struct delayed_work *w = to_delayed_work(work); 358 + struct gs_port *port = container_of(w, struct gs_port, push); 358 359 struct tty_struct *tty; 359 360 struct list_head *queue = &port->read_queue; 360 361 bool disconnect = false; ··· 430 429 431 430 /* We want our data queue to become empty ASAP, keeping data 432 431 * in the tty and ldisc (not here). If we couldn't push any 433 - * this time around, there may be trouble unless there's an 434 - * implicit tty_unthrottle() call on its way... 432 + * this time around, RX may be starved, so wait until next jiffy. 435 433 * 436 - * REVISIT we should probably add a timer to keep the tasklet 437 - * from starving ... but it's not clear that case ever happens. 434 + * We may leave non-empty queue only when there is a tty, and 435 + * either it is throttled or there is no more room in flip buffer. 438 436 */ 439 - if (!list_empty(queue) && tty) { 440 - if (!tty_throttled(tty)) { 441 - if (do_push) 442 - tasklet_schedule(&port->push); 443 - else 444 - pr_warn("ttyGS%d: RX not scheduled?\n", 445 - port->port_num); 446 - } 447 - } 437 + if (!list_empty(queue) && !tty_throttled(tty)) 438 + schedule_delayed_work(&port->push, 1); 448 439 449 440 /* If we're still connected, refill the USB RX queue. */ 450 441 if (!disconnect && port->port_usb) ··· 452 459 /* Queue all received data until the tty layer is ready for it. */ 453 460 spin_lock(&port->port_lock); 454 461 list_add_tail(&req->list, &port->read_queue); 455 - tasklet_schedule(&port->push); 462 + schedule_delayed_work(&port->push, 0); 456 463 spin_unlock(&port->port_lock); 457 464 } 458 465 ··· 847 854 * rts/cts, or other handshaking with the host, but if the 848 855 * read queue backs up enough we'll be NAKing OUT packets. 849 856 */ 850 - tasklet_schedule(&port->push); 851 857 pr_vdebug("ttyGS%d: unthrottle\n", port->port_num); 858 + schedule_delayed_work(&port->push, 0); 852 859 } 853 860 spin_unlock_irqrestore(&port->port_lock, flags); 854 861 } ··· 1152 1159 init_waitqueue_head(&port->drain_wait); 1153 1160 init_waitqueue_head(&port->close_wait); 1154 1161 1155 - tasklet_init(&port->push, gs_rx_push, (unsigned long) port); 1162 + INIT_DELAYED_WORK(&port->push, gs_rx_push); 1156 1163 1157 1164 INIT_LIST_HEAD(&port->read_pool); 1158 1165 INIT_LIST_HEAD(&port->read_queue); ··· 1179 1186 1180 1187 static void gserial_free_port(struct gs_port *port) 1181 1188 { 1182 - tasklet_kill(&port->push); 1189 + cancel_delayed_work_sync(&port->push); 1183 1190 /* wait for old opens to finish */ 1184 1191 wait_event(port->close_wait, gs_closed(port)); 1185 1192 WARN_ON(port->port_usb != NULL);
+1 -1
drivers/usb/gadget/function/u_uac2.h
··· 7 7 * Copyright (c) 2014 Samsung Electronics Co., Ltd. 8 8 * http://www.samsung.com 9 9 * 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 13 13 #ifndef U_UAC2_H
+1 -1
drivers/usb/gadget/function/u_uvc.h
··· 7 7 * Copyright (c) 2013-2014 Samsung Electronics Co., Ltd. 8 8 * http://www.samsung.com 9 9 * 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 13 13 #ifndef U_UVC_H
+2
drivers/usb/gadget/function/uvc.h
··· 56 56 dev_dbg(&(f)->config->cdev->gadget->dev, "%s: " fmt, (f)->name, ##args) 57 57 #define uvcg_info(f, fmt, args...) \ 58 58 dev_info(&(f)->config->cdev->gadget->dev, "%s: " fmt, (f)->name, ##args) 59 + #define uvcg_warn(f, fmt, args...) \ 60 + dev_warn(&(f)->config->cdev->gadget->dev, "%s: " fmt, (f)->name, ##args) 59 61 #define uvcg_err(f, fmt, args...) \ 60 62 dev_err(&(f)->config->cdev->gadget->dev, "%s: " fmt, (f)->name, ##args) 61 63
+1 -9
drivers/usb/gadget/function/uvc_configfs.c
··· 7 7 * Copyright (c) 2014 Samsung Electronics Co., Ltd. 8 8 * http://www.samsung.com 9 9 * 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 13 13 #include <linux/sort.h> ··· 1570 1570 if (ret) \ 1571 1571 goto end; \ 1572 1572 \ 1573 - if (num > 255) { \ 1574 - ret = -EINVAL; \ 1575 - goto end; \ 1576 - } \ 1577 1573 u->desc.aname = num; \ 1578 1574 ret = len; \ 1579 1575 end: \ ··· 1763 1767 if (ret) \ 1764 1768 goto end; \ 1765 1769 \ 1766 - if (num > 255) { \ 1767 - ret = -EINVAL; \ 1768 - goto end; \ 1769 - } \ 1770 1770 u->desc.aname = num; \ 1771 1771 ret = len; \ 1772 1772 end: \
+1 -1
drivers/usb/gadget/function/uvc_configfs.h
··· 7 7 * Copyright (c) 2014 Samsung Electronics Co., Ltd. 8 8 * http://www.samsung.com 9 9 * 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 #ifndef UVC_CONFIGFS_H 13 13 #define UVC_CONFIGFS_H
+1 -1
drivers/usb/gadget/function/uvc_v4l2.h
··· 7 7 * 8 8 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 9 9 * http://www.samsung.com 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 13 13 #ifndef __UVC_V4L2_H__
+1 -1
drivers/usb/gadget/function/uvc_video.h
··· 7 7 * 8 8 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 9 9 * http://www.samsung.com 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 #ifndef __UVC_VIDEO_H__ 13 13 #define __UVC_VIDEO_H__
+1
drivers/usb/gadget/legacy/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 # 2 3 # USB Gadget support on a system involves 3 4 # (a) a peripheral controller, and
+17 -17
drivers/usb/gadget/legacy/inode.c
··· 1218 1218 if (dev->state <= STATE_DEV_OPENED) 1219 1219 return DEFAULT_POLLMASK; 1220 1220 1221 - poll_wait(fd, &dev->wait, wait); 1221 + poll_wait(fd, &dev->wait, wait); 1222 1222 1223 - spin_lock_irq (&dev->lock); 1223 + spin_lock_irq(&dev->lock); 1224 1224 1225 - /* report fd mode change before acting on it */ 1226 - if (dev->setup_abort) { 1227 - dev->setup_abort = 0; 1228 - mask = EPOLLHUP; 1229 - goto out; 1230 - } 1225 + /* report fd mode change before acting on it */ 1226 + if (dev->setup_abort) { 1227 + dev->setup_abort = 0; 1228 + mask = EPOLLHUP; 1229 + goto out; 1230 + } 1231 1231 1232 - if (dev->state == STATE_DEV_SETUP) { 1233 - if (dev->setup_in || dev->setup_can_stall) 1234 - mask = EPOLLOUT; 1235 - } else { 1236 - if (dev->ev_next != 0) 1237 - mask = EPOLLIN; 1238 - } 1232 + if (dev->state == STATE_DEV_SETUP) { 1233 + if (dev->setup_in || dev->setup_can_stall) 1234 + mask = EPOLLOUT; 1235 + } else { 1236 + if (dev->ev_next != 0) 1237 + mask = EPOLLIN; 1238 + } 1239 1239 out: 1240 - spin_unlock_irq(&dev->lock); 1241 - return mask; 1240 + spin_unlock_irq(&dev->lock); 1241 + return mask; 1242 1242 } 1243 1243 1244 1244 static long dev_ioctl (struct file *fd, unsigned code, unsigned long value)
+1 -1
drivers/usb/gadget/u_f.c
··· 5 5 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 6 6 * http://www.samsung.com 7 7 * 8 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 8 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 9 9 */ 10 10 11 11 #include "u_f.h"
+1 -1
drivers/usb/gadget/u_f.h
··· 7 7 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 8 8 * http://www.samsung.com 9 9 * 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 13 13 #ifndef __U_F_H__
+1 -1
drivers/usb/gadget/u_os_desc.h
··· 7 7 * Copyright (c) 2014 Samsung Electronics Co., Ltd. 8 8 * http://www.samsung.com 9 9 * 10 - * Author: Andrzej Pietrasiewicz <andrzej.p@samsung.com> 10 + * Author: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> 11 11 */ 12 12 13 13 #ifndef __U_OS_DESC_H__
+1
drivers/usb/gadget/udc/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 # 2 3 # USB Gadget support on a system involves 3 4 # (a) a peripheral controller, and
+1 -1
drivers/usb/gadget/udc/aspeed-vhub/epn.c
··· 120 120 /* No current DMA ongoing */ 121 121 req->active = false; 122 122 123 - /* Grab lenght out of HW */ 123 + /* Grab length out of HW */ 124 124 len = VHUB_EP_DMA_TX_SIZE(stat); 125 125 126 126 /* If not using DMA, copy data out if needed */
+1 -1
drivers/usb/gadget/udc/aspeed-vhub/hub.c
··· 295 295 dsize = AST_VHUB_HUB_DESC_SIZE; 296 296 memcpy(ep->buf, &ast_vhub_hub_desc, dsize); 297 297 BUILD_BUG_ON(dsize > sizeof(ast_vhub_hub_desc)); 298 - BUILD_BUG_ON(AST_VHUB_HUB_DESC_SIZE >= AST_VHUB_EP0_MAX_PACKET); 298 + BUILD_BUG_ON(AST_VHUB_HUB_DESC_SIZE >= AST_VHUB_EP0_MAX_PACKET); 299 299 break; 300 300 default: 301 301 return std_req_stall;
+2
drivers/usb/gadget/udc/bdc/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + 1 3 config USB_BDC_UDC 2 4 tristate "Broadcom USB3.0 device controller IP driver(BDC)" 3 5 depends on USB_GADGET && HAS_DMA
+2 -2
drivers/usb/gadget/udc/bdc/bdc_cmd.c
··· 311 311 /* if the endpoint it not stallled */ 312 312 if (!(ep->flags & BDC_EP_STALL)) { 313 313 ret = bdc_ep_set_stall(bdc, epnum); 314 - if (ret) 315 - return ret; 314 + if (ret) 315 + return ret; 316 316 } 317 317 } 318 318 /* Preserve the seq number for ep0 only */
+4 -4
drivers/usb/gadget/udc/core.c
··· 281 281 * @ep:the endpoint associated with the request 282 282 * @req:the request being canceled 283 283 * 284 - * If the request is still active on the endpoint, it is dequeued and its 285 - * completion routine is called (with status -ECONNRESET); else a negative 286 - * error code is returned. This is guaranteed to happen before the call to 287 - * usb_ep_dequeue() returns. 284 + * If the request is still active on the endpoint, it is dequeued and 285 + * eventually its completion routine is called (with status -ECONNRESET); 286 + * else a negative error code is returned. This routine is asynchronous, 287 + * that is, it may return before the completion routine runs. 288 288 * 289 289 * Note that some hardware can't clear out write fifos (to unlink the request 290 290 * at the head of the queue) except as part of disconnecting from usb. Such
+4 -7
drivers/usb/gadget/udc/fotg210-udc.c
··· 326 326 static void fotg210_start_dma(struct fotg210_ep *ep, 327 327 struct fotg210_request *req) 328 328 { 329 + struct device *dev = &ep->fotg210->gadget.dev; 329 330 dma_addr_t d; 330 331 u8 *buffer; 331 332 u32 length; ··· 349 348 length = req->req.length; 350 349 } 351 350 352 - d = dma_map_single(NULL, buffer, length, 351 + d = dma_map_single(dev, buffer, length, 353 352 ep->dir_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); 354 353 355 - if (dma_mapping_error(NULL, d)) { 354 + if (dma_mapping_error(dev, d)) { 356 355 pr_err("dma_mapping_error\n"); 357 356 return; 358 357 } 359 - 360 - dma_sync_single_for_device(NULL, d, length, 361 - ep->dir_in ? DMA_TO_DEVICE : 362 - DMA_FROM_DEVICE); 363 358 364 359 fotg210_enable_dma(ep, d, length); 365 360 ··· 367 370 /* update actual transfer length */ 368 371 req->req.actual += length; 369 372 370 - dma_unmap_single(NULL, d, length, DMA_TO_DEVICE); 373 + dma_unmap_single(dev, d, length, DMA_TO_DEVICE); 371 374 } 372 375 373 376 static void fotg210_ep0_queue(struct fotg210_ep *ep,
+3 -3
drivers/usb/gadget/udc/net2280.c
··· 516 516 unsigned long flags; 517 517 518 518 ep = container_of(_ep, struct net2280_ep, ep); 519 - if (!_ep || !ep->desc || _ep->name == ep0name) { 520 - pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep); 519 + if (!_ep || _ep->name == ep0name) { 520 + pr_err("%s: Invalid ep=%p\n", __func__, _ep); 521 521 return -EINVAL; 522 522 } 523 523 spin_lock_irqsave(&ep->dev->lock, flags); ··· 2279 2279 * - It is safe to set for all connection speeds; all chip revisions. 2280 2280 * - R-M-W to leave other bits undisturbed. 2281 2281 * - Reference PLX TT-7372 2282 - */ 2282 + */ 2283 2283 val = readl(&dev->ll_chicken_reg->ll_tsn_chicken_bit); 2284 2284 val |= BIT(RECOVERY_IDLE_TO_RECOVER_FMW); 2285 2285 writel(val, &dev->ll_chicken_reg->ll_tsn_chicken_bit);
+4
drivers/usb/gadget/udc/renesas_usb3.c
··· 2630 2630 2631 2631 static const struct soc_device_attribute renesas_usb3_quirks_match[] = { 2632 2632 { 2633 + .soc_id = "r8a774c0", 2634 + .data = &renesas_usb3_priv_r8a77990, 2635 + }, 2636 + { 2633 2637 .soc_id = "r8a7795", .revision = "ES1.*", 2634 2638 .data = &renesas_usb3_priv_r8a7795_es1, 2635 2639 },
+8 -9
drivers/usb/gadget/udc/snps_udc_core.c
··· 947 947 UDC_DMA_STP_STS_BS_HOST_READY, 948 948 UDC_DMA_STP_STS_BS); 949 949 950 - 951 - /* clear NAK by writing CNAK */ 952 - if (ep->naking) { 953 - tmp = readl(&ep->regs->ctl); 954 - tmp |= AMD_BIT(UDC_EPCTL_CNAK); 955 - writel(tmp, &ep->regs->ctl); 956 - ep->naking = 0; 957 - UDC_QUEUE_CNAK(ep, ep->num); 958 - } 950 + /* clear NAK by writing CNAK */ 951 + if (ep->naking) { 952 + tmp = readl(&ep->regs->ctl); 953 + tmp |= AMD_BIT(UDC_EPCTL_CNAK); 954 + writel(tmp, &ep->regs->ctl); 955 + ep->naking = 0; 956 + UDC_QUEUE_CNAK(ep, ep->num); 957 + } 959 958 960 959 } 961 960
+4 -4
drivers/usb/host/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 # 2 3 # USB Host Controller Drivers 3 4 # ··· 70 69 If unsure, say N. 71 70 72 71 config USB_XHCI_MVEBU 73 - tristate "xHCI support for Marvell Armada 375/38x" 72 + tristate "xHCI support for Marvell Armada 375/38x/37xx" 74 73 select USB_XHCI_PLATFORM 75 74 depends on HAS_IOMEM 76 75 depends on ARCH_MVEBU || COMPILE_TEST 77 76 ---help--- 78 77 Say 'Y' to enable the support for the xHCI host controller 79 - found in Marvell Armada 375/38x ARM SOCs. 78 + found in Marvell Armada 375/38x/37xx ARM SOCs. 80 79 81 80 config USB_XHCI_RCAR 82 81 tristate "xHCI support for Renesas R-Car SoCs" ··· 180 179 devices only. 181 180 182 181 config USB_EHCI_FSL 183 - tristate "Support for Freescale PPC on-chip EHCI USB controller" 184 - depends on FSL_SOC 182 + tristate "Support for Freescale on-chip EHCI USB controller" 185 183 select USB_EHCI_ROOT_HUB_TT 186 184 ---help--- 187 185 Variation of ARC USB block used in some Freescale chips.
+42 -27
drivers/usb/host/ehci-fsl.c
··· 23 23 #include <linux/platform_device.h> 24 24 #include <linux/fsl_devices.h> 25 25 #include <linux/of_platform.h> 26 + #include <linux/io.h> 26 27 27 28 #include "ehci.h" 28 29 #include "ehci-fsl.h" ··· 51 50 struct resource *res; 52 51 int irq; 53 52 int retval; 53 + u32 tmp; 54 54 55 55 pr_debug("initializing FSL-SOC USB Controller\n"); 56 56 ··· 116 114 } 117 115 118 116 /* Enable USB controller, 83xx or 8536 */ 119 - if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6) 120 - clrsetbits_be32(hcd->regs + FSL_SOC_USB_CTRL, 121 - CONTROL_REGISTER_W1C_MASK, 0x4); 122 - 117 + if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6) { 118 + tmp = ioread32be(hcd->regs + FSL_SOC_USB_CTRL); 119 + tmp &= ~CONTROL_REGISTER_W1C_MASK; 120 + tmp |= 0x4; 121 + iowrite32be(tmp, hcd->regs + FSL_SOC_USB_CTRL); 122 + } 123 123 /* 124 124 * Enable UTMI phy and program PTS field in UTMI mode before asserting 125 125 * controller reset for USB Controller version 2.5 126 126 */ 127 127 if (pdata->has_fsl_erratum_a007792) { 128 - clrsetbits_be32(hcd->regs + FSL_SOC_USB_CTRL, 129 - CONTROL_REGISTER_W1C_MASK, CTRL_UTMI_PHY_EN); 128 + tmp = ioread32be(hcd->regs + FSL_SOC_USB_CTRL); 129 + tmp &= ~CONTROL_REGISTER_W1C_MASK; 130 + tmp |= CTRL_UTMI_PHY_EN; 131 + iowrite32be(tmp, hcd->regs + FSL_SOC_USB_CTRL); 132 + 130 133 writel(PORT_PTS_UTMI, hcd->regs + FSL_SOC_USB_PORTSC1); 131 134 } 132 135 ··· 181 174 enum fsl_usb2_phy_modes phy_mode, 182 175 unsigned int port_offset) 183 176 { 184 - u32 portsc; 177 + u32 portsc, tmp; 185 178 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 186 179 void __iomem *non_ehci = hcd->regs; 187 180 struct device *dev = hcd->self.controller; ··· 199 192 case FSL_USB2_PHY_ULPI: 200 193 if (pdata->have_sysif_regs && pdata->controller_ver) { 201 194 /* controller version 1.6 or above */ 202 - clrbits32(non_ehci + FSL_SOC_USB_CTRL, 203 - CONTROL_REGISTER_W1C_MASK | UTMI_PHY_EN); 204 - clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL, 205 - CONTROL_REGISTER_W1C_MASK, 206 - ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN); 195 + /* turn off UTMI PHY first */ 196 + tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL); 197 + tmp &= ~(CONTROL_REGISTER_W1C_MASK | UTMI_PHY_EN); 198 + iowrite32be(tmp, non_ehci + FSL_SOC_USB_CTRL); 199 + 200 + /* then turn on ULPI and enable USB controller */ 201 + tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL); 202 + tmp &= ~CONTROL_REGISTER_W1C_MASK; 203 + tmp |= ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN; 204 + iowrite32be(tmp, non_ehci + FSL_SOC_USB_CTRL); 207 205 } 208 206 portsc |= PORT_PTS_ULPI; 209 207 break; ··· 222 210 case FSL_USB2_PHY_UTMI_DUAL: 223 211 if (pdata->have_sysif_regs && pdata->controller_ver) { 224 212 /* controller version 1.6 or above */ 225 - clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL, 226 - CONTROL_REGISTER_W1C_MASK, UTMI_PHY_EN); 213 + tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL); 214 + tmp &= ~CONTROL_REGISTER_W1C_MASK; 215 + tmp |= UTMI_PHY_EN; 216 + iowrite32be(tmp, non_ehci + FSL_SOC_USB_CTRL); 217 + 227 218 mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to 228 219 become stable - 10ms*/ 229 220 } 230 221 /* enable UTMI PHY */ 231 - if (pdata->have_sysif_regs) 232 - clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL, 233 - CONTROL_REGISTER_W1C_MASK, 234 - CTRL_UTMI_PHY_EN); 222 + if (pdata->have_sysif_regs) { 223 + tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL); 224 + tmp &= ~CONTROL_REGISTER_W1C_MASK; 225 + tmp |= CTRL_UTMI_PHY_EN; 226 + iowrite32be(tmp, non_ehci + FSL_SOC_USB_CTRL); 227 + } 235 228 portsc |= PORT_PTS_UTMI; 236 229 break; 237 230 case FSL_USB2_PHY_NONE: ··· 258 241 259 242 ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]); 260 243 261 - if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs) 262 - clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL, 263 - CONTROL_REGISTER_W1C_MASK, USB_CTRL_USB_EN); 244 + if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs) { 245 + tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL); 246 + tmp &= ~CONTROL_REGISTER_W1C_MASK; 247 + tmp |= USB_CTRL_USB_EN; 248 + iowrite32be(tmp, non_ehci + FSL_SOC_USB_CTRL); 249 + } 264 250 265 251 return 0; 266 252 } ··· 304 284 return -EINVAL; 305 285 306 286 if (pdata->operating_mode == FSL_USB2_MPH_HOST) { 307 - unsigned int chip, rev, svr; 308 - 309 - svr = mfspr(SPRN_SVR); 310 - chip = svr >> 16; 311 - rev = (svr >> 4) & 0xf; 312 287 313 288 /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */ 314 - if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055)) 289 + if (pdata->has_fsl_erratum_14 == 1) 315 290 ehci->has_fsl_port_bug = 1; 316 291 317 292 if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
+21 -23
drivers/usb/host/ehci-orion.c
··· 182 182 return ret; 183 183 } 184 184 185 + static int __maybe_unused ehci_orion_drv_suspend(struct device *dev) 186 + { 187 + struct usb_hcd *hcd = dev_get_drvdata(dev); 188 + 189 + return ehci_suspend(hcd, device_may_wakeup(dev)); 190 + } 191 + 192 + static int __maybe_unused ehci_orion_drv_resume(struct device *dev) 193 + { 194 + struct usb_hcd *hcd = dev_get_drvdata(dev); 195 + 196 + return ehci_resume(hcd, false); 197 + } 198 + 199 + static SIMPLE_DEV_PM_OPS(ehci_orion_pm_ops, ehci_orion_drv_suspend, 200 + ehci_orion_drv_resume); 201 + 185 202 static const struct ehci_driver_overrides orion_overrides __initconst = { 186 203 .extra_priv_size = sizeof(struct orion_ehci_hcd), 187 204 .reset = ehci_orion_drv_reset, ··· 274 257 if (IS_ERR(priv->phy)) { 275 258 err = PTR_ERR(priv->phy); 276 259 if (err != -ENOSYS) 277 - goto err_phy_get; 278 - } else { 279 - err = phy_init(priv->phy); 280 - if (err) 281 - goto err_phy_init; 282 - 283 - err = phy_power_on(priv->phy); 284 - if (err) 285 - goto err_phy_power_on; 260 + goto err_dis_clk; 286 261 } 287 262 288 263 /* ··· 306 297 307 298 err = usb_add_hcd(hcd, irq, IRQF_SHARED); 308 299 if (err) 309 - goto err_add_hcd; 300 + goto err_dis_clk; 310 301 311 302 device_wakeup_enable(hcd->self.controller); 312 303 return 0; 313 304 314 - err_add_hcd: 315 - if (!IS_ERR(priv->phy)) 316 - phy_power_off(priv->phy); 317 - err_phy_power_on: 318 - if (!IS_ERR(priv->phy)) 319 - phy_exit(priv->phy); 320 - err_phy_init: 321 - err_phy_get: 305 + err_dis_clk: 322 306 if (!IS_ERR(priv->clk)) 323 307 clk_disable_unprepare(priv->clk); 324 308 usb_put_hcd(hcd); ··· 328 326 struct orion_ehci_hcd *priv = hcd_to_orion_priv(hcd); 329 327 330 328 usb_remove_hcd(hcd); 331 - 332 - if (!IS_ERR(priv->phy)) { 333 - phy_power_off(priv->phy); 334 - phy_exit(priv->phy); 335 - } 336 329 337 330 if (!IS_ERR(priv->clk)) 338 331 clk_disable_unprepare(priv->clk); ··· 351 354 .driver = { 352 355 .name = "orion-ehci", 353 356 .of_match_table = ehci_orion_dt_ids, 357 + .pm = &ehci_orion_pm_ops, 354 358 }, 355 359 }; 356 360
+6
drivers/usb/host/fsl-mph-dr-of.c
··· 225 225 pdata->has_fsl_erratum_a005697 = 226 226 of_property_read_bool(np, "fsl,usb_erratum-a005697"); 227 227 228 + if (of_get_property(np, "fsl,usb_erratum_14", NULL)) 229 + pdata->has_fsl_erratum_14 = 1; 230 + else 231 + pdata->has_fsl_erratum_14 = 0; 232 + 233 + 228 234 /* 229 235 * Determine whether phy_clk_valid needs to be checked 230 236 * by reading property in device tree
+5 -2
drivers/usb/host/ohci-at91.c
··· 141 141 struct regmap *regmap; 142 142 143 143 regmap = syscon_regmap_lookup_by_compatible("atmel,sama5d2-sfr"); 144 - if (IS_ERR(regmap)) 145 - regmap = NULL; 144 + if (IS_ERR(regmap)) { 145 + regmap = syscon_regmap_lookup_by_compatible("microchip,sam9x60-sfr"); 146 + if (IS_ERR(regmap)) 147 + regmap = NULL; 148 + } 146 149 147 150 return regmap; 148 151 }
+2 -8
drivers/usb/host/oxu210hp-hcd.c
··· 1323 1323 } 1324 1324 1325 1325 /* by default, enable interrupt on urb completion */ 1326 - qtd->hw_token |= cpu_to_le32(QTD_IOC); 1326 + qtd->hw_token |= cpu_to_le32(QTD_IOC); 1327 1327 return head; 1328 1328 1329 1329 cleanup: ··· 2253 2253 for (;;) { 2254 2254 union ehci_shadow q, *q_p; 2255 2255 __le32 type, *hw_p; 2256 - unsigned uframes; 2257 2256 2258 2257 /* don't scan past the live uframe */ 2259 2258 frame = now_uframe >> 3; 2260 - if (frame == (clock >> 3)) 2261 - uframes = now_uframe & 0x07; 2262 - else { 2259 + if (frame != (clock >> 3)) { 2263 2260 /* safe to scan the whole frame at once */ 2264 2261 now_uframe |= 0x07; 2265 - uframes = 8; 2266 2262 } 2267 2263 2268 2264 restart: ··· 2828 2832 { 2829 2833 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 2830 2834 int num, rem; 2831 - int transfer_buffer_length; 2832 2835 void *transfer_buffer; 2833 2836 struct urb *murb; 2834 2837 int i, ret; ··· 2838 2843 2839 2844 /* Otherwise we should verify the USB transfer buffer size! */ 2840 2845 transfer_buffer = urb->transfer_buffer; 2841 - transfer_buffer_length = urb->transfer_buffer_length; 2842 2846 2843 2847 num = urb->transfer_buffer_length / 4096; 2844 2848 rem = urb->transfer_buffer_length % 4096;
+4 -2
drivers/usb/host/u132-hcd.c
··· 2477 2477 spin_unlock_irqrestore(&endp->queue_lock.slock, 2478 2478 irqs); 2479 2479 kfree(urbq); 2480 - } urb->error_count = 0; 2480 + } 2481 + urb->error_count = 0; 2481 2482 usb_hcd_giveback_urb(hcd, urb, status); 2482 2483 return 0; 2483 2484 } else if (list_empty(&endp->urb_more)) { ··· 2983 2982 while (rings-- > 0) { 2984 2983 struct u132_ring *ring = &u132->ring[rings]; 2985 2984 u132_ring_cancel_work(u132, ring); 2986 - } while (endps-- > 0) { 2985 + } 2986 + while (endps-- > 0) { 2987 2987 struct u132_endp *endp = u132->endp[endps]; 2988 2988 if (endp) 2989 2989 u132_endp_cancel_work(u132, endp);
+2
drivers/usb/host/whci/Kbuild drivers/usb/host/whci/Makefile
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + 1 3 obj-$(CONFIG_USB_WHCI_HCD) += whci-hcd.o 2 4 3 5 whci-hcd-y := \
+3 -3
drivers/usb/host/xhci-dbgcap.c
··· 181 181 xhci_dbc_flush_single_request(req); 182 182 } 183 183 184 - static void xhci_dbc_flush_reqests(struct xhci_dbc *dbc) 184 + static void xhci_dbc_flush_requests(struct xhci_dbc *dbc) 185 185 { 186 186 xhci_dbc_flush_endpoint_requests(&dbc->eps[BULK_OUT]); 187 187 xhci_dbc_flush_endpoint_requests(&dbc->eps[BULK_IN]); ··· 687 687 !(portsc & DBC_PORTSC_CONN_STATUS)) { 688 688 xhci_info(xhci, "DbC cable unplugged\n"); 689 689 dbc->state = DS_ENABLED; 690 - xhci_dbc_flush_reqests(dbc); 690 + xhci_dbc_flush_requests(dbc); 691 691 692 692 return EVT_DISC; 693 693 } ··· 697 697 xhci_info(xhci, "DbC port reset\n"); 698 698 writel(portsc, &dbc->regs->portsc); 699 699 dbc->state = DS_ENABLED; 700 - xhci_dbc_flush_reqests(dbc); 700 + xhci_dbc_flush_requests(dbc); 701 701 702 702 return EVT_DISC; 703 703 }
-1
drivers/usb/host/xhci-debugfs.h
··· 80 80 char name[DEBUGFS_NAMELEN]; 81 81 struct debugfs_regset32 regset; 82 82 size_t nregs; 83 - struct dentry *parent; 84 83 struct list_head list; 85 84 }; 86 85
+1 -1
drivers/usb/host/xhci-mem.c
··· 933 933 * that tt_info, then free the child first. Recursive. 934 934 * We can't rely on udev at this point to find child-parent relationships. 935 935 */ 936 - void xhci_free_virt_devices_depth_first(struct xhci_hcd *xhci, int slot_id) 936 + static void xhci_free_virt_devices_depth_first(struct xhci_hcd *xhci, int slot_id) 937 937 { 938 938 struct xhci_virt_device *vdev; 939 939 struct list_head *tt_list_head;
+11
drivers/usb/host/xhci-mvebu.c
··· 13 13 #include <linux/usb/hcd.h> 14 14 15 15 #include "xhci-mvebu.h" 16 + #include "xhci.h" 16 17 17 18 #define USB3_MAX_WINDOWS 4 18 19 #define USB3_WIN_CTRL(w) (0x0 + ((w) * 8)) ··· 70 69 * windows, and is therefore no longer useful. 71 70 */ 72 71 iounmap(base); 72 + 73 + return 0; 74 + } 75 + 76 + int xhci_mvebu_a3700_init_quirk(struct usb_hcd *hcd) 77 + { 78 + struct xhci_hcd *xhci = hcd_to_xhci(hcd); 79 + 80 + /* Without reset on resume, the HC won't work at all */ 81 + xhci->quirks |= XHCI_RESET_ON_RESUME; 73 82 74 83 return 0; 75 84 }
+6
drivers/usb/host/xhci-mvebu.h
··· 12 12 13 13 #if IS_ENABLED(CONFIG_USB_XHCI_MVEBU) 14 14 int xhci_mvebu_mbus_init_quirk(struct usb_hcd *hcd); 15 + int xhci_mvebu_a3700_init_quirk(struct usb_hcd *hcd); 15 16 #else 16 17 static inline int xhci_mvebu_mbus_init_quirk(struct usb_hcd *hcd) 18 + { 19 + return 0; 20 + } 21 + 22 + static inline int xhci_mvebu_a3700_init_quirk(struct usb_hcd *hcd) 17 23 { 18 24 return 0; 19 25 }
+1
drivers/usb/host/xhci-pci.c
··· 194 194 xhci->quirks |= XHCI_SSIC_PORT_UNUSED; 195 195 if (pdev->vendor == PCI_VENDOR_ID_INTEL && 196 196 (pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI || 197 + pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI || 197 198 pdev->device == PCI_DEVICE_ID_INTEL_APL_XHCI)) 198 199 xhci->quirks |= XHCI_INTEL_USB_ROLE_SW; 199 200 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
+7
drivers/usb/host/xhci-plat.c
··· 98 98 .init_quirk = xhci_mvebu_mbus_init_quirk, 99 99 }; 100 100 101 + static const struct xhci_plat_priv xhci_plat_marvell_armada3700 = { 102 + .init_quirk = xhci_mvebu_a3700_init_quirk, 103 + }; 104 + 101 105 static const struct xhci_plat_priv xhci_plat_renesas_rcar_gen2 = { 102 106 .firmware_name = XHCI_RCAR_FIRMWARE_NAME_V1, 103 107 .init_quirk = xhci_rcar_init_quirk, ··· 127 123 }, { 128 124 .compatible = "marvell,armada-380-xhci", 129 125 .data = &xhci_plat_marvell_armada, 126 + }, { 127 + .compatible = "marvell,armada3700-xhci", 128 + .data = &xhci_plat_marvell_armada3700, 130 129 }, { 131 130 .compatible = "renesas,xhci-r8a7790", 132 131 .data = &xhci_plat_renesas_rcar_gen2,
+2 -2
drivers/usb/host/xhci-tegra.c
··· 941 941 device_link_del(tegra->genpd_dl_ss); 942 942 if (tegra->genpd_dl_host) 943 943 device_link_del(tegra->genpd_dl_host); 944 - if (tegra->genpd_dev_ss) 944 + if (!IS_ERR_OR_NULL(tegra->genpd_dev_ss)) 945 945 dev_pm_domain_detach(tegra->genpd_dev_ss, true); 946 - if (tegra->genpd_dev_host) 946 + if (!IS_ERR_OR_NULL(tegra->genpd_dev_host)) 947 947 dev_pm_domain_detach(tegra->genpd_dev_host, true); 948 948 } 949 949
+1 -2
drivers/usb/host/xhci.c
··· 1455 1455 else 1456 1456 num_tds = 1; 1457 1457 1458 - urb_priv = kzalloc(sizeof(struct urb_priv) + 1459 - num_tds * sizeof(struct xhci_td), mem_flags); 1458 + urb_priv = kzalloc(struct_size(urb_priv, td, num_tds), mem_flags); 1460 1459 if (!urb_priv) 1461 1460 return -ENOMEM; 1462 1461
+1
drivers/usb/image/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 # 2 3 # USB Imaging devices configuration 3 4 #
+2
drivers/usb/isp1760/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + 1 3 config USB_ISP1760 2 4 tristate "NXP ISP 1760/1761 support" 3 5 depends on USB || USB_GADGET
+1
drivers/usb/misc/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 # 2 3 # USB Miscellaneous driver configuration 3 4 #
-26
drivers/usb/misc/ftdi-elan.c
··· 915 915 int bytes_read = 0; 916 916 int retry_on_empty = 1; 917 917 int retry_on_timeout = 3; 918 - int empty_packets = 0; 919 918 read:{ 920 919 int packet_bytes = 0; 921 920 int retval = usb_bulk_msg(ftdi->udev, ··· 959 960 dev_err(&ftdi->udev->dev, "error = %d with packet_bytes = %d with total %d bytes%s\n", 960 961 retval, packet_bytes, bytes_read, diag); 961 962 return retval; 962 - } else if (packet_bytes == 2) { 963 - unsigned char s0 = ftdi->bulk_in_buffer[0]; 964 - unsigned char s1 = ftdi->bulk_in_buffer[1]; 965 - empty_packets += 1; 966 - if (s0 == 0x31 && s1 == 0x60) { 967 - if (retry_on_empty-- > 0) { 968 - goto more; 969 - } else 970 - return 0; 971 - } else if (s0 == 0x31 && s1 == 0x00) { 972 - if (retry_on_empty-- > 0) { 973 - goto more; 974 - } else 975 - return 0; 976 - } else { 977 - if (retry_on_empty-- > 0) { 978 - goto more; 979 - } else 980 - return 0; 981 - } 982 - } else if (packet_bytes == 1) { 983 - if (retry_on_empty-- > 0) { 984 - goto more; 985 - } else 986 - return 0; 987 963 } else { 988 964 if (retry_on_empty-- > 0) { 989 965 goto more;
+1
drivers/usb/misc/sisusbvga/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 2 3 config USB_SISUSBVGA 3 4 tristate "USB 2.0 SVGA dongle support (Net2280/SiS315)"
+2 -1
drivers/usb/misc/sisusbvga/Makefile
··· 5 5 6 6 obj-$(CONFIG_USB_SISUSBVGA) += sisusbvga.o 7 7 8 - sisusbvga-y := sisusb.o sisusb_init.o sisusb_con.o 8 + sisusbvga-y := sisusb.o 9 + sisusbvga-$(CONFIG_USB_SISUSBVGA_CON) += sisusb_con.o sisusb_init.o
+16 -16
drivers/usb/misc/sisusbvga/sisusb.c
··· 53 53 #include "sisusb.h" 54 54 #include "sisusb_init.h" 55 55 56 - #ifdef INCL_SISUSB_CON 56 + #ifdef CONFIG_USB_SISUSBVGA_CON 57 57 #include <linux/font.h> 58 58 #endif 59 59 ··· 61 61 62 62 /* Forward declarations / clean-up routines */ 63 63 64 - #ifdef INCL_SISUSB_CON 64 + #ifdef CONFIG_USB_SISUSBVGA_CON 65 65 static int sisusb_first_vc; 66 66 static int sisusb_last_vc; 67 67 module_param_named(first, sisusb_first_vc, int, 0); ··· 1198 1198 1199 1199 /* High level: Gfx (indexed) register access */ 1200 1200 1201 - #ifdef INCL_SISUSB_CON 1201 + #ifdef CONFIG_USB_SISUSBVGA_CON 1202 1202 int sisusb_setreg(struct sisusb_usb_data *sisusb, int port, u8 data) 1203 1203 { 1204 1204 return sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, port, data); ··· 1272 1272 1273 1273 /* Write/read video ram */ 1274 1274 1275 - #ifdef INCL_SISUSB_CON 1275 + #ifdef CONFIG_USB_SISUSBVGA_CON 1276 1276 int sisusb_writeb(struct sisusb_usb_data *sisusb, u32 adr, u8 data) 1277 1277 { 1278 1278 return sisusb_write_memio_byte(sisusb, SISUSB_TYPE_MEM, adr, data); ··· 2255 2255 } 2256 2256 2257 2257 2258 - #ifdef INCL_SISUSB_CON 2258 + #ifdef CONFIG_USB_SISUSBVGA_CON 2259 2259 2260 2260 /* Set up default text mode: 2261 2261 * - Set text mode (0x03) ··· 2448 2448 sisusb->sisusb_dev = NULL; 2449 2449 sisusb_free_buffers(sisusb); 2450 2450 sisusb_free_urbs(sisusb); 2451 - #ifdef INCL_SISUSB_CON 2451 + #ifdef CONFIG_USB_SISUSBVGA_CON 2452 2452 kfree(sisusb->SiS_Pr); 2453 2453 #endif 2454 2454 kfree(sisusb); ··· 2844 2844 2845 2845 case SUCMD_HANDLETEXTMODE: 2846 2846 retval = 0; 2847 - #ifdef INCL_SISUSB_CON 2847 + #ifdef CONFIG_USB_SISUSBVGA_CON 2848 2848 /* Gfx core must be initialized, SiS_Pr must exist */ 2849 2849 if (!sisusb->gfxinit || !sisusb->SiS_Pr) 2850 2850 return -ENODEV; ··· 2860 2860 #endif 2861 2861 break; 2862 2862 2863 - #ifdef INCL_SISUSB_CON 2863 + #ifdef CONFIG_USB_SISUSBVGA_CON 2864 2864 case SUCMD_SETMODE: 2865 2865 /* Gfx core must be initialized, SiS_Pr must exist */ 2866 2866 if (!sisusb->gfxinit || !sisusb->SiS_Pr) ··· 2944 2944 x.sisusb_vramsize = sisusb->vramsize; 2945 2945 x.sisusb_minor = sisusb->minor; 2946 2946 x.sisusb_fbdevactive = 0; 2947 - #ifdef INCL_SISUSB_CON 2947 + #ifdef CONFIG_USB_SISUSBVGA_CON 2948 2948 x.sisusb_conactive = sisusb->haveconsole ? 1 : 0; 2949 2949 #else 2950 2950 x.sisusb_conactive = 0; ··· 2975 2975 return retval; 2976 2976 } 2977 2977 2978 - #ifdef SISUSB_NEW_CONFIG_COMPAT 2978 + #ifdef CONFIG_COMPAT 2979 2979 static long sisusb_compat_ioctl(struct file *f, unsigned int cmd, 2980 2980 unsigned long arg) 2981 2981 { ··· 2998 2998 .read = sisusb_read, 2999 2999 .write = sisusb_write, 3000 3000 .llseek = sisusb_lseek, 3001 - #ifdef SISUSB_NEW_CONFIG_COMPAT 3001 + #ifdef CONFIG_COMPAT 3002 3002 .compat_ioctl = sisusb_compat_ioctl, 3003 3003 #endif 3004 3004 .unlocked_ioctl = sisusb_ioctl ··· 3091 3091 dev_info(&sisusb->sisusb_dev->dev, "Allocated %d output buffers\n", 3092 3092 sisusb->numobufs); 3093 3093 3094 - #ifdef INCL_SISUSB_CON 3094 + #ifdef CONFIG_USB_SISUSBVGA_CON 3095 3095 /* Allocate our SiS_Pr */ 3096 3096 sisusb->SiS_Pr = kmalloc(sizeof(struct SiS_Private), GFP_KERNEL); 3097 3097 if (!sisusb->SiS_Pr) { ··· 3112 3112 3113 3113 if (dev->speed == USB_SPEED_HIGH || dev->speed >= USB_SPEED_SUPER) { 3114 3114 int initscreen = 1; 3115 - #ifdef INCL_SISUSB_CON 3115 + #ifdef CONFIG_USB_SISUSBVGA_CON 3116 3116 if (sisusb_first_vc > 0 && sisusb_last_vc > 0 && 3117 3117 sisusb_first_vc <= sisusb_last_vc && 3118 3118 sisusb_last_vc <= MAX_NR_CONSOLES) ··· 3134 3134 dev_dbg(&sisusb->sisusb_dev->dev, "*** RWTEST END ***\n"); 3135 3135 #endif 3136 3136 3137 - #ifdef INCL_SISUSB_CON 3137 + #ifdef CONFIG_USB_SISUSBVGA_CON 3138 3138 sisusb_console_init(sisusb, sisusb_first_vc, sisusb_last_vc); 3139 3139 #endif 3140 3140 ··· 3160 3160 if (!sisusb) 3161 3161 return; 3162 3162 3163 - #ifdef INCL_SISUSB_CON 3163 + #ifdef CONFIG_USB_SISUSBVGA_CON 3164 3164 sisusb_console_exit(sisusb); 3165 3165 #endif 3166 3166 ··· 3210 3210 static int __init usb_sisusb_init(void) 3211 3211 { 3212 3212 3213 - #ifdef INCL_SISUSB_CON 3213 + #ifdef CONFIG_USB_SISUSBVGA_CON 3214 3214 sisusb_init_concode(); 3215 3215 #endif 3216 3216
+1 -14
drivers/usb/misc/sisusbvga/sisusb.h
··· 38 38 #ifndef _SISUSB_H_ 39 39 #define _SISUSB_H_ 40 40 41 - #ifdef CONFIG_COMPAT 42 - #define SISUSB_NEW_CONFIG_COMPAT 43 - #endif 44 - 45 41 #include <linux/mutex.h> 46 - 47 - /* For older kernels, support for text consoles is by default 48 - * off. To enable text console support, change the following: 49 - */ 50 - /* #define CONFIG_USB_SISUSBVGA_CON */ 51 42 52 43 /* Version Information */ 53 44 ··· 47 56 #define SISUSB_PATCHLEVEL 8 48 57 49 58 /* Include console and mode switching code? */ 50 - 51 - #ifdef CONFIG_USB_SISUSBVGA_CON 52 - #define INCL_SISUSB_CON 1 53 - #endif 54 59 55 60 #include <linux/console.h> 56 61 #include <linux/vt_kern.h> ··· 126 139 unsigned char gfxinit; /* graphics core initialized? */ 127 140 unsigned short chipid, chipvendor; 128 141 unsigned short chiprevision; 129 - #ifdef INCL_SISUSB_CON 142 + #ifdef CONFIG_USB_SISUSBVGA_CON 130 143 struct SiS_Private *SiS_Pr; 131 144 unsigned long scrbuf; 132 145 unsigned int scrbuf_size;
+51 -76
drivers/usb/misc/sisusbvga/sisusb_con.c
··· 70 70 #include "sisusb.h" 71 71 #include "sisusb_init.h" 72 72 73 - #ifdef INCL_SISUSB_CON 74 - 75 - #define sisusbcon_writew(val, addr) (*(addr) = (val)) 76 - #define sisusbcon_readw(addr) (*(addr)) 77 - #define sisusbcon_memmovew(d, s, c) memmove(d, s, c) 78 - #define sisusbcon_memcpyw(d, s, c) memcpy(d, s, c) 79 - 80 73 /* vc_data -> sisusb conversion table */ 81 74 static struct sisusb_usb_data *mysisusbs[MAX_NR_CONSOLES]; 82 75 ··· 79 86 static inline void 80 87 sisusbcon_memsetw(u16 *s, u16 c, unsigned int count) 81 88 { 82 - count /= 2; 83 - while (count--) 84 - sisusbcon_writew(c, s++); 89 + memset16(s, c, count / 2); 85 90 } 86 91 87 92 static inline void ··· 337 346 */ 338 347 339 348 while (count--) { 340 - u16 a = sisusbcon_readw(p); 349 + u16 a = *p; 341 350 342 - a = ((a) & 0x88ff) | 343 - (((a) & 0x7000) >> 4) | 344 - (((a) & 0x0700) << 4); 345 - 346 - sisusbcon_writew(a, p++); 351 + *p++ = ((a) & 0x88ff) | 352 + (((a) & 0x7000) >> 4) | 353 + (((a) & 0x0700) << 4); 347 354 } 348 355 } 349 356 350 - #define SISUSB_VADDR(x,y) \ 351 - ((u16 *)c->vc_origin + \ 352 - (y) * sisusb->sisusb_num_columns + \ 353 - (x)) 357 + static inline void *sisusb_vaddr(const struct sisusb_usb_data *sisusb, 358 + const struct vc_data *c, unsigned int x, unsigned int y) 359 + { 360 + return (u16 *)c->vc_origin + y * sisusb->sisusb_num_columns + x; 361 + } 354 362 355 - #define SISUSB_HADDR(x,y) \ 356 - ((u16 *)(sisusb->vrambase + (c->vc_origin - sisusb->scrbuf)) + \ 357 - (y) * sisusb->sisusb_num_columns + \ 358 - (x)) 363 + static inline unsigned long sisusb_haddr(const struct sisusb_usb_data *sisusb, 364 + const struct vc_data *c, unsigned int x, unsigned int y) 365 + { 366 + unsigned long offset = c->vc_origin - sisusb->scrbuf; 367 + 368 + /* 2 bytes per each character */ 369 + offset += 2 * (y * sisusb->sisusb_num_columns + x); 370 + 371 + return sisusb->vrambase + offset; 372 + } 359 373 360 374 /* Interface routine */ 361 375 static void ··· 378 382 return; 379 383 } 380 384 381 - 382 - sisusb_copy_memory(sisusb, (char *)SISUSB_VADDR(x, y), 383 - (long)SISUSB_HADDR(x, y), 2); 385 + sisusb_copy_memory(sisusb, sisusb_vaddr(sisusb, c, x, y), 386 + sisusb_haddr(sisusb, c, x, y), 2); 384 387 385 388 mutex_unlock(&sisusb->lock); 386 389 } ··· 390 395 int count, int y, int x) 391 396 { 392 397 struct sisusb_usb_data *sisusb; 393 - u16 *dest; 394 - int i; 395 398 396 399 sisusb = sisusb_get_sisusb_lock_and_check(c->vc_num); 397 400 if (!sisusb) ··· 401 408 * because the vt does this AFTER calling us. 402 409 */ 403 410 404 - dest = SISUSB_VADDR(x, y); 405 - 406 - for (i = count; i > 0; i--) 407 - sisusbcon_writew(sisusbcon_readw(s++), dest++); 411 + memcpy(sisusb_vaddr(sisusb, c, x, y), s, count * 2); 408 412 409 413 if (sisusb_is_inactive(c, sisusb)) { 410 414 mutex_unlock(&sisusb->lock); 411 415 return; 412 416 } 413 417 414 - sisusb_copy_memory(sisusb, (char *)SISUSB_VADDR(x, y), 415 - (long)SISUSB_HADDR(x, y), count * 2); 418 + sisusb_copy_memory(sisusb, sisusb_vaddr(sisusb, c, x, y), 419 + sisusb_haddr(sisusb, c, x, y), count * 2); 416 420 417 421 mutex_unlock(&sisusb->lock); 418 422 } ··· 436 446 * this AFTER calling us. 437 447 */ 438 448 439 - dest = SISUSB_VADDR(x, y); 449 + dest = sisusb_vaddr(sisusb, c, x, y); 440 450 441 451 cols = sisusb->sisusb_num_columns; 442 452 ··· 462 472 length = ((height * cols) - x - (cols - width - x)) * 2; 463 473 464 474 465 - sisusb_copy_memory(sisusb, (unsigned char *)SISUSB_VADDR(x, y), 466 - (long)SISUSB_HADDR(x, y), length); 475 + sisusb_copy_memory(sisusb, sisusb_vaddr(sisusb, c, x, y), 476 + sisusb_haddr(sisusb, c, x, y), length); 467 477 468 478 mutex_unlock(&sisusb->lock); 469 479 } ··· 507 517 (int)(sisusb->scrbuf + sisusb->scrbuf_size - c->vc_origin)); 508 518 509 519 /* Restore the screen contents */ 510 - sisusbcon_memcpyw((u16 *)c->vc_origin, (u16 *)c->vc_screenbuf, 511 - length); 520 + memcpy((u16 *)c->vc_origin, (u16 *)c->vc_screenbuf, length); 512 521 513 - sisusb_copy_memory(sisusb, (unsigned char *)c->vc_origin, 514 - (long)SISUSB_HADDR(0, 0), 515 - length); 522 + sisusb_copy_memory(sisusb, (char *)c->vc_origin, 523 + sisusb_haddr(sisusb, c, 0, 0), length); 516 524 517 525 mutex_unlock(&sisusb->lock); 518 526 ··· 544 556 (int)(sisusb->scrbuf + sisusb->scrbuf_size - c->vc_origin)); 545 557 546 558 /* Save the screen contents to vc's private buffer */ 547 - sisusbcon_memcpyw((u16 *)c->vc_screenbuf, (u16 *)c->vc_origin, 548 - length); 559 + memcpy((u16 *)c->vc_screenbuf, (u16 *)c->vc_origin, length); 549 560 550 561 mutex_unlock(&sisusb->lock); 551 562 } ··· 615 628 sisusbcon_memsetw((u16 *)c->vc_origin, 616 629 c->vc_video_erase_char, 617 630 c->vc_screenbuf_size); 618 - sisusb_copy_memory(sisusb, 619 - (unsigned char *)c->vc_origin, 620 - (u32)(sisusb->vrambase + 621 - (c->vc_origin - sisusb->scrbuf)), 631 + sisusb_copy_memory(sisusb, (char *)c->vc_origin, 632 + sisusb_haddr(sisusb, c, 0, 0), 622 633 c->vc_screenbuf_size); 623 634 sisusb->con_blanked = 1; 624 635 ret = 1; ··· 781 796 switch (dir) { 782 797 783 798 case SM_UP: 784 - sisusbcon_memmovew(SISUSB_VADDR(0, t), 785 - SISUSB_VADDR(0, t + lines), 799 + memmove(sisusb_vaddr(sisusb, c, 0, t), 800 + sisusb_vaddr(sisusb, c, 0, t + lines), 786 801 (b - t - lines) * cols * 2); 787 - sisusbcon_memsetw(SISUSB_VADDR(0, b - lines), eattr, 788 - lines * cols * 2); 802 + sisusbcon_memsetw(sisusb_vaddr(sisusb, c, 0, b - lines), 803 + eattr, lines * cols * 2); 789 804 break; 790 805 791 806 case SM_DOWN: 792 - sisusbcon_memmovew(SISUSB_VADDR(0, t + lines), 793 - SISUSB_VADDR(0, t), 807 + memmove(sisusb_vaddr(sisusb, c, 0, t + lines), 808 + sisusb_vaddr(sisusb, c, 0, t), 794 809 (b - t - lines) * cols * 2); 795 - sisusbcon_memsetw(SISUSB_VADDR(0, t), eattr, 810 + sisusbcon_memsetw(sisusb_vaddr(sisusb, c, 0, t), eattr, 796 811 lines * cols * 2); 797 812 break; 798 813 } 799 814 800 - sisusb_copy_memory(sisusb, (char *)SISUSB_VADDR(0, t), 801 - (long)SISUSB_HADDR(0, t), length); 815 + sisusb_copy_memory(sisusb, sisusb_vaddr(sisusb, c, 0, t), 816 + sisusb_haddr(sisusb, c, 0, t), length); 802 817 803 818 mutex_unlock(&sisusb->lock); 804 819 ··· 815 830 int copyall = 0; 816 831 unsigned long oldorigin; 817 832 unsigned int delta = lines * c->vc_size_row; 818 - u32 originoffset; 819 833 820 834 /* Returning != 0 means we have done the scrolling successfully. 821 835 * Returning 0 makes vt do the scrolling on its own. ··· 858 874 859 875 if (c->vc_scr_end + delta >= 860 876 sisusb->scrbuf + sisusb->scrbuf_size) { 861 - sisusbcon_memcpyw((u16 *)sisusb->scrbuf, 877 + memcpy((u16 *)sisusb->scrbuf, 862 878 (u16 *)(oldorigin + delta), 863 879 c->vc_screenbuf_size - delta); 864 880 c->vc_origin = sisusb->scrbuf; ··· 876 892 case SM_DOWN: 877 893 878 894 if (oldorigin - delta < sisusb->scrbuf) { 879 - sisusbcon_memmovew((u16 *)(sisusb->scrbuf + 880 - sisusb->scrbuf_size - 881 - c->vc_screenbuf_size + 882 - delta), 883 - (u16 *)oldorigin, 884 - c->vc_screenbuf_size - delta); 895 + memmove((void *)sisusb->scrbuf + sisusb->scrbuf_size - 896 + c->vc_screenbuf_size + delta, 897 + (u16 *)oldorigin, 898 + c->vc_screenbuf_size - delta); 885 899 c->vc_origin = sisusb->scrbuf + 886 900 sisusb->scrbuf_size - 887 901 c->vc_screenbuf_size; ··· 895 913 break; 896 914 } 897 915 898 - originoffset = (u32)(c->vc_origin - sisusb->scrbuf); 899 - 900 916 if (copyall) 901 917 sisusb_copy_memory(sisusb, 902 918 (char *)c->vc_origin, 903 - (u32)(sisusb->vrambase + originoffset), 919 + sisusb_haddr(sisusb, c, 0, 0), 904 920 c->vc_screenbuf_size); 905 921 else if (dir == SM_UP) 906 922 sisusb_copy_memory(sisusb, 907 923 (char *)c->vc_origin + c->vc_screenbuf_size - delta, 908 - (u32)sisusb->vrambase + originoffset + 924 + sisusb_haddr(sisusb, c, 0, 0) + 909 925 c->vc_screenbuf_size - delta, 910 926 delta); 911 927 else 912 928 sisusb_copy_memory(sisusb, 913 929 (char *)c->vc_origin, 914 - (u32)(sisusb->vrambase + originoffset), 930 + sisusb_haddr(sisusb, c, 0, 0), 915 931 delta); 916 932 917 933 c->vc_scr_end = c->vc_origin + c->vc_screenbuf_size; ··· 1514 1534 for (i = 0; i < MAX_NR_CONSOLES; i++) 1515 1535 mysisusbs[i] = NULL; 1516 1536 } 1517 - 1518 - #endif /* INCL_CON */ 1519 - 1520 - 1521 -
-5
drivers/usb/misc/sisusbvga/sisusb_init.c
··· 44 44 #include <linux/spinlock.h> 45 45 46 46 #include "sisusb.h" 47 - 48 - #ifdef INCL_SISUSB_CON 49 - 50 47 #include "sisusb_init.h" 51 48 52 49 /*********************************************/ ··· 952 955 953 956 return SiSUSBSetMode(SiS_Pr, ModeNo); 954 957 } 955 - 956 - #endif /* INCL_SISUSB_CON */
+13 -2
drivers/usb/misc/usb251xb.c
··· 337 337 struct device *dev = hub->dev; 338 338 struct device_node *np = dev->of_node; 339 339 int len, err, i; 340 - u32 property_u32 = 0; 340 + u32 port, property_u32 = 0; 341 341 const u32 *cproperty_u32; 342 342 const char *cproperty_char; 343 343 char str[USB251XB_STRING_BUFSIZE / 2]; 344 + struct property *prop; 345 + const __be32 *p; 344 346 345 347 if (!np) { 346 348 dev_err(dev, "failed to get ofdata\n"); ··· 541 539 (wchar_t *)hub->serial, 542 540 USB251XB_STRING_BUFSIZE); 543 541 542 + /* 543 + * The datasheet documents the register as 'Port Swap' but in real the 544 + * register controls the USB DP/DM signal swapping for each port. 545 + */ 546 + hub->port_swap = USB251XB_DEF_PORT_SWAP; 547 + of_property_for_each_u32(np, "swap-dx-lanes", prop, p, port) { 548 + if ((port >= 0) && (port <= data->port_cnt)) 549 + hub->port_swap |= BIT(port); 550 + } 551 + 544 552 /* The following parameters are currently not exposed to devicetree, but 545 553 * may be as soon as needed. 546 554 */ ··· 558 546 hub->boost_up = USB251XB_DEF_BOOST_UP; 559 547 hub->boost_57 = USB251XB_DEF_BOOST_57; 560 548 hub->boost_14 = USB251XB_DEF_BOOST_14; 561 - hub->port_swap = USB251XB_DEF_PORT_SWAP; 562 549 hub->port_map12 = USB251XB_DEF_PORT_MAP_12; 563 550 hub->port_map34 = USB251XB_DEF_PORT_MAP_34; 564 551 hub->port_map56 = USB251XB_DEF_PORT_MAP_56;
+30 -8
drivers/usb/misc/usb3503.c
··· 355 355 } 356 356 357 357 #ifdef CONFIG_PM_SLEEP 358 - static int usb3503_i2c_suspend(struct device *dev) 358 + static int usb3503_suspend(struct usb3503 *hub) 359 359 { 360 - struct i2c_client *client = to_i2c_client(dev); 361 - struct usb3503 *hub = i2c_get_clientdata(client); 362 - 363 360 usb3503_switch_mode(hub, USB3503_MODE_STANDBY); 364 361 365 362 if (hub->clk) ··· 365 368 return 0; 366 369 } 367 370 368 - static int usb3503_i2c_resume(struct device *dev) 371 + static int usb3503_resume(struct usb3503 *hub) 369 372 { 370 - struct i2c_client *client = to_i2c_client(dev); 371 - struct usb3503 *hub = i2c_get_clientdata(client); 372 - 373 373 if (hub->clk) 374 374 clk_prepare_enable(hub->clk); 375 375 ··· 374 380 375 381 return 0; 376 382 } 383 + 384 + static int usb3503_i2c_suspend(struct device *dev) 385 + { 386 + struct i2c_client *client = to_i2c_client(dev); 387 + 388 + return usb3503_suspend(i2c_get_clientdata(client)); 389 + } 390 + 391 + static int usb3503_i2c_resume(struct device *dev) 392 + { 393 + struct i2c_client *client = to_i2c_client(dev); 394 + 395 + return usb3503_resume(i2c_get_clientdata(client)); 396 + } 397 + 398 + static int usb3503_platform_suspend(struct device *dev) 399 + { 400 + return usb3503_suspend(dev_get_drvdata(dev)); 401 + } 402 + 403 + static int usb3503_platform_resume(struct device *dev) 404 + { 405 + return usb3503_resume(dev_get_drvdata(dev)); 406 + } 377 407 #endif 378 408 379 409 static SIMPLE_DEV_PM_OPS(usb3503_i2c_pm_ops, usb3503_i2c_suspend, 380 410 usb3503_i2c_resume); 411 + 412 + static SIMPLE_DEV_PM_OPS(usb3503_platform_pm_ops, usb3503_platform_suspend, 413 + usb3503_platform_resume); 381 414 382 415 static const struct i2c_device_id usb3503_id[] = { 383 416 { USB3503_I2C_NAME, 0 }, ··· 436 415 .driver = { 437 416 .name = USB3503_I2C_NAME, 438 417 .of_match_table = of_match_ptr(usb3503_of_match), 418 + .pm = &usb3503_platform_pm_ops, 439 419 }, 440 420 .probe = usb3503_platform_probe, 441 421 .remove = usb3503_platform_remove,
+24 -4
drivers/usb/misc/usbtest.c
··· 347 347 return le16_to_cpup(&ep->desc.wMaxPacketSize); 348 348 } 349 349 350 + static int ss_isoc_get_packet_num(struct usb_device *udev, int pipe) 351 + { 352 + struct usb_host_endpoint *ep = usb_pipe_endpoint(udev, pipe); 353 + 354 + return USB_SS_MULT(ep->ss_ep_comp.bmAttributes) 355 + * (1 + ep->ss_ep_comp.bMaxBurst); 356 + } 357 + 350 358 static void simple_fill_buf(struct urb *urb) 351 359 { 352 360 unsigned i; ··· 1984 1976 1985 1977 if (bytes < 0 || !desc) 1986 1978 return NULL; 1979 + 1987 1980 maxp = usb_endpoint_maxp(desc); 1988 - maxp *= usb_endpoint_maxp_mult(desc); 1981 + if (udev->speed >= USB_SPEED_SUPER) 1982 + maxp *= ss_isoc_get_packet_num(udev, pipe); 1983 + else 1984 + maxp *= usb_endpoint_maxp_mult(desc); 1985 + 1989 1986 packets = DIV_ROUND_UP(bytes, maxp); 1990 1987 1991 1988 urb = usb_alloc_urb(packets, GFP_KERNEL); ··· 2078 2065 packets *= param->iterations; 2079 2066 2080 2067 if (context.is_iso) { 2068 + int transaction_num; 2069 + 2070 + if (udev->speed >= USB_SPEED_SUPER) 2071 + transaction_num = ss_isoc_get_packet_num(udev, pipe); 2072 + else 2073 + transaction_num = usb_endpoint_maxp_mult(desc); 2074 + 2081 2075 dev_info(&dev->intf->dev, 2082 2076 "iso period %d %sframes, wMaxPacket %d, transactions: %d\n", 2083 2077 1 << (desc->bInterval - 1), 2084 - (udev->speed == USB_SPEED_HIGH) ? "micro" : "", 2078 + (udev->speed >= USB_SPEED_HIGH) ? "micro" : "", 2085 2079 usb_endpoint_maxp(desc), 2086 - usb_endpoint_maxp_mult(desc)); 2080 + transaction_num); 2087 2081 2088 2082 dev_info(&dev->intf->dev, 2089 2083 "total %lu msec (%lu packets)\n", 2090 2084 (packets * (1 << (desc->bInterval - 1))) 2091 - / ((udev->speed == USB_SPEED_HIGH) ? 8 : 1), 2085 + / ((udev->speed >= USB_SPEED_HIGH) ? 8 : 1), 2092 2086 packets); 2093 2087 } 2094 2088
+1
drivers/usb/mon/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 # 2 3 # USB Monitor configuration 3 4 #
+2
drivers/usb/mtu3/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + # 1 3 # For MTK USB3.0 IP 2 4 3 5 config USB_MTU3
+3 -2
drivers/usb/musb/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 # 2 3 # USB Dual Role (OTG-ready) Controller Drivers 3 4 # for silicon based on Mentor Graphics INVENTRA designs ··· 112 111 config USB_MUSB_JZ4740 113 112 tristate "JZ4740" 114 113 depends on NOP_USB_XCEIV 115 - depends on MACH_JZ4740 || COMPILE_TEST 114 + depends on MIPS || COMPILE_TEST 116 115 depends on USB_MUSB_GADGET 117 - depends on USB_OTG_BLACKLIST_HUB 116 + depends on USB=n || USB_OTG_BLACKLIST_HUB 118 117 119 118 config USB_MUSB_AM335X_CHILD 120 119 tristate
+10
drivers/usb/musb/jz4740.c
··· 10 10 #include <linux/errno.h> 11 11 #include <linux/kernel.h> 12 12 #include <linux/module.h> 13 + #include <linux/of_device.h> 13 14 #include <linux/platform_device.h> 14 15 #include <linux/usb/usb_phy_generic.h> 15 16 ··· 189 188 return 0; 190 189 } 191 190 191 + #ifdef CONFIG_OF 192 + static const struct of_device_id jz4740_musb_of_match[] = { 193 + { .compatible = "ingenic,jz4740-musb" }, 194 + {}, 195 + }; 196 + MODULE_DEVICE_TABLE(of, jz4740_musb_of_match); 197 + #endif 198 + 192 199 static struct platform_driver jz4740_driver = { 193 200 .probe = jz4740_probe, 194 201 .remove = jz4740_remove, 195 202 .driver = { 196 203 .name = "musb-jz4740", 204 + .of_match_table = of_match_ptr(jz4740_musb_of_match), 197 205 }, 198 206 }; 199 207
+2 -2
drivers/usb/musb/musb_host.c
··· 378 378 qh = first_qh(head); 379 379 break; 380 380 } 381 - /* else: fall through */ 381 + /* fall through */ 382 382 383 383 case USB_ENDPOINT_XFER_ISOC: 384 384 case USB_ENDPOINT_XFER_INT: ··· 1283 1283 MUSB_TXCSR_H_WZC_BITS 1284 1284 | MUSB_TXCSR_TXPKTRDY); 1285 1285 } 1286 - return; 1286 + return; 1287 1287 } 1288 1288 1289 1289 done:
+1
drivers/usb/phy/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 # 2 3 # Physical Layer USB driver configuration 3 4 #
+1 -1
drivers/usb/phy/phy-twl6030-usb.c
··· 400 400 { 401 401 struct twl6030_usb *twl = platform_get_drvdata(pdev); 402 402 403 - cancel_delayed_work(&twl->get_status_work); 403 + cancel_delayed_work_sync(&twl->get_status_work); 404 404 twl6030_interrupt_mask(TWL6030_USBOTG_INT_MASK, 405 405 REG_INT_MSK_LINE_C); 406 406 twl6030_interrupt_mask(TWL6030_USBOTG_INT_MASK,
+1 -1
drivers/usb/renesas_usbhs/mod_host.c
··· 340 340 pipe = usbhsh_uep_to_pipe(uep); 341 341 342 342 if (unlikely(!pipe)) { 343 - dev_err(dev, "uep doens't have pipe\n"); 343 + dev_err(dev, "uep doesn't have pipe\n"); 344 344 } else if (1 == uep->counter--) { /* last user */ 345 345 struct usb_host_endpoint *ep = usbhsh_uep_to_ep(uep); 346 346 struct usbhsh_device *udev = usbhsh_uep_to_udev(uep);
+1 -1
drivers/usb/renesas_usbhs/rcar3.c
··· 59 59 if (enable) { 60 60 usbhs_bset(priv, LPSTS, LPSTS_SUSPM, LPSTS_SUSPM); 61 61 /* The controller on R-Car Gen3 needs to wait up to 45 usec */ 62 - udelay(45); 62 + usleep_range(45, 90); 63 63 } else { 64 64 usbhs_bset(priv, LPSTS, LPSTS_SUSPM, 0); 65 65 }
+1 -1
drivers/usb/renesas_usbhs/rza.c
··· 35 35 36 36 /* Enable USB PLL (NOTE: ch0 controls both ch0 and ch1) */ 37 37 usbhs_bset(priv, SYSCFG, UPLLE, UPLLE); 38 - udelay(1000); 38 + usleep_range(1000, 2000); 39 39 usbhs_bset(priv, SUSPMODE, SUSPM, SUSPM); 40 40 41 41 return 0;
+2
drivers/usb/roles/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + 1 3 config USB_ROLE_SWITCH 2 4 tristate "USB Role Switch Support" 3 5 help
+2
drivers/usb/roles/Makefile
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + 1 3 obj-$(CONFIG_USB_ROLE_SWITCH) += roles.o 2 4 roles-y := class.o 3 5 obj-$(CONFIG_USB_ROLES_INTEL_XHCI) += intel-xhci-usb-role-switch.o
+18 -3
drivers/usb/roles/class.c
··· 8 8 */ 9 9 10 10 #include <linux/usb/role.h> 11 + #include <linux/property.h> 11 12 #include <linux/device.h> 12 13 #include <linux/module.h> 13 14 #include <linux/mutex.h> ··· 85 84 } 86 85 EXPORT_SYMBOL_GPL(usb_role_switch_get_role); 87 86 88 - static int __switch_match(struct device *dev, const void *name) 87 + static int switch_fwnode_match(struct device *dev, const void *fwnode) 88 + { 89 + return dev_fwnode(dev) == fwnode; 90 + } 91 + 92 + static int switch_name_match(struct device *dev, const void *name) 89 93 { 90 94 return !strcmp((const char *)name, dev_name(dev)); 91 95 } ··· 100 94 { 101 95 struct device *dev; 102 96 103 - dev = class_find_device(role_class, NULL, con->endpoint[ep], 104 - __switch_match); 97 + if (con->fwnode) { 98 + if (!fwnode_property_present(con->fwnode, con->id)) 99 + return NULL; 100 + 101 + dev = class_find_device(role_class, NULL, con->fwnode, 102 + switch_fwnode_match); 103 + } else { 104 + dev = class_find_device(role_class, NULL, con->endpoint[ep], 105 + switch_name_match); 106 + } 105 107 106 108 return dev ? to_role_switch(dev) : ERR_PTR(-EPROBE_DEFER); 107 109 } ··· 280 266 sw->get = desc->get; 281 267 282 268 sw->dev.parent = parent; 269 + sw->dev.fwnode = desc->fwnode; 283 270 sw->dev.class = role_class; 284 271 sw->dev.type = &usb_role_dev_type; 285 272 dev_set_name(&sw->dev, "%s-role-switch", dev_name(parent));
+1
drivers/usb/serial/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 # 2 3 # USB Serial device configuration 3 4 #
+111 -19
drivers/usb/serial/cp210x.c
··· 61 61 { USB_DEVICE(0x08e6, 0x5501) }, /* Gemalto Prox-PU/CU contactless smartcard reader */ 62 62 { USB_DEVICE(0x08FD, 0x000A) }, /* Digianswer A/S , ZigBee/802.15.4 MAC Device */ 63 63 { USB_DEVICE(0x0908, 0x01FF) }, /* Siemens RUGGEDCOM USB Serial Console */ 64 + { USB_DEVICE(0x0B00, 0x3070) }, /* Ingenico 3070 */ 64 65 { USB_DEVICE(0x0BED, 0x1100) }, /* MEI (TM) Cashflow-SC Bill/Voucher Acceptor */ 65 66 { USB_DEVICE(0x0BED, 0x1101) }, /* MEI series 2000 Combo Acceptor */ 66 67 { USB_DEVICE(0x0FCF, 0x1003) }, /* Dynastream ANT development board */ ··· 246 245 u8 gpio_input; 247 246 #endif 248 247 u8 partnum; 248 + speed_t min_speed; 249 249 speed_t max_speed; 250 250 bool use_actual_rate; 251 251 }; ··· 445 443 #define CP210X_PIN_MODE_GPIO BIT(0) 446 444 447 445 /* 448 - * CP210X_VENDOR_SPECIFIC, CP210X_GET_PORTCONFIG call reads these 0xf bytes. 449 - * Structure needs padding due to unused/unspecified bytes. 446 + * CP210X_VENDOR_SPECIFIC, CP210X_GET_PORTCONFIG call reads these 0xf bytes 447 + * on a CP2105 chip. Structure needs padding due to unused/unspecified bytes. 450 448 */ 451 - struct cp210x_config { 449 + struct cp210x_dual_port_config { 452 450 __le16 gpio_mode; 453 451 u8 __pad0[2]; 454 452 __le16 reset_state; ··· 459 457 u8 device_cfg; 460 458 } __packed; 461 459 460 + /* 461 + * CP210X_VENDOR_SPECIFIC, CP210X_GET_PORTCONFIG call reads these 0xd bytes 462 + * on a CP2104 chip. Structure needs padding due to unused/unspecified bytes. 463 + */ 464 + struct cp210x_single_port_config { 465 + __le16 gpio_mode; 466 + u8 __pad0[2]; 467 + __le16 reset_state; 468 + u8 __pad1[4]; 469 + __le16 suspend_state; 470 + u8 device_cfg; 471 + } __packed; 472 + 462 473 /* GPIO modes */ 463 474 #define CP210X_SCI_GPIO_MODE_OFFSET 9 464 475 #define CP210X_SCI_GPIO_MODE_MASK GENMASK(11, 9) ··· 479 464 #define CP210X_ECI_GPIO_MODE_OFFSET 2 480 465 #define CP210X_ECI_GPIO_MODE_MASK GENMASK(3, 2) 481 466 467 + #define CP210X_GPIO_MODE_OFFSET 8 468 + #define CP210X_GPIO_MODE_MASK GENMASK(11, 8) 469 + 482 470 /* CP2105 port configuration values */ 483 471 #define CP2105_GPIO0_TXLED_MODE BIT(0) 484 472 #define CP2105_GPIO1_RXLED_MODE BIT(1) 485 473 #define CP2105_GPIO1_RS485_MODE BIT(2) 474 + 475 + /* CP2104 port configuration values */ 476 + #define CP2104_GPIO0_TXLED_MODE BIT(0) 477 + #define CP2104_GPIO1_RXLED_MODE BIT(1) 478 + #define CP2104_GPIO2_RS485_MODE BIT(2) 486 479 487 480 /* CP2102N configuration array indices */ 488 481 #define CP210X_2NCONFIG_CONFIG_VERSION_IDX 2 ··· 1074 1051 return cp210x_an205_table1[i].rate; 1075 1052 } 1076 1053 1077 - static speed_t cp210x_get_actual_rate(struct usb_serial *serial, speed_t baud) 1054 + static speed_t cp210x_get_actual_rate(speed_t baud) 1078 1055 { 1079 - struct cp210x_serial_private *priv = usb_get_serial_data(serial); 1080 1056 unsigned int prescale = 1; 1081 1057 unsigned int div; 1082 - 1083 - baud = clamp(baud, 300u, priv->max_speed); 1084 1058 1085 1059 if (baud <= 365) 1086 1060 prescale = 4; ··· 1121 1101 struct cp210x_serial_private *priv = usb_get_serial_data(serial); 1122 1102 u32 baud; 1123 1103 1124 - baud = tty->termios.c_ospeed; 1125 - 1126 1104 /* 1127 1105 * This maps the requested rate to the actual rate, a valid rate on 1128 1106 * cp2102 or cp2103, or to an arbitrary rate in [1M, max_speed]. 1129 1107 * 1130 1108 * NOTE: B0 is not implemented. 1131 1109 */ 1110 + baud = clamp(tty->termios.c_ospeed, priv->min_speed, priv->max_speed); 1111 + 1132 1112 if (priv->use_actual_rate) 1133 - baud = cp210x_get_actual_rate(serial, baud); 1113 + baud = cp210x_get_actual_rate(baud); 1134 1114 else if (baud < 1000000) 1135 1115 baud = cp210x_get_an205_rate(baud); 1136 - else if (baud > priv->max_speed) 1137 - baud = priv->max_speed; 1138 1116 1139 1117 dev_dbg(&port->dev, "%s - setting baud rate to %u\n", __func__, baud); 1140 1118 if (cp210x_write_u32_reg(port, CP210X_SET_BAUDRATE, baud)) { ··· 1371 1353 if (priv->partnum == CP210X_PARTNUM_CP2105) 1372 1354 req_type = REQTYPE_INTERFACE_TO_HOST; 1373 1355 1356 + result = usb_autopm_get_interface(serial->interface); 1357 + if (result) 1358 + return result; 1359 + 1374 1360 result = cp210x_read_vendor_block(serial, req_type, 1375 1361 CP210X_READ_LATCH, &buf, sizeof(buf)); 1362 + usb_autopm_put_interface(serial->interface); 1376 1363 if (result < 0) 1377 1364 return result; 1378 1365 ··· 1398 1375 1399 1376 buf.mask = BIT(gpio); 1400 1377 1378 + result = usb_autopm_get_interface(serial->interface); 1379 + if (result) 1380 + goto out; 1381 + 1401 1382 if (priv->partnum == CP210X_PARTNUM_CP2105) { 1402 1383 result = cp210x_write_vendor_block(serial, 1403 1384 REQTYPE_HOST_TO_INTERFACE, ··· 1419 1392 NULL, 0, USB_CTRL_SET_TIMEOUT); 1420 1393 } 1421 1394 1395 + usb_autopm_put_interface(serial->interface); 1396 + out: 1422 1397 if (result < 0) { 1423 1398 dev_err(&serial->interface->dev, "failed to set GPIO value: %d\n", 1424 1399 result); ··· 1499 1470 { 1500 1471 struct cp210x_serial_private *priv = usb_get_serial_data(serial); 1501 1472 struct cp210x_pin_mode mode; 1502 - struct cp210x_config config; 1473 + struct cp210x_dual_port_config config; 1503 1474 u8 intf_num = cp210x_interface_num(serial); 1504 1475 u8 iface_config; 1505 1476 int result; ··· 1558 1529 return 0; 1559 1530 } 1560 1531 1532 + static int cp2104_gpioconf_init(struct usb_serial *serial) 1533 + { 1534 + struct cp210x_serial_private *priv = usb_get_serial_data(serial); 1535 + struct cp210x_single_port_config config; 1536 + u8 iface_config; 1537 + u8 gpio_latch; 1538 + int result; 1539 + u8 i; 1540 + 1541 + result = cp210x_read_vendor_block(serial, REQTYPE_DEVICE_TO_HOST, 1542 + CP210X_GET_PORTCONFIG, &config, 1543 + sizeof(config)); 1544 + if (result < 0) 1545 + return result; 1546 + 1547 + priv->gc.ngpio = 4; 1548 + 1549 + iface_config = config.device_cfg; 1550 + priv->gpio_pushpull = (u8)((le16_to_cpu(config.gpio_mode) & 1551 + CP210X_GPIO_MODE_MASK) >> 1552 + CP210X_GPIO_MODE_OFFSET); 1553 + gpio_latch = (u8)((le16_to_cpu(config.reset_state) & 1554 + CP210X_GPIO_MODE_MASK) >> 1555 + CP210X_GPIO_MODE_OFFSET); 1556 + 1557 + /* mark all pins which are not in GPIO mode */ 1558 + if (iface_config & CP2104_GPIO0_TXLED_MODE) /* GPIO 0 */ 1559 + priv->gpio_altfunc |= BIT(0); 1560 + if (iface_config & CP2104_GPIO1_RXLED_MODE) /* GPIO 1 */ 1561 + priv->gpio_altfunc |= BIT(1); 1562 + if (iface_config & CP2104_GPIO2_RS485_MODE) /* GPIO 2 */ 1563 + priv->gpio_altfunc |= BIT(2); 1564 + 1565 + /* 1566 + * Like CP2102N, CP2104 has also no strict input and output pin 1567 + * modes. 1568 + * Do the same input mode emulation as CP2102N. 1569 + */ 1570 + for (i = 0; i < priv->gc.ngpio; ++i) { 1571 + /* 1572 + * Set direction to "input" iff pin is open-drain and reset 1573 + * value is 1. 1574 + */ 1575 + if (!(priv->gpio_pushpull & BIT(i)) && (gpio_latch & BIT(i))) 1576 + priv->gpio_input |= BIT(i); 1577 + } 1578 + 1579 + return 0; 1580 + } 1581 + 1561 1582 static int cp2102n_gpioconf_init(struct usb_serial *serial) 1562 1583 { 1563 1584 struct cp210x_serial_private *priv = usb_get_serial_data(serial); ··· 1653 1574 if (config_version != 0x01) 1654 1575 return -ENOTSUPP; 1655 1576 1656 - /* 1657 - * We only support 4 GPIOs even on the QFN28 package, because 1658 - * config locations of GPIOs 4-6 determined using reverse 1659 - * engineering revealed conflicting offsets with other 1660 - * documented functions. So we'll just play it safe for now. 1661 - */ 1662 1577 priv->gc.ngpio = 4; 1663 1578 1664 1579 /* ··· 1666 1593 1667 1594 /* 0 indicates GPIO mode, 1 is alternate function */ 1668 1595 priv->gpio_altfunc = (gpio_ctrl >> 2) & 0x0f; 1596 + 1597 + if (priv->partnum == CP210X_PARTNUM_CP2102N_QFN28) { 1598 + /* 1599 + * For the QFN28 package, GPIO4-6 are controlled by 1600 + * the low three bits of the mode/latch fields. 1601 + * Contrary to the document linked above, the bits for 1602 + * the SUSPEND pins are elsewhere. No alternate 1603 + * function is available for these pins. 1604 + */ 1605 + priv->gc.ngpio = 7; 1606 + gpio_latch |= (gpio_rst_latch & 7) << 4; 1607 + priv->gpio_pushpull |= (gpio_pushpull & 7) << 4; 1608 + } 1669 1609 1670 1610 /* 1671 1611 * The CP2102N does not strictly has input and output pin modes, ··· 1706 1620 int result; 1707 1621 1708 1622 switch (priv->partnum) { 1623 + case CP210X_PARTNUM_CP2104: 1624 + result = cp2104_gpioconf_init(serial); 1625 + break; 1709 1626 case CP210X_PARTNUM_CP2105: 1710 1627 result = cp2105_gpioconf_init(serial); 1711 1628 break; ··· 1805 1716 { 1806 1717 struct cp210x_serial_private *priv = usb_get_serial_data(serial); 1807 1718 bool use_actual_rate = false; 1719 + speed_t min = 300; 1808 1720 speed_t max; 1809 1721 1810 1722 switch (priv->partnum) { ··· 1828 1738 use_actual_rate = true; 1829 1739 max = 2000000; /* ECI */ 1830 1740 } else { 1741 + min = 2400; 1831 1742 max = 921600; /* SCI */ 1832 1743 } 1833 1744 break; ··· 1843 1752 break; 1844 1753 } 1845 1754 1755 + priv->min_speed = min; 1846 1756 priv->max_speed = max; 1847 1757 priv->use_actual_rate = use_actual_rate; 1848 1758 }
+2
drivers/usb/serial/ftdi_sio.c
··· 1025 1025 { USB_DEVICE(CYPRESS_VID, CYPRESS_WICED_BT_USB_PID) }, 1026 1026 { USB_DEVICE(CYPRESS_VID, CYPRESS_WICED_WL_USB_PID) }, 1027 1027 { USB_DEVICE(AIRBUS_DS_VID, AIRBUS_DS_P8GR) }, 1028 + /* EZPrototypes devices */ 1029 + { USB_DEVICE(EZPROTOTYPES_VID, HJELMSLUND_USB485_ISO_PID) }, 1028 1030 { } /* Terminating entry */ 1029 1031 }; 1030 1032
+6
drivers/usb/serial/ftdi_sio_ids.h
··· 1309 1309 #define IONICS_PLUGCOMPUTER_PID 0x0102 1310 1310 1311 1311 /* 1312 + * EZPrototypes (PID reseller) 1313 + */ 1314 + #define EZPROTOTYPES_VID 0x1c40 1315 + #define HJELMSLUND_USB485_ISO_PID 0x0477 1316 + 1317 + /* 1312 1318 * Dresden Elektronik Sensor Terminal Board 1313 1319 */ 1314 1320 #define DE_VID 0x1cf1 /* Vendor ID */
+2
drivers/usb/serial/option.c
··· 1148 1148 .driver_info = NCTRL(0) | RSVD(1) | RSVD(3) }, 1149 1149 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_ME910_DUAL_MODEM), 1150 1150 .driver_info = NCTRL(0) | RSVD(3) }, 1151 + { USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1102, 0xff), /* Telit ME910 (ECM) */ 1152 + .driver_info = NCTRL(0) }, 1151 1153 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE910), 1152 1154 .driver_info = NCTRL(0) | RSVD(1) | RSVD(2) }, 1153 1155 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE910_USBCFG4),
+1
drivers/usb/storage/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 # 2 3 # USB Storage driver configuration 3 4 #
+2
drivers/usb/storage/karma.c
··· 167 167 static void rio_karma_destructor(void *extra) 168 168 { 169 169 struct karma_data *data = (struct karma_data *) extra; 170 + 170 171 kfree(data->recv); 171 172 } 172 173 ··· 175 174 { 176 175 int ret = 0; 177 176 struct karma_data *data = kzalloc(sizeof(struct karma_data), GFP_NOIO); 177 + 178 178 if (!data) 179 179 goto out; 180 180
+1
drivers/usb/typec/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 2 3 menuconfig TYPEC 3 4 tristate "USB Type-C Support"
+1
drivers/usb/typec/altmodes/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 2 3 menu "USB Type-C Alternate Mode drivers" 3 4
+2
drivers/usb/typec/altmodes/Makefile
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + 1 3 obj-$(CONFIG_TYPEC_DP_ALTMODE) += typec_displayport.o 2 4 typec_displayport-y := displayport.o
-4
drivers/usb/typec/altmodes/displayport.c
··· 24 24 DP_CONF_DUAL_D, 25 25 }; 26 26 27 - /* Helper for setting/getting the pin assignement value to the configuration */ 28 - #define DP_CONF_SET_PIN_ASSIGN(_a_) ((_a_) << 8) 29 - #define DP_CONF_GET_PIN_ASSIGN(_conf_) (((_conf_) & GENMASK(15, 8)) >> 8) 30 - 31 27 /* Pin assignments that use USB3.1 Gen2 signaling to carry DP protocol */ 32 28 #define DP_PIN_ASSIGN_GEN2_BR_MASK (BIT(DP_PIN_ASSIGN_A) | \ 33 29 BIT(DP_PIN_ASSIGN_B))
+24 -9
drivers/usb/typec/class.c
··· 9 9 #include <linux/device.h> 10 10 #include <linux/module.h> 11 11 #include <linux/mutex.h> 12 + #include <linux/property.h> 12 13 #include <linux/slab.h> 13 14 14 15 #include "bus.h" ··· 205 204 put_device(&adev->dev); 206 205 } 207 206 208 - static int __typec_port_match(struct device *dev, const void *name) 207 + static int typec_port_fwnode_match(struct device *dev, const void *fwnode) 208 + { 209 + return dev_fwnode(dev) == fwnode; 210 + } 211 + 212 + static int typec_port_name_match(struct device *dev, const void *name) 209 213 { 210 214 return !strcmp((const char *)name, dev_name(dev)); 211 215 } 212 216 213 217 static void *typec_port_match(struct device_connection *con, int ep, void *data) 214 218 { 215 - return class_find_device(typec_class, NULL, con->endpoint[ep], 216 - __typec_port_match); 219 + struct device *dev; 220 + 221 + /* 222 + * FIXME: Check does the fwnode supports the requested SVID. If it does 223 + * we need to return ERR_PTR(-PROBE_DEFER) when there is no device. 224 + */ 225 + if (con->fwnode) 226 + return class_find_device(typec_class, NULL, con->fwnode, 227 + typec_port_fwnode_match); 228 + 229 + dev = class_find_device(typec_class, NULL, con->endpoint[ep], 230 + typec_port_name_match); 231 + 232 + return dev ? dev : ERR_PTR(-EPROBE_DEFER); 217 233 } 218 234 219 235 struct typec_altmode * ··· 295 277 if (adev->active == active) 296 278 return; 297 279 298 - if (!is_typec_port(adev->dev.parent)) { 280 + if (!is_typec_port(adev->dev.parent) && adev->dev.driver) { 299 281 if (!active) 300 282 module_put(adev->dev.driver->owner); 301 283 else ··· 1514 1496 { 1515 1497 struct typec_altmode *adev; 1516 1498 struct typec_mux *mux; 1517 - char id[10]; 1518 1499 1519 - sprintf(id, "id%04xm%02x", desc->svid, desc->mode); 1520 - 1521 - mux = typec_mux_get(&port->dev, id); 1500 + mux = typec_mux_get(&port->dev, desc); 1522 1501 if (IS_ERR(mux)) 1523 1502 return ERR_CAST(mux); 1524 1503 ··· 1608 1593 return ERR_CAST(port->sw); 1609 1594 } 1610 1595 1611 - port->mux = typec_mux_get(&port->dev, "typec-mux"); 1596 + port->mux = typec_mux_get(&port->dev, NULL); 1612 1597 if (IS_ERR(port->mux)) { 1613 1598 put_device(&port->dev); 1614 1599 return ERR_CAST(port->mux);
+79 -15
drivers/usb/typec/mux.c
··· 11 11 #include <linux/list.h> 12 12 #include <linux/module.h> 13 13 #include <linux/mutex.h> 14 + #include <linux/property.h> 15 + #include <linux/slab.h> 14 16 #include <linux/usb/typec_mux.h> 15 17 16 18 static DEFINE_MUTEX(switch_lock); ··· 25 23 { 26 24 struct typec_switch *sw; 27 25 28 - list_for_each_entry(sw, &switch_list, entry) 29 - if (!strcmp(con->endpoint[ep], dev_name(sw->dev))) 30 - return sw; 26 + if (!con->fwnode) { 27 + list_for_each_entry(sw, &switch_list, entry) 28 + if (!strcmp(con->endpoint[ep], dev_name(sw->dev))) 29 + return sw; 30 + return ERR_PTR(-EPROBE_DEFER); 31 + } 31 32 32 33 /* 33 - * We only get called if a connection was found, tell the caller to 34 - * wait for the switch to show up. 34 + * With OF graph the mux node must have a boolean device property named 35 + * "orientation-switch". 35 36 */ 36 - return ERR_PTR(-EPROBE_DEFER); 37 + if (con->id && !fwnode_property_present(con->fwnode, con->id)) 38 + return NULL; 39 + 40 + list_for_each_entry(sw, &switch_list, entry) 41 + if (dev_fwnode(sw->dev) == con->fwnode) 42 + return sw; 43 + 44 + return con->id ? ERR_PTR(-EPROBE_DEFER) : NULL; 37 45 } 38 46 39 47 /** ··· 60 48 struct typec_switch *sw; 61 49 62 50 mutex_lock(&switch_lock); 63 - sw = device_connection_find_match(dev, "typec-switch", NULL, 51 + sw = device_connection_find_match(dev, "orientation-switch", NULL, 64 52 typec_switch_match); 65 53 if (!IS_ERR_OR_NULL(sw)) { 66 54 WARN_ON(!try_module_get(sw->dev->driver->owner)); ··· 124 112 125 113 static void *typec_mux_match(struct device_connection *con, int ep, void *data) 126 114 { 115 + const struct typec_altmode_desc *desc = data; 127 116 struct typec_mux *mux; 117 + int nval; 118 + bool match; 119 + u16 *val; 120 + int i; 128 121 129 - list_for_each_entry(mux, &mux_list, entry) 130 - if (!strcmp(con->endpoint[ep], dev_name(mux->dev))) 131 - return mux; 122 + if (!con->fwnode) { 123 + list_for_each_entry(mux, &mux_list, entry) 124 + if (!strcmp(con->endpoint[ep], dev_name(mux->dev))) 125 + return mux; 126 + return ERR_PTR(-EPROBE_DEFER); 127 + } 132 128 133 129 /* 134 - * We only get called if a connection was found, tell the caller to 135 - * wait for the switch to show up. 130 + * Check has the identifier already been "consumed". If it 131 + * has, no need to do any extra connection identification. 136 132 */ 133 + match = !con->id; 134 + if (match) 135 + goto find_mux; 136 + 137 + /* Accessory Mode muxes */ 138 + if (!desc) { 139 + match = fwnode_property_present(con->fwnode, "accessory"); 140 + if (match) 141 + goto find_mux; 142 + return NULL; 143 + } 144 + 145 + /* Alternate Mode muxes */ 146 + nval = fwnode_property_read_u16_array(con->fwnode, "svid", NULL, 0); 147 + if (nval <= 0) 148 + return NULL; 149 + 150 + val = kcalloc(nval, sizeof(*val), GFP_KERNEL); 151 + if (!val) 152 + return ERR_PTR(-ENOMEM); 153 + 154 + nval = fwnode_property_read_u16_array(con->fwnode, "svid", val, nval); 155 + if (nval < 0) { 156 + kfree(val); 157 + return ERR_PTR(nval); 158 + } 159 + 160 + for (i = 0; i < nval; i++) { 161 + match = val[i] == desc->svid; 162 + if (match) { 163 + kfree(val); 164 + goto find_mux; 165 + } 166 + } 167 + kfree(val); 168 + return NULL; 169 + 170 + find_mux: 171 + list_for_each_entry(mux, &mux_list, entry) 172 + if (dev_fwnode(mux->dev) == con->fwnode) 173 + return mux; 174 + 137 175 return ERR_PTR(-EPROBE_DEFER); 138 176 } 139 177 140 178 /** 141 179 * typec_mux_get - Find USB Type-C Multiplexer 142 180 * @dev: The caller device 143 - * @name: Mux identifier 181 + * @desc: Alt Mode description 144 182 * 145 183 * Finds a mux linked to the caller. This function is primarily meant for the 146 184 * Type-C drivers. Returns a reference to the mux on success, NULL if no 147 185 * matching connection was found, or ERR_PTR(-EPROBE_DEFER) when a connection 148 186 * was found but the mux has not been enumerated yet. 149 187 */ 150 - struct typec_mux *typec_mux_get(struct device *dev, const char *name) 188 + struct typec_mux *typec_mux_get(struct device *dev, 189 + const struct typec_altmode_desc *desc) 151 190 { 152 191 struct typec_mux *mux; 153 192 154 193 mutex_lock(&mux_lock); 155 - mux = device_connection_find_match(dev, name, NULL, typec_mux_match); 194 + mux = device_connection_find_match(dev, "mode-switch", (void *)desc, 195 + typec_mux_match); 156 196 if (!IS_ERR_OR_NULL(mux)) { 157 197 WARN_ON(!try_module_get(mux->dev->driver->owner)); 158 198 get_device(mux->dev);
+2
drivers/usb/typec/mux/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + 1 3 menu "USB Type-C Multiplexer/DeMultiplexer Switch support" 2 4 3 5 config TYPEC_MUX_PI3USB30532
+2
drivers/usb/typec/tcpm/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + 1 3 config TYPEC_TCPM 2 4 tristate "USB Type-C Port Controller Manager" 3 5 depends on USB
+5 -63
drivers/usb/typec/tcpm/tcpm.c
··· 4435 4435 return 0; 4436 4436 } 4437 4437 4438 - int tcpm_update_source_capabilities(struct tcpm_port *port, const u32 *pdo, 4439 - unsigned int nr_pdo) 4440 - { 4441 - if (tcpm_validate_caps(port, pdo, nr_pdo)) 4442 - return -EINVAL; 4443 - 4444 - mutex_lock(&port->lock); 4445 - port->nr_src_pdo = tcpm_copy_pdos(port->src_pdo, pdo, nr_pdo); 4446 - switch (port->state) { 4447 - case SRC_UNATTACHED: 4448 - case SRC_ATTACH_WAIT: 4449 - case SRC_TRYWAIT: 4450 - tcpm_set_cc(port, tcpm_rp_cc(port)); 4451 - break; 4452 - case SRC_SEND_CAPABILITIES: 4453 - case SRC_NEGOTIATE_CAPABILITIES: 4454 - case SRC_READY: 4455 - case SRC_WAIT_NEW_CAPABILITIES: 4456 - tcpm_set_cc(port, tcpm_rp_cc(port)); 4457 - tcpm_set_state(port, SRC_SEND_CAPABILITIES, 0); 4458 - break; 4459 - default: 4460 - break; 4461 - } 4462 - mutex_unlock(&port->lock); 4463 - return 0; 4464 - } 4465 - EXPORT_SYMBOL_GPL(tcpm_update_source_capabilities); 4466 - 4467 - int tcpm_update_sink_capabilities(struct tcpm_port *port, const u32 *pdo, 4468 - unsigned int nr_pdo, 4469 - unsigned int operating_snk_mw) 4470 - { 4471 - if (tcpm_validate_caps(port, pdo, nr_pdo)) 4472 - return -EINVAL; 4473 - 4474 - mutex_lock(&port->lock); 4475 - port->nr_snk_pdo = tcpm_copy_pdos(port->snk_pdo, pdo, nr_pdo); 4476 - port->operating_snk_mw = operating_snk_mw; 4477 - port->update_sink_caps = true; 4478 - 4479 - switch (port->state) { 4480 - case SNK_NEGOTIATE_CAPABILITIES: 4481 - case SNK_NEGOTIATE_PPS_CAPABILITIES: 4482 - case SNK_READY: 4483 - case SNK_TRANSITION_SINK: 4484 - case SNK_TRANSITION_SINK_VBUS: 4485 - if (port->pps_data.active) 4486 - tcpm_set_state(port, SNK_NEGOTIATE_PPS_CAPABILITIES, 0); 4487 - else 4488 - tcpm_set_state(port, SNK_NEGOTIATE_CAPABILITIES, 0); 4489 - break; 4490 - default: 4491 - break; 4492 - } 4493 - mutex_unlock(&port->lock); 4494 - return 0; 4495 - } 4496 - EXPORT_SYMBOL_GPL(tcpm_update_sink_capabilities); 4497 - 4498 4438 /* Power Supply access to expose source power information */ 4499 4439 enum tcpm_psy_online_states { 4500 4440 TCPM_PSY_OFFLINE = 0, ··· 4751 4811 4752 4812 err = devm_tcpm_psy_register(port); 4753 4813 if (err) 4754 - goto out_destroy_wq; 4814 + goto out_role_sw_put; 4755 4815 4756 4816 port->typec_port = typec_register_port(port->dev, &port->typec_caps); 4757 4817 if (IS_ERR(port->typec_port)) { 4758 4818 err = PTR_ERR(port->typec_port); 4759 - goto out_destroy_wq; 4819 + goto out_role_sw_put; 4760 4820 } 4761 4821 4762 4822 if (tcpc->config && tcpc->config->alt_modes) { ··· 4789 4849 tcpm_log(port, "%s: registered", dev_name(dev)); 4790 4850 return port; 4791 4851 4792 - out_destroy_wq: 4852 + out_role_sw_put: 4793 4853 usb_role_switch_put(port->role_sw); 4854 + out_destroy_wq: 4855 + tcpm_debugfs_exit(port); 4794 4856 destroy_workqueue(port->wq); 4795 4857 return ERR_PTR(err); 4796 4858 }
+69 -10
drivers/usb/typec/tps6598x.c
··· 14 14 #include <linux/usb/typec.h> 15 15 16 16 /* Register offsets */ 17 + #define TPS_REG_VID 0x00 18 + #define TPS_REG_MODE 0x03 17 19 #define TPS_REG_CMD1 0x08 18 20 #define TPS_REG_DATA1 0x09 19 21 #define TPS_REG_INT_EVENT1 0x14 ··· 68 66 #define TPS_TASK_TIMEOUT 1 69 67 #define TPS_TASK_REJECTED 3 70 68 69 + enum { 70 + TPS_MODE_APP, 71 + TPS_MODE_BOOT, 72 + TPS_MODE_BIST, 73 + TPS_MODE_DISC, 74 + }; 75 + 76 + static const char *const modes[] = { 77 + [TPS_MODE_APP] = "APP ", 78 + [TPS_MODE_BOOT] = "BOOT", 79 + [TPS_MODE_BIST] = "BIST", 80 + [TPS_MODE_DISC] = "DISC", 81 + }; 82 + 71 83 /* Unrecognized commands will be replaced with "!CMD" */ 72 84 #define INVALID_CMD(_cmd_) (_cmd_ == 0x444d4321) 73 85 ··· 126 110 return 0; 127 111 } 128 112 113 + static int tps6598x_block_write(struct tps6598x *tps, u8 reg, 114 + void *val, size_t len) 115 + { 116 + u8 data[TPS_MAX_LEN + 1]; 117 + 118 + if (!tps->i2c_protocol) 119 + return regmap_raw_write(tps->regmap, reg, val, len); 120 + 121 + data[0] = len; 122 + memcpy(&data[1], val, len); 123 + 124 + return regmap_raw_write(tps->regmap, reg, data, sizeof(data)); 125 + } 126 + 129 127 static inline int tps6598x_read16(struct tps6598x *tps, u8 reg, u16 *val) 130 128 { 131 129 return tps6598x_block_read(tps, reg, val, sizeof(u16)); ··· 157 127 158 128 static inline int tps6598x_write16(struct tps6598x *tps, u8 reg, u16 val) 159 129 { 160 - return regmap_raw_write(tps->regmap, reg, &val, sizeof(u16)); 130 + return tps6598x_block_write(tps, reg, &val, sizeof(u16)); 161 131 } 162 132 163 133 static inline int tps6598x_write32(struct tps6598x *tps, u8 reg, u32 val) 164 134 { 165 - return regmap_raw_write(tps->regmap, reg, &val, sizeof(u32)); 135 + return tps6598x_block_write(tps, reg, &val, sizeof(u32)); 166 136 } 167 137 168 138 static inline int tps6598x_write64(struct tps6598x *tps, u8 reg, u64 val) 169 139 { 170 - return regmap_raw_write(tps->regmap, reg, &val, sizeof(u64)); 140 + return tps6598x_block_write(tps, reg, &val, sizeof(u64)); 171 141 } 172 142 173 143 static inline int 174 144 tps6598x_write_4cc(struct tps6598x *tps, u8 reg, const char *val) 175 145 { 176 - return regmap_raw_write(tps->regmap, reg, &val, sizeof(u32)); 146 + return tps6598x_block_write(tps, reg, &val, sizeof(u32)); 177 147 } 178 148 179 149 static int tps6598x_read_partner_identity(struct tps6598x *tps) ··· 259 229 return -EBUSY; 260 230 261 231 if (in_len) { 262 - ret = regmap_raw_write(tps->regmap, TPS_REG_DATA1, 263 - in_data, in_len); 232 + ret = tps6598x_block_write(tps, TPS_REG_DATA1, 233 + in_data, in_len); 264 234 if (ret) 265 235 return ret; 266 236 } ··· 414 384 return IRQ_HANDLED; 415 385 } 416 386 387 + static int tps6598x_check_mode(struct tps6598x *tps) 388 + { 389 + char mode[5] = { }; 390 + int ret; 391 + 392 + ret = tps6598x_read32(tps, TPS_REG_MODE, (void *)mode); 393 + if (ret) 394 + return ret; 395 + 396 + switch (match_string(modes, ARRAY_SIZE(modes), mode)) { 397 + case TPS_MODE_APP: 398 + return 0; 399 + case TPS_MODE_BOOT: 400 + dev_warn(tps->dev, "dead-battery condition\n"); 401 + return 0; 402 + case TPS_MODE_BIST: 403 + case TPS_MODE_DISC: 404 + default: 405 + dev_err(tps->dev, "controller in unsupported mode \"%s\"\n", 406 + mode); 407 + break; 408 + } 409 + 410 + return -ENODEV; 411 + } 412 + 417 413 static const struct regmap_config tps6598x_regmap_config = { 418 414 .reg_bits = 8, 419 415 .val_bits = 8, ··· 465 409 if (IS_ERR(tps->regmap)) 466 410 return PTR_ERR(tps->regmap); 467 411 468 - ret = tps6598x_read32(tps, 0, &vid); 469 - if (ret < 0) 470 - return ret; 471 - if (!vid) 412 + ret = tps6598x_read32(tps, TPS_REG_VID, &vid); 413 + if (ret < 0 || !vid) 472 414 return -ENODEV; 473 415 474 416 /* ··· 478 424 */ 479 425 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 480 426 tps->i2c_protocol = true; 427 + 428 + /* Make sure the controller has application firmware running */ 429 + ret = tps6598x_check_mode(tps); 430 + if (ret) 431 + return ret; 481 432 482 433 ret = tps6598x_read32(tps, TPS_REG_STATUS, &status); 483 434 if (ret < 0)
+2
drivers/usb/typec/ucsi/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + 1 3 config TYPEC_UCSI 2 4 tristate "USB Type-C Connector System Software Interface driver" 3 5 depends on !CPU_BIG_ENDIAN
-65
drivers/usb/typec/ucsi/debug.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - #ifndef __UCSI_DEBUG_H 3 - #define __UCSI_DEBUG_H 4 - 5 - #include "ucsi.h" 6 - 7 - static const char * const ucsi_cmd_strs[] = { 8 - [0] = "Unknown command", 9 - [UCSI_PPM_RESET] = "PPM_RESET", 10 - [UCSI_CANCEL] = "CANCEL", 11 - [UCSI_CONNECTOR_RESET] = "CONNECTOR_RESET", 12 - [UCSI_ACK_CC_CI] = "ACK_CC_CI", 13 - [UCSI_SET_NOTIFICATION_ENABLE] = "SET_NOTIFICATION_ENABLE", 14 - [UCSI_GET_CAPABILITY] = "GET_CAPABILITY", 15 - [UCSI_GET_CONNECTOR_CAPABILITY] = "GET_CONNECTOR_CAPABILITY", 16 - [UCSI_SET_UOM] = "SET_UOM", 17 - [UCSI_SET_UOR] = "SET_UOR", 18 - [UCSI_SET_PDM] = "SET_PDM", 19 - [UCSI_SET_PDR] = "SET_PDR", 20 - [UCSI_GET_ALTERNATE_MODES] = "GET_ALTERNATE_MODES", 21 - [UCSI_GET_CAM_SUPPORTED] = "GET_CAM_SUPPORTED", 22 - [UCSI_GET_CURRENT_CAM] = "GET_CURRENT_CAM", 23 - [UCSI_SET_NEW_CAM] = "SET_NEW_CAM", 24 - [UCSI_GET_PDOS] = "GET_PDOS", 25 - [UCSI_GET_CABLE_PROPERTY] = "GET_CABLE_PROPERTY", 26 - [UCSI_GET_CONNECTOR_STATUS] = "GET_CONNECTOR_STATUS", 27 - [UCSI_GET_ERROR_STATUS] = "GET_ERROR_STATUS", 28 - }; 29 - 30 - static inline const char *ucsi_cmd_str(u64 raw_cmd) 31 - { 32 - u8 cmd = raw_cmd & GENMASK(7, 0); 33 - 34 - return ucsi_cmd_strs[(cmd >= ARRAY_SIZE(ucsi_cmd_strs)) ? 0 : cmd]; 35 - } 36 - 37 - static const char * const ucsi_ack_strs[] = { 38 - [0] = "", 39 - [UCSI_ACK_EVENT] = "event", 40 - [UCSI_ACK_CMD] = "command", 41 - }; 42 - 43 - static inline const char *ucsi_ack_str(u8 ack) 44 - { 45 - return ucsi_ack_strs[(ack >= ARRAY_SIZE(ucsi_ack_strs)) ? 0 : ack]; 46 - } 47 - 48 - static inline const char *ucsi_cci_str(u32 cci) 49 - { 50 - if (cci & GENMASK(7, 0)) { 51 - if (cci & BIT(29)) 52 - return "Event pending (ACK completed)"; 53 - if (cci & BIT(31)) 54 - return "Event pending (command completed)"; 55 - return "Connector Change"; 56 - } 57 - if (cci & BIT(29)) 58 - return "ACK completed"; 59 - if (cci & BIT(31)) 60 - return "Command completed"; 61 - 62 - return ""; 63 - } 64 - 65 - #endif /* __UCSI_DEBUG_H */
+59
drivers/usb/typec/ucsi/trace.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 2 #define CREATE_TRACE_POINTS 3 + #include "ucsi.h" 3 4 #include "trace.h" 5 + 6 + static const char * const ucsi_cmd_strs[] = { 7 + [0] = "Unknown command", 8 + [UCSI_PPM_RESET] = "PPM_RESET", 9 + [UCSI_CANCEL] = "CANCEL", 10 + [UCSI_CONNECTOR_RESET] = "CONNECTOR_RESET", 11 + [UCSI_ACK_CC_CI] = "ACK_CC_CI", 12 + [UCSI_SET_NOTIFICATION_ENABLE] = "SET_NOTIFICATION_ENABLE", 13 + [UCSI_GET_CAPABILITY] = "GET_CAPABILITY", 14 + [UCSI_GET_CONNECTOR_CAPABILITY] = "GET_CONNECTOR_CAPABILITY", 15 + [UCSI_SET_UOM] = "SET_UOM", 16 + [UCSI_SET_UOR] = "SET_UOR", 17 + [UCSI_SET_PDM] = "SET_PDM", 18 + [UCSI_SET_PDR] = "SET_PDR", 19 + [UCSI_GET_ALTERNATE_MODES] = "GET_ALTERNATE_MODES", 20 + [UCSI_GET_CAM_SUPPORTED] = "GET_CAM_SUPPORTED", 21 + [UCSI_GET_CURRENT_CAM] = "GET_CURRENT_CAM", 22 + [UCSI_SET_NEW_CAM] = "SET_NEW_CAM", 23 + [UCSI_GET_PDOS] = "GET_PDOS", 24 + [UCSI_GET_CABLE_PROPERTY] = "GET_CABLE_PROPERTY", 25 + [UCSI_GET_CONNECTOR_STATUS] = "GET_CONNECTOR_STATUS", 26 + [UCSI_GET_ERROR_STATUS] = "GET_ERROR_STATUS", 27 + }; 28 + 29 + const char *ucsi_cmd_str(u64 raw_cmd) 30 + { 31 + u8 cmd = raw_cmd & GENMASK(7, 0); 32 + 33 + return ucsi_cmd_strs[(cmd >= ARRAY_SIZE(ucsi_cmd_strs)) ? 0 : cmd]; 34 + } 35 + 36 + static const char * const ucsi_ack_strs[] = { 37 + [0] = "", 38 + [UCSI_ACK_EVENT] = "event", 39 + [UCSI_ACK_CMD] = "command", 40 + }; 41 + 42 + const char *ucsi_ack_str(u8 ack) 43 + { 44 + return ucsi_ack_strs[(ack >= ARRAY_SIZE(ucsi_ack_strs)) ? 0 : ack]; 45 + } 46 + 47 + const char *ucsi_cci_str(u32 cci) 48 + { 49 + if (cci & GENMASK(7, 0)) { 50 + if (cci & BIT(29)) 51 + return "Event pending (ACK completed)"; 52 + if (cci & BIT(31)) 53 + return "Event pending (command completed)"; 54 + return "Connector Change"; 55 + } 56 + if (cci & BIT(29)) 57 + return "ACK completed"; 58 + if (cci & BIT(31)) 59 + return "Command completed"; 60 + 61 + return ""; 62 + }
+5 -2
drivers/usb/typec/ucsi/trace.h
··· 7 7 #define __UCSI_TRACE_H 8 8 9 9 #include <linux/tracepoint.h> 10 - #include "ucsi.h" 11 - #include "debug.h" 10 + 11 + const char *ucsi_cmd_str(u64 raw_cmd); 12 + const char *ucsi_ack_str(u8 ack); 13 + const char *ucsi_cci_str(u32 cci); 14 + const char *ucsi_recipient_str(u8 recipient); 12 15 13 16 DECLARE_EVENT_CLASS(ucsi_log_ack, 14 17 TP_PROTO(u8 ack),
+2
drivers/usb/usbip/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + 1 3 config USBIP_CORE 2 4 tristate "USB/IP support" 3 5 depends on NET
+4 -2
drivers/usb/usbip/vhci_hcd.c
··· 702 702 } 703 703 vdev = &vhci_hcd->vdev[portnum-1]; 704 704 705 - /* patch to usb_sg_init() is in 2.5.60 */ 706 - BUG_ON(!urb->transfer_buffer && urb->transfer_buffer_length); 705 + if (!urb->transfer_buffer && urb->transfer_buffer_length) { 706 + dev_dbg(dev, "Null URB transfer buffer\n"); 707 + return -EINVAL; 708 + } 707 709 708 710 spin_lock_irqsave(&vhci->lock, flags); 709 711
+2 -1
drivers/usb/usbip/vudc_dev.c
··· 297 297 { 298 298 struct vrequest *req; 299 299 300 - if (WARN_ON(!_ep || !_req)) 300 + /* ep is always valid here - see usb_ep_free_request() */ 301 + if (!_req) 301 302 return; 302 303 303 304 req = to_vrequest(_req);
+1
drivers/usb/wusbcore/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0 1 2 # 2 3 # Wireless USB Core configuration 3 4 #
+4 -11
drivers/usb/wusbcore/cbaf.c
··· 302 302 { 303 303 struct usb_interface *iface = to_usb_interface(dev); 304 304 struct cbaf *cbaf = usb_get_intfdata(iface); 305 - char pr_chid[WUSB_CKHDID_STRSIZE]; 306 305 307 - ckhdid_printf(pr_chid, sizeof(pr_chid), &cbaf->chid); 308 - return scnprintf(buf, PAGE_SIZE, "%s\n", pr_chid); 306 + return sprintf(buf, "%16ph\n", cbaf->chid.data); 309 307 } 310 308 311 309 static ssize_t cbaf_wusb_chid_store(struct device *dev, ··· 413 415 { 414 416 struct usb_interface *iface = to_usb_interface(dev); 415 417 struct cbaf *cbaf = usb_get_intfdata(iface); 416 - char pr_cdid[WUSB_CKHDID_STRSIZE]; 417 418 418 - ckhdid_printf(pr_cdid, sizeof(pr_cdid), &cbaf->cdid); 419 - return scnprintf(buf, PAGE_SIZE, "%s\n", pr_cdid); 419 + return sprintf(buf, "%16ph\n", cbaf->cdid.data); 420 420 } 421 421 422 422 static ssize_t cbaf_wusb_cdid_store(struct device *dev, ··· 499 503 int result; 500 504 struct device *dev = &cbaf->usb_iface->dev; 501 505 struct wusb_cbaf_cc_data *ccd; 502 - char pr_cdid[WUSB_CKHDID_STRSIZE]; 503 506 504 507 ccd = cbaf->buffer; 505 508 *ccd = cbaf_cc_data_defaults; ··· 508 513 ccd->BandGroups = cpu_to_le16(cbaf->host_band_groups); 509 514 510 515 dev_dbg(dev, "Trying to upload CC:\n"); 511 - ckhdid_printf(pr_cdid, sizeof(pr_cdid), &ccd->CHID); 512 - dev_dbg(dev, " CHID %s\n", pr_cdid); 513 - ckhdid_printf(pr_cdid, sizeof(pr_cdid), &ccd->CDID); 514 - dev_dbg(dev, " CDID %s\n", pr_cdid); 516 + dev_dbg(dev, " CHID %16ph\n", ccd->CHID.data); 517 + dev_dbg(dev, " CDID %16ph\n", ccd->CDID.data); 515 518 dev_dbg(dev, " Bandgroups 0x%04x\n", cbaf->host_band_groups); 516 519 517 520 result = usb_control_msg(
+2 -3
drivers/usb/wusbcore/dev-sysfs.c
··· 50 50 wusb_dev = wusb_dev_get_by_usb_dev(to_usb_device(dev)); 51 51 if (wusb_dev == NULL) 52 52 return -ENODEV; 53 - result = ckhdid_printf(buf, PAGE_SIZE, &wusb_dev->cdid); 54 - strcat(buf, "\n"); 53 + result = sprintf(buf, "%16ph\n", wusb_dev->cdid.data); 55 54 wusb_dev_put(wusb_dev); 56 - return result + 1; 55 + return result; 57 56 } 58 57 static DEVICE_ATTR_RO(wusb_cdid); 59 58
+1 -1
drivers/usb/wusbcore/devconnect.c
··· 532 532 } 533 533 534 534 dnc = container_of(dn_hdr, struct wusb_dn_connect, hdr); 535 - ckhdid_printf(pr_cdid, sizeof(pr_cdid), &dnc->CDID); 535 + sprintf(pr_cdid, "%16ph", dnc->CDID.data); 536 536 dev_info(dev, "DN CONNECT: device %s @ %x (%s) wants to %s\n", 537 537 pr_cdid, 538 538 wusb_dn_connect_prev_dev_addr(dnc),
+7 -8
drivers/usb/wusbcore/wa-xfer.c
··· 662 662 663 663 /* populate isoc packet descriptor. */ 664 664 packet_desc->bPacketType = WA_XFER_ISO_PACKET_INFO; 665 - packet_desc->wLength = cpu_to_le16(sizeof(*packet_desc) + 666 - (sizeof(packet_desc->PacketLength[0]) * 667 - seg->isoc_frame_count)); 665 + packet_desc->wLength = cpu_to_le16(struct_size(packet_desc, 666 + PacketLength, 667 + seg->isoc_frame_count)); 668 668 for (frame_index = 0; frame_index < seg->isoc_frame_count; 669 669 ++frame_index) { 670 670 int offset_index = frame_index + seg->isoc_frame_offset; ··· 2438 2438 struct wa_rpipe *rpipe; 2439 2439 unsigned done = 0, dti_busy = 0, data_frame_count = 0, seg_index; 2440 2440 unsigned first_frame_index = 0, rpipe_ready = 0; 2441 - int expected_size; 2441 + size_t expected_size; 2442 2442 2443 2443 /* We have a xfer result buffer; check it */ 2444 2444 dev_dbg(dev, "DTI: isoc packet status %d bytes at %p\n", ··· 2460 2460 goto error_bad_seg; 2461 2461 seg = xfer->seg[wa->dti_isoc_xfer_seg]; 2462 2462 rpipe = xfer->ep->hcpriv; 2463 - expected_size = sizeof(*packet_status) + 2464 - (sizeof(packet_status->PacketStatus[0]) * 2465 - seg->isoc_frame_count); 2463 + expected_size = struct_size(packet_status, PacketStatus, 2464 + seg->isoc_frame_count); 2466 2465 if (urb->actual_length != expected_size) { 2467 - dev_err(dev, "DTI Error: isoc packet status--bad urb length (%d bytes vs %d needed)\n", 2466 + dev_err(dev, "DTI Error: isoc packet status--bad urb length (%d bytes vs %zu needed)\n", 2468 2467 urb->actual_length, expected_size); 2469 2468 goto error_bad_seg; 2470 2469 }
+1 -5
drivers/usb/wusbcore/wusbhc.c
··· 80 80 { 81 81 struct wusbhc *wusbhc = usbhc_dev_to_wusbhc(dev); 82 82 const struct wusb_ckhdid *chid; 83 - ssize_t result = 0; 84 83 85 84 if (wusbhc->wuie_host_info != NULL) 86 85 chid = &wusbhc->wuie_host_info->CHID; 87 86 else 88 87 chid = &wusb_ckhdid_zero; 89 88 90 - result += ckhdid_printf(buf, PAGE_SIZE, chid); 91 - result += sprintf(buf + result, "\n"); 92 - 93 - return result; 89 + return sprintf(buf, "%16ph\n", chid->data); 94 90 } 95 91 96 92 /*
+2 -3
drivers/uwb/drp-ie.c
··· 125 125 { 126 126 struct uwb_ie_drp *drp_ie; 127 127 128 - drp_ie = kzalloc(sizeof(struct uwb_ie_drp) + 129 - UWB_NUM_ZONES * sizeof(struct uwb_drp_alloc), 130 - GFP_KERNEL); 128 + drp_ie = kzalloc(struct_size(drp_ie, allocs, UWB_NUM_ZONES), 129 + GFP_KERNEL); 131 130 if (drp_ie) 132 131 drp_ie->hdr.element_id = UWB_IE_DRP; 133 132 return drp_ie;
+6
include/linux/device.h
··· 758 758 759 759 /** 760 760 * struct device_connection - Device Connection Descriptor 761 + * @fwnode: The device node of the connected device 761 762 * @endpoint: The names of the two devices connected together 762 763 * @id: Unique identifier for the connection 763 764 * @list: List head, private, for internal use only 765 + * 766 + * NOTE: @fwnode is not used together with @endpoint. @fwnode is used when 767 + * platform firmware defines the connection. When the connection is registered 768 + * with device_connection_add() @endpoint is used instead. 764 769 */ 765 770 struct device_connection { 771 + struct fwnode_handle *fwnode; 766 772 const char *endpoint[2]; 767 773 const char *id; 768 774 struct list_head list;
+4 -3
include/linux/fsl_devices.h
··· 98 98 99 99 unsigned suspended:1; 100 100 unsigned already_suspended:1; 101 - unsigned has_fsl_erratum_a007792:1; 102 - unsigned has_fsl_erratum_a005275:1; 101 + unsigned has_fsl_erratum_a007792:1; 102 + unsigned has_fsl_erratum_14:1; 103 + unsigned has_fsl_erratum_a005275:1; 103 104 unsigned has_fsl_erratum_a005697:1; 104 - unsigned check_phy_clk_valid:1; 105 + unsigned check_phy_clk_valid:1; 105 106 106 107 /* register save area for suspend/resume */ 107 108 u32 pm_command;
+6 -7
include/linux/phy/phy-mipi-dphy.h
··· 6 6 #ifndef __PHY_MIPI_DPHY_H_ 7 7 #define __PHY_MIPI_DPHY_H_ 8 8 9 - #include <video/videomode.h> 10 - 11 9 /** 12 10 * struct phy_configure_opts_mipi_dphy - MIPI D-PHY configuration set 13 11 * ··· 190 192 /** 191 193 * @init: 192 194 * 193 - * Time, in picoseconds for the initialization period to 195 + * Time, in microseconds for the initialization period to 194 196 * complete. 195 197 * 196 - * Minimum value: 100000000 ps 198 + * Minimum value: 100 us 197 199 */ 198 200 unsigned int init; 199 201 ··· 244 246 /** 245 247 * @wakeup: 246 248 * 247 - * Time, in picoseconds, that a transmitter drives a Mark-1 249 + * Time, in microseconds, that a transmitter drives a Mark-1 248 250 * state prior to a Stop state in order to initiate an exit 249 251 * from ULPS. 250 252 * 251 - * Minimum value: 1000000000 ps 253 + * Minimum value: 1000 us 252 254 */ 253 255 unsigned int wakeup; 254 256 ··· 269 271 /** 270 272 * @lanes: 271 273 * 272 - * Number of active data lanes used for the transmissions. 274 + * Number of active, consecutive, data lanes, starting from 275 + * lane 0, used for the transmissions. 273 276 */ 274 277 unsigned char lanes; 275 278 };
+7 -3
include/linux/usb/hcd.h
··· 72 72 struct usb_host_endpoint *completing_ep; 73 73 }; 74 74 75 + enum usb_dev_authorize_policy { 76 + USB_DEVICE_AUTHORIZE_NONE = 0, 77 + USB_DEVICE_AUTHORIZE_ALL = 1, 78 + USB_DEVICE_AUTHORIZE_INTERNAL = 2, 79 + }; 80 + 75 81 struct usb_hcd { 76 82 77 83 /* ··· 123 117 #define HCD_FLAG_RH_RUNNING 5 /* root hub is running? */ 124 118 #define HCD_FLAG_DEAD 6 /* controller has died? */ 125 119 #define HCD_FLAG_INTF_AUTHORIZED 7 /* authorize interfaces? */ 126 - #define HCD_FLAG_DEV_AUTHORIZED 8 /* authorize devices? */ 127 120 128 121 /* The flags can be tested using these macros; they are likely to 129 122 * be slightly faster than test_bit(). ··· 147 142 * or they require explicit user space authorization; this bit is 148 143 * settable through /sys/class/usb_host/X/authorized_default 149 144 */ 150 - #define HCD_DEV_AUTHORIZED(hcd) \ 151 - ((hcd)->flags & (1U << HCD_FLAG_DEV_AUTHORIZED)) 145 + enum usb_dev_authorize_policy dev_policy; 152 146 153 147 /* Flags that get set only during HCD registration or removal. */ 154 148 unsigned rh_registered:1;/* is root hub registered? */
+2
include/linux/usb/role.h
··· 18 18 19 19 /** 20 20 * struct usb_role_switch_desc - USB Role Switch Descriptor 21 + * @fwnode: The device node to be associated with the role switch 21 22 * @usb2_port: Optional reference to the host controller port device (USB2) 22 23 * @usb3_port: Optional reference to the host controller port device (USB3) 23 24 * @udc: Optional reference to the peripheral controller device ··· 33 32 * usb_role_switch_register() before registering the switch. 34 33 */ 35 34 struct usb_role_switch_desc { 35 + struct fwnode_handle *fwnode; 36 36 struct device *usb2_port; 37 37 struct device *usb3_port; 38 38 struct device *udc;
-6
include/linux/usb/tcpm.h
··· 159 159 struct tcpm_port *tcpm_register_port(struct device *dev, struct tcpc_dev *tcpc); 160 160 void tcpm_unregister_port(struct tcpm_port *port); 161 161 162 - int tcpm_update_source_capabilities(struct tcpm_port *port, const u32 *pdo, 163 - unsigned int nr_pdo); 164 - int tcpm_update_sink_capabilities(struct tcpm_port *port, const u32 *pdo, 165 - unsigned int nr_pdo, 166 - unsigned int operating_snk_mw); 167 - 168 162 void tcpm_vbus_change(struct tcpm_port *port); 169 163 void tcpm_cc_change(struct tcpm_port *port); 170 164 void tcpm_pd_receive(struct tcpm_port *port,
+4
include/linux/usb/typec_dp.h
··· 92 92 #define DP_CONF_PIN_ASSIGNEMENT_SHIFT 8 93 93 #define DP_CONF_PIN_ASSIGNEMENT_MASK GENMASK(15, 8) 94 94 95 + /* Helper for setting/getting the pin assignement value to the configuration */ 96 + #define DP_CONF_SET_PIN_ASSIGN(_a_) ((_a_) << 8) 97 + #define DP_CONF_GET_PIN_ASSIGN(_conf_) (((_conf_) & GENMASK(15, 8)) >> 8) 98 + 95 99 #endif /* __USB_TYPEC_DP_H */
+2 -1
include/linux/usb/typec_mux.h
··· 47 47 int typec_switch_register(struct typec_switch *sw); 48 48 void typec_switch_unregister(struct typec_switch *sw); 49 49 50 - struct typec_mux *typec_mux_get(struct device *dev, const char *name); 50 + struct typec_mux * 51 + typec_mux_get(struct device *dev, const struct typec_altmode_desc *desc); 51 52 void typec_mux_put(struct typec_mux *mux); 52 53 int typec_mux_register(struct typec_mux *mux); 53 54 void typec_mux_unregister(struct typec_mux *mux);
-16
include/linux/usb/wusb.h
··· 236 236 WUSB_TRUST_TIMEOUT_MS = 4000, /* [WUSB] section 4.15.1 */ 237 237 }; 238 238 239 - static inline size_t ckhdid_printf(char *pr_ckhdid, size_t size, 240 - const struct wusb_ckhdid *ckhdid) 241 - { 242 - return scnprintf(pr_ckhdid, size, 243 - "%02hx %02hx %02hx %02hx %02hx %02hx %02hx %02hx " 244 - "%02hx %02hx %02hx %02hx %02hx %02hx %02hx %02hx", 245 - ckhdid->data[0], ckhdid->data[1], 246 - ckhdid->data[2], ckhdid->data[3], 247 - ckhdid->data[4], ckhdid->data[5], 248 - ckhdid->data[6], ckhdid->data[7], 249 - ckhdid->data[8], ckhdid->data[9], 250 - ckhdid->data[10], ckhdid->data[11], 251 - ckhdid->data[12], ckhdid->data[13], 252 - ckhdid->data[14], ckhdid->data[15]); 253 - } 254 - 255 239 /* 256 240 * WUSB Crypto stuff (WUSB1.0[6]) 257 241 */