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kernel os linux

[media] marvell-cam: Move Cafe-specific register definitions to cafe-driver.c

Nobody else ever needs to see these, so let's hide them.

Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

authored by

Jonathan Corbet and committed by
Mauro Carvalho Chehab
f8ff6a96 9eefa7dc

+64 -55
+63
drivers/media/video/marvell-ccic/cafe-driver.c
··· 57 57 }; 58 58 59 59 /* 60 + * Most of the camera controller registers are defined in mcam-core.h, 61 + * but the Cafe platform has some additional registers of its own; 62 + * they are described here. 63 + */ 64 + 65 + /* 66 + * "General purpose register" has a couple of GPIOs used for sensor 67 + * power and reset on OLPC XO 1.0 systems. 68 + */ 69 + #define REG_GPR 0xb4 70 + #define GPR_C1EN 0x00000020 /* Pad 1 (power down) enable */ 71 + #define GPR_C0EN 0x00000010 /* Pad 0 (reset) enable */ 72 + #define GPR_C1 0x00000002 /* Control 1 value */ 73 + /* 74 + * Control 0 is wired to reset on OLPC machines. For ov7x sensors, 75 + * it is active low. 76 + */ 77 + #define GPR_C0 0x00000001 /* Control 0 value */ 78 + 79 + /* 80 + * These registers control the SMBUS module for communicating 81 + * with the sensor. 82 + */ 83 + #define REG_TWSIC0 0xb8 /* TWSI (smbus) control 0 */ 84 + #define TWSIC0_EN 0x00000001 /* TWSI enable */ 85 + #define TWSIC0_MODE 0x00000002 /* 1 = 16-bit, 0 = 8-bit */ 86 + #define TWSIC0_SID 0x000003fc /* Slave ID */ 87 + #define TWSIC0_SID_SHIFT 2 88 + #define TWSIC0_CLKDIV 0x0007fc00 /* Clock divider */ 89 + #define TWSIC0_MASKACK 0x00400000 /* Mask ack from sensor */ 90 + #define TWSIC0_OVMAGIC 0x00800000 /* Make it work on OV sensors */ 91 + 92 + #define REG_TWSIC1 0xbc /* TWSI control 1 */ 93 + #define TWSIC1_DATA 0x0000ffff /* Data to/from camchip */ 94 + #define TWSIC1_ADDR 0x00ff0000 /* Address (register) */ 95 + #define TWSIC1_ADDR_SHIFT 16 96 + #define TWSIC1_READ 0x01000000 /* Set for read op */ 97 + #define TWSIC1_WSTAT 0x02000000 /* Write status */ 98 + #define TWSIC1_RVALID 0x04000000 /* Read data valid */ 99 + #define TWSIC1_ERROR 0x08000000 /* Something screwed up */ 100 + 101 + /* 102 + * Here's the weird global control registers 103 + */ 104 + #define REG_GL_CSR 0x3004 /* Control/status register */ 105 + #define GCSR_SRS 0x00000001 /* SW Reset set */ 106 + #define GCSR_SRC 0x00000002 /* SW Reset clear */ 107 + #define GCSR_MRS 0x00000004 /* Master reset set */ 108 + #define GCSR_MRC 0x00000008 /* HW Reset clear */ 109 + #define GCSR_CCIC_EN 0x00004000 /* CCIC Clock enable */ 110 + #define REG_GL_IMASK 0x300c /* Interrupt mask register */ 111 + #define GIMSK_CCIC_EN 0x00000004 /* CCIC Interrupt enable */ 112 + 113 + #define REG_GL_FCR 0x3038 /* GPIO functional control register */ 114 + #define GFCR_GPIO_ON 0x08 /* Camera GPIO enabled */ 115 + #define REG_GL_GPIOR 0x315c /* GPIO register */ 116 + #define GGPIO_OUT 0x80000 /* GPIO output */ 117 + #define GGPIO_VAL 0x00008 /* Output pin value */ 118 + 119 + #define REG_LEN (REG_GL_IMASK + 4) 120 + 121 + 122 + /* 60 123 * Debugging and related. 61 124 */ 62 125 #define cam_err(cam, fmt, arg...) \
+1 -55
drivers/media/video/marvell-ccic/mcam-core.h
··· 249 249 #define REG_CLKCTRL 0x88 /* Clock control */ 250 250 #define CLK_DIV_MASK 0x0000ffff /* Upper bits RW "reserved" */ 251 251 252 - #define REG_GPR 0xb4 /* General purpose register. This 253 - controls inputs to the power and reset 254 - pins on the OV7670 used with OLPC; 255 - other deployments could differ. */ 256 - #define GPR_C1EN 0x00000020 /* Pad 1 (power down) enable */ 257 - #define GPR_C0EN 0x00000010 /* Pad 0 (reset) enable */ 258 - #define GPR_C1 0x00000002 /* Control 1 value */ 259 - /* 260 - * Control 0 is wired to reset on OLPC machines. For ov7x sensors, 261 - * it is active low, for 0v6x, instead, it's active high. What 262 - * fun. 263 - */ 264 - #define GPR_C0 0x00000001 /* Control 0 value */ 265 - 266 - #define REG_TWSIC0 0xb8 /* TWSI (smbus) control 0 */ 267 - #define TWSIC0_EN 0x00000001 /* TWSI enable */ 268 - #define TWSIC0_MODE 0x00000002 /* 1 = 16-bit, 0 = 8-bit */ 269 - #define TWSIC0_SID 0x000003fc /* Slave ID */ 270 - #define TWSIC0_SID_SHIFT 2 271 - #define TWSIC0_CLKDIV 0x0007fc00 /* Clock divider */ 272 - #define TWSIC0_MASKACK 0x00400000 /* Mask ack from sensor */ 273 - #define TWSIC0_OVMAGIC 0x00800000 /* Make it work on OV sensors */ 274 - 275 - #define REG_TWSIC1 0xbc /* TWSI control 1 */ 276 - #define TWSIC1_DATA 0x0000ffff /* Data to/from camchip */ 277 - #define TWSIC1_ADDR 0x00ff0000 /* Address (register) */ 278 - #define TWSIC1_ADDR_SHIFT 16 279 - #define TWSIC1_READ 0x01000000 /* Set for read op */ 280 - #define TWSIC1_WSTAT 0x02000000 /* Write status */ 281 - #define TWSIC1_RVALID 0x04000000 /* Read data valid */ 282 - #define TWSIC1_ERROR 0x08000000 /* Something screwed up */ 283 - 284 - 252 + /* This appears to be a Cafe-only register */ 285 253 #define REG_UBAR 0xc4 /* Upper base address register */ 286 - 287 - /* 288 - * Here's the weird global control registers which are said to live 289 - * way up here. 290 - */ 291 - #define REG_GL_CSR 0x3004 /* Control/status register */ 292 - #define GCSR_SRS 0x00000001 /* SW Reset set */ 293 - #define GCSR_SRC 0x00000002 /* SW Reset clear */ 294 - #define GCSR_MRS 0x00000004 /* Master reset set */ 295 - #define GCSR_MRC 0x00000008 /* HW Reset clear */ 296 - #define GCSR_CCIC_EN 0x00004000 /* CCIC Clock enable */ 297 - #define REG_GL_IMASK 0x300c /* Interrupt mask register */ 298 - #define GIMSK_CCIC_EN 0x00000004 /* CCIC Interrupt enable */ 299 - 300 - #define REG_GL_FCR 0x3038 /* GPIO functional control register */ 301 - #define GFCR_GPIO_ON 0x08 /* Camera GPIO enabled */ 302 - #define REG_GL_GPIOR 0x315c /* GPIO register */ 303 - #define GGPIO_OUT 0x80000 /* GPIO output */ 304 - #define GGPIO_VAL 0x00008 /* Output pin value */ 305 - 306 - #define REG_LEN (REG_GL_IMASK + 4) 307 - 308 254 309 255 /* 310 256 * Useful stuff that probably belongs somewhere global.