Merge tag 'late-dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC late changes from Kevin Hilman:
"These are changes that arrived a little late but were considered
self-contained enough to still go in for v3.14.

They are all device tree updtes this time around, and mainly for
Broadcom SoCs"

* tag 'late-dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: moxart: move fixed rate clock child node to board level dts
clk: bcm281xx: define kona clock binding
ARM: dts: add usb udc support to bcm281xx
ARM: dts: Specify clocks for timer on bcm11351
Documentation: dt: kona-timer: Add clocks property
ARM: dts: Specify clocks for SDHCIs on bcm11351
Documentation: dt: kona-sdhci: Add clocks property
ARM: dts: Specify clocks for UARTs on bcm11351
ARM: dts: bcm281xx: Add i2c busses
ARM: dts: Declare clocks as fixed on bcm11351
ARM: dts: bcm28155-ap: Enable all the i2c busses

+310 -12
+6 -1
Documentation/devicetree/bindings/arm/bcm/kona-timer.txt
··· 8 - DEPRECATED: compatible : "bcm,kona-timer" 9 - reg : Register range for the timer 10 - interrupts : interrupt for the timer 11 - clock-frequency: frequency that the clock operates 12 13 Example: 14 timer@35006000 { 15 compatible = "brcm,kona-timer"; 16 reg = <0x35006000 0x1000>; 17 interrupts = <0x0 7 0x4>; 18 - clock-frequency = <32768>; 19 }; 20
··· 8 - DEPRECATED: compatible : "bcm,kona-timer" 9 - reg : Register range for the timer 10 - interrupts : interrupt for the timer 11 + - clocks: phandle + clock specifier pair of the external clock 12 - clock-frequency: frequency that the clock operates 13 + 14 + Only one of clocks or clock-frequency should be specified. 15 + 16 + Refer to clocks/clock-bindings.txt for generic clock consumer properties. 17 18 Example: 19 timer@35006000 { 20 compatible = "brcm,kona-timer"; 21 reg = <0x35006000 0x1000>; 22 interrupts = <0x0 7 0x4>; 23 + clocks = <&hub_timer_clk>; 24 }; 25
+93
Documentation/devicetree/bindings/clock/bcm-kona-clock.txt
···
··· 1 + Broadcom Kona Family Clocks 2 + 3 + This binding is associated with Broadcom SoCs having "Kona" style 4 + clock control units (CCUs). A CCU is a clock provider that manages 5 + a set of clock signals. Each CCU is represented by a node in the 6 + device tree. 7 + 8 + This binding uses the common clock binding: 9 + Documentation/devicetree/bindings/clock/clock-bindings.txt 10 + 11 + Required properties: 12 + - compatible 13 + Shall have one of the following values: 14 + - "brcm,bcm11351-root-ccu" 15 + - "brcm,bcm11351-aon-ccu" 16 + - "brcm,bcm11351-hub-ccu" 17 + - "brcm,bcm11351-master-ccu" 18 + - "brcm,bcm11351-slave-ccu" 19 + - reg 20 + Shall define the base and range of the address space 21 + containing clock control registers 22 + - #clock-cells 23 + Shall have value <1>. The permitted clock-specifier values 24 + are defined below. 25 + - clock-output-names 26 + Shall be an ordered list of strings defining the names of 27 + the clocks provided by the CCU. 28 + 29 + 30 + BCM281XX family SoCs use Kona CCUs. The following table defines 31 + the set of CCUs and clock specifiers for BCM281XX clocks. When 32 + a clock consumer references a clocks, its symbolic specifier 33 + (rather than its numeric index value) should be used. These 34 + specifiers are defined in "include/dt-bindings/clock/bcm281xx.h". 35 + 36 + CCU Clock Type Index Specifier 37 + --- ----- ---- ----- --------- 38 + root frac_1m peri 0 BCM281XX_ROOT_CCU_FRAC_1M 39 + 40 + aon hub_timer peri 0 BCM281XX_AON_CCU_HUB_TIMER 41 + aon pmu_bsc peri 1 BCM281XX_AON_CCU_PMU_BSC 42 + aon pmu_bsc_var peri 2 BCM281XX_AON_CCU_PMU_BSC_VAR 43 + 44 + hub tmon_1m peri 0 BCM281XX_HUB_CCU_TMON_1M 45 + 46 + master sdio1 peri 0 BCM281XX_MASTER_CCU_SDIO1 47 + master sdio2 peri 1 BCM281XX_MASTER_CCU_SDIO2 48 + master sdio3 peri 2 BCM281XX_MASTER_CCU_SDIO3 49 + master sdio4 peri 3 BCM281XX_MASTER_CCU_SDIO4 50 + master dmac peri 4 BCM281XX_MASTER_CCU_DMAC 51 + master usb_ic peri 5 BCM281XX_MASTER_CCU_USB_IC 52 + master hsic2_48m peri 6 BCM281XX_MASTER_CCU_HSIC_48M 53 + master hsic2_12m peri 7 BCM281XX_MASTER_CCU_HSIC_12M 54 + 55 + slave uartb peri 0 BCM281XX_SLAVE_CCU_UARTB 56 + slave uartb2 peri 1 BCM281XX_SLAVE_CCU_UARTB2 57 + slave uartb3 peri 2 BCM281XX_SLAVE_CCU_UARTB3 58 + slave uartb4 peri 3 BCM281XX_SLAVE_CCU_UARTB4 59 + slave ssp0 peri 4 BCM281XX_SLAVE_CCU_SSP0 60 + slave ssp2 peri 5 BCM281XX_SLAVE_CCU_SSP2 61 + slave bsc1 peri 6 BCM281XX_SLAVE_CCU_BSC1 62 + slave bsc2 peri 7 BCM281XX_SLAVE_CCU_BSC2 63 + slave bsc3 peri 8 BCM281XX_SLAVE_CCU_BSC3 64 + slave pwm peri 9 BCM281XX_SLAVE_CCU_PWM 65 + 66 + 67 + Device tree example: 68 + 69 + slave_ccu: slave_ccu { 70 + compatible = "brcm,bcm11351-slave-ccu"; 71 + reg = <0x3e011000 0x0f00>; 72 + #clock-cells = <1>; 73 + clock-output-names = "uartb", 74 + "uartb2", 75 + "uartb3", 76 + "uartb4"; 77 + }; 78 + 79 + ref_crystal_clk: ref_crystal { 80 + #clock-cells = <0>; 81 + compatible = "fixed-clock"; 82 + clock-frequency = <26000000>; 83 + }; 84 + 85 + uart@3e002000 { 86 + compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; 87 + status = "disabled"; 88 + reg = <0x3e002000 0x1000>; 89 + clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>; 90 + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 91 + reg-shift = <2>; 92 + reg-io-width = <4>; 93 + };
+4
Documentation/devicetree/bindings/mmc/kona-sdhci.txt
··· 6 Required properties: 7 - compatible : Should be "brcm,kona-sdhci" 8 - DEPRECATED: compatible : Should be "bcm,kona-sdhci" 9 10 Example: 11 12 sdio2: sdio@0x3f1a0000 { 13 compatible = "brcm,kona-sdhci"; 14 reg = <0x3f1a0000 0x10000>; 15 interrupts = <0x0 74 0x4>; 16 }; 17
··· 6 Required properties: 7 - compatible : Should be "brcm,kona-sdhci" 8 - DEPRECATED: compatible : Should be "bcm,kona-sdhci" 9 + - clocks: phandle + clock specifier pair of the external clock 10 + 11 + Refer to clocks/clock-bindings.txt for generic clock consumer properties. 12 13 Example: 14 15 sdio2: sdio@0x3f1a0000 { 16 compatible = "brcm,kona-sdhci"; 17 reg = <0x3f1a0000 0x10000>; 18 + clocks = <&sdio3_clk>; 19 interrupts = <0x0 74 0x4>; 20 }; 21
+6
arch/arm/boot/dts/bcm11351-brt.dts
··· 44 status = "okay"; 45 }; 46 47 48 };
··· 44 status = "okay"; 45 }; 46 47 + usbotg: usb@3f120000 { 48 + status = "okay"; 49 + }; 50 51 + usbphy: usb-phy@3f130000 { 52 + status = "okay"; 53 + }; 54 };
+165 -5
arch/arm/boot/dts/bcm11351.dtsi
··· 43 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; 44 status = "disabled"; 45 reg = <0x3e000000 0x1000>; 46 - clock-frequency = <13000000>; 47 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 48 reg-shift = <2>; 49 reg-io-width = <4>; ··· 53 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; 54 status = "disabled"; 55 reg = <0x3e001000 0x1000>; 56 - clock-frequency = <13000000>; 57 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 58 reg-shift = <2>; 59 reg-io-width = <4>; ··· 63 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; 64 status = "disabled"; 65 reg = <0x3e002000 0x1000>; 66 - clock-frequency = <13000000>; 67 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 68 reg-shift = <2>; 69 reg-io-width = <4>; ··· 73 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; 74 status = "disabled"; 75 reg = <0x3e003000 0x1000>; 76 - clock-frequency = <13000000>; 77 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 78 reg-shift = <2>; 79 reg-io-width = <4>; ··· 95 compatible = "brcm,kona-timer"; 96 reg = <0x35006000 0x1000>; 97 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 98 - clock-frequency = <32768>; 99 }; 100 101 gpio: gpio@35003000 { ··· 118 compatible = "brcm,kona-sdhci"; 119 reg = <0x3f180000 0x10000>; 120 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 121 status = "disabled"; 122 }; 123 ··· 126 compatible = "brcm,kona-sdhci"; 127 reg = <0x3f190000 0x10000>; 128 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 129 status = "disabled"; 130 }; 131 ··· 134 compatible = "brcm,kona-sdhci"; 135 reg = <0x3f1a0000 0x10000>; 136 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 137 status = "disabled"; 138 }; 139 ··· 142 compatible = "brcm,kona-sdhci"; 143 reg = <0x3f1b0000 0x10000>; 144 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 145 status = "disabled"; 146 }; 147 148 pinctrl@35004800 { 149 compatible = "brcm,capri-pinctrl"; 150 reg = <0x35004800 0x430>; 151 }; 152 };
··· 43 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; 44 status = "disabled"; 45 reg = <0x3e000000 0x1000>; 46 + clocks = <&uartb_clk>; 47 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 48 reg-shift = <2>; 49 reg-io-width = <4>; ··· 53 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; 54 status = "disabled"; 55 reg = <0x3e001000 0x1000>; 56 + clocks = <&uartb2_clk>; 57 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 58 reg-shift = <2>; 59 reg-io-width = <4>; ··· 63 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; 64 status = "disabled"; 65 reg = <0x3e002000 0x1000>; 66 + clocks = <&uartb3_clk>; 67 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 68 reg-shift = <2>; 69 reg-io-width = <4>; ··· 73 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; 74 status = "disabled"; 75 reg = <0x3e003000 0x1000>; 76 + clocks = <&uartb4_clk>; 77 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 78 reg-shift = <2>; 79 reg-io-width = <4>; ··· 95 compatible = "brcm,kona-timer"; 96 reg = <0x35006000 0x1000>; 97 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 98 + clocks = <&hub_timer_clk>; 99 }; 100 101 gpio: gpio@35003000 { ··· 118 compatible = "brcm,kona-sdhci"; 119 reg = <0x3f180000 0x10000>; 120 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 121 + clocks = <&sdio1_clk>; 122 status = "disabled"; 123 }; 124 ··· 125 compatible = "brcm,kona-sdhci"; 126 reg = <0x3f190000 0x10000>; 127 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 128 + clocks = <&sdio2_clk>; 129 status = "disabled"; 130 }; 131 ··· 132 compatible = "brcm,kona-sdhci"; 133 reg = <0x3f1a0000 0x10000>; 134 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 135 + clocks = <&sdio3_clk>; 136 status = "disabled"; 137 }; 138 ··· 139 compatible = "brcm,kona-sdhci"; 140 reg = <0x3f1b0000 0x10000>; 141 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 142 + clocks = <&sdio4_clk>; 143 status = "disabled"; 144 }; 145 146 pinctrl@35004800 { 147 compatible = "brcm,capri-pinctrl"; 148 reg = <0x35004800 0x430>; 149 + }; 150 + 151 + i2c@3e016000 { 152 + compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; 153 + reg = <0x3e016000 0x80>; 154 + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 155 + #address-cells = <1>; 156 + #size-cells = <0>; 157 + clocks = <&bsc1_clk>; 158 + status = "disabled"; 159 + }; 160 + 161 + i2c@3e017000 { 162 + compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; 163 + reg = <0x3e017000 0x80>; 164 + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 165 + #address-cells = <1>; 166 + #size-cells = <0>; 167 + clocks = <&bsc2_clk>; 168 + status = "disabled"; 169 + }; 170 + 171 + i2c@3e018000 { 172 + compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; 173 + reg = <0x3e018000 0x80>; 174 + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 175 + #address-cells = <1>; 176 + #size-cells = <0>; 177 + clocks = <&bsc3_clk>; 178 + status = "disabled"; 179 + }; 180 + 181 + i2c@3500d000 { 182 + compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; 183 + reg = <0x3500d000 0x80>; 184 + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 185 + #address-cells = <1>; 186 + #size-cells = <0>; 187 + clocks = <&pmu_bsc_clk>; 188 + status = "disabled"; 189 + }; 190 + 191 + clocks { 192 + bsc1_clk: bsc1 { 193 + compatible = "fixed-clock"; 194 + clock-frequency = <13000000>; 195 + #clock-cells = <0>; 196 + }; 197 + 198 + bsc2_clk: bsc2 { 199 + compatible = "fixed-clock"; 200 + clock-frequency = <13000000>; 201 + #clock-cells = <0>; 202 + }; 203 + 204 + bsc3_clk: bsc3 { 205 + compatible = "fixed-clock"; 206 + clock-frequency = <13000000>; 207 + #clock-cells = <0>; 208 + }; 209 + 210 + pmu_bsc_clk: pmu_bsc { 211 + compatible = "fixed-clock"; 212 + clock-frequency = <13000000>; 213 + #clock-cells = <0>; 214 + }; 215 + 216 + hub_timer_clk: hub_timer { 217 + compatible = "fixed-clock"; 218 + clock-frequency = <32768>; 219 + #clock-cells = <0>; 220 + }; 221 + 222 + pwm_clk: pwm { 223 + compatible = "fixed-clock"; 224 + clock-frequency = <26000000>; 225 + #clock-cells = <0>; 226 + }; 227 + 228 + sdio1_clk: sdio1 { 229 + compatible = "fixed-clock"; 230 + clock-frequency = <48000000>; 231 + #clock-cells = <0>; 232 + }; 233 + 234 + sdio2_clk: sdio2 { 235 + compatible = "fixed-clock"; 236 + clock-frequency = <48000000>; 237 + #clock-cells = <0>; 238 + }; 239 + 240 + sdio3_clk: sdio3 { 241 + compatible = "fixed-clock"; 242 + clock-frequency = <48000000>; 243 + #clock-cells = <0>; 244 + }; 245 + 246 + sdio4_clk: sdio4 { 247 + compatible = "fixed-clock"; 248 + clock-frequency = <48000000>; 249 + #clock-cells = <0>; 250 + }; 251 + 252 + tmon_1m_clk: tmon_1m { 253 + compatible = "fixed-clock"; 254 + clock-frequency = <1000000>; 255 + #clock-cells = <0>; 256 + }; 257 + 258 + uartb_clk: uartb { 259 + compatible = "fixed-clock"; 260 + clock-frequency = <13000000>; 261 + #clock-cells = <0>; 262 + }; 263 + 264 + uartb2_clk: uartb2 { 265 + compatible = "fixed-clock"; 266 + clock-frequency = <13000000>; 267 + #clock-cells = <0>; 268 + }; 269 + 270 + uartb3_clk: uartb3 { 271 + compatible = "fixed-clock"; 272 + clock-frequency = <13000000>; 273 + #clock-cells = <0>; 274 + }; 275 + 276 + uartb4_clk: uartb4 { 277 + compatible = "fixed-clock"; 278 + clock-frequency = <13000000>; 279 + #clock-cells = <0>; 280 + }; 281 + 282 + usb_otg_ahb_clk: usb_otg_ahb { 283 + compatible = "fixed-clock"; 284 + clock-frequency = <52000000>; 285 + #clock-cells = <0>; 286 + }; 287 + }; 288 + 289 + usbotg: usb@3f120000 { 290 + compatible = "snps,dwc2"; 291 + reg = <0x3f120000 0x10000>; 292 + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 293 + clocks = <&usb_otg_ahb_clk>; 294 + clock-names = "otg"; 295 + phys = <&usbphy>; 296 + phy-names = "usb2-phy"; 297 + status = "disabled"; 298 + }; 299 + 300 + usbphy: usb-phy@3f130000 { 301 + compatible = "brcm,kona-usb2-phy"; 302 + reg = <0x3f130000 0x28>; 303 + #phy-cells = <0>; 304 + status = "disabled"; 305 }; 306 };
+28
arch/arm/boot/dts/bcm28155-ap.dts
··· 27 status = "okay"; 28 }; 29 30 sdio1: sdio@3f180000 { 31 max-frequency = <48000000>; 32 status = "okay"; ··· 61 sdio4: sdio@3f1b0000 { 62 max-frequency = <48000000>; 63 cd-gpios = <&gpio 14 0>; 64 status = "okay"; 65 }; 66 };
··· 27 status = "okay"; 28 }; 29 30 + i2c@3e016000 { 31 + status="okay"; 32 + clock-frequency = <400000>; 33 + }; 34 + 35 + i2c@3e017000 { 36 + status="okay"; 37 + clock-frequency = <400000>; 38 + }; 39 + 40 + i2c@3e018000 { 41 + status="okay"; 42 + clock-frequency = <400000>; 43 + }; 44 + 45 + i2c@3500d000 { 46 + status="okay"; 47 + clock-frequency = <400000>; 48 + }; 49 + 50 sdio1: sdio@3f180000 { 51 max-frequency = <48000000>; 52 status = "okay"; ··· 41 sdio4: sdio@3f1b0000 { 42 max-frequency = <48000000>; 43 cd-gpios = <&gpio 14 0>; 44 + status = "okay"; 45 + }; 46 + 47 + usbotg: usb@3f120000 { 48 + status = "okay"; 49 + }; 50 + 51 + usbphy: usb-phy@3f130000 { 52 status = "okay"; 53 }; 54 };
+8
arch/arm/boot/dts/moxart-uc7112lx.dts
··· 17 reg = <0x0 0x2000000>; 18 }; 19 20 flash@80000000,0 { 21 compatible = "numonyx,js28f128", "cfi-flash"; 22 reg = <0x80000000 0x1000000>;
··· 17 reg = <0x0 0x2000000>; 18 }; 19 20 + clocks { 21 + ref12: ref12M { 22 + compatible = "fixed-clock"; 23 + #clock-cells = <0>; 24 + clock-frequency = <12000000>; 25 + }; 26 + }; 27 + 28 flash@80000000,0 { 29 compatible = "numonyx,js28f128", "cfi-flash"; 30 reg = <0x80000000 0x1000000>;
-6
arch/arm/boot/dts/moxart.dtsi
··· 26 clocks { 27 #address-cells = <1>; 28 #size-cells = <0>; 29 - 30 - ref12: ref12M { 31 - compatible = "fixed-clock"; 32 - #clock-cells = <0>; 33 - clock-frequency = <12000000>; 34 - }; 35 }; 36 37 soc {
··· 26 clocks { 27 #address-cells = <1>; 28 #size-cells = <0>; 29 }; 30 31 soc {