Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'topic/drm-misc-2016-08-12' of git://anongit.freedesktop.org/drm-intel into drm-next

- more fence destaging and cleanup (Gustavo&Sumit)
- DRIVER_LEGACY to untangle from DRIVER_MODESET
- drm_mm refactor (Chris)
- fbdev-less compile fies
- clipped plane src/dst rects (Ville)
- + a few mediatek patches that build on top of that (Bibby+Daniel)
- small stuff all over really

* tag 'topic/drm-misc-2016-08-12' of git://anongit.freedesktop.org/drm-intel: (43 commits)
dma-buf/fence: kerneldoc: remove spurious section header
dma-buf/fence: kerneldoc: remove unused struct members
Revert "gpu: drm: omapdrm: dss-of: add missing of_node_put after calling of_parse_phandle"
drm: Protect fb_defio in drivers with CONFIG_KMS_FBDEV_EMULATION
drm/radeon|amgpu: Make fbdev emulation optional
drm/vmwgfx: select CONFIG_FB
drm: Remove superflous linux/fb.h includes
drm/fb-helper: Add a dummy remove_conflicting_framebuffers
dma-buf/sync_file: only enable fence signalling on poll()
Documentation: add doc for sync_file_get_fence()
dma-buf/sync_file: add sync_file_get_fence()
dma-buf/sync_file: refactor fence storage in struct sync_file
dma-buf/fence-array: add fence_is_array()
drm/dp_helper: Rate limit timeout errors from drm_dp_i2c_do_msg()
drm/dp_helper: Print first error received on failure in drm_dp_dpcd_access()
drm: Add ratelimited versions of the DRM_DEBUG* macros
drm: Make sure drm_vblank_no_hw_counter isn't abused
drm/mediatek: Fix mtk_atomic_complete for runtime_pm
drm/mediatek: plane: Use FB's format's cpp to compute x offset
drm/mediatek: plane: Merge mtk_plane_enable into mtk_plane_atomic_update
...

+981 -769
+6 -3
Documentation/gpu/drm-internals.rst
··· 53 53 DRIVER_USE_AGP 54 54 Driver uses AGP interface, the DRM core will manage AGP resources. 55 55 56 - DRIVER_REQUIRE_AGP 57 - Driver needs AGP interface to function. AGP initialization failure 58 - will become a fatal error. 56 + DRIVER_LEGACY 57 + Denote a legacy driver using shadow attach. Don't use. 58 + 59 + DRIVER_KMS_LEGACY_CONTEXT 60 + Used only by nouveau for backwards compatibility with existing userspace. 61 + Don't use. 59 62 60 63 DRIVER_PCI_DMA 61 64 Driver is capable of PCI DMA, mapping of PCI DMA buffers to
+14
Documentation/sync_file.txt
··· 64 64 If the creation process fail, or the sync_file needs to be released by any 65 65 other reason fput(sync_file->file) should be used. 66 66 67 + Receiving Sync Files from Userspace 68 + ----------------------------------- 69 + 70 + When userspace needs to send an in-fence to the driver it passes file descriptor 71 + of the Sync File to the kernel. The kernel can then retrieve the fences 72 + from it. 73 + 74 + Interface: 75 + struct fence *sync_file_get_fence(int fd); 76 + 77 + 78 + The returned reference is owned by the caller and must be disposed of 79 + afterwards using fence_put(). In case of error, a NULL is returned instead. 80 + 67 81 References: 68 82 [1] struct sync_file in include/linux/sync_file.h 69 83 [2] All interfaces mentioned above defined in include/linux/sync_file.h
+1
drivers/dma-buf/fence-array.c
··· 99 99 .wait = fence_default_wait, 100 100 .release = fence_array_release, 101 101 }; 102 + EXPORT_SYMBOL(fence_array_ops); 102 103 103 104 /** 104 105 * fence_array_create - Create a custom fence array
+139 -65
drivers/dma-buf/sync_file.c
··· 28 28 29 29 static const struct file_operations sync_file_fops; 30 30 31 - static struct sync_file *sync_file_alloc(int size) 31 + static struct sync_file *sync_file_alloc(void) 32 32 { 33 33 struct sync_file *sync_file; 34 34 35 - sync_file = kzalloc(size, GFP_KERNEL); 35 + sync_file = kzalloc(sizeof(*sync_file), GFP_KERNEL); 36 36 if (!sync_file) 37 37 return NULL; 38 38 ··· 45 45 46 46 init_waitqueue_head(&sync_file->wq); 47 47 48 + INIT_LIST_HEAD(&sync_file->cb.node); 49 + 48 50 return sync_file; 49 51 50 52 err: ··· 56 54 57 55 static void fence_check_cb_func(struct fence *f, struct fence_cb *cb) 58 56 { 59 - struct sync_file_cb *check; 60 57 struct sync_file *sync_file; 61 58 62 - check = container_of(cb, struct sync_file_cb, cb); 63 - sync_file = check->sync_file; 59 + sync_file = container_of(cb, struct sync_file, cb); 64 60 65 - if (atomic_dec_and_test(&sync_file->status)) 66 - wake_up_all(&sync_file->wq); 61 + wake_up_all(&sync_file->wq); 67 62 } 68 63 69 64 /** ··· 75 76 { 76 77 struct sync_file *sync_file; 77 78 78 - sync_file = sync_file_alloc(offsetof(struct sync_file, cbs[1])); 79 + sync_file = sync_file_alloc(); 79 80 if (!sync_file) 80 81 return NULL; 81 82 82 - sync_file->num_fences = 1; 83 - atomic_set(&sync_file->status, 1); 83 + sync_file->fence = fence; 84 + 84 85 snprintf(sync_file->name, sizeof(sync_file->name), "%s-%s%llu-%d", 85 86 fence->ops->get_driver_name(fence), 86 87 fence->ops->get_timeline_name(fence), fence->context, 87 88 fence->seqno); 88 - 89 - sync_file->cbs[0].fence = fence; 90 - sync_file->cbs[0].sync_file = sync_file; 91 - if (fence_add_callback(fence, &sync_file->cbs[0].cb, 92 - fence_check_cb_func)) 93 - atomic_dec(&sync_file->status); 94 89 95 90 return sync_file; 96 91 } ··· 114 121 return NULL; 115 122 } 116 123 117 - static void sync_file_add_pt(struct sync_file *sync_file, int *i, 118 - struct fence *fence) 124 + /** 125 + * sync_file_get_fence - get the fence related to the sync_file fd 126 + * @fd: sync_file fd to get the fence from 127 + * 128 + * Ensures @fd references a valid sync_file and returns a fence that 129 + * represents all fence in the sync_file. On error NULL is returned. 130 + */ 131 + struct fence *sync_file_get_fence(int fd) 119 132 { 120 - sync_file->cbs[*i].fence = fence; 121 - sync_file->cbs[*i].sync_file = sync_file; 133 + struct sync_file *sync_file; 134 + struct fence *fence; 122 135 123 - if (!fence_add_callback(fence, &sync_file->cbs[*i].cb, 124 - fence_check_cb_func)) { 136 + sync_file = sync_file_fdget(fd); 137 + if (!sync_file) 138 + return NULL; 139 + 140 + fence = fence_get(sync_file->fence); 141 + fput(sync_file->file); 142 + 143 + return fence; 144 + } 145 + EXPORT_SYMBOL(sync_file_get_fence); 146 + 147 + static int sync_file_set_fence(struct sync_file *sync_file, 148 + struct fence **fences, int num_fences) 149 + { 150 + struct fence_array *array; 151 + 152 + /* 153 + * The reference for the fences in the new sync_file and held 154 + * in add_fence() during the merge procedure, so for num_fences == 1 155 + * we already own a new reference to the fence. For num_fence > 1 156 + * we own the reference of the fence_array creation. 157 + */ 158 + if (num_fences == 1) { 159 + sync_file->fence = fences[0]; 160 + } else { 161 + array = fence_array_create(num_fences, fences, 162 + fence_context_alloc(1), 1, false); 163 + if (!array) 164 + return -ENOMEM; 165 + 166 + sync_file->fence = &array->base; 167 + } 168 + 169 + return 0; 170 + } 171 + 172 + static struct fence **get_fences(struct sync_file *sync_file, int *num_fences) 173 + { 174 + if (fence_is_array(sync_file->fence)) { 175 + struct fence_array *array = to_fence_array(sync_file->fence); 176 + 177 + *num_fences = array->num_fences; 178 + return array->fences; 179 + } 180 + 181 + *num_fences = 1; 182 + return &sync_file->fence; 183 + } 184 + 185 + static void add_fence(struct fence **fences, int *i, struct fence *fence) 186 + { 187 + fences[*i] = fence; 188 + 189 + if (!fence_is_signaled(fence)) { 125 190 fence_get(fence); 126 191 (*i)++; 127 192 } ··· 198 147 static struct sync_file *sync_file_merge(const char *name, struct sync_file *a, 199 148 struct sync_file *b) 200 149 { 201 - int num_fences = a->num_fences + b->num_fences; 202 150 struct sync_file *sync_file; 203 - int i, i_a, i_b; 204 - unsigned long size = offsetof(struct sync_file, cbs[num_fences]); 151 + struct fence **fences, **nfences, **a_fences, **b_fences; 152 + int i, i_a, i_b, num_fences, a_num_fences, b_num_fences; 205 153 206 - sync_file = sync_file_alloc(size); 154 + sync_file = sync_file_alloc(); 207 155 if (!sync_file) 208 156 return NULL; 209 157 210 - atomic_set(&sync_file->status, num_fences); 158 + a_fences = get_fences(a, &a_num_fences); 159 + b_fences = get_fences(b, &b_num_fences); 160 + if (a_num_fences > INT_MAX - b_num_fences) 161 + return NULL; 162 + 163 + num_fences = a_num_fences + b_num_fences; 164 + 165 + fences = kcalloc(num_fences, sizeof(*fences), GFP_KERNEL); 166 + if (!fences) 167 + goto err; 211 168 212 169 /* 213 170 * Assume sync_file a and b are both ordered and have no ··· 224 165 * If a sync_file can only be created with sync_file_merge 225 166 * and sync_file_create, this is a reasonable assumption. 226 167 */ 227 - for (i = i_a = i_b = 0; i_a < a->num_fences && i_b < b->num_fences; ) { 228 - struct fence *pt_a = a->cbs[i_a].fence; 229 - struct fence *pt_b = b->cbs[i_b].fence; 168 + for (i = i_a = i_b = 0; i_a < a_num_fences && i_b < b_num_fences; ) { 169 + struct fence *pt_a = a_fences[i_a]; 170 + struct fence *pt_b = b_fences[i_b]; 230 171 231 172 if (pt_a->context < pt_b->context) { 232 - sync_file_add_pt(sync_file, &i, pt_a); 173 + add_fence(fences, &i, pt_a); 233 174 234 175 i_a++; 235 176 } else if (pt_a->context > pt_b->context) { 236 - sync_file_add_pt(sync_file, &i, pt_b); 177 + add_fence(fences, &i, pt_b); 237 178 238 179 i_b++; 239 180 } else { 240 181 if (pt_a->seqno - pt_b->seqno <= INT_MAX) 241 - sync_file_add_pt(sync_file, &i, pt_a); 182 + add_fence(fences, &i, pt_a); 242 183 else 243 - sync_file_add_pt(sync_file, &i, pt_b); 184 + add_fence(fences, &i, pt_b); 244 185 245 186 i_a++; 246 187 i_b++; 247 188 } 248 189 } 249 190 250 - for (; i_a < a->num_fences; i_a++) 251 - sync_file_add_pt(sync_file, &i, a->cbs[i_a].fence); 191 + for (; i_a < a_num_fences; i_a++) 192 + add_fence(fences, &i, a_fences[i_a]); 252 193 253 - for (; i_b < b->num_fences; i_b++) 254 - sync_file_add_pt(sync_file, &i, b->cbs[i_b].fence); 194 + for (; i_b < b_num_fences; i_b++) 195 + add_fence(fences, &i, b_fences[i_b]); 255 196 256 - if (num_fences > i) 257 - atomic_sub(num_fences - i, &sync_file->status); 258 - sync_file->num_fences = i; 197 + if (i == 0) { 198 + add_fence(fences, &i, a_fences[0]); 199 + i++; 200 + } 201 + 202 + if (num_fences > i) { 203 + nfences = krealloc(fences, i * sizeof(*fences), 204 + GFP_KERNEL); 205 + if (!nfences) 206 + goto err; 207 + 208 + fences = nfences; 209 + } 210 + 211 + if (sync_file_set_fence(sync_file, fences, i) < 0) { 212 + kfree(fences); 213 + goto err; 214 + } 259 215 260 216 strlcpy(sync_file->name, name, sizeof(sync_file->name)); 261 217 return sync_file; 218 + 219 + err: 220 + fput(sync_file->file); 221 + return NULL; 222 + 262 223 } 263 224 264 225 static void sync_file_free(struct kref *kref) 265 226 { 266 227 struct sync_file *sync_file = container_of(kref, struct sync_file, 267 228 kref); 268 - int i; 269 229 270 - for (i = 0; i < sync_file->num_fences; ++i) { 271 - fence_remove_callback(sync_file->cbs[i].fence, 272 - &sync_file->cbs[i].cb); 273 - fence_put(sync_file->cbs[i].fence); 274 - } 275 - 230 + if (test_bit(POLL_ENABLED, &sync_file->fence->flags)) 231 + fence_remove_callback(sync_file->fence, &sync_file->cb); 232 + fence_put(sync_file->fence); 276 233 kfree(sync_file); 277 234 } 278 235 ··· 303 228 static unsigned int sync_file_poll(struct file *file, poll_table *wait) 304 229 { 305 230 struct sync_file *sync_file = file->private_data; 306 - int status; 307 231 308 232 poll_wait(file, &sync_file->wq, wait); 309 233 310 - status = atomic_read(&sync_file->status); 234 + if (!test_and_set_bit(POLL_ENABLED, &sync_file->fence->flags)) { 235 + if (fence_add_callback(sync_file->fence, &sync_file->cb, 236 + fence_check_cb_func) < 0) 237 + wake_up_all(&sync_file->wq); 238 + } 311 239 312 - if (!status) 313 - return POLLIN; 314 - if (status < 0) 315 - return POLLERR; 316 - return 0; 240 + return fence_is_signaled(sync_file->fence) ? POLLIN : 0; 317 241 } 318 242 319 243 static long sync_file_ioctl_merge(struct sync_file *sync_file, ··· 389 315 { 390 316 struct sync_file_info info; 391 317 struct sync_fence_info *fence_info = NULL; 318 + struct fence **fences; 392 319 __u32 size; 393 - int ret, i; 320 + int num_fences, ret, i; 394 321 395 322 if (copy_from_user(&info, (void __user *)arg, sizeof(info))) 396 323 return -EFAULT; 397 324 398 325 if (info.flags || info.pad) 399 326 return -EINVAL; 327 + 328 + fences = get_fences(sync_file, &num_fences); 400 329 401 330 /* 402 331 * Passing num_fences = 0 means that userspace doesn't want to ··· 410 333 if (!info.num_fences) 411 334 goto no_fences; 412 335 413 - if (info.num_fences < sync_file->num_fences) 336 + if (info.num_fences < num_fences) 414 337 return -EINVAL; 415 338 416 - size = sync_file->num_fences * sizeof(*fence_info); 339 + size = num_fences * sizeof(*fence_info); 417 340 fence_info = kzalloc(size, GFP_KERNEL); 418 341 if (!fence_info) 419 342 return -ENOMEM; 420 343 421 - for (i = 0; i < sync_file->num_fences; ++i) 422 - sync_fill_fence_info(sync_file->cbs[i].fence, &fence_info[i]); 344 + for (i = 0; i < num_fences; i++) 345 + sync_fill_fence_info(fences[i], &fence_info[i]); 423 346 424 347 if (copy_to_user(u64_to_user_ptr(info.sync_fence_info), fence_info, 425 348 size)) { ··· 429 352 430 353 no_fences: 431 354 strlcpy(info.name, sync_file->name, sizeof(info.name)); 432 - info.status = atomic_read(&sync_file->status); 433 - if (info.status >= 0) 434 - info.status = !info.status; 435 - 436 - info.num_fences = sync_file->num_fences; 355 + info.status = fence_is_signaled(sync_file->fence); 356 + info.num_fences = num_fences; 437 357 438 358 if (copy_to_user((void __user *)arg, &info, sizeof(info))) 439 359 ret = -EFAULT;
-8
drivers/gpu/drm/Kconfig
··· 129 129 config DRM_RADEON 130 130 tristate "ATI Radeon" 131 131 depends on DRM && PCI 132 - select FB_CFB_FILLRECT 133 - select FB_CFB_COPYAREA 134 - select FB_CFB_IMAGEBLIT 135 132 select FW_LOADER 136 133 select DRM_KMS_HELPER 137 - select DRM_KMS_FB_HELPER 138 134 select DRM_TTM 139 135 select POWER_SUPPLY 140 136 select HWMON ··· 149 153 config DRM_AMDGPU 150 154 tristate "AMD GPU" 151 155 depends on DRM && PCI 152 - select FB_CFB_FILLRECT 153 - select FB_CFB_COPYAREA 154 - select FB_CFB_IMAGEBLIT 155 156 select FW_LOADER 156 157 select DRM_KMS_HELPER 157 - select DRM_KMS_FB_HELPER 158 158 select DRM_TTM 159 159 select POWER_SUPPLY 160 160 select HWMON
+1 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
··· 341 341 #ifdef CONFIG_X86 342 342 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 343 343 #endif 344 - remove_conflicting_framebuffers(ap, "amdgpudrmfb", primary); 344 + drm_fb_helper_remove_conflicting_framebuffers(ap, "amdgpudrmfb", primary); 345 345 kfree(ap); 346 346 347 347 return 0;
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
··· 25 25 */ 26 26 #include <linux/module.h> 27 27 #include <linux/slab.h> 28 - #include <linux/fb.h> 29 28 30 29 #include <drm/drmP.h> 31 30 #include <drm/drm_crtc.h>
-1
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
··· 22 22 */ 23 23 #include <linux/module.h> 24 24 #include <linux/slab.h> 25 - #include <linux/fb.h> 26 25 #include "linux/delay.h" 27 26 28 27 #include "hwmgr.h"
-1
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
··· 22 22 */ 23 23 #include <linux/module.h> 24 24 #include <linux/slab.h> 25 - #include <linux/fb.h> 26 25 #include <asm/div64.h> 27 26 #include "linux/delay.h" 28 27 #include "pp_acpi.h"
-1
drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c
··· 22 22 */ 23 23 #include <linux/module.h> 24 24 #include <linux/slab.h> 25 - #include <linux/fb.h> 26 25 27 26 #include "ppatomctrl.h" 28 27 #include "atombios.h"
-1
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
··· 22 22 */ 23 23 #include <linux/module.h> 24 24 #include <linux/slab.h> 25 - #include <linux/fb.h> 26 25 #include "linux/delay.h" 27 26 #include "pp_acpi.h" 28 27 #include "hwmgr.h"
-1
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c
··· 22 22 */ 23 23 #include <linux/module.h> 24 24 #include <linux/slab.h> 25 - #include <linux/fb.h> 26 25 27 26 #include "tonga_processpptables.h" 28 27 #include "ppatomctrl.h"
+1 -1
drivers/gpu/drm/arm/malidp_drv.h
··· 49 49 int malidp_crtc_init(struct drm_device *drm); 50 50 51 51 /* often used combination of rotational bits */ 52 - #define MALIDP_ROTATED_MASK (BIT(DRM_ROTATE_90) | BIT(DRM_ROTATE_270)) 52 + #define MALIDP_ROTATED_MASK (DRM_ROTATE_90 | DRM_ROTATE_270) 53 53 54 54 #endif /* __MALIDP_DRV_H__ */
+10 -10
drivers/gpu/drm/arm/malidp_planes.c
··· 108 108 return -EINVAL; 109 109 110 110 /* packed RGB888 / BGR888 can't be rotated or flipped */ 111 - if (state->rotation != BIT(DRM_ROTATE_0) && 111 + if (state->rotation != DRM_ROTATE_0 && 112 112 (state->fb->pixel_format == DRM_FORMAT_RGB888 || 113 113 state->fb->pixel_format == DRM_FORMAT_BGR888)) 114 114 return -EINVAL; ··· 188 188 /* setup the rotation and axis flip bits */ 189 189 if (plane->state->rotation & DRM_ROTATE_MASK) 190 190 val = ilog2(plane->state->rotation & DRM_ROTATE_MASK) << LAYER_ROT_OFFSET; 191 - if (plane->state->rotation & BIT(DRM_REFLECT_X)) 191 + if (plane->state->rotation & DRM_REFLECT_X) 192 192 val |= LAYER_V_FLIP; 193 - if (plane->state->rotation & BIT(DRM_REFLECT_Y)) 193 + if (plane->state->rotation & DRM_REFLECT_Y) 194 194 val |= LAYER_H_FLIP; 195 195 196 196 /* set the 'enable layer' bit */ ··· 255 255 goto cleanup; 256 256 257 257 if (!drm->mode_config.rotation_property) { 258 - unsigned long flags = BIT(DRM_ROTATE_0) | 259 - BIT(DRM_ROTATE_90) | 260 - BIT(DRM_ROTATE_180) | 261 - BIT(DRM_ROTATE_270) | 262 - BIT(DRM_REFLECT_X) | 263 - BIT(DRM_REFLECT_Y); 258 + unsigned long flags = DRM_ROTATE_0 | 259 + DRM_ROTATE_90 | 260 + DRM_ROTATE_180 | 261 + DRM_ROTATE_270 | 262 + DRM_REFLECT_X | 263 + DRM_REFLECT_Y; 264 264 drm->mode_config.rotation_property = 265 265 drm_mode_create_rotation_property(drm, flags); 266 266 } ··· 268 268 if (drm->mode_config.rotation_property && (id != DE_SMART)) 269 269 drm_object_attach_property(&plane->base.base, 270 270 drm->mode_config.rotation_property, 271 - BIT(DRM_ROTATE_0)); 271 + DRM_ROTATE_0); 272 272 273 273 drm_plane_helper_add(&plane->base, 274 274 &malidp_de_plane_helper_funcs);
-1
drivers/gpu/drm/armada/armada_fbdev.c
··· 7 7 * published by the Free Software Foundation. 8 8 */ 9 9 #include <linux/errno.h> 10 - #include <linux/fb.h> 11 10 #include <linux/kernel.h> 12 11 #include <linux/module.h> 13 12
+1 -1
drivers/gpu/drm/armada/armada_overlay.c
··· 121 121 int ret; 122 122 123 123 ret = drm_plane_helper_check_update(plane, crtc, fb, &src, &dest, &clip, 124 - BIT(DRM_ROTATE_0), 124 + DRM_ROTATE_0, 125 125 0, INT_MAX, true, false, &visible); 126 126 if (ret) 127 127 return ret;
-1
drivers/gpu/drm/ast/ast_fb.c
··· 33 33 #include <linux/tty.h> 34 34 #include <linux/sysrq.h> 35 35 #include <linux/delay.h> 36 - #include <linux/fb.h> 37 36 #include <linux/init.h> 38 37 39 38
+11 -11
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
··· 393 393 394 394 if ((state->base.fb->pixel_format == DRM_FORMAT_YUV422 || 395 395 state->base.fb->pixel_format == DRM_FORMAT_NV61) && 396 - (state->base.rotation & (BIT(DRM_ROTATE_90) | BIT(DRM_ROTATE_270)))) 396 + (state->base.rotation & (DRM_ROTATE_90 | DRM_ROTATE_270))) 397 397 cfg |= ATMEL_HLCDC_YUV422ROT; 398 398 399 399 atmel_hlcdc_layer_update_cfg(&plane->layer, ··· 628 628 /* 629 629 * Swap width and size in case of 90 or 270 degrees rotation 630 630 */ 631 - if (state->base.rotation & (BIT(DRM_ROTATE_90) | BIT(DRM_ROTATE_270))) { 631 + if (state->base.rotation & (DRM_ROTATE_90 | DRM_ROTATE_270)) { 632 632 tmp = state->crtc_w; 633 633 state->crtc_w = state->crtc_h; 634 634 state->crtc_h = tmp; ··· 677 677 return -EINVAL; 678 678 679 679 switch (state->base.rotation & DRM_ROTATE_MASK) { 680 - case BIT(DRM_ROTATE_90): 680 + case DRM_ROTATE_90: 681 681 offset = ((y_offset + state->src_y + patched_src_w - 1) / 682 682 ydiv) * fb->pitches[i]; 683 683 offset += ((x_offset + state->src_x) / xdiv) * ··· 686 686 fb->pitches[i]; 687 687 state->pstride[i] = -fb->pitches[i] - state->bpp[i]; 688 688 break; 689 - case BIT(DRM_ROTATE_180): 689 + case DRM_ROTATE_180: 690 690 offset = ((y_offset + state->src_y + patched_src_h - 1) / 691 691 ydiv) * fb->pitches[i]; 692 692 offset += ((x_offset + state->src_x + patched_src_w - 1) / ··· 695 695 state->bpp[i]) - fb->pitches[i]; 696 696 state->pstride[i] = -2 * state->bpp[i]; 697 697 break; 698 - case BIT(DRM_ROTATE_270): 698 + case DRM_ROTATE_270: 699 699 offset = ((y_offset + state->src_y) / ydiv) * 700 700 fb->pitches[i]; 701 701 offset += ((x_offset + state->src_x + patched_src_h - 1) / ··· 705 705 (2 * state->bpp[i]); 706 706 state->pstride[i] = fb->pitches[i] - state->bpp[i]; 707 707 break; 708 - case BIT(DRM_ROTATE_0): 708 + case DRM_ROTATE_0: 709 709 default: 710 710 offset = ((y_offset + state->src_y) / ydiv) * 711 711 fb->pitches[i]; ··· 905 905 if (desc->layout.xstride && desc->layout.pstride) 906 906 drm_object_attach_property(&plane->base.base, 907 907 plane->base.dev->mode_config.rotation_property, 908 - BIT(DRM_ROTATE_0)); 908 + DRM_ROTATE_0); 909 909 910 910 if (desc->layout.csc) { 911 911 /* ··· 1056 1056 1057 1057 dev->mode_config.rotation_property = 1058 1058 drm_mode_create_rotation_property(dev, 1059 - BIT(DRM_ROTATE_0) | 1060 - BIT(DRM_ROTATE_90) | 1061 - BIT(DRM_ROTATE_180) | 1062 - BIT(DRM_ROTATE_270)); 1059 + DRM_ROTATE_0 | 1060 + DRM_ROTATE_90 | 1061 + DRM_ROTATE_180 | 1062 + DRM_ROTATE_270); 1063 1063 if (!dev->mode_config.rotation_property) 1064 1064 return ERR_PTR(-ENOMEM); 1065 1065
-1
drivers/gpu/drm/bochs/bochs.h
··· 1 1 #include <linux/io.h> 2 - #include <linux/fb.h> 3 2 #include <linux/console.h> 4 3 5 4 #include <drm/drmP.h>
+2 -1
drivers/gpu/drm/bochs/bochs_drv.c
··· 8 8 #include <linux/mm.h> 9 9 #include <linux/module.h> 10 10 #include <linux/slab.h> 11 + #include <drm/drm_fb_helper.h> 11 12 12 13 #include "bochs.h" 13 14 ··· 154 153 155 154 ap->ranges[0].base = pci_resource_start(pdev, 0); 156 155 ap->ranges[0].size = pci_resource_len(pdev, 0); 157 - remove_conflicting_framebuffers(ap, "bochsdrmfb", false); 156 + drm_fb_helper_remove_conflicting_framebuffers(ap, "bochsdrmfb", false); 158 157 kfree(ap); 159 158 160 159 return 0;
-1
drivers/gpu/drm/bridge/parade-ps8622.c
··· 16 16 #include <linux/backlight.h> 17 17 #include <linux/delay.h> 18 18 #include <linux/err.h> 19 - #include <linux/fb.h> 20 19 #include <linux/gpio.h> 21 20 #include <linux/gpio/consumer.h> 22 21 #include <linux/i2c.h>
+1 -1
drivers/gpu/drm/cirrus/cirrus_drv.c
··· 57 57 #ifdef CONFIG_X86 58 58 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 59 59 #endif 60 - remove_conflicting_framebuffers(ap, "cirrusdrmfb", primary); 60 + drm_fb_helper_remove_conflicting_framebuffers(ap, "cirrusdrmfb", primary); 61 61 kfree(ap); 62 62 63 63 return 0;
-2
drivers/gpu/drm/cirrus/cirrus_fbdev.c
··· 13 13 #include <drm/drm_fb_helper.h> 14 14 #include <drm/drm_crtc_helper.h> 15 15 16 - #include <linux/fb.h> 17 - 18 16 #include "cirrus_drv.h" 19 17 20 18 static void cirrus_dirty_update(struct cirrus_fbdev *afbdev,
+2 -4
drivers/gpu/drm/drm_agpsupport.c
··· 430 430 * intact so it can still be used. It is safe to call this if AGP is disabled or 431 431 * was already removed. 432 432 * 433 - * If DRIVER_MODESET is active, nothing is done to protect the modesetting 434 - * resources from getting destroyed. Drivers are responsible of cleaning them up 435 - * during device shutdown. 433 + * Cleanup is only done for drivers who have DRIVER_LEGACY set. 436 434 */ 437 435 void drm_legacy_agp_clear(struct drm_device *dev) 438 436 { ··· 438 440 439 441 if (!dev->agp) 440 442 return; 441 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 443 + if (!drm_core_check_feature(dev, DRIVER_LEGACY)) 442 444 return; 443 445 444 446 list_for_each_entry_safe(entry, tempe, &dev->agp->memory, head) {
+11 -3
drivers/gpu/drm/drm_atomic_helper.c
··· 1635 1635 1636 1636 funcs = plane->helper_private; 1637 1637 1638 + if (!drm_atomic_helper_framebuffer_changed(dev, state, plane_state->crtc)) 1639 + continue; 1640 + 1638 1641 if (funcs->prepare_fb) { 1639 1642 ret = funcs->prepare_fb(plane, plane_state); 1640 1643 if (ret) ··· 1654 1651 if (j >= i) 1655 1652 continue; 1656 1653 1654 + if (!drm_atomic_helper_framebuffer_changed(dev, state, plane_state->crtc)) 1655 + continue; 1656 + 1657 1657 funcs = plane->helper_private; 1658 1658 1659 1659 if (funcs->cleanup_fb) 1660 1660 funcs->cleanup_fb(plane, plane_state); 1661 - 1662 1661 } 1663 1662 1664 1663 return ret; ··· 1902 1897 1903 1898 for_each_plane_in_state(old_state, plane, plane_state, i) { 1904 1899 const struct drm_plane_helper_funcs *funcs; 1900 + 1901 + if (!drm_atomic_helper_framebuffer_changed(dev, old_state, plane_state->crtc)) 1902 + continue; 1905 1903 1906 1904 funcs = plane->helper_private; 1907 1905 ··· 2366 2358 primary_state->crtc_h = vdisplay; 2367 2359 primary_state->src_x = set->x << 16; 2368 2360 primary_state->src_y = set->y << 16; 2369 - if (primary_state->rotation & (BIT(DRM_ROTATE_90) | BIT(DRM_ROTATE_270))) { 2361 + if (primary_state->rotation & (DRM_ROTATE_90 | DRM_ROTATE_270)) { 2370 2362 primary_state->src_w = vdisplay << 16; 2371 2363 primary_state->src_h = hdisplay << 16; 2372 2364 } else { ··· 3051 3043 3052 3044 if (plane->state) { 3053 3045 plane->state->plane = plane; 3054 - plane->state->rotation = BIT(DRM_ROTATE_0); 3046 + plane->state->rotation = DRM_ROTATE_0; 3055 3047 } 3056 3048 } 3057 3049 EXPORT_SYMBOL(drm_atomic_helper_plane_reset);
+1 -1
drivers/gpu/drm/drm_auth.c
··· 251 251 if (!drm_is_current_master(file_priv)) 252 252 goto out; 253 253 254 - if (!drm_core_check_feature(dev, DRIVER_MODESET)) { 254 + if (drm_core_check_feature(dev, DRIVER_LEGACY)) { 255 255 /* 256 256 * Since the master is disappearing, so is the 257 257 * possibility to lock.
+11 -11
drivers/gpu/drm/drm_bufs.c
··· 397 397 return -EPERM; 398 398 399 399 if (!drm_core_check_feature(dev, DRIVER_KMS_LEGACY_CONTEXT) && 400 - drm_core_check_feature(dev, DRIVER_MODESET)) 400 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 401 401 return -EINVAL; 402 402 403 403 err = drm_addmap_core(dev, map->offset, map->size, map->type, ··· 443 443 int i; 444 444 445 445 if (!drm_core_check_feature(dev, DRIVER_KMS_LEGACY_CONTEXT) && 446 - drm_core_check_feature(dev, DRIVER_MODESET)) 446 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 447 447 return -EINVAL; 448 448 449 449 idx = map->offset; ··· 545 545 void drm_legacy_rmmap(struct drm_device *dev, struct drm_local_map *map) 546 546 { 547 547 if (!drm_core_check_feature(dev, DRIVER_KMS_LEGACY_CONTEXT) && 548 - drm_core_check_feature(dev, DRIVER_MODESET)) 548 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 549 549 return; 550 550 551 551 mutex_lock(&dev->struct_mutex); ··· 558 558 { 559 559 struct drm_map_list *r_list, *list_temp; 560 560 561 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 561 + if (!drm_core_check_feature(dev, DRIVER_LEGACY)) 562 562 return; 563 563 564 564 mutex_lock(&dev->struct_mutex); ··· 595 595 int ret; 596 596 597 597 if (!drm_core_check_feature(dev, DRIVER_KMS_LEGACY_CONTEXT) && 598 - drm_core_check_feature(dev, DRIVER_MODESET)) 598 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 599 599 return -EINVAL; 600 600 601 601 mutex_lock(&dev->struct_mutex); ··· 1220 1220 struct drm_buf_desc *request = data; 1221 1221 int ret; 1222 1222 1223 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 1223 + if (!drm_core_check_feature(dev, DRIVER_LEGACY)) 1224 1224 return -EINVAL; 1225 1225 1226 1226 if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA)) ··· 1266 1266 int i; 1267 1267 int count; 1268 1268 1269 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 1269 + if (!drm_core_check_feature(dev, DRIVER_LEGACY)) 1270 1270 return -EINVAL; 1271 1271 1272 1272 if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA)) ··· 1347 1347 int order; 1348 1348 struct drm_buf_entry *entry; 1349 1349 1350 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 1350 + if (!drm_core_check_feature(dev, DRIVER_LEGACY)) 1351 1351 return -EINVAL; 1352 1352 1353 1353 if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA)) ··· 1395 1395 int idx; 1396 1396 struct drm_buf *buf; 1397 1397 1398 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 1398 + if (!drm_core_check_feature(dev, DRIVER_LEGACY)) 1399 1399 return -EINVAL; 1400 1400 1401 1401 if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA)) ··· 1450 1450 struct drm_buf_map *request = data; 1451 1451 int i; 1452 1452 1453 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 1453 + if (!drm_core_check_feature(dev, DRIVER_LEGACY)) 1454 1454 return -EINVAL; 1455 1455 1456 1456 if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA)) ··· 1530 1530 int drm_legacy_dma_ioctl(struct drm_device *dev, void *data, 1531 1531 struct drm_file *file_priv) 1532 1532 { 1533 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 1533 + if (!drm_core_check_feature(dev, DRIVER_LEGACY)) 1534 1534 return -EINVAL; 1535 1535 1536 1536 if (dev->driver->dma_ioctl)
+12 -12
drivers/gpu/drm/drm_context.c
··· 54 54 void drm_legacy_ctxbitmap_free(struct drm_device * dev, int ctx_handle) 55 55 { 56 56 if (!drm_core_check_feature(dev, DRIVER_KMS_LEGACY_CONTEXT) && 57 - drm_core_check_feature(dev, DRIVER_MODESET)) 57 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 58 58 return; 59 59 60 60 mutex_lock(&dev->struct_mutex); ··· 92 92 void drm_legacy_ctxbitmap_init(struct drm_device * dev) 93 93 { 94 94 if (!drm_core_check_feature(dev, DRIVER_KMS_LEGACY_CONTEXT) && 95 - drm_core_check_feature(dev, DRIVER_MODESET)) 95 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 96 96 return; 97 97 98 98 idr_init(&dev->ctx_idr); ··· 109 109 void drm_legacy_ctxbitmap_cleanup(struct drm_device * dev) 110 110 { 111 111 if (!drm_core_check_feature(dev, DRIVER_KMS_LEGACY_CONTEXT) && 112 - drm_core_check_feature(dev, DRIVER_MODESET)) 112 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 113 113 return; 114 114 115 115 mutex_lock(&dev->struct_mutex); ··· 131 131 struct drm_ctx_list *pos, *tmp; 132 132 133 133 if (!drm_core_check_feature(dev, DRIVER_KMS_LEGACY_CONTEXT) && 134 - drm_core_check_feature(dev, DRIVER_MODESET)) 134 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 135 135 return; 136 136 137 137 mutex_lock(&dev->ctxlist_mutex); ··· 177 177 struct drm_map_list *_entry; 178 178 179 179 if (!drm_core_check_feature(dev, DRIVER_KMS_LEGACY_CONTEXT) && 180 - drm_core_check_feature(dev, DRIVER_MODESET)) 180 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 181 181 return -EINVAL; 182 182 183 183 mutex_lock(&dev->struct_mutex); ··· 225 225 struct drm_map_list *r_list = NULL; 226 226 227 227 if (!drm_core_check_feature(dev, DRIVER_KMS_LEGACY_CONTEXT) && 228 - drm_core_check_feature(dev, DRIVER_MODESET)) 228 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 229 229 return -EINVAL; 230 230 231 231 mutex_lock(&dev->struct_mutex); ··· 329 329 int i; 330 330 331 331 if (!drm_core_check_feature(dev, DRIVER_KMS_LEGACY_CONTEXT) && 332 - drm_core_check_feature(dev, DRIVER_MODESET)) 332 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 333 333 return -EINVAL; 334 334 335 335 if (res->count >= DRM_RESERVED_CONTEXTS) { ··· 363 363 struct drm_ctx *ctx = data; 364 364 365 365 if (!drm_core_check_feature(dev, DRIVER_KMS_LEGACY_CONTEXT) && 366 - drm_core_check_feature(dev, DRIVER_MODESET)) 366 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 367 367 return -EINVAL; 368 368 369 369 ctx->handle = drm_legacy_ctxbitmap_next(dev); ··· 410 410 struct drm_ctx *ctx = data; 411 411 412 412 if (!drm_core_check_feature(dev, DRIVER_KMS_LEGACY_CONTEXT) && 413 - drm_core_check_feature(dev, DRIVER_MODESET)) 413 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 414 414 return -EINVAL; 415 415 416 416 /* This is 0, because we don't handle any context flags */ ··· 436 436 struct drm_ctx *ctx = data; 437 437 438 438 if (!drm_core_check_feature(dev, DRIVER_KMS_LEGACY_CONTEXT) && 439 - drm_core_check_feature(dev, DRIVER_MODESET)) 439 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 440 440 return -EINVAL; 441 441 442 442 DRM_DEBUG("%d\n", ctx->handle); ··· 460 460 struct drm_ctx *ctx = data; 461 461 462 462 if (!drm_core_check_feature(dev, DRIVER_KMS_LEGACY_CONTEXT) && 463 - drm_core_check_feature(dev, DRIVER_MODESET)) 463 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 464 464 return -EINVAL; 465 465 466 466 DRM_DEBUG("%d\n", ctx->handle); ··· 486 486 struct drm_ctx *ctx = data; 487 487 488 488 if (!drm_core_check_feature(dev, DRIVER_KMS_LEGACY_CONTEXT) && 489 - drm_core_check_feature(dev, DRIVER_MODESET)) 489 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 490 490 return -EINVAL; 491 491 492 492 DRM_DEBUG("%d\n", ctx->handle);
+12 -12
drivers/gpu/drm/drm_crtc.c
··· 2802 2802 drm_crtc_get_hv_timing(mode, &hdisplay, &vdisplay); 2803 2803 2804 2804 if (crtc->state && 2805 - crtc->primary->state->rotation & (BIT(DRM_ROTATE_90) | 2806 - BIT(DRM_ROTATE_270))) 2805 + crtc->primary->state->rotation & (DRM_ROTATE_90 | 2806 + DRM_ROTATE_270)) 2807 2807 swap(hdisplay, vdisplay); 2808 2808 2809 2809 return check_src_coords(x << 16, y << 16, ··· 5644 5644 * Eg. if the hardware supports everything except DRM_REFLECT_X 5645 5645 * one could call this function like this: 5646 5646 * 5647 - * drm_rotation_simplify(rotation, BIT(DRM_ROTATE_0) | 5648 - * BIT(DRM_ROTATE_90) | BIT(DRM_ROTATE_180) | 5649 - * BIT(DRM_ROTATE_270) | BIT(DRM_REFLECT_Y)); 5647 + * drm_rotation_simplify(rotation, DRM_ROTATE_0 | 5648 + * DRM_ROTATE_90 | DRM_ROTATE_180 | 5649 + * DRM_ROTATE_270 | DRM_REFLECT_Y); 5650 5650 * 5651 5651 * to eliminate the DRM_ROTATE_X flag. Depending on what kind of 5652 5652 * transforms the hardware supports, this function may not ··· 5657 5657 unsigned int supported_rotations) 5658 5658 { 5659 5659 if (rotation & ~supported_rotations) { 5660 - rotation ^= BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y); 5660 + rotation ^= DRM_REFLECT_X | DRM_REFLECT_Y; 5661 5661 rotation = (rotation & DRM_REFLECT_MASK) | 5662 5662 BIT((ffs(rotation & DRM_ROTATE_MASK) + 1) % 4); 5663 5663 } ··· 5786 5786 unsigned int supported_rotations) 5787 5787 { 5788 5788 static const struct drm_prop_enum_list props[] = { 5789 - { DRM_ROTATE_0, "rotate-0" }, 5790 - { DRM_ROTATE_90, "rotate-90" }, 5791 - { DRM_ROTATE_180, "rotate-180" }, 5792 - { DRM_ROTATE_270, "rotate-270" }, 5793 - { DRM_REFLECT_X, "reflect-x" }, 5794 - { DRM_REFLECT_Y, "reflect-y" }, 5789 + { __builtin_ffs(DRM_ROTATE_0) - 1, "rotate-0" }, 5790 + { __builtin_ffs(DRM_ROTATE_90) - 1, "rotate-90" }, 5791 + { __builtin_ffs(DRM_ROTATE_180) - 1, "rotate-180" }, 5792 + { __builtin_ffs(DRM_ROTATE_270) - 1, "rotate-270" }, 5793 + { __builtin_ffs(DRM_REFLECT_X) - 1, "reflect-x" }, 5794 + { __builtin_ffs(DRM_REFLECT_Y) - 1, "reflect-y" }, 5795 5795 }; 5796 5796 5797 5797 return drm_property_create_bitmask(dev, 0, "rotation",
+2 -4
drivers/gpu/drm/drm_dma.c
··· 50 50 int i; 51 51 52 52 if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA) || 53 - drm_core_check_feature(dev, DRIVER_MODESET)) { 53 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 54 54 return 0; 55 - } 56 55 57 56 dev->buf_use = 0; 58 57 atomic_set(&dev->buf_alloc, 0); ··· 80 81 int i, j; 81 82 82 83 if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA) || 83 - drm_core_check_feature(dev, DRIVER_MODESET)) { 84 + !drm_core_check_feature(dev, DRIVER_LEGACY)) 84 85 return; 85 - } 86 86 87 87 if (!dma) 88 88 return;
+12 -2
drivers/gpu/drm/drm_dp_helper.c
··· 223 223 err = ret; 224 224 } 225 225 226 - DRM_DEBUG_KMS("too many retries, giving up\n"); 226 + DRM_DEBUG_KMS("Too many retries, giving up. First error: %d\n", err); 227 227 ret = err; 228 228 229 229 unlock: ··· 574 574 if (ret == -EBUSY) 575 575 continue; 576 576 577 - DRM_DEBUG_KMS("transaction failed: %d\n", ret); 577 + /* 578 + * While timeouts can be errors, they're usually normal 579 + * behavior (for instance, when a driver tries to 580 + * communicate with a non-existant DisplayPort device). 581 + * Avoid spamming the kernel log with timeout errors. 582 + */ 583 + if (ret == -ETIMEDOUT) 584 + DRM_DEBUG_KMS_RATELIMITED("transaction timed out\n"); 585 + else 586 + DRM_DEBUG_KMS("transaction failed: %d\n", ret); 587 + 578 588 return ret; 579 589 } 580 590
+7 -7
drivers/gpu/drm/drm_drv.c
··· 112 112 unsigned int type) 113 113 { 114 114 switch (type) { 115 - case DRM_MINOR_LEGACY: 115 + case DRM_MINOR_PRIMARY: 116 116 return &dev->primary; 117 117 case DRM_MINOR_RENDER: 118 118 return &dev->render; ··· 512 512 goto err_minors; 513 513 } 514 514 515 - ret = drm_minor_alloc(dev, DRM_MINOR_LEGACY); 515 + ret = drm_minor_alloc(dev, DRM_MINOR_PRIMARY); 516 516 if (ret) 517 517 goto err_minors; 518 518 ··· 545 545 drm_legacy_ctxbitmap_cleanup(dev); 546 546 drm_ht_remove(&dev->map_hash); 547 547 err_minors: 548 - drm_minor_free(dev, DRM_MINOR_LEGACY); 548 + drm_minor_free(dev, DRM_MINOR_PRIMARY); 549 549 drm_minor_free(dev, DRM_MINOR_RENDER); 550 550 drm_minor_free(dev, DRM_MINOR_CONTROL); 551 551 drm_fs_inode_free(dev->anon_inode); ··· 608 608 drm_ht_remove(&dev->map_hash); 609 609 drm_fs_inode_free(dev->anon_inode); 610 610 611 - drm_minor_free(dev, DRM_MINOR_LEGACY); 611 + drm_minor_free(dev, DRM_MINOR_PRIMARY); 612 612 drm_minor_free(dev, DRM_MINOR_RENDER); 613 613 drm_minor_free(dev, DRM_MINOR_CONTROL); 614 614 ··· 684 684 if (ret) 685 685 goto err_minors; 686 686 687 - ret = drm_minor_register(dev, DRM_MINOR_LEGACY); 687 + ret = drm_minor_register(dev, DRM_MINOR_PRIMARY); 688 688 if (ret) 689 689 goto err_minors; 690 690 ··· 701 701 goto out_unlock; 702 702 703 703 err_minors: 704 - drm_minor_unregister(dev, DRM_MINOR_LEGACY); 704 + drm_minor_unregister(dev, DRM_MINOR_PRIMARY); 705 705 drm_minor_unregister(dev, DRM_MINOR_RENDER); 706 706 drm_minor_unregister(dev, DRM_MINOR_CONTROL); 707 707 out_unlock: ··· 741 741 list_for_each_entry_safe(r_list, list_temp, &dev->maplist, head) 742 742 drm_legacy_rmmap(dev, r_list->map); 743 743 744 - drm_minor_unregister(dev, DRM_MINOR_LEGACY); 744 + drm_minor_unregister(dev, DRM_MINOR_PRIMARY); 745 745 drm_minor_unregister(dev, DRM_MINOR_RENDER); 746 746 drm_minor_unregister(dev, DRM_MINOR_CONTROL); 747 747 }
+2 -3
drivers/gpu/drm/drm_fb_helper.c
··· 32 32 #include <linux/kernel.h> 33 33 #include <linux/sysrq.h> 34 34 #include <linux/slab.h> 35 - #include <linux/fb.h> 36 35 #include <linux/module.h> 37 36 #include <drm/drmP.h> 38 37 #include <drm/drm_crtc.h> ··· 334 335 goto fail; 335 336 } 336 337 337 - plane_state->rotation = BIT(DRM_ROTATE_0); 338 + plane_state->rotation = DRM_ROTATE_0; 338 339 339 340 plane->old_fb = plane->fb; 340 341 plane_mask |= 1 << drm_plane_index(plane); ··· 394 395 if (dev->mode_config.rotation_property) { 395 396 drm_mode_plane_set_obj_prop(plane, 396 397 dev->mode_config.rotation_property, 397 - BIT(DRM_ROTATE_0)); 398 + DRM_ROTATE_0); 398 399 } 399 400 } 400 401
+3 -3
drivers/gpu/drm/drm_fops.c
··· 92 92 int ret; 93 93 94 94 if (dev->driver->firstopen && 95 - !drm_core_check_feature(dev, DRIVER_MODESET)) { 95 + drm_core_check_feature(dev, DRIVER_LEGACY)) { 96 96 ret = dev->driver->firstopen(dev); 97 97 if (ret != 0) 98 98 return ret; ··· 346 346 dev->driver->lastclose(dev); 347 347 DRM_DEBUG("driver lastclose completed\n"); 348 348 349 - if (!drm_core_check_feature(dev, DRIVER_MODESET)) 349 + if (drm_core_check_feature(dev, DRIVER_LEGACY)) 350 350 drm_legacy_dev_reinit(dev); 351 351 } 352 352 ··· 389 389 (long)old_encode_dev(file_priv->minor->kdev->devt), 390 390 dev->open_count); 391 391 392 - if (!drm_core_check_feature(dev, DRIVER_MODESET)) 392 + if (drm_core_check_feature(dev, DRIVER_LEGACY)) 393 393 drm_legacy_lock_release(dev, filp); 394 394 395 395 if (drm_core_check_feature(dev, DRIVER_HAVE_DMA))
+2 -2
drivers/gpu/drm/drm_ioctl.c
··· 714 714 if (ksize > in_size) 715 715 memset(kdata + in_size, 0, ksize - in_size); 716 716 717 - /* Enforce sane locking for kms driver ioctls. Core ioctls are 717 + /* Enforce sane locking for modern driver ioctls. Core ioctls are 718 718 * too messy still. */ 719 - if ((drm_core_check_feature(dev, DRIVER_MODESET) && is_driver_ioctl) || 719 + if ((!drm_core_check_feature(dev, DRIVER_LEGACY) && is_driver_ioctl) || 720 720 (ioctl->flags & DRM_UNLOCKED)) 721 721 retcode = func(dev, kdata, file_priv); 722 722 else {
+11 -10
drivers/gpu/drm/drm_irq.c
··· 482 482 return ret; 483 483 } 484 484 485 - if (!drm_core_check_feature(dev, DRIVER_MODESET)) 485 + if (drm_core_check_feature(dev, DRIVER_LEGACY)) 486 486 vga_client_register(dev->pdev, (void *)dev, drm_irq_vgaarb_nokms, NULL); 487 487 488 488 /* After installing handler */ ··· 491 491 492 492 if (ret < 0) { 493 493 dev->irq_enabled = false; 494 - if (!drm_core_check_feature(dev, DRIVER_MODESET)) 494 + if (drm_core_check_feature(dev, DRIVER_LEGACY)) 495 495 vga_client_register(dev->pdev, NULL, NULL, NULL); 496 496 free_irq(irq, dev); 497 497 } else { ··· 557 557 558 558 DRM_DEBUG("irq=%d\n", dev->irq); 559 559 560 - if (!drm_core_check_feature(dev, DRIVER_MODESET)) 560 + if (drm_core_check_feature(dev, DRIVER_LEGACY)) 561 561 vga_client_register(dev->pdev, NULL, NULL, NULL); 562 562 563 563 if (dev->driver->irq_uninstall) ··· 592 592 593 593 if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ)) 594 594 return 0; 595 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 595 + if (!drm_core_check_feature(dev, DRIVER_LEGACY)) 596 596 return 0; 597 597 /* UMS was only ever supported on pci devices. */ 598 598 if (WARN_ON(!dev->pdev)) ··· 1295 1295 if (e->pipe != pipe) 1296 1296 continue; 1297 1297 DRM_DEBUG("Sending premature vblank event on disable: " 1298 - "wanted %d, current %d\n", 1298 + "wanted %u, current %u\n", 1299 1299 e->event.sequence, seq); 1300 1300 list_del(&e->base.link); 1301 1301 drm_vblank_put(dev, pipe); ··· 1519 1519 return 0; 1520 1520 1521 1521 /* KMS drivers handle this internally */ 1522 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 1522 + if (!drm_core_check_feature(dev, DRIVER_LEGACY)) 1523 1523 return 0; 1524 1524 1525 1525 pipe = modeset->crtc; ··· 1585 1585 1586 1586 seq = drm_vblank_count_and_time(dev, pipe, &now); 1587 1587 1588 - DRM_DEBUG("event on vblank count %d, current %d, crtc %u\n", 1588 + DRM_DEBUG("event on vblank count %u, current %u, crtc %u\n", 1589 1589 vblwait->request.sequence, seq, pipe); 1590 1590 1591 1591 trace_drm_vblank_event_queued(current->pid, pipe, ··· 1693 1693 return drm_queue_vblank_event(dev, pipe, vblwait, file_priv); 1694 1694 } 1695 1695 1696 - DRM_DEBUG("waiting on vblank count %d, crtc %u\n", 1696 + DRM_DEBUG("waiting on vblank count %u, crtc %u\n", 1697 1697 vblwait->request.sequence, pipe); 1698 1698 DRM_WAIT_ON(ret, vblank->queue, 3 * HZ, 1699 1699 (((drm_vblank_count(dev, pipe) - ··· 1708 1708 vblwait->reply.tval_sec = now.tv_sec; 1709 1709 vblwait->reply.tval_usec = now.tv_usec; 1710 1710 1711 - DRM_DEBUG("returning %d to client\n", 1711 + DRM_DEBUG("returning %u to client\n", 1712 1712 vblwait->reply.sequence); 1713 1713 } else { 1714 1714 DRM_DEBUG("vblank wait interrupted by signal\n"); ··· 1735 1735 if ((seq - e->event.sequence) > (1<<23)) 1736 1736 continue; 1737 1737 1738 - DRM_DEBUG("vblank event on %d, current %d\n", 1738 + DRM_DEBUG("vblank event on %u, current %u\n", 1739 1739 e->event.sequence, seq); 1740 1740 1741 1741 list_del(&e->base.link); ··· 1826 1826 */ 1827 1827 u32 drm_vblank_no_hw_counter(struct drm_device *dev, unsigned int pipe) 1828 1828 { 1829 + WARN_ON_ONCE(dev->max_vblank_count != 0); 1829 1830 return 0; 1830 1831 } 1831 1832 EXPORT_SYMBOL(drm_vblank_no_hw_counter);
+2 -2
drivers/gpu/drm/drm_lock.c
··· 163 163 struct drm_master *master = file_priv->master; 164 164 int ret = 0; 165 165 166 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 166 + if (!drm_core_check_feature(dev, DRIVER_LEGACY)) 167 167 return -EINVAL; 168 168 169 169 ++file_priv->lock_count; ··· 252 252 struct drm_lock *lock = data; 253 253 struct drm_master *master = file_priv->master; 254 254 255 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 255 + if (!drm_core_check_feature(dev, DRIVER_LEGACY)) 256 256 return -EINVAL; 257 257 258 258 if (lock->context == DRM_KERNEL_CONTEXT) {
+122 -30
drivers/gpu/drm/drm_mm.c
··· 46 46 #include <linux/slab.h> 47 47 #include <linux/seq_file.h> 48 48 #include <linux/export.h> 49 + #include <linux/interval_tree_generic.h> 49 50 50 51 /** 51 52 * DOC: Overview ··· 104 103 u64 end, 105 104 enum drm_mm_search_flags flags); 106 105 106 + #define START(node) ((node)->start) 107 + #define LAST(node) ((node)->start + (node)->size - 1) 108 + 109 + INTERVAL_TREE_DEFINE(struct drm_mm_node, rb, 110 + u64, __subtree_last, 111 + START, LAST, static inline, drm_mm_interval_tree) 112 + 113 + struct drm_mm_node * 114 + drm_mm_interval_first(struct drm_mm *mm, u64 start, u64 last) 115 + { 116 + return drm_mm_interval_tree_iter_first(&mm->interval_tree, 117 + start, last); 118 + } 119 + EXPORT_SYMBOL(drm_mm_interval_first); 120 + 121 + struct drm_mm_node * 122 + drm_mm_interval_next(struct drm_mm_node *node, u64 start, u64 last) 123 + { 124 + return drm_mm_interval_tree_iter_next(node, start, last); 125 + } 126 + EXPORT_SYMBOL(drm_mm_interval_next); 127 + 128 + static void drm_mm_interval_tree_add_node(struct drm_mm_node *hole_node, 129 + struct drm_mm_node *node) 130 + { 131 + struct drm_mm *mm = hole_node->mm; 132 + struct rb_node **link, *rb; 133 + struct drm_mm_node *parent; 134 + 135 + node->__subtree_last = LAST(node); 136 + 137 + if (hole_node->allocated) { 138 + rb = &hole_node->rb; 139 + while (rb) { 140 + parent = rb_entry(rb, struct drm_mm_node, rb); 141 + if (parent->__subtree_last >= node->__subtree_last) 142 + break; 143 + 144 + parent->__subtree_last = node->__subtree_last; 145 + rb = rb_parent(rb); 146 + } 147 + 148 + rb = &hole_node->rb; 149 + link = &hole_node->rb.rb_right; 150 + } else { 151 + rb = NULL; 152 + link = &mm->interval_tree.rb_node; 153 + } 154 + 155 + while (*link) { 156 + rb = *link; 157 + parent = rb_entry(rb, struct drm_mm_node, rb); 158 + if (parent->__subtree_last < node->__subtree_last) 159 + parent->__subtree_last = node->__subtree_last; 160 + if (node->start < parent->start) 161 + link = &parent->rb.rb_left; 162 + else 163 + link = &parent->rb.rb_right; 164 + } 165 + 166 + rb_link_node(&node->rb, rb, link); 167 + rb_insert_augmented(&node->rb, 168 + &mm->interval_tree, 169 + &drm_mm_interval_tree_augment); 170 + } 171 + 107 172 static void drm_mm_insert_helper(struct drm_mm_node *hole_node, 108 173 struct drm_mm_node *node, 109 174 u64 size, unsigned alignment, ··· 217 150 node->color = color; 218 151 node->allocated = 1; 219 152 220 - INIT_LIST_HEAD(&node->hole_stack); 221 153 list_add(&node->node_list, &hole_node->node_list); 154 + 155 + drm_mm_interval_tree_add_node(hole_node, node); 222 156 223 157 BUG_ON(node->start + node->size > adj_end); 224 158 ··· 246 178 */ 247 179 int drm_mm_reserve_node(struct drm_mm *mm, struct drm_mm_node *node) 248 180 { 181 + u64 end = node->start + node->size; 249 182 struct drm_mm_node *hole; 250 - u64 end; 251 - u64 hole_start; 252 - u64 hole_end; 183 + u64 hole_start, hole_end; 253 184 254 - BUG_ON(node == NULL); 185 + if (WARN_ON(node->size == 0)) 186 + return -EINVAL; 255 187 256 188 end = node->start + node->size; 257 189 258 190 /* Find the relevant hole to add our node to */ 259 - drm_mm_for_each_hole(hole, mm, hole_start, hole_end) { 260 - if (hole_start > node->start || hole_end < end) 261 - continue; 262 - 263 - node->mm = mm; 264 - node->allocated = 1; 265 - 266 - INIT_LIST_HEAD(&node->hole_stack); 267 - list_add(&node->node_list, &hole->node_list); 268 - 269 - if (node->start == hole_start) { 270 - hole->hole_follows = 0; 271 - list_del_init(&hole->hole_stack); 272 - } 273 - 274 - node->hole_follows = 0; 275 - if (end != hole_end) { 276 - list_add(&node->hole_stack, &mm->hole_stack); 277 - node->hole_follows = 1; 278 - } 279 - 280 - return 0; 191 + hole = drm_mm_interval_tree_iter_first(&mm->interval_tree, 192 + node->start, ~(u64)0); 193 + if (hole) { 194 + if (hole->start < end) 195 + return -ENOSPC; 196 + } else { 197 + hole = list_entry(&mm->head_node.node_list, 198 + typeof(*hole), node_list); 281 199 } 282 200 283 - return -ENOSPC; 201 + hole = list_last_entry(&hole->node_list, typeof(*hole), node_list); 202 + if (!hole->hole_follows) 203 + return -ENOSPC; 204 + 205 + hole_start = __drm_mm_hole_node_start(hole); 206 + hole_end = __drm_mm_hole_node_end(hole); 207 + if (hole_start > node->start || hole_end < end) 208 + return -ENOSPC; 209 + 210 + node->mm = mm; 211 + node->allocated = 1; 212 + 213 + list_add(&node->node_list, &hole->node_list); 214 + 215 + drm_mm_interval_tree_add_node(hole, node); 216 + 217 + if (node->start == hole_start) { 218 + hole->hole_follows = 0; 219 + list_del(&hole->hole_stack); 220 + } 221 + 222 + node->hole_follows = 0; 223 + if (end != hole_end) { 224 + list_add(&node->hole_stack, &mm->hole_stack); 225 + node->hole_follows = 1; 226 + } 227 + 228 + return 0; 284 229 } 285 230 EXPORT_SYMBOL(drm_mm_reserve_node); 286 231 ··· 319 238 enum drm_mm_allocator_flags aflags) 320 239 { 321 240 struct drm_mm_node *hole_node; 241 + 242 + if (WARN_ON(size == 0)) 243 + return -EINVAL; 322 244 323 245 hole_node = drm_mm_search_free_generic(mm, size, alignment, 324 246 color, sflags); ··· 383 299 node->color = color; 384 300 node->allocated = 1; 385 301 386 - INIT_LIST_HEAD(&node->hole_stack); 387 302 list_add(&node->node_list, &hole_node->node_list); 303 + 304 + drm_mm_interval_tree_add_node(hole_node, node); 388 305 389 306 BUG_ON(node->start < start); 390 307 BUG_ON(node->start < adj_start); ··· 424 339 enum drm_mm_allocator_flags aflags) 425 340 { 426 341 struct drm_mm_node *hole_node; 342 + 343 + if (WARN_ON(size == 0)) 344 + return -EINVAL; 427 345 428 346 hole_node = drm_mm_search_free_in_range_generic(mm, 429 347 size, alignment, color, ··· 478 390 } else 479 391 list_move(&prev_node->hole_stack, &mm->hole_stack); 480 392 393 + drm_mm_interval_tree_remove(node, &mm->interval_tree); 481 394 list_del(&node->node_list); 482 395 node->allocated = 0; 483 396 } ··· 605 516 { 606 517 list_replace(&old->node_list, &new->node_list); 607 518 list_replace(&old->hole_stack, &new->hole_stack); 519 + rb_replace_node(&old->rb, &new->rb, &old->mm->interval_tree); 608 520 new->hole_follows = old->hole_follows; 609 521 new->mm = old->mm; 610 522 new->start = old->start; 611 523 new->size = old->size; 612 524 new->color = old->color; 525 + new->__subtree_last = old->__subtree_last; 613 526 614 527 old->allocated = 0; 615 528 new->allocated = 1; ··· 839 748 840 749 /* Clever trick to avoid a special case in the free hole tracking. */ 841 750 INIT_LIST_HEAD(&mm->head_node.node_list); 842 - INIT_LIST_HEAD(&mm->head_node.hole_stack); 843 751 mm->head_node.hole_follows = 1; 844 752 mm->head_node.scanned_block = 0; 845 753 mm->head_node.scanned_prev_free = 0; ··· 847 757 mm->head_node.start = start + size; 848 758 mm->head_node.size = start - mm->head_node.start; 849 759 list_add_tail(&mm->head_node.hole_stack, &mm->hole_stack); 760 + 761 + mm->interval_tree = RB_ROOT; 850 762 851 763 mm->color_adjust = NULL; 852 764 }
+4 -4
drivers/gpu/drm/drm_pci.c
··· 175 175 { 176 176 struct drm_irq_busid *p = data; 177 177 178 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 178 + if (!drm_core_check_feature(dev, DRIVER_LEGACY)) 179 179 return -EINVAL; 180 180 181 181 /* UMS was only ever support on PCI devices. */ ··· 263 263 264 264 /* No locking needed since shadow-attach is single-threaded since it may 265 265 * only be called from the per-driver module init hook. */ 266 - if (!drm_core_check_feature(dev, DRIVER_MODESET)) 266 + if (drm_core_check_feature(dev, DRIVER_LEGACY)) 267 267 list_add_tail(&dev->legacy_dev_list, &driver->legacy_dev_list); 268 268 269 269 return 0; ··· 299 299 300 300 DRM_DEBUG("\n"); 301 301 302 - if (driver->driver_features & DRIVER_MODESET) 302 + if (!(driver->driver_features & DRIVER_LEGACY)) 303 303 return pci_register_driver(pdriver); 304 304 305 305 /* If not using KMS, fall back to stealth mode manual scanning. */ ··· 421 421 struct drm_device *dev, *tmp; 422 422 DRM_DEBUG("\n"); 423 423 424 - if (driver->driver_features & DRIVER_MODESET) { 424 + if (!(driver->driver_features & DRIVER_LEGACY)) { 425 425 pci_unregister_driver(pdriver); 426 426 } else { 427 427 list_for_each_entry_safe(dev, tmp, &driver->legacy_dev_list,
+125 -50
drivers/gpu/drm/drm_plane_helper.c
··· 108 108 } 109 109 110 110 /** 111 + * drm_plane_helper_check_state() - Check plane state for validity 112 + * @state: plane state to check 113 + * @clip: integer clipping coordinates 114 + * @min_scale: minimum @src:@dest scaling factor in 16.16 fixed point 115 + * @max_scale: maximum @src:@dest scaling factor in 16.16 fixed point 116 + * @can_position: is it legal to position the plane such that it 117 + * doesn't cover the entire crtc? This will generally 118 + * only be false for primary planes. 119 + * @can_update_disabled: can the plane be updated while the crtc 120 + * is disabled? 121 + * 122 + * Checks that a desired plane update is valid, and updates various 123 + * bits of derived state (clipped coordinates etc.). Drivers that provide 124 + * their own plane handling rather than helper-provided implementations may 125 + * still wish to call this function to avoid duplication of error checking 126 + * code. 127 + * 128 + * RETURNS: 129 + * Zero if update appears valid, error code on failure 130 + */ 131 + int drm_plane_helper_check_state(struct drm_plane_state *state, 132 + const struct drm_rect *clip, 133 + int min_scale, 134 + int max_scale, 135 + bool can_position, 136 + bool can_update_disabled) 137 + { 138 + struct drm_crtc *crtc = state->crtc; 139 + struct drm_framebuffer *fb = state->fb; 140 + struct drm_rect *src = &state->src; 141 + struct drm_rect *dst = &state->dst; 142 + unsigned int rotation = state->rotation; 143 + int hscale, vscale; 144 + 145 + src->x1 = state->src_x; 146 + src->y1 = state->src_y; 147 + src->x2 = state->src_x + state->src_w; 148 + src->y2 = state->src_y + state->src_h; 149 + 150 + dst->x1 = state->crtc_x; 151 + dst->y1 = state->crtc_y; 152 + dst->x2 = state->crtc_x + state->crtc_w; 153 + dst->y2 = state->crtc_y + state->crtc_h; 154 + 155 + if (!fb) { 156 + state->visible = false; 157 + return 0; 158 + } 159 + 160 + /* crtc should only be NULL when disabling (i.e., !fb) */ 161 + if (WARN_ON(!crtc)) { 162 + state->visible = false; 163 + return 0; 164 + } 165 + 166 + if (!crtc->enabled && !can_update_disabled) { 167 + DRM_DEBUG_KMS("Cannot update plane of a disabled CRTC.\n"); 168 + return -EINVAL; 169 + } 170 + 171 + drm_rect_rotate(src, fb->width << 16, fb->height << 16, rotation); 172 + 173 + /* Check scaling */ 174 + hscale = drm_rect_calc_hscale(src, dst, min_scale, max_scale); 175 + vscale = drm_rect_calc_vscale(src, dst, min_scale, max_scale); 176 + if (hscale < 0 || vscale < 0) { 177 + DRM_DEBUG_KMS("Invalid scaling of plane\n"); 178 + drm_rect_debug_print("src: ", &state->src, true); 179 + drm_rect_debug_print("dst: ", &state->dst, false); 180 + return -ERANGE; 181 + } 182 + 183 + state->visible = drm_rect_clip_scaled(src, dst, clip, hscale, vscale); 184 + 185 + drm_rect_rotate_inv(src, fb->width << 16, fb->height << 16, rotation); 186 + 187 + if (!state->visible) 188 + /* 189 + * Plane isn't visible; some drivers can handle this 190 + * so we just return success here. Drivers that can't 191 + * (including those that use the primary plane helper's 192 + * update function) will return an error from their 193 + * update_plane handler. 194 + */ 195 + return 0; 196 + 197 + if (!can_position && !drm_rect_equals(dst, clip)) { 198 + DRM_DEBUG_KMS("Plane must cover entire CRTC\n"); 199 + drm_rect_debug_print("dst: ", dst, false); 200 + drm_rect_debug_print("clip: ", clip, false); 201 + return -EINVAL; 202 + } 203 + 204 + return 0; 205 + } 206 + EXPORT_SYMBOL(drm_plane_helper_check_state); 207 + 208 + /** 111 209 * drm_plane_helper_check_update() - Check plane update for validity 112 210 * @plane: plane object to update 113 211 * @crtc: owning CRTC of owning plane ··· 236 138 struct drm_crtc *crtc, 237 139 struct drm_framebuffer *fb, 238 140 struct drm_rect *src, 239 - struct drm_rect *dest, 141 + struct drm_rect *dst, 240 142 const struct drm_rect *clip, 241 143 unsigned int rotation, 242 144 int min_scale, ··· 245 147 bool can_update_disabled, 246 148 bool *visible) 247 149 { 248 - int hscale, vscale; 150 + struct drm_plane_state state = { 151 + .plane = plane, 152 + .crtc = crtc, 153 + .fb = fb, 154 + .src_x = src->x1, 155 + .src_y = src->y1, 156 + .src_w = drm_rect_width(src), 157 + .src_h = drm_rect_height(src), 158 + .crtc_x = dst->x1, 159 + .crtc_y = dst->y1, 160 + .crtc_w = drm_rect_width(dst), 161 + .crtc_h = drm_rect_height(dst), 162 + .rotation = rotation, 163 + .visible = *visible, 164 + }; 165 + int ret; 249 166 250 - if (!fb) { 251 - *visible = false; 252 - return 0; 253 - } 167 + ret = drm_plane_helper_check_state(&state, clip, 168 + min_scale, max_scale, 169 + can_position, 170 + can_update_disabled); 171 + if (ret) 172 + return ret; 254 173 255 - /* crtc should only be NULL when disabling (i.e., !fb) */ 256 - if (WARN_ON(!crtc)) { 257 - *visible = false; 258 - return 0; 259 - } 260 - 261 - if (!crtc->enabled && !can_update_disabled) { 262 - DRM_DEBUG_KMS("Cannot update plane of a disabled CRTC.\n"); 263 - return -EINVAL; 264 - } 265 - 266 - drm_rect_rotate(src, fb->width << 16, fb->height << 16, rotation); 267 - 268 - /* Check scaling */ 269 - hscale = drm_rect_calc_hscale(src, dest, min_scale, max_scale); 270 - vscale = drm_rect_calc_vscale(src, dest, min_scale, max_scale); 271 - if (hscale < 0 || vscale < 0) { 272 - DRM_DEBUG_KMS("Invalid scaling of plane\n"); 273 - drm_rect_debug_print("src: ", src, true); 274 - drm_rect_debug_print("dst: ", dest, false); 275 - return -ERANGE; 276 - } 277 - 278 - *visible = drm_rect_clip_scaled(src, dest, clip, hscale, vscale); 279 - 280 - drm_rect_rotate_inv(src, fb->width << 16, fb->height << 16, rotation); 281 - 282 - if (!*visible) 283 - /* 284 - * Plane isn't visible; some drivers can handle this 285 - * so we just return success here. Drivers that can't 286 - * (including those that use the primary plane helper's 287 - * update function) will return an error from their 288 - * update_plane handler. 289 - */ 290 - return 0; 291 - 292 - if (!can_position && !drm_rect_equals(dest, clip)) { 293 - DRM_DEBUG_KMS("Plane must cover entire CRTC\n"); 294 - drm_rect_debug_print("dst: ", dest, false); 295 - drm_rect_debug_print("clip: ", clip, false); 296 - return -EINVAL; 297 - } 174 + *src = state.src; 175 + *dst = state.dst; 176 + *visible = state.visible; 298 177 299 178 return 0; 300 179 } ··· 349 274 350 275 ret = drm_plane_helper_check_update(plane, crtc, fb, 351 276 &src, &dest, &clip, 352 - BIT(DRM_ROTATE_0), 277 + DRM_ROTATE_0, 353 278 DRM_PLANE_HELPER_NO_SCALING, 354 279 DRM_PLANE_HELPER_NO_SCALING, 355 280 false, false, &visible);
+15 -15
drivers/gpu/drm/drm_rect.c
··· 100 100 { 101 101 int scale = 0; 102 102 103 - if (src < 0 || dst < 0) 103 + if (WARN_ON(src < 0 || dst < 0)) 104 104 return -EINVAL; 105 105 106 106 if (dst == 0) ··· 317 317 { 318 318 struct drm_rect tmp; 319 319 320 - if (rotation & (BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y))) { 320 + if (rotation & (DRM_REFLECT_X | DRM_REFLECT_Y)) { 321 321 tmp = *r; 322 322 323 - if (rotation & BIT(DRM_REFLECT_X)) { 323 + if (rotation & DRM_REFLECT_X) { 324 324 r->x1 = width - tmp.x2; 325 325 r->x2 = width - tmp.x1; 326 326 } 327 327 328 - if (rotation & BIT(DRM_REFLECT_Y)) { 328 + if (rotation & DRM_REFLECT_Y) { 329 329 r->y1 = height - tmp.y2; 330 330 r->y2 = height - tmp.y1; 331 331 } 332 332 } 333 333 334 334 switch (rotation & DRM_ROTATE_MASK) { 335 - case BIT(DRM_ROTATE_0): 335 + case DRM_ROTATE_0: 336 336 break; 337 - case BIT(DRM_ROTATE_90): 337 + case DRM_ROTATE_90: 338 338 tmp = *r; 339 339 r->x1 = tmp.y1; 340 340 r->x2 = tmp.y2; 341 341 r->y1 = width - tmp.x2; 342 342 r->y2 = width - tmp.x1; 343 343 break; 344 - case BIT(DRM_ROTATE_180): 344 + case DRM_ROTATE_180: 345 345 tmp = *r; 346 346 r->x1 = width - tmp.x2; 347 347 r->x2 = width - tmp.x1; 348 348 r->y1 = height - tmp.y2; 349 349 r->y2 = height - tmp.y1; 350 350 break; 351 - case BIT(DRM_ROTATE_270): 351 + case DRM_ROTATE_270: 352 352 tmp = *r; 353 353 r->x1 = height - tmp.y2; 354 354 r->x2 = height - tmp.y1; ··· 392 392 struct drm_rect tmp; 393 393 394 394 switch (rotation & DRM_ROTATE_MASK) { 395 - case BIT(DRM_ROTATE_0): 395 + case DRM_ROTATE_0: 396 396 break; 397 - case BIT(DRM_ROTATE_90): 397 + case DRM_ROTATE_90: 398 398 tmp = *r; 399 399 r->x1 = width - tmp.y2; 400 400 r->x2 = width - tmp.y1; 401 401 r->y1 = tmp.x1; 402 402 r->y2 = tmp.x2; 403 403 break; 404 - case BIT(DRM_ROTATE_180): 404 + case DRM_ROTATE_180: 405 405 tmp = *r; 406 406 r->x1 = width - tmp.x2; 407 407 r->x2 = width - tmp.x1; 408 408 r->y1 = height - tmp.y2; 409 409 r->y2 = height - tmp.y1; 410 410 break; 411 - case BIT(DRM_ROTATE_270): 411 + case DRM_ROTATE_270: 412 412 tmp = *r; 413 413 r->x1 = tmp.y1; 414 414 r->x2 = tmp.y2; ··· 419 419 break; 420 420 } 421 421 422 - if (rotation & (BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y))) { 422 + if (rotation & (DRM_REFLECT_X | DRM_REFLECT_Y)) { 423 423 tmp = *r; 424 424 425 - if (rotation & BIT(DRM_REFLECT_X)) { 425 + if (rotation & DRM_REFLECT_X) { 426 426 r->x1 = width - tmp.x2; 427 427 r->x2 = width - tmp.x1; 428 428 } 429 429 430 - if (rotation & BIT(DRM_REFLECT_Y)) { 430 + if (rotation & DRM_REFLECT_Y) { 431 431 r->y1 = height - tmp.y2; 432 432 r->y2 = height - tmp.y1; 433 433 }
+3 -3
drivers/gpu/drm/drm_scatter.c
··· 68 68 void drm_legacy_sg_cleanup(struct drm_device *dev) 69 69 { 70 70 if (drm_core_check_feature(dev, DRIVER_SG) && dev->sg && 71 - !drm_core_check_feature(dev, DRIVER_MODESET)) { 71 + drm_core_check_feature(dev, DRIVER_LEGACY)) { 72 72 drm_sg_cleanup(dev->sg); 73 73 dev->sg = NULL; 74 74 } ··· 88 88 89 89 DRM_DEBUG("\n"); 90 90 91 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 91 + if (!drm_core_check_feature(dev, DRIVER_LEGACY)) 92 92 return -EINVAL; 93 93 94 94 if (!drm_core_check_feature(dev, DRIVER_SG)) ··· 201 201 struct drm_scatter_gather *request = data; 202 202 struct drm_sg_mem *entry; 203 203 204 - if (drm_core_check_feature(dev, DRIVER_MODESET)) 204 + if (!drm_core_check_feature(dev, DRIVER_LEGACY)) 205 205 return -EINVAL; 206 206 207 207 if (!drm_core_check_feature(dev, DRIVER_SG))
+6 -21
drivers/gpu/drm/drm_simple_kms_helper.c
··· 73 73 static int drm_simple_kms_plane_atomic_check(struct drm_plane *plane, 74 74 struct drm_plane_state *plane_state) 75 75 { 76 - struct drm_rect src = { 77 - .x1 = plane_state->src_x, 78 - .y1 = plane_state->src_y, 79 - .x2 = plane_state->src_x + plane_state->src_w, 80 - .y2 = plane_state->src_y + plane_state->src_h, 81 - }; 82 - struct drm_rect dest = { 83 - .x1 = plane_state->crtc_x, 84 - .y1 = plane_state->crtc_y, 85 - .x2 = plane_state->crtc_x + plane_state->crtc_w, 86 - .y2 = plane_state->crtc_y + plane_state->crtc_h, 87 - }; 88 76 struct drm_rect clip = { 0 }; 89 77 struct drm_simple_display_pipe *pipe; 90 78 struct drm_crtc_state *crtc_state; 91 - bool visible; 92 79 int ret; 93 80 94 81 pipe = container_of(plane, struct drm_simple_display_pipe, plane); ··· 89 102 90 103 clip.x2 = crtc_state->adjusted_mode.hdisplay; 91 104 clip.y2 = crtc_state->adjusted_mode.vdisplay; 92 - ret = drm_plane_helper_check_update(plane, &pipe->crtc, 93 - plane_state->fb, 94 - &src, &dest, &clip, 95 - plane_state->rotation, 96 - DRM_PLANE_HELPER_NO_SCALING, 97 - DRM_PLANE_HELPER_NO_SCALING, 98 - false, true, &visible); 105 + 106 + ret = drm_plane_helper_check_state(plane_state, &clip, 107 + DRM_PLANE_HELPER_NO_SCALING, 108 + DRM_PLANE_HELPER_NO_SCALING, 109 + false, true); 99 110 if (ret) 100 111 return ret; 101 112 102 - if (!visible) 113 + if (!plane_state->visible) 103 114 return -EINVAL; 104 115 105 116 if (!pipe->funcs || !pipe->funcs->check)
+9 -34
drivers/gpu/drm/drm_vma_manager.c
··· 86 86 unsigned long page_offset, unsigned long size) 87 87 { 88 88 rwlock_init(&mgr->vm_lock); 89 - mgr->vm_addr_space_rb = RB_ROOT; 90 89 drm_mm_init(&mgr->vm_addr_space_mm, page_offset, size); 91 90 } 92 91 EXPORT_SYMBOL(drm_vma_offset_manager_init); ··· 144 145 unsigned long start, 145 146 unsigned long pages) 146 147 { 147 - struct drm_vma_offset_node *node, *best; 148 + struct drm_mm_node *node, *best; 148 149 struct rb_node *iter; 149 150 unsigned long offset; 150 151 151 - iter = mgr->vm_addr_space_rb.rb_node; 152 + iter = mgr->vm_addr_space_mm.interval_tree.rb_node; 152 153 best = NULL; 153 154 154 155 while (likely(iter)) { 155 - node = rb_entry(iter, struct drm_vma_offset_node, vm_rb); 156 - offset = node->vm_node.start; 156 + node = rb_entry(iter, struct drm_mm_node, rb); 157 + offset = node->start; 157 158 if (start >= offset) { 158 159 iter = iter->rb_right; 159 160 best = node; ··· 166 167 167 168 /* verify that the node spans the requested area */ 168 169 if (best) { 169 - offset = best->vm_node.start + best->vm_node.size; 170 + offset = best->start + best->size; 170 171 if (offset < start + pages) 171 172 best = NULL; 172 173 } 173 174 174 - return best; 175 + if (!best) 176 + return NULL; 177 + 178 + return container_of(best, struct drm_vma_offset_node, vm_node); 175 179 } 176 180 EXPORT_SYMBOL(drm_vma_offset_lookup_locked); 177 - 178 - /* internal helper to link @node into the rb-tree */ 179 - static void _drm_vma_offset_add_rb(struct drm_vma_offset_manager *mgr, 180 - struct drm_vma_offset_node *node) 181 - { 182 - struct rb_node **iter = &mgr->vm_addr_space_rb.rb_node; 183 - struct rb_node *parent = NULL; 184 - struct drm_vma_offset_node *iter_node; 185 - 186 - while (likely(*iter)) { 187 - parent = *iter; 188 - iter_node = rb_entry(*iter, struct drm_vma_offset_node, vm_rb); 189 - 190 - if (node->vm_node.start < iter_node->vm_node.start) 191 - iter = &(*iter)->rb_left; 192 - else if (node->vm_node.start > iter_node->vm_node.start) 193 - iter = &(*iter)->rb_right; 194 - else 195 - BUG(); 196 - } 197 - 198 - rb_link_node(&node->vm_rb, parent, iter); 199 - rb_insert_color(&node->vm_rb, &mgr->vm_addr_space_rb); 200 - } 201 181 202 182 /** 203 183 * drm_vma_offset_add() - Add offset node to manager ··· 218 240 if (ret) 219 241 goto out_unlock; 220 242 221 - _drm_vma_offset_add_rb(mgr, node); 222 - 223 243 out_unlock: 224 244 write_unlock(&mgr->vm_lock); 225 245 return ret; ··· 241 265 write_lock(&mgr->vm_lock); 242 266 243 267 if (drm_mm_node_allocated(&node->vm_node)) { 244 - rb_erase(&node->vm_rb, &mgr->vm_addr_space_rb); 245 268 drm_mm_remove_node(&node->vm_node); 246 269 memset(&node->vm_node, 0, sizeof(node->vm_node)); 247 270 }
-1
drivers/gpu/drm/gma500/accel_2d.c
··· 28 28 #include <linux/tty.h> 29 29 #include <linux/slab.h> 30 30 #include <linux/delay.h> 31 - #include <linux/fb.h> 32 31 #include <linux/init.h> 33 32 #include <linux/console.h> 34 33
-1
drivers/gpu/drm/gma500/framebuffer.c
··· 26 26 #include <linux/tty.h> 27 27 #include <linux/slab.h> 28 28 #include <linux/delay.h> 29 - #include <linux/fb.h> 30 29 #include <linux/init.h> 31 30 #include <linux/console.h> 32 31
-1
drivers/gpu/drm/gma500/psb_intel_modes.c
··· 18 18 */ 19 19 20 20 #include <linux/i2c.h> 21 - #include <linux/fb.h> 22 21 #include <drm/drmP.h> 23 22 #include "psb_intel_drv.h" 24 23
+1 -3
drivers/gpu/drm/i810/i810_drv.c
··· 56 56 }; 57 57 58 58 static struct drm_driver driver = { 59 - .driver_features = 60 - DRIVER_USE_AGP | 61 - DRIVER_HAVE_DMA, 59 + .driver_features = DRIVER_USE_AGP | DRIVER_HAVE_DMA | DRIVER_LEGACY, 62 60 .dev_priv_size = sizeof(drm_i810_buf_priv_t), 63 61 .load = i810_driver_load, 64 62 .lastclose = i810_driver_lastclose,
+6 -6
drivers/gpu/drm/i915/i915_debugfs.c
··· 3089 3089 */ 3090 3090 snprintf(buf, sizeof(buf), 3091 3091 "%s%s%s%s%s%s(0x%08x)", 3092 - (rotation & BIT(DRM_ROTATE_0)) ? "0 " : "", 3093 - (rotation & BIT(DRM_ROTATE_90)) ? "90 " : "", 3094 - (rotation & BIT(DRM_ROTATE_180)) ? "180 " : "", 3095 - (rotation & BIT(DRM_ROTATE_270)) ? "270 " : "", 3096 - (rotation & BIT(DRM_REFLECT_X)) ? "FLIPX " : "", 3097 - (rotation & BIT(DRM_REFLECT_Y)) ? "FLIPY " : "", 3092 + (rotation & DRM_ROTATE_0) ? "0 " : "", 3093 + (rotation & DRM_ROTATE_90) ? "90 " : "", 3094 + (rotation & DRM_ROTATE_180) ? "180 " : "", 3095 + (rotation & DRM_ROTATE_270) ? "270 " : "", 3096 + (rotation & DRM_REFLECT_X) ? "FLIPX " : "", 3097 + (rotation & DRM_REFLECT_Y) ? "FLIPY " : "", 3098 3098 rotation); 3099 3099 3100 3100 return buf;
+1 -1
drivers/gpu/drm/i915/i915_drv.c
··· 706 706 primary = 707 707 pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 708 708 709 - ret = remove_conflicting_framebuffers(ap, "inteldrmfb", primary); 709 + ret = drm_fb_helper_remove_conflicting_framebuffers(ap, "inteldrmfb", primary); 710 710 711 711 kfree(ap); 712 712
+3 -17
drivers/gpu/drm/i915/intel_atomic_plane.c
··· 55 55 return NULL; 56 56 57 57 state->base.plane = plane; 58 - state->base.rotation = BIT(DRM_ROTATE_0); 58 + state->base.rotation = DRM_ROTATE_0; 59 59 state->ckey.flags = I915_SET_COLORKEY_NONE; 60 60 61 61 return state; ··· 134 134 135 135 crtc_state = to_intel_crtc_state(drm_crtc_state); 136 136 137 - /* 138 - * The original src/dest coordinates are stored in state->base, but 139 - * we want to keep another copy internal to our driver that we can 140 - * clip/modify ourselves. 141 - */ 142 - intel_state->src.x1 = state->src_x; 143 - intel_state->src.y1 = state->src_y; 144 - intel_state->src.x2 = state->src_x + state->src_w; 145 - intel_state->src.y2 = state->src_y + state->src_h; 146 - intel_state->dst.x1 = state->crtc_x; 147 - intel_state->dst.y1 = state->crtc_y; 148 - intel_state->dst.x2 = state->crtc_x + state->crtc_w; 149 - intel_state->dst.y2 = state->crtc_y + state->crtc_h; 150 - 151 137 /* Clip all planes to CRTC size, or 0x0 if CRTC is disabled */ 152 138 intel_state->clip.x1 = 0; 153 139 intel_state->clip.y1 = 0; ··· 166 180 } 167 181 } 168 182 169 - intel_state->visible = false; 183 + intel_state->base.visible = false; 170 184 ret = intel_plane->check_plane(plane, crtc_state, intel_state); 171 185 if (ret) 172 186 return ret; ··· 182 196 to_intel_plane_state(plane->state); 183 197 struct drm_crtc *crtc = plane->state->crtc ?: old_state->crtc; 184 198 185 - if (intel_state->visible) 199 + if (intel_state->base.visible) 186 200 intel_plane->update_plane(plane, 187 201 to_intel_crtc_state(crtc->state), 188 202 intel_state);
+82 -86
drivers/gpu/drm/i915/intel_display.c
··· 2565 2565 * simplest solution is to just disable the primary plane now and 2566 2566 * pretend the BIOS never had it enabled. 2567 2567 */ 2568 - to_intel_plane_state(plane_state)->visible = false; 2568 + to_intel_plane_state(plane_state)->base.visible = false; 2569 2569 crtc_state->plane_mask &= ~(1 << drm_plane_index(primary)); 2570 2570 intel_pre_disable_primary_noatomic(&intel_crtc->base); 2571 2571 intel_plane->disable_plane(primary, &intel_crtc->base); ··· 2583 2583 plane_state->crtc_w = fb->width; 2584 2584 plane_state->crtc_h = fb->height; 2585 2585 2586 - intel_state->src.x1 = plane_state->src_x; 2587 - intel_state->src.y1 = plane_state->src_y; 2588 - intel_state->src.x2 = plane_state->src_x + plane_state->src_w; 2589 - intel_state->src.y2 = plane_state->src_y + plane_state->src_h; 2590 - intel_state->dst.x1 = plane_state->crtc_x; 2591 - intel_state->dst.y1 = plane_state->crtc_y; 2592 - intel_state->dst.x2 = plane_state->crtc_x + plane_state->crtc_w; 2593 - intel_state->dst.y2 = plane_state->crtc_y + plane_state->crtc_h; 2586 + intel_state->base.src.x1 = plane_state->src_x; 2587 + intel_state->base.src.y1 = plane_state->src_y; 2588 + intel_state->base.src.x2 = plane_state->src_x + plane_state->src_w; 2589 + intel_state->base.src.y2 = plane_state->src_y + plane_state->src_h; 2590 + intel_state->base.dst.x1 = plane_state->crtc_x; 2591 + intel_state->base.dst.y1 = plane_state->crtc_y; 2592 + intel_state->base.dst.x2 = plane_state->crtc_x + plane_state->crtc_w; 2593 + intel_state->base.dst.y2 = plane_state->crtc_y + plane_state->crtc_h; 2594 2594 2595 2595 obj = intel_fb_obj(fb); 2596 2596 if (obj->tiling_mode != I915_TILING_NONE) ··· 2618 2618 i915_reg_t reg = DSPCNTR(plane); 2619 2619 unsigned int rotation = plane_state->base.rotation; 2620 2620 int cpp = drm_format_plane_cpp(fb->pixel_format, 0); 2621 - int x = plane_state->src.x1 >> 16; 2622 - int y = plane_state->src.y1 >> 16; 2621 + int x = plane_state->base.src.x1 >> 16; 2622 + int y = plane_state->base.src.y1 >> 16; 2623 2623 2624 2624 dspcntr = DISPPLANE_GAMMA_ENABLE; 2625 2625 ··· 2688 2688 intel_crtc->dspaddr_offset = linear_offset; 2689 2689 } 2690 2690 2691 - if (rotation == BIT(DRM_ROTATE_180)) { 2691 + if (rotation == DRM_ROTATE_180) { 2692 2692 dspcntr |= DISPPLANE_ROTATE_180; 2693 2693 2694 2694 x += (crtc_state->pipe_src_w - 1); ··· 2748 2748 i915_reg_t reg = DSPCNTR(plane); 2749 2749 unsigned int rotation = plane_state->base.rotation; 2750 2750 int cpp = drm_format_plane_cpp(fb->pixel_format, 0); 2751 - int x = plane_state->src.x1 >> 16; 2752 - int y = plane_state->src.y1 >> 16; 2751 + int x = plane_state->base.src.x1 >> 16; 2752 + int y = plane_state->base.src.y1 >> 16; 2753 2753 2754 2754 dspcntr = DISPPLANE_GAMMA_ENABLE; 2755 2755 dspcntr |= DISPLAY_PLANE_ENABLE; ··· 2791 2791 intel_compute_tile_offset(&x, &y, fb, 0, 2792 2792 fb->pitches[0], rotation); 2793 2793 linear_offset -= intel_crtc->dspaddr_offset; 2794 - if (rotation == BIT(DRM_ROTATE_180)) { 2794 + if (rotation == DRM_ROTATE_180) { 2795 2795 dspcntr |= DISPPLANE_ROTATE_180; 2796 2796 2797 2797 if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) { ··· 2952 2952 u32 skl_plane_ctl_rotation(unsigned int rotation) 2953 2953 { 2954 2954 switch (rotation) { 2955 - case BIT(DRM_ROTATE_0): 2955 + case DRM_ROTATE_0: 2956 2956 break; 2957 2957 /* 2958 2958 * DRM_ROTATE_ is counter clockwise to stay compatible with Xrandr 2959 2959 * while i915 HW rotation is clockwise, thats why this swapping. 2960 2960 */ 2961 - case BIT(DRM_ROTATE_90): 2961 + case DRM_ROTATE_90: 2962 2962 return PLANE_CTL_ROTATE_270; 2963 - case BIT(DRM_ROTATE_180): 2963 + case DRM_ROTATE_180: 2964 2964 return PLANE_CTL_ROTATE_180; 2965 - case BIT(DRM_ROTATE_270): 2965 + case DRM_ROTATE_270: 2966 2966 return PLANE_CTL_ROTATE_90; 2967 2967 default: 2968 2968 MISSING_CASE(rotation); ··· 2987 2987 int x_offset, y_offset; 2988 2988 u32 surf_addr; 2989 2989 int scaler_id = plane_state->scaler_id; 2990 - int src_x = plane_state->src.x1 >> 16; 2991 - int src_y = plane_state->src.y1 >> 16; 2992 - int src_w = drm_rect_width(&plane_state->src) >> 16; 2993 - int src_h = drm_rect_height(&plane_state->src) >> 16; 2994 - int dst_x = plane_state->dst.x1; 2995 - int dst_y = plane_state->dst.y1; 2996 - int dst_w = drm_rect_width(&plane_state->dst); 2997 - int dst_h = drm_rect_height(&plane_state->dst); 2990 + int src_x = plane_state->base.src.x1 >> 16; 2991 + int src_y = plane_state->base.src.y1 >> 16; 2992 + int src_w = drm_rect_width(&plane_state->base.src) >> 16; 2993 + int src_h = drm_rect_height(&plane_state->base.src) >> 16; 2994 + int dst_x = plane_state->base.dst.x1; 2995 + int dst_y = plane_state->base.dst.y1; 2996 + int dst_w = drm_rect_width(&plane_state->base.dst); 2997 + int dst_h = drm_rect_height(&plane_state->base.dst); 2998 2998 2999 2999 plane_ctl = PLANE_CTL_ENABLE | 3000 3000 PLANE_CTL_PIPE_GAMMA_ENABLE | ··· 3009 3009 fb->pixel_format); 3010 3010 surf_addr = intel_plane_obj_offset(to_intel_plane(plane), obj, 0); 3011 3011 3012 - WARN_ON(drm_rect_width(&plane_state->src) == 0); 3012 + WARN_ON(drm_rect_width(&plane_state->base.src) == 0); 3013 3013 3014 3014 if (intel_rotation_90_or_270(rotation)) { 3015 3015 int cpp = drm_format_plane_cpp(fb->pixel_format, 0); ··· 3098 3098 drm_modeset_lock_crtc(crtc, &plane->base); 3099 3099 plane_state = to_intel_plane_state(plane->base.state); 3100 3100 3101 - if (plane_state->visible) 3101 + if (plane_state->base.visible) 3102 3102 plane->update_plane(&plane->base, 3103 3103 to_intel_crtc_state(crtc->state), 3104 3104 plane_state); ··· 4248 4248 intel_crtc->pipe, SKL_CRTC_INDEX); 4249 4249 4250 4250 return skl_update_scaler(state, !state->base.active, SKL_CRTC_INDEX, 4251 - &state->scaler_state.scaler_id, BIT(DRM_ROTATE_0), 4251 + &state->scaler_state.scaler_id, DRM_ROTATE_0, 4252 4252 state->pipe_src_w, state->pipe_src_h, 4253 4253 adjusted_mode->crtc_hdisplay, adjusted_mode->crtc_vdisplay); 4254 4254 } ··· 4273 4273 struct drm_framebuffer *fb = plane_state->base.fb; 4274 4274 int ret; 4275 4275 4276 - bool force_detach = !fb || !plane_state->visible; 4276 + bool force_detach = !fb || !plane_state->base.visible; 4277 4277 4278 4278 DRM_DEBUG_KMS("Updating scaler for [PLANE:%d:%s] scaler_user index %u.%u\n", 4279 4279 intel_plane->base.base.id, intel_plane->base.name, ··· 4283 4283 drm_plane_index(&intel_plane->base), 4284 4284 &plane_state->scaler_id, 4285 4285 plane_state->base.rotation, 4286 - drm_rect_width(&plane_state->src) >> 16, 4287 - drm_rect_height(&plane_state->src) >> 16, 4288 - drm_rect_width(&plane_state->dst), 4289 - drm_rect_height(&plane_state->dst)); 4286 + drm_rect_width(&plane_state->base.src) >> 16, 4287 + drm_rect_height(&plane_state->base.src) >> 16, 4288 + drm_rect_width(&plane_state->base.dst), 4289 + drm_rect_height(&plane_state->base.dst)); 4290 4290 4291 4291 if (ret || plane_state->scaler_id < 0) 4292 4292 return ret; ··· 4584 4584 4585 4585 intel_fbc_post_update(crtc); 4586 4586 4587 - if (primary_state->visible && 4587 + if (primary_state->base.visible && 4588 4588 (needs_modeset(&pipe_config->base) || 4589 - !old_primary_state->visible)) 4589 + !old_primary_state->base.visible)) 4590 4590 intel_post_enable_primary(&crtc->base); 4591 4591 } 4592 4592 } ··· 4612 4612 4613 4613 intel_fbc_pre_update(crtc, pipe_config, primary_state); 4614 4614 4615 - if (old_primary_state->visible && 4616 - (modeset || !primary_state->visible)) 4615 + if (old_primary_state->base.visible && 4616 + (modeset || !primary_state->base.visible)) 4617 4617 intel_pre_disable_primary(&crtc->base); 4618 4618 } 4619 4619 ··· 6290 6290 if (!intel_crtc->active) 6291 6291 return; 6292 6292 6293 - if (to_intel_plane_state(crtc->primary->state)->visible) { 6293 + if (to_intel_plane_state(crtc->primary->state)->base.visible) { 6294 6294 WARN_ON(intel_crtc->flip_work); 6295 6295 6296 6296 intel_pre_disable_primary_noatomic(crtc); 6297 6297 6298 6298 intel_crtc_disable_planes(crtc, 1 << drm_plane_index(crtc->primary)); 6299 - to_intel_plane_state(crtc->primary->state)->visible = false; 6299 + to_intel_plane_state(crtc->primary->state)->base.visible = false; 6300 6300 } 6301 6301 6302 6302 dev_priv->display.crtc_disable(crtc); ··· 10170 10170 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 10171 10171 uint32_t cntl = 0, size = 0; 10172 10172 10173 - if (plane_state && plane_state->visible) { 10173 + if (plane_state && plane_state->base.visible) { 10174 10174 unsigned int width = plane_state->base.crtc_w; 10175 10175 unsigned int height = plane_state->base.crtc_h; 10176 10176 unsigned int stride = roundup_pow_of_two(width) * 4; ··· 10234 10234 int pipe = intel_crtc->pipe; 10235 10235 uint32_t cntl = 0; 10236 10236 10237 - if (plane_state && plane_state->visible) { 10237 + if (plane_state && plane_state->base.visible) { 10238 10238 cntl = MCURSOR_GAMMA_ENABLE; 10239 10239 switch (plane_state->base.crtc_w) { 10240 10240 case 64: ··· 10255 10255 if (HAS_DDI(dev)) 10256 10256 cntl |= CURSOR_PIPE_CSC_ENABLE; 10257 10257 10258 - if (plane_state->base.rotation == BIT(DRM_ROTATE_180)) 10258 + if (plane_state->base.rotation == DRM_ROTATE_180) 10259 10259 cntl |= CURSOR_ROTATE_180; 10260 10260 } 10261 10261 ··· 10301 10301 10302 10302 /* ILK+ do this automagically */ 10303 10303 if (HAS_GMCH_DISPLAY(dev) && 10304 - plane_state->base.rotation == BIT(DRM_ROTATE_180)) { 10304 + plane_state->base.rotation == DRM_ROTATE_180) { 10305 10305 base += (plane_state->base.crtc_h * 10306 10306 plane_state->base.crtc_w - 1) * 4; 10307 10307 } ··· 11818 11818 struct intel_plane_state *cur = to_intel_plane_state(plane->state); 11819 11819 11820 11820 /* Update watermarks on tiling or size changes. */ 11821 - if (new->visible != cur->visible) 11821 + if (new->base.visible != cur->base.visible) 11822 11822 return true; 11823 11823 11824 11824 if (!cur->base.fb || !new->base.fb) ··· 11826 11826 11827 11827 if (cur->base.fb->modifier[0] != new->base.fb->modifier[0] || 11828 11828 cur->base.rotation != new->base.rotation || 11829 - drm_rect_width(&new->src) != drm_rect_width(&cur->src) || 11830 - drm_rect_height(&new->src) != drm_rect_height(&cur->src) || 11831 - drm_rect_width(&new->dst) != drm_rect_width(&cur->dst) || 11832 - drm_rect_height(&new->dst) != drm_rect_height(&cur->dst)) 11829 + drm_rect_width(&new->base.src) != drm_rect_width(&cur->base.src) || 11830 + drm_rect_height(&new->base.src) != drm_rect_height(&cur->base.src) || 11831 + drm_rect_width(&new->base.dst) != drm_rect_width(&cur->base.dst) || 11832 + drm_rect_height(&new->base.dst) != drm_rect_height(&cur->base.dst)) 11833 11833 return true; 11834 11834 11835 11835 return false; ··· 11837 11837 11838 11838 static bool needs_scaling(struct intel_plane_state *state) 11839 11839 { 11840 - int src_w = drm_rect_width(&state->src) >> 16; 11841 - int src_h = drm_rect_height(&state->src) >> 16; 11842 - int dst_w = drm_rect_width(&state->dst); 11843 - int dst_h = drm_rect_height(&state->dst); 11840 + int src_w = drm_rect_width(&state->base.src) >> 16; 11841 + int src_h = drm_rect_height(&state->base.src) >> 16; 11842 + int dst_w = drm_rect_width(&state->base.dst); 11843 + int dst_h = drm_rect_height(&state->base.dst); 11844 11844 11845 11845 return (src_w != dst_w || src_h != dst_h); 11846 11846 } ··· 11871 11871 return ret; 11872 11872 } 11873 11873 11874 - was_visible = old_plane_state->visible; 11875 - visible = to_intel_plane_state(plane_state)->visible; 11874 + was_visible = old_plane_state->base.visible; 11875 + visible = to_intel_plane_state(plane_state)->base.visible; 11876 11876 11877 11877 if (!was_crtc_enabled && WARN_ON(was_visible)) 11878 11878 was_visible = false; ··· 11888 11888 * only combine the results from all planes in the current place? 11889 11889 */ 11890 11890 if (!is_crtc_enabled) 11891 - to_intel_plane_state(plane_state)->visible = visible = false; 11891 + to_intel_plane_state(plane_state)->base.visible = visible = false; 11892 11892 11893 11893 if (!was_visible && !visible) 11894 11894 return 0; ··· 12283 12283 drm_get_format_name(fb->pixel_format)); 12284 12284 DRM_DEBUG_KMS("\tscaler:%d src %dx%d+%d+%d dst %dx%d+%d+%d\n", 12285 12285 state->scaler_id, 12286 - state->src.x1 >> 16, state->src.y1 >> 16, 12287 - drm_rect_width(&state->src) >> 16, 12288 - drm_rect_height(&state->src) >> 16, 12289 - state->dst.x1, state->dst.y1, 12290 - drm_rect_width(&state->dst), 12291 - drm_rect_height(&state->dst)); 12286 + state->base.src.x1 >> 16, 12287 + state->base.src.y1 >> 16, 12288 + drm_rect_width(&state->base.src) >> 16, 12289 + drm_rect_height(&state->base.src) >> 16, 12290 + state->base.dst.x1, state->base.dst.y1, 12291 + drm_rect_width(&state->base.dst), 12292 + drm_rect_height(&state->base.dst)); 12292 12293 } 12293 12294 } 12294 12295 ··· 14110 14109 struct intel_plane_state *state) 14111 14110 { 14112 14111 struct drm_crtc *crtc = state->base.crtc; 14113 - struct drm_framebuffer *fb = state->base.fb; 14114 14112 int min_scale = DRM_PLANE_HELPER_NO_SCALING; 14115 14113 int max_scale = DRM_PLANE_HELPER_NO_SCALING; 14116 14114 bool can_position = false; ··· 14123 14123 can_position = true; 14124 14124 } 14125 14125 14126 - return drm_plane_helper_check_update(plane, crtc, fb, &state->src, 14127 - &state->dst, &state->clip, 14128 - state->base.rotation, 14129 - min_scale, max_scale, 14130 - can_position, true, 14131 - &state->visible); 14126 + return drm_plane_helper_check_state(&state->base, 14127 + &state->clip, 14128 + min_scale, max_scale, 14129 + can_position, true); 14132 14130 } 14133 14131 14134 14132 static void intel_begin_crtc_commit(struct drm_crtc *crtc, ··· 14286 14288 void intel_create_rotation_property(struct drm_device *dev, struct intel_plane *plane) 14287 14289 { 14288 14290 if (!dev->mode_config.rotation_property) { 14289 - unsigned long flags = BIT(DRM_ROTATE_0) | 14290 - BIT(DRM_ROTATE_180); 14291 + unsigned long flags = DRM_ROTATE_0 | 14292 + DRM_ROTATE_180; 14291 14293 14292 14294 if (INTEL_INFO(dev)->gen >= 9) 14293 - flags |= BIT(DRM_ROTATE_90) | BIT(DRM_ROTATE_270); 14295 + flags |= DRM_ROTATE_90 | DRM_ROTATE_270; 14294 14296 14295 14297 dev->mode_config.rotation_property = 14296 14298 drm_mode_create_rotation_property(dev, flags); ··· 14306 14308 struct intel_crtc_state *crtc_state, 14307 14309 struct intel_plane_state *state) 14308 14310 { 14309 - struct drm_crtc *crtc = crtc_state->base.crtc; 14310 14311 struct drm_framebuffer *fb = state->base.fb; 14311 14312 struct drm_i915_gem_object *obj = intel_fb_obj(fb); 14312 14313 enum pipe pipe = to_intel_plane(plane)->pipe; 14313 14314 unsigned stride; 14314 14315 int ret; 14315 14316 14316 - ret = drm_plane_helper_check_update(plane, crtc, fb, &state->src, 14317 - &state->dst, &state->clip, 14318 - state->base.rotation, 14319 - DRM_PLANE_HELPER_NO_SCALING, 14320 - DRM_PLANE_HELPER_NO_SCALING, 14321 - true, true, &state->visible); 14317 + ret = drm_plane_helper_check_state(&state->base, 14318 + &state->clip, 14319 + DRM_PLANE_HELPER_NO_SCALING, 14320 + DRM_PLANE_HELPER_NO_SCALING, 14321 + true, true); 14322 14322 if (ret) 14323 14323 return ret; 14324 14324 ··· 14353 14357 * Refuse the put the cursor into that compromised position. 14354 14358 */ 14355 14359 if (IS_CHERRYVIEW(plane->dev) && pipe == PIPE_C && 14356 - state->visible && state->base.crtc_x < 0) { 14360 + state->base.visible && state->base.crtc_x < 0) { 14357 14361 DRM_DEBUG_KMS("CHV cursor C not allowed to straddle the left screen edge\n"); 14358 14362 return -EINVAL; 14359 14363 } ··· 14431 14435 if (!dev->mode_config.rotation_property) 14432 14436 dev->mode_config.rotation_property = 14433 14437 drm_mode_create_rotation_property(dev, 14434 - BIT(DRM_ROTATE_0) | 14435 - BIT(DRM_ROTATE_180)); 14438 + DRM_ROTATE_0 | 14439 + DRM_ROTATE_180); 14436 14440 if (dev->mode_config.rotation_property) 14437 14441 drm_object_attach_property(&cursor->base.base, 14438 14442 dev->mode_config.rotation_property, ··· 15803 15807 * Temporarily change the plane mapping and disable everything 15804 15808 * ... */ 15805 15809 plane = crtc->plane; 15806 - to_intel_plane_state(crtc->base.primary->state)->visible = true; 15810 + to_intel_plane_state(crtc->base.primary->state)->base.visible = true; 15807 15811 crtc->plane = !plane; 15808 15812 intel_crtc_disable_noatomic(&crtc->base); 15809 15813 crtc->plane = plane; ··· 15930 15934 struct intel_plane_state *plane_state = 15931 15935 to_intel_plane_state(primary->state); 15932 15936 15933 - plane_state->visible = crtc->active && 15937 + plane_state->base.visible = crtc->active && 15934 15938 primary_get_hw_state(to_intel_plane(primary)); 15935 15939 15936 - if (plane_state->visible) 15940 + if (plane_state->base.visible) 15937 15941 crtc->base.state->plane_mask |= 1 << drm_plane_index(primary); 15938 15942 } 15939 15943
+1 -4
drivers/gpu/drm/i915/intel_drv.h
··· 338 338 339 339 struct intel_plane_state { 340 340 struct drm_plane_state base; 341 - struct drm_rect src; 342 - struct drm_rect dst; 343 341 struct drm_rect clip; 344 - bool visible; 345 342 346 343 /* 347 344 * scaler_id ··· 1255 1258 static inline bool 1256 1259 intel_rotation_90_or_270(unsigned int rotation) 1257 1260 { 1258 - return rotation & (BIT(DRM_ROTATE_90) | BIT(DRM_ROTATE_270)); 1261 + return rotation & (DRM_ROTATE_90 | DRM_ROTATE_270); 1259 1262 } 1260 1263 1261 1264 void intel_create_rotation_property(struct drm_device *dev,
+7 -7
drivers/gpu/drm/i915/intel_fbc.c
··· 494 494 if (!no_fbc_on_multiple_pipes(dev_priv)) 495 495 return true; 496 496 497 - if (plane_state->visible) 497 + if (plane_state->base.visible) 498 498 fbc->visible_pipes_mask |= (1 << pipe); 499 499 else 500 500 fbc->visible_pipes_mask &= ~(1 << pipe); ··· 725 725 ilk_pipe_pixel_rate(crtc_state); 726 726 727 727 cache->plane.rotation = plane_state->base.rotation; 728 - cache->plane.src_w = drm_rect_width(&plane_state->src) >> 16; 729 - cache->plane.src_h = drm_rect_height(&plane_state->src) >> 16; 730 - cache->plane.visible = plane_state->visible; 728 + cache->plane.src_w = drm_rect_width(&plane_state->base.src) >> 16; 729 + cache->plane.src_h = drm_rect_height(&plane_state->base.src) >> 16; 730 + cache->plane.visible = plane_state->base.visible; 731 731 732 732 if (!cache->plane.visible) 733 733 return; ··· 775 775 return false; 776 776 } 777 777 if (INTEL_INFO(dev_priv)->gen <= 4 && !IS_G4X(dev_priv) && 778 - cache->plane.rotation != BIT(DRM_ROTATE_0)) { 778 + cache->plane.rotation != DRM_ROTATE_0) { 779 779 fbc->no_fbc_reason = "rotation unsupported"; 780 780 return false; 781 781 } ··· 1050 1050 struct intel_plane_state *intel_plane_state = 1051 1051 to_intel_plane_state(plane_state); 1052 1052 1053 - if (!intel_plane_state->visible) 1053 + if (!intel_plane_state->base.visible) 1054 1054 continue; 1055 1055 1056 1056 for_each_crtc_in_state(state, crtc, crtc_state, j) { ··· 1212 1212 1213 1213 for_each_intel_crtc(&dev_priv->drm, crtc) 1214 1214 if (intel_crtc_active(&crtc->base) && 1215 - to_intel_plane_state(crtc->base.primary->state)->visible) 1215 + to_intel_plane_state(crtc->base.primary->state)->base.visible) 1216 1216 dev_priv->fbc.visible_pipes_mask |= (1 << crtc->pipe); 1217 1217 } 1218 1218
+3 -4
drivers/gpu/drm/i915/intel_fbdev.c
··· 34 34 #include <linux/tty.h> 35 35 #include <linux/sysrq.h> 36 36 #include <linux/delay.h> 37 - #include <linux/fb.h> 38 37 #include <linux/init.h> 39 38 #include <linux/vga_switcheroo.h> 40 39 ··· 222 223 * This also validates that any existing fb inherited from the 223 224 * BIOS is suitable for own access. 224 225 */ 225 - ret = intel_pin_and_fence_fb_obj(&ifbdev->fb->base, BIT(DRM_ROTATE_0)); 226 + ret = intel_pin_and_fence_fb_obj(&ifbdev->fb->base, DRM_ROTATE_0); 226 227 if (ret) 227 228 goto out_unlock; 228 229 ··· 288 289 out_destroy_fbi: 289 290 drm_fb_helper_release_fbi(helper); 290 291 out_unpin: 291 - intel_unpin_fb_obj(&ifbdev->fb->base, BIT(DRM_ROTATE_0)); 292 + intel_unpin_fb_obj(&ifbdev->fb->base, DRM_ROTATE_0); 292 293 out_unlock: 293 294 mutex_unlock(&dev->struct_mutex); 294 295 return ret; ··· 553 554 554 555 if (ifbdev->fb) { 555 556 mutex_lock(&ifbdev->helper.dev->struct_mutex); 556 - intel_unpin_fb_obj(&ifbdev->fb->base, BIT(DRM_ROTATE_0)); 557 + intel_unpin_fb_obj(&ifbdev->fb->base, DRM_ROTATE_0); 557 558 mutex_unlock(&ifbdev->helper.dev->struct_mutex); 558 559 559 560 drm_framebuffer_remove(&ifbdev->fb->base);
-1
drivers/gpu/drm/i915/intel_modes.c
··· 25 25 26 26 #include <linux/slab.h> 27 27 #include <linux/i2c.h> 28 - #include <linux/fb.h> 29 28 #include <drm/drm_edid.h> 30 29 #include <drm/drmP.h> 31 30 #include "intel_drv.h"
+30 -30
drivers/gpu/drm/i915/intel_pm.c
··· 960 960 if (dev_priv->wm.pri_latency[level] == 0) 961 961 return USHRT_MAX; 962 962 963 - if (!state->visible) 963 + if (!state->base.visible) 964 964 return 0; 965 965 966 966 cpp = drm_format_plane_cpp(state->base.fb->pixel_format, 0); ··· 1002 1002 if (plane->base.type == DRM_PLANE_TYPE_CURSOR) 1003 1003 continue; 1004 1004 1005 - if (state->visible) { 1005 + if (state->base.visible) { 1006 1006 wm_state->num_active_planes++; 1007 1007 total_rate += drm_format_plane_cpp(state->base.fb->pixel_format, 0); 1008 1008 } ··· 1018 1018 continue; 1019 1019 } 1020 1020 1021 - if (!state->visible) { 1021 + if (!state->base.visible) { 1022 1022 plane->wm.fifo_size = 0; 1023 1023 continue; 1024 1024 } ··· 1118 1118 struct intel_plane_state *state = 1119 1119 to_intel_plane_state(plane->base.state); 1120 1120 1121 - if (!state->visible) 1121 + if (!state->base.visible) 1122 1122 continue; 1123 1123 1124 1124 /* normal watermarks */ ··· 1767 1767 drm_format_plane_cpp(pstate->base.fb->pixel_format, 0) : 0; 1768 1768 uint32_t method1, method2; 1769 1769 1770 - if (!cstate->base.active || !pstate->visible) 1770 + if (!cstate->base.active || !pstate->base.visible) 1771 1771 return 0; 1772 1772 1773 1773 method1 = ilk_wm_method1(ilk_pipe_pixel_rate(cstate), cpp, mem_value); ··· 1777 1777 1778 1778 method2 = ilk_wm_method2(ilk_pipe_pixel_rate(cstate), 1779 1779 cstate->base.adjusted_mode.crtc_htotal, 1780 - drm_rect_width(&pstate->dst), 1780 + drm_rect_width(&pstate->base.dst), 1781 1781 cpp, mem_value); 1782 1782 1783 1783 return min(method1, method2); ··· 1795 1795 drm_format_plane_cpp(pstate->base.fb->pixel_format, 0) : 0; 1796 1796 uint32_t method1, method2; 1797 1797 1798 - if (!cstate->base.active || !pstate->visible) 1798 + if (!cstate->base.active || !pstate->base.visible) 1799 1799 return 0; 1800 1800 1801 1801 method1 = ilk_wm_method1(ilk_pipe_pixel_rate(cstate), cpp, mem_value); 1802 1802 method2 = ilk_wm_method2(ilk_pipe_pixel_rate(cstate), 1803 1803 cstate->base.adjusted_mode.crtc_htotal, 1804 - drm_rect_width(&pstate->dst), 1804 + drm_rect_width(&pstate->base.dst), 1805 1805 cpp, mem_value); 1806 1806 return min(method1, method2); 1807 1807 } ··· 1820 1820 * this is necessary to avoid flickering. 1821 1821 */ 1822 1822 int cpp = 4; 1823 - int width = pstate->visible ? pstate->base.crtc_w : 64; 1823 + int width = pstate->base.visible ? pstate->base.crtc_w : 64; 1824 1824 1825 1825 if (!cstate->base.active) 1826 1826 return 0; ··· 1838 1838 int cpp = pstate->base.fb ? 1839 1839 drm_format_plane_cpp(pstate->base.fb->pixel_format, 0) : 0; 1840 1840 1841 - if (!cstate->base.active || !pstate->visible) 1841 + if (!cstate->base.active || !pstate->base.visible) 1842 1842 return 0; 1843 1843 1844 - return ilk_wm_fbc(pri_val, drm_rect_width(&pstate->dst), cpp); 1844 + return ilk_wm_fbc(pri_val, drm_rect_width(&pstate->base.dst), cpp); 1845 1845 } 1846 1846 1847 1847 static unsigned int ilk_display_fifo_size(const struct drm_device *dev) ··· 2358 2358 2359 2359 pipe_wm->pipe_enabled = cstate->base.active; 2360 2360 if (sprstate) { 2361 - pipe_wm->sprites_enabled = sprstate->visible; 2362 - pipe_wm->sprites_scaled = sprstate->visible && 2363 - (drm_rect_width(&sprstate->dst) != drm_rect_width(&sprstate->src) >> 16 || 2364 - drm_rect_height(&sprstate->dst) != drm_rect_height(&sprstate->src) >> 16); 2361 + pipe_wm->sprites_enabled = sprstate->base.visible; 2362 + pipe_wm->sprites_scaled = sprstate->base.visible && 2363 + (drm_rect_width(&sprstate->base.dst) != drm_rect_width(&sprstate->base.src) >> 16 || 2364 + drm_rect_height(&sprstate->base.dst) != drm_rect_height(&sprstate->base.src) >> 16); 2365 2365 } 2366 2366 2367 2367 usable_level = max_level; ··· 2996 2996 uint32_t downscale_h, downscale_w; 2997 2997 uint32_t src_w, src_h, dst_w, dst_h; 2998 2998 2999 - if (WARN_ON(!pstate->visible)) 2999 + if (WARN_ON(!pstate->base.visible)) 3000 3000 return DRM_PLANE_HELPER_NO_SCALING; 3001 3001 3002 3002 /* n.b., src is 16.16 fixed point, dst is whole integer */ 3003 - src_w = drm_rect_width(&pstate->src); 3004 - src_h = drm_rect_height(&pstate->src); 3005 - dst_w = drm_rect_width(&pstate->dst); 3006 - dst_h = drm_rect_height(&pstate->dst); 3003 + src_w = drm_rect_width(&pstate->base.src); 3004 + src_h = drm_rect_height(&pstate->base.src); 3005 + dst_w = drm_rect_width(&pstate->base.dst); 3006 + dst_h = drm_rect_height(&pstate->base.dst); 3007 3007 if (intel_rotation_90_or_270(pstate->base.rotation)) 3008 3008 swap(dst_w, dst_h); 3009 3009 ··· 3025 3025 uint32_t width = 0, height = 0; 3026 3026 unsigned format = fb ? fb->pixel_format : DRM_FORMAT_XRGB8888; 3027 3027 3028 - if (!intel_pstate->visible) 3028 + if (!intel_pstate->base.visible) 3029 3029 return 0; 3030 3030 if (pstate->plane->type == DRM_PLANE_TYPE_CURSOR) 3031 3031 return 0; 3032 3032 if (y && format != DRM_FORMAT_NV12) 3033 3033 return 0; 3034 3034 3035 - width = drm_rect_width(&intel_pstate->src) >> 16; 3036 - height = drm_rect_height(&intel_pstate->src) >> 16; 3035 + width = drm_rect_width(&intel_pstate->base.src) >> 16; 3036 + height = drm_rect_height(&intel_pstate->base.src) >> 16; 3037 3037 3038 3038 if (intel_rotation_90_or_270(pstate->rotation)) 3039 3039 swap(width, height); ··· 3134 3134 fb->modifier[0] != I915_FORMAT_MOD_Yf_TILED) 3135 3135 return 8; 3136 3136 3137 - src_w = drm_rect_width(&intel_pstate->src) >> 16; 3138 - src_h = drm_rect_height(&intel_pstate->src) >> 16; 3137 + src_w = drm_rect_width(&intel_pstate->base.src) >> 16; 3138 + src_h = drm_rect_height(&intel_pstate->base.src) >> 16; 3139 3139 3140 3140 if (intel_rotation_90_or_270(pstate->rotation)) 3141 3141 swap(src_w, src_h); ··· 3226 3226 if (intel_plane->pipe != pipe) 3227 3227 continue; 3228 3228 3229 - if (!to_intel_plane_state(pstate)->visible) { 3229 + if (!to_intel_plane_state(pstate)->base.visible) { 3230 3230 minimum[id] = 0; 3231 3231 y_minimum[id] = 0; 3232 3232 continue; ··· 3363 3363 uint64_t pixel_rate; 3364 3364 3365 3365 /* Shouldn't reach here on disabled planes... */ 3366 - if (WARN_ON(!pstate->visible)) 3366 + if (WARN_ON(!pstate->base.visible)) 3367 3367 return 0; 3368 3368 3369 3369 /* ··· 3399 3399 uint32_t width = 0, height = 0; 3400 3400 uint32_t plane_pixel_rate; 3401 3401 3402 - if (latency == 0 || !cstate->base.active || !intel_pstate->visible) { 3402 + if (latency == 0 || !cstate->base.active || !intel_pstate->base.visible) { 3403 3403 *enabled = false; 3404 3404 return 0; 3405 3405 } 3406 3406 3407 - width = drm_rect_width(&intel_pstate->src) >> 16; 3408 - height = drm_rect_height(&intel_pstate->src) >> 16; 3407 + width = drm_rect_width(&intel_pstate->base.src) >> 16; 3408 + height = drm_rect_height(&intel_pstate->base.src) >> 16; 3409 3409 3410 3410 if (intel_rotation_90_or_270(pstate->rotation)) 3411 3411 swap(width, height);
+55 -45
drivers/gpu/drm/i915/intel_sprite.c
··· 211 211 u32 tile_height, plane_offset, plane_size; 212 212 unsigned int rotation = plane_state->base.rotation; 213 213 int x_offset, y_offset; 214 - int crtc_x = plane_state->dst.x1; 215 - int crtc_y = plane_state->dst.y1; 216 - uint32_t crtc_w = drm_rect_width(&plane_state->dst); 217 - uint32_t crtc_h = drm_rect_height(&plane_state->dst); 218 - uint32_t x = plane_state->src.x1 >> 16; 219 - uint32_t y = plane_state->src.y1 >> 16; 220 - uint32_t src_w = drm_rect_width(&plane_state->src) >> 16; 221 - uint32_t src_h = drm_rect_height(&plane_state->src) >> 16; 214 + int crtc_x = plane_state->base.dst.x1; 215 + int crtc_y = plane_state->base.dst.y1; 216 + uint32_t crtc_w = drm_rect_width(&plane_state->base.dst); 217 + uint32_t crtc_h = drm_rect_height(&plane_state->base.dst); 218 + uint32_t x = plane_state->base.src.x1 >> 16; 219 + uint32_t y = plane_state->base.src.y1 >> 16; 220 + uint32_t src_w = drm_rect_width(&plane_state->base.src) >> 16; 221 + uint32_t src_h = drm_rect_height(&plane_state->base.src) >> 16; 222 222 223 223 plane_ctl = PLANE_CTL_ENABLE | 224 224 PLANE_CTL_PIPE_GAMMA_ENABLE | ··· 370 370 unsigned int rotation = dplane->state->rotation; 371 371 int cpp = drm_format_plane_cpp(fb->pixel_format, 0); 372 372 const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; 373 - int crtc_x = plane_state->dst.x1; 374 - int crtc_y = plane_state->dst.y1; 375 - uint32_t crtc_w = drm_rect_width(&plane_state->dst); 376 - uint32_t crtc_h = drm_rect_height(&plane_state->dst); 377 - uint32_t x = plane_state->src.x1 >> 16; 378 - uint32_t y = plane_state->src.y1 >> 16; 379 - uint32_t src_w = drm_rect_width(&plane_state->src) >> 16; 380 - uint32_t src_h = drm_rect_height(&plane_state->src) >> 16; 373 + int crtc_x = plane_state->base.dst.x1; 374 + int crtc_y = plane_state->base.dst.y1; 375 + uint32_t crtc_w = drm_rect_width(&plane_state->base.dst); 376 + uint32_t crtc_h = drm_rect_height(&plane_state->base.dst); 377 + uint32_t x = plane_state->base.src.x1 >> 16; 378 + uint32_t y = plane_state->base.src.y1 >> 16; 379 + uint32_t src_w = drm_rect_width(&plane_state->base.src) >> 16; 380 + uint32_t src_h = drm_rect_height(&plane_state->base.src) >> 16; 381 381 382 382 sprctl = SP_ENABLE; 383 383 ··· 444 444 fb->pitches[0], rotation); 445 445 linear_offset -= sprsurf_offset; 446 446 447 - if (rotation == BIT(DRM_ROTATE_180)) { 447 + if (rotation == DRM_ROTATE_180) { 448 448 sprctl |= SP_ROTATE_180; 449 449 450 450 x += src_w; ··· 512 512 unsigned int rotation = plane_state->base.rotation; 513 513 int cpp = drm_format_plane_cpp(fb->pixel_format, 0); 514 514 const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; 515 - int crtc_x = plane_state->dst.x1; 516 - int crtc_y = plane_state->dst.y1; 517 - uint32_t crtc_w = drm_rect_width(&plane_state->dst); 518 - uint32_t crtc_h = drm_rect_height(&plane_state->dst); 519 - uint32_t x = plane_state->src.x1 >> 16; 520 - uint32_t y = plane_state->src.y1 >> 16; 521 - uint32_t src_w = drm_rect_width(&plane_state->src) >> 16; 522 - uint32_t src_h = drm_rect_height(&plane_state->src) >> 16; 515 + int crtc_x = plane_state->base.dst.x1; 516 + int crtc_y = plane_state->base.dst.y1; 517 + uint32_t crtc_w = drm_rect_width(&plane_state->base.dst); 518 + uint32_t crtc_h = drm_rect_height(&plane_state->base.dst); 519 + uint32_t x = plane_state->base.src.x1 >> 16; 520 + uint32_t y = plane_state->base.src.y1 >> 16; 521 + uint32_t src_w = drm_rect_width(&plane_state->base.src) >> 16; 522 + uint32_t src_h = drm_rect_height(&plane_state->base.src) >> 16; 523 523 524 524 sprctl = SPRITE_ENABLE; 525 525 ··· 577 577 fb->pitches[0], rotation); 578 578 linear_offset -= sprsurf_offset; 579 579 580 - if (rotation == BIT(DRM_ROTATE_180)) { 580 + if (rotation == DRM_ROTATE_180) { 581 581 sprctl |= SPRITE_ROTATE_180; 582 582 583 583 /* HSW and BDW does this automagically in hardware */ ··· 653 653 unsigned int rotation = plane_state->base.rotation; 654 654 int cpp = drm_format_plane_cpp(fb->pixel_format, 0); 655 655 const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; 656 - int crtc_x = plane_state->dst.x1; 657 - int crtc_y = plane_state->dst.y1; 658 - uint32_t crtc_w = drm_rect_width(&plane_state->dst); 659 - uint32_t crtc_h = drm_rect_height(&plane_state->dst); 660 - uint32_t x = plane_state->src.x1 >> 16; 661 - uint32_t y = plane_state->src.y1 >> 16; 662 - uint32_t src_w = drm_rect_width(&plane_state->src) >> 16; 663 - uint32_t src_h = drm_rect_height(&plane_state->src) >> 16; 656 + int crtc_x = plane_state->base.dst.x1; 657 + int crtc_y = plane_state->base.dst.y1; 658 + uint32_t crtc_w = drm_rect_width(&plane_state->base.dst); 659 + uint32_t crtc_h = drm_rect_height(&plane_state->base.dst); 660 + uint32_t x = plane_state->base.src.x1 >> 16; 661 + uint32_t y = plane_state->base.src.y1 >> 16; 662 + uint32_t src_w = drm_rect_width(&plane_state->base.src) >> 16; 663 + uint32_t src_h = drm_rect_height(&plane_state->base.src) >> 16; 664 664 665 665 dvscntr = DVS_ENABLE; 666 666 ··· 714 714 fb->pitches[0], rotation); 715 715 linear_offset -= dvssurf_offset; 716 716 717 - if (rotation == BIT(DRM_ROTATE_180)) { 717 + if (rotation == DRM_ROTATE_180) { 718 718 dvscntr |= DVS_ROTATE_180; 719 719 720 720 x += src_w; ··· 778 778 int crtc_x, crtc_y; 779 779 unsigned int crtc_w, crtc_h; 780 780 uint32_t src_x, src_y, src_w, src_h; 781 - struct drm_rect *src = &state->src; 782 - struct drm_rect *dst = &state->dst; 781 + struct drm_rect *src = &state->base.src; 782 + struct drm_rect *dst = &state->base.dst; 783 783 const struct drm_rect *clip = &state->clip; 784 784 int hscale, vscale; 785 785 int max_scale, min_scale; 786 786 bool can_scale; 787 787 788 + src->x1 = state->base.src_x; 789 + src->y1 = state->base.src_y; 790 + src->x2 = state->base.src_x + state->base.src_w; 791 + src->y2 = state->base.src_y + state->base.src_h; 792 + 793 + dst->x1 = state->base.crtc_x; 794 + dst->y1 = state->base.crtc_y; 795 + dst->x2 = state->base.crtc_x + state->base.crtc_w; 796 + dst->y2 = state->base.crtc_y + state->base.crtc_h; 797 + 788 798 if (!fb) { 789 - state->visible = false; 799 + state->base.visible = false; 790 800 return 0; 791 801 } 792 802 ··· 844 834 vscale = drm_rect_calc_vscale_relaxed(src, dst, min_scale, max_scale); 845 835 BUG_ON(vscale < 0); 846 836 847 - state->visible = drm_rect_clip_scaled(src, dst, clip, hscale, vscale); 837 + state->base.visible = drm_rect_clip_scaled(src, dst, clip, hscale, vscale); 848 838 849 839 crtc_x = dst->x1; 850 840 crtc_y = dst->y1; 851 841 crtc_w = drm_rect_width(dst); 852 842 crtc_h = drm_rect_height(dst); 853 843 854 - if (state->visible) { 844 + if (state->base.visible) { 855 845 /* check again in case clipping clamped the results */ 856 846 hscale = drm_rect_calc_hscale(src, dst, min_scale, max_scale); 857 847 if (hscale < 0) { ··· 908 898 crtc_w &= ~1; 909 899 910 900 if (crtc_w == 0) 911 - state->visible = false; 901 + state->base.visible = false; 912 902 } 913 903 } 914 904 915 905 /* Check size restrictions when scaling */ 916 - if (state->visible && (src_w != crtc_w || src_h != crtc_h)) { 906 + if (state->base.visible && (src_w != crtc_w || src_h != crtc_h)) { 917 907 unsigned int width_bytes; 918 908 int cpp = drm_format_plane_cpp(fb->pixel_format, 0); 919 909 ··· 922 912 /* FIXME interlacing min height is 6 */ 923 913 924 914 if (crtc_w < 3 || crtc_h < 3) 925 - state->visible = false; 915 + state->base.visible = false; 926 916 927 917 if (src_w < 3 || src_h < 3) 928 - state->visible = false; 918 + state->base.visible = false; 929 919 930 920 width_bytes = ((src_x * cpp) & 63) + src_w * cpp; 931 921 ··· 936 926 } 937 927 } 938 928 939 - if (state->visible) { 929 + if (state->base.visible) { 940 930 src->x1 = src_x << 16; 941 931 src->x2 = (src_x + src_w) << 16; 942 932 src->y1 = src_y << 16;
-1
drivers/gpu/drm/imx/imx-drm-core.c
··· 16 16 #include <linux/component.h> 17 17 #include <linux/device.h> 18 18 #include <linux/dma-buf.h> 19 - #include <linux/fb.h> 20 19 #include <linux/module.h> 21 20 #include <linux/platform_device.h> 22 21 #include <linux/reservation.h>
-1
drivers/gpu/drm/imx/ipuv3-crtc.c
··· 21 21 #include <drm/drm_atomic.h> 22 22 #include <drm/drm_atomic_helper.h> 23 23 #include <drm/drm_crtc_helper.h> 24 - #include <linux/fb.h> 25 24 #include <linux/clk.h> 26 25 #include <linux/errno.h> 27 26 #include <drm/drm_gem_cma_helper.h>
+10 -11
drivers/gpu/drm/mediatek/mtk_drm_crtc.c
··· 31 31 * struct mtk_drm_crtc - MediaTek specific crtc structure. 32 32 * @base: crtc object. 33 33 * @enabled: records whether crtc_enable succeeded 34 - * @planes: array of 4 mtk_drm_plane structures, one for each overlay plane 34 + * @planes: array of 4 drm_plane structures, one for each overlay plane 35 35 * @pending_planes: whether any plane has pending changes to be applied 36 36 * @config_regs: memory mapped mmsys configuration register space 37 37 * @mutex: handle to one of the ten disp_mutex streams ··· 45 45 bool pending_needs_vblank; 46 46 struct drm_pending_vblank_event *event; 47 47 48 - struct mtk_drm_plane planes[OVL_LAYER_NR]; 48 + struct drm_plane planes[OVL_LAYER_NR]; 49 49 bool pending_planes; 50 50 51 51 void __iomem *config_regs; ··· 112 112 struct mtk_crtc_state *state; 113 113 114 114 if (crtc->state) { 115 - if (crtc->state->mode_blob) 116 - drm_property_unreference_blob(crtc->state->mode_blob); 115 + __drm_atomic_helper_crtc_destroy_state(crtc->state); 117 116 118 117 state = to_mtk_crtc_state(crtc->state); 119 118 memset(state, 0, sizeof(*state)); ··· 286 287 287 288 /* Initially configure all planes */ 288 289 for (i = 0; i < OVL_LAYER_NR; i++) { 289 - struct drm_plane *plane = &mtk_crtc->planes[i].base; 290 + struct drm_plane *plane = &mtk_crtc->planes[i]; 290 291 struct mtk_plane_state *plane_state; 291 292 292 293 plane_state = to_mtk_plane_state(plane->state); ··· 365 366 366 367 /* Set all pending plane state to disabled */ 367 368 for (i = 0; i < OVL_LAYER_NR; i++) { 368 - struct drm_plane *plane = &mtk_crtc->planes[i].base; 369 + struct drm_plane *plane = &mtk_crtc->planes[i]; 369 370 struct mtk_plane_state *plane_state; 370 371 371 372 plane_state = to_mtk_plane_state(plane->state); ··· 411 412 if (mtk_crtc->event) 412 413 mtk_crtc->pending_needs_vblank = true; 413 414 for (i = 0; i < OVL_LAYER_NR; i++) { 414 - struct drm_plane *plane = &mtk_crtc->planes[i].base; 415 + struct drm_plane *plane = &mtk_crtc->planes[i]; 415 416 struct mtk_plane_state *plane_state; 416 417 417 418 plane_state = to_mtk_plane_state(plane->state); ··· 489 490 490 491 if (mtk_crtc->pending_planes) { 491 492 for (i = 0; i < OVL_LAYER_NR; i++) { 492 - struct drm_plane *plane = &mtk_crtc->planes[i].base; 493 + struct drm_plane *plane = &mtk_crtc->planes[i]; 493 494 struct mtk_plane_state *plane_state; 494 495 495 496 plane_state = to_mtk_plane_state(plane->state); ··· 577 578 (zpos == 1) ? DRM_PLANE_TYPE_CURSOR : 578 579 DRM_PLANE_TYPE_OVERLAY; 579 580 ret = mtk_plane_init(drm_dev, &mtk_crtc->planes[zpos], 580 - BIT(pipe), type, zpos); 581 + BIT(pipe), type); 581 582 if (ret) 582 583 goto unprepare; 583 584 } 584 585 585 - ret = mtk_drm_crtc_init(drm_dev, mtk_crtc, &mtk_crtc->planes[0].base, 586 - &mtk_crtc->planes[1].base, pipe); 586 + ret = mtk_drm_crtc_init(drm_dev, mtk_crtc, &mtk_crtc->planes[0], 587 + &mtk_crtc->planes[1], pipe); 587 588 if (ret < 0) 588 589 goto unprepare; 589 590 drm_mode_crtc_set_gamma_size(&mtk_crtc->base, MTK_LUT_SIZE);
-1
drivers/gpu/drm/mediatek/mtk_drm_crtc.h
··· 25 25 26 26 int mtk_drm_crtc_enable_vblank(struct drm_device *drm, unsigned int pipe); 27 27 void mtk_drm_crtc_disable_vblank(struct drm_device *drm, unsigned int pipe); 28 - void mtk_drm_crtc_check_flush(struct drm_crtc *crtc); 29 28 void mtk_drm_crtc_commit(struct drm_crtc *crtc); 30 29 void mtk_crtc_ddp_irq(struct drm_crtc *crtc, struct mtk_ddp_comp *ovl); 31 30 int mtk_drm_crtc_create(struct drm_device *drm_dev,
+16 -1
drivers/gpu/drm/mediatek/mtk_drm_drv.c
··· 61 61 62 62 mtk_atomic_wait_for_fences(state); 63 63 64 + /* 65 + * Mediatek drm supports runtime PM, so plane registers cannot be 66 + * written when their crtc is disabled. 67 + * 68 + * The comment for drm_atomic_helper_commit states: 69 + * For drivers supporting runtime PM the recommended sequence is 70 + * 71 + * drm_atomic_helper_commit_modeset_disables(dev, state); 72 + * drm_atomic_helper_commit_modeset_enables(dev, state); 73 + * drm_atomic_helper_commit_planes(dev, state, true); 74 + * 75 + * See the kerneldoc entries for these three functions for more details. 76 + */ 64 77 drm_atomic_helper_commit_modeset_disables(drm, state); 65 - drm_atomic_helper_commit_planes(drm, state, false); 66 78 drm_atomic_helper_commit_modeset_enables(drm, state); 79 + drm_atomic_helper_commit_planes(drm, state, true); 80 + 67 81 drm_atomic_helper_wait_for_vblanks(drm, state); 82 + 68 83 drm_atomic_helper_cleanup_planes(drm, state); 69 84 drm_atomic_state_free(state); 70 85 }
+32 -88
drivers/gpu/drm/mediatek/mtk_drm_plane.c
··· 30 30 DRM_FORMAT_RGB565, 31 31 }; 32 32 33 - static void mtk_plane_enable(struct mtk_drm_plane *mtk_plane, bool enable, 34 - dma_addr_t addr, struct drm_rect *dest) 35 - { 36 - struct drm_plane *plane = &mtk_plane->base; 37 - struct mtk_plane_state *state = to_mtk_plane_state(plane->state); 38 - unsigned int pitch, format; 39 - int x, y; 40 - 41 - if (WARN_ON(!plane->state || (enable && !plane->state->fb))) 42 - return; 43 - 44 - if (plane->state->fb) { 45 - pitch = plane->state->fb->pitches[0]; 46 - format = plane->state->fb->pixel_format; 47 - } else { 48 - pitch = 0; 49 - format = DRM_FORMAT_RGBA8888; 50 - } 51 - 52 - x = plane->state->crtc_x; 53 - y = plane->state->crtc_y; 54 - 55 - if (x < 0) { 56 - addr -= x * 4; 57 - x = 0; 58 - } 59 - 60 - if (y < 0) { 61 - addr -= y * pitch; 62 - y = 0; 63 - } 64 - 65 - state->pending.enable = enable; 66 - state->pending.pitch = pitch; 67 - state->pending.format = format; 68 - state->pending.addr = addr; 69 - state->pending.x = x; 70 - state->pending.y = y; 71 - state->pending.width = dest->x2 - dest->x1; 72 - state->pending.height = dest->y2 - dest->y1; 73 - wmb(); /* Make sure the above parameters are set before update */ 74 - state->pending.dirty = true; 75 - } 76 - 77 33 static void mtk_plane_reset(struct drm_plane *plane) 78 34 { 79 35 struct mtk_plane_state *state; 80 36 81 37 if (plane->state) { 82 - if (plane->state->fb) 83 - drm_framebuffer_unreference(plane->state->fb); 38 + __drm_atomic_helper_plane_destroy_state(plane->state); 84 39 85 40 state = to_mtk_plane_state(plane->state); 86 41 memset(state, 0, sizeof(*state)); ··· 89 134 { 90 135 struct drm_framebuffer *fb = state->fb; 91 136 struct drm_crtc_state *crtc_state; 92 - bool visible; 93 - struct drm_rect dest = { 94 - .x1 = state->crtc_x, 95 - .y1 = state->crtc_y, 96 - .x2 = state->crtc_x + state->crtc_w, 97 - .y2 = state->crtc_y + state->crtc_h, 98 - }; 99 - struct drm_rect src = { 100 - /* 16.16 fixed point */ 101 - .x1 = state->src_x, 102 - .y1 = state->src_y, 103 - .x2 = state->src_x + state->src_w, 104 - .y2 = state->src_y + state->src_h, 105 - }; 106 137 struct drm_rect clip = { 0, }; 107 138 108 139 if (!fb) ··· 109 168 clip.x2 = crtc_state->mode.hdisplay; 110 169 clip.y2 = crtc_state->mode.vdisplay; 111 170 112 - return drm_plane_helper_check_update(plane, state->crtc, fb, 113 - &src, &dest, &clip, 114 - state->rotation, 115 - DRM_PLANE_HELPER_NO_SCALING, 116 - DRM_PLANE_HELPER_NO_SCALING, 117 - true, true, &visible); 171 + return drm_plane_helper_check_state(state, &clip, 172 + DRM_PLANE_HELPER_NO_SCALING, 173 + DRM_PLANE_HELPER_NO_SCALING, 174 + true, true); 118 175 } 119 176 120 177 static void mtk_plane_atomic_update(struct drm_plane *plane, 121 178 struct drm_plane_state *old_state) 122 179 { 123 180 struct mtk_plane_state *state = to_mtk_plane_state(plane->state); 124 - struct drm_crtc *crtc = state->base.crtc; 181 + struct drm_crtc *crtc = plane->state->crtc; 182 + struct drm_framebuffer *fb = plane->state->fb; 125 183 struct drm_gem_object *gem; 126 184 struct mtk_drm_gem_obj *mtk_gem; 127 - struct mtk_drm_plane *mtk_plane = to_mtk_plane(plane); 128 - struct drm_rect dest = { 129 - .x1 = state->base.crtc_x, 130 - .y1 = state->base.crtc_y, 131 - .x2 = state->base.crtc_x + state->base.crtc_w, 132 - .y2 = state->base.crtc_y + state->base.crtc_h, 133 - }; 134 - struct drm_rect clip = { 0, }; 185 + unsigned int pitch, format; 186 + dma_addr_t addr; 135 187 136 - if (!crtc) 188 + if (!crtc || WARN_ON(!fb)) 137 189 return; 138 190 139 - clip.x2 = state->base.crtc->state->mode.hdisplay; 140 - clip.y2 = state->base.crtc->state->mode.vdisplay; 141 - drm_rect_intersect(&dest, &clip); 142 - 143 - gem = mtk_fb_get_gem_obj(state->base.fb); 191 + gem = mtk_fb_get_gem_obj(fb); 144 192 mtk_gem = to_mtk_gem_obj(gem); 145 - mtk_plane_enable(mtk_plane, true, mtk_gem->dma_addr, &dest); 193 + addr = mtk_gem->dma_addr; 194 + pitch = fb->pitches[0]; 195 + format = fb->pixel_format; 196 + 197 + addr += (plane->state->src.x1 >> 16) * drm_format_plane_cpp(format, 0); 198 + addr += (plane->state->src.y1 >> 16) * pitch; 199 + 200 + state->pending.enable = true; 201 + state->pending.pitch = pitch; 202 + state->pending.format = format; 203 + state->pending.addr = addr; 204 + state->pending.x = plane->state->dst.x1; 205 + state->pending.y = plane->state->dst.y1; 206 + state->pending.width = drm_rect_width(&plane->state->dst); 207 + state->pending.height = drm_rect_height(&plane->state->dst); 208 + wmb(); /* Make sure the above parameters are set before update */ 209 + state->pending.dirty = true; 146 210 } 147 211 148 212 static void mtk_plane_atomic_disable(struct drm_plane *plane, ··· 166 220 .atomic_disable = mtk_plane_atomic_disable, 167 221 }; 168 222 169 - int mtk_plane_init(struct drm_device *dev, struct mtk_drm_plane *mtk_plane, 170 - unsigned long possible_crtcs, enum drm_plane_type type, 171 - unsigned int zpos) 223 + int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane, 224 + unsigned long possible_crtcs, enum drm_plane_type type) 172 225 { 173 226 int err; 174 227 175 - err = drm_universal_plane_init(dev, &mtk_plane->base, possible_crtcs, 228 + err = drm_universal_plane_init(dev, plane, possible_crtcs, 176 229 &mtk_plane_funcs, formats, 177 230 ARRAY_SIZE(formats), type, NULL); 178 231 if (err) { ··· 179 234 return err; 180 235 } 181 236 182 - drm_plane_helper_add(&mtk_plane->base, &mtk_plane_helper_funcs); 183 - mtk_plane->idx = zpos; 237 + drm_plane_helper_add(plane, &mtk_plane_helper_funcs); 184 238 185 239 return 0; 186 240 }
+2 -13
drivers/gpu/drm/mediatek/mtk_drm_plane.h
··· 18 18 #include <drm/drm_crtc.h> 19 19 #include <linux/types.h> 20 20 21 - struct mtk_drm_plane { 22 - struct drm_plane base; 23 - unsigned int idx; 24 - }; 25 - 26 21 struct mtk_plane_pending_state { 27 22 bool config; 28 23 bool enable; ··· 36 41 struct mtk_plane_pending_state pending; 37 42 }; 38 43 39 - static inline struct mtk_drm_plane *to_mtk_plane(struct drm_plane *plane) 40 - { 41 - return container_of(plane, struct mtk_drm_plane, base); 42 - } 43 - 44 44 static inline struct mtk_plane_state * 45 45 to_mtk_plane_state(struct drm_plane_state *state) 46 46 { 47 47 return container_of(state, struct mtk_plane_state, base); 48 48 } 49 49 50 - int mtk_plane_init(struct drm_device *dev, struct mtk_drm_plane *mtk_plane, 51 - unsigned long possible_crtcs, enum drm_plane_type type, 52 - unsigned int zpos); 50 + int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane, 51 + unsigned long possible_crtcs, enum drm_plane_type type); 53 52 54 53 #endif
+1 -1
drivers/gpu/drm/mga/mga_drv.c
··· 58 58 59 59 static struct drm_driver driver = { 60 60 .driver_features = 61 - DRIVER_USE_AGP | DRIVER_PCI_DMA | 61 + DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_LEGACY | 62 62 DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED, 63 63 .dev_priv_size = sizeof(drm_mga_buf_priv_t), 64 64 .load = mga_driver_load,
+1 -1
drivers/gpu/drm/mgag200/mgag200_drv.c
··· 56 56 #ifdef CONFIG_X86 57 57 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 58 58 #endif 59 - remove_conflicting_framebuffers(ap, "mgag200drmfb", primary); 59 + drm_fb_helper_remove_conflicting_framebuffers(ap, "mgag200drmfb", primary); 60 60 kfree(ap); 61 61 } 62 62
-2
drivers/gpu/drm/mgag200/mgag200_fb.c
··· 15 15 #include <drm/drm_fb_helper.h> 16 16 #include <drm/drm_crtc_helper.h> 17 17 18 - #include <linux/fb.h> 19 - 20 18 #include "mgag200_drv.h" 21 19 22 20 static void mga_dirty_update(struct mga_fbdev *mfbdev,
+1 -1
drivers/gpu/drm/mgag200/mgag200_main.c
··· 135 135 aper->ranges[0].base = mdev->mc.vram_base; 136 136 aper->ranges[0].size = mdev->mc.vram_window; 137 137 138 - remove_conflicting_framebuffers(aper, "mgafb", true); 138 + drm_fb_helper_remove_conflicting_framebuffers(aper, "mgafb", true); 139 139 kfree(aper); 140 140 141 141 if (!devm_request_mem_region(mdev->dev->dev, mdev->mc.vram_base, mdev->mc.vram_window,
+5 -5
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
··· 78 78 if (!dev->mode_config.rotation_property) 79 79 dev->mode_config.rotation_property = 80 80 drm_mode_create_rotation_property(dev, 81 - BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y)); 81 + DRM_REFLECT_X | DRM_REFLECT_Y); 82 82 83 83 if (dev->mode_config.rotation_property) 84 84 drm_object_attach_property(&plane->base, ··· 309 309 return -EINVAL; 310 310 } 311 311 312 - hflip = !!(state->rotation & BIT(DRM_REFLECT_X)); 313 - vflip = !!(state->rotation & BIT(DRM_REFLECT_Y)); 312 + hflip = !!(state->rotation & DRM_REFLECT_X); 313 + vflip = !!(state->rotation & DRM_REFLECT_Y); 314 314 if ((vflip && !(mdp5_plane->caps & MDP_PIPE_CAP_VFLIP)) || 315 315 (hflip && !(mdp5_plane->caps & MDP_PIPE_CAP_HFLIP))) { 316 316 dev_err(plane->dev->dev, ··· 743 743 config |= get_scale_config(format, src_h, crtc_h, false); 744 744 DBG("scale config = %x", config); 745 745 746 - hflip = !!(pstate->rotation & BIT(DRM_REFLECT_X)); 747 - vflip = !!(pstate->rotation & BIT(DRM_REFLECT_Y)); 746 + hflip = !!(pstate->rotation & DRM_REFLECT_X); 747 + vflip = !!(pstate->rotation & DRM_REFLECT_Y); 748 748 749 749 spin_lock_irqsave(&mdp5_plane->pipe_lock, flags); 750 750
+1 -1
drivers/gpu/drm/nouveau/nouveau_drm.c
··· 351 351 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 352 352 #endif 353 353 if (nouveau_modeset != 2) 354 - remove_conflicting_framebuffers(aper, "nouveaufb", boot); 354 + drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot); 355 355 kfree(aper); 356 356 357 357 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
-1
drivers/gpu/drm/nouveau/nouveau_fbcon.c
··· 32 32 #include <linux/tty.h> 33 33 #include <linux/sysrq.h> 34 34 #include <linux/delay.h> 35 - #include <linux/fb.h> 36 35 #include <linux/init.h> 37 36 #include <linux/screen_info.h> 38 37 #include <linux/vga_switcheroo.h>
-1
drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
··· 13 13 14 14 #include <linux/backlight.h> 15 15 #include <linux/delay.h> 16 - #include <linux/fb.h> 17 16 #include <linux/gpio/consumer.h> 18 17 #include <linux/interrupt.h> 19 18 #include <linux/jiffies.h>
-1
drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
··· 14 14 #include <linux/module.h> 15 15 #include <linux/delay.h> 16 16 #include <linux/spi/spi.h> 17 - #include <linux/fb.h> 18 17 #include <linux/gpio/consumer.h> 19 18 #include <linux/of_gpio.h> 20 19
-1
drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
··· 28 28 #include <linux/jiffies.h> 29 29 #include <linux/sched.h> 30 30 #include <linux/backlight.h> 31 - #include <linux/fb.h> 32 31 #include <linux/gpio/consumer.h> 33 32 #include <linux/of.h> 34 33 #include <linux/of_gpio.h>
+3 -4
drivers/gpu/drm/omapdrm/dss/dss-of.c
··· 125 125 126 126 static struct device_node *omapdss_of_get_remote_port(const struct device_node *node) 127 127 { 128 - struct device_node *np, *np_parent; 128 + struct device_node *np; 129 129 130 130 np = of_parse_phandle(node, "remote-endpoint", 0); 131 131 if (!np) 132 132 return NULL; 133 133 134 - np_parent = of_get_next_parent(np); 135 - of_node_put(np); 134 + np = of_get_next_parent(np); 136 135 137 - return np_parent; 136 + return np; 138 137 } 139 138 140 139 struct device_node *
+3 -3
drivers/gpu/drm/omapdrm/omap_drv.c
··· 295 295 if (priv->has_dmm) { 296 296 dev->mode_config.rotation_property = 297 297 drm_mode_create_rotation_property(dev, 298 - BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_90) | 299 - BIT(DRM_ROTATE_180) | BIT(DRM_ROTATE_270) | 300 - BIT(DRM_REFLECT_X) | BIT(DRM_REFLECT_Y)); 298 + DRM_ROTATE_0 | DRM_ROTATE_90 | 299 + DRM_ROTATE_180 | DRM_ROTATE_270 | 300 + DRM_REFLECT_X | DRM_REFLECT_Y); 301 301 if (!dev->mode_config.rotation_property) 302 302 return -ENOMEM; 303 303 }
+7 -7
drivers/gpu/drm/omapdrm/omap_fb.c
··· 179 179 (uint32_t)win->rotation); 180 180 /* fallthru to default to no rotation */ 181 181 case 0: 182 - case BIT(DRM_ROTATE_0): 182 + case DRM_ROTATE_0: 183 183 orient = 0; 184 184 break; 185 - case BIT(DRM_ROTATE_90): 185 + case DRM_ROTATE_90: 186 186 orient = MASK_XY_FLIP | MASK_X_INVERT; 187 187 break; 188 - case BIT(DRM_ROTATE_180): 188 + case DRM_ROTATE_180: 189 189 orient = MASK_X_INVERT | MASK_Y_INVERT; 190 190 break; 191 - case BIT(DRM_ROTATE_270): 191 + case DRM_ROTATE_270: 192 192 orient = MASK_XY_FLIP | MASK_Y_INVERT; 193 193 break; 194 194 } 195 195 196 - if (win->rotation & BIT(DRM_REFLECT_X)) 196 + if (win->rotation & DRM_REFLECT_X) 197 197 orient ^= MASK_X_INVERT; 198 198 199 - if (win->rotation & BIT(DRM_REFLECT_Y)) 199 + if (win->rotation & DRM_REFLECT_Y) 200 200 orient ^= MASK_Y_INVERT; 201 201 202 202 /* adjust x,y offset for flip/invert: */ ··· 213 213 } else { 214 214 switch (win->rotation & DRM_ROTATE_MASK) { 215 215 case 0: 216 - case BIT(DRM_ROTATE_0): 216 + case DRM_ROTATE_0: 217 217 /* OK */ 218 218 break; 219 219
+5 -5
drivers/gpu/drm/omapdrm/omap_plane.c
··· 109 109 win.src_y = state->src_y >> 16; 110 110 111 111 switch (state->rotation & DRM_ROTATE_MASK) { 112 - case BIT(DRM_ROTATE_90): 113 - case BIT(DRM_ROTATE_270): 112 + case DRM_ROTATE_90: 113 + case DRM_ROTATE_270: 114 114 win.src_w = state->src_h >> 16; 115 115 win.src_h = state->src_w >> 16; 116 116 break; ··· 149 149 struct omap_plane_state *omap_state = to_omap_plane_state(plane->state); 150 150 struct omap_plane *omap_plane = to_omap_plane(plane); 151 151 152 - plane->state->rotation = BIT(DRM_ROTATE_0); 152 + plane->state->rotation = DRM_ROTATE_0; 153 153 omap_state->zorder = plane->type == DRM_PLANE_TYPE_PRIMARY 154 154 ? 0 : omap_plane->id; 155 155 ··· 178 178 return -EINVAL; 179 179 180 180 if (state->fb) { 181 - if (state->rotation != BIT(DRM_ROTATE_0) && 181 + if (state->rotation != DRM_ROTATE_0 && 182 182 !omap_framebuffer_supports_rotation(state->fb)) 183 183 return -EINVAL; 184 184 } ··· 269 269 */ 270 270 omap_state->zorder = plane->type == DRM_PLANE_TYPE_PRIMARY 271 271 ? 0 : omap_plane->id; 272 - omap_state->base.rotation = BIT(DRM_ROTATE_0); 272 + omap_state->base.rotation = DRM_ROTATE_0; 273 273 274 274 plane->state = &omap_state->base; 275 275 plane->state->plane = plane;
+4 -1
drivers/gpu/drm/qxl/qxl_fb.c
··· 24 24 * David Airlie 25 25 */ 26 26 #include <linux/module.h> 27 - #include <linux/fb.h> 28 27 29 28 #include "drmP.h" 30 29 #include "drm/drm.h" ··· 72 73 } 73 74 } 74 75 76 + #ifdef CONFIG_DRM_FBDEV_EMULATION 75 77 static struct fb_deferred_io qxl_defio = { 76 78 .delay = QXL_DIRTY_DELAY, 77 79 .deferred_io = drm_fb_helper_deferred_io, 78 80 }; 81 + #endif 79 82 80 83 static struct fb_ops qxlfb_ops = { 81 84 .owner = THIS_MODULE, ··· 314 313 goto out_destroy_fbi; 315 314 } 316 315 316 + #ifdef CONFIG_DRM_FBDEV_EMULATION 317 317 info->fbdefio = &qxl_defio; 318 318 fb_deferred_io_init(info); 319 + #endif 319 320 320 321 qdev->fbdev_info = info; 321 322 qdev->fbdev_qfb = &qfbdev->qfb;
+1 -1
drivers/gpu/drm/r128/r128_drv.c
··· 56 56 57 57 static struct drm_driver driver = { 58 58 .driver_features = 59 - DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG | 59 + DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG | DRIVER_LEGACY | 60 60 DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED, 61 61 .dev_priv_size = sizeof(drm_r128_buf_priv_t), 62 62 .load = r128_driver_load,
+2 -1
drivers/gpu/drm/radeon/radeon_drv.c
··· 39 39 #include <linux/pm_runtime.h> 40 40 #include <linux/vga_switcheroo.h> 41 41 #include <drm/drm_gem.h> 42 + #include <drm/drm_fb_helper.h> 42 43 43 44 #include "drm_crtc_helper.h" 44 45 #include "radeon_kfd.h" ··· 325 324 #ifdef CONFIG_X86 326 325 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 327 326 #endif 328 - remove_conflicting_framebuffers(ap, "radeondrmfb", primary); 327 + drm_fb_helper_remove_conflicting_framebuffers(ap, "radeondrmfb", primary); 329 328 kfree(ap); 330 329 331 330 return 0;
+1 -2
drivers/gpu/drm/radeon/radeon_fb.c
··· 25 25 */ 26 26 #include <linux/module.h> 27 27 #include <linux/slab.h> 28 - #include <linux/fb.h> 29 28 30 29 #include <drm/drmP.h> 31 30 #include <drm/drm_crtc.h> ··· 382 383 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state) 383 384 { 384 385 if (rdev->mode_info.rfbdev) 385 - fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state); 386 + drm_fb_helper_set_suspend(&rdev->mode_info.rfbdev->helper, state); 386 387 } 387 388 388 389 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
+7 -24
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
··· 87 87 struct vop_plane_state { 88 88 struct drm_plane_state base; 89 89 int format; 90 - struct drm_rect src; 91 - struct drm_rect dest; 92 90 dma_addr_t yrgb_mst; 93 91 bool enable; 94 92 }; ··· 591 593 struct vop_win *vop_win = to_vop_win(plane); 592 594 struct vop_plane_state *vop_plane_state = to_vop_plane_state(state); 593 595 const struct vop_win_data *win = vop_win->data; 594 - bool visible; 595 596 int ret; 596 - struct drm_rect *dest = &vop_plane_state->dest; 597 - struct drm_rect *src = &vop_plane_state->src; 598 597 struct drm_rect clip; 599 598 int min_scale = win->phy->scl ? FRAC_16_16(1, 8) : 600 599 DRM_PLANE_HELPER_NO_SCALING; ··· 605 610 if (WARN_ON(!crtc_state)) 606 611 return -EINVAL; 607 612 608 - src->x1 = state->src_x; 609 - src->y1 = state->src_y; 610 - src->x2 = state->src_x + state->src_w; 611 - src->y2 = state->src_y + state->src_h; 612 - dest->x1 = state->crtc_x; 613 - dest->y1 = state->crtc_y; 614 - dest->x2 = state->crtc_x + state->crtc_w; 615 - dest->y2 = state->crtc_y + state->crtc_h; 616 - 617 613 clip.x1 = 0; 618 614 clip.y1 = 0; 619 615 clip.x2 = crtc_state->adjusted_mode.hdisplay; 620 616 clip.y2 = crtc_state->adjusted_mode.vdisplay; 621 617 622 - ret = drm_plane_helper_check_update(plane, crtc, state->fb, 623 - src, dest, &clip, 624 - state->rotation, 625 - min_scale, 626 - max_scale, 627 - true, true, &visible); 618 + ret = drm_plane_helper_check_state(state, &clip, 619 + min_scale, max_scale, 620 + true, true); 628 621 if (ret) 629 622 return ret; 630 623 631 - if (!visible) 624 + if (!state->visible) 632 625 goto out_disable; 633 626 634 627 vop_plane_state->format = vop_convert_format(fb->pixel_format); ··· 627 644 * Src.x1 can be odd when do clip, but yuv plane start point 628 645 * need align with 2 pixel. 629 646 */ 630 - if (is_yuv_support(fb->pixel_format) && ((src->x1 >> 16) % 2)) 647 + if (is_yuv_support(fb->pixel_format) && ((state->src.x1 >> 16) % 2)) 631 648 return -EINVAL; 632 649 633 650 vop_plane_state->enable = true; ··· 677 694 unsigned int actual_w, actual_h; 678 695 unsigned int dsp_stx, dsp_sty; 679 696 uint32_t act_info, dsp_info, dsp_st; 680 - struct drm_rect *src = &vop_plane_state->src; 681 - struct drm_rect *dest = &vop_plane_state->dest; 697 + struct drm_rect *src = &state->src; 698 + struct drm_rect *dest = &state->dst; 682 699 struct drm_gem_object *obj, *uv_obj; 683 700 struct rockchip_gem_object *rk_obj, *rk_uv_obj; 684 701 unsigned long offset;
+1 -1
drivers/gpu/drm/savage/savage_drv.c
··· 50 50 51 51 static struct drm_driver driver = { 52 52 .driver_features = 53 - DRIVER_USE_AGP | DRIVER_HAVE_DMA | DRIVER_PCI_DMA, 53 + DRIVER_USE_AGP | DRIVER_HAVE_DMA | DRIVER_PCI_DMA | DRIVER_LEGACY, 54 54 .dev_priv_size = sizeof(drm_savage_buf_priv_t), 55 55 .load = savage_driver_load, 56 56 .firstopen = savage_driver_firstopen,
+1 -1
drivers/gpu/drm/sis/sis_drv.c
··· 102 102 } 103 103 104 104 static struct drm_driver driver = { 105 - .driver_features = DRIVER_USE_AGP, 105 + .driver_features = DRIVER_USE_AGP | DRIVER_LEGACY, 106 106 .load = sis_driver_load, 107 107 .unload = sis_driver_unload, 108 108 .open = sis_driver_open,
+2 -1
drivers/gpu/drm/sun4i/sun4i_drv.c
··· 17 17 #include <drm/drm_crtc_helper.h> 18 18 #include <drm/drm_fb_cma_helper.h> 19 19 #include <drm/drm_gem_cma_helper.h> 20 + #include <drm/drm_fb_helper.h> 20 21 21 22 #include "sun4i_crtc.h" 22 23 #include "sun4i_drv.h" ··· 110 109 ap->ranges[0].base = 0; 111 110 ap->ranges[0].size = ~0; 112 111 113 - remove_conflicting_framebuffers(ap, "sun4i-drm-fb", false); 112 + drm_fb_helper_remove_conflicting_framebuffers(ap, "sun4i-drm-fb", false); 114 113 kfree(ap); 115 114 } 116 115
+1
drivers/gpu/drm/tdfx/tdfx_drv.c
··· 56 56 }; 57 57 58 58 static struct drm_driver driver = { 59 + .driver_features = DRIVER_LEGACY, 59 60 .set_busid = drm_pci_set_busid, 60 61 .fops = &tdfx_driver_fops, 61 62 .name = DRIVER_NAME,
+4
drivers/gpu/drm/udl/udl_fb.c
··· 203 203 204 204 ufbdev->fb_count++; 205 205 206 + #ifdef CONFIG_DRM_FBDEV_EMULATION 206 207 if (fb_defio && (info->fbdefio == NULL)) { 207 208 /* enable defio at last moment if not disabled by client */ 208 209 ··· 219 218 info->fbdefio = fbdefio; 220 219 fb_deferred_io_init(info); 221 220 } 221 + #endif 222 222 223 223 pr_notice("open /dev/fb%d user=%d fb_info=%p count=%d\n", 224 224 info->node, user, info, ufbdev->fb_count); ··· 237 235 238 236 ufbdev->fb_count--; 239 237 238 + #ifdef CONFIG_DRM_FBDEV_EMULATION 240 239 if ((ufbdev->fb_count == 0) && (info->fbdefio)) { 241 240 fb_deferred_io_cleanup(info); 242 241 kfree(info->fbdefio); 243 242 info->fbdefio = NULL; 244 243 info->fbops->fb_mmap = udl_fb_mmap; 245 244 } 245 + #endif 246 246 247 247 pr_warn("released /dev/fb%d user=%d count=%d\n", 248 248 info->node, user, ufbdev->fb_count);
+2 -1
drivers/gpu/drm/vc4/vc4_drv.c
··· 16 16 #include <linux/platform_device.h> 17 17 #include <linux/pm_runtime.h> 18 18 #include "drm_fb_cma_helper.h" 19 + #include <drm/drm_fb_helper.h> 19 20 20 21 #include "uapi/drm/vc4_drm.h" 21 22 #include "vc4_drv.h" ··· 215 214 ap->ranges[0].base = 0; 216 215 ap->ranges[0].size = ~0; 217 216 218 - remove_conflicting_framebuffers(ap, "vc4drmfb", false); 217 + drm_fb_helper_remove_conflicting_framebuffers(ap, "vc4drmfb", false); 219 218 kfree(ap); 220 219 } 221 220
+1 -1
drivers/gpu/drm/via/via_drv.c
··· 72 72 73 73 static struct drm_driver driver = { 74 74 .driver_features = 75 - DRIVER_USE_AGP | DRIVER_HAVE_IRQ | 75 + DRIVER_USE_AGP | DRIVER_HAVE_IRQ | DRIVER_LEGACY | 76 76 DRIVER_IRQ_SHARED, 77 77 .load = via_driver_load, 78 78 .unload = via_driver_unload,
+2 -1
drivers/gpu/drm/virtio/virtgpu_drm_bus.c
··· 24 24 */ 25 25 26 26 #include <linux/pci.h> 27 + #include <drm/drm_fb_helper.h> 27 28 28 29 #include "virtgpu_drv.h" 29 30 ··· 43 42 primary = pci_dev->resource[PCI_ROM_RESOURCE].flags 44 43 & IORESOURCE_ROM_SHADOW; 45 44 46 - remove_conflicting_framebuffers(ap, "virtiodrmfb", primary); 45 + drm_fb_helper_remove_conflicting_framebuffers(ap, "virtiodrmfb", primary); 47 46 48 47 kfree(ap); 49 48 }
+1
drivers/gpu/drm/vmwgfx/Kconfig
··· 6 6 select FB_CFB_COPYAREA 7 7 select FB_CFB_IMAGEBLIT 8 8 select DRM_TTM 9 + select FB 9 10 # Only needed for the transitional use of drm_crtc_init - can be removed 10 11 # again once vmwgfx sets up the primary plane itself. 11 12 select DRM_KMS_HELPER
+9 -3
drivers/staging/android/sync_debug.c
··· 135 135 int i; 136 136 137 137 seq_printf(s, "[%p] %s: %s\n", sync_file, sync_file->name, 138 - sync_status_str(atomic_read(&sync_file->status))); 138 + sync_status_str(!fence_is_signaled(sync_file->fence))); 139 139 140 - for (i = 0; i < sync_file->num_fences; ++i) 141 - sync_print_fence(s, sync_file->cbs[i].fence, true); 140 + if (fence_is_array(sync_file->fence)) { 141 + struct fence_array *array = to_fence_array(sync_file->fence); 142 + 143 + for (i = 0; i < array->num_fences; ++i) 144 + sync_print_fence(s, array->fences[i], true); 145 + } else { 146 + sync_print_fence(s, sync_file->fence, true); 147 + } 142 148 } 143 149 144 150 static int sync_debugfs_show(struct seq_file *s, void *unused)
+33 -2
include/drm/drmP.h
··· 146 146 147 147 /* driver capabilities and requirements mask */ 148 148 #define DRIVER_USE_AGP 0x1 149 + #define DRIVER_LEGACY 0x2 149 150 #define DRIVER_PCI_DMA 0x8 150 151 #define DRIVER_SG 0x10 151 152 #define DRIVER_HAVE_DMA 0x20 ··· 231 230 if (unlikely(drm_debug & DRM_UT_VBL)) \ 232 231 drm_ut_debug_printk(__func__, fmt, ##args); \ 233 232 } while (0) 233 + 234 + #define _DRM_DEFINE_DEBUG_RATELIMITED(level, fmt, args...) \ 235 + do { \ 236 + if (unlikely(drm_debug & DRM_UT_ ## level)) { \ 237 + static DEFINE_RATELIMIT_STATE( \ 238 + _rs, \ 239 + DEFAULT_RATELIMIT_INTERVAL, \ 240 + DEFAULT_RATELIMIT_BURST); \ 241 + \ 242 + if (__ratelimit(&_rs)) { \ 243 + drm_ut_debug_printk(__func__, fmt, \ 244 + ##args); \ 245 + } \ 246 + } \ 247 + } while (0) 248 + 249 + /** 250 + * Rate limited debug output. Like DRM_DEBUG() but won't flood the log. 251 + * 252 + * \param fmt printf() like format string. 253 + * \param arg arguments 254 + */ 255 + #define DRM_DEBUG_RATELIMITED(fmt, args...) \ 256 + _DRM_DEFINE_DEBUG_RATELIMITED(CORE, fmt, ##args) 257 + #define DRM_DEBUG_DRIVER_RATELIMITED(fmt, args...) \ 258 + _DRM_DEFINE_DEBUG_RATELIMITED(DRIVER, fmt, ##args) 259 + #define DRM_DEBUG_KMS_RATELIMITED(fmt, args...) \ 260 + _DRM_DEFINE_DEBUG_RATELIMITED(KMS, fmt, ##args) 261 + #define DRM_DEBUG_PRIME_RATELIMITED(fmt, args...) \ 262 + _DRM_DEFINE_DEBUG_RATELIMITED(PRIME, fmt, ##args) 234 263 235 264 /*@}*/ 236 265 ··· 673 642 }; 674 643 675 644 enum drm_minor_type { 676 - DRM_MINOR_LEGACY, 645 + DRM_MINOR_PRIMARY, 677 646 DRM_MINOR_CONTROL, 678 647 DRM_MINOR_RENDER, 679 648 DRM_MINOR_CNT, ··· 887 856 888 857 static inline bool drm_is_primary_client(const struct drm_file *file_priv) 889 858 { 890 - return file_priv->minor->type == DRM_MINOR_LEGACY; 859 + return file_priv->minor->type == DRM_MINOR_PRIMARY; 891 860 } 892 861 893 862 /******************************************************************/
+22 -8
include/drm/drm_crtc.h
··· 35 35 #include <uapi/drm/drm_mode.h> 36 36 #include <uapi/drm/drm_fourcc.h> 37 37 #include <drm/drm_modeset_lock.h> 38 + #include <drm/drm_rect.h> 38 39 39 40 struct drm_device; 40 41 struct drm_mode_set; ··· 84 83 * specified amount in degrees in counter clockwise direction. DRM_REFLECT_X and 85 84 * DRM_REFLECT_Y reflects the image along the specified axis prior to rotation 86 85 */ 87 - #define DRM_ROTATE_MASK 0x0f 88 - #define DRM_ROTATE_0 0 89 - #define DRM_ROTATE_90 1 90 - #define DRM_ROTATE_180 2 91 - #define DRM_ROTATE_270 3 92 - #define DRM_REFLECT_MASK (~DRM_ROTATE_MASK) 93 - #define DRM_REFLECT_X 4 94 - #define DRM_REFLECT_Y 5 86 + #define DRM_ROTATE_0 BIT(0) 87 + #define DRM_ROTATE_90 BIT(1) 88 + #define DRM_ROTATE_180 BIT(2) 89 + #define DRM_ROTATE_270 BIT(3) 90 + #define DRM_ROTATE_MASK (DRM_ROTATE_0 | DRM_ROTATE_90 | \ 91 + DRM_ROTATE_180 | DRM_ROTATE_270) 92 + #define DRM_REFLECT_X BIT(4) 93 + #define DRM_REFLECT_Y BIT(5) 94 + #define DRM_REFLECT_MASK (DRM_REFLECT_X | DRM_REFLECT_Y) 95 95 96 96 enum drm_connector_force { 97 97 DRM_FORCE_UNSPECIFIED, ··· 1416 1414 * @zpos: priority of the given plane on crtc (optional) 1417 1415 * @normalized_zpos: normalized value of zpos: unique, range from 0 to N-1 1418 1416 * where N is the number of active planes for given crtc 1417 + * @src: clipped source coordinates of the plane (in 16.16) 1418 + * @dst: clipped destination coordinates of the plane 1419 + * @visible: visibility of the plane 1419 1420 * @state: backpointer to global drm_atomic_state 1420 1421 */ 1421 1422 struct drm_plane_state { ··· 1442 1437 /* Plane zpos */ 1443 1438 unsigned int zpos; 1444 1439 unsigned int normalized_zpos; 1440 + 1441 + /* Clipped coordinates */ 1442 + struct drm_rect src, dst; 1443 + 1444 + /* 1445 + * Is the plane actually visible? Can be false even 1446 + * if fb!=NULL and crtc!=NULL, due to clipping. 1447 + */ 1448 + bool visible; 1445 1449 1446 1450 struct drm_atomic_state *state; 1447 1451 };
+14
include/drm/drm_fb_helper.h
··· 32 32 33 33 struct drm_fb_helper; 34 34 35 + #include <drm/drm_crtc.h> 35 36 #include <linux/kgdb.h> 36 37 37 38 enum mode_set_atomic { ··· 283 282 int drm_fb_helper_add_one_connector(struct drm_fb_helper *fb_helper, struct drm_connector *connector); 284 283 int drm_fb_helper_remove_one_connector(struct drm_fb_helper *fb_helper, 285 284 struct drm_connector *connector); 285 + static inline int 286 + drm_fb_helper_remove_conflicting_framebuffers(struct apertures_struct *a, 287 + const char *name, bool primary) 288 + { 289 + return remove_conflicting_framebuffers(a, name, primary); 290 + } 286 291 #else 287 292 static inline int drm_fb_helper_modinit(void) 288 293 { ··· 479 472 static inline int 480 473 drm_fb_helper_remove_one_connector(struct drm_fb_helper *fb_helper, 481 474 struct drm_connector *connector) 475 + { 476 + return 0; 477 + } 478 + 479 + static inline int 480 + drm_fb_helper_remove_conflicting_framebuffers(struct apertures_struct *a, 481 + const char *name, bool primary) 482 482 { 483 483 return 0; 484 484 }
+12
include/drm/drm_mm.h
··· 37 37 * Generic range manager structs 38 38 */ 39 39 #include <linux/bug.h> 40 + #include <linux/rbtree.h> 40 41 #include <linux/kernel.h> 41 42 #include <linux/list.h> 42 43 #include <linux/spinlock.h> ··· 62 61 struct drm_mm_node { 63 62 struct list_head node_list; 64 63 struct list_head hole_stack; 64 + struct rb_node rb; 65 65 unsigned hole_follows : 1; 66 66 unsigned scanned_block : 1; 67 67 unsigned scanned_prev_free : 1; ··· 72 70 unsigned long color; 73 71 u64 start; 74 72 u64 size; 73 + u64 __subtree_last; 75 74 struct drm_mm *mm; 76 75 }; 77 76 ··· 82 79 /* head_node.node_list is the list of all memory nodes, ordered 83 80 * according to the (increasing) start address of the memory node. */ 84 81 struct drm_mm_node head_node; 82 + /* Keep an interval_tree for fast lookup of drm_mm_nodes by address. */ 83 + struct rb_root interval_tree; 84 + 85 85 unsigned int scan_check_range : 1; 86 86 unsigned scan_alignment; 87 87 unsigned long scan_color; ··· 300 294 u64 size); 301 295 void drm_mm_takedown(struct drm_mm *mm); 302 296 bool drm_mm_clean(struct drm_mm *mm); 297 + 298 + struct drm_mm_node * 299 + drm_mm_interval_first(struct drm_mm *mm, u64 start, u64 last); 300 + 301 + struct drm_mm_node * 302 + drm_mm_interval_next(struct drm_mm_node *node, u64 start, u64 last); 303 303 304 304 void drm_mm_init_scan(struct drm_mm *mm, 305 305 u64 size,
+5
include/drm/drm_plane_helper.h
··· 40 40 int drm_crtc_init(struct drm_device *dev, struct drm_crtc *crtc, 41 41 const struct drm_crtc_funcs *funcs); 42 42 43 + int drm_plane_helper_check_state(struct drm_plane_state *state, 44 + const struct drm_rect *clip, 45 + int min_scale, int max_scale, 46 + bool can_position, 47 + bool can_update_disabled); 43 48 int drm_plane_helper_check_update(struct drm_plane *plane, 44 49 struct drm_crtc *crtc, 45 50 struct drm_framebuffer *fb,
-2
include/drm/drm_vma_manager.h
··· 40 40 struct drm_vma_offset_node { 41 41 rwlock_t vm_lock; 42 42 struct drm_mm_node vm_node; 43 - struct rb_node vm_rb; 44 43 struct rb_root vm_files; 45 44 }; 46 45 47 46 struct drm_vma_offset_manager { 48 47 rwlock_t vm_lock; 49 - struct rb_root vm_addr_space_rb; 50 48 struct drm_mm vm_addr_space_mm; 51 49 }; 52 50
+10
include/linux/fence-array.h
··· 52 52 extern const struct fence_ops fence_array_ops; 53 53 54 54 /** 55 + * fence_is_array - check if a fence is from the array subsclass 56 + * 57 + * Return true if it is a fence_array and false otherwise. 58 + */ 59 + static inline bool fence_is_array(struct fence *fence) 60 + { 61 + return fence->ops == &fence_array_ops; 62 + } 63 + 64 + /** 55 65 * to_fence_array - cast a fence to a fence_array 56 66 * @fence: fence to cast to a fence_array 57 67 *
+1 -3
include/linux/fence.h
··· 49 49 * @timestamp: Timestamp when the fence was signaled. 50 50 * @status: Optional, only valid if < 0, must be set before calling 51 51 * fence_signal, indicates that the fence has completed with an error. 52 - * @child_list: list of children fences 53 - * @active_list: list of active fences 54 52 * 55 53 * the flags member must be manipulated and read using the appropriate 56 54 * atomic ops (bit_*), so taking the spinlock will not be needed most ··· 60 62 * implementer of the fence for its own purposes. Can be used in different 61 63 * ways by different fence implementers, so do not rely on this. 62 64 * 63 - * *) Since atomic bitops are used, this is not guaranteed to be the case. 65 + * Since atomic bitops are used, this is not guaranteed to be the case. 64 66 * Particularly, if the bit was set, but fence_signal was called right 65 67 * before this bit was set, it would have been able to set the 66 68 * FENCE_FLAG_SIGNALED_BIT, before enable_signaling was called.
+8 -12
include/linux/sync_file.h
··· 19 19 #include <linux/list.h> 20 20 #include <linux/spinlock.h> 21 21 #include <linux/fence.h> 22 - 23 - struct sync_file_cb { 24 - struct fence_cb cb; 25 - struct fence *fence; 26 - struct sync_file *sync_file; 27 - }; 22 + #include <linux/fence-array.h> 28 23 29 24 /** 30 25 * struct sync_file - sync file to export to the userspace ··· 27 32 * @kref: reference count on fence. 28 33 * @name: name of sync_file. Useful for debugging 29 34 * @sync_file_list: membership in global file list 30 - * @num_fences: number of sync_pts in the fence 31 35 * @wq: wait queue for fence signaling 32 - * @status: 0: signaled, >0:active, <0: error 33 - * @cbs: sync_pts callback information 36 + * @fence: fence with the fences in the sync_file 37 + * @cb: fence callback information 34 38 */ 35 39 struct sync_file { 36 40 struct file *file; ··· 38 44 #ifdef CONFIG_DEBUG_FS 39 45 struct list_head sync_file_list; 40 46 #endif 41 - int num_fences; 42 47 43 48 wait_queue_head_t wq; 44 - atomic_t status; 45 49 46 - struct sync_file_cb cbs[]; 50 + struct fence *fence; 51 + struct fence_cb cb; 47 52 }; 48 53 54 + #define POLL_ENABLED FENCE_FLAG_USER_BITS 55 + 49 56 struct sync_file *sync_file_create(struct fence *fence); 57 + struct fence *sync_file_get_fence(int fd); 50 58 51 59 #endif /* _LINUX_SYNC_H */