MIPS: Loongson: Rename CPU device-tree binding

Loongson-3A R1/R2/R3 and Loongson-3B R1/R2 use the same package naming
in dts, and Loongson-3A R4 will be different. In cpu.h the classic 64bit
Loongson processors are called Loongson64C (C for classic, pre Loongson-
3A R4), and the new 64bit Loongson processors are called Loongson64G (G
for generic, Loongson-3A R4+). To keep consistency and make extensible,
we rename the classic "loongson3" prefix to "loongson64c", and the new
prefix for Loongson-3A R4+ will be "loongson64g".

Signed-off-by: Huacai Chen <[e-mail]>
Signed-off-by: Thomas Bogendoerfer <[e-mail]>

Documentation/devicetree/bindings/mips/loongson/devices.yaml

···
   compatible:
     oneOf:
 
-      - description: Generic Loongson3 Quad Core + RS780E
+      - description: Classic Loongson64 Quad Core + RS780E
         items:
-          - const: loongson,loongson3-4core-rs780e
+          - const: loongson,loongson64c-4core-rs780e
 
-      - description: Generic Loongson3 Octa Core + RS780E
+      - description: Classic Loongson64 Octa Core + RS780E
         items:
-          - const: loongson,loongson3-8core-rs780e
+          - const: loongson,loongson64c-8core-rs780e
 ...

arch/mips/boot/dts/loongson/Makefile

···
 # SPDX_License_Identifier: GPL_2.0
-dtb-$(CONFIG_MACH_LOONGSON64)	+= loongson3_4core_rs780e.dtb loongson3_8core_rs780e.dtb
+dtb-$(CONFIG_MACH_LOONGSON64)	+= loongson64c_4core_rs780e.dtb loongson64c_8core_rs780e.dtb
 
 obj-$(CONFIG_BUILTIN_DTB)	+= $(addsuffix .o, $(dtb-y))

arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dts arch/mips/boot/dts/loongson/loongson64c_8core_rs780e.dts

···
 
 /dts-v1/;
 
-#include "loongson3-package.dtsi"
+#include "loongson64c-package.dtsi"
 #include "rs780e-pch.dtsi"
 
 / {
-	compatible = "loongson,loongson3-4core-rs780e";
+	compatible = "loongson,loongson3-8core-rs780e";
 };
 
 &package0 {
-	htpic: interrupt-controller@efdfb000080 {
+	htpic: interrupt-controller@1efdfb000080 {
 		compatible = "loongson,htpic-1.0";
-		reg = <0xefd 0xfb000080 0x40>;
+		reg = <0x1efd 0xfb000080 0x40>;
 		interrupt-controller;
 		#interrupt-cells = <1>;
 

arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dts arch/mips/boot/dts/loongson/loongson64c_4core_rs780e.dts

···
 
 /dts-v1/;
 
-#include "loongson3-package.dtsi"
+#include "loongson64c-package.dtsi"
 #include "rs780e-pch.dtsi"
 
 / {
-	compatible = "loongson,loongson3-8core-rs780e";
+	compatible = "loongson,loongson3-4core-rs780e";
 };
 
 &package0 {
-	htpic: interrupt-controller@1efdfb000080 {
+	htpic: interrupt-controller@efdfb000080 {
 		compatible = "loongson,htpic-1.0";
-		reg = <0x1efd 0xfb000080 0x40>;
+		reg = <0xefd 0xfb000080 0x40>;
 		interrupt-controller;
 		#interrupt-cells = <1>;
 

arch/mips/include/asm/mach-loongson64/builtin_dtbs.h

···
 #ifndef __ASM_MACH_LOONGSON64_BUILTIN_DTBS_H_
 #define __ASM_MACH_LOONGSON64_BUILTIN_DTBS_H_
 
-extern u32 __dtb_loongson3_4core_rs780e_begin[];
-extern u32 __dtb_loongson3_8core_rs780e_begin[];
+extern u32 __dtb_loongson64c_4core_rs780e_begin[];
+extern u32 __dtb_loongson64c_8core_rs780e_begin[];
 #endif

arch/mips/loongson64/env.c

···
 		case PRID_REV_LOONGSON3A_R2_1:
 		case PRID_REV_LOONGSON3A_R3_0:
 		case PRID_REV_LOONGSON3A_R3_1:
-			loongson_fdt_blob = __dtb_loongson3_4core_rs780e_begin;
+			loongson_fdt_blob = __dtb_loongson64c_4core_rs780e_begin;
 			break;
 		case PRID_REV_LOONGSON3B_R1:
 		case PRID_REV_LOONGSON3B_R2:
-			loongson_fdt_blob = __dtb_loongson3_8core_rs780e_begin;
+			loongson_fdt_blob = __dtb_loongson64c_8core_rs780e_begin;
 			break;
 		default:
 			break;