soc: ti: knav_qmss_queue: Fix linking RAM setup for queue managers

Configure linking RAM for both queue managers also in case
when only linking RAM 0 is specified in device tree.

Currently hwqueue driver configures linking RAM(s) to be used
cooperatively by the QMs (shared mode). Therefore if both
queue managers are used then both must be configured with
exactly the same linking RAM info (base address and size)
independent of the number of linking RAM(s) specified in the
device tree.
For proper operation only one linking RAM is required and in most
cases this can be internal one as long as it is able to handle
the number of descriptors used in the system.
Current driver code however skips configuration of second
queue manager if second linking RAM is not specified.
If the configuration for the QM2 is missing there will be
a crash when it tries to push/pop descriptors from its queues.

Signed-off-by: Michal Morawiec <[e-mail]>
Signed-off-by: Santosh Shilimkar <[e-mail]>

drivers/soc/ti/knav_qmss_queue.c

···
 
 		block++;
 		if (!block->size)
-			return 0;
+			continue;
 
 		dev_dbg(kdev->dev, "linkram1: phys:%x, virt:%p, size:%x\n",
 			block->phys, block->virt, block->size);