drm/amdgpu: Add gpu_addr support to seq64 allocation

Add gpu address support to seq64 alloc function.

v1:(Christian)
- Add the user of this new interface change to the same
patch.

Signed-off-by: Arunpravin Paneer Selvam <[e-mail]>
Reviewed-by: Christian König <[e-mail]>
Signed-off-by: Alex Deucher <[e-mail]>

drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c

···
  * Returns:
  * 0 on success or a negative error code on failure
  */
-int amdgpu_seq64_alloc(struct amdgpu_device *adev, u64 *va, u64 **cpu_addr)
+int amdgpu_seq64_alloc(struct amdgpu_device *adev, u64 *va,
+		       u64 *gpu_addr, u64 **cpu_addr)
 {
 	unsigned long bit_pos;
 
···
 		return -ENOSPC;
 
 	__set_bit(bit_pos, adev->seq64.used);
+
 	*va = bit_pos * sizeof(u64) + amdgpu_seq64_get_va_base(adev);
+
+	if (gpu_addr)
+		*gpu_addr = bit_pos * sizeof(u64) + adev->seq64.gpu_addr;
+
 	*cpu_addr = bit_pos + adev->seq64.cpu_base_addr;
 
 	return 0;
···
 	 */
 	r = amdgpu_bo_create_kernel(adev, AMDGPU_VA_RESERVED_SEQ64_SIZE,
 				    PAGE_SIZE, AMDGPU_GEM_DOMAIN_GTT,
-				    &adev->seq64.sbo, NULL,
+				    &adev->seq64.sbo, &adev->seq64.gpu_addr,
 				    (void **)&adev->seq64.cpu_base_addr);
 	if (r) {
 		dev_warn(adev->dev, "(%d) create seq64 failed\n", r);

drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.h

···
 struct amdgpu_seq64 {
 	struct amdgpu_bo *sbo;
 	u32 num_sem;
+	u64 gpu_addr;
 	u64 *cpu_base_addr;
 	DECLARE_BITMAP(used, AMDGPU_MAX_SEQ64_SLOTS);
 };
 
 void amdgpu_seq64_fini(struct amdgpu_device *adev);
 int amdgpu_seq64_init(struct amdgpu_device *adev);
-int amdgpu_seq64_alloc(struct amdgpu_device *adev, u64 *gpu_addr, u64 **cpu_addr);
+int amdgpu_seq64_alloc(struct amdgpu_device *adev, u64 *va, u64 *gpu_addr, u64 **cpu_addr);
 void amdgpu_seq64_free(struct amdgpu_device *adev, u64 gpu_addr);
 int amdgpu_seq64_map(struct amdgpu_device *adev, struct amdgpu_vm *vm,
 		     struct amdgpu_bo_va **bo_va);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c

···
 	}
 
 	/* Acquire seq64 memory */
-	r = amdgpu_seq64_alloc(adev, &fence_drv->gpu_addr,
+	r = amdgpu_seq64_alloc(adev, &fence_drv->va, &fence_drv->gpu_addr,
 			       &fence_drv->cpu_addr);
 	if (r) {
 		kfree(fence_drv);
···
 	return 0;
 
 free_seq64:
-	amdgpu_seq64_free(adev, fence_drv->gpu_addr);
+	amdgpu_seq64_free(adev, fence_drv->va);
 free_fence_drv:
 	kfree(fence_drv);
 
···
 	xa_unlock_irqrestore(xa, flags);
 
 	/* Free seq64 memory */
-	amdgpu_seq64_free(adev, fence_drv->gpu_addr);
+	amdgpu_seq64_free(adev, fence_drv->va);
 	kfree(fence_drv);
 }
 
···
 			}
 
 			/* Store drm syncobj's gpu va address and value */
-			fence_info[cnt].va = fence_drv->gpu_addr;
+			fence_info[cnt].va = fence_drv->va;
 			fence_info[cnt].value = fences[i]->seqno;
 
 			dma_fence_put(fences[i]);

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.h

···
 
 struct amdgpu_userq_fence_driver {
 	struct kref refcount;
+	u64 va;
 	u64 gpu_addr;
 	u64 *cpu_addr;
 	u64 context;