Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'mstar-dt-next' of https://github.com/linux-chenxing/linux into arm/dt

* 'mstar-dt-next' of https://github.com/linux-chenxing/linux:
ARM: mstar: Extend opp_table for infinity2m
ARM: mstar: Add OPP table for infinity3
ARM: mstar: Add OPP table for infinity
ARM: mstar: Link cpupll to second core
ARM: mstar: Link cpupll to cpu
ARM: mstar: Add cpupll to base dtsi
dt-bindings: clk: mstar msc313 cpupll binding description
ARM: dts: mstar: Add board for 100ask DongShanPiOne
dt-bindings: arm: mstar: Add compatible for 100ask DongShanPiOne
dt-bindings: vendor-prefixes: Add prefix for 100ask
ARM: dts: mstar: Add a dts for Miyoo Mini
dt-bindings: arm: mstar: Add compatible for Miyoo Mini
dt-bindings: vendor-prefixes: Add prefix for Miyoo
ARM: dts: mstar: Add the Wireless Tag IDO-SBC2D06-V1B-22W
dt-bindings: add vendor prefix for Wireless Tag
ARM: dts: mstar: Set gpio compatible for ssd20xd

Link: https://lore.kernel.org/r/20220216193131.59794-1-romain.perier@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+302
+4
Documentation/devicetree/bindings/arm/mstar/mstar.yaml
··· 23 23 - description: infinity2m boards 24 24 items: 25 25 - enum: 26 + - 100ask,dongshanpione # 100ask DongShanPiOne 26 27 - honestar,ssd201htv2 # Honestar SSD201_HT_V2 devkit 27 28 - m5stack,unitv2 # M5Stack UnitV2 29 + - miyoo,miyoo-mini # Miyoo Mini 30 + - wirelesstag,ido-som2d01 # Wireless Tag IDO-SOM2D01 31 + - wirelesstag,ido-sbc2d06-v1b-22w # Wireless Tag IDO-SBC2D06-1VB-22W 28 32 - const: mstar,infinity2m 29 33 30 34 - description: infinity3 boards
+45
Documentation/devicetree/bindings/clock/mstar,msc313-cpupll.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/clock/mstar,msc313-cpupll.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: MStar/Sigmastar MSC313 CPU PLL 8 + 9 + maintainers: 10 + - Daniel Palmer <daniel@thingy.jp> 11 + 12 + description: | 13 + The MStar/SigmaStar MSC313 and later ARMv7 chips have a scalable 14 + PLL that can be used as the clock source for the CPU(s). 15 + 16 + properties: 17 + compatible: 18 + const: mstar,msc313-cpupll 19 + 20 + "#clock-cells": 21 + const: 1 22 + 23 + clocks: 24 + maxItems: 1 25 + 26 + reg: 27 + maxItems: 1 28 + 29 + required: 30 + - compatible 31 + - "#clock-cells" 32 + - clocks 33 + - reg 34 + 35 + additionalProperties: false 36 + 37 + examples: 38 + - | 39 + #include <dt-bindings/clock/mstar-msc313-mpll.h> 40 + cpupll: cpupll@206400 { 41 + compatible = "mstar,msc313-cpupll"; 42 + reg = <0x206400 0x200>; 43 + #clock-cells = <1>; 44 + clocks = <&mpll MSTAR_MSC313_MPLL_DIV2>; 45 + };
+6
Documentation/devicetree/bindings/vendor-prefixes.yaml
··· 23 23 "^(simple-audio-card|st-plgpio|st-spics|ts),.*": true 24 24 25 25 # Keep list in alphabetical order. 26 + "^100ask,.*": 27 + description: Baiwen.com (100ask). 26 28 "^70mai,.*": 27 29 description: 70mai Co., Ltd. 28 30 "^8dev,.*": ··· 771 769 description: MiraMEMS Sensing Technology Co., Ltd. 772 770 "^mitsubishi,.*": 773 771 description: Mitsubishi Electric Corporation 772 + "^miyoo,.*": 773 + description: Miyoo 774 774 "^mntre,.*": 775 775 description: MNT Research GmbH 776 776 "^modtronix,.*": ··· 1354 1350 description: WinLink Co., Ltd 1355 1351 "^winstar,.*": 1356 1352 description: Winstar Display Corp. 1353 + "^wirelesstag,.*": 1354 + description: Wireless Tag (qiming yunduan) 1357 1355 "^wits,.*": 1358 1356 description: Shenzhen Merrii Technology Co., Ltd. (WITS) 1359 1357 "^wlf,.*":
+3
arch/arm/boot/dts/Makefile
··· 1494 1494 dtb-$(CONFIG_ARCH_MILBEAUT) += milbeaut-m10v-evb.dtb 1495 1495 dtb-$(CONFIG_ARCH_MSTARV7) += \ 1496 1496 mstar-infinity-msc313-breadbee_crust.dtb \ 1497 + mstar-infinity2m-ssd202d-100ask-dongshanpione.dtb \ 1498 + mstar-infinity2m-ssd202d-miyoo-mini.dtb \ 1499 + mstar-infinity2m-ssd202d-wirelesstag-ido-sbc2d06-v1b-22w.dtb \ 1497 1500 mstar-infinity2m-ssd202d-ssd201htv2.dtb \ 1498 1501 mstar-infinity2m-ssd202d-unitv2.dtb \ 1499 1502 mstar-infinity3-msc313e-breadbee.dtb \
+34
arch/arm/boot/dts/mstar-infinity.dtsi
··· 8 8 9 9 #include <dt-bindings/gpio/msc313-gpio.h> 10 10 11 + / { 12 + cpu0_opp_table: opp_table0 { 13 + compatible = "operating-points-v2"; 14 + opp-shared; 15 + 16 + opp-240000000 { 17 + opp-hz = /bits/ 64 <240000000>; 18 + opp-microvolt = <1000000>; 19 + clock-latency-ns = <300000>; 20 + }; 21 + 22 + opp-400000000 { 23 + opp-hz = /bits/ 64 <400000000>; 24 + opp-microvolt = <1000000>; 25 + clock-latency-ns = <300000>; 26 + }; 27 + opp-600000000 { 28 + opp-hz = /bits/ 64 <600000000>; 29 + opp-microvolt = <1000000>; 30 + clock-latency-ns = <300000>; 31 + }; 32 + 33 + opp-800000000 { 34 + opp-hz = /bits/ 64 <800000000>; 35 + opp-microvolt = <1000000>; 36 + clock-latency-ns = <300000>; 37 + }; 38 + }; 39 + }; 40 + 41 + &cpu0 { 42 + operating-points-v2 = <&cpu0_opp_table>; 43 + }; 44 + 11 45 &imi { 12 46 reg = <0xa0000000 0x16000>; 13 47 };
+20
arch/arm/boot/dts/mstar-infinity2m-ssd201-som2d01.dtsi
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 + /* 3 + * Copyright (c) 2021 thingy.jp. 4 + * Author: Daniel Palmer <daniel@thingy.jp> 5 + * Author: Romain Perier <romain.perier@gmail.com> 6 + */ 7 + 8 + / { 9 + reg_vcc_dram: regulator-vcc-dram { 10 + compatible = "regulator-fixed"; 11 + regulator-name = "vcc_dram"; 12 + regulator-min-microvolt = <1800000>; 13 + regulator-max-microvolt = <1800000>; 14 + regulator-boot-on; 15 + }; 16 + }; 17 + 18 + &pm_uart { 19 + status = "okay"; 20 + };
+25
arch/arm/boot/dts/mstar-infinity2m-ssd202d-100ask-dongshanpione.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * Copyright (c) 2021 thingy.jp. 4 + * Author: Daniel Palmer <daniel@thingy.jp> 5 + */ 6 + 7 + /dts-v1/; 8 + #include "mstar-infinity2m-ssd202d.dtsi" 9 + 10 + / { 11 + model = "DongShanPi One"; 12 + compatible = "100ask,dongshanpione", "mstar,infinity2m"; 13 + 14 + aliases { 15 + serial0 = &pm_uart; 16 + }; 17 + 18 + chosen { 19 + stdout-path = "serial0:115200n8"; 20 + }; 21 + }; 22 + 23 + &pm_uart { 24 + status = "okay"; 25 + };
+25
arch/arm/boot/dts/mstar-infinity2m-ssd202d-miyoo-mini.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * Copyright (c) 2021 thingy.jp. 4 + * Author: Daniel Palmer <daniel@thingy.jp> 5 + */ 6 + 7 + /dts-v1/; 8 + #include "mstar-infinity2m-ssd202d.dtsi" 9 + 10 + / { 11 + model = "Miyoo Mini"; 12 + compatible = "miyoo,miyoo-mini", "mstar,infinity2m"; 13 + 14 + aliases { 15 + serial0 = &pm_uart; 16 + }; 17 + 18 + chosen { 19 + stdout-path = "serial0:115200n8"; 20 + }; 21 + }; 22 + 23 + &pm_uart { 24 + status = "okay"; 25 + };
+23
arch/arm/boot/dts/mstar-infinity2m-ssd202d-wirelesstag-ido-sbc2d06-v1b-22w.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 + /* 3 + * Copyright (c) 2021 thingy.jp. 4 + * Author: Daniel Palmer <daniel@thingy.jp> 5 + * Author: Romain Perier <romain.perier@gmail.com> 6 + */ 7 + 8 + /dts-v1/; 9 + #include "mstar-infinity2m-ssd202d-wirelesstag-ido-som2d01.dtsi" 10 + #include <dt-bindings/gpio/gpio.h> 11 + 12 + / { 13 + model = "Wireless Tag IDO-SBC2D06-1VB-22W"; 14 + compatible = "wirelesstag,ido-sbc2d06-v1b-22w", "mstar,infinity2m"; 15 + 16 + leds { 17 + compatible = "gpio-leds"; 18 + sys_led { 19 + gpios = <&gpio SSD20XD_GPIO_GPIO85 GPIO_ACTIVE_LOW>; 20 + linux,default-trigger = "heartbeat"; 21 + }; 22 + }; 23 + };
+28
arch/arm/boot/dts/mstar-infinity2m-ssd202d-wirelesstag-ido-som2d01.dtsi
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 + /* 3 + * Copyright (c) 2021 thingy.jp. 4 + * Author: Daniel Palmer <daniel@thingy.jp> 5 + * Author: Romain Perier <romain.perier@gmail.com> 6 + */ 7 + 8 + /dts-v1/; 9 + #include "mstar-infinity2m-ssd202d.dtsi" 10 + #include "mstar-infinity2m-ssd201-som2d01.dtsi" 11 + 12 + / { 13 + model = "Wireless Tag IDO-SOM2D01 (SSD202D)"; 14 + compatible = "wirelesstag,ido-som2d01", "mstar,infinity2m"; 15 + 16 + aliases { 17 + serial0 = &pm_uart; 18 + }; 19 + 20 + chosen { 21 + stdout-path = "serial0:115200n8"; 22 + }; 23 + }; 24 + 25 + &reg_vcc_dram { 26 + regulator-min-microvolt = <1500000>; 27 + regulator-max-microvolt = <1500000>; 28 + };
+5
arch/arm/boot/dts/mstar-infinity2m-ssd20xd.dtsi
··· 6 6 7 7 #include "mstar-infinity2m.dtsi" 8 8 9 + &gpio { 10 + compatible = "sstar,ssd20xd-gpio"; 11 + status = "okay"; 12 + }; 13 + 9 14 &smpctrl { 10 15 compatible = "sstar,ssd201-smpctrl", "mstar,smpctrl"; 11 16 status = "okay";
+17
arch/arm/boot/dts/mstar-infinity2m.dtsi
··· 6 6 7 7 #include "mstar-infinity.dtsi" 8 8 9 + &cpu0_opp_table { 10 + opp-1000000000 { 11 + opp-hz = /bits/ 64 <1000000000>; 12 + opp-microvolt = <1000000>; 13 + clock-latency-ns = <300000>; 14 + }; 15 + 16 + opp-1200000000 { 17 + opp-hz = /bits/ 64 <1200000000>; 18 + opp-microvolt = <1000000>; 19 + clock-latency-ns = <300000>; 20 + }; 21 + }; 22 + 9 23 &cpus { 10 24 cpu1: cpu@1 { 11 25 device_type = "cpu"; 12 26 compatible = "arm,cortex-a7"; 27 + operating-points-v2 = <&cpu0_opp_table>; 13 28 reg = <0x1>; 29 + clocks = <&cpupll>; 30 + clock-names = "cpuclk"; 14 31 }; 15 32 }; 16 33
+58
arch/arm/boot/dts/mstar-infinity3.dtsi
··· 6 6 7 7 #include "mstar-infinity.dtsi" 8 8 9 + &cpu0_opp_table { 10 + opp-1008000000 { 11 + opp-hz = /bits/ 64 <1008000000>; 12 + opp-microvolt = <1000000>; 13 + clock-latency-ns = <300000>; 14 + }; 15 + 16 + // overclock frequencies below, shown to work fine up to 1.3 GHz 17 + opp-108000000 { 18 + opp-hz = /bits/ 64 <1080000000>; 19 + opp-microvolt = <1000000>; 20 + clock-latency-ns = <300000>; 21 + turbo-mode; 22 + }; 23 + 24 + opp-1188000000 { 25 + opp-hz = /bits/ 64 <1188000000>; 26 + opp-microvolt = <1000000>; 27 + clock-latency-ns = <300000>; 28 + turbo-mode; 29 + }; 30 + 31 + opp-1296000000 { 32 + opp-hz = /bits/ 64 <1296000000>; 33 + opp-microvolt = <1000000>; 34 + clock-latency-ns = <300000>; 35 + turbo-mode; 36 + }; 37 + 38 + opp-1350000000 { 39 + opp-hz = /bits/ 64 <1350000000>; 40 + opp-microvolt = <1000000>; 41 + clock-latency-ns = <300000>; 42 + turbo-mode; 43 + }; 44 + 45 + opp-1404000000 { 46 + opp-hz = /bits/ 64 <1404000000>; 47 + opp-microvolt = <1000000>; 48 + clock-latency-ns = <300000>; 49 + turbo-mode; 50 + }; 51 + 52 + opp-1458000000 { 53 + opp-hz = /bits/ 64 <1458000000>; 54 + opp-microvolt = <1000000>; 55 + clock-latency-ns = <300000>; 56 + turbo-mode; 57 + }; 58 + 59 + opp-1512000000 { 60 + opp-hz = /bits/ 64 <1512000000>; 61 + opp-microvolt = <1000000>; 62 + clock-latency-ns = <300000>; 63 + turbo-mode; 64 + }; 65 + }; 66 + 9 67 &imi { 10 68 reg = <0xa0000000 0x20000>; 11 69 };
+9
arch/arm/boot/dts/mstar-v7.dtsi
··· 21 21 device_type = "cpu"; 22 22 compatible = "arm,cortex-a7"; 23 23 reg = <0x0>; 24 + clocks = <&cpupll>; 25 + clock-names = "cpuclk"; 24 26 }; 25 27 }; 26 28 ··· 155 153 #clock-cells = <1>; 156 154 reg = <0x206000 0x200>; 157 155 clocks = <&xtal>; 156 + }; 157 + 158 + cpupll: cpupll@206400 { 159 + compatible = "mstar,msc313-cpupll"; 160 + reg = <0x206400 0x200>; 161 + #clock-cells = <0>; 162 + clocks = <&mpll MSTAR_MSC313_MPLL_DIV2>; 158 163 }; 159 164 160 165 gpio: gpio@207800 {