Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: add bindings doc for ZTE VOU display controller

It adds initial bindings doc for ZTE VOU display controller. HDMI is
the only supported output device right now.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>

authored by

Shawn Guo and committed by
Shawn Guo
f78dd2c2 1001354c

+84
+84
Documentation/devicetree/bindings/display/zte,vou.txt
··· 1 + ZTE VOU Display Controller 2 + 3 + This is a display controller found on ZTE ZX296718 SoC. It includes multiple 4 + Graphic Layer (GL) and Video Layer (VL), two Mixers/Channels, and a few blocks 5 + handling scaling, color space conversion etc. VOU also integrates the support 6 + for typical output devices, like HDMI, TV Encoder, VGA, and RGB LCD. 7 + 8 + * Master VOU node 9 + 10 + It must be the parent node of all the sub-device nodes. 11 + 12 + Required properties: 13 + - compatible: should be "zte,zx296718-vou" 14 + - #address-cells: should be <1> 15 + - #size-cells: should be <1> 16 + - ranges: list of address translations between VOU and sub-devices 17 + 18 + * VOU DPC device 19 + 20 + Required properties: 21 + - compatible: should be "zte,zx296718-dpc" 22 + - reg: Physical base address and length of DPC register regions, one for each 23 + entry in 'reg-names' 24 + - reg-names: The names of register regions. The following regions are required: 25 + "osd" 26 + "timing_ctrl" 27 + "dtrc" 28 + "vou_ctrl" 29 + "otfppu" 30 + - interrupts: VOU DPC interrupt number to CPU 31 + - clocks: A list of phandle + clock-specifier pairs, one for each entry 32 + in 'clock-names' 33 + - clock-names: A list of clock names. The following clocks are required: 34 + "aclk" 35 + "ppu_wclk" 36 + "main_wclk" 37 + "aux_wclk" 38 + 39 + * HDMI output device 40 + 41 + Required properties: 42 + - compatible: should be "zte,zx296718-hdmi" 43 + - reg: Physical base address and length of the HDMI device IO region 44 + - interrupts : HDMI interrupt number to CPU 45 + - clocks: A list of phandle + clock-specifier pairs, one for each entry 46 + in 'clock-names' 47 + - clock-names: A list of clock names. The following clocks are required: 48 + "osc_cec" 49 + "osc_clk" 50 + "xclk" 51 + 52 + Example: 53 + 54 + vou: vou@1440000 { 55 + compatible = "zte,zx296718-vou"; 56 + #address-cells = <1>; 57 + #size-cells = <1>; 58 + ranges = <0 0x1440000 0x10000>; 59 + 60 + dpc: dpc@0 { 61 + compatible = "zte,zx296718-dpc"; 62 + reg = <0x0000 0x1000>, <0x1000 0x1000>, 63 + <0x5000 0x1000>, <0x6000 0x1000>, 64 + <0xa000 0x1000>; 65 + reg-names = "osd", "timing_ctrl", 66 + "dtrc", "vou_ctrl", 67 + "otfppu"; 68 + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 69 + clocks = <&topcrm VOU_ACLK>, <&topcrm VOU_PPU_WCLK>, 70 + <&topcrm VOU_MAIN_WCLK>, <&topcrm VOU_AUX_WCLK>; 71 + clock-names = "aclk", "ppu_wclk", 72 + "main_wclk", "aux_wclk"; 73 + }; 74 + 75 + hdmi: hdmi@c000 { 76 + compatible = "zte,zx296718-hdmi"; 77 + reg = <0xc000 0x4000>; 78 + interrupts = <GIC_SPI 82 IRQ_TYPE_EDGE_RISING>; 79 + clocks = <&topcrm HDMI_OSC_CEC>, 80 + <&topcrm HDMI_OSC_CLK>, 81 + <&topcrm HDMI_XCLK>; 82 + clock-names = "osc_cec", "osc_clk", "xclk"; 83 + }; 84 + };