staging: slicoss: Fixes block comment style

This patch fixes the checkpatch.pl warnings:

WARNING: Block comments use * on subsequent lines
WARNING: Block comments use a trailing */ on a separate line

Signed-off-by: Amarjargal Gundjalam <[e-mail]>
Signed-off-by: Greg Kroah-Hartman <[e-mail]>

drivers/staging/slicoss/slic.h

···
 	u32     lastid;
 };
 /*
- SLIC Handle structure.  Used to restrict handle values to
- 32 bits by using an index rather than an address.
- Simplifies ucode in 64-bit systems
-*/
+ * SLIC Handle structure.  Used to restrict handle values to
+ * 32 bits by using an index rather than an address.
+ * Simplifies ucode in 64-bit systems
+ */
 struct slic_handle_word {
 	union {
 		struct {
···
 	struct physcard *next;
 	uint                adapters_allocd;
 
-/*  the following is not currently needed
-	u32              bridge_busnum;
-	u32              bridge_cfg[NUM_CFG_SPACES][NUM_CFG_REG_ULONGS];
-*/
+/*
+ * the following is not currently needed
+ *	u32              bridge_busnum;
+ *	u32              bridge_cfg[NUM_CFG_SPACES][NUM_CFG_REG_ULONGS];
+ */
 };
 
 struct base_driver {

drivers/staging/slicoss/slichw.h

···
 
 	u32	slic_hbar;	/* Header buffer address reg */
 	u32	pad4;
-	/* 31-8 - phy addr of set of contiguous hdr buffers
-	    7-0 - number of buffers passed
-	   Buffers are 256 bytes long on 256-byte boundaries. */
+	/*
+	 * 31-8 - phy addr of set of contiguous hdr buffers
+	 *  7-0 - number of buffers passed
+	 * Buffers are 256 bytes long on 256-byte boundaries.
+	 */
 #define SLIC_HBAR		0x0020
 #define SLIC_HBAR_CNT_MSK	0x000000FF
 
···
 #define SLIC_DBAR_SIZE		2048
 
 	u32	slic_cbar;	/* Xmt Cmd buf addr regs.*/
-	/* 1 per XMT interface
-	   31-5 - phy addr of host command buffer
-	    4-0 - length of cmd in multiples of 32 bytes
-	   Buffers are 32 bytes up to 512 bytes long */
+	/*
+	 * 1 per XMT interface
+	 * 31-5 - phy addr of host command buffer
+	 *  4-0 - length of cmd in multiples of 32 bytes
+	 * Buffers are 32 bytes up to 512 bytes long
+	 */
 #define SLIC_CBAR		0x0030
 #define SLIC_CBAR_LEN_MSK	0x0000001F
 #define SLIC_CBAR_ALIGN		0x00000020
···
 
 	u32	slic_rbar;	/* Response buffer address reg.*/
 	u32	pad7;
-	 /*31-8 - phy addr of set of contiguous response buffers
-	  7-0 - number of buffers passed
-	 Buffers are 32 bytes long on 32-byte boundaries.*/
+	/*
+	 * 31-8 - phy addr of set of contiguous response buffers
+	 * 7-0 - number of buffers passed
+	 * Buffers are 32 bytes long on 32-byte boundaries.
+	 */
 #define SLIC_RBAR		0x0038
 #define SLIC_RBAR_CNT_MSK	0x000000FF
 #define SLIC_RBAR_SIZE		32
···
 #define SLIC_LOW_POWER	0x00e0
 
 	u32	slic_quiesce;	/* force slic into quiescent state
-				   before soft reset */
+				 * before soft reset
+				 */
 	u32	pad30;
 #define SLIC_QUIESCE	0x00e8
 
···
 	u16 DSize2Pci;		/* 15 DRAM size to PCI (bytes * 64K) */
 	u16 RSize2Pci;		/* 16 ROM extension size to PCI (bytes * 4k) */
 	u8 NetIntPin1;		/* 17 Network Interface Pin 1
-				    (simba/leone only) */
+				 *  (simba/leone only)
+				 */
 	u8 NetIntPin2;		/* Network Interface Pin 2 (simba/leone only)*/
 	union {
 		u8 NetIntPin3;	/* 18 Network Interface Pin 3 (simba only) */
···
 	union oemfru OemFru;	/* optional OEM FRU information */
 	u8	Pad[4];		/* Pad to 128 bytes - includes 2 cksum bytes
 				 * (if OEM FRU info exists) and two unusable
-				 * bytes at the end */
+				 * bytes at the end
+				 */
 };
 
 /* SLIC EEPROM structure for Oasis */
···
 	u16 FlashSize;		/* 14 Flash size (bytes / 4K) */
 	u16 DSize2Pci;		/* 15 DRAM size to PCI (bytes / 64K) */
 	u16 RSize2Pci;		/* 16 Flash (ROM extension) size to PCI
-					(bytes / 4K) */
+				 *	(bytes / 4K)
+				 */
 	u16 DeviceId1;		/* 17 Device Id (function 1) */
 	u16 DeviceId2;		/* 18 Device Id (function 2) */
 	u16 CfgByte6;		/* 19 Device Status Config Bytes 6-7 */

drivers/staging/slicoss/slicoss.c

···
 	unsigned char crcpoly;
 
 	/* Get the CRC polynomial for the mac address */
-	/* we use bits 1-8 (lsb), bitwise reversed,
-	 * msb (= lsb bit 0 before bitrev) is automatically discarded */
+	/*
+	 * we use bits 1-8 (lsb), bitwise reversed,
+	 * msb (= lsb bit 0 before bitrev) is automatically discarded
+	 */
 	crcpoly = ether_crc(ETH_ALEN, address) >> 23;
 
-	/* We only have space on the SLIC for 64 entries.  Lop
+	/*
+	 * We only have space on the SLIC for 64 entries.  Lop
 	 * off the top two bits. (2^6 = 64)
 	 */
 	crcpoly &= 0x3F;
···
 	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
 
 	if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
-		/* Turn on all multicast addresses. We have to do this for
+		/*
+		 * Turn on all multicast addresses. We have to do this for
 		 * promiscuous mode as well as ALLMCAST mode.  It saves the
 		 * Microcode from having to keep state about the MAC
 		 * configuration.
···
 		slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
 				 FLUSH);
 	} else {
-		/* Commit our multicast mast to the SLIC by writing to the
+		/*
+		 * Commit our multicast mast to the SLIC by writing to the
 		 * multicast address mask registers
 		 */
 		slic_reg32_write(&slic_regs->slic_mcastlow,
···
 
 	if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
 		if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
-			/*  We've got a fiber gigabit interface, and register
+			/*
+			 * We've got a fiber gigabit interface, and register
 			 *  4 is different in fiber mode than in copper mode
 			 */
 
···
 				      PCR_AUTONEG_RST));
 				slic_reg32_write(wphy, phy_config, FLUSH);
 			} else {	/* forced 1000 Mb FD*/
-				/* power down phy to break link
-				   this may not work) */
+				/*
+				 * power down phy to break link
+				 * this may not work)
+				 */
 				phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
 				slic_reg32_write(wphy, phy_config, FLUSH);
-				/* wait, Marvell says 1 sec,
-				   try to get away with 10 ms  */
+				/*
+				 * wait, Marvell says 1 sec,
+				 * try to get away with 10 ms
+				 */
 				mdelay(10);
 
-				/* disable auto-neg, set speed/duplex,
-				   soft reset phy, powerup */
+				/*
+				 * disable auto-neg, set speed/duplex,
+				 * soft reset phy, powerup
+				 */
 				phy_config =
 				    (MIICR_REG_PCR |
 				     (PCR_RESET | PCR_SPEED_1000 |
···
 			}
 		} else {	/* copper gigabit */
 
-			/* Auto-Negotiate or 1000 Mb must be auto negotiated
+			/*
+			 * Auto-Negotiate or 1000 Mb must be auto negotiated
 			 * We've got a copper gigabit interface, and
 			 * register 4 is different in copper mode than
 			 * in fiber mode
···
 				     (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
 				      | PAR_ADV10HD));
 			} else {
-			/* linkspeed == LINK_1000MB -
-			   don't advertise 10/100 Mb modes  */
+			/*
+			 * linkspeed == LINK_1000MB -
+			 * don't advertise 10/100 Mb modes
+			 */
 				phy_advreg = MIICR_REG_4;
 			}
 			/* enable PAUSE frames  */
···
 			slic_reg32_write(wphy, phy_gctlreg, FLUSH);
 
 			if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
-				/* if a Marvell PHY
-				   enable auto crossover */
+				/*
+				 * if a Marvell PHY
+				 * enable auto crossover
+				 */
 				phy_config =
 				    (MIICR_REG_16 | (MRV_REG16_XOVERON));
 				slic_reg32_write(wphy, phy_config, FLUSH);
···
 			duplex = PCR_DUPLEX_FULL;
 
 		if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
-			/* if a Marvell PHY
-			   disable auto crossover  */
+			/*
+			 * if a Marvell PHY
+			 * disable auto crossover
+			 */
 			phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
 			slic_reg32_write(wphy, phy_config, FLUSH);
 		}
···
 		mdelay(10);
 
 		if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
-			/* if a Marvell PHY
-			   disable auto-neg, set speed,
-			   soft reset phy, powerup */
+			/*
+			 * if a Marvell PHY
+			 * disable auto-neg, set speed,
+			 * soft reset phy, powerup
+			 */
 			phy_config =
 			    (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
 			slic_reg32_write(wphy, phy_config, FLUSH);
···
 			index += 4;
 
 			/* Check SRAM location zero. If it is non-zero. Abort.*/
-/*			failure = readl((u32 __iomem *)&slic_regs->slic_reset);
-			if (failure) {
-				release_firmware(fw);
-				return -EIO;
-			}*/
+		     /*
+		      * failure = readl((u32 __iomem *)&slic_regs->slic_reset);
+		      * if (failure) {
+		      *	release_firmware(fw);
+		      *	return -EIO;
+		      * }
+		      */
 		}
 	}
 	release_firmware(fw);
···
 	mdelay(10);
 	slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
 
-	/* stall for 20 ms, long enough for ucode to init card
-	   and reach mainloop */
+	/*
+	 * stall for 20 ms, long enough for ucode to init card
+	 * and reach mainloop
+	 */
 	mdelay(20);
 
 	return 0;
···
 	slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
 	slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
 
-	/* Write our multicast mask out to the card.  This is done */
-	/* here in addition to the slic_mcast_addr_set routine     */
-	/* because ALL_MCAST may have been enabled or disabled     */
+	/*
+	 * Write our multicast mask out to the card.  This is done
+	 * here in addition to the slic_mcast_addr_set routine
+	 * because ALL_MCAST may have been enabled or disabled
+	 */
 	slic_mcast_set_mask(adapter);
 }
 
···
 	struct slic_upr *upr;
 	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
 /*
-    char * ptr1;
-    char * ptr2;
-    uint cmdoffset;
-*/
+ *  char * ptr1;
+ *  char * ptr2;
+ *  uint cmdoffset;
+ */
 	upr = adapter->upr_list;
 	if (!upr)
 		return;
···
 		adapter->xmit_completes++;
 		adapter->card->events++;
 		/*
-		 Get the complete host command buffer
-		*/
+		 * Get the complete host command buffer
+		 */
 		slic_handle_word.handle_token = rspbuf->hosthandle;
 		hcmd =
 			adapter->slic_handles[slic_handle_word.handle_index].
···
 			oemfruformat = pOeeprom->OemFruFormat;
 			poemfru = &pOeeprom->OemFru;
 			macaddrs = 2;
-			/* Minor kludge for Oasis card
-			     get 2 MAC addresses from the
-			     EEPROM to ensure that function 1
-			     gets the Port 1 MAC address */
+			/*
+			 * Minor kludge for Oasis card
+			 * get 2 MAC addresses from the
+			 * EEPROM to ensure that function 1
+			 * gets the Port 1 MAC address
+			 */
 			break;
 		default:
 			/* extract EEPROM data and pointers to EEPROM data */
···
 			ee_chksum =
 			    *(u16 *)((char *)peeprom + (eecodesize - 2));
 			/*
-			    calculate the EEPROM checksum
-			*/
+			 *  calculate the EEPROM checksum
+			 */
 			calc_chksum = slic_eeprom_cksum(peeprom,
 							eecodesize - 2);
 			/*
-			    if the ucdoe chksum flag bit worked,
-			    we wouldn't need this
-			*/
+			 *  if the ucdoe chksum flag bit worked,
+			 *  we wouldn't need this
+			 */
 			if (ee_chksum == calc_chksum)
 				card->config.EepromValid = true;
 		}
···
 
 	adapter->card_size = 1;
 	/*
-	  Initialize slic_handle array
-	*/
+	 * Initialize slic_handle array
+	 */
 	/*
-	 Start with 1.  0 is an invalid host handle.
-	*/
+	 * Start with 1.  0 is an invalid host handle.
+	 */
 	for (index = 1, pslic_handle = &adapter->slic_handles[1];
 	     index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {