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kernel os linux

regulator: pca9450: Enable system reset on WDOG_B assertion

By default the PCA9450 doesn't handle the assertion of the WDOG_B
signal, but this is required to guarantee that things like software
resets triggered by the watchdog work reliably.

As we don't want to rely on the bootloader to enable this, we tell
the PMIC to issue a cold reset in case the WDOG_B signal is
asserted (WDOG_B_CFG = 10), just as the NXP U-Boot code does.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Link: https://lore.kernel.org/r/20210211105534.38972-3-frieder.schrempf@kontron.de
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Frieder Schrempf and committed by
Mark Brown
f7684f5a 8c67a11b

+15
+8
drivers/regulator/pca9450-regulator.c
··· 797 797 return ret; 798 798 } 799 799 800 + /* Set reset behavior on assertion of WDOG_B signal */ 801 + ret = regmap_update_bits(pca9450->regmap, PCA9450_REG_RESET_CTRL, 802 + WDOG_B_CFG_MASK, WDOG_B_CFG_COLD_LDO12); 803 + if (ret) { 804 + dev_err(&i2c->dev, "Failed to set WDOG_B reset behavior\n"); 805 + return ret; 806 + } 807 + 800 808 /* 801 809 * The driver uses the LDO5CTRL_H register to control the LDO5 regulator. 802 810 * This is only valid if the SD_VSEL input of the PMIC is high. Let's
+7
include/linux/regulator/pca9450.h
··· 216 216 #define IRQ_THERM_105 0x02 217 217 #define IRQ_THERM_125 0x01 218 218 219 + /* PCA9450_REG_RESET_CTRL bits */ 220 + #define WDOG_B_CFG_MASK 0xC0 221 + #define WDOG_B_CFG_NONE 0x00 222 + #define WDOG_B_CFG_WARM 0x40 223 + #define WDOG_B_CFG_COLD_LDO12 0x80 224 + #define WDOG_B_CFG_COLD 0xC0 225 + 219 226 #endif /* __LINUX_REG_PCA9450_H__ */