Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: gpio: nxp,lpc3220-gpio: Convert to dtschema

Convert the NXP LPC3220 SoC GPIO controller bindings to DT schema format.

Signed-off-by: Animesh Agarwal <animeshagarwal28@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240731054442.109732-1-animeshagarwal28@gmail.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

authored by

Animesh Agarwal and committed by
Bartosz Golaszewski
f7176724 c206d6be

+50 -43
-43
Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt
··· 1 - NXP LPC32xx SoC GPIO controller 2 - 3 - Required properties: 4 - - compatible: must be "nxp,lpc3220-gpio" 5 - - reg: Physical base address and length of the controller's registers. 6 - - gpio-controller: Marks the device node as a GPIO controller. 7 - - #gpio-cells: Should be 3: 8 - 1) bank: 9 - 0: GPIO P0 10 - 1: GPIO P1 11 - 2: GPIO P2 12 - 3: GPIO P3 13 - 4: GPI P3 14 - 5: GPO P3 15 - 2) pin number 16 - 3) optional parameters: 17 - - bit 0 specifies polarity (0 for normal, 1 for inverted) 18 - - reg: Index of the GPIO group 19 - 20 - Example: 21 - 22 - gpio: gpio@40028000 { 23 - compatible = "nxp,lpc3220-gpio"; 24 - reg = <0x40028000 0x1000>; 25 - gpio-controller; 26 - #gpio-cells = <3>; /* bank, pin, flags */ 27 - }; 28 - 29 - leds { 30 - compatible = "gpio-leds"; 31 - 32 - led0 { 33 - gpios = <&gpio 5 1 1>; /* GPO_P3 1, active low */ 34 - linux,default-trigger = "heartbeat"; 35 - default-state = "off"; 36 - }; 37 - 38 - led1 { 39 - gpios = <&gpio 5 14 1>; /* GPO_P3 14, active low */ 40 - linux,default-trigger = "timer"; 41 - default-state = "off"; 42 - }; 43 - };
+50
Documentation/devicetree/bindings/gpio/nxp,lpc3220-gpio.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/gpio/nxp,lpc3220-gpio.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: NXP LPC3220 SoC GPIO controller 8 + 9 + maintainers: 10 + - Animesh Agarwal <animeshagarwal28@gmail.com> 11 + 12 + properties: 13 + compatible: 14 + const: nxp,lpc3220-gpio 15 + 16 + reg: 17 + maxItems: 1 18 + 19 + gpio-controller: true 20 + 21 + '#gpio-cells': 22 + const: 3 23 + description: | 24 + 1) bank: 25 + 0: GPIO P0 26 + 1: GPIO P1 27 + 2: GPIO P2 28 + 3: GPIO P3 29 + 4: GPI P3 30 + 5: GPO P3 31 + 2) pin number 32 + 3) flags: 33 + - bit 0 specifies polarity (0 for normal, 1 for inverted) 34 + 35 + required: 36 + - compatible 37 + - reg 38 + - gpio-controller 39 + - '#gpio-cells' 40 + 41 + additionalProperties: false 42 + 43 + examples: 44 + - | 45 + gpio@40028000 { 46 + compatible = "nxp,lpc3220-gpio"; 47 + reg = <0x40028000 0x1000>; 48 + gpio-controller; 49 + #gpio-cells = <3>; /* bank, pin, flags */ 50 + };