Merge branch 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband

* 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband:
IB/mlx4: Fix last allocated object tracking in bitmap allocator
IB/cm: Fix stale connection detection
IPoIB/cm: Fix performance regression on Mellanox
IB/mthca: Fix handling of send CQE with error for QPs connected to SRQ

+55 -55
+14 -11
drivers/infiniband/core/cm.c
··· 1297 1298 req_msg = (struct cm_req_msg *)work->mad_recv_wc->recv_buf.mad; 1299 1300 - /* Check for duplicate REQ and stale connections. */ 1301 spin_lock_irqsave(&cm.lock, flags); 1302 timewait_info = cm_insert_remote_id(cm_id_priv->timewait_info); 1303 - if (!timewait_info) 1304 - timewait_info = cm_insert_remote_qpn(cm_id_priv->timewait_info); 1305 - 1306 if (timewait_info) { 1307 cur_cm_id_priv = cm_get_id(timewait_info->work.local_id, 1308 timewait_info->work.remote_id); 1309 - cm_cleanup_timewait(cm_id_priv->timewait_info); 1310 spin_unlock_irqrestore(&cm.lock, flags); 1311 if (cur_cm_id_priv) { 1312 cm_dup_req_handler(work, cur_cm_id_priv); 1313 cm_deref_id(cur_cm_id_priv); 1314 - } else 1315 - cm_issue_rej(work->port, work->mad_recv_wc, 1316 - IB_CM_REJ_STALE_CONN, CM_MSG_RESPONSE_REQ, 1317 - NULL, 0); 1318 - listen_cm_id_priv = NULL; 1319 - goto out; 1320 } 1321 1322 /* Find matching listen request. */
··· 1297 1298 req_msg = (struct cm_req_msg *)work->mad_recv_wc->recv_buf.mad; 1299 1300 + /* Check for possible duplicate REQ. */ 1301 spin_lock_irqsave(&cm.lock, flags); 1302 timewait_info = cm_insert_remote_id(cm_id_priv->timewait_info); 1303 if (timewait_info) { 1304 cur_cm_id_priv = cm_get_id(timewait_info->work.local_id, 1305 timewait_info->work.remote_id); 1306 spin_unlock_irqrestore(&cm.lock, flags); 1307 if (cur_cm_id_priv) { 1308 cm_dup_req_handler(work, cur_cm_id_priv); 1309 cm_deref_id(cur_cm_id_priv); 1310 + } 1311 + return NULL; 1312 + } 1313 + 1314 + /* Check for stale connections. */ 1315 + timewait_info = cm_insert_remote_qpn(cm_id_priv->timewait_info); 1316 + if (timewait_info) { 1317 + cm_cleanup_timewait(cm_id_priv->timewait_info); 1318 + spin_unlock_irqrestore(&cm.lock, flags); 1319 + cm_issue_rej(work->port, work->mad_recv_wc, 1320 + IB_CM_REJ_STALE_CONN, CM_MSG_RESPONSE_REQ, 1321 + NULL, 0); 1322 + return NULL; 1323 } 1324 1325 /* Find matching listen request. */
+3 -3
drivers/infiniband/hw/mthca/mthca_qp.c
··· 2284 struct mthca_next_seg *next; 2285 2286 /* 2287 - * For SRQs, all WQEs generate a CQE, so we're always at the 2288 - * end of the doorbell chain. 2289 */ 2290 - if (qp->ibqp.srq) { 2291 *new_wqe = 0; 2292 return; 2293 }
··· 2284 struct mthca_next_seg *next; 2285 2286 /* 2287 + * For SRQs, all receive WQEs generate a CQE, so we're always 2288 + * at the end of the doorbell chain. 2289 */ 2290 + if (qp->ibqp.srq && !is_send) { 2291 *new_wqe = 0; 2292 return; 2293 }
+1 -2
drivers/infiniband/ulp/ipoib/ipoib.h
··· 156 * - and then invoke a Destroy QP or Reset QP. 157 * 158 * We use the second option and wait for a completion on the 159 - * rx_drain_qp before destroying QPs attached to our SRQ. 160 */ 161 162 enum ipoib_cm_state { ··· 199 struct ib_srq *srq; 200 struct ipoib_cm_rx_buf *srq_ring; 201 struct ib_cm_id *id; 202 - struct ib_qp *rx_drain_qp; /* generates WR described in 10.3.1 */ 203 struct list_head passive_ids; /* state: LIVE */ 204 struct list_head rx_error_list; /* state: ERROR */ 205 struct list_head rx_flush_list; /* state: FLUSH, drain not started */
··· 156 * - and then invoke a Destroy QP or Reset QP. 157 * 158 * We use the second option and wait for a completion on the 159 + * same CQ before destroying QPs attached to our SRQ. 160 */ 161 162 enum ipoib_cm_state { ··· 199 struct ib_srq *srq; 200 struct ipoib_cm_rx_buf *srq_ring; 201 struct ib_cm_id *id; 202 struct list_head passive_ids; /* state: LIVE */ 203 struct list_head rx_error_list; /* state: ERROR */ 204 struct list_head rx_flush_list; /* state: FLUSH, drain not started */
+36 -38
drivers/infiniband/ulp/ipoib/ipoib_cm.c
··· 69 70 #define IPOIB_CM_RX_DRAIN_WRID 0x7fffffff 71 72 - static struct ib_recv_wr ipoib_cm_rx_drain_wr = { 73 - .wr_id = IPOIB_CM_RX_DRAIN_WRID 74 }; 75 76 static int ipoib_cm_tx_handler(struct ib_cm_id *cm_id, ··· 164 165 static void ipoib_cm_start_rx_drain(struct ipoib_dev_priv* priv) 166 { 167 - struct ib_recv_wr *bad_wr; 168 169 - /* rx_drain_qp send queue depth is 1, so 170 * make sure we have at most 1 outstanding WR. */ 171 if (list_empty(&priv->cm.rx_flush_list) || 172 !list_empty(&priv->cm.rx_drain_list)) 173 return; 174 175 - if (ib_post_recv(priv->cm.rx_drain_qp, &ipoib_cm_rx_drain_wr, &bad_wr)) 176 - ipoib_warn(priv, "failed to post rx_drain wr\n"); 177 178 list_splice_init(&priv->cm.rx_flush_list, &priv->cm.rx_drain_list); 179 } ··· 206 struct ipoib_dev_priv *priv = netdev_priv(dev); 207 struct ib_qp_init_attr attr = { 208 .event_handler = ipoib_cm_rx_event_handler, 209 - .send_cq = priv->cq, /* does not matter, we never send anything */ 210 .recv_cq = priv->cq, 211 .srq = priv->cm.srq, 212 - .cap.max_send_wr = 1, /* FIXME: 0 Seems not to work */ 213 .cap.max_send_sge = 1, /* FIXME: 0 Seems not to work */ 214 .sq_sig_type = IB_SIGNAL_ALL_WR, 215 .qp_type = IB_QPT_RC, ··· 249 ipoib_warn(priv, "failed to modify QP to RTR: %d\n", ret); 250 return ret; 251 } 252 return 0; 253 } 254 ··· 651 int ipoib_cm_dev_open(struct net_device *dev) 652 { 653 struct ipoib_dev_priv *priv = netdev_priv(dev); 654 - struct ib_qp_init_attr qp_init_attr = { 655 - .send_cq = priv->cq, /* does not matter, we never send anything */ 656 - .recv_cq = priv->cq, 657 - .cap.max_send_wr = 1, /* FIXME: 0 Seems not to work */ 658 - .cap.max_send_sge = 1, /* FIXME: 0 Seems not to work */ 659 - .cap.max_recv_wr = 1, 660 - .cap.max_recv_sge = 1, /* FIXME: 0 Seems not to work */ 661 - .sq_sig_type = IB_SIGNAL_ALL_WR, 662 - .qp_type = IB_QPT_UC, 663 - }; 664 int ret; 665 666 if (!IPOIB_CM_SUPPORTED(dev->dev_addr)) 667 return 0; 668 - 669 - priv->cm.rx_drain_qp = ib_create_qp(priv->pd, &qp_init_attr); 670 - if (IS_ERR(priv->cm.rx_drain_qp)) { 671 - printk(KERN_WARNING "%s: failed to create CM ID\n", priv->ca->name); 672 - ret = PTR_ERR(priv->cm.rx_drain_qp); 673 - return ret; 674 - } 675 - 676 - /* 677 - * We put the QP in error state directly. This way, a "flush 678 - * error" WC will be immediately generated for each WR we post. 679 - */ 680 - ret = ib_modify_qp(priv->cm.rx_drain_qp, &ipoib_cm_err_attr, IB_QP_STATE); 681 - if (ret) { 682 - ipoib_warn(priv, "failed to modify drain QP to error: %d\n", ret); 683 - goto err_qp; 684 - } 685 686 priv->cm.id = ib_create_cm_id(priv->ca, ipoib_cm_rx_handler, dev); 687 if (IS_ERR(priv->cm.id)) { ··· 677 ib_destroy_cm_id(priv->cm.id); 678 err_cm: 679 priv->cm.id = NULL; 680 - err_qp: 681 - ib_destroy_qp(priv->cm.rx_drain_qp); 682 return ret; 683 } 684 ··· 739 kfree(p); 740 } 741 742 - ib_destroy_qp(priv->cm.rx_drain_qp); 743 cancel_delayed_work(&priv->cm.stale_task); 744 } 745
··· 69 70 #define IPOIB_CM_RX_DRAIN_WRID 0x7fffffff 71 72 + static struct ib_send_wr ipoib_cm_rx_drain_wr = { 73 + .wr_id = IPOIB_CM_RX_DRAIN_WRID, 74 + .opcode = IB_WR_SEND, 75 }; 76 77 static int ipoib_cm_tx_handler(struct ib_cm_id *cm_id, ··· 163 164 static void ipoib_cm_start_rx_drain(struct ipoib_dev_priv* priv) 165 { 166 + struct ib_send_wr *bad_wr; 167 + struct ipoib_cm_rx *p; 168 169 + /* We only reserved 1 extra slot in CQ for drain WRs, so 170 * make sure we have at most 1 outstanding WR. */ 171 if (list_empty(&priv->cm.rx_flush_list) || 172 !list_empty(&priv->cm.rx_drain_list)) 173 return; 174 175 + /* 176 + * QPs on flush list are error state. This way, a "flush 177 + * error" WC will be immediately generated for each WR we post. 178 + */ 179 + p = list_entry(priv->cm.rx_flush_list.next, typeof(*p), list); 180 + if (ib_post_send(p->qp, &ipoib_cm_rx_drain_wr, &bad_wr)) 181 + ipoib_warn(priv, "failed to post drain wr\n"); 182 183 list_splice_init(&priv->cm.rx_flush_list, &priv->cm.rx_drain_list); 184 } ··· 199 struct ipoib_dev_priv *priv = netdev_priv(dev); 200 struct ib_qp_init_attr attr = { 201 .event_handler = ipoib_cm_rx_event_handler, 202 + .send_cq = priv->cq, /* For drain WR */ 203 .recv_cq = priv->cq, 204 .srq = priv->cm.srq, 205 + .cap.max_send_wr = 1, /* For drain WR */ 206 .cap.max_send_sge = 1, /* FIXME: 0 Seems not to work */ 207 .sq_sig_type = IB_SIGNAL_ALL_WR, 208 .qp_type = IB_QPT_RC, ··· 242 ipoib_warn(priv, "failed to modify QP to RTR: %d\n", ret); 243 return ret; 244 } 245 + 246 + /* 247 + * Current Mellanox HCA firmware won't generate completions 248 + * with error for drain WRs unless the QP has been moved to 249 + * RTS first. This work-around leaves a window where a QP has 250 + * moved to error asynchronously, but this will eventually get 251 + * fixed in firmware, so let's not error out if modify QP 252 + * fails. 253 + */ 254 + qp_attr.qp_state = IB_QPS_RTS; 255 + ret = ib_cm_init_qp_attr(cm_id, &qp_attr, &qp_attr_mask); 256 + if (ret) { 257 + ipoib_warn(priv, "failed to init QP attr for RTS: %d\n", ret); 258 + return 0; 259 + } 260 + ret = ib_modify_qp(qp, &qp_attr, qp_attr_mask); 261 + if (ret) { 262 + ipoib_warn(priv, "failed to modify QP to RTS: %d\n", ret); 263 + return 0; 264 + } 265 + 266 return 0; 267 } 268 ··· 623 int ipoib_cm_dev_open(struct net_device *dev) 624 { 625 struct ipoib_dev_priv *priv = netdev_priv(dev); 626 int ret; 627 628 if (!IPOIB_CM_SUPPORTED(dev->dev_addr)) 629 return 0; 630 631 priv->cm.id = ib_create_cm_id(priv->ca, ipoib_cm_rx_handler, dev); 632 if (IS_ERR(priv->cm.id)) { ··· 676 ib_destroy_cm_id(priv->cm.id); 677 err_cm: 678 priv->cm.id = NULL; 679 return ret; 680 } 681 ··· 740 kfree(p); 741 } 742 743 cancel_delayed_work(&priv->cm.stale_task); 744 } 745
+1 -1
drivers/net/mlx4/alloc.c
··· 51 52 if (obj < bitmap->max) { 53 set_bit(obj, bitmap->table); 54 obj |= bitmap->top; 55 - bitmap->last = obj + 1; 56 } else 57 obj = -1; 58
··· 51 52 if (obj < bitmap->max) { 53 set_bit(obj, bitmap->table); 54 + bitmap->last = (obj + 1) & (bitmap->max - 1); 55 obj |= bitmap->top; 56 } else 57 obj = -1; 58