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dt-bindings: thermal: Convert qoriq to json-schema

Convert the qoriq thermal binding to DT schema format using json-schema

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>

authored by

Anson Huang and committed by
Rob Herring
f700bf65 d954ea42

+114 -71
-71
Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
··· 1 - * Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs 2 - 3 - Required properties: 4 - - compatible : Must include "fsl,qoriq-tmu" or "fsl,imx8mq-tmu". The 5 - version of the device is determined by the TMU IP Block Revision 6 - Register (IPBRR0) at offset 0x0BF8. 7 - Table of correspondences between IPBRR0 values and example chips: 8 - Value Device 9 - ---------- ----- 10 - 0x01900102 T1040 11 - - reg : Address range of TMU registers. 12 - - interrupts : Contains the interrupt for TMU. 13 - - fsl,tmu-range : The values to be programmed into TTRnCR, as specified by 14 - the SoC reference manual. The first cell is TTR0CR, the second is 15 - TTR1CR, etc. 16 - - fsl,tmu-calibration : A list of cell pairs containing temperature 17 - calibration data, as specified by the SoC reference manual. 18 - The first cell of each pair is the value to be written to TTCFGR, 19 - and the second is the value to be written to TSCFGR. 20 - - #thermal-sensor-cells : Must be 1. The sensor specifier is the monitoring 21 - site ID, and represents the "n" in TRITSRn and TRATSRn. 22 - 23 - Optional property: 24 - - little-endian : If present, the TMU registers are little endian. If absent, 25 - the default is big endian. 26 - - clocks : the clock for clocking the TMU silicon. 27 - 28 - Example: 29 - 30 - tmu@f0000 { 31 - compatible = "fsl,qoriq-tmu"; 32 - reg = <0xf0000 0x1000>; 33 - interrupts = <18 2 0 0>; 34 - fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>; 35 - fsl,tmu-calibration = <0x00000000 0x00000025 36 - 0x00000001 0x00000028 37 - 0x00000002 0x0000002d 38 - 0x00000003 0x00000031 39 - 0x00000004 0x00000036 40 - 0x00000005 0x0000003a 41 - 0x00000006 0x00000040 42 - 0x00000007 0x00000044 43 - 0x00000008 0x0000004a 44 - 0x00000009 0x0000004f 45 - 0x0000000a 0x00000054 46 - 47 - 0x00010000 0x0000000d 48 - 0x00010001 0x00000013 49 - 0x00010002 0x00000019 50 - 0x00010003 0x0000001f 51 - 0x00010004 0x00000025 52 - 0x00010005 0x0000002d 53 - 0x00010006 0x00000033 54 - 0x00010007 0x00000043 55 - 0x00010008 0x0000004b 56 - 0x00010009 0x00000053 57 - 58 - 0x00020000 0x00000010 59 - 0x00020001 0x00000017 60 - 0x00020002 0x0000001f 61 - 0x00020003 0x00000029 62 - 0x00020004 0x00000031 63 - 0x00020005 0x0000003c 64 - 0x00020006 0x00000042 65 - 0x00020007 0x0000004d 66 - 0x00020008 0x00000056 67 - 68 - 0x00030000 0x00000012 69 - 0x00030001 0x0000001d>; 70 - #thermal-sensor-cells = <1>; 71 - };
+114
Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/thermal/qoriq-thermal.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs 8 + 9 + maintainers: 10 + - Anson Huang <Anson.Huang@nxp.com> 11 + 12 + properties: 13 + compatible: 14 + description: | 15 + The version of the device is determined by the TMU IP Block Revision 16 + Register (IPBRR0) at offset 0x0BF8. 17 + Table of correspondences between IPBRR0 values and example chips: 18 + Value Device 19 + ---------- ----- 20 + 0x01900102 T1040 21 + enum: 22 + - fsl,qoriq-tmu 23 + - fsl,imx8mq-tmu 24 + 25 + reg: 26 + maxItems: 1 27 + 28 + interrupts: 29 + maxItems: 1 30 + 31 + fsl,tmu-range: 32 + $ref: '/schemas/types.yaml#/definitions/uint32-array' 33 + description: | 34 + The values to be programmed into TTRnCR, as specified by the SoC 35 + reference manual. The first cell is TTR0CR, the second is TTR1CR, etc. 36 + maxItems: 4 37 + 38 + fsl,tmu-calibration: 39 + $ref: '/schemas/types.yaml#/definitions/uint32-matrix' 40 + description: | 41 + A list of cell pairs containing temperature calibration data, as 42 + specified by the SoC reference manual. The first cell of each pair 43 + is the value to be written to TTCFGR, and the second is the value 44 + to be written to TSCFGR. 45 + items: 46 + items: 47 + - description: value for TTCFGR 48 + - description: value for TSCFGR 49 + minItems: 1 50 + maxItems: 64 51 + 52 + little-endian: 53 + description: | 54 + boolean, if present, the TMU registers are little endian. If absent, 55 + the default is big endian. 56 + type: boolean 57 + 58 + clocks: 59 + maxItems: 1 60 + 61 + "#thermal-sensor-cells": 62 + const: 1 63 + 64 + required: 65 + - compatible 66 + - reg 67 + - interrupts 68 + - fsl,tmu-range 69 + - fsl,tmu-calibration 70 + - '#thermal-sensor-cells' 71 + 72 + additionalProperties: false 73 + 74 + examples: 75 + - | 76 + tmu@f0000 { 77 + compatible = "fsl,qoriq-tmu"; 78 + reg = <0xf0000 0x1000>; 79 + interrupts = <18 2 0 0>; 80 + fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>; 81 + fsl,tmu-calibration = <0x00000000 0x00000025>, 82 + <0x00000001 0x00000028>, 83 + <0x00000002 0x0000002d>, 84 + <0x00000003 0x00000031>, 85 + <0x00000004 0x00000036>, 86 + <0x00000005 0x0000003a>, 87 + <0x00000006 0x00000040>, 88 + <0x00000007 0x00000044>, 89 + <0x00000008 0x0000004a>, 90 + <0x00000009 0x0000004f>, 91 + <0x0000000a 0x00000054>, 92 + <0x00010000 0x0000000d>, 93 + <0x00010001 0x00000013>, 94 + <0x00010002 0x00000019>, 95 + <0x00010003 0x0000001f>, 96 + <0x00010004 0x00000025>, 97 + <0x00010005 0x0000002d>, 98 + <0x00010006 0x00000033>, 99 + <0x00010007 0x00000043>, 100 + <0x00010008 0x0000004b>, 101 + <0x00010009 0x00000053>, 102 + <0x00020000 0x00000010>, 103 + <0x00020001 0x00000017>, 104 + <0x00020002 0x0000001f>, 105 + <0x00020003 0x00000029>, 106 + <0x00020004 0x00000031>, 107 + <0x00020005 0x0000003c>, 108 + <0x00020006 0x00000042>, 109 + <0x00020007 0x0000004d>, 110 + <0x00020008 0x00000056>, 111 + <0x00030000 0x00000012>, 112 + <0x00030001 0x0000001d>; 113 + #thermal-sensor-cells = <1>; 114 + };