Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'iio-for-5.9a-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next

Jonathan writes:

First set of new device support, cleanups and features for IIO in the 5.9 cycle

Some new devices, but particularly good this time is the core rework coming
from Alexandru. Some of this has been in Analog's tree a long time, but other
parts are motivated by closing down common mistakes in new drivers.

Changes since first try at this pull request:
* Add missed patch to actually remove iio_priv_to_dev and as a result
also drop a few ingenic patches that need to be updated to take this
into account.
* Fix an ordering issue int he pollfunc attach in the core rework.

New device support
* qcom pmic7 adc
- New driver using common qcom-vadc library. Some associated cleanups and
refactors.
* invensense icm42600
- New driver supporting icm42600, icm42602, icm42605 and icm42622 via i2c
or spi. These are all 6 axis IMUs with gyro and accelerometers.
Driver supports buffered modes using the hardware fifo and interpolation
for accurate timestamps.
* sensirion scd30
- New driver for this carbon dioxide sensor including i2c and serial
interfaces + bindings.

Features
* ak8975
- Add reset gpio support.
* bma400
- Support SPI.
* bmc150
- Document and add support for bmc156b and bmm150b, tidy up _magn endings.
* bmi160
- Regulator and mount matrix support.
* mxc4005
- Add ID for mxc6655
* rockchip-saradc
- Triggered buffer support.

DT bindings
* qcom spmi-vadc converted to yaml + pmic7 bindings
* ak8975 tidy up and convert to yaml + add reset-gpio binding
* ingenic-adc -convert to yaml.

Core rework all carried through by Alexandru Ardelean.
* Assign parent device in the core rather than every driver. A few devices
need to provide specific non standard parents, so there is support for
overriding.
* Start to take parts of struct iio_dev opaque to the drivers.
This will be a long term job, but should reduce the number of drivers
we get that use parts that are currently only 'internal' by documentation.
* Move attach and detach of pollfunc to the core. Every triggered buffer
using driver had to do the same thing, so lets do it in the core. The
hard part here was getting all the drivers into canonical form so there
would be no functional changes in this final patch. That's taken quite
a lot of work over last couple of cycles!

Cleanups and minor fixes.
* docs
- Improve IIO_CONCENTRATION channel type description in ABI docs.
- Drop doubled word cases.
- Http to Https conversion.
* core
- Make iio_device_get_drvdata take a const struct iio_dev * avoiding some
nasty casts.
* ADCs
- Drop lots of users of of_match_ptr macro, includes of mod_devicetable.h
and CONFIG_OF protections. These prevent use of ACPI PRP0001 with these
drivers and get coppied into lots of new drivers.
* ad5380
- Constify iio_chan_spec_ext_info
* ad5592r
- Constify iio_chan_spec_ext_info
- Avoid use of iio_priv_to_dev (precursor to taking parts of iio_dev opaque)
* ad8366
- Make gpio optional as doesn't matter if its there or not.
* adis16480
- Use irq types instead of the flags.
* atlas-ezo-sensor
- Minimize scope of ret variable.
* at91-adc
- Add COMPILE_TEST dependency to driver to improve build coverage.
- Avoid use of iio_priv_to_dev (precursor to taking parts of iio_dev opaque)
* at91-sama5d2
- Avoid use of iio_priv_to_dev (precursor to taking parts of iio_dev opaque)
- Drop Ludovic as a co-maintaienr.
* cros_ec
- Reapply the range after resume.
- Add a read only frequency entry for legacy version.
- Typo fixes
* hts221
- Avoid use of iio_priv_to_dev (precursor to taking parts of iio_dev opaque)
* inv_mpu
- Drop double check on ACPI companion device.
* iqs621
- Avoid use of iio_priv_to_dev (precursor to taking parts of iio_dev opaque)
* iqs624
- Avoid use of iio_priv_to_dev (precursor to taking parts of iio_dev opaque)
* max11100
- Constify iio_chan_spec
* mmc35240
- Constify reg_default
* rockchip-saradc
- Move to managed allocators for everything in probe.
- Use more distinctive prefix for channel macros.
* stk3310
- Constify regmap_config.
* stm32-adc
- Avoid use of iio_priv_to_dev (precursor to taking parts of iio_dev opaque)
* stm32-dfsdm-adc
- Avoid use of iio_priv_to_dev (precursor to taking parts of iio_dev opaque)
* ti-am335x
- Use managed allocations where straight forward in probe function.
* tsl2563
- Avoid use of iio_priv_to_dev (precursor to taking parts of iio_dev opaque)

* tag 'iio-for-5.9a-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (107 commits)
iio: buffer: fix attach/detach pollfunc order
iio: core: remove iio_priv_to_dev() helper
Replace HTTP links with HTTPS ones: drivers/iio
Replace HTTP links with HTTPS ones: Documentation/devicetree/bindings/iio
dt-bindings: iio/adc: Convert ingenic-adc docs to YAML.
iio: cros_ec_accel_legacy: Add Read Only frequency entries
MAINTAINERS: adc: at91-sama5d2_adc: remove myself as co-maintainer
iio: adc: ti_am335x_adc: alloc kfifo & IRQ via devm_ functions
iio: adc: ti_am335x_adc: alloc channels via devm_kcalloc()
iio:adc:ingenic: drop of_match_ptr protection and include mod_devicetable.h
iio:adc:ti-tlc4541: Drop CONFIG_OF and of_match_ptr protections.
iio:adc:ti-adc161s626: Drop of_match_ptr protection.
iio:adc:ti-adc084s021: drop of_match_ptr protection
iio:adc:ti-adc0832: drop CONFIG_OF and of_match_ptr protections
iio:adc:ti-adc081c: Drop of_match_ptr and change to mod_devicetable.h
iio:adc:sd_adc_modulator: Drop of_match_ptr and tweak includes
iio:adc:mcp3422: remove CONFIG_OF and of_match_ptr protections
iio:adc:mcp320x: Drop CONFIG_OF and of_match_ptr protections
iio:adc:max1118: Drop CONFIG_OF / of_match_ptr protections
iio:adc:max11100: Drop of_match_ptr protection / add mod_devicetable.h include
...

+7973 -1642
+2 -1
Documentation/ABI/testing/sysfs-bus-iio
··· 1569 1569 KernelVersion: 4.3 1570 1570 Contact: linux-iio@vger.kernel.org 1571 1571 Description: 1572 - Raw (unscaled no offset etc.) percentage reading of a substance. 1572 + Raw (unscaled no offset etc.) reading of a substance. Units 1573 + after application of scale and offset are percents. 1573 1574 1574 1575 What: /sys/bus/iio/devices/iio:deviceX/in_resistance_raw 1575 1576 What: /sys/bus/iio/devices/iio:deviceX/in_resistanceX_raw
+20
Documentation/ABI/testing/sysfs-bus-iio-icm42600
··· 1 + What: /sys/bus/iio/devices/iio:deviceX/in_accel_x_calibbias 2 + What: /sys/bus/iio/devices/iio:deviceX/in_accel_y_calibbias 3 + What: /sys/bus/iio/devices/iio:deviceX/in_accel_z_calibbias 4 + What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_x_calibbias 5 + What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_y_calibbias 6 + What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_z_calibbias 7 + KernelVersion: 5.8 8 + Contact: linux-iio@vger.kernel.org 9 + Description: 10 + Hardware applied calibration offset (assumed to fix production 11 + inaccuracies). Values represent a real physical offset expressed 12 + in SI units (m/s^2 for accelerometer and rad/s for gyroscope). 13 + 14 + What: /sys/bus/iio/devices/iio:deviceX/in_accel_calibbias_available 15 + What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_calibbias_available 16 + KernelVersion: 5.8 17 + Contact: linux-iio@vger.kernel.org 18 + Description: 19 + Range of available values for hardware offset. Values in SI 20 + units (m/s^2 for accelerometer and rad/s for gyroscope).
+34
Documentation/ABI/testing/sysfs-bus-iio-scd30
··· 1 + What: /sys/bus/iio/devices/iio:deviceX/calibration_auto_enable 2 + Date: June 2020 3 + KernelVersion: 5.8 4 + Contact: linux-iio@vger.kernel.org 5 + Description: 6 + Contaminants build-up in the measurement chamber or optical 7 + elements deterioration leads to sensor drift. 8 + 9 + One can compensate for sensor drift by using automatic self 10 + calibration procedure (asc). 11 + 12 + Writing 1 or 0 to this attribute will respectively activate or 13 + deactivate asc. 14 + 15 + Upon reading current asc status is returned. 16 + 17 + What: /sys/bus/iio/devices/iio:deviceX/calibration_forced_value 18 + Date: June 2020 19 + KernelVersion: 5.8 20 + Contact: linux-iio@vger.kernel.org 21 + Description: 22 + Contaminants build-up in the measurement chamber or optical 23 + elements deterioration leads to sensor drift. 24 + 25 + One can compensate for sensor drift by using forced 26 + recalibration (frc). This is useful in case there's known 27 + co2 reference available nearby the sensor. 28 + 29 + Picking value from the range [400 1 2000] and writing it to the 30 + sensor will set frc. 31 + 32 + Upon reading current frc value is returned. Note that after 33 + power cycling default value (i.e 400) is returned even though 34 + internally sensor had recalibrated itself.
+2 -2
Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml
··· 12 12 description: | 13 13 Analog Devices ADXL345/ADXL375 3-Axis Digital Accelerometers that supports 14 14 both I2C & SPI interfaces. 15 - http://www.analog.com/en/products/mems/accelerometers/adxl345.html 16 - http://www.analog.com/en/products/sensors-mems/accelerometers/adxl375.html 15 + https://www.analog.com/en/products/mems/accelerometers/adxl345.html 16 + https://www.analog.com/en/products/sensors-mems/accelerometers/adxl375.html 17 17 18 18 properties: 19 19 compatible:
-49
Documentation/devicetree/bindings/iio/adc/ingenic,adc.txt
··· 1 - * Ingenic JZ47xx ADC controller IIO bindings 2 - 3 - Required properties: 4 - 5 - - compatible: Should be one of: 6 - * ingenic,jz4725b-adc 7 - * ingenic,jz4740-adc 8 - * ingenic,jz4770-adc 9 - - reg: ADC controller registers location and length. 10 - - clocks: phandle to the SoC's ADC clock. 11 - - clock-names: Must be set to "adc". 12 - - #io-channel-cells: Must be set to <1> to indicate channels are selected 13 - by index. 14 - 15 - ADC clients must use the format described in iio-bindings.txt, giving 16 - a phandle and IIO specifier pair ("io-channels") to the ADC controller. 17 - 18 - Example: 19 - 20 - #include <dt-bindings/iio/adc/ingenic,adc.h> 21 - 22 - adc: adc@10070000 { 23 - compatible = "ingenic,jz4740-adc"; 24 - #io-channel-cells = <1>; 25 - 26 - reg = <0x10070000 0x30>; 27 - 28 - clocks = <&cgu JZ4740_CLK_ADC>; 29 - clock-names = "adc"; 30 - 31 - interrupt-parent = <&intc>; 32 - interrupts = <18>; 33 - }; 34 - 35 - adc-keys { 36 - ... 37 - compatible = "adc-keys"; 38 - io-channels = <&adc INGENIC_ADC_AUX>; 39 - io-channel-names = "buttons"; 40 - ... 41 - }; 42 - 43 - battery { 44 - ... 45 - compatible = "ingenic,jz4740-battery"; 46 - io-channels = <&adc INGENIC_ADC_BATTERY>; 47 - io-channel-names = "battery"; 48 - ... 49 - };
+71
Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + # Copyright 2019-2020 Artur Rojek 3 + %YAML 1.2 4 + --- 5 + $id: "http://devicetree.org/schemas/iio/adc/ingenic,adc.yaml#" 6 + $schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 + 8 + title: Ingenic JZ47xx ADC controller IIO bindings 9 + 10 + maintainers: 11 + - Artur Rojek <contact@artur-rojek.eu> 12 + 13 + description: > 14 + Industrial I/O subsystem bindings for ADC controller found in 15 + Ingenic JZ47xx SoCs. 16 + 17 + ADC clients must use the format described in iio-bindings.txt, giving 18 + a phandle and IIO specifier pair ("io-channels") to the ADC controller. 19 + 20 + properties: 21 + compatible: 22 + enum: 23 + - ingenic,jz4725b-adc 24 + - ingenic,jz4740-adc 25 + - ingenic,jz4770-adc 26 + 27 + '#io-channel-cells': 28 + const: 1 29 + description: 30 + Must be set to <1> to indicate channels are selected by index. 31 + 32 + reg: 33 + maxItems: 1 34 + 35 + clocks: 36 + maxItems: 1 37 + 38 + clock-names: 39 + items: 40 + - const: adc 41 + 42 + interrupts: 43 + maxItems: 1 44 + 45 + required: 46 + - compatible 47 + - '#io-channel-cells' 48 + - reg 49 + - clocks 50 + - clock-names 51 + - interrupts 52 + 53 + additionalProperties: false 54 + 55 + examples: 56 + - | 57 + #include <dt-bindings/clock/jz4740-cgu.h> 58 + #include <dt-bindings/iio/adc/ingenic,adc.h> 59 + 60 + adc@10070000 { 61 + compatible = "ingenic,jz4740-adc"; 62 + #io-channel-cells = <1>; 63 + 64 + reg = <0x10070000 0x30>; 65 + 66 + clocks = <&cgu JZ4740_CLK_ADC>; 67 + clock-names = "adc"; 68 + 69 + interrupt-parent = <&intc>; 70 + interrupts = <18>; 71 + };
-173
Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt
··· 1 - Qualcomm's SPMI PMIC ADC 2 - 3 - - SPMI PMIC voltage ADC (VADC) provides interface to clients to read 4 - voltage. The VADC is a 15-bit sigma-delta ADC. 5 - - SPMI PMIC5 voltage ADC (ADC) provides interface to clients to read 6 - voltage. The VADC is a 16-bit sigma-delta ADC. 7 - 8 - VADC node: 9 - 10 - - compatible: 11 - Usage: required 12 - Value type: <string> 13 - Definition: Should contain "qcom,spmi-vadc". 14 - Should contain "qcom,spmi-adc5" for PMIC5 ADC driver. 15 - Should contain "qcom,spmi-adc-rev2" for PMIC rev2 ADC driver. 16 - Should contain "qcom,pms405-adc" for PMS405 PMIC 17 - 18 - - reg: 19 - Usage: required 20 - Value type: <prop-encoded-array> 21 - Definition: VADC base address in the SPMI PMIC register map. 22 - 23 - - #address-cells: 24 - Usage: required 25 - Value type: <u32> 26 - Definition: Must be one. Child node 'reg' property should define ADC 27 - channel number. 28 - 29 - - #size-cells: 30 - Usage: required 31 - Value type: <u32> 32 - Definition: Must be zero. 33 - 34 - - #io-channel-cells: 35 - Usage: required 36 - Value type: <u32> 37 - Definition: Must be one. For details about IIO bindings see: 38 - Documentation/devicetree/bindings/iio/iio-bindings.txt 39 - 40 - - interrupts: 41 - Usage: optional 42 - Value type: <prop-encoded-array> 43 - Definition: End of conversion interrupt. 44 - 45 - Channel node properties: 46 - 47 - - reg: 48 - Usage: required 49 - Value type: <u32> 50 - Definition: ADC channel number. 51 - See include/dt-bindings/iio/qcom,spmi-vadc.h 52 - 53 - - label: 54 - Usage: required for "qcom,spmi-adc5" and "qcom,spmi-adc-rev2" 55 - Value type: <empty> 56 - Definition: ADC input of the platform as seen in the schematics. 57 - For thermistor inputs connected to generic AMUX or GPIO inputs 58 - these can vary across platform for the same pins. Hence select 59 - the platform schematics name for this channel. 60 - 61 - - qcom,decimation: 62 - Usage: optional 63 - Value type: <u32> 64 - Definition: This parameter is used to decrease ADC sampling rate. 65 - Quicker measurements can be made by reducing decimation ratio. 66 - - For compatible property "qcom,spmi-vadc", valid values are 67 - 512, 1024, 2048, 4096. If property is not found, default value 68 - of 512 will be used. 69 - - For compatible property "qcom,spmi-adc5", valid values are 250, 420 70 - and 840. If property is not found, default value of 840 is used. 71 - - For compatible property "qcom,spmi-adc-rev2", valid values are 256, 72 - 512 and 1024. If property is not present, default value is 1024. 73 - 74 - - qcom,pre-scaling: 75 - Usage: optional 76 - Value type: <u32 array> 77 - Definition: Used for scaling the channel input signal before the signal is 78 - fed to VADC. The configuration for this node is to know the 79 - pre-determined ratio and use it for post scaling. Select one from 80 - the following options. 81 - <1 1>, <1 3>, <1 4>, <1 6>, <1 20>, <1 8>, <10 81>, <1 10> 82 - If property is not found default value depending on chip will be used. 83 - 84 - - qcom,ratiometric: 85 - Usage: optional 86 - Value type: <empty> 87 - Definition: Channel calibration type. 88 - - For compatible property "qcom,spmi-vadc", if this property is 89 - specified VADC will use the VDD reference (1.8V) and GND for 90 - channel calibration. If property is not found, channel will be 91 - calibrated with 0.625V and 1.25V reference channels, also 92 - known as absolute calibration. 93 - - For compatible property "qcom,spmi-adc5" and "qcom,spmi-adc-rev2", 94 - if this property is specified VADC will use the VDD reference 95 - (1.875V) and GND for channel calibration. If property is not found, 96 - channel will be calibrated with 0V and 1.25V reference channels, 97 - also known as absolute calibration. 98 - 99 - - qcom,hw-settle-time: 100 - Usage: optional 101 - Value type: <u32> 102 - Definition: Time between AMUX getting configured and the ADC starting 103 - conversion. The 'hw_settle_time' is an index used from valid values 104 - and programmed in hardware to achieve the hardware settling delay. 105 - - For compatible property "qcom,spmi-vadc" and "qcom,spmi-adc-rev2", 106 - Delay = 100us * (hw_settle_time) for hw_settle_time < 11, 107 - and 2ms * (hw_settle_time - 10) otherwise. 108 - Valid values are: 0, 100, 200, 300, 400, 500, 600, 700, 800, 109 - 900 us and 1, 2, 4, 6, 8, 10 ms. 110 - If property is not found, channel will use 0us. 111 - - For compatible property "qcom,spmi-adc5", delay = 15us for 112 - value 0, 100us * (value) for values < 11, 113 - and 2ms * (value - 10) otherwise. 114 - Valid values are: 15, 100, 200, 300, 400, 500, 600, 700, 800, 115 - 900 us and 1, 2, 4, 6, 8, 10 ms 116 - Certain controller digital versions have valid values of 117 - 15, 100, 200, 300, 400, 500, 600, 700, 1, 2, 4, 8, 16, 32, 64, 128 ms 118 - If property is not found, channel will use 15us. 119 - 120 - - qcom,avg-samples: 121 - Usage: optional 122 - Value type: <u32> 123 - Definition: Number of samples to be used for measurement. 124 - Averaging provides the option to obtain a single measurement 125 - from the ADC that is an average of multiple samples. The value 126 - selected is 2^(value). 127 - - For compatible property "qcom,spmi-vadc", valid values 128 - are: 1, 2, 4, 8, 16, 32, 64, 128, 256, 512 129 - If property is not found, 1 sample will be used. 130 - - For compatible property "qcom,spmi-adc5" and "qcom,spmi-adc-rev2", 131 - valid values are: 1, 2, 4, 8, 16 132 - If property is not found, 1 sample will be used. 133 - 134 - NOTE: 135 - 136 - For compatible property "qcom,spmi-vadc" following channels, also known as 137 - reference point channels, are used for result calibration and their channel 138 - configuration nodes should be defined: 139 - VADC_REF_625MV and/or VADC_SPARE1(based on PMIC version) VADC_REF_1250MV, 140 - VADC_GND_REF and VADC_VDD_VADC. 141 - 142 - Example: 143 - 144 - #include <dt-bindings/iio/qcom,spmi-vadc.h> 145 - #include <linux/irq.h> 146 - /* ... */ 147 - 148 - /* VADC node */ 149 - pmic_vadc: vadc@3100 { 150 - compatible = "qcom,spmi-vadc"; 151 - reg = <0x3100>; 152 - interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; 153 - #address-cells = <1>; 154 - #size-cells = <0>; 155 - #io-channel-cells = <1>; 156 - io-channel-ranges; 157 - 158 - /* Channel node */ 159 - adc-chan@VADC_LR_MUX10_USB_ID { 160 - reg = <VADC_LR_MUX10_USB_ID>; 161 - qcom,decimation = <512>; 162 - qcom,ratiometric; 163 - qcom,hw-settle-time = <200>; 164 - qcom,avg-samples = <1>; 165 - qcom,pre-scaling = <1 3>; 166 - }; 167 - }; 168 - 169 - /* IIO client node */ 170 - usb { 171 - io-channels = <&pmic_vadc VADC_LR_MUX10_USB_ID>; 172 - io-channel-names = "vadc"; 173 - };
+278
Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0-only 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/iio/adc/qcom,spmi-vadc.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Qualcomm's SPMI PMIC ADC 8 + 9 + maintainers: 10 + - Andy Gross <agross@kernel.org> 11 + - Bjorn Andersson <bjorn.andersson@linaro.org> 12 + 13 + description: | 14 + SPMI PMIC voltage ADC (VADC) provides interface to clients to read 15 + voltage. The VADC is a 15-bit sigma-delta ADC. 16 + SPMI PMIC5/PMIC7 voltage ADC (ADC) provides interface to clients to read 17 + voltage. The VADC is a 16-bit sigma-delta ADC. 18 + 19 + properties: 20 + compatible: 21 + oneOf: 22 + - items: 23 + - const: qcom,pms405-adc 24 + - const: qcom,spmi-adc-rev2 25 + 26 + - items: 27 + - enum: 28 + - qcom,spmi-vadc 29 + - qcom,spmi-adc5 30 + - qcom,spmi-adc-rev2 31 + - qcom,spmi-adc7 32 + 33 + reg: 34 + description: VADC base address in the SPMI PMIC register map 35 + maxItems: 1 36 + 37 + '#address-cells': 38 + const: 1 39 + 40 + '#size-cells': 41 + const: 0 42 + 43 + '#io-channel-cells': 44 + const: 1 45 + 46 + interrupts: 47 + maxItems: 1 48 + description: 49 + End of conversion interrupt. 50 + 51 + required: 52 + - compatible 53 + - reg 54 + - '#address-cells' 55 + - '#size-cells' 56 + - '#io-channel-cells' 57 + 58 + patternProperties: 59 + "^.*@[0-9a-f]+$": 60 + type: object 61 + description: | 62 + Represents the external channels which are connected to the ADC. 63 + For compatible property "qcom,spmi-vadc" following channels, also known as 64 + reference point channels, are used for result calibration and their channel 65 + configuration nodes should be defined: 66 + VADC_REF_625MV and/or VADC_SPARE1(based on PMIC version) VADC_REF_1250MV, 67 + VADC_GND_REF and VADC_VDD_VADC. 68 + 69 + properties: 70 + reg: 71 + description: | 72 + ADC channel number. 73 + See include/dt-bindings/iio/qcom,spmi-vadc.h 74 + For PMIC7 ADC, the channel numbers are specified separately per PMIC 75 + in the PMIC-specific files in include/dt-bindings/iio/. 76 + 77 + label: 78 + $ref: /schemas/types.yaml#/definitions/string 79 + description: | 80 + ADC input of the platform as seen in the schematics. 81 + For thermistor inputs connected to generic AMUX or GPIO inputs 82 + these can vary across platform for the same pins. Hence select 83 + the platform schematics name for this channel. 84 + 85 + qcom,decimation: 86 + $ref: /schemas/types.yaml#/definitions/uint32 87 + description: | 88 + This parameter is used to decrease ADC sampling rate. 89 + Quicker measurements can be made by reducing decimation ratio. 90 + 91 + qcom,pre-scaling: 92 + description: | 93 + Used for scaling the channel input signal before the signal is 94 + fed to VADC. The configuration for this node is to know the 95 + pre-determined ratio and use it for post scaling. It is a pair of 96 + integers, denoting the numerator and denominator of the fraction by which 97 + input signal is multiplied. For example, <1 3> indicates the signal is scaled 98 + down to 1/3 of its value before ADC measurement. 99 + If property is not found default value depending on chip will be used. 100 + allOf: 101 + - $ref: /schemas/types.yaml#/definitions/uint32-array 102 + oneOf: 103 + - items: 104 + - const: 1 105 + - enum: [ 1, 3, 4, 6, 20, 8, 10 ] 106 + 107 + - items: 108 + - const: 10 109 + - const: 81 110 + 111 + qcom,ratiometric: 112 + description: | 113 + Channel calibration type. 114 + - For compatible property "qcom,spmi-vadc", if this property is 115 + specified VADC will use the VDD reference (1.8V) and GND for 116 + channel calibration. If property is not found, channel will be 117 + calibrated with 0.625V and 1.25V reference channels, also 118 + known as absolute calibration. 119 + - For compatible property "qcom,spmi-adc5", "qcom,spmi-adc7" and 120 + "qcom,spmi-adc-rev2", if this property is specified VADC will use 121 + the VDD reference (1.875V) and GND for channel calibration. If 122 + property is not found, channel will be calibrated with 0V and 1.25V 123 + reference channels, also known as absolute calibration. 124 + type: boolean 125 + 126 + qcom,hw-settle-time: 127 + $ref: /schemas/types.yaml#/definitions/uint32 128 + description: | 129 + Time between AMUX getting configured and the ADC starting 130 + conversion. The 'hw_settle_time' is an index used from valid values 131 + and programmed in hardware to achieve the hardware settling delay. 132 + 133 + qcom,avg-samples: 134 + $ref: /schemas/types.yaml#/definitions/uint32 135 + description: | 136 + Number of samples to be used for measurement. 137 + Averaging provides the option to obtain a single measurement 138 + from the ADC that is an average of multiple samples. The value 139 + selected is 2^(value). 140 + 141 + required: 142 + - reg 143 + 144 + allOf: 145 + - if: 146 + properties: 147 + compatible: 148 + contains: 149 + const: qcom,spmi-vadc 150 + 151 + then: 152 + patternProperties: 153 + "^.*@[0-9a-f]+$": 154 + properties: 155 + qcom,decimation: 156 + enum: [ 512, 1024, 2048, 4096 ] 157 + default: 512 158 + 159 + qcom,hw-settle-time: 160 + enum: [ 0, 100, 200, 300, 400, 500, 600, 700, 800, 900, 1, 2, 161 + 4, 6, 8, 10 ] 162 + default: 0 163 + 164 + qcom,avg-samples: 165 + enum: [ 1, 2, 4, 8, 16, 32, 64, 128, 256, 512 ] 166 + default: 1 167 + 168 + - if: 169 + properties: 170 + compatible: 171 + contains: 172 + const: qcom,spmi-adc-rev2 173 + 174 + then: 175 + patternProperties: 176 + "^.*@[0-9a-f]+$": 177 + properties: 178 + qcom,decimation: 179 + enum: [ 256, 512, 1024 ] 180 + default: 1024 181 + 182 + qcom,hw-settle-time: 183 + enum: [ 0, 100, 200, 300, 400, 500, 600, 700, 800, 900, 1, 2, 184 + 4, 6, 8, 10 ] 185 + default: 0 186 + 187 + qcom,avg-samples: 188 + enum: [ 1, 2, 4, 8, 16 ] 189 + default: 1 190 + 191 + - if: 192 + properties: 193 + compatible: 194 + contains: 195 + const: qcom,spmi-adc5 196 + 197 + then: 198 + patternProperties: 199 + "^.*@[0-9a-f]+$": 200 + properties: 201 + qcom,decimation: 202 + enum: [ 250, 420, 840 ] 203 + default: 840 204 + 205 + qcom,hw-settle-time: 206 + enum: [ 15, 100, 200, 300, 400, 500, 600, 700, 800, 900, 1, 2, 207 + 4, 6, 8, 10, 16, 32, 64, 128 ] 208 + default: 15 209 + 210 + qcom,avg-samples: 211 + enum: [ 1, 2, 4, 8, 16 ] 212 + default: 1 213 + 214 + - if: 215 + properties: 216 + compatible: 217 + contains: 218 + const: qcom,spmi-adc7 219 + 220 + then: 221 + patternProperties: 222 + "^.*@[0-9a-f]+$": 223 + properties: 224 + qcom,decimation: 225 + enum: [ 85, 340, 1360 ] 226 + default: 1360 227 + 228 + qcom,hw-settle-time: 229 + enum: [ 15, 100, 200, 300, 400, 500, 600, 700, 1000, 2000, 4000, 230 + 8000, 16000, 32000, 64000, 128000 ] 231 + default: 15 232 + 233 + qcom,avg-samples: 234 + enum: [ 1, 2, 4, 8, 16 ] 235 + default: 1 236 + 237 + examples: 238 + - | 239 + spmi_bus { 240 + #address-cells = <1>; 241 + #size-cells = <0>; 242 + /* VADC node */ 243 + pmic_vadc: adc@3100 { 244 + compatible = "qcom,spmi-vadc"; 245 + reg = <0x3100>; 246 + interrupts = <0x0 0x31 0x0 0x1>; 247 + #address-cells = <1>; 248 + #size-cells = <0>; 249 + #io-channel-cells = <1>; 250 + io-channel-ranges; 251 + 252 + /* Channel node */ 253 + adc-chan@39 { 254 + reg = <0x39>; 255 + qcom,decimation = <512>; 256 + qcom,ratiometric; 257 + qcom,hw-settle-time = <200>; 258 + qcom,avg-samples = <1>; 259 + qcom,pre-scaling = <1 3>; 260 + }; 261 + 262 + adc-chan@9 { 263 + reg = <0x9>; 264 + }; 265 + 266 + adc-chan@a { 267 + reg = <0xa>; 268 + }; 269 + 270 + adc-chan@e { 271 + reg = <0xe>; 272 + }; 273 + 274 + adc-chan@f { 275 + reg = <0xf>; 276 + }; 277 + }; 278 + };
+68
Documentation/devicetree/bindings/iio/chemical/sensirion,scd30.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/iio/chemical/sensirion,scd30.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Sensirion SCD30 carbon dioxide sensor 8 + 9 + maintainers: 10 + - Tomasz Duszynski <tomasz.duszynski@octakon.com> 11 + 12 + description: | 13 + Air quality sensor capable of measuring co2 concentration, temperature 14 + and relative humidity. 15 + 16 + properties: 17 + compatible: 18 + enum: 19 + - sensirion,scd30 20 + 21 + reg: 22 + maxItems: 1 23 + 24 + interrupts: 25 + maxItems: 1 26 + 27 + vdd-supply: true 28 + 29 + sensirion,sel-gpios: 30 + description: GPIO connected to the SEL line 31 + maxItems: 1 32 + 33 + sensirion,pwm-gpios: 34 + description: GPIO connected to the PWM line 35 + maxItems: 1 36 + 37 + required: 38 + - compatible 39 + 40 + additionalProperties: false 41 + 42 + examples: 43 + - | 44 + # include <dt-bindings/interrupt-controller/irq.h> 45 + i2c { 46 + #address-cells = <1>; 47 + #size-cells = <0>; 48 + 49 + co2-sensor@61 { 50 + compatible = "sensirion,scd30"; 51 + reg = <0x61>; 52 + vdd-supply = <&vdd>; 53 + interrupt-parent = <&gpio0>; 54 + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; 55 + }; 56 + }; 57 + - | 58 + # include <dt-bindings/interrupt-controller/irq.h> 59 + serial { 60 + co2-sensor { 61 + compatible = "sensirion,scd30"; 62 + vdd-supply = <&vdd>; 63 + interrupt-parent = <&gpio0>; 64 + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; 65 + }; 66 + }; 67 + 68 + ...
+1 -1
Documentation/devicetree/bindings/iio/dac/ti,dac7612.txt
··· 6 6 7 7 The internal DACs are loaded when the LOADDACS pin is pulled down. 8 8 9 - http://www.ti.com/lit/ds/sbas106/sbas106.pdf 9 + https://www.ti.com/lit/ds/sbas106/sbas106.pdf 10 10 11 11 Required Properties: 12 12 - compatible: Should be one of:
+1 -1
Documentation/devicetree/bindings/iio/iio-bindings.txt
··· 9 9 output on a device. The length of an IIO specifier is defined by the 10 10 value of a #io-channel-cells property in the IIO provider node. 11 11 12 - [1] http://marc.info/?l=linux-iio&m=135902119507483&w=2 12 + [1] https://marc.info/?l=linux-iio&m=135902119507483&w=2 13 13 14 14 ==IIO providers== 15 15
+14
Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml
··· 37 37 set if the specified interrupt pin should be configured as 38 38 open drain. If not set, defaults to push-pull. 39 39 40 + vdd-supply: 41 + description: provide VDD power to the sensor. 42 + 43 + vddio-supply: 44 + description: provide VDD IO power to the sensor. 45 + 46 + mount-matrix: 47 + description: an optional 3x3 mounting rotation matrix 48 + 40 49 required: 41 50 - compatible 42 51 - reg ··· 61 52 bmi160@68 { 62 53 compatible = "bosch,bmi160"; 63 54 reg = <0x68>; 55 + vdd-supply = <&pm8916_l17>; 56 + vddio-supply = <&pm8916_l6>; 64 57 interrupt-parent = <&gpio4>; 65 58 interrupts = <12 IRQ_TYPE_EDGE_RISING>; 66 59 interrupt-names = "INT1"; 60 + mount-matrix = "0", "1", "0", 61 + "-1", "0", "0", 62 + "0", "0", "1"; 67 63 }; 68 64 }; 69 65 - |
+90
Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/iio/imu/invensense,icm42600.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: InvenSense ICM-426xx Inertial Measurement Unit 8 + 9 + maintainers: 10 + - Jean-Baptiste Maneyrol <jmaneyrol@invensense.com> 11 + 12 + description: | 13 + 6-axis MotionTracking device that combines a 3-axis gyroscope and a 3-axis 14 + accelerometer. 15 + 16 + It has a configurable host interface that supports I3C, I2C and SPI serial 17 + communication, features a 2kB FIFO and 2 programmable interrupts with 18 + ultra-low-power wake-on-motion support to minimize system power consumption. 19 + 20 + Other industry-leading features include InvenSense on-chip APEX Motion 21 + Processing engine for gesture recognition, activity classification, and 22 + pedometer, along with programmable digital filters, and an embedded 23 + temperature sensor. 24 + 25 + https://invensense.tdk.com/wp-content/uploads/2020/03/DS-000292-ICM-42605-v1.4.pdf 26 + 27 + properties: 28 + compatible: 29 + enum: 30 + - invensense,icm42600 31 + - invensense,icm42602 32 + - invensense,icm42605 33 + - invensense,icm42622 34 + 35 + reg: 36 + maxItems: 1 37 + 38 + interrupts: 39 + maxItems: 1 40 + 41 + drive-open-drain: 42 + type: boolean 43 + 44 + vdd-supply: 45 + description: Regulator that provides power to the sensor 46 + 47 + vddio-supply: 48 + description: Regulator that provides power to the bus 49 + 50 + required: 51 + - compatible 52 + - reg 53 + - interrupts 54 + 55 + examples: 56 + - | 57 + #include <dt-bindings/gpio/gpio.h> 58 + #include <dt-bindings/interrupt-controller/irq.h> 59 + i2c0 { 60 + #address-cells = <1>; 61 + #size-cells = <0>; 62 + 63 + icm42605@68 { 64 + compatible = "invensense,icm42605"; 65 + reg = <0x68>; 66 + interrupt-parent = <&gpio2>; 67 + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; 68 + vdd-supply = <&vdd>; 69 + vddio-supply = <&vddio>; 70 + }; 71 + }; 72 + - | 73 + #include <dt-bindings/gpio/gpio.h> 74 + #include <dt-bindings/interrupt-controller/irq.h> 75 + spi0 { 76 + #address-cells = <1>; 77 + #size-cells = <0>; 78 + 79 + icm42602@0 { 80 + compatible = "invensense,icm42602"; 81 + reg = <0>; 82 + spi-max-frequency = <24000000>; 83 + spi-cpha; 84 + spi-cpol; 85 + interrupt-parent = <&gpio1>; 86 + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; 87 + vdd-supply = <&vdd>; 88 + vddio-supply = <&vddio>; 89 + }; 90 + };
+1 -1
Documentation/devicetree/bindings/iio/light/apds9300.txt
··· 1 1 * Avago APDS9300 ambient light sensor 2 2 3 - http://www.avagotech.com/docs/AV02-1077EN 3 + https://www.avagotech.com/docs/AV02-1077EN 4 4 5 5 Required properties: 6 6
+1 -1
Documentation/devicetree/bindings/iio/light/apds9960.txt
··· 1 1 * Avago APDS9960 gesture/RGB/ALS/proximity sensor 2 2 3 - http://www.avagotech.com/docs/AV02-4191EN 3 + https://www.avagotech.com/docs/AV02-4191EN 4 4 5 5 Required properties: 6 6
+1 -1
Documentation/devicetree/bindings/iio/light/opt3001.txt
··· 6 6 requires the use of interrupts. Without interrupts, only the simple reading 7 7 of the current light value is supported through the IIO API. 8 8 9 - http://www.ti.com/product/opt3001 9 + https://www.ti.com/product/opt3001 10 10 11 11 Required properties: 12 12 - compatible: should be "ti,opt3001"
+1 -1
Documentation/devicetree/bindings/iio/light/vl6180.txt
··· 1 1 STMicro VL6180 - ALS, range and proximity sensor 2 2 3 - Link to datasheet: http://www.st.com/resource/en/datasheet/vl6180x.pdf 3 + Link to datasheet: https://www.st.com/resource/en/datasheet/vl6180x.pdf 4 4 5 5 Required properties: 6 6
-30
Documentation/devicetree/bindings/iio/magnetometer/ak8975.txt
··· 1 - * AsahiKASEI AK8975 magnetometer sensor 2 - 3 - Required properties: 4 - 5 - - compatible : should be "asahi-kasei,ak8975" 6 - - reg : the I2C address of the magnetometer 7 - 8 - Optional properties: 9 - 10 - - gpios : should be device tree identifier of the magnetometer DRDY pin 11 - - vdd-supply: an optional regulator that needs to be on to provide VDD 12 - - mount-matrix: an optional 3x3 mounting rotation matrix 13 - 14 - Example: 15 - 16 - ak8975@c { 17 - compatible = "asahi-kasei,ak8975"; 18 - reg = <0x0c>; 19 - gpios = <&gpj0 7 0>; 20 - vdd-supply = <&ldo_3v3_gnss>; 21 - mount-matrix = "-0.984807753012208", /* x0 */ 22 - "0", /* y0 */ 23 - "-0.173648177666930", /* z0 */ 24 - "0", /* x1 */ 25 - "-1", /* y1 */ 26 - "0", /* z1 */ 27 - "-0.173648177666930", /* x2 */ 28 - "0", /* y2 */ 29 - "0.984807753012208"; /* z2 */ 30 - };
+83
Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/iio/magnetometer/asahi-kasei,ak8975.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: AsahiKASEI AK8975 magnetometer sensor 8 + 9 + maintainers: 10 + - Jonathan Albrieux <jonathan.albrieux@gmail.com> 11 + 12 + properties: 13 + compatible: 14 + oneOf: 15 + - enum: 16 + - asahi-kasei,ak8975 17 + - asahi-kasei,ak8963 18 + - asahi-kasei,ak09911 19 + - asahi-kasei,ak09912 20 + - enum: 21 + - ak8975 22 + - ak8963 23 + - ak09911 24 + - ak09912 25 + deprecated: true 26 + 27 + reg: 28 + maxItems: 1 29 + 30 + gpios: 31 + maxItems: 1 32 + description: | 33 + AK8975 has a "Data ready" pin (DRDY) which informs that data 34 + is ready to be read and is possible to listen on it. If used, 35 + this should be active high. Prefer interrupt over this. 36 + 37 + interrupts: 38 + maxItems: 1 39 + description: interrupt for DRDY pin. Triggered on rising edge. 40 + 41 + vdd-supply: 42 + description: | 43 + an optional regulator that needs to be on to provide VDD power to 44 + the sensor. 45 + 46 + mount-matrix: 47 + description: an optional 3x3 mounting rotation matrix. 48 + 49 + reset-gpios: 50 + description: | 51 + an optional pin needed for AK09911 to set the reset state. This should 52 + be usually active low 53 + 54 + required: 55 + - compatible 56 + - reg 57 + 58 + examples: 59 + - | 60 + #include <dt-bindings/interrupt-controller/irq.h> 61 + #include <dt-bindings/gpio/gpio.h> 62 + i2c { 63 + #address-cells = <1>; 64 + #size-cells = <0>; 65 + 66 + magnetometer@c { 67 + compatible = "asahi-kasei,ak8975"; 68 + reg = <0x0c>; 69 + interrupt-parent = <&gpio6>; 70 + interrupts = <15 IRQ_TYPE_EDGE_RISING>; 71 + vdd-supply = <&ldo_3v3_gnss>; 72 + reset-gpios = <&msmgpio 111 GPIO_ACTIVE_LOW>; 73 + mount-matrix = "-0.984807753012208", /* x0 */ 74 + "0", /* y0 */ 75 + "-0.173648177666930", /* z0 */ 76 + "0", /* x1 */ 77 + "-1", /* y1 */ 78 + "0", /* z1 */ 79 + "-0.173648177666930", /* x2 */ 80 + "0", /* y2 */ 81 + "0.984807753012208"; /* z2 */ 82 + }; 83 + };
+5 -1
Documentation/devicetree/bindings/iio/magnetometer/bmc150_magn.txt
··· 4 4 5 5 Required properties: 6 6 7 - - compatible : should be "bosch,bmc150_magn" 7 + - compatible : should be one of: 8 + "bosch,bmc150_magn" 9 + "bosch,bmc156_magn" 10 + "bosch,bmm150" 11 + "bosch,bmm150_magn" (DEPRECATED, use bosch,bmm150) 8 12 - reg : the I2C address of the magnetometer 9 13 10 14 Optional properties:
+1 -1
Documentation/devicetree/bindings/iio/potentiometer/mcp41010.txt
··· 1 1 * Microchip MCP41010/41050/41100/42010/42050/42100 Digital Potentiometer 2 2 3 3 Datasheet publicly available at: 4 - http://ww1.microchip.com/downloads/en/devicedoc/11195c.pdf 4 + https://ww1.microchip.com/downloads/en/devicedoc/11195c.pdf 5 5 6 6 The node for this driver must be a child node of a SPI controller, hence 7 7 all mandatory properties described in
+2 -2
Documentation/devicetree/bindings/iio/potentiostat/lmp91000.txt
··· 1 1 * Texas Instruments LMP91000 series of potentiostats 2 2 3 - LMP91000: http://www.ti.com/lit/ds/symlink/lmp91000.pdf 4 - LMP91002: http://www.ti.com/lit/ds/symlink/lmp91002.pdf 3 + LMP91000: https://www.ti.com/lit/ds/symlink/lmp91000.pdf 4 + LMP91002: https://www.ti.com/lit/ds/symlink/lmp91002.pdf 5 5 6 6 Required properties: 7 7
+1 -1
Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml
··· 13 13 Bindings for the All Sensors DLH series pressure sensors. 14 14 15 15 Specifications about the sensors can be found at: 16 - http://www.allsensors.com/cad/DS-0355_Rev_B.PDF 16 + https://www.allsensors.com/cad/DS-0355_Rev_B.PDF 17 17 18 18 properties: 19 19 compatible:
+2 -2
Documentation/devicetree/bindings/iio/proximity/devantech-srf04.yaml
··· 17 17 until it is received once again 18 18 19 19 Specifications about the devices can be found at: 20 - http://www.robot-electronics.co.uk/htm/srf04tech.htm 20 + https://www.robot-electronics.co.uk/htm/srf04tech.htm 21 21 22 - http://www.maxbotix.com/documents/LV-MaxSonar-EZ_Datasheet.pdf 22 + https://www.maxbotix.com/documents/LV-MaxSonar-EZ_Datasheet.pdf 23 23 24 24 properties: 25 25 compatible:
+1 -1
Documentation/driver-api/generic-counter.rst
··· 262 262 Counter Counts may be allocated via counter_count structures, and 263 263 respective Counter Signal associations (Synapses) made via 264 264 counter_synapse structures. Associated counter_synapse structures are 265 - stored as an array and set to the the synapses array member of the 265 + stored as an array and set to the synapses array member of the 266 266 respective counter_count structure. These counter_count structures are 267 267 set to the counts array member of an allocated counter_device structure 268 268 before the Counter is registered to the system.
+1 -1
Documentation/driver-api/iio/buffers.rst
··· 88 88 The driver implementing the accelerometer described above will have the 89 89 following channel definition:: 90 90 91 - struct struct iio_chan_spec accel_channels[] = { 91 + struct iio_chan_spec accel_channels[] = { 92 92 { 93 93 .type = IIO_ACCEL, 94 94 .modified = 1,
+17 -1
MAINTAINERS
··· 8979 8979 F: include/linux/interconnect-provider.h 8980 8980 F: include/linux/interconnect.h 8981 8981 8982 + INVENSENSE ICM-426xx IMU DRIVER 8983 + M: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com> 8984 + L: linux-iio@vger.kernel.org 8985 + S: Maintained 8986 + W https://invensense.tdk.com/ 8987 + F: Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml 8988 + F: drivers/iio/imu/inv_icm42600/ 8989 + 8982 8990 INVENSENSE MPU-3050 GYROSCOPE DRIVER 8983 8991 M: Linus Walleij <linus.walleij@linaro.org> 8984 8992 L: linux-iio@vger.kernel.org ··· 11332 11324 F: drivers/pwm/pwm-atmel.c 11333 11325 11334 11326 MICROCHIP SAMA5D2-COMPATIBLE ADC DRIVER 11335 - M: Ludovic Desroches <ludovic.desroches@microchip.com> 11336 11327 M: Eugen Hristev <eugen.hristev@microchip.com> 11337 11328 L: linux-iio@vger.kernel.org 11338 11329 S: Supported ··· 15379 15372 S: Maintained 15380 15373 F: drivers/misc/phantom.c 15381 15374 F: include/uapi/linux/phantom.h 15375 + 15376 + SENSIRION SCD30 CARBON DIOXIDE SENSOR DRIVER 15377 + M: Tomasz Duszynski <tomasz.duszynski@octakon.com> 15378 + S: Maintained 15379 + F: Documentation/devicetree/bindings/iio/chemical/sensirion,scd30.yaml 15380 + F: drivers/iio/chemical/scd30.h 15381 + F: drivers/iio/chemical/scd30_core.c 15382 + F: drivers/iio/chemical/scd30_i2c.c 15383 + F: drivers/iio/chemical/scd30_serial.c 15382 15384 15383 15385 SENSIRION SPS30 AIR POLLUTION SENSOR DRIVER 15384 15386 M: Tomasz Duszynski <tduszyns@gmail.com>
-1
drivers/counter/104-quad-8.c
··· 1538 1538 indio_dev->num_channels = ARRAY_SIZE(quad8_channels); 1539 1539 indio_dev->channels = quad8_channels; 1540 1540 indio_dev->name = dev_name(dev); 1541 - indio_dev->dev.parent = dev; 1542 1541 1543 1542 /* Initialize Counter device and driver data */ 1544 1543 quad8iio = iio_priv(indio_dev);
-1
drivers/counter/stm32-lptimer-cnt.c
··· 648 648 649 649 /* Initialize IIO device */ 650 650 indio_dev->name = dev_name(&pdev->dev); 651 - indio_dev->dev.parent = &pdev->dev; 652 651 indio_dev->dev.of_node = pdev->dev.of_node; 653 652 indio_dev->info = &stm32_lptim_cnt_iio_info; 654 653 if (ddata->has_encoder)
+7 -1
drivers/iio/accel/Kconfig
··· 116 116 tristate "Bosch BMA400 3-Axis Accelerometer Driver" 117 117 select REGMAP 118 118 select BMA400_I2C if I2C 119 + select BMA400_SPI if SPI 119 120 help 120 121 Say Y here if you want to build a driver for the Bosch BMA400 121 122 triaxial acceleration sensor. 122 123 123 124 To compile this driver as a module, choose M here: the 124 125 module will be called bma400_core and you will also get 125 - bma400_i2c if I2C is enabled. 126 + bma400_i2c if I2C is enabled and bma400_spi if SPI is 127 + enabled. 126 128 127 129 config BMA400_I2C 130 + tristate 131 + depends on BMA400 132 + 133 + config BMA400_SPI 128 134 tristate 129 135 depends on BMA400 130 136
+1
drivers/iio/accel/Makefile
··· 16 16 obj-$(CONFIG_BMA220) += bma220_spi.o 17 17 obj-$(CONFIG_BMA400) += bma400_core.o 18 18 obj-$(CONFIG_BMA400_I2C) += bma400_i2c.o 19 + obj-$(CONFIG_BMA400_SPI) += bma400_spi.o 19 20 obj-$(CONFIG_BMC150_ACCEL) += bmc150-accel-core.o 20 21 obj-$(CONFIG_BMC150_ACCEL_I2C) += bmc150-accel-i2c.o 21 22 obj-$(CONFIG_BMC150_ACCEL_SPI) += bmc150-accel-spi.o
-1
drivers/iio/accel/adis16201.c
··· 271 271 spi_set_drvdata(spi, indio_dev); 272 272 273 273 indio_dev->name = spi->dev.driver->name; 274 - indio_dev->dev.parent = &spi->dev; 275 274 indio_dev->info = &adis16201_info; 276 275 277 276 indio_dev->channels = adis16201_channels;
-1
drivers/iio/accel/adis16209.c
··· 282 282 spi_set_drvdata(spi, indio_dev); 283 283 284 284 indio_dev->name = spi->dev.driver->name; 285 - indio_dev->dev.parent = &spi->dev; 286 285 indio_dev->info = &adis16209_info; 287 286 indio_dev->channels = adis16209_channels; 288 287 indio_dev->num_channels = ARRAY_SIZE(adis16209_channels);
+1 -2
drivers/iio/accel/adxl345_core.c
··· 4 4 * 5 5 * Copyright (c) 2017 Eva Rachel Retuya <eraretuya@gmail.com> 6 6 * 7 - * Datasheet: http://www.analog.com/media/en/technical-documentation/data-sheets/ADXL345.pdf 7 + * Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADXL345.pdf 8 8 */ 9 9 10 10 #include <linux/module.h> ··· 246 246 return ret; 247 247 } 248 248 249 - indio_dev->dev.parent = dev; 250 249 indio_dev->name = name; 251 250 indio_dev->info = &adxl345_info; 252 251 indio_dev->modes = INDIO_DIRECT_MODE;
+5 -16
drivers/iio/accel/adxl372.c
··· 795 795 unsigned int mask; 796 796 int i, ret; 797 797 798 - ret = iio_triggered_buffer_postenable(indio_dev); 799 - if (ret < 0) 800 - return ret; 801 - 802 798 ret = adxl372_set_interrupts(st, ADXL372_INT1_MAP_FIFO_FULL_MSK, 0); 803 799 if (ret < 0) 804 - goto err; 800 + return ret; 805 801 806 802 mask = *indio_dev->active_scan_mask; 807 803 ··· 806 810 break; 807 811 } 808 812 809 - if (i == ARRAY_SIZE(adxl372_axis_lookup_table)) { 810 - ret = -EINVAL; 811 - goto err; 812 - } 813 + if (i == ARRAY_SIZE(adxl372_axis_lookup_table)) 814 + return -EINVAL; 813 815 814 816 st->fifo_format = adxl372_axis_lookup_table[i].fifo_format; 815 817 st->fifo_set_size = bitmap_weight(indio_dev->active_scan_mask, ··· 827 833 if (ret < 0) { 828 834 st->fifo_mode = ADXL372_FIFO_BYPASSED; 829 835 adxl372_set_interrupts(st, 0, 0); 830 - goto err; 836 + return ret; 831 837 } 832 838 833 839 return 0; 834 - 835 - err: 836 - iio_triggered_buffer_predisable(indio_dev); 837 - return ret; 838 840 } 839 841 840 842 static int adxl372_buffer_predisable(struct iio_dev *indio_dev) ··· 841 851 st->fifo_mode = ADXL372_FIFO_BYPASSED; 842 852 adxl372_configure_fifo(st); 843 853 844 - return iio_triggered_buffer_predisable(indio_dev); 854 + return 0; 845 855 } 846 856 847 857 static const struct iio_buffer_setup_ops adxl372_buffer_ops = { ··· 928 938 indio_dev->channels = adxl372_channels; 929 939 indio_dev->num_channels = ARRAY_SIZE(adxl372_channels); 930 940 indio_dev->available_scan_masks = adxl372_channel_masks; 931 - indio_dev->dev.parent = dev; 932 941 indio_dev->name = name; 933 942 indio_dev->info = &adxl372_info; 934 943 indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE;
-1
drivers/iio/accel/bma180.c
··· 1038 1038 goto err_chip_disable; 1039 1039 1040 1040 mutex_init(&data->mutex); 1041 - indio_dev->dev.parent = dev; 1042 1041 indio_dev->channels = data->part_info->channels; 1043 1042 indio_dev->num_channels = data->part_info->num_channels; 1044 1043 indio_dev->name = id->name;
-1
drivers/iio/accel/bma220_spi.c
··· 237 237 spi_set_drvdata(spi, indio_dev); 238 238 mutex_init(&data->lock); 239 239 240 - indio_dev->dev.parent = &spi->dev; 241 240 indio_dev->info = &bma220_info; 242 241 indio_dev->name = BMA220_DEVICE_NAME; 243 242 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/accel/bma400_core.c
··· 816 816 return ret; 817 817 818 818 mutex_init(&data->mutex); 819 - indio_dev->dev.parent = dev; 820 819 indio_dev->name = name; 821 820 indio_dev->info = &bma400_info; 822 821 indio_dev->channels = bma400_channels;
+120
drivers/iio/accel/bma400_spi.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + /* 3 + * SPI IIO driver for Bosch BMA400 triaxial acceleration sensor. 4 + * 5 + * Copyright 2020 Dan Robertson <dan@dlrobertson.com> 6 + * 7 + */ 8 + #include <linux/bits.h> 9 + #include <linux/init.h> 10 + #include <linux/mod_devicetable.h> 11 + #include <linux/module.h> 12 + #include <linux/regmap.h> 13 + #include <linux/spi/spi.h> 14 + 15 + #include "bma400.h" 16 + 17 + #define BMA400_MAX_SPI_READ 2 18 + #define BMA400_SPI_READ_BUFFER_SIZE (BMA400_MAX_SPI_READ + 1) 19 + 20 + static int bma400_regmap_spi_read(void *context, 21 + const void *reg, size_t reg_size, 22 + void *val, size_t val_size) 23 + { 24 + struct device *dev = context; 25 + struct spi_device *spi = to_spi_device(dev); 26 + u8 result[BMA400_SPI_READ_BUFFER_SIZE]; 27 + ssize_t status; 28 + 29 + if (val_size > BMA400_MAX_SPI_READ) 30 + return -EINVAL; 31 + 32 + status = spi_write_then_read(spi, reg, 1, result, val_size + 1); 33 + if (status) 34 + return status; 35 + 36 + /* 37 + * From the BMA400 datasheet: 38 + * 39 + * > For a basic read operation two bytes have to be read and the first 40 + * > has to be dropped and the second byte must be interpreted. 41 + */ 42 + memcpy(val, result + 1, val_size); 43 + 44 + return 0; 45 + } 46 + 47 + static int bma400_regmap_spi_write(void *context, const void *data, 48 + size_t count) 49 + { 50 + struct device *dev = context; 51 + struct spi_device *spi = to_spi_device(dev); 52 + 53 + return spi_write(spi, data, count); 54 + } 55 + 56 + static struct regmap_bus bma400_regmap_bus = { 57 + .read = bma400_regmap_spi_read, 58 + .write = bma400_regmap_spi_write, 59 + .read_flag_mask = BIT(7), 60 + .max_raw_read = BMA400_MAX_SPI_READ, 61 + }; 62 + 63 + static int bma400_spi_probe(struct spi_device *spi) 64 + { 65 + const struct spi_device_id *id = spi_get_device_id(spi); 66 + struct regmap *regmap; 67 + unsigned int val; 68 + int ret; 69 + 70 + regmap = devm_regmap_init(&spi->dev, &bma400_regmap_bus, 71 + &spi->dev, &bma400_regmap_config); 72 + if (IS_ERR(regmap)) { 73 + dev_err(&spi->dev, "failed to create regmap\n"); 74 + return PTR_ERR(regmap); 75 + } 76 + 77 + /* 78 + * Per the bma400 datasheet, the first SPI read may 79 + * return garbage. As the datasheet recommends, the 80 + * chip ID register will be read here and checked 81 + * again in the following probe. 82 + */ 83 + ret = regmap_read(regmap, BMA400_CHIP_ID_REG, &val); 84 + if (ret) 85 + dev_err(&spi->dev, "Failed to read chip id register\n"); 86 + 87 + return bma400_probe(&spi->dev, regmap, id->name); 88 + } 89 + 90 + static int bma400_spi_remove(struct spi_device *spi) 91 + { 92 + return bma400_remove(&spi->dev); 93 + } 94 + 95 + static const struct spi_device_id bma400_spi_ids[] = { 96 + { "bma400", 0 }, 97 + { } 98 + }; 99 + MODULE_DEVICE_TABLE(spi, bma400_spi_ids); 100 + 101 + static const struct of_device_id bma400_of_spi_match[] = { 102 + { .compatible = "bosch,bma400" }, 103 + { } 104 + }; 105 + MODULE_DEVICE_TABLE(of, bma400_of_spi_match); 106 + 107 + static struct spi_driver bma400_spi_driver = { 108 + .driver = { 109 + .name = "bma400", 110 + .of_match_table = bma400_of_spi_match, 111 + }, 112 + .probe = bma400_spi_probe, 113 + .remove = bma400_spi_remove, 114 + .id_table = bma400_spi_ids, 115 + }; 116 + 117 + module_spi_driver(bma400_spi_driver); 118 + MODULE_AUTHOR("Dan Robertson <dan@dlrobertson.com>"); 119 + MODULE_DESCRIPTION("Bosch BMA400 triaxial acceleration sensor (SPI)"); 120 + MODULE_LICENSE("GPL");
+2 -3
drivers/iio/accel/bmc150-accel-core.c
··· 1411 1411 int ret = 0; 1412 1412 1413 1413 if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) 1414 - return iio_triggered_buffer_postenable(indio_dev); 1414 + return 0; 1415 1415 1416 1416 mutex_lock(&data->mutex); 1417 1417 ··· 1443 1443 struct bmc150_accel_data *data = iio_priv(indio_dev); 1444 1444 1445 1445 if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) 1446 - return iio_triggered_buffer_predisable(indio_dev); 1446 + return 0; 1447 1447 1448 1448 mutex_lock(&data->mutex); 1449 1449 ··· 1574 1574 1575 1575 mutex_init(&data->mutex); 1576 1576 1577 - indio_dev->dev.parent = dev; 1578 1577 indio_dev->channels = data->chip_info->channels; 1579 1578 indio_dev->num_channels = data->chip_info->num_channels; 1580 1579 indio_dev->name = name ? name : data->chip_info->name;
+45 -1
drivers/iio/accel/cros_ec_accel_legacy.c
··· 33 33 */ 34 34 #define ACCEL_LEGACY_NSCALE 9586168 35 35 36 + /* 37 + * Sensor frequency is hard-coded to 10Hz. 38 + */ 39 + static const int cros_ec_legacy_sample_freq[] = { 10, 0 }; 40 + 36 41 static int cros_ec_accel_legacy_read_cmd(struct iio_dev *indio_dev, 37 42 unsigned long scan_mask, s16 *data) 38 43 { ··· 101 96 *val = 0; 102 97 ret = IIO_VAL_INT; 103 98 break; 99 + case IIO_CHAN_INFO_SAMP_FREQ: 100 + *val = cros_ec_legacy_sample_freq[0]; 101 + *val2 = cros_ec_legacy_sample_freq[1]; 102 + ret = IIO_VAL_INT_PLUS_MICRO; 103 + break; 104 104 default: 105 105 ret = cros_ec_sensors_core_read(st, chan, val, val2, 106 106 mask); ··· 130 120 return -EINVAL; 131 121 } 132 122 123 + /** 124 + * cros_ec_accel_legacy_read_avail() - get available values 125 + * @indio_dev: pointer to state information for device 126 + * @chan: channel specification structure table 127 + * @vals: list of available values 128 + * @type: type of data returned 129 + * @length: number of data returned in the array 130 + * @mask: specifies which values to be requested 131 + * 132 + * Return: an error code or IIO_AVAIL_LIST 133 + */ 134 + static int cros_ec_accel_legacy_read_avail(struct iio_dev *indio_dev, 135 + struct iio_chan_spec const *chan, 136 + const int **vals, 137 + int *type, 138 + int *length, 139 + long mask) 140 + { 141 + switch (mask) { 142 + case IIO_CHAN_INFO_SAMP_FREQ: 143 + *length = ARRAY_SIZE(cros_ec_legacy_sample_freq); 144 + *vals = cros_ec_legacy_sample_freq; 145 + *type = IIO_VAL_INT_PLUS_MICRO; 146 + return IIO_AVAIL_LIST; 147 + } 148 + 149 + return -EINVAL; 150 + } 151 + 133 152 static const struct iio_info cros_ec_accel_legacy_info = { 134 153 .read_raw = &cros_ec_accel_legacy_read, 135 154 .write_raw = &cros_ec_accel_legacy_write, 155 + .read_avail = &cros_ec_accel_legacy_read_avail, 136 156 }; 137 157 138 158 /* ··· 182 142 .info_mask_separate = \ 183 143 BIT(IIO_CHAN_INFO_RAW) | \ 184 144 BIT(IIO_CHAN_INFO_CALIBBIAS), \ 185 - .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SCALE), \ 145 + .info_mask_shared_by_all = \ 146 + BIT(IIO_CHAN_INFO_SCALE) | \ 147 + BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 148 + .info_mask_shared_by_all_available = \ 149 + BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 186 150 .ext_info = cros_ec_sensors_ext_info, \ 187 151 .scan_type = { \ 188 152 .sign = 's', \
-1
drivers/iio/accel/da280.c
··· 120 120 data->client = client; 121 121 i2c_set_clientdata(client, indio_dev); 122 122 123 - indio_dev->dev.parent = &client->dev; 124 123 indio_dev->info = &da280_info; 125 124 indio_dev->modes = INDIO_DIRECT_MODE; 126 125 indio_dev->channels = da280_channels;
-1
drivers/iio/accel/da311.c
··· 231 231 data->client = client; 232 232 i2c_set_clientdata(client, indio_dev); 233 233 234 - indio_dev->dev.parent = &client->dev; 235 234 indio_dev->info = &da311_info; 236 235 indio_dev->name = "da311"; 237 236 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/accel/dmard06.c
··· 161 161 dmard06->chip_id = ret; 162 162 163 163 i2c_set_clientdata(client, indio_dev); 164 - indio_dev->dev.parent = &client->dev; 165 164 indio_dev->name = DMARD06_DRV_NAME; 166 165 indio_dev->modes = INDIO_DIRECT_MODE; 167 166 indio_dev->channels = dmard06_channels;
-1
drivers/iio/accel/dmard09.c
··· 116 116 } 117 117 118 118 i2c_set_clientdata(client, indio_dev); 119 - indio_dev->dev.parent = &client->dev; 120 119 indio_dev->name = DMARD09_DRV_NAME; 121 120 indio_dev->modes = INDIO_DIRECT_MODE; 122 121 indio_dev->channels = dmard09_channels;
-1
drivers/iio/accel/dmard10.c
··· 196 196 data->client = client; 197 197 i2c_set_clientdata(client, indio_dev); 198 198 199 - indio_dev->dev.parent = &client->dev; 200 199 indio_dev->info = &dmard10_info; 201 200 indio_dev->name = "dmard10"; 202 201 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/accel/hid-sensor-accel-3d.c
··· 384 384 goto error_free_dev_mem; 385 385 } 386 386 387 - indio_dev->dev.parent = &pdev->dev; 388 387 indio_dev->info = &accel_3d_info; 389 388 indio_dev->name = name; 390 389 indio_dev->modes = INDIO_DIRECT_MODE;
-3
drivers/iio/accel/kxcjk-1013.c
··· 1027 1027 1028 1028 static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = { 1029 1029 .preenable = kxcjk1013_buffer_preenable, 1030 - .postenable = iio_triggered_buffer_postenable, 1031 1030 .postdisable = kxcjk1013_buffer_postdisable, 1032 - .predisable = iio_triggered_buffer_predisable, 1033 1031 }; 1034 1032 1035 1033 static const struct iio_info kxcjk1013_info = { ··· 1309 1311 1310 1312 mutex_init(&data->mutex); 1311 1313 1312 - indio_dev->dev.parent = &client->dev; 1313 1314 indio_dev->channels = kxcjk1013_channels; 1314 1315 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels); 1315 1316 indio_dev->available_scan_masks = kxcjk1013_scan_masks;
-3
drivers/iio/accel/kxsd9.c
··· 252 252 253 253 static const struct iio_buffer_setup_ops kxsd9_buffer_setup_ops = { 254 254 .preenable = kxsd9_buffer_preenable, 255 - .postenable = iio_triggered_buffer_postenable, 256 - .predisable = iio_triggered_buffer_predisable, 257 255 .postdisable = kxsd9_buffer_postdisable, 258 256 }; 259 257 ··· 409 411 indio_dev->channels = kxsd9_channels; 410 412 indio_dev->num_channels = ARRAY_SIZE(kxsd9_channels); 411 413 indio_dev->name = name; 412 - indio_dev->dev.parent = dev; 413 414 indio_dev->info = &kxsd9_info; 414 415 indio_dev->modes = INDIO_DIRECT_MODE; 415 416 indio_dev->available_scan_masks = kxsd9_scan_masks;
-1
drivers/iio/accel/mc3230.c
··· 132 132 data->client = client; 133 133 i2c_set_clientdata(client, indio_dev); 134 134 135 - indio_dev->dev.parent = &client->dev; 136 135 indio_dev->info = &mc3230_info; 137 136 indio_dev->name = "mc3230"; 138 137 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/accel/mma7455_core.c
··· 260 260 261 261 indio_dev->info = &mma7455_info; 262 262 indio_dev->name = name; 263 - indio_dev->dev.parent = dev; 264 263 indio_dev->modes = INDIO_DIRECT_MODE; 265 264 indio_dev->channels = mma7455_channels; 266 265 indio_dev->num_channels = ARRAY_SIZE(mma7455_channels);
-1
drivers/iio/accel/mma7660.c
··· 188 188 mutex_init(&data->lock); 189 189 data->mode = MMA7660_MODE_STANDBY; 190 190 191 - indio_dev->dev.parent = &client->dev; 192 191 indio_dev->info = &mma7660_info; 193 192 indio_dev->name = MMA7660_DRIVER_NAME; 194 193 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/accel/mma8452.c
··· 1592 1592 i2c_set_clientdata(client, indio_dev); 1593 1593 indio_dev->info = &mma8452_info; 1594 1594 indio_dev->name = id->name; 1595 - indio_dev->dev.parent = &client->dev; 1596 1595 indio_dev->modes = INDIO_DIRECT_MODE; 1597 1596 indio_dev->channels = data->chip_info->channels; 1598 1597 indio_dev->num_channels = data->chip_info->num_channels;
-1
drivers/iio/accel/mma9551.c
··· 473 473 474 474 mutex_init(&data->mutex); 475 475 476 - indio_dev->dev.parent = &client->dev; 477 476 indio_dev->channels = mma9551_channels; 478 477 indio_dev->num_channels = ARRAY_SIZE(mma9551_channels); 479 478 indio_dev->name = name;
-1
drivers/iio/accel/mma9553.c
··· 1103 1103 if (ret < 0) 1104 1104 return ret; 1105 1105 1106 - indio_dev->dev.parent = &client->dev; 1107 1106 indio_dev->channels = mma9553_channels; 1108 1107 indio_dev->num_channels = ARRAY_SIZE(mma9553_channels); 1109 1108 indio_dev->name = name;
+2 -1
drivers/iio/accel/mxc4005.c
··· 416 416 417 417 mutex_init(&data->mutex); 418 418 419 - indio_dev->dev.parent = &client->dev; 420 419 indio_dev->channels = mxc4005_channels; 421 420 indio_dev->num_channels = ARRAY_SIZE(mxc4005_channels); 422 421 indio_dev->available_scan_masks = mxc4005_scan_masks; ··· 473 474 474 475 static const struct acpi_device_id mxc4005_acpi_match[] = { 475 476 {"MXC4005", 0}, 477 + {"MXC6655", 0}, 476 478 { }, 477 479 }; 478 480 MODULE_DEVICE_TABLE(acpi, mxc4005_acpi_match); 479 481 480 482 static const struct i2c_device_id mxc4005_id[] = { 481 483 {"mxc4005", 0}, 484 + {"mxc6655", 0}, 482 485 { }, 483 486 }; 484 487 MODULE_DEVICE_TABLE(i2c, mxc4005_id);
-1
drivers/iio/accel/mxc6255.c
··· 138 138 data->regmap = regmap; 139 139 140 140 indio_dev->name = MXC6255_DRV_NAME; 141 - indio_dev->dev.parent = &client->dev; 142 141 indio_dev->channels = mxc6255_channels; 143 142 indio_dev->num_channels = ARRAY_SIZE(mxc6255_channels); 144 143 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/accel/sca3000.c
··· 1467 1467 st->info = &sca3000_spi_chip_info_tbl[spi_get_device_id(spi) 1468 1468 ->driver_data]; 1469 1469 1470 - indio_dev->dev.parent = &spi->dev; 1471 1470 indio_dev->name = spi_get_device_id(spi)->name; 1472 1471 indio_dev->info = &sca3000_info; 1473 1472 if (st->info->temp_output) {
-2
drivers/iio/accel/ssp_accel_sensor.c
··· 108 108 spd->type = SSP_ACCELEROMETER_SENSOR; 109 109 110 110 indio_dev->name = ssp_accel_device_name; 111 - indio_dev->dev.parent = &pdev->dev; 112 - indio_dev->dev.of_node = pdev->dev.of_node; 113 111 indio_dev->info = &ssp_accel_iio_info; 114 112 indio_dev->modes = INDIO_BUFFER_SOFTWARE; 115 113 indio_dev->channels = ssp_acc_channels;
+5 -17
drivers/iio/accel/st_accel_buffer.c
··· 33 33 { 34 34 int err; 35 35 36 - err = iio_triggered_buffer_postenable(indio_dev); 37 - if (err < 0) 38 - return err; 39 - 40 36 err = st_sensors_set_axis_enable(indio_dev, indio_dev->active_scan_mask[0]); 41 37 if (err < 0) 42 - goto st_accel_buffer_predisable; 38 + return err; 43 39 44 40 err = st_sensors_set_enable(indio_dev, true); 45 41 if (err < 0) ··· 45 49 46 50 st_accel_buffer_enable_all_axis: 47 51 st_sensors_set_axis_enable(indio_dev, ST_SENSORS_ENABLE_ALL_AXIS); 48 - st_accel_buffer_predisable: 49 - iio_triggered_buffer_predisable(indio_dev); 50 52 return err; 51 53 } 52 54 53 55 static int st_accel_buffer_predisable(struct iio_dev *indio_dev) 54 56 { 55 - int err, err2; 57 + int err; 56 58 57 59 err = st_sensors_set_enable(indio_dev, false); 58 60 if (err < 0) 59 - goto st_accel_buffer_predisable; 61 + return err; 60 62 61 - err = st_sensors_set_axis_enable(indio_dev, ST_SENSORS_ENABLE_ALL_AXIS); 62 - 63 - st_accel_buffer_predisable: 64 - err2 = iio_triggered_buffer_predisable(indio_dev); 65 - if (!err) 66 - err = err2; 67 - 68 - return err; 63 + return st_sensors_set_axis_enable(indio_dev, 64 + ST_SENSORS_ENABLE_ALL_AXIS); 69 65 } 70 66 71 67 static const struct iio_buffer_setup_ops st_accel_buffer_setup_ops = {
-3
drivers/iio/accel/stk8312.c
··· 492 492 493 493 static const struct iio_buffer_setup_ops stk8312_buffer_setup_ops = { 494 494 .preenable = stk8312_buffer_preenable, 495 - .postenable = iio_triggered_buffer_postenable, 496 - .predisable = iio_triggered_buffer_predisable, 497 495 .postdisable = stk8312_buffer_postdisable, 498 496 }; 499 497 ··· 513 515 i2c_set_clientdata(client, indio_dev); 514 516 mutex_init(&data->lock); 515 517 516 - indio_dev->dev.parent = &client->dev; 517 518 indio_dev->info = &stk8312_info; 518 519 indio_dev->name = STK8312_DRIVER_NAME; 519 520 indio_dev->modes = INDIO_DIRECT_MODE;
-3
drivers/iio/accel/stk8ba50.c
··· 376 376 377 377 static const struct iio_buffer_setup_ops stk8ba50_buffer_setup_ops = { 378 378 .preenable = stk8ba50_buffer_preenable, 379 - .postenable = iio_triggered_buffer_postenable, 380 - .predisable = iio_triggered_buffer_predisable, 381 379 .postdisable = stk8ba50_buffer_postdisable, 382 380 }; 383 381 ··· 397 399 i2c_set_clientdata(client, indio_dev); 398 400 mutex_init(&data->lock); 399 401 400 - indio_dev->dev.parent = &client->dev; 401 402 indio_dev->info = &stk8ba50_info; 402 403 indio_dev->name = STK8BA50_DRIVER_NAME; 403 404 indio_dev->modes = INDIO_DIRECT_MODE;
+1 -1
drivers/iio/adc/Kconfig
··· 294 294 295 295 config AT91_ADC 296 296 tristate "Atmel AT91 ADC" 297 - depends on ARCH_AT91 297 + depends on ARCH_AT91 || COMPILE_TEST 298 298 depends on INPUT && SYSFS 299 299 select IIO_BUFFER 300 300 select IIO_TRIGGERED_BUFFER
-2
drivers/iio/adc/ab8500-gpadc.c
··· 1163 1163 1164 1164 pm_runtime_put(dev); 1165 1165 1166 - indio_dev->dev.parent = dev; 1167 - indio_dev->dev.of_node = np; 1168 1166 indio_dev->name = "ab8500-gpadc"; 1169 1167 indio_dev->modes = INDIO_DIRECT_MODE; 1170 1168 indio_dev->info = &ab8500_gpadc_info;
-1
drivers/iio/adc/ad7091r-base.c
··· 224 224 st->chip_info = chip_info; 225 225 st->map = map; 226 226 227 - iio_dev->dev.parent = dev; 228 227 iio_dev->name = name; 229 228 iio_dev->info = &ad7091r_info; 230 229 iio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/adc/ad7124.c
··· 683 683 684 684 spi_set_drvdata(spi, indio_dev); 685 685 686 - indio_dev->dev.parent = &spi->dev; 687 686 indio_dev->name = spi_get_device_id(spi)->name; 688 687 indio_dev->modes = INDIO_DIRECT_MODE; 689 688 indio_dev->info = &ad7124_info;
-1
drivers/iio/adc/ad7192.c
··· 970 970 971 971 spi_set_drvdata(spi, indio_dev); 972 972 st->chip_info = of_device_get_match_data(&spi->dev); 973 - indio_dev->dev.parent = &spi->dev; 974 973 indio_dev->name = st->chip_info->name; 975 974 indio_dev->modes = INDIO_DIRECT_MODE; 976 975
-4
drivers/iio/adc/ad7266.c
··· 74 74 75 75 static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = { 76 76 .preenable = &ad7266_preenable, 77 - .postenable = &iio_triggered_buffer_postenable, 78 - .predisable = &iio_triggered_buffer_predisable, 79 77 .postdisable = &ad7266_postdisable, 80 78 }; 81 79 ··· 435 437 spi_set_drvdata(spi, indio_dev); 436 438 st->spi = spi; 437 439 438 - indio_dev->dev.parent = &spi->dev; 439 - indio_dev->dev.of_node = spi->dev.of_node; 440 440 indio_dev->name = spi_get_device_id(spi)->name; 441 441 indio_dev->modes = INDIO_DIRECT_MODE; 442 442 indio_dev->info = &ad7266_info;
-2
drivers/iio/adc/ad7291.c
··· 502 502 indio_dev->channels = ad7291_channels; 503 503 indio_dev->num_channels = ARRAY_SIZE(ad7291_channels); 504 504 505 - indio_dev->dev.parent = &client->dev; 506 - indio_dev->dev.of_node = client->dev.of_node; 507 505 indio_dev->info = &ad7291_info; 508 506 indio_dev->modes = INDIO_DIRECT_MODE; 509 507
-1
drivers/iio/adc/ad7292.c
··· 304 304 st->vref_mv = 1250; 305 305 } 306 306 307 - indio_dev->dev.parent = &spi->dev; 308 307 indio_dev->name = spi_get_device_id(spi)->name; 309 308 indio_dev->modes = INDIO_DIRECT_MODE; 310 309 indio_dev->info = &ad7292_info;
-2
drivers/iio/adc/ad7298.c
··· 312 312 st->spi = spi; 313 313 314 314 indio_dev->name = spi_get_device_id(spi)->name; 315 - indio_dev->dev.parent = &spi->dev; 316 - indio_dev->dev.of_node = spi->dev.of_node; 317 315 indio_dev->modes = INDIO_DIRECT_MODE; 318 316 indio_dev->channels = ad7298_channels; 319 317 indio_dev->num_channels = ARRAY_SIZE(ad7298_channels);
-3
drivers/iio/adc/ad7476.c
··· 300 300 301 301 st->spi = spi; 302 302 303 - /* Establish that the iio_dev is a child of the spi device */ 304 - indio_dev->dev.parent = &spi->dev; 305 - indio_dev->dev.of_node = spi->dev.of_node; 306 303 indio_dev->name = spi_get_device_id(spi)->name; 307 304 indio_dev->modes = INDIO_DIRECT_MODE; 308 305 indio_dev->channels = st->chip_info->channel;
+1 -3
drivers/iio/adc/ad7606.c
··· 499 499 { 500 500 struct ad7606_state *st = iio_priv(indio_dev); 501 501 502 - iio_triggered_buffer_postenable(indio_dev); 503 502 gpiod_set_value(st->gpio_convst, 1); 504 503 505 504 return 0; ··· 510 511 511 512 gpiod_set_value(st->gpio_convst, 0); 512 513 513 - return iio_triggered_buffer_predisable(indio_dev); 514 + return 0; 514 515 } 515 516 516 517 static const struct iio_buffer_setup_ops ad7606_buffer_ops = { ··· 613 614 if (ret) 614 615 return ret; 615 616 616 - indio_dev->dev.parent = dev; 617 617 if (st->gpio_os) { 618 618 if (st->gpio_range) 619 619 indio_dev->info = &ad7606_info_os_and_range;
-3
drivers/iio/adc/ad7766.c
··· 178 178 179 179 static const struct iio_buffer_setup_ops ad7766_buffer_setup_ops = { 180 180 .preenable = &ad7766_preenable, 181 - .postenable = &iio_triggered_buffer_postenable, 182 - .predisable = &iio_triggered_buffer_predisable, 183 181 .postdisable = &ad7766_postdisable, 184 182 }; 185 183 ··· 240 242 if (IS_ERR(ad7766->pd_gpio)) 241 243 return PTR_ERR(ad7766->pd_gpio); 242 244 243 - indio_dev->dev.parent = &spi->dev; 244 245 indio_dev->name = spi_get_device_id(spi)->name; 245 246 indio_dev->modes = INDIO_DIRECT_MODE; 246 247 indio_dev->channels = ad7766_channels;
+1 -8
drivers/iio/adc/ad7768-1.c
··· 490 490 { 491 491 struct ad7768_state *st = iio_priv(indio_dev); 492 492 493 - iio_triggered_buffer_postenable(indio_dev); 494 493 /* 495 494 * Write a 1 to the LSB of the INTERFACE_FORMAT register to enter 496 495 * continuous read mode. Subsequent data reads do not require an ··· 501 502 static int ad7768_buffer_predisable(struct iio_dev *indio_dev) 502 503 { 503 504 struct ad7768_state *st = iio_priv(indio_dev); 504 - int ret; 505 505 506 506 /* 507 507 * To exit continuous read mode, perform a single read of the ADC_DATA 508 508 * reg (0x2C), which allows further configuration of the device. 509 509 */ 510 - ret = ad7768_spi_reg_read(st, AD7768_REG_ADC_DATA, 3); 511 - if (ret < 0) 512 - return ret; 513 - 514 - return iio_triggered_buffer_predisable(indio_dev); 510 + return ad7768_spi_reg_read(st, AD7768_REG_ADC_DATA, 3); 515 511 } 516 512 517 513 static const struct iio_buffer_setup_ops ad7768_buffer_ops = { ··· 578 584 579 585 indio_dev->channels = ad7768_channels; 580 586 indio_dev->num_channels = ARRAY_SIZE(ad7768_channels); 581 - indio_dev->dev.parent = &spi->dev; 582 587 indio_dev->name = spi_get_device_id(spi)->name; 583 588 indio_dev->info = &ad7768_info; 584 589 indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_TRIGGERED;
-1
drivers/iio/adc/ad7780.c
··· 320 320 321 321 spi_set_drvdata(spi, indio_dev); 322 322 323 - indio_dev->dev.parent = &spi->dev; 324 323 indio_dev->name = spi_get_device_id(spi)->name; 325 324 indio_dev->modes = INDIO_DIRECT_MODE; 326 325 indio_dev->channels = &st->chip_info->channel;
-2
drivers/iio/adc/ad7791.c
··· 425 425 426 426 spi_set_drvdata(spi, indio_dev); 427 427 428 - indio_dev->dev.parent = &spi->dev; 429 - indio_dev->dev.of_node = spi->dev.of_node; 430 428 indio_dev->name = spi_get_device_id(spi)->name; 431 429 indio_dev->modes = INDIO_DIRECT_MODE; 432 430 indio_dev->channels = st->info->channels;
-2
drivers/iio/adc/ad7793.c
··· 818 818 819 819 spi_set_drvdata(spi, indio_dev); 820 820 821 - indio_dev->dev.parent = &spi->dev; 822 - indio_dev->dev.of_node = spi->dev.of_node; 823 821 indio_dev->name = spi_get_device_id(spi)->name; 824 822 indio_dev->modes = INDIO_DIRECT_MODE; 825 823 indio_dev->channels = st->chip_info->channels;
-5
drivers/iio/adc/ad7887.c
··· 136 136 137 137 static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = { 138 138 .preenable = &ad7887_ring_preenable, 139 - .postenable = &iio_triggered_buffer_postenable, 140 - .predisable = &iio_triggered_buffer_predisable, 141 139 .postdisable = &ad7887_ring_postdisable, 142 140 }; 143 141 ··· 262 264 spi_set_drvdata(spi, indio_dev); 263 265 st->spi = spi; 264 266 265 - /* Estabilish that the iio_dev is a child of the spi device */ 266 - indio_dev->dev.parent = &spi->dev; 267 - indio_dev->dev.of_node = spi->dev.of_node; 268 267 indio_dev->name = spi_get_device_id(spi)->name; 269 268 indio_dev->info = &ad7887_info; 270 269 indio_dev->modes = INDIO_DIRECT_MODE;
-2
drivers/iio/adc/ad7923.c
··· 315 315 info = &ad7923_chip_info[spi_get_device_id(spi)->driver_data]; 316 316 317 317 indio_dev->name = spi_get_device_id(spi)->name; 318 - indio_dev->dev.parent = &spi->dev; 319 - indio_dev->dev.of_node = spi->dev.of_node; 320 318 indio_dev->modes = INDIO_DIRECT_MODE; 321 319 indio_dev->channels = info->channels; 322 320 indio_dev->num_channels = info->num_channels;
+1 -3
drivers/iio/adc/ad7949.c
··· 3 3 * 4 4 * Copyright (C) 2018 CMC NV 5 5 * 6 - * http://www.analog.com/media/en/technical-documentation/data-sheets/AD7949.pdf 6 + * https://www.analog.com/media/en/technical-documentation/data-sheets/AD7949.pdf 7 7 */ 8 8 9 9 #include <linux/delay.h> ··· 243 243 return -ENOMEM; 244 244 } 245 245 246 - indio_dev->dev.parent = dev; 247 - indio_dev->dev.of_node = dev->of_node; 248 246 indio_dev->info = &ad7949_spi_info; 249 247 indio_dev->name = spi_get_device_id(spi)->name; 250 248 indio_dev->modes = INDIO_DIRECT_MODE;
-2
drivers/iio/adc/ad799x.c
··· 814 814 815 815 st->client = client; 816 816 817 - indio_dev->dev.parent = &client->dev; 818 - indio_dev->dev.of_node = client->dev.of_node; 819 817 indio_dev->name = id->name; 820 818 indio_dev->info = st->chip_config->info; 821 819
-5
drivers/iio/adc/ad_sigma_delta.c
··· 345 345 unsigned int channel; 346 346 int ret; 347 347 348 - ret = iio_triggered_buffer_postenable(indio_dev); 349 - if (ret < 0) 350 - return ret; 351 - 352 348 channel = find_first_bit(indio_dev->active_scan_mask, 353 349 indio_dev->masklength); 354 350 ret = ad_sigma_delta_set_channel(sigma_delta, ··· 437 441 438 442 static const struct iio_buffer_setup_ops ad_sd_buffer_setup_ops = { 439 443 .postenable = &ad_sd_buffer_postenable, 440 - .predisable = &iio_triggered_buffer_predisable, 441 444 .postdisable = &ad_sd_buffer_postdisable, 442 445 .validate_scan_mask = &iio_validate_scan_mask_onehot, 443 446 };
-1
drivers/iio/adc/adi-axi-adc.c
··· 435 435 } 436 436 437 437 indio_dev->info = &adi_axi_adc_info; 438 - indio_dev->dev.parent = &pdev->dev; 439 438 indio_dev->name = "adi-axi-adc"; 440 439 indio_dev->modes = INDIO_DIRECT_MODE; 441 440 indio_dev->num_channels = conv->chip_info->num_channels;
-1
drivers/iio/adc/aspeed_adc.c
··· 252 252 253 253 model_data = of_device_get_match_data(&pdev->dev); 254 254 indio_dev->name = model_data->model_name; 255 - indio_dev->dev.parent = &pdev->dev; 256 255 indio_dev->info = &aspeed_adc_iio_info; 257 256 indio_dev->modes = INDIO_DIRECT_MODE; 258 257 indio_dev->channels = aspeed_adc_iio_channels;
+17 -32
drivers/iio/adc/at91-sama5d2_adc.c
··· 402 402 wait_queue_head_t wq_data_available; 403 403 struct at91_adc_dma dma_st; 404 404 struct at91_adc_touch touch_st; 405 + struct iio_dev *indio_dev; 405 406 u16 buffer[AT91_BUFFER_MAX_HWORDS]; 406 407 /* 407 408 * lock to prevent concurrent 'single conversion' requests through ··· 643 642 /* first half of register is the x or y, second half is the scale */ 644 643 val = at91_adc_readl(st, reg); 645 644 if (!val) 646 - dev_dbg(&iio_priv_to_dev(st)->dev, "pos is 0\n"); 645 + dev_dbg(&st->indio_dev->dev, "pos is 0\n"); 647 646 648 647 pos = val & AT91_SAMA5D2_XYZ_MASK; 649 648 result = (pos << AT91_SAMA5D2_MAX_POS_BITS) - pos; 650 649 scale = (val >> 16) & AT91_SAMA5D2_XYZ_MASK; 651 650 if (scale == 0) { 652 - dev_err(&iio_priv_to_dev(st)->dev, "scale is 0\n"); 651 + dev_err(&st->indio_dev->dev, "scale is 0\n"); 653 652 return 0; 654 653 } 655 654 result /= scale; ··· 938 937 return 0; 939 938 } 940 939 941 - static int at91_adc_buffer_postenable(struct iio_dev *indio_dev) 942 - { 943 - if (at91_adc_current_chan_is_touch(indio_dev)) 944 - return 0; 945 - 946 - return iio_triggered_buffer_postenable(indio_dev); 947 - } 948 - 949 940 static int at91_adc_buffer_postdisable(struct iio_dev *indio_dev) 950 941 { 951 942 struct at91_adc_state *st = iio_priv(indio_dev); ··· 988 995 return 0; 989 996 } 990 997 991 - static int at91_adc_buffer_predisable(struct iio_dev *indio_dev) 992 - { 993 - if (at91_adc_current_chan_is_touch(indio_dev)) 994 - return 0; 995 - 996 - return iio_triggered_buffer_predisable(indio_dev); 997 - } 998 - 999 998 static const struct iio_buffer_setup_ops at91_buffer_setup_ops = { 1000 999 .preenable = &at91_adc_buffer_preenable, 1001 1000 .postdisable = &at91_adc_buffer_postdisable, 1002 - .postenable = &at91_adc_buffer_postenable, 1003 - .predisable = &at91_adc_buffer_predisable, 1004 1001 }; 1005 1002 1006 1003 static struct iio_trigger *at91_adc_allocate_trigger(struct iio_dev *indio, ··· 1187 1204 return i; 1188 1205 } 1189 1206 1190 - static void at91_adc_setup_samp_freq(struct at91_adc_state *st, unsigned freq) 1207 + static void at91_adc_setup_samp_freq(struct iio_dev *indio_dev, unsigned freq) 1191 1208 { 1192 - struct iio_dev *indio_dev = iio_priv_to_dev(st); 1209 + struct at91_adc_state *st = iio_priv(indio_dev); 1193 1210 unsigned f_per, prescal, startup, mr; 1194 1211 1195 1212 f_per = clk_get_rate(st->per_clk); ··· 1258 1275 st->touch_st.touching = true; 1259 1276 } 1260 1277 1261 - static void at91_adc_no_pen_detect_interrupt(struct at91_adc_state *st) 1278 + static void at91_adc_no_pen_detect_interrupt(struct iio_dev *indio_dev) 1262 1279 { 1263 - struct iio_dev *indio_dev = iio_priv_to_dev(st); 1280 + struct at91_adc_state *st = iio_priv(indio_dev); 1264 1281 1265 1282 at91_adc_writel(st, AT91_SAMA5D2_TRGR, 1266 1283 AT91_SAMA5D2_TRGR_TRGMOD_NO_TRIGGER); ··· 1280 1297 struct at91_adc_touch, workq); 1281 1298 struct at91_adc_state *st = container_of(touch_st, 1282 1299 struct at91_adc_state, touch_st); 1283 - struct iio_dev *indio_dev = iio_priv_to_dev(st); 1300 + struct iio_dev *indio_dev = st->indio_dev; 1284 1301 1285 1302 iio_push_to_buffers(indio_dev, st->buffer); 1286 1303 } ··· 1301 1318 at91_adc_pen_detect_interrupt(st); 1302 1319 } else if ((status & AT91_SAMA5D2_IER_NOPEN)) { 1303 1320 /* nopen detected IRQ */ 1304 - at91_adc_no_pen_detect_interrupt(st); 1321 + at91_adc_no_pen_detect_interrupt(indio); 1305 1322 } else if ((status & AT91_SAMA5D2_ISR_PENS) && 1306 1323 ((status & rdy_mask) == rdy_mask)) { 1307 1324 /* periodic trigger IRQ - during pen sense */ ··· 1469 1486 val > st->soc_info.max_sample_rate) 1470 1487 return -EINVAL; 1471 1488 1472 - at91_adc_setup_samp_freq(st, val); 1489 + at91_adc_setup_samp_freq(indio_dev, val); 1473 1490 return 0; 1474 1491 default: 1475 1492 return -EINVAL; ··· 1607 1624 return 0; 1608 1625 } 1609 1626 1610 - static void at91_adc_hw_init(struct at91_adc_state *st) 1627 + static void at91_adc_hw_init(struct iio_dev *indio_dev) 1611 1628 { 1629 + struct at91_adc_state *st = iio_priv(indio_dev); 1630 + 1612 1631 at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_SWRST); 1613 1632 at91_adc_writel(st, AT91_SAMA5D2_IDR, 0xffffffff); 1614 1633 /* ··· 1620 1635 at91_adc_writel(st, AT91_SAMA5D2_MR, 1621 1636 AT91_SAMA5D2_MR_TRANSFER(2) | AT91_SAMA5D2_MR_ANACH); 1622 1637 1623 - at91_adc_setup_samp_freq(st, st->soc_info.min_sample_rate); 1638 + at91_adc_setup_samp_freq(indio_dev, st->soc_info.min_sample_rate); 1624 1639 1625 1640 /* configure extended mode register */ 1626 1641 at91_adc_config_emr(st); ··· 1695 1710 if (!indio_dev) 1696 1711 return -ENOMEM; 1697 1712 1698 - indio_dev->dev.parent = &pdev->dev; 1699 1713 indio_dev->name = dev_name(&pdev->dev); 1700 1714 indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE; 1701 1715 indio_dev->info = &at91_adc_info; ··· 1702 1718 indio_dev->num_channels = ARRAY_SIZE(at91_adc_channels); 1703 1719 1704 1720 st = iio_priv(indio_dev); 1721 + st->indio_dev = indio_dev; 1705 1722 1706 1723 bitmap_set(&st->touch_st.channels_bitmask, 1707 1724 AT91_SAMA5D2_TOUCH_X_CHAN_IDX, 1); ··· 1814 1829 goto vref_disable; 1815 1830 } 1816 1831 1817 - at91_adc_hw_init(st); 1832 + at91_adc_hw_init(indio_dev); 1818 1833 1819 1834 ret = clk_prepare_enable(st->per_clk); 1820 1835 if (ret) ··· 1930 1945 if (ret) 1931 1946 goto vref_disable_resume; 1932 1947 1933 - at91_adc_hw_init(st); 1948 + at91_adc_hw_init(indio_dev); 1934 1949 1935 1950 /* reconfiguring trigger hardware state */ 1936 1951 if (!iio_buffer_enabled(indio_dev))
+15 -16
drivers/iio/adc/at91_adc.c
··· 287 287 } 288 288 } 289 289 290 - static int at91_ts_sample(struct at91_adc_state *st) 290 + static int at91_ts_sample(struct iio_dev *idev) 291 291 { 292 + struct at91_adc_state *st = iio_priv(idev); 292 293 unsigned int xscale, yscale, reg, z1, z2; 293 294 unsigned int x, y, pres, xpos, ypos; 294 295 unsigned int rxp = 1; 295 296 unsigned int factor = 1000; 296 - struct iio_dev *idev = iio_priv_to_dev(st); 297 297 298 298 unsigned int xyz_mask_bits = st->res; 299 299 unsigned int xyz_mask = (1 << xyz_mask_bits) - 1; ··· 449 449 450 450 if (status & AT91_ADC_ISR_PENS) { 451 451 /* validate data by pen contact */ 452 - at91_ts_sample(st); 452 + at91_ts_sample(idev); 453 453 } else { 454 454 /* triggered by event that is no pen contact, just read 455 455 * them to clean the interrupt and discard all. ··· 737 737 return -EINVAL; 738 738 } 739 739 740 - static int at91_adc_of_get_resolution(struct at91_adc_state *st, 740 + static int at91_adc_of_get_resolution(struct iio_dev *idev, 741 741 struct platform_device *pdev) 742 742 { 743 - struct iio_dev *idev = iio_priv_to_dev(st); 743 + struct at91_adc_state *st = iio_priv(idev); 744 744 struct device_node *np = pdev->dev.of_node; 745 745 int count, i, ret = 0; 746 746 char *res_name, *s; ··· 866 866 } 867 867 } 868 868 869 - static int at91_adc_probe_dt(struct at91_adc_state *st, 869 + static int at91_adc_probe_dt(struct iio_dev *idev, 870 870 struct platform_device *pdev) 871 871 { 872 - struct iio_dev *idev = iio_priv_to_dev(st); 872 + struct at91_adc_state *st = iio_priv(idev); 873 873 struct device_node *node = pdev->dev.of_node; 874 874 struct device_node *trig_node; 875 875 int i = 0, ret; ··· 910 910 } 911 911 st->vref_mv = prop; 912 912 913 - ret = at91_adc_of_get_resolution(st, pdev); 913 + ret = at91_adc_of_get_resolution(idev, pdev); 914 914 if (ret) 915 915 goto error_ret; 916 916 ··· 1010 1010 at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN); 1011 1011 } 1012 1012 1013 - static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz) 1013 + static int at91_ts_hw_init(struct iio_dev *idev, u32 adc_clk_khz) 1014 1014 { 1015 - struct iio_dev *idev = iio_priv_to_dev(st); 1015 + struct at91_adc_state *st = iio_priv(idev); 1016 1016 u32 reg = 0; 1017 1017 u32 tssctim = 0; 1018 1018 int i = 0; ··· 1085 1085 return 0; 1086 1086 } 1087 1087 1088 - static int at91_ts_register(struct at91_adc_state *st, 1088 + static int at91_ts_register(struct iio_dev *idev, 1089 1089 struct platform_device *pdev) 1090 1090 { 1091 + struct at91_adc_state *st = iio_priv(idev); 1091 1092 struct input_dev *input; 1092 - struct iio_dev *idev = iio_priv_to_dev(st); 1093 1093 int ret; 1094 1094 1095 1095 input = input_allocate_device(); ··· 1161 1161 st = iio_priv(idev); 1162 1162 1163 1163 if (pdev->dev.of_node) 1164 - ret = at91_adc_probe_dt(st, pdev); 1164 + ret = at91_adc_probe_dt(idev, pdev); 1165 1165 else 1166 1166 ret = at91_adc_probe_pdata(st, pdev); 1167 1167 ··· 1172 1172 1173 1173 platform_set_drvdata(pdev, idev); 1174 1174 1175 - idev->dev.parent = &pdev->dev; 1176 1175 idev->name = dev_name(&pdev->dev); 1177 1176 idev->modes = INDIO_DIRECT_MODE; 1178 1177 idev->info = &at91_adc_info; ··· 1300 1301 goto error_disable_adc_clk; 1301 1302 } 1302 1303 } else { 1303 - ret = at91_ts_register(st, pdev); 1304 + ret = at91_ts_register(idev, pdev); 1304 1305 if (ret) 1305 1306 goto error_disable_adc_clk; 1306 1307 1307 - at91_ts_hw_init(st, adc_clk_khz); 1308 + at91_ts_hw_init(idev, adc_clk_khz); 1308 1309 } 1309 1310 1310 1311 ret = iio_device_register(idev);
-2
drivers/iio/adc/axp20x_adc.c
··· 668 668 platform_set_drvdata(pdev, indio_dev); 669 669 670 670 info->regmap = axp20x_dev->regmap; 671 - indio_dev->dev.parent = &pdev->dev; 672 - indio_dev->dev.of_node = pdev->dev.of_node; 673 671 indio_dev->modes = INDIO_DIRECT_MODE; 674 672 675 673 if (!pdev->dev.of_node) {
-1
drivers/iio/adc/axp288_adc.c
··· 271 271 return ret; 272 272 } 273 273 274 - indio_dev->dev.parent = &pdev->dev; 275 274 indio_dev->name = pdev->name; 276 275 indio_dev->channels = axp288_adc_channels; 277 276 indio_dev->num_channels = ARRAY_SIZE(axp288_adc_channels);
-2
drivers/iio/adc/bcm_iproc_adc.c
··· 573 573 } 574 574 575 575 indio_dev->name = "iproc-static-adc"; 576 - indio_dev->dev.parent = &pdev->dev; 577 - indio_dev->dev.of_node = pdev->dev.of_node; 578 576 indio_dev->info = &iproc_adc_iio_info; 579 577 indio_dev->modes = INDIO_DIRECT_MODE; 580 578 indio_dev->channels = iproc_adc_iio_channels;
-1
drivers/iio/adc/berlin2-adc.c
··· 321 321 init_waitqueue_head(&priv->wq); 322 322 mutex_init(&priv->lock); 323 323 324 - indio_dev->dev.parent = &pdev->dev; 325 324 indio_dev->name = dev_name(&pdev->dev); 326 325 indio_dev->modes = INDIO_DIRECT_MODE; 327 326 indio_dev->info = &berlin2_adc_info;
-1
drivers/iio/adc/cc10001_adc.c
··· 334 334 if (ret) 335 335 return ret; 336 336 337 - indio_dev->dev.parent = &pdev->dev; 338 337 indio_dev->name = dev_name(&pdev->dev); 339 338 indio_dev->info = &cc10001_adc_info; 340 339 indio_dev->modes = INDIO_DIRECT_MODE;
+6 -18
drivers/iio/adc/cpcap-adc.c
··· 15 15 #include <linux/interrupt.h> 16 16 #include <linux/kernel.h> 17 17 #include <linux/module.h> 18 - #include <linux/of.h> 19 - #include <linux/of_platform.h> 18 + #include <linux/mod_devicetable.h> 20 19 #include <linux/platform_device.h> 20 + #include <linux/property.h> 21 21 #include <linux/regmap.h> 22 22 23 23 #include <linux/iio/buffer.h> ··· 955 955 956 956 static int cpcap_adc_probe(struct platform_device *pdev) 957 957 { 958 - const struct of_device_id *match; 959 958 struct cpcap_adc *ddata; 960 959 struct iio_dev *indio_dev; 961 960 int error; 962 - 963 - match = of_match_device(of_match_ptr(cpcap_adc_id_table), 964 - &pdev->dev); 965 - if (!match) 966 - return -EINVAL; 967 - 968 - if (!match->data) { 969 - dev_err(&pdev->dev, "no configuration data found\n"); 970 - 971 - return -ENODEV; 972 - } 973 961 974 962 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*ddata)); 975 963 if (!indio_dev) { ··· 966 978 return -ENOMEM; 967 979 } 968 980 ddata = iio_priv(indio_dev); 969 - ddata->ato = match->data; 981 + ddata->ato = device_get_match_data(&pdev->dev); 982 + if (!ddata->ato) 983 + return -ENODEV; 970 984 ddata->dev = &pdev->dev; 971 985 972 986 mutex_init(&ddata->lock); 973 987 init_waitqueue_head(&ddata->wq_data_avail); 974 988 975 989 indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE; 976 - indio_dev->dev.parent = &pdev->dev; 977 - indio_dev->dev.of_node = pdev->dev.of_node; 978 990 indio_dev->channels = cpcap_adc_channels; 979 991 indio_dev->num_channels = ARRAY_SIZE(cpcap_adc_channels); 980 992 indio_dev->name = dev_name(&pdev->dev); ··· 1017 1029 static struct platform_driver cpcap_adc_driver = { 1018 1030 .driver = { 1019 1031 .name = "cpcap_adc", 1020 - .of_match_table = of_match_ptr(cpcap_adc_id_table), 1032 + .of_match_table = cpcap_adc_id_table, 1021 1033 }, 1022 1034 .probe = cpcap_adc_probe, 1023 1035 };
-2
drivers/iio/adc/da9150-gpadc.c
··· 354 354 } 355 355 356 356 indio_dev->name = dev_name(dev); 357 - indio_dev->dev.parent = dev; 358 - indio_dev->dev.of_node = pdev->dev.of_node; 359 357 indio_dev->info = &da9150_gpadc_info; 360 358 indio_dev->modes = INDIO_DIRECT_MODE; 361 359 indio_dev->channels = da9150_gpadc_channels;
+1 -12
drivers/iio/adc/dln2-adc.c
··· 524 524 u16 conflict; 525 525 unsigned int trigger_chan; 526 526 527 - ret = iio_triggered_buffer_postenable(indio_dev); 528 - if (ret) 529 - return ret; 530 - 531 527 mutex_lock(&dln2->mutex); 532 528 533 529 /* Enable ADC */ ··· 537 541 (int)conflict); 538 542 ret = -EBUSY; 539 543 } 540 - iio_triggered_buffer_predisable(indio_dev); 541 544 return ret; 542 545 } 543 546 ··· 550 555 mutex_unlock(&dln2->mutex); 551 556 if (ret < 0) { 552 557 dev_dbg(&dln2->pdev->dev, "Problem in %s\n", __func__); 553 - iio_triggered_buffer_predisable(indio_dev); 554 558 return ret; 555 559 } 556 560 } else { ··· 562 568 563 569 static int dln2_adc_triggered_buffer_predisable(struct iio_dev *indio_dev) 564 570 { 565 - int ret, ret2; 571 + int ret; 566 572 struct dln2_adc *dln2 = iio_priv(indio_dev); 567 573 568 574 mutex_lock(&dln2->mutex); ··· 579 585 mutex_unlock(&dln2->mutex); 580 586 if (ret < 0) 581 587 dev_dbg(&dln2->pdev->dev, "Problem in %s\n", __func__); 582 - 583 - ret2 = iio_triggered_buffer_predisable(indio_dev); 584 - if (ret == 0) 585 - ret = ret2; 586 588 587 589 return ret; 588 590 } ··· 642 652 IIO_CHAN_SOFT_TIMESTAMP_ASSIGN(dln2->iio_channels[i], i); 643 653 644 654 indio_dev->name = DLN2_ADC_MOD_NAME; 645 - indio_dev->dev.parent = dev; 646 655 indio_dev->info = &dln2_adc_info; 647 656 indio_dev->modes = INDIO_DIRECT_MODE; 648 657 indio_dev->channels = dln2->iio_channels;
-2
drivers/iio/adc/envelope-detector.c
··· 343 343 INIT_DELAYED_WORK(&env->comp_timeout, envelope_detector_timeout); 344 344 345 345 indio_dev->name = dev_name(dev); 346 - indio_dev->dev.parent = dev; 347 - indio_dev->dev.of_node = dev->of_node; 348 346 indio_dev->info = &envelope_detector_info; 349 347 indio_dev->channels = &envelope_detector_iio_channel; 350 348 indio_dev->num_channels = 1;
-1
drivers/iio/adc/ep93xx_adc.c
··· 170 170 return PTR_ERR(priv->base); 171 171 } 172 172 173 - iiodev->dev.parent = &pdev->dev; 174 173 iiodev->name = dev_name(&pdev->dev); 175 174 iiodev->modes = INDIO_DIRECT_MODE; 176 175 iiodev->info = &ep93xx_adc_info;
-2
drivers/iio/adc/exynos_adc.c
··· 867 867 platform_set_drvdata(pdev, indio_dev); 868 868 869 869 indio_dev->name = dev_name(&pdev->dev); 870 - indio_dev->dev.parent = &pdev->dev; 871 - indio_dev->dev.of_node = pdev->dev.of_node; 872 870 indio_dev->info = &exynos_adc_iio_info; 873 871 indio_dev->modes = INDIO_DIRECT_MODE; 874 872 indio_dev->channels = exynos_adc_iio_channels;
-1
drivers/iio/adc/fsl-imx25-gcq.c
··· 350 350 goto err_clk_unprepare; 351 351 } 352 352 353 - indio_dev->dev.parent = &pdev->dev; 354 353 indio_dev->channels = mx25_gcq_channels; 355 354 indio_dev->num_channels = ARRAY_SIZE(mx25_gcq_channels); 356 355 indio_dev->info = &mx25_gcq_iio_info;
+2 -6
drivers/iio/adc/hi8435.c
··· 15 15 #include <linux/iio/triggered_event.h> 16 16 #include <linux/interrupt.h> 17 17 #include <linux/module.h> 18 - #include <linux/of.h> 19 - #include <linux/of_device.h> 20 - #include <linux/of_gpio.h> 18 + #include <linux/mod_devicetable.h> 21 19 #include <linux/spi/spi.h> 22 20 #include <linux/gpio/consumer.h> 23 21 ··· 486 488 spi_set_drvdata(spi, idev); 487 489 mutex_init(&priv->lock); 488 490 489 - idev->dev.parent = &spi->dev; 490 - idev->dev.of_node = spi->dev.of_node; 491 491 idev->name = spi_get_device_id(spi)->name; 492 492 idev->modes = INDIO_DIRECT_MODE; 493 493 idev->info = &hi8435_info; ··· 538 542 static struct spi_driver hi8435_driver = { 539 543 .driver = { 540 544 .name = DRV_NAME, 541 - .of_match_table = of_match_ptr(hi8435_dt_ids), 545 + .of_match_table = hi8435_dt_ids, 542 546 }, 543 547 .probe = hi8435_probe, 544 548 .id_table = hi8435_id,
-1
drivers/iio/adc/hx711.c
··· 551 551 platform_set_drvdata(pdev, indio_dev); 552 552 553 553 indio_dev->name = "hx711"; 554 - indio_dev->dev.parent = &pdev->dev; 555 554 indio_dev->info = &hx711_iio_info; 556 555 indio_dev->modes = INDIO_DIRECT_MODE; 557 556 indio_dev->channels = hx711_chan_spec;
-1
drivers/iio/adc/imx7d_adc.c
··· 515 515 init_completion(&info->completion); 516 516 517 517 indio_dev->name = dev_name(dev); 518 - indio_dev->dev.parent = dev; 519 518 indio_dev->info = &imx7d_adc_iio_info; 520 519 indio_dev->modes = INDIO_DIRECT_MODE; 521 520 indio_dev->channels = imx7d_adc_iio_channels;
+1 -3
drivers/iio/adc/ina2xx-adc.c
··· 273 273 * Available averaging rates for ina226. The indices correspond with 274 274 * the bit values expected by the chip (according to the ina226 datasheet, 275 275 * table 3 AVG bit settings, found at 276 - * http://www.ti.com/lit/ds/symlink/ina226.pdf. 276 + * https://www.ti.com/lit/ds/symlink/ina226.pdf. 277 277 */ 278 278 static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 }; 279 279 ··· 1015 1015 } 1016 1016 1017 1017 indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE; 1018 - indio_dev->dev.parent = &client->dev; 1019 - indio_dev->dev.of_node = client->dev.of_node; 1020 1018 if (id->driver_data == ina226) { 1021 1019 indio_dev->channels = ina226_channels; 1022 1020 indio_dev->num_channels = ARRAY_SIZE(ina226_channels);
+2 -4
drivers/iio/adc/ingenic-adc.c
··· 13 13 #include <linux/iopoll.h> 14 14 #include <linux/kernel.h> 15 15 #include <linux/module.h> 16 + #include <linux/mod_devicetable.h> 16 17 #include <linux/mutex.h> 17 18 #include <linux/platform_device.h> 18 19 ··· 482 481 return ret; 483 482 } 484 483 485 - iio_dev->dev.parent = dev; 486 484 iio_dev->name = "jz-adc"; 487 485 iio_dev->modes = INDIO_DIRECT_MODE; 488 486 iio_dev->channels = ingenic_channels; ··· 498 498 return ret; 499 499 } 500 500 501 - #ifdef CONFIG_OF 502 501 static const struct of_device_id ingenic_adc_of_match[] = { 503 502 { .compatible = "ingenic,jz4725b-adc", .data = &jz4725b_adc_soc_data, }, 504 503 { .compatible = "ingenic,jz4740-adc", .data = &jz4740_adc_soc_data, }, ··· 505 506 { }, 506 507 }; 507 508 MODULE_DEVICE_TABLE(of, ingenic_adc_of_match); 508 - #endif 509 509 510 510 static struct platform_driver ingenic_adc_driver = { 511 511 .driver = { 512 512 .name = "ingenic-adc", 513 - .of_match_table = of_match_ptr(ingenic_adc_of_match), 513 + .of_match_table = ingenic_adc_of_match, 514 514 }, 515 515 .probe = ingenic_adc_probe, 516 516 };
-1
drivers/iio/adc/intel_mrfld_adc.c
··· 207 207 208 208 platform_set_drvdata(pdev, indio_dev); 209 209 210 - indio_dev->dev.parent = dev; 211 210 indio_dev->name = pdev->name; 212 211 213 212 indio_dev->channels = mrfld_adc_channels;
-2
drivers/iio/adc/lp8788_adc.c
··· 198 198 adc->lp = lp; 199 199 platform_set_drvdata(pdev, indio_dev); 200 200 201 - indio_dev->dev.of_node = pdev->dev.of_node; 202 201 ret = lp8788_iio_map_register(indio_dev, lp->pdata, adc); 203 202 if (ret) 204 203 return ret; 205 204 206 205 mutex_init(&adc->lock); 207 206 208 - indio_dev->dev.parent = &pdev->dev; 209 207 indio_dev->name = pdev->name; 210 208 indio_dev->modes = INDIO_DIRECT_MODE; 211 209 indio_dev->info = &lp8788_adc_info;
-1
drivers/iio/adc/lpc18xx_adc.c
··· 152 152 } 153 153 154 154 indio_dev->name = dev_name(&pdev->dev); 155 - indio_dev->dev.parent = &pdev->dev; 156 155 indio_dev->info = &lpc18xx_adc_info; 157 156 indio_dev->modes = INDIO_DIRECT_MODE; 158 157 indio_dev->channels = lpc18xx_adc_iio_channels;
+2 -4
drivers/iio/adc/lpc32xx_adc.c
··· 14 14 #include <linux/interrupt.h> 15 15 #include <linux/io.h> 16 16 #include <linux/module.h> 17 + #include <linux/mod_devicetable.h> 17 18 #include <linux/platform_device.h> 18 19 #include <linux/regulator/consumer.h> 19 20 ··· 197 196 init_completion(&st->completion); 198 197 199 198 iodev->name = LPC32XXAD_NAME; 200 - iodev->dev.parent = &pdev->dev; 201 199 iodev->info = &lpc32xx_adc_iio_info; 202 200 iodev->modes = INDIO_DIRECT_MODE; 203 201 iodev->num_channels = ARRAY_SIZE(lpc32xx_adc_iio_channels); ··· 210 210 return 0; 211 211 } 212 212 213 - #ifdef CONFIG_OF 214 213 static const struct of_device_id lpc32xx_adc_match[] = { 215 214 { .compatible = "nxp,lpc3220-adc" }, 216 215 {}, 217 216 }; 218 217 MODULE_DEVICE_TABLE(of, lpc32xx_adc_match); 219 - #endif 220 218 221 219 static struct platform_driver lpc32xx_adc_driver = { 222 220 .probe = lpc32xx_adc_probe, 223 221 .driver = { 224 222 .name = LPC32XXAD_NAME, 225 - .of_match_table = of_match_ptr(lpc32xx_adc_match), 223 + .of_match_table = lpc32xx_adc_match, 226 224 }, 227 225 }; 228 226
-1
drivers/iio/adc/ltc2471.c
··· 116 116 data = iio_priv(indio_dev); 117 117 data->client = client; 118 118 119 - indio_dev->dev.parent = &client->dev; 120 119 indio_dev->name = id->name; 121 120 indio_dev->info = &ltc2471_info; 122 121 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/adc/ltc2485.c
··· 108 108 i2c_set_clientdata(client, indio_dev); 109 109 data->client = client; 110 110 111 - indio_dev->dev.parent = &client->dev; 112 111 indio_dev->name = id->name; 113 112 indio_dev->info = &ltc2485_info; 114 113 indio_dev->modes = INDIO_DIRECT_MODE;
+2 -2
drivers/iio/adc/ltc2496.c
··· 14 14 #include <linux/iio/iio.h> 15 15 #include <linux/iio/driver.h> 16 16 #include <linux/module.h> 17 - #include <linux/of.h> 17 + #include <linux/mod_devicetable.h> 18 18 19 19 #include "ltc2497.h" 20 20 ··· 96 96 static struct spi_driver ltc2496_driver = { 97 97 .driver = { 98 98 .name = "ltc2496", 99 - .of_match_table = of_match_ptr(ltc2496_of_match), 99 + .of_match_table = ltc2496_of_match, 100 100 }, 101 101 .probe = ltc2496_probe, 102 102 .remove = ltc2496_remove,
-1
drivers/iio/adc/ltc2497-core.c
··· 169 169 struct ltc2497core_driverdata *ddata = iio_priv(indio_dev); 170 170 int ret; 171 171 172 - indio_dev->dev.parent = dev; 173 172 indio_dev->name = dev_name(dev); 174 173 indio_dev->info = &ltc2497core_info; 175 174 indio_dev->modes = INDIO_DIRECT_MODE;
+2 -2
drivers/iio/adc/ltc2497.c
··· 11 11 #include <linux/iio/iio.h> 12 12 #include <linux/iio/driver.h> 13 13 #include <linux/module.h> 14 - #include <linux/of.h> 14 + #include <linux/mod_devicetable.h> 15 15 16 16 #include "ltc2497.h" 17 17 ··· 98 98 static struct i2c_driver ltc2497_driver = { 99 99 .driver = { 100 100 .name = "ltc2497", 101 - .of_match_table = of_match_ptr(ltc2497_of_match), 101 + .of_match_table = ltc2497_of_match, 102 102 }, 103 103 .probe = ltc2497_probe, 104 104 .remove = ltc2497_remove,
+2 -5
drivers/iio/adc/max1027.c
··· 14 14 15 15 #include <linux/kernel.h> 16 16 #include <linux/module.h> 17 + #include <linux/mod_devicetable.h> 17 18 #include <linux/spi/spi.h> 18 19 #include <linux/delay.h> 19 20 ··· 80 79 }; 81 80 MODULE_DEVICE_TABLE(spi, max1027_id); 82 81 83 - #ifdef CONFIG_OF 84 82 static const struct of_device_id max1027_adc_dt_ids[] = { 85 83 { .compatible = "maxim,max1027" }, 86 84 { .compatible = "maxim,max1029" }, ··· 90 90 {}, 91 91 }; 92 92 MODULE_DEVICE_TABLE(of, max1027_adc_dt_ids); 93 - #endif 94 93 95 94 #define MAX1027_V_CHAN(index, depth) \ 96 95 { \ ··· 439 440 mutex_init(&st->lock); 440 441 441 442 indio_dev->name = spi_get_device_id(spi)->name; 442 - indio_dev->dev.parent = &spi->dev; 443 - indio_dev->dev.of_node = spi->dev.of_node; 444 443 indio_dev->info = &max1027_info; 445 444 indio_dev->modes = INDIO_DIRECT_MODE; 446 445 indio_dev->channels = st->info->channels; ··· 517 520 static struct spi_driver max1027_driver = { 518 521 .driver = { 519 522 .name = "max1027", 520 - .of_match_table = of_match_ptr(max1027_adc_dt_ids), 523 + .of_match_table = max1027_adc_dt_ids, 521 524 }, 522 525 .probe = max1027_probe, 523 526 .id_table = max1027_id,
+3 -4
drivers/iio/adc/max11100.c
··· 8 8 */ 9 9 #include <linux/delay.h> 10 10 #include <linux/kernel.h> 11 + #include <linux/mod_devicetable.h> 11 12 #include <linux/module.h> 12 13 #include <linux/regulator/consumer.h> 13 14 #include <linux/spi/spi.h> ··· 38 37 u8 buffer[3] ____cacheline_aligned; 39 38 }; 40 39 41 - static struct iio_chan_spec max11100_channels[] = { 40 + static const struct iio_chan_spec max11100_channels[] = { 42 41 { /* [0] */ 43 42 .type = IIO_VOLTAGE, 44 43 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | ··· 116 115 state = iio_priv(indio_dev); 117 116 state->spi = spi; 118 117 119 - indio_dev->dev.parent = &spi->dev; 120 - indio_dev->dev.of_node = spi->dev.of_node; 121 118 indio_dev->name = "max11100"; 122 119 indio_dev->info = &max11100_info; 123 120 indio_dev->modes = INDIO_DIRECT_MODE; ··· 162 163 static struct spi_driver max11100_driver = { 163 164 .driver = { 164 165 .name = "max11100", 165 - .of_match_table = of_match_ptr(max11100_ids), 166 + .of_match_table = max11100_ids, 166 167 }, 167 168 .probe = max11100_probe, 168 169 .remove = max11100_remove,
+2 -6
drivers/iio/adc/max1118.c
··· 18 18 */ 19 19 20 20 #include <linux/module.h> 21 + #include <linux/mod_devicetable.h> 21 22 #include <linux/spi/spi.h> 22 23 #include <linux/iio/iio.h> 23 24 #include <linux/iio/buffer.h> ··· 226 225 spi_set_drvdata(spi, indio_dev); 227 226 228 227 indio_dev->name = spi_get_device_id(spi)->name; 229 - indio_dev->dev.parent = &spi->dev; 230 228 indio_dev->info = &max1118_info; 231 229 indio_dev->modes = INDIO_DIRECT_MODE; 232 230 indio_dev->channels = max1118_channels; ··· 281 281 }; 282 282 MODULE_DEVICE_TABLE(spi, max1118_id); 283 283 284 - #ifdef CONFIG_OF 285 - 286 284 static const struct of_device_id max1118_dt_ids[] = { 287 285 { .compatible = "maxim,max1117" }, 288 286 { .compatible = "maxim,max1118" }, ··· 289 291 }; 290 292 MODULE_DEVICE_TABLE(of, max1118_dt_ids); 291 293 292 - #endif 293 - 294 294 static struct spi_driver max1118_spi_driver = { 295 295 .driver = { 296 296 .name = "max1118", 297 - .of_match_table = of_match_ptr(max1118_dt_ids), 297 + .of_match_table = max1118_dt_ids, 298 298 }, 299 299 .probe = max1118_probe, 300 300 .remove = max1118_remove,
-1
drivers/iio/adc/max1241.c
··· 192 192 dev_dbg(dev, "no shutdown pin passed, low-power mode disabled"); 193 193 194 194 indio_dev->name = spi_get_device_id(spi)->name; 195 - indio_dev->dev.parent = dev; 196 195 indio_dev->info = &max1241_info; 197 196 indio_dev->modes = INDIO_DIRECT_MODE; 198 197 indio_dev->channels = max1241_channels;
+4 -11
drivers/iio/adc/max1363.c
··· 22 22 #include <linux/slab.h> 23 23 #include <linux/err.h> 24 24 #include <linux/module.h> 25 - #include <linux/of.h> 26 - #include <linux/of_device.h> 25 + #include <linux/mod_devicetable.h> 26 + #include <linux/property.h> 27 27 28 28 #include <linux/iio/iio.h> 29 29 #include <linux/iio/sysfs.h> ··· 1529 1529 return IRQ_HANDLED; 1530 1530 } 1531 1531 1532 - #ifdef CONFIG_OF 1533 - 1534 1532 #define MAX1363_COMPATIBLE(of_compatible, cfg) { \ 1535 1533 .compatible = of_compatible, \ 1536 1534 .data = &max1363_chip_info_tbl[cfg], \ ··· 1576 1578 { /* sentinel */ } 1577 1579 }; 1578 1580 MODULE_DEVICE_TABLE(of, max1363_of_match); 1579 - #endif 1580 1581 1581 1582 static int max1363_probe(struct i2c_client *client, 1582 1583 const struct i2c_device_id *id) ··· 1590 1593 if (!indio_dev) 1591 1594 return -ENOMEM; 1592 1595 1593 - indio_dev->dev.of_node = client->dev.of_node; 1594 1596 ret = iio_map_array_register(indio_dev, client->dev.platform_data); 1595 1597 if (ret < 0) 1596 1598 return ret; ··· 1610 1614 /* this is only used for device removal purposes */ 1611 1615 i2c_set_clientdata(client, indio_dev); 1612 1616 1613 - st->chip_info = of_device_get_match_data(&client->dev); 1617 + st->chip_info = device_get_match_data(&client->dev); 1614 1618 if (!st->chip_info) 1615 1619 st->chip_info = &max1363_chip_info_tbl[id->driver_data]; 1616 1620 st->client = client; ··· 1648 1652 if (ret) 1649 1653 goto error_disable_reg; 1650 1654 1651 - /* Establish that the iio_dev is a child of the i2c device */ 1652 - indio_dev->dev.parent = &client->dev; 1653 - indio_dev->dev.of_node = client->dev.of_node; 1654 1655 indio_dev->name = id->name; 1655 1656 indio_dev->channels = st->chip_info->channels; 1656 1657 indio_dev->num_channels = st->chip_info->num_channels; ··· 1753 1760 static struct i2c_driver max1363_driver = { 1754 1761 .driver = { 1755 1762 .name = "max1363", 1756 - .of_match_table = of_match_ptr(max1363_of_match), 1763 + .of_match_table = max1363_of_match, 1757 1764 }, 1758 1765 .probe = max1363_probe, 1759 1766 .remove = max1363_remove,
-2
drivers/iio/adc/max9611.c
··· 545 545 if (ret) 546 546 return ret; 547 547 548 - indio_dev->dev.parent = &client->dev; 549 - indio_dev->dev.of_node = client->dev.of_node; 550 548 indio_dev->name = of_id->data; 551 549 indio_dev->modes = INDIO_DIRECT_MODE; 552 550 indio_dev->info = &indio_info;
+6 -9
drivers/iio/adc/mcp320x.c
··· 27 27 * MCP3553 28 28 * 29 29 * Datasheet can be found here: 30 - * http://ww1.microchip.com/downloads/en/DeviceDoc/21293C.pdf mcp3001 31 - * http://ww1.microchip.com/downloads/en/DeviceDoc/21294E.pdf mcp3002 32 - * http://ww1.microchip.com/downloads/en/DeviceDoc/21295d.pdf mcp3004/08 30 + * https://ww1.microchip.com/downloads/en/DeviceDoc/21293C.pdf mcp3001 31 + * https://ww1.microchip.com/downloads/en/DeviceDoc/21294E.pdf mcp3002 32 + * https://ww1.microchip.com/downloads/en/DeviceDoc/21295d.pdf mcp3004/08 33 33 * http://ww1.microchip.com/downloads/en/DeviceDoc/21290D.pdf mcp3201 34 34 * http://ww1.microchip.com/downloads/en/DeviceDoc/21034D.pdf mcp3202 35 35 * http://ww1.microchip.com/downloads/en/DeviceDoc/21298c.pdf mcp3204/08 36 - * http://ww1.microchip.com/downloads/en/DeviceDoc/21700E.pdf mcp3301 36 + * https://ww1.microchip.com/downloads/en/DeviceDoc/21700E.pdf mcp3301 37 37 * http://ww1.microchip.com/downloads/en/DeviceDoc/21950D.pdf mcp3550/1/3 38 38 */ 39 39 ··· 41 41 #include <linux/delay.h> 42 42 #include <linux/spi/spi.h> 43 43 #include <linux/module.h> 44 + #include <linux/mod_devicetable.h> 44 45 #include <linux/iio/iio.h> 45 46 #include <linux/regulator/consumer.h> 46 47 ··· 385 384 adc = iio_priv(indio_dev); 386 385 adc->spi = spi; 387 386 388 - indio_dev->dev.parent = &spi->dev; 389 - indio_dev->dev.of_node = spi->dev.of_node; 390 387 indio_dev->name = spi_get_device_id(spi)->name; 391 388 indio_dev->modes = INDIO_DIRECT_MODE; 392 389 indio_dev->info = &mcp320x_info; ··· 470 471 return 0; 471 472 } 472 473 473 - #if defined(CONFIG_OF) 474 474 static const struct of_device_id mcp320x_dt_ids[] = { 475 475 /* NOTE: The use of compatibles with no vendor prefix is deprecated. */ 476 476 { .compatible = "mcp3001" }, ··· 497 499 { } 498 500 }; 499 501 MODULE_DEVICE_TABLE(of, mcp320x_dt_ids); 500 - #endif 501 502 502 503 static const struct spi_device_id mcp320x_id[] = { 503 504 { "mcp3001", mcp3001 }, ··· 519 522 static struct spi_driver mcp320x_driver = { 520 523 .driver = { 521 524 .name = "mcp320x", 522 - .of_match_table = of_match_ptr(mcp320x_dt_ids), 525 + .of_match_table = mcp320x_dt_ids, 523 526 }, 524 527 .probe = mcp320x_probe, 525 528 .remove = mcp320x_remove,
+4 -8
drivers/iio/adc/mcp3422.c
··· 6 6 * Author: Angelo Compagnucci <angelo.compagnucci@gmail.com> 7 7 * 8 8 * Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/22088b.pdf 9 - * http://ww1.microchip.com/downloads/en/DeviceDoc/22226a.pdf 10 - * http://ww1.microchip.com/downloads/en/DeviceDoc/22072b.pdf 9 + * https://ww1.microchip.com/downloads/en/DeviceDoc/22226a.pdf 10 + * https://ww1.microchip.com/downloads/en/DeviceDoc/22072b.pdf 11 11 * 12 12 * This driver exports the value of analog input voltage to sysfs, the 13 13 * voltage unit is nV. ··· 16 16 #include <linux/err.h> 17 17 #include <linux/i2c.h> 18 18 #include <linux/module.h> 19 + #include <linux/mod_devicetable.h> 19 20 #include <linux/delay.h> 20 21 #include <linux/sysfs.h> 21 - #include <linux/of.h> 22 22 #include <asm/unaligned.h> 23 23 24 24 #include <linux/iio/iio.h> ··· 347 347 348 348 mutex_init(&adc->lock); 349 349 350 - indio_dev->dev.parent = &client->dev; 351 - indio_dev->dev.of_node = client->dev.of_node; 352 350 indio_dev->name = dev_name(&client->dev); 353 351 indio_dev->modes = INDIO_DIRECT_MODE; 354 352 indio_dev->info = &mcp3422_info; ··· 402 404 }; 403 405 MODULE_DEVICE_TABLE(i2c, mcp3422_id); 404 406 405 - #ifdef CONFIG_OF 406 407 static const struct of_device_id mcp3422_of_match[] = { 407 408 { .compatible = "mcp3422" }, 408 409 { } 409 410 }; 410 411 MODULE_DEVICE_TABLE(of, mcp3422_of_match); 411 - #endif 412 412 413 413 static struct i2c_driver mcp3422_driver = { 414 414 .driver = { 415 415 .name = "mcp3422", 416 - .of_match_table = of_match_ptr(mcp3422_of_match), 416 + .of_match_table = mcp3422_of_match, 417 417 }, 418 418 .probe = mcp3422_probe, 419 419 .id_table = mcp3422_id,
-2
drivers/iio/adc/mcp3911.c
··· 293 293 if (ret) 294 294 goto clk_disable; 295 295 296 - indio_dev->dev.parent = &spi->dev; 297 - indio_dev->dev.of_node = spi->dev.of_node; 298 296 indio_dev->name = spi_get_device_id(spi)->name; 299 297 indio_dev->modes = INDIO_DIRECT_MODE; 300 298 indio_dev->info = &mcp3911_info;
-1
drivers/iio/adc/men_z188_adc.c
··· 110 110 111 111 adc = iio_priv(indio_dev); 112 112 indio_dev->name = "z188-adc"; 113 - indio_dev->dev.parent = &dev->dev; 114 113 indio_dev->info = &z188_adc_info; 115 114 indio_dev->modes = INDIO_DIRECT_MODE; 116 115 indio_dev->channels = z188_adc_iio_channels;
-2
drivers/iio/adc/meson_saradc.c
··· 1208 1208 priv->param = match_data->param; 1209 1209 1210 1210 indio_dev->name = match_data->name; 1211 - indio_dev->dev.parent = &pdev->dev; 1212 - indio_dev->dev.of_node = pdev->dev.of_node; 1213 1211 indio_dev->modes = INDIO_DIRECT_MODE; 1214 1212 indio_dev->info = &meson_sar_adc_iio_info; 1215 1213
-1
drivers/iio/adc/mt6577_auxadc.c
··· 245 245 return -ENOMEM; 246 246 247 247 adc_dev = iio_priv(indio_dev); 248 - indio_dev->dev.parent = &pdev->dev; 249 248 indio_dev->name = dev_name(&pdev->dev); 250 249 indio_dev->info = &mt6577_auxadc_info; 251 250 indio_dev->modes = INDIO_DIRECT_MODE;
-3
drivers/iio/adc/mxs-lradc-adc.c
··· 568 568 569 569 static const struct iio_buffer_setup_ops mxs_lradc_adc_buffer_ops = { 570 570 .preenable = &mxs_lradc_adc_buffer_preenable, 571 - .postenable = &iio_triggered_buffer_postenable, 572 - .predisable = &iio_triggered_buffer_predisable, 573 571 .postdisable = &mxs_lradc_adc_buffer_postdisable, 574 572 .validate_scan_mask = &mxs_lradc_adc_validate_scan_mask, 575 573 }; ··· 720 722 platform_set_drvdata(pdev, iio); 721 723 722 724 iio->name = pdev->name; 723 - iio->dev.parent = dev; 724 725 iio->dev.of_node = dev->parent->of_node; 725 726 iio->info = &mxs_lradc_adc_iio_info; 726 727 iio->modes = INDIO_DIRECT_MODE;
-2
drivers/iio/adc/nau7802.c
··· 430 430 431 431 i2c_set_clientdata(client, indio_dev); 432 432 433 - indio_dev->dev.parent = &client->dev; 434 - indio_dev->dev.of_node = client->dev.of_node; 435 433 indio_dev->name = dev_name(&client->dev); 436 434 indio_dev->modes = INDIO_DIRECT_MODE; 437 435 indio_dev->info = &nau7802_info;
-1
drivers/iio/adc/npcm_adc.c
··· 261 261 262 262 platform_set_drvdata(pdev, indio_dev); 263 263 indio_dev->name = dev_name(&pdev->dev); 264 - indio_dev->dev.parent = &pdev->dev; 265 264 indio_dev->info = &npcm_adc_iio_info; 266 265 indio_dev->modes = INDIO_DIRECT_MODE; 267 266 indio_dev->channels = npcm_adc_iio_channels;
-1
drivers/iio/adc/palmas_gpadc.c
··· 593 593 adc->extended_delay = gpadc_pdata->extended_delay; 594 594 595 595 indio_dev->name = MOD_NAME; 596 - indio_dev->dev.parent = &pdev->dev; 597 596 indio_dev->info = &palmas_gpadc_iio_info; 598 597 indio_dev->modes = INDIO_DIRECT_MODE; 599 598 indio_dev->channels = palmas_gpadc_iio_channel;
-2
drivers/iio/adc/qcom-pm8xxx-xoadc.c
··· 933 933 goto out_disable_vref; 934 934 } 935 935 936 - indio_dev->dev.parent = dev; 937 - indio_dev->dev.of_node = np; 938 936 indio_dev->name = variant->name; 939 937 indio_dev->modes = INDIO_DIRECT_MODE; 940 938 indio_dev->info = &pm8xxx_xoadc_info;
+220 -24
drivers/iio/adc/qcom-spmi-adc5.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 2 /* 3 - * Copyright (c) 2018, The Linux Foundation. All rights reserved. 3 + * Copyright (c) 2018, 2020, The Linux Foundation. All rights reserved. 4 4 */ 5 5 6 6 #include <linux/bitops.h> ··· 23 23 24 24 #define ADC5_USR_REVISION1 0x0 25 25 #define ADC5_USR_STATUS1 0x8 26 + #define ADC5_USR_STATUS1_CONV_FAULT BIT(7) 26 27 #define ADC5_USR_STATUS1_REQ_STS BIT(1) 27 28 #define ADC5_USR_STATUS1_EOC BIT(0) 28 29 #define ADC5_USR_STATUS1_REQ_STS_EOC_MASK 0x3 ··· 66 65 67 66 #define ADC5_USR_IBAT_DATA1 0x53 68 67 68 + #define ADC_CHANNEL_OFFSET 0x8 69 + #define ADC_CHANNEL_MASK GENMASK(7, 0) 70 + 69 71 /* 70 72 * Conversion time varies based on the decimation, clock rate, fast average 71 73 * samples and measurements queued across different VADC peripherals. ··· 82 78 /* Digital version >= 5.3 supports hw_settle_2 */ 83 79 #define ADC5_HW_SETTLE_DIFF_MINOR 3 84 80 #define ADC5_HW_SETTLE_DIFF_MAJOR 5 81 + 82 + /* For PMIC7 */ 83 + #define ADC_APP_SID 0x40 84 + #define ADC_APP_SID_MASK GENMASK(3, 0) 85 + #define ADC7_CONV_TIMEOUT msecs_to_jiffies(10) 85 86 86 87 enum adc5_cal_method { 87 88 ADC5_NO_CAL = 0, ··· 105 96 * @cal_method: calibration method. 106 97 * @cal_val: calibration value 107 98 * @decimation: sampling rate supported for the channel. 99 + * @sid: slave id of PMIC owning the channel, for PMIC7. 108 100 * @prescale: channel scaling performed on the input signal. 109 101 * @hw_settle_time: the time between AMUX being configured and the 110 102 * start of conversion. ··· 120 110 enum adc5_cal_method cal_method; 121 111 enum adc5_cal_val cal_val; 122 112 unsigned int decimation; 113 + unsigned int sid; 123 114 unsigned int prescale; 124 115 unsigned int hw_settle_time; 125 116 unsigned int avg_samples; ··· 174 163 static int adc5_write(struct adc5_chip *adc, u16 offset, u8 *data, int len) 175 164 { 176 165 return regmap_bulk_write(adc->regmap, adc->base + offset, data, len); 166 + } 167 + 168 + static int adc5_masked_write(struct adc5_chip *adc, u16 offset, u8 mask, u8 val) 169 + { 170 + return regmap_update_bits(adc->regmap, adc->base + offset, mask, val); 177 171 } 178 172 179 173 static int adc5_prescaling_from_dt(u32 num, u32 den) ··· 246 230 *data = (rslt_msb << 8) | rslt_lsb; 247 231 248 232 if (*data == ADC5_USR_DATA_CHECK) { 249 - pr_err("Invalid data:0x%x\n", *data); 233 + dev_err(adc->dev, "Invalid data:0x%x\n", *data); 250 234 return -EINVAL; 251 235 } 252 236 253 - pr_debug("voltage raw code:0x%x\n", *data); 237 + dev_dbg(adc->dev, "voltage raw code:0x%x\n", *data); 254 238 255 239 return 0; 256 240 } ··· 301 285 302 286 /* Read registers 0x42 through 0x46 */ 303 287 ret = adc5_read(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf)); 304 - if (ret < 0) 288 + if (ret) 305 289 return ret; 306 290 307 291 /* Digital param selection */ ··· 330 314 return adc5_write(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf)); 331 315 } 332 316 317 + static int adc7_configure(struct adc5_chip *adc, 318 + struct adc5_channel_prop *prop) 319 + { 320 + int ret; 321 + u8 conv_req = 0, buf[4]; 322 + 323 + ret = adc5_masked_write(adc, ADC_APP_SID, ADC_APP_SID_MASK, prop->sid); 324 + if (ret) 325 + return ret; 326 + 327 + ret = adc5_read(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf)); 328 + if (ret) 329 + return ret; 330 + 331 + /* Digital param selection */ 332 + adc5_update_dig_param(adc, prop, &buf[0]); 333 + 334 + /* Update fast average sample value */ 335 + buf[1] &= ~ADC5_USR_FAST_AVG_CTL_SAMPLES_MASK; 336 + buf[1] |= prop->avg_samples; 337 + 338 + /* Select ADC channel */ 339 + buf[2] = prop->channel; 340 + 341 + /* Select HW settle delay for channel */ 342 + buf[3] &= ~ADC5_USR_HW_SETTLE_DELAY_MASK; 343 + buf[3] |= prop->hw_settle_time; 344 + 345 + /* Select CONV request */ 346 + conv_req = ADC5_USR_CONV_REQ_REQ; 347 + 348 + if (!adc->poll_eoc) 349 + reinit_completion(&adc->complete); 350 + 351 + ret = adc5_write(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf)); 352 + if (ret) 353 + return ret; 354 + 355 + return adc5_write(adc, ADC5_USR_CONV_REQ, &conv_req, 1); 356 + } 357 + 333 358 static int adc5_do_conversion(struct adc5_chip *adc, 334 359 struct adc5_channel_prop *prop, 335 360 struct iio_chan_spec const *chan, ··· 382 325 383 326 ret = adc5_configure(adc, prop); 384 327 if (ret) { 385 - pr_err("ADC configure failed with %d\n", ret); 328 + dev_err(adc->dev, "ADC configure failed with %d\n", ret); 386 329 goto unlock; 387 330 } 388 331 389 332 if (adc->poll_eoc) { 390 333 ret = adc5_poll_wait_eoc(adc); 391 - if (ret < 0) { 392 - pr_err("EOC bit not set\n"); 334 + if (ret) { 335 + dev_err(adc->dev, "EOC bit not set\n"); 393 336 goto unlock; 394 337 } 395 338 } else { 396 339 ret = wait_for_completion_timeout(&adc->complete, 397 340 ADC5_CONV_TIMEOUT); 398 341 if (!ret) { 399 - pr_debug("Did not get completion timeout.\n"); 342 + dev_dbg(adc->dev, "Did not get completion timeout.\n"); 400 343 ret = adc5_poll_wait_eoc(adc); 401 - if (ret < 0) { 402 - pr_err("EOC bit not set\n"); 344 + if (ret) { 345 + dev_err(adc->dev, "EOC bit not set\n"); 403 346 goto unlock; 404 347 } 405 348 } ··· 411 354 412 355 return ret; 413 356 } 357 + 358 + static int adc7_do_conversion(struct adc5_chip *adc, 359 + struct adc5_channel_prop *prop, 360 + struct iio_chan_spec const *chan, 361 + u16 *data_volt, u16 *data_cur) 362 + { 363 + int ret; 364 + u8 status; 365 + 366 + mutex_lock(&adc->lock); 367 + 368 + ret = adc7_configure(adc, prop); 369 + if (ret) { 370 + dev_err(adc->dev, "ADC configure failed with %d\n", ret); 371 + goto unlock; 372 + } 373 + 374 + /* No support for polling mode at present */ 375 + wait_for_completion_timeout(&adc->complete, ADC7_CONV_TIMEOUT); 376 + 377 + ret = adc5_read(adc, ADC5_USR_STATUS1, &status, 1); 378 + if (ret) 379 + goto unlock; 380 + 381 + if (status & ADC5_USR_STATUS1_CONV_FAULT) { 382 + dev_err(adc->dev, "Unexpected conversion fault\n"); 383 + ret = -EIO; 384 + goto unlock; 385 + } 386 + 387 + ret = adc5_read_voltage_data(adc, data_volt); 388 + 389 + unlock: 390 + mutex_unlock(&adc->lock); 391 + 392 + return ret; 393 + } 394 + 395 + typedef int (*adc_do_conversion)(struct adc5_chip *adc, 396 + struct adc5_channel_prop *prop, 397 + struct iio_chan_spec const *chan, 398 + u16 *data_volt, u16 *data_cur); 414 399 415 400 static irqreturn_t adc5_isr(int irq, void *dev_id) 416 401 { ··· 476 377 return -EINVAL; 477 378 } 478 379 479 - static int adc5_read_raw(struct iio_dev *indio_dev, 380 + static int adc7_of_xlate(struct iio_dev *indio_dev, 381 + const struct of_phandle_args *iiospec) 382 + { 383 + struct adc5_chip *adc = iio_priv(indio_dev); 384 + int i, v_channel; 385 + 386 + for (i = 0; i < adc->nchannels; i++) { 387 + v_channel = (adc->chan_props[i].sid << ADC_CHANNEL_OFFSET) | 388 + adc->chan_props[i].channel; 389 + if (v_channel == iiospec->args[0]) 390 + return i; 391 + } 392 + 393 + return -EINVAL; 394 + } 395 + 396 + static int adc_read_raw_common(struct iio_dev *indio_dev, 480 397 struct iio_chan_spec const *chan, int *val, int *val2, 481 - long mask) 398 + long mask, adc_do_conversion do_conv) 482 399 { 483 400 struct adc5_chip *adc = iio_priv(indio_dev); 484 401 struct adc5_channel_prop *prop; ··· 505 390 506 391 switch (mask) { 507 392 case IIO_CHAN_INFO_PROCESSED: 508 - ret = adc5_do_conversion(adc, prop, chan, 509 - &adc_code_volt, &adc_code_cur); 393 + ret = do_conv(adc, prop, chan, 394 + &adc_code_volt, &adc_code_cur); 510 395 if (ret) 511 396 return ret; 512 397 ··· 521 406 default: 522 407 return -EINVAL; 523 408 } 409 + } 524 410 525 - return 0; 411 + static int adc5_read_raw(struct iio_dev *indio_dev, 412 + struct iio_chan_spec const *chan, int *val, int *val2, 413 + long mask) 414 + { 415 + return adc_read_raw_common(indio_dev, chan, val, val2, 416 + mask, adc5_do_conversion); 417 + } 418 + 419 + static int adc7_read_raw(struct iio_dev *indio_dev, 420 + struct iio_chan_spec const *chan, int *val, int *val2, 421 + long mask) 422 + { 423 + return adc_read_raw_common(indio_dev, chan, val, val2, 424 + mask, adc7_do_conversion); 526 425 } 527 426 528 427 static const struct iio_info adc5_info = { 529 428 .read_raw = adc5_read_raw, 530 429 .of_xlate = adc5_of_xlate, 430 + }; 431 + 432 + static const struct iio_info adc7_info = { 433 + .read_raw = adc7_read_raw, 434 + .of_xlate = adc7_of_xlate, 531 435 }; 532 436 533 437 struct adc5_channels { ··· 611 477 SCALE_HW_CALIB_PM5_SMB_TEMP) 612 478 }; 613 479 480 + static const struct adc5_channels adc7_chans_pmic[ADC5_MAX_CHANNEL] = { 481 + [ADC7_REF_GND] = ADC5_CHAN_VOLT("ref_gnd", 0, 482 + SCALE_HW_CALIB_DEFAULT) 483 + [ADC7_1P25VREF] = ADC5_CHAN_VOLT("vref_1p25", 0, 484 + SCALE_HW_CALIB_DEFAULT) 485 + [ADC7_VPH_PWR] = ADC5_CHAN_VOLT("vph_pwr", 1, 486 + SCALE_HW_CALIB_DEFAULT) 487 + [ADC7_VBAT_SNS] = ADC5_CHAN_VOLT("vbat_sns", 3, 488 + SCALE_HW_CALIB_DEFAULT) 489 + [ADC7_DIE_TEMP] = ADC5_CHAN_TEMP("die_temp", 0, 490 + SCALE_HW_CALIB_PMIC_THERM_PM7) 491 + [ADC7_AMUX_THM1_100K_PU] = ADC5_CHAN_TEMP("amux_thm1_pu2", 0, 492 + SCALE_HW_CALIB_THERM_100K_PU_PM7) 493 + [ADC7_AMUX_THM2_100K_PU] = ADC5_CHAN_TEMP("amux_thm2_pu2", 0, 494 + SCALE_HW_CALIB_THERM_100K_PU_PM7) 495 + [ADC7_AMUX_THM3_100K_PU] = ADC5_CHAN_TEMP("amux_thm3_pu2", 0, 496 + SCALE_HW_CALIB_THERM_100K_PU_PM7) 497 + [ADC7_AMUX_THM4_100K_PU] = ADC5_CHAN_TEMP("amux_thm4_pu2", 0, 498 + SCALE_HW_CALIB_THERM_100K_PU_PM7) 499 + [ADC7_AMUX_THM5_100K_PU] = ADC5_CHAN_TEMP("amux_thm5_pu2", 0, 500 + SCALE_HW_CALIB_THERM_100K_PU_PM7) 501 + [ADC7_AMUX_THM6_100K_PU] = ADC5_CHAN_TEMP("amux_thm6_pu2", 0, 502 + SCALE_HW_CALIB_THERM_100K_PU_PM7) 503 + [ADC7_GPIO1_100K_PU] = ADC5_CHAN_TEMP("gpio1_pu2", 0, 504 + SCALE_HW_CALIB_THERM_100K_PU_PM7) 505 + [ADC7_GPIO2_100K_PU] = ADC5_CHAN_TEMP("gpio2_pu2", 0, 506 + SCALE_HW_CALIB_THERM_100K_PU_PM7) 507 + [ADC7_GPIO3_100K_PU] = ADC5_CHAN_TEMP("gpio3_pu2", 0, 508 + SCALE_HW_CALIB_THERM_100K_PU_PM7) 509 + [ADC7_GPIO4_100K_PU] = ADC5_CHAN_TEMP("gpio4_pu2", 0, 510 + SCALE_HW_CALIB_THERM_100K_PU_PM7) 511 + }; 512 + 614 513 static const struct adc5_channels adc5_chans_rev2[ADC5_MAX_CHANNEL] = { 615 514 [ADC5_REF_GND] = ADC5_CHAN_VOLT("ref_gnd", 0, 616 515 SCALE_HW_CALIB_DEFAULT) ··· 678 511 { 679 512 const char *name = node->name, *channel_name; 680 513 u32 chan, value, varr[2]; 514 + u32 sid = 0; 681 515 int ret; 682 516 struct device *dev = adc->dev; 683 517 ··· 686 518 if (ret) { 687 519 dev_err(dev, "invalid channel number %s\n", name); 688 520 return ret; 521 + } 522 + 523 + /* Value read from "reg" is virtual channel number */ 524 + 525 + /* virtual channel number = sid << 8 | channel number */ 526 + 527 + if (adc->data->info == &adc7_info) { 528 + sid = chan >> ADC_CHANNEL_OFFSET; 529 + chan = chan & ADC_CHANNEL_MASK; 689 530 } 690 531 691 532 if (chan > ADC5_PARALLEL_ISENSE_VBAT_IDATA || ··· 705 528 706 529 /* the channel has DT description */ 707 530 prop->channel = chan; 531 + prop->sid = sid; 708 532 709 533 channel_name = of_get_property(node, 710 534 "label", NULL) ? : node->name; 711 535 if (!channel_name) { 712 - pr_err("Invalid channel name\n"); 536 + dev_err(dev, "Invalid channel name\n"); 713 537 return -EINVAL; 714 538 } 715 539 prop->datasheet_name = channel_name; ··· 748 570 749 571 ret = adc5_read(adc, ADC5_USR_REVISION1, dig_version, 750 572 sizeof(dig_version)); 751 - if (ret < 0) { 573 + if (ret) { 752 574 dev_err(dev, "Invalid dig version read %d\n", ret); 753 575 return ret; 754 576 } 755 577 756 - pr_debug("dig_ver:minor:%d, major:%d\n", dig_version[0], 578 + dev_dbg(dev, "dig_ver:minor:%d, major:%d\n", dig_version[0], 757 579 dig_version[1]); 758 580 /* Digital controller >= 5.3 have hw_settle_2 option */ 759 - if (dig_version[0] >= ADC5_HW_SETTLE_DIFF_MINOR && 760 - dig_version[1] >= ADC5_HW_SETTLE_DIFF_MAJOR) 581 + if ((dig_version[0] >= ADC5_HW_SETTLE_DIFF_MINOR && 582 + dig_version[1] >= ADC5_HW_SETTLE_DIFF_MAJOR) || 583 + adc->data->info == &adc7_info) 761 584 ret = adc5_hw_settle_time_from_dt(value, 762 585 data->hw_settle_2); 763 586 else ··· 808 629 .full_scale_code_volt = 0x70e4, 809 630 .full_scale_code_cur = 0x2710, 810 631 .adc_chans = adc5_chans_pmic, 632 + .info = &adc5_info, 811 633 .decimation = (unsigned int [ADC5_DECIMATION_SAMPLES_MAX]) 812 634 {250, 420, 840}, 813 635 .hw_settle_1 = (unsigned int [VADC_HW_SETTLE_SAMPLES_MAX]) ··· 819 639 1, 2, 4, 8, 16, 32, 64, 128}, 820 640 }; 821 641 642 + static const struct adc5_data adc7_data_pmic = { 643 + .full_scale_code_volt = 0x70e4, 644 + .adc_chans = adc7_chans_pmic, 645 + .info = &adc7_info, 646 + .decimation = (unsigned int [ADC5_DECIMATION_SAMPLES_MAX]) 647 + {85, 340, 1360}, 648 + .hw_settle_2 = (unsigned int [VADC_HW_SETTLE_SAMPLES_MAX]) 649 + {15, 100, 200, 300, 400, 500, 600, 700, 650 + 1000, 2000, 4000, 8000, 16000, 32000, 651 + 64000, 128000}, 652 + }; 653 + 822 654 static const struct adc5_data adc5_data_pmic_rev2 = { 823 655 .full_scale_code_volt = 0x4000, 824 656 .full_scale_code_cur = 0x1800, 825 657 .adc_chans = adc5_chans_rev2, 658 + .info = &adc5_info, 826 659 .decimation = (unsigned int [ADC5_DECIMATION_SAMPLES_MAX]) 827 660 {256, 512, 1024}, 828 661 .hw_settle_1 = (unsigned int [VADC_HW_SETTLE_SAMPLES_MAX]) ··· 850 657 { 851 658 .compatible = "qcom,spmi-adc5", 852 659 .data = &adc5_data_pmic, 660 + }, 661 + { 662 + .compatible = "qcom,spmi-adc7", 663 + .data = &adc7_data_pmic, 853 664 }, 854 665 { 855 666 .compatible = "qcom,spmi-adc-rev2", ··· 949 752 adc->regmap = regmap; 950 753 adc->dev = dev; 951 754 adc->base = reg; 755 + 952 756 init_completion(&adc->complete); 953 757 mutex_init(&adc->lock); 954 758 955 759 ret = adc5_get_dt_data(adc, node); 956 760 if (ret) { 957 - pr_err("adc get dt data failed\n"); 761 + dev_err(dev, "adc get dt data failed\n"); 958 762 return ret; 959 763 } 960 764 ··· 971 773 return ret; 972 774 } 973 775 974 - indio_dev->dev.parent = dev; 975 - indio_dev->dev.of_node = node; 976 776 indio_dev->name = pdev->name; 977 777 indio_dev->modes = INDIO_DIRECT_MODE; 978 - indio_dev->info = &adc5_info; 778 + indio_dev->info = adc->data->info; 979 779 indio_dev->channels = adc->iio_chans; 980 780 indio_dev->num_channels = adc->nchannels; 981 781
-2
drivers/iio/adc/qcom-spmi-iadc.c
··· 553 553 return ret; 554 554 } 555 555 556 - indio_dev->dev.parent = dev; 557 - indio_dev->dev.of_node = node; 558 556 indio_dev->name = pdev->name; 559 557 indio_dev->modes = INDIO_DIRECT_MODE; 560 558 indio_dev->info = &iadc_info;
-2
drivers/iio/adc/qcom-spmi-vadc.c
··· 907 907 if (ret) 908 908 return ret; 909 909 910 - indio_dev->dev.parent = dev; 911 - indio_dev->dev.of_node = node; 912 910 indio_dev->name = pdev->name; 913 911 indio_dev->modes = INDIO_DIRECT_MODE; 914 912 indio_dev->info = &vadc_info;
+262
drivers/iio/adc/qcom-vadc-common.c
··· 89 89 { 46, 125000 }, 90 90 }; 91 91 92 + static const struct vadc_map_pt adcmap7_die_temp[] = { 93 + { 433700, 1967}, 94 + { 473100, 1964}, 95 + { 512400, 1957}, 96 + { 551500, 1949}, 97 + { 590500, 1940}, 98 + { 629300, 1930}, 99 + { 667900, 1921}, 100 + { 706400, 1910}, 101 + { 744600, 1896}, 102 + { 782500, 1878}, 103 + { 820100, 1859}, 104 + { 857300, 0}, 105 + }; 106 + 107 + /* 108 + * Resistance to temperature table for 100k pull up for NTCG104EF104. 109 + */ 110 + static const struct vadc_map_pt adcmap7_100k[] = { 111 + { 4250657, -40960 }, 112 + { 3962085, -39936 }, 113 + { 3694875, -38912 }, 114 + { 3447322, -37888 }, 115 + { 3217867, -36864 }, 116 + { 3005082, -35840 }, 117 + { 2807660, -34816 }, 118 + { 2624405, -33792 }, 119 + { 2454218, -32768 }, 120 + { 2296094, -31744 }, 121 + { 2149108, -30720 }, 122 + { 2012414, -29696 }, 123 + { 1885232, -28672 }, 124 + { 1766846, -27648 }, 125 + { 1656598, -26624 }, 126 + { 1553884, -25600 }, 127 + { 1458147, -24576 }, 128 + { 1368873, -23552 }, 129 + { 1285590, -22528 }, 130 + { 1207863, -21504 }, 131 + { 1135290, -20480 }, 132 + { 1067501, -19456 }, 133 + { 1004155, -18432 }, 134 + { 944935, -17408 }, 135 + { 889550, -16384 }, 136 + { 837731, -15360 }, 137 + { 789229, -14336 }, 138 + { 743813, -13312 }, 139 + { 701271, -12288 }, 140 + { 661405, -11264 }, 141 + { 624032, -10240 }, 142 + { 588982, -9216 }, 143 + { 556100, -8192 }, 144 + { 525239, -7168 }, 145 + { 496264, -6144 }, 146 + { 469050, -5120 }, 147 + { 443480, -4096 }, 148 + { 419448, -3072 }, 149 + { 396851, -2048 }, 150 + { 375597, -1024 }, 151 + { 355598, 0 }, 152 + { 336775, 1024 }, 153 + { 319052, 2048 }, 154 + { 302359, 3072 }, 155 + { 286630, 4096 }, 156 + { 271806, 5120 }, 157 + { 257829, 6144 }, 158 + { 244646, 7168 }, 159 + { 232209, 8192 }, 160 + { 220471, 9216 }, 161 + { 209390, 10240 }, 162 + { 198926, 11264 }, 163 + { 189040, 12288 }, 164 + { 179698, 13312 }, 165 + { 170868, 14336 }, 166 + { 162519, 15360 }, 167 + { 154622, 16384 }, 168 + { 147150, 17408 }, 169 + { 140079, 18432 }, 170 + { 133385, 19456 }, 171 + { 127046, 20480 }, 172 + { 121042, 21504 }, 173 + { 115352, 22528 }, 174 + { 109960, 23552 }, 175 + { 104848, 24576 }, 176 + { 100000, 25600 }, 177 + { 95402, 26624 }, 178 + { 91038, 27648 }, 179 + { 86897, 28672 }, 180 + { 82965, 29696 }, 181 + { 79232, 30720 }, 182 + { 75686, 31744 }, 183 + { 72316, 32768 }, 184 + { 69114, 33792 }, 185 + { 66070, 34816 }, 186 + { 63176, 35840 }, 187 + { 60423, 36864 }, 188 + { 57804, 37888 }, 189 + { 55312, 38912 }, 190 + { 52940, 39936 }, 191 + { 50681, 40960 }, 192 + { 48531, 41984 }, 193 + { 46482, 43008 }, 194 + { 44530, 44032 }, 195 + { 42670, 45056 }, 196 + { 40897, 46080 }, 197 + { 39207, 47104 }, 198 + { 37595, 48128 }, 199 + { 36057, 49152 }, 200 + { 34590, 50176 }, 201 + { 33190, 51200 }, 202 + { 31853, 52224 }, 203 + { 30577, 53248 }, 204 + { 29358, 54272 }, 205 + { 28194, 55296 }, 206 + { 27082, 56320 }, 207 + { 26020, 57344 }, 208 + { 25004, 58368 }, 209 + { 24033, 59392 }, 210 + { 23104, 60416 }, 211 + { 22216, 61440 }, 212 + { 21367, 62464 }, 213 + { 20554, 63488 }, 214 + { 19776, 64512 }, 215 + { 19031, 65536 }, 216 + { 18318, 66560 }, 217 + { 17636, 67584 }, 218 + { 16982, 68608 }, 219 + { 16355, 69632 }, 220 + { 15755, 70656 }, 221 + { 15180, 71680 }, 222 + { 14628, 72704 }, 223 + { 14099, 73728 }, 224 + { 13592, 74752 }, 225 + { 13106, 75776 }, 226 + { 12640, 76800 }, 227 + { 12192, 77824 }, 228 + { 11762, 78848 }, 229 + { 11350, 79872 }, 230 + { 10954, 80896 }, 231 + { 10574, 81920 }, 232 + { 10209, 82944 }, 233 + { 9858, 83968 }, 234 + { 9521, 84992 }, 235 + { 9197, 86016 }, 236 + { 8886, 87040 }, 237 + { 8587, 88064 }, 238 + { 8299, 89088 }, 239 + { 8023, 90112 }, 240 + { 7757, 91136 }, 241 + { 7501, 92160 }, 242 + { 7254, 93184 }, 243 + { 7017, 94208 }, 244 + { 6789, 95232 }, 245 + { 6570, 96256 }, 246 + { 6358, 97280 }, 247 + { 6155, 98304 }, 248 + { 5959, 99328 }, 249 + { 5770, 100352 }, 250 + { 5588, 101376 }, 251 + { 5412, 102400 }, 252 + { 5243, 103424 }, 253 + { 5080, 104448 }, 254 + { 4923, 105472 }, 255 + { 4771, 106496 }, 256 + { 4625, 107520 }, 257 + { 4484, 108544 }, 258 + { 4348, 109568 }, 259 + { 4217, 110592 }, 260 + { 4090, 111616 }, 261 + { 3968, 112640 }, 262 + { 3850, 113664 }, 263 + { 3736, 114688 }, 264 + { 3626, 115712 }, 265 + { 3519, 116736 }, 266 + { 3417, 117760 }, 267 + { 3317, 118784 }, 268 + { 3221, 119808 }, 269 + { 3129, 120832 }, 270 + { 3039, 121856 }, 271 + { 2952, 122880 }, 272 + { 2868, 123904 }, 273 + { 2787, 124928 }, 274 + { 2709, 125952 }, 275 + { 2633, 126976 }, 276 + { 2560, 128000 }, 277 + { 2489, 129024 }, 278 + { 2420, 130048 } 279 + }; 280 + 92 281 static int qcom_vadc_scale_hw_calib_volt( 93 282 const struct vadc_prescale_ratio *prescale, 94 283 const struct adc5_data *data, 95 284 u16 adc_code, int *result_uv); 96 285 static int qcom_vadc_scale_hw_calib_therm( 286 + const struct vadc_prescale_ratio *prescale, 287 + const struct adc5_data *data, 288 + u16 adc_code, int *result_mdec); 289 + static int qcom_vadc7_scale_hw_calib_therm( 97 290 const struct vadc_prescale_ratio *prescale, 98 291 const struct adc5_data *data, 99 292 u16 adc_code, int *result_mdec); ··· 302 109 const struct vadc_prescale_ratio *prescale, 303 110 const struct adc5_data *data, 304 111 u16 adc_code, int *result_mdec); 112 + static int qcom_vadc7_scale_hw_calib_die_temp( 113 + const struct vadc_prescale_ratio *prescale, 114 + const struct adc5_data *data, 115 + u16 adc_code, int *result_mdec); 305 116 306 117 static struct qcom_adc5_scale_type scale_adc5_fn[] = { 307 118 [SCALE_HW_CALIB_DEFAULT] = {qcom_vadc_scale_hw_calib_volt}, 308 119 [SCALE_HW_CALIB_THERM_100K_PULLUP] = {qcom_vadc_scale_hw_calib_therm}, 309 120 [SCALE_HW_CALIB_XOTHERM] = {qcom_vadc_scale_hw_calib_therm}, 121 + [SCALE_HW_CALIB_THERM_100K_PU_PM7] = { 122 + qcom_vadc7_scale_hw_calib_therm}, 310 123 [SCALE_HW_CALIB_PMIC_THERM] = {qcom_vadc_scale_hw_calib_die_temp}, 124 + [SCALE_HW_CALIB_PMIC_THERM_PM7] = { 125 + qcom_vadc7_scale_hw_calib_die_temp}, 311 126 [SCALE_HW_CALIB_PM5_CHG_TEMP] = {qcom_vadc_scale_hw_chg5_temp}, 312 127 [SCALE_HW_CALIB_PM5_SMB_TEMP] = {qcom_vadc_scale_hw_smb_temp}, 313 128 }; ··· 492 291 return (int) voltage; 493 292 } 494 293 294 + static int qcom_vadc7_scale_hw_calib_therm( 295 + const struct vadc_prescale_ratio *prescale, 296 + const struct adc5_data *data, 297 + u16 adc_code, int *result_mdec) 298 + { 299 + s64 resistance = adc_code; 300 + int ret, result; 301 + 302 + if (adc_code >= RATIO_MAX_ADC7) 303 + return -EINVAL; 304 + 305 + /* (ADC code * R_PULLUP (100Kohm)) / (full_scale_code - ADC code)*/ 306 + resistance *= R_PU_100K; 307 + resistance = div64_s64(resistance, RATIO_MAX_ADC7 - adc_code); 308 + 309 + ret = qcom_vadc_map_voltage_temp(adcmap7_100k, 310 + ARRAY_SIZE(adcmap7_100k), 311 + resistance, &result); 312 + if (ret) 313 + return ret; 314 + 315 + *result_mdec = result; 316 + 317 + return 0; 318 + } 319 + 495 320 static int qcom_vadc_scale_hw_calib_volt( 496 321 const struct vadc_prescale_ratio *prescale, 497 322 const struct adc5_data *data, ··· 553 326 *result_mdec = qcom_vadc_scale_code_voltage_factor(adc_code, 554 327 prescale, data, 2); 555 328 *result_mdec = milli_kelvin_to_millicelsius(*result_mdec); 329 + 330 + return 0; 331 + } 332 + 333 + static int qcom_vadc7_scale_hw_calib_die_temp( 334 + const struct vadc_prescale_ratio *prescale, 335 + const struct adc5_data *data, 336 + u16 adc_code, int *result_mdec) 337 + { 338 + 339 + int voltage, vtemp0, temp, i; 340 + 341 + voltage = qcom_vadc_scale_code_voltage_factor(adc_code, 342 + prescale, data, 1); 343 + 344 + if (adcmap7_die_temp[0].x > voltage) { 345 + *result_mdec = DIE_TEMP_ADC7_SCALE_1; 346 + return 0; 347 + } 348 + 349 + if (adcmap7_die_temp[ARRAY_SIZE(adcmap7_die_temp) - 1].x <= voltage) { 350 + *result_mdec = DIE_TEMP_ADC7_MAX; 351 + return 0; 352 + } 353 + 354 + for (i = 0; i < ARRAY_SIZE(adcmap7_die_temp); i++) 355 + if (adcmap7_die_temp[i].x > voltage) 356 + break; 357 + 358 + vtemp0 = adcmap7_die_temp[i - 1].x; 359 + voltage = voltage - vtemp0; 360 + temp = div64_s64(voltage * DIE_TEMP_ADC7_SCALE_FACTOR, 361 + adcmap7_die_temp[i - 1].y); 362 + temp += DIE_TEMP_ADC7_SCALE_1 + (DIE_TEMP_ADC7_SCALE_2 * (i - 1)); 363 + *result_mdec = temp; 556 364 557 365 return 0; 558 366 }
+15
drivers/iio/adc/qcom-vadc-common.h
··· 49 49 #define ADC5_FULL_SCALE_CODE 0x70e4 50 50 #define ADC5_USR_DATA_CHECK 0x8000 51 51 52 + #define R_PU_100K 100000 53 + #define RATIO_MAX_ADC7 BIT(14) 54 + 55 + #define DIE_TEMP_ADC7_SCALE_1 -60000 56 + #define DIE_TEMP_ADC7_SCALE_2 20000 57 + #define DIE_TEMP_ADC7_SCALE_FACTOR 1000 58 + #define DIE_TEMP_ADC7_MAX 160000 59 + 52 60 /** 53 61 * struct vadc_map_pt - Map the graph representation for ADC channel 54 62 * @x: Represent the ADC digitized code. ··· 118 110 * lookup table. The hardware applies offset/slope to adc code. 119 111 * SCALE_HW_CALIB_XOTHERM: Returns XO thermistor voltage in millidegC using 120 112 * 100k pullup. The hardware applies offset/slope to adc code. 113 + * SCALE_HW_CALIB_THERM_100K_PU_PM7: Returns temperature in millidegC using 114 + * lookup table for PMIC7. The hardware applies offset/slope to adc code. 121 115 * SCALE_HW_CALIB_PMIC_THERM: Returns result in milli degree's Centigrade. 122 116 * The hardware applies offset/slope to adc code. 117 + * SCALE_HW_CALIB_PMIC_THERM: Returns result in milli degree's Centigrade. 118 + * The hardware applies offset/slope to adc code. This is for PMIC7. 123 119 * SCALE_HW_CALIB_PM5_CHG_TEMP: Returns result in millidegrees for PMIC5 124 120 * charger temperature. 125 121 * SCALE_HW_CALIB_PM5_SMB_TEMP: Returns result in millidegrees for PMIC5 ··· 138 126 SCALE_HW_CALIB_DEFAULT, 139 127 SCALE_HW_CALIB_THERM_100K_PULLUP, 140 128 SCALE_HW_CALIB_XOTHERM, 129 + SCALE_HW_CALIB_THERM_100K_PU_PM7, 141 130 SCALE_HW_CALIB_PMIC_THERM, 131 + SCALE_HW_CALIB_PMIC_THERM_PM7, 142 132 SCALE_HW_CALIB_PM5_CHG_TEMP, 143 133 SCALE_HW_CALIB_PM5_SMB_TEMP, 144 134 SCALE_HW_CALIB_INVALID, ··· 150 136 const u32 full_scale_code_volt; 151 137 const u32 full_scale_code_cur; 152 138 const struct adc5_channels *adc_chans; 139 + const struct iio_info *info; 153 140 unsigned int *decimation; 154 141 unsigned int *hw_settle_1; 155 142 unsigned int *hw_settle_2;
-2
drivers/iio/adc/rcar-gyroadc.c
··· 516 516 platform_set_drvdata(pdev, indio_dev); 517 517 518 518 indio_dev->name = DRIVER_NAME; 519 - indio_dev->dev.parent = dev; 520 - indio_dev->dev.of_node = pdev->dev.of_node; 521 519 indio_dev->info = &rcar_gyroadc_iio_info; 522 520 indio_dev->modes = INDIO_DIRECT_MODE; 523 521
-1
drivers/iio/adc/rn5t618-adc.c
··· 218 218 init_completion(&adc->conv_completion); 219 219 220 220 iio_dev->name = dev_name(&pdev->dev); 221 - iio_dev->dev.parent = &pdev->dev; 222 221 iio_dev->info = &rn5t618_adc_iio_info; 223 222 iio_dev->modes = INDIO_DIRECT_MODE; 224 223 iio_dev->channels = rn5t618_adc_iio_channels;
+154 -65
drivers/iio/adc/rockchip_saradc.c
··· 15 15 #include <linux/delay.h> 16 16 #include <linux/reset.h> 17 17 #include <linux/regulator/consumer.h> 18 + #include <linux/iio/buffer.h> 18 19 #include <linux/iio/iio.h> 20 + #include <linux/iio/trigger_consumer.h> 21 + #include <linux/iio/triggered_buffer.h> 19 22 20 23 #define SARADC_DATA 0x00 21 24 ··· 35 32 #define SARADC_DLY_PU_SOC_MASK 0x3f 36 33 37 34 #define SARADC_TIMEOUT msecs_to_jiffies(100) 35 + #define SARADC_MAX_CHANNELS 6 38 36 39 37 struct rockchip_saradc_data { 40 - int num_bits; 41 38 const struct iio_chan_spec *channels; 42 39 int num_channels; 43 40 unsigned long clk_rate; ··· 52 49 struct reset_control *reset; 53 50 const struct rockchip_saradc_data *data; 54 51 u16 last_val; 52 + const struct iio_chan_spec *last_chan; 55 53 }; 54 + 55 + static void rockchip_saradc_power_down(struct rockchip_saradc *info) 56 + { 57 + /* Clear irq & power down adc */ 58 + writel_relaxed(0, info->regs + SARADC_CTRL); 59 + } 60 + 61 + static int rockchip_saradc_conversion(struct rockchip_saradc *info, 62 + struct iio_chan_spec const *chan) 63 + { 64 + reinit_completion(&info->completion); 65 + 66 + /* 8 clock periods as delay between power up and start cmd */ 67 + writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC); 68 + 69 + info->last_chan = chan; 70 + 71 + /* Select the channel to be used and trigger conversion */ 72 + writel(SARADC_CTRL_POWER_CTRL 73 + | (chan->channel & SARADC_CTRL_CHN_MASK) 74 + | SARADC_CTRL_IRQ_ENABLE, 75 + info->regs + SARADC_CTRL); 76 + 77 + if (!wait_for_completion_timeout(&info->completion, SARADC_TIMEOUT)) 78 + return -ETIMEDOUT; 79 + 80 + return 0; 81 + } 56 82 57 83 static int rockchip_saradc_read_raw(struct iio_dev *indio_dev, 58 84 struct iio_chan_spec const *chan, ··· 94 62 case IIO_CHAN_INFO_RAW: 95 63 mutex_lock(&indio_dev->mlock); 96 64 97 - reinit_completion(&info->completion); 98 - 99 - /* 8 clock periods as delay between power up and start cmd */ 100 - writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC); 101 - 102 - /* Select the channel to be used and trigger conversion */ 103 - writel(SARADC_CTRL_POWER_CTRL 104 - | (chan->channel & SARADC_CTRL_CHN_MASK) 105 - | SARADC_CTRL_IRQ_ENABLE, 106 - info->regs + SARADC_CTRL); 107 - 108 - if (!wait_for_completion_timeout(&info->completion, 109 - SARADC_TIMEOUT)) { 110 - writel_relaxed(0, info->regs + SARADC_CTRL); 65 + ret = rockchip_saradc_conversion(info, chan); 66 + if (ret) { 67 + rockchip_saradc_power_down(info); 111 68 mutex_unlock(&indio_dev->mlock); 112 - return -ETIMEDOUT; 69 + return ret; 113 70 } 114 71 115 72 *val = info->last_val; ··· 112 91 } 113 92 114 93 *val = ret / 1000; 115 - *val2 = info->data->num_bits; 94 + *val2 = chan->scan_type.realbits; 116 95 return IIO_VAL_FRACTIONAL_LOG2; 117 96 default: 118 97 return -EINVAL; ··· 125 104 126 105 /* Read value */ 127 106 info->last_val = readl_relaxed(info->regs + SARADC_DATA); 128 - info->last_val &= GENMASK(info->data->num_bits - 1, 0); 107 + info->last_val &= GENMASK(info->last_chan->scan_type.realbits - 1, 0); 129 108 130 - /* Clear irq & power down adc */ 131 - writel_relaxed(0, info->regs + SARADC_CTRL); 109 + rockchip_saradc_power_down(info); 132 110 133 111 complete(&info->completion); 134 112 ··· 138 118 .read_raw = rockchip_saradc_read_raw, 139 119 }; 140 120 141 - #define ADC_CHANNEL(_index, _id) { \ 121 + #define SARADC_CHANNEL(_index, _id, _res) { \ 142 122 .type = IIO_VOLTAGE, \ 143 123 .indexed = 1, \ 144 124 .channel = _index, \ 145 125 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 146 126 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 147 127 .datasheet_name = _id, \ 128 + .scan_index = _index, \ 129 + .scan_type = { \ 130 + .sign = 'u', \ 131 + .realbits = _res, \ 132 + .storagebits = 16, \ 133 + .endianness = IIO_CPU, \ 134 + }, \ 148 135 } 149 136 150 137 static const struct iio_chan_spec rockchip_saradc_iio_channels[] = { 151 - ADC_CHANNEL(0, "adc0"), 152 - ADC_CHANNEL(1, "adc1"), 153 - ADC_CHANNEL(2, "adc2"), 138 + SARADC_CHANNEL(0, "adc0", 10), 139 + SARADC_CHANNEL(1, "adc1", 10), 140 + SARADC_CHANNEL(2, "adc2", 10), 154 141 }; 155 142 156 143 static const struct rockchip_saradc_data saradc_data = { 157 - .num_bits = 10, 158 144 .channels = rockchip_saradc_iio_channels, 159 145 .num_channels = ARRAY_SIZE(rockchip_saradc_iio_channels), 160 146 .clk_rate = 1000000, 161 147 }; 162 148 163 149 static const struct iio_chan_spec rockchip_rk3066_tsadc_iio_channels[] = { 164 - ADC_CHANNEL(0, "adc0"), 165 - ADC_CHANNEL(1, "adc1"), 150 + SARADC_CHANNEL(0, "adc0", 12), 151 + SARADC_CHANNEL(1, "adc1", 12), 166 152 }; 167 153 168 154 static const struct rockchip_saradc_data rk3066_tsadc_data = { 169 - .num_bits = 12, 170 155 .channels = rockchip_rk3066_tsadc_iio_channels, 171 156 .num_channels = ARRAY_SIZE(rockchip_rk3066_tsadc_iio_channels), 172 157 .clk_rate = 50000, 173 158 }; 174 159 175 160 static const struct iio_chan_spec rockchip_rk3399_saradc_iio_channels[] = { 176 - ADC_CHANNEL(0, "adc0"), 177 - ADC_CHANNEL(1, "adc1"), 178 - ADC_CHANNEL(2, "adc2"), 179 - ADC_CHANNEL(3, "adc3"), 180 - ADC_CHANNEL(4, "adc4"), 181 - ADC_CHANNEL(5, "adc5"), 161 + SARADC_CHANNEL(0, "adc0", 10), 162 + SARADC_CHANNEL(1, "adc1", 10), 163 + SARADC_CHANNEL(2, "adc2", 10), 164 + SARADC_CHANNEL(3, "adc3", 10), 165 + SARADC_CHANNEL(4, "adc4", 10), 166 + SARADC_CHANNEL(5, "adc5", 10), 182 167 }; 183 168 184 169 static const struct rockchip_saradc_data rk3399_saradc_data = { 185 - .num_bits = 10, 186 170 .channels = rockchip_rk3399_saradc_iio_channels, 187 171 .num_channels = ARRAY_SIZE(rockchip_rk3399_saradc_iio_channels), 188 172 .clk_rate = 1000000, ··· 217 193 reset_control_deassert(reset); 218 194 } 219 195 196 + static void rockchip_saradc_clk_disable(void *data) 197 + { 198 + struct rockchip_saradc *info = data; 199 + 200 + clk_disable_unprepare(info->clk); 201 + } 202 + 203 + static void rockchip_saradc_pclk_disable(void *data) 204 + { 205 + struct rockchip_saradc *info = data; 206 + 207 + clk_disable_unprepare(info->pclk); 208 + } 209 + 210 + static void rockchip_saradc_regulator_disable(void *data) 211 + { 212 + struct rockchip_saradc *info = data; 213 + 214 + regulator_disable(info->vref); 215 + } 216 + 217 + static irqreturn_t rockchip_saradc_trigger_handler(int irq, void *p) 218 + { 219 + struct iio_poll_func *pf = p; 220 + struct iio_dev *i_dev = pf->indio_dev; 221 + struct rockchip_saradc *info = iio_priv(i_dev); 222 + /* 223 + * @values: each channel takes an u16 value 224 + * @timestamp: will be 8-byte aligned automatically 225 + */ 226 + struct { 227 + u16 values[SARADC_MAX_CHANNELS]; 228 + int64_t timestamp; 229 + } data; 230 + int ret; 231 + int i, j = 0; 232 + 233 + mutex_lock(&i_dev->mlock); 234 + 235 + for_each_set_bit(i, i_dev->active_scan_mask, i_dev->masklength) { 236 + const struct iio_chan_spec *chan = &i_dev->channels[i]; 237 + 238 + ret = rockchip_saradc_conversion(info, chan); 239 + if (ret) { 240 + rockchip_saradc_power_down(info); 241 + goto out; 242 + } 243 + 244 + data.values[j] = info->last_val; 245 + j++; 246 + } 247 + 248 + iio_push_to_buffers_with_timestamp(i_dev, &data, iio_get_time_ns(i_dev)); 249 + out: 250 + mutex_unlock(&i_dev->mlock); 251 + 252 + iio_trigger_notify_done(i_dev->trig); 253 + 254 + return IRQ_HANDLED; 255 + } 256 + 220 257 static int rockchip_saradc_probe(struct platform_device *pdev) 221 258 { 222 259 struct rockchip_saradc *info = NULL; ··· 305 220 } 306 221 307 222 info->data = match->data; 223 + 224 + /* Sanity check for possible later IP variants with more channels */ 225 + if (info->data->num_channels > SARADC_MAX_CHANNELS) { 226 + dev_err(&pdev->dev, "max channels exceeded"); 227 + return -EINVAL; 228 + } 308 229 309 230 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 310 231 info->regs = devm_ioremap_resource(&pdev->dev, mem); ··· 382 291 dev_err(&pdev->dev, "failed to enable vref regulator\n"); 383 292 return ret; 384 293 } 294 + ret = devm_add_action_or_reset(&pdev->dev, 295 + rockchip_saradc_regulator_disable, info); 296 + if (ret) { 297 + dev_err(&pdev->dev, "failed to register devm action, %d\n", 298 + ret); 299 + return ret; 300 + } 385 301 386 302 ret = clk_prepare_enable(info->pclk); 387 303 if (ret < 0) { 388 304 dev_err(&pdev->dev, "failed to enable pclk\n"); 389 - goto err_reg_voltage; 305 + return ret; 306 + } 307 + ret = devm_add_action_or_reset(&pdev->dev, 308 + rockchip_saradc_pclk_disable, info); 309 + if (ret) { 310 + dev_err(&pdev->dev, "failed to register devm action, %d\n", 311 + ret); 312 + return ret; 390 313 } 391 314 392 315 ret = clk_prepare_enable(info->clk); 393 316 if (ret < 0) { 394 317 dev_err(&pdev->dev, "failed to enable converter clock\n"); 395 - goto err_pclk; 318 + return ret; 319 + } 320 + ret = devm_add_action_or_reset(&pdev->dev, 321 + rockchip_saradc_clk_disable, info); 322 + if (ret) { 323 + dev_err(&pdev->dev, "failed to register devm action, %d\n", 324 + ret); 325 + return ret; 396 326 } 397 327 398 328 platform_set_drvdata(pdev, indio_dev); 399 329 400 330 indio_dev->name = dev_name(&pdev->dev); 401 - indio_dev->dev.parent = &pdev->dev; 402 - indio_dev->dev.of_node = pdev->dev.of_node; 403 331 indio_dev->info = &rockchip_saradc_iio_info; 404 332 indio_dev->modes = INDIO_DIRECT_MODE; 405 333 406 334 indio_dev->channels = info->data->channels; 407 335 indio_dev->num_channels = info->data->num_channels; 408 - 409 - ret = iio_device_register(indio_dev); 336 + ret = devm_iio_triggered_buffer_setup(&indio_dev->dev, indio_dev, NULL, 337 + rockchip_saradc_trigger_handler, 338 + NULL); 410 339 if (ret) 411 - goto err_clk; 340 + return ret; 412 341 413 - return 0; 414 - 415 - err_clk: 416 - clk_disable_unprepare(info->clk); 417 - err_pclk: 418 - clk_disable_unprepare(info->pclk); 419 - err_reg_voltage: 420 - regulator_disable(info->vref); 421 - return ret; 422 - } 423 - 424 - static int rockchip_saradc_remove(struct platform_device *pdev) 425 - { 426 - struct iio_dev *indio_dev = platform_get_drvdata(pdev); 427 - struct rockchip_saradc *info = iio_priv(indio_dev); 428 - 429 - iio_device_unregister(indio_dev); 430 - clk_disable_unprepare(info->clk); 431 - clk_disable_unprepare(info->pclk); 432 - regulator_disable(info->vref); 433 - 434 - return 0; 342 + return devm_iio_device_register(&pdev->dev, indio_dev); 435 343 } 436 344 437 345 #ifdef CONFIG_PM_SLEEP ··· 473 383 474 384 static struct platform_driver rockchip_saradc_driver = { 475 385 .probe = rockchip_saradc_probe, 476 - .remove = rockchip_saradc_remove, 477 386 .driver = { 478 387 .name = "rockchip-saradc", 479 388 .of_match_table = rockchip_saradc_match,
-1
drivers/iio/adc/sc27xx_adc.c
··· 533 533 return ret; 534 534 } 535 535 536 - indio_dev->dev.parent = dev; 537 536 indio_dev->name = dev_name(dev); 538 537 indio_dev->modes = INDIO_DIRECT_MODE; 539 538 indio_dev->info = &sc27xx_info;
+3 -4
drivers/iio/adc/sd_adc_modulator.c
··· 9 9 #include <linux/iio/iio.h> 10 10 #include <linux/iio/triggered_buffer.h> 11 11 #include <linux/module.h> 12 - #include <linux/of_device.h> 12 + #include <linux/mod_devicetable.h> 13 + #include <linux/platform_device.h> 13 14 14 15 static const struct iio_info iio_sd_mod_iio_info; 15 16 ··· 33 32 if (!iio) 34 33 return -ENOMEM; 35 34 36 - iio->dev.parent = dev; 37 - iio->dev.of_node = dev->of_node; 38 35 iio->name = dev_name(dev); 39 36 iio->info = &iio_sd_mod_iio_info; 40 37 iio->modes = INDIO_BUFFER_HARDWARE; ··· 55 56 static struct platform_driver iio_sd_mod_adc = { 56 57 .driver = { 57 58 .name = "iio_sd_adc_mod", 58 - .of_match_table = of_match_ptr(sd_adc_of_match), 59 + .of_match_table = sd_adc_of_match, 59 60 }, 60 61 .probe = iio_sd_mod_probe, 61 62 };
-1
drivers/iio/adc/spear_adc.c
··· 336 336 init_completion(&st->completion); 337 337 338 338 indio_dev->name = SPEAR_ADC_MOD_NAME; 339 - indio_dev->dev.parent = dev; 340 339 indio_dev->info = &spear_adc_info; 341 340 indio_dev->modes = INDIO_DIRECT_MODE; 342 341 indio_dev->channels = spear_adc_iio_channels;
+68 -87
drivers/iio/adc/stm32-adc.c
··· 162 162 struct stm32_adc_trig_info *trigs; 163 163 bool clk_required; 164 164 bool has_vregready; 165 - int (*prepare)(struct stm32_adc *); 166 - void (*start_conv)(struct stm32_adc *, bool dma); 167 - void (*stop_conv)(struct stm32_adc *); 168 - void (*unprepare)(struct stm32_adc *); 165 + int (*prepare)(struct iio_dev *); 166 + void (*start_conv)(struct iio_dev *, bool dma); 167 + void (*stop_conv)(struct iio_dev *); 168 + void (*unprepare)(struct iio_dev *); 169 169 const unsigned int *smp_cycles; 170 170 }; 171 171 ··· 538 538 539 539 static int stm32_adc_hw_stop(struct device *dev) 540 540 { 541 - struct stm32_adc *adc = dev_get_drvdata(dev); 541 + struct iio_dev *indio_dev = dev_get_drvdata(dev); 542 + struct stm32_adc *adc = iio_priv(indio_dev); 542 543 543 544 if (adc->cfg->unprepare) 544 - adc->cfg->unprepare(adc); 545 + adc->cfg->unprepare(indio_dev); 545 546 546 547 if (adc->clk) 547 548 clk_disable_unprepare(adc->clk); ··· 552 551 553 552 static int stm32_adc_hw_start(struct device *dev) 554 553 { 555 - struct stm32_adc *adc = dev_get_drvdata(dev); 554 + struct iio_dev *indio_dev = dev_get_drvdata(dev); 555 + struct stm32_adc *adc = iio_priv(indio_dev); 556 556 int ret; 557 557 558 558 if (adc->clk) { ··· 565 563 stm32_adc_set_res(adc); 566 564 567 565 if (adc->cfg->prepare) { 568 - ret = adc->cfg->prepare(adc); 566 + ret = adc->cfg->prepare(indio_dev); 569 567 if (ret) 570 568 goto err_clk_dis; 571 569 } ··· 581 579 582 580 /** 583 581 * stm32f4_adc_start_conv() - Start conversions for regular channels. 584 - * @adc: stm32 adc instance 582 + * @indio_dev: IIO device instance 585 583 * @dma: use dma to transfer conversion result 586 584 * 587 585 * Start conversions for regular channels. ··· 589 587 * conversions, in IIO buffer modes. Otherwise, use ADC interrupt with direct 590 588 * DR read instead (e.g. read_raw, or triggered buffer mode without DMA). 591 589 */ 592 - static void stm32f4_adc_start_conv(struct stm32_adc *adc, bool dma) 590 + static void stm32f4_adc_start_conv(struct iio_dev *indio_dev, bool dma) 593 591 { 592 + struct stm32_adc *adc = iio_priv(indio_dev); 593 + 594 594 stm32_adc_set_bits(adc, STM32F4_ADC_CR1, STM32F4_SCAN); 595 595 596 596 if (dma) ··· 609 605 stm32_adc_set_bits(adc, STM32F4_ADC_CR2, STM32F4_SWSTART); 610 606 } 611 607 612 - static void stm32f4_adc_stop_conv(struct stm32_adc *adc) 608 + static void stm32f4_adc_stop_conv(struct iio_dev *indio_dev) 613 609 { 610 + struct stm32_adc *adc = iio_priv(indio_dev); 611 + 614 612 stm32_adc_clr_bits(adc, STM32F4_ADC_CR2, STM32F4_EXTEN_MASK); 615 613 stm32_adc_clr_bits(adc, STM32F4_ADC_SR, STM32F4_STRT); 616 614 ··· 621 615 STM32F4_ADON | STM32F4_DMA | STM32F4_DDS); 622 616 } 623 617 624 - static void stm32h7_adc_start_conv(struct stm32_adc *adc, bool dma) 618 + static void stm32h7_adc_start_conv(struct iio_dev *indio_dev, bool dma) 625 619 { 620 + struct stm32_adc *adc = iio_priv(indio_dev); 626 621 enum stm32h7_adc_dmngt dmngt; 627 622 unsigned long flags; 628 623 u32 val; ··· 642 635 stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADSTART); 643 636 } 644 637 645 - static void stm32h7_adc_stop_conv(struct stm32_adc *adc) 638 + static void stm32h7_adc_stop_conv(struct iio_dev *indio_dev) 646 639 { 647 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 640 + struct stm32_adc *adc = iio_priv(indio_dev); 648 641 int ret; 649 642 u32 val; 650 643 ··· 659 652 stm32_adc_clr_bits(adc, STM32H7_ADC_CFGR, STM32H7_DMNGT_MASK); 660 653 } 661 654 662 - static int stm32h7_adc_exit_pwr_down(struct stm32_adc *adc) 655 + static int stm32h7_adc_exit_pwr_down(struct iio_dev *indio_dev) 663 656 { 664 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 657 + struct stm32_adc *adc = iio_priv(indio_dev); 665 658 int ret; 666 659 u32 val; 667 660 ··· 697 690 stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_DEEPPWD); 698 691 } 699 692 700 - static int stm32h7_adc_enable(struct stm32_adc *adc) 693 + static int stm32h7_adc_enable(struct iio_dev *indio_dev) 701 694 { 702 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 695 + struct stm32_adc *adc = iio_priv(indio_dev); 703 696 int ret; 704 697 u32 val; 705 698 ··· 720 713 return ret; 721 714 } 722 715 723 - static void stm32h7_adc_disable(struct stm32_adc *adc) 716 + static void stm32h7_adc_disable(struct iio_dev *indio_dev) 724 717 { 725 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 718 + struct stm32_adc *adc = iio_priv(indio_dev); 726 719 int ret; 727 720 u32 val; 728 721 ··· 737 730 738 731 /** 739 732 * stm32h7_adc_read_selfcalib() - read calibration shadow regs, save result 740 - * @adc: stm32 adc instance 733 + * @indio_dev: IIO device instance 741 734 * Note: Must be called once ADC is enabled, so LINCALRDYW[1..6] are writable 742 735 */ 743 - static int stm32h7_adc_read_selfcalib(struct stm32_adc *adc) 736 + static int stm32h7_adc_read_selfcalib(struct iio_dev *indio_dev) 744 737 { 745 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 738 + struct stm32_adc *adc = iio_priv(indio_dev); 746 739 int i, ret; 747 740 u32 lincalrdyw_mask, val; 748 741 ··· 781 774 782 775 /** 783 776 * stm32h7_adc_restore_selfcalib() - Restore saved self-calibration result 784 - * @adc: stm32 adc instance 777 + * @indio_dev: IIO device instance 785 778 * Note: ADC must be enabled, with no on-going conversions. 786 779 */ 787 - static int stm32h7_adc_restore_selfcalib(struct stm32_adc *adc) 780 + static int stm32h7_adc_restore_selfcalib(struct iio_dev *indio_dev) 788 781 { 789 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 782 + struct stm32_adc *adc = iio_priv(indio_dev); 790 783 int i, ret; 791 784 u32 lincalrdyw_mask, val; 792 785 ··· 854 847 855 848 /** 856 849 * stm32h7_adc_selfcalib() - Procedure to calibrate ADC 857 - * @adc: stm32 adc instance 850 + * @indio_dev: IIO device instance 858 851 * Note: Must be called once ADC is out of power down. 859 852 */ 860 - static int stm32h7_adc_selfcalib(struct stm32_adc *adc) 853 + static int stm32h7_adc_selfcalib(struct iio_dev *indio_dev) 861 854 { 862 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 855 + struct stm32_adc *adc = iio_priv(indio_dev); 863 856 int ret; 864 857 u32 val; 865 858 ··· 910 903 911 904 /** 912 905 * stm32h7_adc_prepare() - Leave power down mode to enable ADC. 913 - * @adc: stm32 adc instance 906 + * @indio_dev: IIO device instance 914 907 * Leave power down mode. 915 908 * Configure channels as single ended or differential before enabling ADC. 916 909 * Enable ADC. ··· 919 912 * - Only one input is selected for single ended (e.g. 'vinp') 920 913 * - Two inputs are selected for differential channels (e.g. 'vinp' & 'vinn') 921 914 */ 922 - static int stm32h7_adc_prepare(struct stm32_adc *adc) 915 + static int stm32h7_adc_prepare(struct iio_dev *indio_dev) 923 916 { 917 + struct stm32_adc *adc = iio_priv(indio_dev); 924 918 int calib, ret; 925 919 926 - ret = stm32h7_adc_exit_pwr_down(adc); 920 + ret = stm32h7_adc_exit_pwr_down(indio_dev); 927 921 if (ret) 928 922 return ret; 929 923 930 - ret = stm32h7_adc_selfcalib(adc); 924 + ret = stm32h7_adc_selfcalib(indio_dev); 931 925 if (ret < 0) 932 926 goto pwr_dwn; 933 927 calib = ret; 934 928 935 929 stm32_adc_writel(adc, STM32H7_ADC_DIFSEL, adc->difsel); 936 930 937 - ret = stm32h7_adc_enable(adc); 931 + ret = stm32h7_adc_enable(indio_dev); 938 932 if (ret) 939 933 goto pwr_dwn; 940 934 941 935 /* Either restore or read calibration result for future reference */ 942 936 if (calib) 943 - ret = stm32h7_adc_restore_selfcalib(adc); 937 + ret = stm32h7_adc_restore_selfcalib(indio_dev); 944 938 else 945 - ret = stm32h7_adc_read_selfcalib(adc); 939 + ret = stm32h7_adc_read_selfcalib(indio_dev); 946 940 if (ret) 947 941 goto disable; 948 942 ··· 952 944 return 0; 953 945 954 946 disable: 955 - stm32h7_adc_disable(adc); 947 + stm32h7_adc_disable(indio_dev); 956 948 pwr_dwn: 957 949 stm32h7_adc_enter_pwr_down(adc); 958 950 959 951 return ret; 960 952 } 961 953 962 - static void stm32h7_adc_unprepare(struct stm32_adc *adc) 954 + static void stm32h7_adc_unprepare(struct iio_dev *indio_dev) 963 955 { 964 - stm32h7_adc_disable(adc); 956 + struct stm32_adc *adc = iio_priv(indio_dev); 957 + 958 + stm32h7_adc_disable(indio_dev); 965 959 stm32h7_adc_enter_pwr_down(adc); 966 960 } 967 961 ··· 1170 1160 1171 1161 stm32_adc_conv_irq_enable(adc); 1172 1162 1173 - adc->cfg->start_conv(adc, false); 1163 + adc->cfg->start_conv(indio_dev, false); 1174 1164 1175 1165 timeout = wait_for_completion_interruptible_timeout( 1176 1166 &adc->completion, STM32_ADC_TIMEOUT); ··· 1183 1173 ret = IIO_VAL_INT; 1184 1174 } 1185 1175 1186 - adc->cfg->stop_conv(adc); 1176 + adc->cfg->stop_conv(indio_dev); 1187 1177 1188 1178 stm32_adc_conv_irq_disable(adc); 1189 1179 ··· 1237 1227 1238 1228 static irqreturn_t stm32_adc_threaded_isr(int irq, void *data) 1239 1229 { 1240 - struct stm32_adc *adc = data; 1241 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 1230 + struct iio_dev *indio_dev = data; 1231 + struct stm32_adc *adc = iio_priv(indio_dev); 1242 1232 const struct stm32_adc_regspec *regs = adc->cfg->regs; 1243 1233 u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg); 1244 1234 ··· 1250 1240 1251 1241 static irqreturn_t stm32_adc_isr(int irq, void *data) 1252 1242 { 1253 - struct stm32_adc *adc = data; 1254 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 1243 + struct iio_dev *indio_dev = data; 1244 + struct stm32_adc *adc = iio_priv(indio_dev); 1255 1245 const struct stm32_adc_regspec *regs = adc->cfg->regs; 1256 1246 u32 status = stm32_adc_readl(adc, regs->isr_eoc.reg); 1257 1247 ··· 1492 1482 return 0; 1493 1483 } 1494 1484 1495 - static int __stm32_adc_buffer_postenable(struct iio_dev *indio_dev) 1485 + static int stm32_adc_buffer_postenable(struct iio_dev *indio_dev) 1496 1486 { 1497 1487 struct stm32_adc *adc = iio_priv(indio_dev); 1498 1488 struct device *dev = indio_dev->dev.parent; ··· 1524 1514 if (!adc->dma_chan) 1525 1515 stm32_adc_conv_irq_enable(adc); 1526 1516 1527 - adc->cfg->start_conv(adc, !!adc->dma_chan); 1517 + adc->cfg->start_conv(indio_dev, !!adc->dma_chan); 1528 1518 1529 1519 return 0; 1530 1520 ··· 1537 1527 return ret; 1538 1528 } 1539 1529 1540 - static int stm32_adc_buffer_postenable(struct iio_dev *indio_dev) 1541 - { 1542 - int ret; 1543 - 1544 - ret = iio_triggered_buffer_postenable(indio_dev); 1545 - if (ret < 0) 1546 - return ret; 1547 - 1548 - ret = __stm32_adc_buffer_postenable(indio_dev); 1549 - if (ret < 0) 1550 - iio_triggered_buffer_predisable(indio_dev); 1551 - 1552 - return ret; 1553 - } 1554 - 1555 - static void __stm32_adc_buffer_predisable(struct iio_dev *indio_dev) 1530 + static int stm32_adc_buffer_predisable(struct iio_dev *indio_dev) 1556 1531 { 1557 1532 struct stm32_adc *adc = iio_priv(indio_dev); 1558 1533 struct device *dev = indio_dev->dev.parent; 1559 1534 1560 - adc->cfg->stop_conv(adc); 1535 + adc->cfg->stop_conv(indio_dev); 1561 1536 if (!adc->dma_chan) 1562 1537 stm32_adc_conv_irq_disable(adc); 1563 1538 ··· 1556 1561 1557 1562 pm_runtime_mark_last_busy(dev); 1558 1563 pm_runtime_put_autosuspend(dev); 1559 - } 1560 1564 1561 - static int stm32_adc_buffer_predisable(struct iio_dev *indio_dev) 1562 - { 1563 - int ret; 1564 - 1565 - __stm32_adc_buffer_predisable(indio_dev); 1566 - 1567 - ret = iio_triggered_buffer_predisable(indio_dev); 1568 - if (ret < 0) 1569 - dev_err(&indio_dev->dev, "predisable failed\n"); 1570 - 1571 - return ret; 1565 + return 0; 1572 1566 } 1573 1567 1574 1568 static const struct iio_buffer_setup_ops stm32_adc_buffer_setup_ops = { ··· 1870 1886 of_match_device(dev->driver->of_match_table, dev)->data; 1871 1887 1872 1888 indio_dev->name = dev_name(&pdev->dev); 1873 - indio_dev->dev.parent = &pdev->dev; 1874 1889 indio_dev->dev.of_node = pdev->dev.of_node; 1875 1890 indio_dev->info = &stm32_adc_iio_info; 1876 1891 indio_dev->modes = INDIO_DIRECT_MODE | INDIO_HARDWARE_TRIGGERED; 1877 1892 1878 - platform_set_drvdata(pdev, adc); 1893 + platform_set_drvdata(pdev, indio_dev); 1879 1894 1880 1895 ret = of_property_read_u32(pdev->dev.of_node, "reg", &adc->offset); 1881 1896 if (ret != 0) { ··· 1888 1905 1889 1906 ret = devm_request_threaded_irq(&pdev->dev, adc->irq, stm32_adc_isr, 1890 1907 stm32_adc_threaded_isr, 1891 - 0, pdev->name, adc); 1908 + 0, pdev->name, indio_dev); 1892 1909 if (ret) { 1893 1910 dev_err(&pdev->dev, "failed to request IRQ\n"); 1894 1911 return ret; ··· 1972 1989 1973 1990 static int stm32_adc_remove(struct platform_device *pdev) 1974 1991 { 1975 - struct stm32_adc *adc = platform_get_drvdata(pdev); 1976 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 1992 + struct iio_dev *indio_dev = platform_get_drvdata(pdev); 1993 + struct stm32_adc *adc = iio_priv(indio_dev); 1977 1994 1978 1995 pm_runtime_get_sync(&pdev->dev); 1979 1996 iio_device_unregister(indio_dev); ··· 1995 2012 #if defined(CONFIG_PM_SLEEP) 1996 2013 static int stm32_adc_suspend(struct device *dev) 1997 2014 { 1998 - struct stm32_adc *adc = dev_get_drvdata(dev); 1999 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 2015 + struct iio_dev *indio_dev = dev_get_drvdata(dev); 2000 2016 2001 2017 if (iio_buffer_enabled(indio_dev)) 2002 - __stm32_adc_buffer_predisable(indio_dev); 2018 + stm32_adc_buffer_predisable(indio_dev); 2003 2019 2004 2020 return pm_runtime_force_suspend(dev); 2005 2021 } 2006 2022 2007 2023 static int stm32_adc_resume(struct device *dev) 2008 2024 { 2009 - struct stm32_adc *adc = dev_get_drvdata(dev); 2010 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 2025 + struct iio_dev *indio_dev = dev_get_drvdata(dev); 2011 2026 int ret; 2012 2027 2013 2028 ret = pm_runtime_force_resume(dev); ··· 2020 2039 if (ret < 0) 2021 2040 return ret; 2022 2041 2023 - return __stm32_adc_buffer_postenable(indio_dev); 2042 + return stm32_adc_buffer_postenable(indio_dev); 2024 2043 } 2025 2044 #endif 2026 2045
+37 -68
drivers/iio/adc/stm32-dfsdm-adc.c
··· 330 330 return 0; 331 331 } 332 332 333 - static int stm32_dfsdm_start_channel(struct stm32_dfsdm_adc *adc) 333 + static int stm32_dfsdm_start_channel(struct iio_dev *indio_dev) 334 334 { 335 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 335 + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); 336 336 struct regmap *regmap = adc->dfsdm->regmap; 337 337 const struct iio_chan_spec *chan; 338 338 unsigned int bit; ··· 350 350 return 0; 351 351 } 352 352 353 - static void stm32_dfsdm_stop_channel(struct stm32_dfsdm_adc *adc) 353 + static void stm32_dfsdm_stop_channel(struct iio_dev *indio_dev) 354 354 { 355 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 355 + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); 356 356 struct regmap *regmap = adc->dfsdm->regmap; 357 357 const struct iio_chan_spec *chan; 358 358 unsigned int bit; ··· 418 418 DFSDM_CR1_DFEN_MASK, DFSDM_CR1_DFEN(0)); 419 419 } 420 420 421 - static int stm32_dfsdm_filter_set_trig(struct stm32_dfsdm_adc *adc, 421 + static int stm32_dfsdm_filter_set_trig(struct iio_dev *indio_dev, 422 422 unsigned int fl_id, 423 423 struct iio_trigger *trig) 424 424 { 425 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 425 + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); 426 426 struct regmap *regmap = adc->dfsdm->regmap; 427 427 u32 jextsel = 0, jexten = STM32_DFSDM_JEXTEN_DISABLED; 428 428 int ret; ··· 447 447 return 0; 448 448 } 449 449 450 - static int stm32_dfsdm_channels_configure(struct stm32_dfsdm_adc *adc, 450 + static int stm32_dfsdm_channels_configure(struct iio_dev *indio_dev, 451 451 unsigned int fl_id, 452 452 struct iio_trigger *trig) 453 453 { 454 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 454 + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); 455 455 struct regmap *regmap = adc->dfsdm->regmap; 456 456 struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[fl_id]; 457 457 struct stm32_dfsdm_filter_osr *flo = &fl->flo[0]; ··· 491 491 return 0; 492 492 } 493 493 494 - static int stm32_dfsdm_filter_configure(struct stm32_dfsdm_adc *adc, 494 + static int stm32_dfsdm_filter_configure(struct iio_dev *indio_dev, 495 495 unsigned int fl_id, 496 496 struct iio_trigger *trig) 497 497 { 498 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 498 + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); 499 499 struct regmap *regmap = adc->dfsdm->regmap; 500 500 struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[fl_id]; 501 501 struct stm32_dfsdm_filter_osr *flo = &fl->flo[fl->fast]; ··· 521 521 if (ret) 522 522 return ret; 523 523 524 - ret = stm32_dfsdm_filter_set_trig(adc, fl_id, trig); 524 + ret = stm32_dfsdm_filter_set_trig(indio_dev, fl_id, trig); 525 525 if (ret) 526 526 return ret; 527 527 ··· 729 729 return len; 730 730 } 731 731 732 - static int stm32_dfsdm_start_conv(struct stm32_dfsdm_adc *adc, 732 + static int stm32_dfsdm_start_conv(struct iio_dev *indio_dev, 733 733 struct iio_trigger *trig) 734 734 { 735 + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); 735 736 struct regmap *regmap = adc->dfsdm->regmap; 736 737 int ret; 737 738 738 - ret = stm32_dfsdm_channels_configure(adc, adc->fl_id, trig); 739 + ret = stm32_dfsdm_channels_configure(indio_dev, adc->fl_id, trig); 739 740 if (ret < 0) 740 741 return ret; 741 742 742 - ret = stm32_dfsdm_start_channel(adc); 743 + ret = stm32_dfsdm_start_channel(indio_dev); 743 744 if (ret < 0) 744 745 return ret; 745 746 746 - ret = stm32_dfsdm_filter_configure(adc, adc->fl_id, trig); 747 + ret = stm32_dfsdm_filter_configure(indio_dev, adc->fl_id, trig); 747 748 if (ret < 0) 748 749 goto stop_channels; 749 750 ··· 758 757 regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id), 759 758 DFSDM_CR1_CFG_MASK, 0); 760 759 stop_channels: 761 - stm32_dfsdm_stop_channel(adc); 760 + stm32_dfsdm_stop_channel(indio_dev); 762 761 763 762 return ret; 764 763 } 765 764 766 - static void stm32_dfsdm_stop_conv(struct stm32_dfsdm_adc *adc) 765 + static void stm32_dfsdm_stop_conv(struct iio_dev *indio_dev) 767 766 { 767 + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); 768 768 struct regmap *regmap = adc->dfsdm->regmap; 769 769 770 770 stm32_dfsdm_stop_filter(adc->dfsdm, adc->fl_id); ··· 773 771 regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id), 774 772 DFSDM_CR1_CFG_MASK, 0); 775 773 776 - stm32_dfsdm_stop_channel(adc); 774 + stm32_dfsdm_stop_channel(indio_dev); 777 775 } 778 776 779 777 static int stm32_dfsdm_set_watermark(struct iio_dev *indio_dev, ··· 995 993 return 0; 996 994 } 997 995 998 - static int __stm32_dfsdm_postenable(struct iio_dev *indio_dev) 996 + static int stm32_dfsdm_postenable(struct iio_dev *indio_dev) 999 997 { 1000 998 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); 1001 999 int ret; ··· 1019 1017 goto stop_dfsdm; 1020 1018 } 1021 1019 1022 - ret = stm32_dfsdm_start_conv(adc, indio_dev->trig); 1020 + ret = stm32_dfsdm_start_conv(indio_dev, indio_dev->trig); 1023 1021 if (ret) { 1024 1022 dev_err(&indio_dev->dev, "Can't start conversion\n"); 1025 1023 goto err_stop_dma; ··· 1038 1036 return ret; 1039 1037 } 1040 1038 1041 - static int stm32_dfsdm_postenable(struct iio_dev *indio_dev) 1042 - { 1043 - int ret; 1044 - 1045 - if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) { 1046 - ret = iio_triggered_buffer_postenable(indio_dev); 1047 - if (ret < 0) 1048 - return ret; 1049 - } 1050 - 1051 - ret = __stm32_dfsdm_postenable(indio_dev); 1052 - if (ret < 0) 1053 - goto err_predisable; 1054 - 1055 - return 0; 1056 - 1057 - err_predisable: 1058 - if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) 1059 - iio_triggered_buffer_predisable(indio_dev); 1060 - 1061 - return ret; 1062 - } 1063 - 1064 - static void __stm32_dfsdm_predisable(struct iio_dev *indio_dev) 1039 + static int stm32_dfsdm_predisable(struct iio_dev *indio_dev) 1065 1040 { 1066 1041 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); 1067 1042 1068 - stm32_dfsdm_stop_conv(adc); 1043 + stm32_dfsdm_stop_conv(indio_dev); 1069 1044 1070 1045 stm32_dfsdm_adc_dma_stop(indio_dev); 1071 1046 ··· 1050 1071 1051 1072 if (adc->hwc) 1052 1073 iio_hw_consumer_disable(adc->hwc); 1053 - } 1054 - 1055 - static int stm32_dfsdm_predisable(struct iio_dev *indio_dev) 1056 - { 1057 - __stm32_dfsdm_predisable(indio_dev); 1058 - 1059 - if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) 1060 - iio_triggered_buffer_predisable(indio_dev); 1061 1074 1062 1075 return 0; 1063 1076 } ··· 1130 1159 1131 1160 adc->nconv = 1; 1132 1161 adc->smask = BIT(chan->scan_index); 1133 - ret = stm32_dfsdm_start_conv(adc, NULL); 1162 + ret = stm32_dfsdm_start_conv(indio_dev, NULL); 1134 1163 if (ret < 0) { 1135 1164 regmap_update_bits(adc->dfsdm->regmap, DFSDM_CR2(adc->fl_id), 1136 1165 DFSDM_CR2_REOCIE_MASK, DFSDM_CR2_REOCIE(0)); ··· 1151 1180 else 1152 1181 ret = IIO_VAL_INT; 1153 1182 1154 - stm32_dfsdm_stop_conv(adc); 1183 + stm32_dfsdm_stop_conv(indio_dev); 1155 1184 1156 1185 stm32_dfsdm_process_data(adc, res); 1157 1186 ··· 1284 1313 1285 1314 static irqreturn_t stm32_dfsdm_irq(int irq, void *arg) 1286 1315 { 1287 - struct stm32_dfsdm_adc *adc = arg; 1288 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 1316 + struct iio_dev *indio_dev = arg; 1317 + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); 1289 1318 struct regmap *regmap = adc->dfsdm->regmap; 1290 1319 unsigned int status, int_en; 1291 1320 ··· 1542 1571 adc = iio_priv(iio); 1543 1572 adc->dfsdm = dev_get_drvdata(dev->parent); 1544 1573 1545 - iio->dev.parent = dev; 1546 1574 iio->dev.of_node = np; 1547 1575 iio->modes = INDIO_DIRECT_MODE; 1548 1576 1549 - platform_set_drvdata(pdev, adc); 1577 + platform_set_drvdata(pdev, iio); 1550 1578 1551 1579 ret = of_property_read_u32(dev->of_node, "reg", &adc->fl_id); 1552 1580 if (ret != 0 || adc->fl_id >= adc->dfsdm->num_fls) { ··· 1574 1604 return irq; 1575 1605 1576 1606 ret = devm_request_irq(dev, irq, stm32_dfsdm_irq, 1577 - 0, pdev->name, adc); 1607 + 0, pdev->name, iio); 1578 1608 if (ret < 0) { 1579 1609 dev_err(dev, "Failed to request IRQ\n"); 1580 1610 return ret; ··· 1621 1651 1622 1652 static int stm32_dfsdm_adc_remove(struct platform_device *pdev) 1623 1653 { 1624 - struct stm32_dfsdm_adc *adc = platform_get_drvdata(pdev); 1625 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 1654 + struct iio_dev *indio_dev = platform_get_drvdata(pdev); 1655 + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); 1626 1656 1627 1657 if (adc->dev_data->type == DFSDM_AUDIO) 1628 1658 of_platform_depopulate(&pdev->dev); ··· 1634 1664 1635 1665 static int __maybe_unused stm32_dfsdm_adc_suspend(struct device *dev) 1636 1666 { 1637 - struct stm32_dfsdm_adc *adc = dev_get_drvdata(dev); 1638 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 1667 + struct iio_dev *indio_dev = dev_get_drvdata(dev); 1639 1668 1640 1669 if (iio_buffer_enabled(indio_dev)) 1641 - __stm32_dfsdm_predisable(indio_dev); 1670 + stm32_dfsdm_predisable(indio_dev); 1642 1671 1643 1672 return 0; 1644 1673 } 1645 1674 1646 1675 static int __maybe_unused stm32_dfsdm_adc_resume(struct device *dev) 1647 1676 { 1648 - struct stm32_dfsdm_adc *adc = dev_get_drvdata(dev); 1649 - struct iio_dev *indio_dev = iio_priv_to_dev(adc); 1677 + struct iio_dev *indio_dev = dev_get_drvdata(dev); 1678 + struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); 1650 1679 const struct iio_chan_spec *chan; 1651 1680 struct stm32_dfsdm_channel *ch; 1652 1681 int i, ret; ··· 1660 1691 } 1661 1692 1662 1693 if (iio_buffer_enabled(indio_dev)) 1663 - __stm32_dfsdm_postenable(indio_dev); 1694 + stm32_dfsdm_postenable(indio_dev); 1664 1695 1665 1696 return 0; 1666 1697 }
-1
drivers/iio/adc/stmpe-adc.c
··· 297 297 platform_set_drvdata(pdev, indio_dev); 298 298 299 299 indio_dev->name = dev_name(&pdev->dev); 300 - indio_dev->dev.parent = &pdev->dev; 301 300 indio_dev->info = &stmpe_adc_iio_info; 302 301 indio_dev->modes = INDIO_DIRECT_MODE; 303 302
-1
drivers/iio/adc/stx104.c
··· 319 319 } 320 320 321 321 indio_dev->name = dev_name(dev); 322 - indio_dev->dev.parent = dev; 323 322 324 323 priv = iio_priv(indio_dev); 325 324 priv->base = base[id];
-2
drivers/iio/adc/sun4i-gpadc-iio.c
··· 619 619 info->indio_dev = indio_dev; 620 620 init_completion(&info->completion); 621 621 indio_dev->name = dev_name(&pdev->dev); 622 - indio_dev->dev.parent = &pdev->dev; 623 - indio_dev->dev.of_node = pdev->dev.of_node; 624 622 indio_dev->info = &sun4i_gpadc_iio_info; 625 623 indio_dev->modes = INDIO_DIRECT_MODE; 626 624
+5 -9
drivers/iio/adc/ti-adc081c.c
··· 6 6 * Copyright (C) 2016 Intel 7 7 * 8 8 * Datasheets: 9 - * http://www.ti.com/lit/ds/symlink/adc081c021.pdf 10 - * http://www.ti.com/lit/ds/symlink/adc101c021.pdf 11 - * http://www.ti.com/lit/ds/symlink/adc121c021.pdf 9 + * https://www.ti.com/lit/ds/symlink/adc081c021.pdf 10 + * https://www.ti.com/lit/ds/symlink/adc101c021.pdf 11 + * https://www.ti.com/lit/ds/symlink/adc121c021.pdf 12 12 * 13 13 * The devices have a very similar interface and differ mostly in the number of 14 14 * bits handled. For the 8-bit and 10-bit models the least-significant 4 or 2 ··· 18 18 #include <linux/err.h> 19 19 #include <linux/i2c.h> 20 20 #include <linux/module.h> 21 - #include <linux/of.h> 21 + #include <linux/mod_devicetable.h> 22 22 #include <linux/acpi.h> 23 23 24 24 #include <linux/iio/iio.h> ··· 181 181 if (err < 0) 182 182 return err; 183 183 184 - iio->dev.parent = &client->dev; 185 - iio->dev.of_node = client->dev.of_node; 186 184 iio->name = dev_name(&client->dev); 187 185 iio->modes = INDIO_DIRECT_MODE; 188 186 iio->info = &adc081c_info; ··· 230 232 }; 231 233 MODULE_DEVICE_TABLE(i2c, adc081c_id); 232 234 233 - #ifdef CONFIG_OF 234 235 static const struct of_device_id adc081c_of_match[] = { 235 236 { .compatible = "ti,adc081c" }, 236 237 { .compatible = "ti,adc101c" }, ··· 237 240 { } 238 241 }; 239 242 MODULE_DEVICE_TABLE(of, adc081c_of_match); 240 - #endif 241 243 242 244 #ifdef CONFIG_ACPI 243 245 static const struct acpi_device_id adc081c_acpi_match[] = { ··· 251 255 static struct i2c_driver adc081c_driver = { 252 256 .driver = { 253 257 .name = "adc081c", 254 - .of_match_table = of_match_ptr(adc081c_of_match), 258 + .of_match_table = adc081c_of_match, 255 259 .acpi_match_table = ACPI_PTR(adc081c_acpi_match), 256 260 }, 257 261 .probe = adc081c_probe,
+3 -8
drivers/iio/adc/ti-adc0832.c
··· 4 4 * 5 5 * Copyright (c) 2016 Akinobu Mita <akinobu.mita@gmail.com> 6 6 * 7 - * Datasheet: http://www.ti.com/lit/ds/symlink/adc0832-n.pdf 7 + * Datasheet: https://www.ti.com/lit/ds/symlink/adc0832-n.pdf 8 8 */ 9 9 10 10 #include <linux/module.h> 11 + #include <linux/mod_devicetable.h> 11 12 #include <linux/spi/spi.h> 12 13 #include <linux/iio/iio.h> 13 14 #include <linux/regulator/consumer.h> ··· 246 245 mutex_init(&adc->lock); 247 246 248 247 indio_dev->name = spi_get_device_id(spi)->name; 249 - indio_dev->dev.parent = &spi->dev; 250 - indio_dev->dev.of_node = spi->dev.of_node; 251 248 indio_dev->info = &adc0832_info; 252 249 indio_dev->modes = INDIO_DIRECT_MODE; 253 250 ··· 314 315 return 0; 315 316 } 316 317 317 - #ifdef CONFIG_OF 318 - 319 318 static const struct of_device_id adc0832_dt_ids[] = { 320 319 { .compatible = "ti,adc0831", }, 321 320 { .compatible = "ti,adc0832", }, ··· 322 325 {} 323 326 }; 324 327 MODULE_DEVICE_TABLE(of, adc0832_dt_ids); 325 - 326 - #endif 327 328 328 329 static const struct spi_device_id adc0832_id[] = { 329 330 { "adc0831", adc0831 }, ··· 335 340 static struct spi_driver adc0832_driver = { 336 341 .driver = { 337 342 .name = "adc0832", 338 - .of_match_table = of_match_ptr(adc0832_dt_ids), 343 + .of_match_table = adc0832_dt_ids, 339 344 }, 340 345 .probe = adc0832_probe, 341 346 .remove = adc0832_remove,
+3 -6
drivers/iio/adc/ti-adc084s021.c
··· 4 4 * 5 5 * Driver for Texas Instruments' ADC084S021 ADC chip. 6 6 * Datasheets can be found here: 7 - * http://www.ti.com/lit/ds/symlink/adc084s021.pdf 7 + * https://www.ti.com/lit/ds/symlink/adc084s021.pdf 8 8 */ 9 9 10 10 #include <linux/err.h> 11 11 #include <linux/spi/spi.h> 12 12 #include <linux/module.h> 13 + #include <linux/mod_devicetable.h> 13 14 #include <linux/interrupt.h> 14 15 #include <linux/iio/iio.h> 15 16 #include <linux/iio/buffer.h> ··· 188 187 189 188 static const struct iio_buffer_setup_ops adc084s021_buffer_setup_ops = { 190 189 .preenable = adc084s021_buffer_preenable, 191 - .postenable = iio_triggered_buffer_postenable, 192 - .predisable = iio_triggered_buffer_predisable, 193 190 .postdisable = adc084s021_buffer_postdisable, 194 191 }; 195 192 ··· 210 211 spi_set_drvdata(spi, indio_dev); 211 212 212 213 /* Initiate the Industrial I/O device */ 213 - indio_dev->dev.parent = &spi->dev; 214 - indio_dev->dev.of_node = spi->dev.of_node; 215 214 indio_dev->name = spi_get_device_id(spi)->name; 216 215 indio_dev->modes = INDIO_DIRECT_MODE; 217 216 indio_dev->info = &adc084s021_info; ··· 255 258 static struct spi_driver adc084s021_driver = { 256 259 .driver = { 257 260 .name = ADC084S021_DRIVER_NAME, 258 - .of_match_table = of_match_ptr(adc084s021_of_match), 261 + .of_match_table = adc084s021_of_match, 259 262 }, 260 263 .probe = adc084s021_probe, 261 264 .id_table = adc084s021_id,
-1
drivers/iio/adc/ti-adc108s102.c
··· 252 252 st->spi = spi; 253 253 254 254 indio_dev->name = spi->modalias; 255 - indio_dev->dev.parent = &spi->dev; 256 255 indio_dev->modes = INDIO_DIRECT_MODE; 257 256 indio_dev->channels = adc108s102_channels; 258 257 indio_dev->num_channels = ARRAY_SIZE(adc108s102_channels);
-1
drivers/iio/adc/ti-adc12138.c
··· 407 407 init_completion(&adc->complete); 408 408 409 409 indio_dev->name = spi_get_device_id(spi)->name; 410 - indio_dev->dev.parent = &spi->dev; 411 410 indio_dev->info = &adc12138_info; 412 411 indio_dev->modes = INDIO_DIRECT_MODE; 413 412
+3 -5
drivers/iio/adc/ti-adc128s052.c
··· 4 4 * 5 5 * Driver for Texas Instruments' ADC128S052, ADC122S021 and ADC124S021 ADC chip. 6 6 * Datasheets can be found here: 7 - * http://www.ti.com/lit/ds/symlink/adc128s052.pdf 8 - * http://www.ti.com/lit/ds/symlink/adc122s021.pdf 9 - * http://www.ti.com/lit/ds/symlink/adc124s021.pdf 7 + * https://www.ti.com/lit/ds/symlink/adc128s052.pdf 8 + * https://www.ti.com/lit/ds/symlink/adc122s021.pdf 9 + * https://www.ti.com/lit/ds/symlink/adc124s021.pdf 10 10 */ 11 11 12 12 #include <linux/acpi.h> ··· 152 152 153 153 spi_set_drvdata(spi, indio_dev); 154 154 155 - indio_dev->dev.parent = &spi->dev; 156 - indio_dev->dev.of_node = spi->dev.of_node; 157 155 indio_dev->name = spi_get_device_id(spi)->name; 158 156 indio_dev->modes = INDIO_DIRECT_MODE; 159 157 indio_dev->info = &adc128_info;
+2 -3
drivers/iio/adc/ti-adc161s626.c
··· 11 11 */ 12 12 13 13 #include <linux/module.h> 14 + #include <linux/mod_devicetable.h> 14 15 #include <linux/init.h> 15 16 #include <linux/err.h> 16 17 #include <linux/spi/spi.h> ··· 180 179 return -ENOMEM; 181 180 182 181 indio_dev->info = &ti_adc_info; 183 - indio_dev->dev.parent = &spi->dev; 184 - indio_dev->dev.of_node = spi->dev.of_node; 185 182 indio_dev->name = TI_ADC_DRV_NAME; 186 183 indio_dev->modes = INDIO_DIRECT_MODE; 187 184 spi_set_drvdata(spi, indio_dev); ··· 258 259 static struct spi_driver ti_adc_driver = { 259 260 .driver = { 260 261 .name = TI_ADC_DRV_NAME, 261 - .of_match_table = of_match_ptr(ti_adc_dt_ids), 262 + .of_match_table = ti_adc_dt_ids, 262 263 }, 263 264 .probe = ti_adc_probe, 264 265 .remove = ti_adc_remove,
-4
drivers/iio/adc/ti-ads1015.c
··· 788 788 789 789 static const struct iio_buffer_setup_ops ads1015_buffer_setup_ops = { 790 790 .preenable = ads1015_buffer_preenable, 791 - .postenable = iio_triggered_buffer_postenable, 792 - .predisable = iio_triggered_buffer_predisable, 793 791 .postdisable = ads1015_buffer_postdisable, 794 792 .validate_scan_mask = &iio_validate_scan_mask_onehot, 795 793 }; ··· 937 939 938 940 mutex_init(&data->lock); 939 941 940 - indio_dev->dev.parent = &client->dev; 941 - indio_dev->dev.of_node = client->dev.of_node; 942 942 indio_dev->name = ADS1015_DRV_NAME; 943 943 indio_dev->modes = INDIO_DIRECT_MODE; 944 944
+1 -3
drivers/iio/adc/ti-ads124s08.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 2 /* TI ADS124S0X chip family driver 3 - * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ 3 + * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ 4 4 */ 5 5 6 6 #include <linux/err.h> ··· 325 325 ads124s_priv->spi = spi; 326 326 327 327 indio_dev->name = spi_id->name; 328 - indio_dev->dev.parent = &spi->dev; 329 - indio_dev->dev.of_node = spi->dev.of_node; 330 328 indio_dev->modes = INDIO_DIRECT_MODE; 331 329 indio_dev->channels = ads124s_priv->chip_info->channels; 332 330 indio_dev->num_channels = ads124s_priv->chip_info->num_channels;
+1 -2
drivers/iio/adc/ti-ads7950.c
··· 9 9 * Copyright 2012 CS Systemes d'Information 10 10 * 11 11 * And also on hwmon/ads79xx.c 12 - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 12 + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 13 13 * Nishanth Menon 14 14 */ 15 15 ··· 557 557 info = &ti_ads7950_chip_info[spi_get_device_id(spi)->driver_data]; 558 558 559 559 indio_dev->name = spi_get_device_id(spi)->name; 560 - indio_dev->dev.parent = &spi->dev; 561 560 indio_dev->modes = INDIO_DIRECT_MODE; 562 561 indio_dev->channels = info->channels; 563 562 indio_dev->num_channels = info->num_channels;
+1 -3
drivers/iio/adc/ti-ads8344.c
··· 4 4 * 5 5 * Author: Gregory CLEMENT <gregory.clement@bootlin.com> 6 6 * 7 - * Datasheet: http://www.ti.com/lit/ds/symlink/ads8344.pdf 7 + * Datasheet: https://www.ti.com/lit/ds/symlink/ads8344.pdf 8 8 */ 9 9 10 10 #include <linux/delay.h> ··· 148 148 mutex_init(&adc->lock); 149 149 150 150 indio_dev->name = dev_name(&spi->dev); 151 - indio_dev->dev.parent = &spi->dev; 152 - indio_dev->dev.of_node = spi->dev.of_node; 153 151 indio_dev->info = &ads8344_info; 154 152 indio_dev->modes = INDIO_DIRECT_MODE; 155 153 indio_dev->channels = ads8344_channels;
-2
drivers/iio/adc/ti-ads8688.c
··· 449 449 st->spi = spi; 450 450 451 451 indio_dev->name = spi_get_device_id(spi)->name; 452 - indio_dev->dev.parent = &spi->dev; 453 - indio_dev->dev.of_node = spi->dev.of_node; 454 452 indio_dev->modes = INDIO_DIRECT_MODE; 455 453 indio_dev->channels = st->chip_info->channels; 456 454 indio_dev->num_channels = st->chip_info->num_channels;
+4 -6
drivers/iio/adc/ti-tlc4541.c
··· 5 5 * Copyright (C) 2017 Phil Reid 6 6 * 7 7 * Datasheets can be found here: 8 - * http://www.ti.com/lit/gpn/tlc3541 9 - * http://www.ti.com/lit/gpn/tlc4541 8 + * https://www.ti.com/lit/gpn/tlc3541 9 + * https://www.ti.com/lit/gpn/tlc4541 10 10 * 11 11 * The tlc4541 requires 24 clock cycles to start a transfer. 12 12 * Conversion then takes 2.94us to complete before data is ready ··· 24 24 #include <linux/iio/triggered_buffer.h> 25 25 #include <linux/kernel.h> 26 26 #include <linux/module.h> 27 + #include <linux/mod_devicetable.h> 27 28 #include <linux/regulator/consumer.h> 28 29 #include <linux/slab.h> 29 30 #include <linux/spi/spi.h> ··· 178 177 info = &tlc4541_chip_info[spi_get_device_id(spi)->driver_data]; 179 178 180 179 indio_dev->name = spi_get_device_id(spi)->name; 181 - indio_dev->dev.parent = &spi->dev; 182 180 indio_dev->modes = INDIO_DIRECT_MODE; 183 181 indio_dev->channels = info->channels; 184 182 indio_dev->num_channels = info->num_channels; ··· 236 236 return 0; 237 237 } 238 238 239 - #ifdef CONFIG_OF 240 239 static const struct of_device_id tlc4541_dt_ids[] = { 241 240 { .compatible = "ti,tlc3541", }, 242 241 { .compatible = "ti,tlc4541", }, 243 242 {} 244 243 }; 245 244 MODULE_DEVICE_TABLE(of, tlc4541_dt_ids); 246 - #endif 247 245 248 246 static const struct spi_device_id tlc4541_id[] = { 249 247 {"tlc3541", TLC3541}, ··· 253 255 static struct spi_driver tlc4541_driver = { 254 256 .driver = { 255 257 .name = "tlc4541", 256 - .of_match_table = of_match_ptr(tlc4541_dt_ids), 258 + .of_match_table = tlc4541_dt_ids, 257 259 }, 258 260 .probe = tlc4541_probe, 259 261 .remove = tlc4541_remove,
+11 -27
drivers/iio/adc/ti_am335x_adc.c
··· 1 1 /* 2 2 * TI ADC MFD driver 3 3 * 4 - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 4 + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 5 5 * 6 6 * This program is free software; you can redistribute it and/or 7 7 * modify it under the terms of the GNU General Public License as ··· 377 377 .postdisable = &tiadc_buffer_postdisable, 378 378 }; 379 379 380 - static int tiadc_iio_buffered_hardware_setup(struct iio_dev *indio_dev, 380 + static int tiadc_iio_buffered_hardware_setup(struct device *dev, 381 + struct iio_dev *indio_dev, 381 382 irqreturn_t (*pollfunc_bh)(int irq, void *p), 382 383 irqreturn_t (*pollfunc_th)(int irq, void *p), 383 384 int irq, ··· 388 387 struct iio_buffer *buffer; 389 388 int ret; 390 389 391 - buffer = iio_kfifo_allocate(); 390 + buffer = devm_iio_kfifo_allocate(dev); 392 391 if (!buffer) 393 392 return -ENOMEM; 394 393 395 394 iio_device_attach_buffer(indio_dev, buffer); 396 395 397 - ret = request_threaded_irq(irq, pollfunc_th, pollfunc_bh, 396 + ret = devm_request_threaded_irq(dev, irq, pollfunc_th, pollfunc_bh, 398 397 flags, indio_dev->name, indio_dev); 399 398 if (ret) 400 399 goto error_kfifo_free; ··· 409 408 return ret; 410 409 } 411 410 412 - static void tiadc_iio_buffered_hardware_remove(struct iio_dev *indio_dev) 413 - { 414 - struct tiadc_device *adc_dev = iio_priv(indio_dev); 415 - 416 - free_irq(adc_dev->mfd_tscadc->irq, indio_dev); 417 - iio_kfifo_free(indio_dev->buffer); 418 - } 419 - 420 - 421 411 static const char * const chan_name_ain[] = { 422 412 "AIN0", 423 413 "AIN1", ··· 420 428 "AIN7", 421 429 }; 422 430 423 - static int tiadc_channel_init(struct iio_dev *indio_dev, int channels) 431 + static int tiadc_channel_init(struct device *dev, struct iio_dev *indio_dev, 432 + int channels) 424 433 { 425 434 struct tiadc_device *adc_dev = iio_priv(indio_dev); 426 435 struct iio_chan_spec *chan_array; ··· 429 436 int i; 430 437 431 438 indio_dev->num_channels = channels; 432 - chan_array = kcalloc(channels, sizeof(*chan_array), GFP_KERNEL); 439 + chan_array = devm_kcalloc(dev, channels, sizeof(*chan_array), 440 + GFP_KERNEL); 433 441 if (chan_array == NULL) 434 442 return -ENOMEM; 435 443 ··· 451 457 indio_dev->channels = chan_array; 452 458 453 459 return 0; 454 - } 455 - 456 - static void tiadc_channels_remove(struct iio_dev *indio_dev) 457 - { 458 - kfree(indio_dev->channels); 459 460 } 460 461 461 462 static int tiadc_read_raw(struct iio_dev *indio_dev, ··· 615 626 adc_dev->mfd_tscadc = ti_tscadc_dev_get(pdev); 616 627 tiadc_parse_dt(pdev, adc_dev); 617 628 618 - indio_dev->dev.parent = &pdev->dev; 619 629 indio_dev->name = dev_name(&pdev->dev); 620 630 indio_dev->modes = INDIO_DIRECT_MODE; 621 631 indio_dev->info = &tiadc_info; ··· 623 635 tiadc_writel(adc_dev, REG_FIFO1THR, FIFO1_THRESHOLD); 624 636 mutex_init(&adc_dev->fifo1_lock); 625 637 626 - err = tiadc_channel_init(indio_dev, adc_dev->channels); 638 + err = tiadc_channel_init(&pdev->dev, indio_dev, adc_dev->channels); 627 639 if (err < 0) 628 640 return err; 629 641 630 - err = tiadc_iio_buffered_hardware_setup(indio_dev, 642 + err = tiadc_iio_buffered_hardware_setup(&pdev->dev, indio_dev, 631 643 &tiadc_worker_h, 632 644 &tiadc_irq_h, 633 645 adc_dev->mfd_tscadc->irq, ··· 652 664 err_dma: 653 665 iio_device_unregister(indio_dev); 654 666 err_buffer_unregister: 655 - tiadc_iio_buffered_hardware_remove(indio_dev); 656 667 err_free_channels: 657 - tiadc_channels_remove(indio_dev); 658 668 return err; 659 669 } 660 670 ··· 669 683 dma_release_channel(dma->chan); 670 684 } 671 685 iio_device_unregister(indio_dev); 672 - tiadc_iio_buffered_hardware_remove(indio_dev); 673 - tiadc_channels_remove(indio_dev); 674 686 675 687 step_en = get_adc_step_mask(adc_dev); 676 688 am335x_tsc_se_clr(adc_dev->mfd_tscadc, step_en);
+1 -3
drivers/iio/adc/twl4030-madc.c
··· 5 5 * conversion of analog signals like battery temperature, 6 6 * battery type, battery level etc. 7 7 * 8 - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 8 + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 9 9 * J Keerthy <j-keerthy@ti.com> 10 10 * 11 11 * Based on twl4030-madc.c ··· 772 772 madc->dev = &pdev->dev; 773 773 774 774 iio_dev->name = dev_name(&pdev->dev); 775 - iio_dev->dev.parent = &pdev->dev; 776 - iio_dev->dev.of_node = pdev->dev.of_node; 777 775 iio_dev->info = &twl4030_madc_iio_info; 778 776 iio_dev->modes = INDIO_DIRECT_MODE; 779 777 iio_dev->channels = twl4030_madc_iio_channels;
-1
drivers/iio/adc/twl6030-gpadc.c
··· 926 926 } 927 927 928 928 indio_dev->name = DRIVER_NAME; 929 - indio_dev->dev.parent = dev; 930 929 indio_dev->info = &twl6030_gpadc_iio_info; 931 930 indio_dev->modes = INDIO_DIRECT_MODE; 932 931 indio_dev->channels = pdata->iio_channels;
+1 -8
drivers/iio/adc/vf610_adc.c
··· 724 724 { 725 725 struct vf610_adc *info = iio_priv(indio_dev); 726 726 unsigned int channel; 727 - int ret; 728 727 int val; 729 - 730 - ret = iio_triggered_buffer_postenable(indio_dev); 731 - if (ret) 732 - return ret; 733 728 734 729 val = readl(info->regs + VF610_REG_ADC_GC); 735 730 val |= VF610_ADC_ADCON; ··· 756 761 757 762 writel(hc_cfg, info->regs + VF610_REG_ADC_HC0); 758 763 759 - return iio_triggered_buffer_predisable(indio_dev); 764 + return 0; 760 765 } 761 766 762 767 static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = { ··· 855 860 init_completion(&info->completion); 856 861 857 862 indio_dev->name = dev_name(&pdev->dev); 858 - indio_dev->dev.parent = &pdev->dev; 859 - indio_dev->dev.of_node = pdev->dev.of_node; 860 863 indio_dev->info = &vf610_adc_iio_info; 861 864 indio_dev->modes = INDIO_DIRECT_MODE; 862 865 indio_dev->channels = vf610_adc_iio_channels;
-1
drivers/iio/adc/viperboard_adc.c
··· 121 121 adc = iio_priv(indio_dev); 122 122 adc->vb = vb; 123 123 indio_dev->name = "viperboard adc"; 124 - indio_dev->dev.parent = &pdev->dev; 125 124 indio_dev->info = &vprbrd_adc_iio_info; 126 125 indio_dev->modes = INDIO_DIRECT_MODE; 127 126 indio_dev->channels = vprbrd_adc_iio_channels;
-4
drivers/iio/adc/xilinx-xadc-core.c
··· 839 839 840 840 static const struct iio_buffer_setup_ops xadc_buffer_ops = { 841 841 .preenable = &xadc_preenable, 842 - .postenable = &iio_triggered_buffer_postenable, 843 - .predisable = &iio_triggered_buffer_predisable, 844 842 .postdisable = &xadc_postdisable, 845 843 }; 846 844 ··· 1219 1221 if (IS_ERR(xadc->base)) 1220 1222 return PTR_ERR(xadc->base); 1221 1223 1222 - indio_dev->dev.parent = &pdev->dev; 1223 - indio_dev->dev.of_node = pdev->dev.of_node; 1224 1224 indio_dev->name = "xadc"; 1225 1225 indio_dev->modes = INDIO_DIRECT_MODE; 1226 1226 indio_dev->info = &xadc_info;
-1
drivers/iio/afe/iio-rescale.c
··· 314 314 rescale->source = source; 315 315 316 316 indio_dev->name = dev_name(dev); 317 - indio_dev->dev.parent = dev; 318 317 indio_dev->info = &rescale_info; 319 318 indio_dev->modes = INDIO_DIRECT_MODE; 320 319 indio_dev->channels = &rescale->chan;
+5 -3
drivers/iio/amplifiers/ad8366.c
··· 262 262 case ID_ADA4961: 263 263 case ID_ADL5240: 264 264 case ID_HMC1119: 265 - st->reset_gpio = devm_gpiod_get(&spi->dev, "reset", 266 - GPIOD_OUT_HIGH); 265 + st->reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_HIGH); 266 + if (IS_ERR(st->reset_gpio)) { 267 + ret = PTR_ERR(st->reset_gpio); 268 + goto error_disable_reg; 269 + } 267 270 indio_dev->channels = ada4961_channels; 268 271 indio_dev->num_channels = ARRAY_SIZE(ada4961_channels); 269 272 break; ··· 277 274 } 278 275 279 276 st->info = &ad8366_infos[st->type]; 280 - indio_dev->dev.parent = &spi->dev; 281 277 indio_dev->name = spi_get_device_id(spi)->name; 282 278 indio_dev->info = &ad8366_info; 283 279 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/amplifiers/hmc425a.c
··· 227 227 228 228 mutex_init(&st->lock); 229 229 230 - indio_dev->dev.parent = &pdev->dev; 231 230 indio_dev->info = &hmc425a_info; 232 231 indio_dev->modes = INDIO_DIRECT_MODE; 233 232
+1 -9
drivers/iio/buffer/industrialio-triggered-buffer.c
··· 13 13 #include <linux/iio/triggered_buffer.h> 14 14 #include <linux/iio/trigger_consumer.h> 15 15 16 - static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = { 17 - .postenable = &iio_triggered_buffer_postenable, 18 - .predisable = &iio_triggered_buffer_predisable, 19 - }; 20 - 21 16 /** 22 17 * iio_triggered_buffer_setup() - Setup triggered buffer and pollfunc 23 18 * @indio_dev: IIO device structure ··· 62 67 } 63 68 64 69 /* Ring buffer functions - here trigger setup related */ 65 - if (setup_ops) 66 - indio_dev->setup_ops = setup_ops; 67 - else 68 - indio_dev->setup_ops = &iio_triggered_buffer_setup_ops; 70 + indio_dev->setup_ops = setup_ops; 69 71 70 72 /* Flag that polled ring buffering is possible */ 71 73 indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
+33
drivers/iio/chemical/Kconfig
··· 85 85 To compile this driver as a module, choose M here: the module will 86 86 be called pms7003. 87 87 88 + config SCD30_CORE 89 + tristate "SCD30 carbon dioxide sensor driver" 90 + select IIO_BUFFER 91 + select IIO_TRIGGERED_BUFFER 92 + help 93 + Say Y here to build support for the Sensirion SCD30 sensor with carbon 94 + dioxide, relative humidity and temperature sensing capabilities. 95 + 96 + To compile this driver as a module, choose M here: the module will 97 + be called scd30_core. 98 + 99 + config SCD30_I2C 100 + tristate "SCD30 carbon dioxide sensor I2C driver" 101 + depends on SCD30_CORE && I2C 102 + select CRC8 103 + help 104 + Say Y here to build support for the Sensirion SCD30 I2C interface 105 + driver. 106 + 107 + To compile this driver as a module, choose M here: the module will 108 + be called scd30_i2c. 109 + 110 + config SCD30_SERIAL 111 + tristate "SCD30 carbon dioxide sensor serial driver" 112 + depends on SCD30_CORE && SERIAL_DEV_BUS 113 + select CRC16 114 + help 115 + Say Y here to build support for the Sensirion SCD30 serial interface 116 + driver. 117 + 118 + To compile this driver as a module, choose M here: the module will 119 + be called scd30_serial. 120 + 88 121 config SENSIRION_SGP30 89 122 tristate "Sensirion SGPxx gas sensors" 90 123 depends on I2C
+3
drivers/iio/chemical/Makefile
··· 12 12 obj-$(CONFIG_CCS811) += ccs811.o 13 13 obj-$(CONFIG_IAQCORE) += ams-iaq-core.o 14 14 obj-$(CONFIG_PMS7003) += pms7003.o 15 + obj-$(CONFIG_SCD30_CORE) += scd30_core.o 16 + obj-$(CONFIG_SCD30_I2C) += scd30_i2c.o 17 + obj-$(CONFIG_SCD30_SERIAL) += scd30_serial.o 15 18 obj-$(CONFIG_SENSIRION_SGP30) += sgp30.o 16 19 obj-$(CONFIG_SPS30) += sps30.o 17 20 obj-$(CONFIG_VZ89X) += vz89x.o
-1
drivers/iio/chemical/ams-iaq-core.c
··· 152 152 data->last_update = jiffies - HZ; 153 153 mutex_init(&data->lock); 154 154 155 - indio_dev->dev.parent = &client->dev; 156 155 indio_dev->info = &ams_iaqcore_info; 157 156 indio_dev->name = dev_name(&client->dev); 158 157 indio_dev->modes = INDIO_DIRECT_MODE;
+2 -3
drivers/iio/chemical/atlas-ezo-sensor.c
··· 69 69 { 70 70 struct atlas_ezo_data *data = iio_priv(indio_dev); 71 71 struct i2c_client *client = data->client; 72 - int ret = 0; 73 72 74 73 if (chan->type != IIO_CONCENTRATION) 75 74 return -EINVAL; 76 75 77 76 switch (mask) { 78 77 case IIO_CHAN_INFO_RAW: { 78 + int ret; 79 79 long tmp; 80 80 81 81 mutex_lock(&data->lock); ··· 110 110 return IIO_VAL_INT_PLUS_MICRO; 111 111 } 112 112 113 - return ret; 113 + return 0; 114 114 } 115 115 116 116 static const struct iio_info atlas_info = { ··· 152 152 indio_dev->channels = chip->channels; 153 153 indio_dev->num_channels = chip->num_channels; 154 154 indio_dev->modes = INDIO_DIRECT_MODE; 155 - indio_dev->dev.parent = &client->dev; 156 155 157 156 data = iio_priv(indio_dev); 158 157 data->client = client;
+1 -6
drivers/iio/chemical/atlas-sensor.c
··· 410 410 struct atlas_data *data = iio_priv(indio_dev); 411 411 int ret; 412 412 413 - ret = iio_triggered_buffer_postenable(indio_dev); 414 - if (ret) 415 - return ret; 416 - 417 413 ret = pm_runtime_get_sync(&data->client->dev); 418 414 if (ret < 0) { 419 415 pm_runtime_put_noidle(&data->client->dev); ··· 433 437 if (ret) 434 438 return ret; 435 439 436 - return iio_triggered_buffer_predisable(indio_dev); 440 + return 0; 437 441 } 438 442 439 443 static const struct iio_trigger_ops atlas_interrupt_trigger_ops = { ··· 640 644 indio_dev->channels = chip->channels; 641 645 indio_dev->num_channels = chip->num_channels; 642 646 indio_dev->modes = INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE; 643 - indio_dev->dev.parent = &client->dev; 644 647 645 648 trig = devm_iio_trigger_alloc(&client->dev, "%s-dev%d", 646 649 indio_dev->name, indio_dev->id);
-1
drivers/iio/chemical/bme680_core.c
··· 923 923 data = iio_priv(indio_dev); 924 924 dev_set_drvdata(dev, indio_dev); 925 925 data->regmap = regmap; 926 - indio_dev->dev.parent = dev; 927 926 indio_dev->name = name; 928 927 indio_dev->channels = bme680_channels; 929 928 indio_dev->num_channels = ARRAY_SIZE(bme680_channels);
-1
drivers/iio/chemical/ccs811.c
··· 464 464 465 465 mutex_init(&data->lock); 466 466 467 - indio_dev->dev.parent = &client->dev; 468 467 indio_dev->name = id->name; 469 468 indio_dev->info = &ccs811_info; 470 469 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/chemical/pms7003.c
··· 280 280 state = iio_priv(indio_dev); 281 281 serdev_device_set_drvdata(serdev, indio_dev); 282 282 state->serdev = serdev; 283 - indio_dev->dev.parent = &serdev->dev; 284 283 indio_dev->info = &pms7003_info; 285 284 indio_dev->name = PMS7003_DRIVER_NAME; 286 285 indio_dev->channels = pms7003_channels,
+78
drivers/iio/chemical/scd30.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0 */ 2 + #ifndef _SCD30_H 3 + #define _SCD30_H 4 + 5 + #include <linux/completion.h> 6 + #include <linux/device.h> 7 + #include <linux/mutex.h> 8 + #include <linux/pm.h> 9 + #include <linux/regulator/consumer.h> 10 + #include <linux/types.h> 11 + 12 + struct scd30_state; 13 + 14 + enum scd30_cmd { 15 + /* start continuous measurement with pressure compensation */ 16 + CMD_START_MEAS, 17 + /* stop continuous measurement */ 18 + CMD_STOP_MEAS, 19 + /* set/get measurement interval */ 20 + CMD_MEAS_INTERVAL, 21 + /* check whether new measurement is ready */ 22 + CMD_MEAS_READY, 23 + /* get measurement */ 24 + CMD_READ_MEAS, 25 + /* turn on/off automatic self calibration */ 26 + CMD_ASC, 27 + /* set/get forced recalibration value */ 28 + CMD_FRC, 29 + /* set/get temperature offset */ 30 + CMD_TEMP_OFFSET, 31 + /* get firmware version */ 32 + CMD_FW_VERSION, 33 + /* reset sensor */ 34 + CMD_RESET, 35 + /* 36 + * Command for altitude compensation was omitted intentionally because 37 + * the same can be achieved by means of CMD_START_MEAS which takes 38 + * pressure above the sea level as an argument. 39 + */ 40 + }; 41 + 42 + #define SCD30_MEAS_COUNT 3 43 + 44 + typedef int (*scd30_command_t)(struct scd30_state *state, enum scd30_cmd cmd, u16 arg, 45 + void *response, int size); 46 + 47 + struct scd30_state { 48 + /* serialize access to the device */ 49 + struct mutex lock; 50 + struct device *dev; 51 + struct regulator *vdd; 52 + struct completion meas_ready; 53 + /* 54 + * priv pointer is solely for serdev driver private data. We keep it 55 + * here because driver_data inside dev has been already used for iio and 56 + * struct serdev_device doesn't have one. 57 + */ 58 + void *priv; 59 + int irq; 60 + /* 61 + * no way to retrieve current ambient pressure compensation value from 62 + * the sensor so keep one around 63 + */ 64 + u16 pressure_comp; 65 + u16 meas_interval; 66 + int meas[SCD30_MEAS_COUNT]; 67 + 68 + scd30_command_t command; 69 + }; 70 + 71 + int scd30_suspend(struct device *dev); 72 + int scd30_resume(struct device *dev); 73 + 74 + static __maybe_unused SIMPLE_DEV_PM_OPS(scd30_pm_ops, scd30_suspend, scd30_resume); 75 + 76 + int scd30_probe(struct device *dev, int irq, const char *name, void *priv, scd30_command_t command); 77 + 78 + #endif
+771
drivers/iio/chemical/scd30_core.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Sensirion SCD30 carbon dioxide sensor core driver 4 + * 5 + * Copyright (c) 2020 Tomasz Duszynski <tomasz.duszynski@octakon.com> 6 + */ 7 + #include <linux/bits.h> 8 + #include <linux/completion.h> 9 + #include <linux/delay.h> 10 + #include <linux/device.h> 11 + #include <linux/errno.h> 12 + #include <linux/export.h> 13 + #include <linux/iio/buffer.h> 14 + #include <linux/iio/iio.h> 15 + #include <linux/iio/sysfs.h> 16 + #include <linux/iio/trigger.h> 17 + #include <linux/iio/trigger_consumer.h> 18 + #include <linux/iio/triggered_buffer.h> 19 + #include <linux/iio/types.h> 20 + #include <linux/interrupt.h> 21 + #include <linux/irqreturn.h> 22 + #include <linux/jiffies.h> 23 + #include <linux/kernel.h> 24 + #include <linux/module.h> 25 + #include <linux/mutex.h> 26 + #include <linux/regulator/consumer.h> 27 + #include <linux/string.h> 28 + #include <linux/sysfs.h> 29 + #include <linux/types.h> 30 + #include <asm/byteorder.h> 31 + 32 + #include "scd30.h" 33 + 34 + #define SCD30_PRESSURE_COMP_MIN_MBAR 700 35 + #define SCD30_PRESSURE_COMP_MAX_MBAR 1400 36 + #define SCD30_PRESSURE_COMP_DEFAULT 1013 37 + #define SCD30_MEAS_INTERVAL_MIN_S 2 38 + #define SCD30_MEAS_INTERVAL_MAX_S 1800 39 + #define SCD30_MEAS_INTERVAL_DEFAULT SCD30_MEAS_INTERVAL_MIN_S 40 + #define SCD30_FRC_MIN_PPM 400 41 + #define SCD30_FRC_MAX_PPM 2000 42 + #define SCD30_TEMP_OFFSET_MAX 655360 43 + #define SCD30_EXTRA_TIMEOUT_PER_S 250 44 + 45 + enum { 46 + SCD30_CONC, 47 + SCD30_TEMP, 48 + SCD30_HR, 49 + }; 50 + 51 + static int scd30_command_write(struct scd30_state *state, enum scd30_cmd cmd, u16 arg) 52 + { 53 + return state->command(state, cmd, arg, NULL, 0); 54 + } 55 + 56 + static int scd30_command_read(struct scd30_state *state, enum scd30_cmd cmd, u16 *val) 57 + { 58 + __be16 tmp; 59 + int ret; 60 + 61 + ret = state->command(state, cmd, 0, &tmp, sizeof(tmp)); 62 + *val = be16_to_cpup(&tmp); 63 + 64 + return ret; 65 + } 66 + 67 + static int scd30_reset(struct scd30_state *state) 68 + { 69 + int ret; 70 + u16 val; 71 + 72 + ret = scd30_command_write(state, CMD_RESET, 0); 73 + if (ret) 74 + return ret; 75 + 76 + /* sensor boots up within 2 secs */ 77 + msleep(2000); 78 + /* 79 + * Power-on-reset causes sensor to produce some glitch on i2c bus and 80 + * some controllers end up in error state. Try to recover by placing 81 + * any data on the bus. 82 + */ 83 + scd30_command_read(state, CMD_MEAS_READY, &val); 84 + 85 + return 0; 86 + } 87 + 88 + /* simplified float to fixed point conversion with a scaling factor of 0.01 */ 89 + static int scd30_float_to_fp(int float32) 90 + { 91 + int fraction, shift, 92 + mantissa = float32 & GENMASK(22, 0), 93 + sign = (float32 & BIT(31)) ? -1 : 1, 94 + exp = (float32 & ~BIT(31)) >> 23; 95 + 96 + /* special case 0 */ 97 + if (!exp && !mantissa) 98 + return 0; 99 + 100 + exp -= 127; 101 + if (exp < 0) { 102 + exp = -exp; 103 + /* return values ranging from 1 to 99 */ 104 + return sign * ((((BIT(23) + mantissa) * 100) >> 23) >> exp); 105 + } 106 + 107 + /* return values starting at 100 */ 108 + shift = 23 - exp; 109 + float32 = BIT(exp) + (mantissa >> shift); 110 + fraction = mantissa & GENMASK(shift - 1, 0); 111 + 112 + return sign * (float32 * 100 + ((fraction * 100) >> shift)); 113 + } 114 + 115 + static int scd30_read_meas(struct scd30_state *state) 116 + { 117 + int i, ret; 118 + 119 + ret = state->command(state, CMD_READ_MEAS, 0, state->meas, sizeof(state->meas)); 120 + if (ret) 121 + return ret; 122 + 123 + be32_to_cpu_array(state->meas, (__be32 *)state->meas, ARRAY_SIZE(state->meas)); 124 + 125 + for (i = 0; i < ARRAY_SIZE(state->meas); i++) 126 + state->meas[i] = scd30_float_to_fp(state->meas[i]); 127 + 128 + /* 129 + * co2 is left unprocessed while temperature and humidity are scaled 130 + * to milli deg C and milli percent respectively. 131 + */ 132 + state->meas[SCD30_TEMP] *= 10; 133 + state->meas[SCD30_HR] *= 10; 134 + 135 + return 0; 136 + } 137 + 138 + static int scd30_wait_meas_irq(struct scd30_state *state) 139 + { 140 + int ret, timeout; 141 + 142 + reinit_completion(&state->meas_ready); 143 + enable_irq(state->irq); 144 + timeout = msecs_to_jiffies(state->meas_interval * (1000 + SCD30_EXTRA_TIMEOUT_PER_S)); 145 + ret = wait_for_completion_interruptible_timeout(&state->meas_ready, timeout); 146 + if (ret > 0) 147 + ret = 0; 148 + else if (!ret) 149 + ret = -ETIMEDOUT; 150 + 151 + disable_irq(state->irq); 152 + 153 + return ret; 154 + } 155 + 156 + static int scd30_wait_meas_poll(struct scd30_state *state) 157 + { 158 + int timeout = state->meas_interval * SCD30_EXTRA_TIMEOUT_PER_S, tries = 5; 159 + 160 + do { 161 + int ret; 162 + u16 val; 163 + 164 + ret = scd30_command_read(state, CMD_MEAS_READY, &val); 165 + if (ret) 166 + return -EIO; 167 + 168 + /* new measurement available */ 169 + if (val) 170 + break; 171 + 172 + msleep_interruptible(timeout); 173 + } while (--tries); 174 + 175 + return tries ? 0 : -ETIMEDOUT; 176 + } 177 + 178 + static int scd30_read_poll(struct scd30_state *state) 179 + { 180 + int ret; 181 + 182 + ret = scd30_wait_meas_poll(state); 183 + if (ret) 184 + return ret; 185 + 186 + return scd30_read_meas(state); 187 + } 188 + 189 + static int scd30_read(struct scd30_state *state) 190 + { 191 + if (state->irq > 0) 192 + return scd30_wait_meas_irq(state); 193 + 194 + return scd30_read_poll(state); 195 + } 196 + 197 + static int scd30_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, 198 + int *val, int *val2, long mask) 199 + { 200 + struct scd30_state *state = iio_priv(indio_dev); 201 + int ret = -EINVAL; 202 + u16 tmp; 203 + 204 + mutex_lock(&state->lock); 205 + switch (mask) { 206 + case IIO_CHAN_INFO_RAW: 207 + case IIO_CHAN_INFO_PROCESSED: 208 + if (chan->output) { 209 + *val = state->pressure_comp; 210 + ret = IIO_VAL_INT; 211 + break; 212 + } 213 + 214 + ret = iio_device_claim_direct_mode(indio_dev); 215 + if (ret) 216 + break; 217 + 218 + ret = scd30_read(state); 219 + if (ret) { 220 + iio_device_release_direct_mode(indio_dev); 221 + break; 222 + } 223 + 224 + *val = state->meas[chan->address]; 225 + iio_device_release_direct_mode(indio_dev); 226 + ret = IIO_VAL_INT; 227 + break; 228 + case IIO_CHAN_INFO_SCALE: 229 + *val = 0; 230 + *val2 = 1; 231 + ret = IIO_VAL_INT_PLUS_MICRO; 232 + break; 233 + case IIO_CHAN_INFO_SAMP_FREQ: 234 + ret = scd30_command_read(state, CMD_MEAS_INTERVAL, &tmp); 235 + if (ret) 236 + break; 237 + 238 + *val = 0; 239 + *val2 = 1000000000 / tmp; 240 + ret = IIO_VAL_INT_PLUS_NANO; 241 + break; 242 + case IIO_CHAN_INFO_CALIBBIAS: 243 + ret = scd30_command_read(state, CMD_TEMP_OFFSET, &tmp); 244 + if (ret) 245 + break; 246 + 247 + *val = tmp; 248 + ret = IIO_VAL_INT; 249 + break; 250 + } 251 + mutex_unlock(&state->lock); 252 + 253 + return ret; 254 + } 255 + 256 + static int scd30_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, 257 + int val, int val2, long mask) 258 + { 259 + struct scd30_state *state = iio_priv(indio_dev); 260 + int ret = -EINVAL; 261 + 262 + mutex_lock(&state->lock); 263 + switch (mask) { 264 + case IIO_CHAN_INFO_SAMP_FREQ: 265 + if (val) 266 + break; 267 + 268 + val = 1000000000 / val2; 269 + if (val < SCD30_MEAS_INTERVAL_MIN_S || val > SCD30_MEAS_INTERVAL_MAX_S) 270 + break; 271 + 272 + ret = scd30_command_write(state, CMD_MEAS_INTERVAL, val); 273 + if (ret) 274 + break; 275 + 276 + state->meas_interval = val; 277 + break; 278 + case IIO_CHAN_INFO_RAW: 279 + switch (chan->type) { 280 + case IIO_PRESSURE: 281 + if (val < SCD30_PRESSURE_COMP_MIN_MBAR || 282 + val > SCD30_PRESSURE_COMP_MAX_MBAR) 283 + break; 284 + 285 + ret = scd30_command_write(state, CMD_START_MEAS, val); 286 + if (ret) 287 + break; 288 + 289 + state->pressure_comp = val; 290 + break; 291 + default: 292 + break; 293 + } 294 + break; 295 + case IIO_CHAN_INFO_CALIBBIAS: 296 + if (val < 0 || val > SCD30_TEMP_OFFSET_MAX) 297 + break; 298 + /* 299 + * Manufacturer does not explicitly specify min/max sensible 300 + * values hence check is omitted for simplicity. 301 + */ 302 + ret = scd30_command_write(state, CMD_TEMP_OFFSET / 10, val); 303 + } 304 + mutex_unlock(&state->lock); 305 + 306 + return ret; 307 + } 308 + 309 + static int scd30_write_raw_get_fmt(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, 310 + long mask) 311 + { 312 + switch (mask) { 313 + case IIO_CHAN_INFO_SAMP_FREQ: 314 + return IIO_VAL_INT_PLUS_NANO; 315 + case IIO_CHAN_INFO_RAW: 316 + case IIO_CHAN_INFO_CALIBBIAS: 317 + return IIO_VAL_INT; 318 + } 319 + 320 + return -EINVAL; 321 + } 322 + 323 + static const int scd30_pressure_raw_available[] = { 324 + SCD30_PRESSURE_COMP_MIN_MBAR, 1, SCD30_PRESSURE_COMP_MAX_MBAR, 325 + }; 326 + 327 + static const int scd30_temp_calibbias_available[] = { 328 + 0, 10, SCD30_TEMP_OFFSET_MAX, 329 + }; 330 + 331 + static int scd30_read_avail(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, 332 + const int **vals, int *type, int *length, long mask) 333 + { 334 + switch (mask) { 335 + case IIO_CHAN_INFO_RAW: 336 + *vals = scd30_pressure_raw_available; 337 + *type = IIO_VAL_INT; 338 + 339 + return IIO_AVAIL_RANGE; 340 + case IIO_CHAN_INFO_CALIBBIAS: 341 + *vals = scd30_temp_calibbias_available; 342 + *type = IIO_VAL_INT; 343 + 344 + return IIO_AVAIL_RANGE; 345 + } 346 + 347 + return -EINVAL; 348 + } 349 + 350 + static ssize_t sampling_frequency_available_show(struct device *dev, struct device_attribute *attr, 351 + char *buf) 352 + { 353 + int i = SCD30_MEAS_INTERVAL_MIN_S; 354 + ssize_t len = 0; 355 + 356 + do { 357 + len += scnprintf(buf + len, PAGE_SIZE - len, "0.%09u ", 1000000000 / i); 358 + /* 359 + * Not all values fit PAGE_SIZE buffer hence print every 6th 360 + * (each frequency differs by 6s in time domain from the 361 + * adjacent). Unlisted but valid ones are still accepted. 362 + */ 363 + i += 6; 364 + } while (i <= SCD30_MEAS_INTERVAL_MAX_S); 365 + 366 + buf[len - 1] = '\n'; 367 + 368 + return len; 369 + } 370 + 371 + static ssize_t calibration_auto_enable_show(struct device *dev, struct device_attribute *attr, 372 + char *buf) 373 + { 374 + struct iio_dev *indio_dev = dev_to_iio_dev(dev); 375 + struct scd30_state *state = iio_priv(indio_dev); 376 + int ret; 377 + u16 val; 378 + 379 + mutex_lock(&state->lock); 380 + ret = scd30_command_read(state, CMD_ASC, &val); 381 + mutex_unlock(&state->lock); 382 + 383 + return ret ?: sprintf(buf, "%d\n", val); 384 + } 385 + 386 + static ssize_t calibration_auto_enable_store(struct device *dev, struct device_attribute *attr, 387 + const char *buf, size_t len) 388 + { 389 + struct iio_dev *indio_dev = dev_to_iio_dev(dev); 390 + struct scd30_state *state = iio_priv(indio_dev); 391 + bool val; 392 + int ret; 393 + 394 + ret = kstrtobool(buf, &val); 395 + if (ret) 396 + return ret; 397 + 398 + mutex_lock(&state->lock); 399 + ret = scd30_command_write(state, CMD_ASC, val); 400 + mutex_unlock(&state->lock); 401 + 402 + return ret ?: len; 403 + } 404 + 405 + static ssize_t calibration_forced_value_show(struct device *dev, struct device_attribute *attr, 406 + char *buf) 407 + { 408 + struct iio_dev *indio_dev = dev_to_iio_dev(dev); 409 + struct scd30_state *state = iio_priv(indio_dev); 410 + int ret; 411 + u16 val; 412 + 413 + mutex_lock(&state->lock); 414 + ret = scd30_command_read(state, CMD_FRC, &val); 415 + mutex_unlock(&state->lock); 416 + 417 + return ret ?: sprintf(buf, "%d\n", val); 418 + } 419 + 420 + static ssize_t calibration_forced_value_store(struct device *dev, struct device_attribute *attr, 421 + const char *buf, size_t len) 422 + { 423 + struct iio_dev *indio_dev = dev_to_iio_dev(dev); 424 + struct scd30_state *state = iio_priv(indio_dev); 425 + int ret; 426 + u16 val; 427 + 428 + ret = kstrtou16(buf, 0, &val); 429 + if (ret) 430 + return ret; 431 + 432 + if (val < SCD30_FRC_MIN_PPM || val > SCD30_FRC_MAX_PPM) 433 + return -EINVAL; 434 + 435 + mutex_lock(&state->lock); 436 + ret = scd30_command_write(state, CMD_FRC, val); 437 + mutex_unlock(&state->lock); 438 + 439 + return ret ?: len; 440 + } 441 + 442 + static IIO_DEVICE_ATTR_RO(sampling_frequency_available, 0); 443 + static IIO_DEVICE_ATTR_RW(calibration_auto_enable, 0); 444 + static IIO_DEVICE_ATTR_RW(calibration_forced_value, 0); 445 + 446 + static struct attribute *scd30_attrs[] = { 447 + &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 448 + &iio_dev_attr_calibration_auto_enable.dev_attr.attr, 449 + &iio_dev_attr_calibration_forced_value.dev_attr.attr, 450 + NULL 451 + }; 452 + 453 + static const struct attribute_group scd30_attr_group = { 454 + .attrs = scd30_attrs, 455 + }; 456 + 457 + static const struct iio_info scd30_info = { 458 + .attrs = &scd30_attr_group, 459 + .read_raw = scd30_read_raw, 460 + .write_raw = scd30_write_raw, 461 + .write_raw_get_fmt = scd30_write_raw_get_fmt, 462 + .read_avail = scd30_read_avail, 463 + }; 464 + 465 + #define SCD30_CHAN_SCAN_TYPE(_sign, _realbits) .scan_type = { \ 466 + .sign = _sign, \ 467 + .realbits = _realbits, \ 468 + .storagebits = 32, \ 469 + .endianness = IIO_CPU, \ 470 + } 471 + 472 + static const struct iio_chan_spec scd30_channels[] = { 473 + { 474 + /* 475 + * this channel is special in a sense we are pretending that 476 + * sensor is able to change measurement chamber pressure but in 477 + * fact we're just setting pressure compensation value 478 + */ 479 + .type = IIO_PRESSURE, 480 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 481 + .info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW), 482 + .output = 1, 483 + .scan_index = -1, 484 + }, 485 + { 486 + .type = IIO_CONCENTRATION, 487 + .channel2 = IIO_MOD_CO2, 488 + .address = SCD30_CONC, 489 + .scan_index = SCD30_CONC, 490 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 491 + BIT(IIO_CHAN_INFO_SCALE), 492 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 493 + .modified = 1, 494 + 495 + SCD30_CHAN_SCAN_TYPE('u', 20), 496 + }, 497 + { 498 + .type = IIO_TEMP, 499 + .address = SCD30_TEMP, 500 + .scan_index = SCD30_TEMP, 501 + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | 502 + BIT(IIO_CHAN_INFO_CALIBBIAS), 503 + .info_mask_separate_available = BIT(IIO_CHAN_INFO_CALIBBIAS), 504 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 505 + 506 + SCD30_CHAN_SCAN_TYPE('s', 18), 507 + }, 508 + { 509 + .type = IIO_HUMIDITYRELATIVE, 510 + .address = SCD30_HR, 511 + .scan_index = SCD30_HR, 512 + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), 513 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 514 + 515 + SCD30_CHAN_SCAN_TYPE('u', 17), 516 + }, 517 + IIO_CHAN_SOFT_TIMESTAMP(3), 518 + }; 519 + 520 + int __maybe_unused scd30_suspend(struct device *dev) 521 + { 522 + struct iio_dev *indio_dev = dev_get_drvdata(dev); 523 + struct scd30_state *state = iio_priv(indio_dev); 524 + int ret; 525 + 526 + ret = scd30_command_write(state, CMD_STOP_MEAS, 0); 527 + if (ret) 528 + return ret; 529 + 530 + return regulator_disable(state->vdd); 531 + } 532 + EXPORT_SYMBOL(scd30_suspend); 533 + 534 + int __maybe_unused scd30_resume(struct device *dev) 535 + { 536 + struct iio_dev *indio_dev = dev_get_drvdata(dev); 537 + struct scd30_state *state = iio_priv(indio_dev); 538 + int ret; 539 + 540 + ret = regulator_enable(state->vdd); 541 + if (ret) 542 + return ret; 543 + 544 + return scd30_command_write(state, CMD_START_MEAS, state->pressure_comp); 545 + } 546 + EXPORT_SYMBOL(scd30_resume); 547 + 548 + static void scd30_stop_meas(void *data) 549 + { 550 + struct scd30_state *state = data; 551 + 552 + scd30_command_write(state, CMD_STOP_MEAS, 0); 553 + } 554 + 555 + static void scd30_disable_regulator(void *data) 556 + { 557 + struct scd30_state *state = data; 558 + 559 + regulator_disable(state->vdd); 560 + } 561 + 562 + static irqreturn_t scd30_irq_handler(int irq, void *priv) 563 + { 564 + struct iio_dev *indio_dev = priv; 565 + 566 + if (iio_buffer_enabled(indio_dev)) { 567 + iio_trigger_poll(indio_dev->trig); 568 + 569 + return IRQ_HANDLED; 570 + } 571 + 572 + return IRQ_WAKE_THREAD; 573 + } 574 + 575 + static irqreturn_t scd30_irq_thread_handler(int irq, void *priv) 576 + { 577 + struct iio_dev *indio_dev = priv; 578 + struct scd30_state *state = iio_priv(indio_dev); 579 + int ret; 580 + 581 + ret = scd30_read_meas(state); 582 + if (ret) 583 + goto out; 584 + 585 + complete_all(&state->meas_ready); 586 + out: 587 + return IRQ_HANDLED; 588 + } 589 + 590 + static irqreturn_t scd30_trigger_handler(int irq, void *p) 591 + { 592 + struct iio_poll_func *pf = p; 593 + struct iio_dev *indio_dev = pf->indio_dev; 594 + struct scd30_state *state = iio_priv(indio_dev); 595 + struct { 596 + int data[SCD30_MEAS_COUNT]; 597 + s64 ts __aligned(8); 598 + } scan; 599 + int ret; 600 + 601 + mutex_lock(&state->lock); 602 + if (!iio_trigger_using_own(indio_dev)) 603 + ret = scd30_read_poll(state); 604 + else 605 + ret = scd30_read_meas(state); 606 + memset(&scan, 0, sizeof(scan)); 607 + memcpy(scan.data, state->meas, sizeof(state->meas)); 608 + mutex_unlock(&state->lock); 609 + if (ret) 610 + goto out; 611 + 612 + iio_push_to_buffers_with_timestamp(indio_dev, &scan, iio_get_time_ns(indio_dev)); 613 + out: 614 + iio_trigger_notify_done(indio_dev->trig); 615 + return IRQ_HANDLED; 616 + } 617 + 618 + static int scd30_set_trigger_state(struct iio_trigger *trig, bool state) 619 + { 620 + struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 621 + struct scd30_state *st = iio_priv(indio_dev); 622 + 623 + if (state) 624 + enable_irq(st->irq); 625 + else 626 + disable_irq(st->irq); 627 + 628 + return 0; 629 + } 630 + 631 + static const struct iio_trigger_ops scd30_trigger_ops = { 632 + .set_trigger_state = scd30_set_trigger_state, 633 + .validate_device = iio_trigger_validate_own_device, 634 + }; 635 + 636 + static int scd30_setup_trigger(struct iio_dev *indio_dev) 637 + { 638 + struct scd30_state *state = iio_priv(indio_dev); 639 + struct device *dev = indio_dev->dev.parent; 640 + struct iio_trigger *trig; 641 + int ret; 642 + 643 + trig = devm_iio_trigger_alloc(dev, "%s-dev%d", indio_dev->name, indio_dev->id); 644 + if (!trig) { 645 + dev_err(dev, "failed to allocate trigger\n"); 646 + return -ENOMEM; 647 + } 648 + 649 + trig->dev.parent = dev; 650 + trig->ops = &scd30_trigger_ops; 651 + iio_trigger_set_drvdata(trig, indio_dev); 652 + 653 + ret = devm_iio_trigger_register(dev, trig); 654 + if (ret) 655 + return ret; 656 + 657 + indio_dev->trig = iio_trigger_get(trig); 658 + 659 + ret = devm_request_threaded_irq(dev, state->irq, scd30_irq_handler, 660 + scd30_irq_thread_handler, IRQF_TRIGGER_HIGH | IRQF_ONESHOT, 661 + indio_dev->name, indio_dev); 662 + if (ret) 663 + dev_err(dev, "failed to request irq\n"); 664 + 665 + /* 666 + * Interrupt is enabled just before taking a fresh measurement 667 + * and disabled afterwards. This means we need to disable it here 668 + * to keep calls to enable/disable balanced. 669 + */ 670 + disable_irq(state->irq); 671 + 672 + return ret; 673 + } 674 + 675 + int scd30_probe(struct device *dev, int irq, const char *name, void *priv, 676 + scd30_command_t command) 677 + { 678 + static const unsigned long scd30_scan_masks[] = { 0x07, 0x00 }; 679 + struct scd30_state *state; 680 + struct iio_dev *indio_dev; 681 + int ret; 682 + u16 val; 683 + 684 + indio_dev = devm_iio_device_alloc(dev, sizeof(*state)); 685 + if (!indio_dev) 686 + return -ENOMEM; 687 + 688 + state = iio_priv(indio_dev); 689 + state->dev = dev; 690 + state->priv = priv; 691 + state->irq = irq; 692 + state->pressure_comp = SCD30_PRESSURE_COMP_DEFAULT; 693 + state->meas_interval = SCD30_MEAS_INTERVAL_DEFAULT; 694 + state->command = command; 695 + mutex_init(&state->lock); 696 + init_completion(&state->meas_ready); 697 + 698 + dev_set_drvdata(dev, indio_dev); 699 + 700 + indio_dev->info = &scd30_info; 701 + indio_dev->name = name; 702 + indio_dev->channels = scd30_channels; 703 + indio_dev->num_channels = ARRAY_SIZE(scd30_channels); 704 + indio_dev->modes = INDIO_DIRECT_MODE; 705 + indio_dev->available_scan_masks = scd30_scan_masks; 706 + 707 + state->vdd = devm_regulator_get(dev, "vdd"); 708 + if (IS_ERR(state->vdd)) { 709 + if (PTR_ERR(state->vdd) == -EPROBE_DEFER) 710 + return -EPROBE_DEFER; 711 + 712 + dev_err(dev, "failed to get regulator\n"); 713 + return PTR_ERR(state->vdd); 714 + } 715 + 716 + ret = regulator_enable(state->vdd); 717 + if (ret) 718 + return ret; 719 + 720 + ret = devm_add_action_or_reset(dev, scd30_disable_regulator, state); 721 + if (ret) 722 + return ret; 723 + 724 + ret = scd30_reset(state); 725 + if (ret) { 726 + dev_err(dev, "failed to reset device: %d\n", ret); 727 + return ret; 728 + } 729 + 730 + if (state->irq > 0) { 731 + ret = scd30_setup_trigger(indio_dev); 732 + if (ret) { 733 + dev_err(dev, "failed to setup trigger: %d\n", ret); 734 + return ret; 735 + } 736 + } 737 + 738 + ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL, scd30_trigger_handler, NULL); 739 + if (ret) 740 + return ret; 741 + 742 + ret = scd30_command_read(state, CMD_FW_VERSION, &val); 743 + if (ret) { 744 + dev_err(dev, "failed to read firmware version: %d\n", ret); 745 + return ret; 746 + } 747 + dev_info(dev, "firmware version: %d.%d\n", val >> 8, (char)val); 748 + 749 + ret = scd30_command_write(state, CMD_MEAS_INTERVAL, state->meas_interval); 750 + if (ret) { 751 + dev_err(dev, "failed to set measurement interval: %d\n", ret); 752 + return ret; 753 + } 754 + 755 + ret = scd30_command_write(state, CMD_START_MEAS, state->pressure_comp); 756 + if (ret) { 757 + dev_err(dev, "failed to start measurement: %d\n", ret); 758 + return ret; 759 + } 760 + 761 + ret = devm_add_action_or_reset(dev, scd30_stop_meas, state); 762 + if (ret) 763 + return ret; 764 + 765 + return devm_iio_device_register(dev, indio_dev); 766 + } 767 + EXPORT_SYMBOL(scd30_probe); 768 + 769 + MODULE_AUTHOR("Tomasz Duszynski <tomasz.duszynski@octakon.com>"); 770 + MODULE_DESCRIPTION("Sensirion SCD30 carbon dioxide sensor core driver"); 771 + MODULE_LICENSE("GPL v2");
+139
drivers/iio/chemical/scd30_i2c.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Sensirion SCD30 carbon dioxide sensor i2c driver 4 + * 5 + * Copyright (c) 2020 Tomasz Duszynski <tomasz.duszynski@octakon.com> 6 + * 7 + * I2C slave address: 0x61 8 + */ 9 + #include <linux/crc8.h> 10 + #include <linux/device.h> 11 + #include <linux/errno.h> 12 + #include <linux/i2c.h> 13 + #include <linux/mod_devicetable.h> 14 + #include <linux/module.h> 15 + #include <linux/types.h> 16 + #include <asm/unaligned.h> 17 + 18 + #include "scd30.h" 19 + 20 + #define SCD30_I2C_MAX_BUF_SIZE 18 21 + #define SCD30_I2C_CRC8_POLYNOMIAL 0x31 22 + 23 + static u16 scd30_i2c_cmd_lookup_tbl[] = { 24 + [CMD_START_MEAS] = 0x0010, 25 + [CMD_STOP_MEAS] = 0x0104, 26 + [CMD_MEAS_INTERVAL] = 0x4600, 27 + [CMD_MEAS_READY] = 0x0202, 28 + [CMD_READ_MEAS] = 0x0300, 29 + [CMD_ASC] = 0x5306, 30 + [CMD_FRC] = 0x5204, 31 + [CMD_TEMP_OFFSET] = 0x5403, 32 + [CMD_FW_VERSION] = 0xd100, 33 + [CMD_RESET] = 0xd304, 34 + }; 35 + 36 + DECLARE_CRC8_TABLE(scd30_i2c_crc8_tbl); 37 + 38 + static int scd30_i2c_xfer(struct scd30_state *state, char *txbuf, int txsize, 39 + char *rxbuf, int rxsize) 40 + { 41 + struct i2c_client *client = to_i2c_client(state->dev); 42 + int ret; 43 + 44 + /* 45 + * repeated start is not supported hence instead of sending two i2c 46 + * messages in a row we send one by one 47 + */ 48 + ret = i2c_master_send(client, txbuf, txsize); 49 + if (ret < 0) 50 + return ret; 51 + if (ret != txsize) 52 + return -EIO; 53 + 54 + if (!rxbuf) 55 + return 0; 56 + 57 + ret = i2c_master_recv(client, rxbuf, rxsize); 58 + if (ret < 0) 59 + return ret; 60 + if (ret != rxsize) 61 + return -EIO; 62 + 63 + return 0; 64 + } 65 + 66 + static int scd30_i2c_command(struct scd30_state *state, enum scd30_cmd cmd, u16 arg, 67 + void *response, int size) 68 + { 69 + char buf[SCD30_I2C_MAX_BUF_SIZE]; 70 + char *rsp = response; 71 + int i, ret; 72 + char crc; 73 + 74 + put_unaligned_be16(scd30_i2c_cmd_lookup_tbl[cmd], buf); 75 + i = 2; 76 + 77 + if (rsp) { 78 + /* each two bytes are followed by a crc8 */ 79 + size += size / 2; 80 + } else { 81 + put_unaligned_be16(arg, buf + i); 82 + crc = crc8(scd30_i2c_crc8_tbl, buf + i, 2, CRC8_INIT_VALUE); 83 + i += 2; 84 + buf[i] = crc; 85 + i += 1; 86 + 87 + /* commands below don't take an argument */ 88 + if ((cmd == CMD_STOP_MEAS) || (cmd == CMD_RESET)) 89 + i -= 3; 90 + } 91 + 92 + ret = scd30_i2c_xfer(state, buf, i, buf, size); 93 + if (ret) 94 + return ret; 95 + 96 + /* validate received data and strip off crc bytes */ 97 + for (i = 0; i < size; i += 3) { 98 + crc = crc8(scd30_i2c_crc8_tbl, buf + i, 2, CRC8_INIT_VALUE); 99 + if (crc != buf[i + 2]) { 100 + dev_err(state->dev, "data integrity check failed\n"); 101 + return -EIO; 102 + } 103 + 104 + *rsp++ = buf[i]; 105 + *rsp++ = buf[i + 1]; 106 + } 107 + 108 + return 0; 109 + } 110 + 111 + static int scd30_i2c_probe(struct i2c_client *client) 112 + { 113 + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 114 + return -EOPNOTSUPP; 115 + 116 + crc8_populate_msb(scd30_i2c_crc8_tbl, SCD30_I2C_CRC8_POLYNOMIAL); 117 + 118 + return scd30_probe(&client->dev, client->irq, client->name, NULL, scd30_i2c_command); 119 + } 120 + 121 + static const struct of_device_id scd30_i2c_of_match[] = { 122 + { .compatible = "sensirion,scd30" }, 123 + { } 124 + }; 125 + MODULE_DEVICE_TABLE(of, scd30_i2c_of_match); 126 + 127 + static struct i2c_driver scd30_i2c_driver = { 128 + .driver = { 129 + .name = KBUILD_MODNAME, 130 + .of_match_table = scd30_i2c_of_match, 131 + .pm = &scd30_pm_ops, 132 + }, 133 + .probe_new = scd30_i2c_probe, 134 + }; 135 + module_i2c_driver(scd30_i2c_driver); 136 + 137 + MODULE_AUTHOR("Tomasz Duszynski <tomasz.duszynski@octakon.com>"); 138 + MODULE_DESCRIPTION("Sensirion SCD30 carbon dioxide sensor i2c driver"); 139 + MODULE_LICENSE("GPL v2");
+263
drivers/iio/chemical/scd30_serial.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Sensirion SCD30 carbon dioxide sensor serial driver 4 + * 5 + * Copyright (c) 2020 Tomasz Duszynski <tomasz.duszynski@octakon.com> 6 + */ 7 + #include <linux/crc16.h> 8 + #include <linux/device.h> 9 + #include <linux/errno.h> 10 + #include <linux/iio/iio.h> 11 + #include <linux/jiffies.h> 12 + #include <linux/mod_devicetable.h> 13 + #include <linux/module.h> 14 + #include <linux/property.h> 15 + #include <linux/serdev.h> 16 + #include <linux/string.h> 17 + #include <linux/types.h> 18 + #include <asm/unaligned.h> 19 + 20 + #include "scd30.h" 21 + 22 + #define SCD30_SERDEV_ADDR 0x61 23 + #define SCD30_SERDEV_WRITE 0x06 24 + #define SCD30_SERDEV_READ 0x03 25 + #define SCD30_SERDEV_MAX_BUF_SIZE 17 26 + #define SCD30_SERDEV_RX_HEADER_SIZE 3 27 + #define SCD30_SERDEV_CRC_SIZE 2 28 + #define SCD30_SERDEV_TIMEOUT msecs_to_jiffies(200) 29 + 30 + struct scd30_serdev_priv { 31 + struct completion meas_ready; 32 + char *buf; 33 + int num_expected; 34 + int num; 35 + }; 36 + 37 + static u16 scd30_serdev_cmd_lookup_tbl[] = { 38 + [CMD_START_MEAS] = 0x0036, 39 + [CMD_STOP_MEAS] = 0x0037, 40 + [CMD_MEAS_INTERVAL] = 0x0025, 41 + [CMD_MEAS_READY] = 0x0027, 42 + [CMD_READ_MEAS] = 0x0028, 43 + [CMD_ASC] = 0x003a, 44 + [CMD_FRC] = 0x0039, 45 + [CMD_TEMP_OFFSET] = 0x003b, 46 + [CMD_FW_VERSION] = 0x0020, 47 + [CMD_RESET] = 0x0034, 48 + }; 49 + 50 + static u16 scd30_serdev_calc_crc(const char *buf, int size) 51 + { 52 + return crc16(0xffff, buf, size); 53 + } 54 + 55 + static int scd30_serdev_xfer(struct scd30_state *state, char *txbuf, int txsize, 56 + char *rxbuf, int rxsize) 57 + { 58 + struct serdev_device *serdev = to_serdev_device(state->dev); 59 + struct scd30_serdev_priv *priv = state->priv; 60 + int ret; 61 + 62 + priv->buf = rxbuf; 63 + priv->num_expected = rxsize; 64 + priv->num = 0; 65 + 66 + ret = serdev_device_write(serdev, txbuf, txsize, SCD30_SERDEV_TIMEOUT); 67 + if (ret < 0) 68 + return ret; 69 + if (ret != txsize) 70 + return -EIO; 71 + 72 + ret = wait_for_completion_interruptible_timeout(&priv->meas_ready, SCD30_SERDEV_TIMEOUT); 73 + if (ret < 0) 74 + return ret; 75 + if (!ret) 76 + return -ETIMEDOUT; 77 + 78 + return 0; 79 + } 80 + 81 + static int scd30_serdev_command(struct scd30_state *state, enum scd30_cmd cmd, u16 arg, 82 + void *response, int size) 83 + { 84 + /* 85 + * Communication over serial line is based on modbus protocol (or rather 86 + * its variation called modbus over serial to be precise). Upon 87 + * receiving a request device should reply with response. 88 + * 89 + * Frame below represents a request message. Each field takes 90 + * exactly one byte. 91 + * 92 + * +------+------+-----+-----+-------+-------+-----+-----+ 93 + * | dev | op | reg | reg | byte1 | byte0 | crc | crc | 94 + * | addr | code | msb | lsb | | | lsb | msb | 95 + * +------+------+-----+-----+-------+-------+-----+-----+ 96 + * 97 + * The message device replies with depends on the 'op code' field from 98 + * the request. In case it was set to SCD30_SERDEV_WRITE sensor should 99 + * reply with unchanged request. Otherwise 'op code' was set to 100 + * SCD30_SERDEV_READ and response looks like the one below. As with 101 + * request, each field takes one byte. 102 + * 103 + * +------+------+--------+-------+-----+-------+-----+-----+ 104 + * | dev | op | num of | byte0 | ... | byteN | crc | crc | 105 + * | addr | code | bytes | | | | lsb | msb | 106 + * +------+------+--------+-------+-----+-------+-----+-----+ 107 + */ 108 + char txbuf[SCD30_SERDEV_MAX_BUF_SIZE] = { SCD30_SERDEV_ADDR }, 109 + rxbuf[SCD30_SERDEV_MAX_BUF_SIZE]; 110 + int ret, rxsize, txsize = 2; 111 + char *rsp = response; 112 + u16 crc; 113 + 114 + put_unaligned_be16(scd30_serdev_cmd_lookup_tbl[cmd], txbuf + txsize); 115 + txsize += 2; 116 + 117 + if (rsp) { 118 + txbuf[1] = SCD30_SERDEV_READ; 119 + if (cmd == CMD_READ_MEAS) 120 + /* number of u16 words to read */ 121 + put_unaligned_be16(size / 2, txbuf + txsize); 122 + else 123 + put_unaligned_be16(0x0001, txbuf + txsize); 124 + txsize += 2; 125 + crc = scd30_serdev_calc_crc(txbuf, txsize); 126 + put_unaligned_le16(crc, txbuf + txsize); 127 + txsize += 2; 128 + rxsize = SCD30_SERDEV_RX_HEADER_SIZE + size + SCD30_SERDEV_CRC_SIZE; 129 + } else { 130 + if ((cmd == CMD_STOP_MEAS) || (cmd == CMD_RESET)) 131 + arg = 0x0001; 132 + 133 + txbuf[1] = SCD30_SERDEV_WRITE; 134 + put_unaligned_be16(arg, txbuf + txsize); 135 + txsize += 2; 136 + crc = scd30_serdev_calc_crc(txbuf, txsize); 137 + put_unaligned_le16(crc, txbuf + txsize); 138 + txsize += 2; 139 + rxsize = txsize; 140 + } 141 + 142 + ret = scd30_serdev_xfer(state, txbuf, txsize, rxbuf, rxsize); 143 + if (ret) 144 + return ret; 145 + 146 + switch (txbuf[1]) { 147 + case SCD30_SERDEV_WRITE: 148 + if (memcmp(txbuf, rxbuf, txsize)) { 149 + dev_err(state->dev, "wrong message received\n"); 150 + return -EIO; 151 + } 152 + break; 153 + case SCD30_SERDEV_READ: 154 + if (rxbuf[2] != (rxsize - SCD30_SERDEV_RX_HEADER_SIZE - SCD30_SERDEV_CRC_SIZE)) { 155 + dev_err(state->dev, "received data size does not match header\n"); 156 + return -EIO; 157 + } 158 + 159 + rxsize -= SCD30_SERDEV_CRC_SIZE; 160 + crc = get_unaligned_le16(rxbuf + rxsize); 161 + if (crc != scd30_serdev_calc_crc(rxbuf, rxsize)) { 162 + dev_err(state->dev, "data integrity check failed\n"); 163 + return -EIO; 164 + } 165 + 166 + rxsize -= SCD30_SERDEV_RX_HEADER_SIZE; 167 + memcpy(rsp, rxbuf + SCD30_SERDEV_RX_HEADER_SIZE, rxsize); 168 + break; 169 + default: 170 + dev_err(state->dev, "received unknown op code\n"); 171 + return -EIO; 172 + } 173 + 174 + return 0; 175 + } 176 + 177 + static int scd30_serdev_receive_buf(struct serdev_device *serdev, 178 + const unsigned char *buf, size_t size) 179 + { 180 + struct iio_dev *indio_dev = dev_get_drvdata(&serdev->dev); 181 + struct scd30_serdev_priv *priv; 182 + struct scd30_state *state; 183 + int num; 184 + 185 + if (!indio_dev) 186 + return 0; 187 + 188 + state = iio_priv(indio_dev); 189 + priv = state->priv; 190 + 191 + /* just in case sensor puts some unexpected bytes on the bus */ 192 + if (!priv->buf) 193 + return 0; 194 + 195 + if (priv->num + size >= priv->num_expected) 196 + num = priv->num_expected - priv->num; 197 + else 198 + num = size; 199 + 200 + memcpy(priv->buf + priv->num, buf, num); 201 + priv->num += num; 202 + 203 + if (priv->num == priv->num_expected) { 204 + priv->buf = NULL; 205 + complete(&priv->meas_ready); 206 + } 207 + 208 + return num; 209 + } 210 + 211 + static const struct serdev_device_ops scd30_serdev_ops = { 212 + .receive_buf = scd30_serdev_receive_buf, 213 + .write_wakeup = serdev_device_write_wakeup, 214 + }; 215 + 216 + static int scd30_serdev_probe(struct serdev_device *serdev) 217 + { 218 + struct device *dev = &serdev->dev; 219 + struct scd30_serdev_priv *priv; 220 + int irq, ret; 221 + 222 + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 223 + if (!priv) 224 + return -ENOMEM; 225 + 226 + init_completion(&priv->meas_ready); 227 + serdev_device_set_client_ops(serdev, &scd30_serdev_ops); 228 + 229 + ret = devm_serdev_device_open(dev, serdev); 230 + if (ret) 231 + return ret; 232 + 233 + serdev_device_set_baudrate(serdev, 19200); 234 + serdev_device_set_flow_control(serdev, false); 235 + 236 + ret = serdev_device_set_parity(serdev, SERDEV_PARITY_NONE); 237 + if (ret) 238 + return ret; 239 + 240 + irq = fwnode_irq_get(dev_fwnode(dev), 0); 241 + 242 + return scd30_probe(dev, irq, KBUILD_MODNAME, priv, scd30_serdev_command); 243 + } 244 + 245 + static const struct of_device_id scd30_serdev_of_match[] = { 246 + { .compatible = "sensirion,scd30" }, 247 + { } 248 + }; 249 + MODULE_DEVICE_TABLE(of, scd30_serdev_of_match); 250 + 251 + static struct serdev_device_driver scd30_serdev_driver = { 252 + .driver = { 253 + .name = KBUILD_MODNAME, 254 + .of_match_table = scd30_serdev_of_match, 255 + .pm = &scd30_pm_ops, 256 + }, 257 + .probe = scd30_serdev_probe, 258 + }; 259 + module_serdev_device_driver(scd30_serdev_driver); 260 + 261 + MODULE_AUTHOR("Tomasz Duszynski <tomasz.duszynski@octakon.com>"); 262 + MODULE_DESCRIPTION("Sensirion SCD30 carbon dioxide sensor serial driver"); 263 + MODULE_LICENSE("GPL v2");
-1
drivers/iio/chemical/sgp30.c
··· 533 533 if (ret) 534 534 return ret; 535 535 536 - indio_dev->dev.parent = &client->dev; 537 536 indio_dev->info = &sgp_info; 538 537 indio_dev->name = id->name; 539 538 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/chemical/sps30.c
··· 487 487 i2c_set_clientdata(client, indio_dev); 488 488 state->client = client; 489 489 state->state = RESET; 490 - indio_dev->dev.parent = &client->dev; 491 490 indio_dev->info = &sps30_info; 492 491 indio_dev->name = client->name; 493 492 indio_dev->channels = sps30_channels;
-1
drivers/iio/chemical/vz89x.c
··· 382 382 data->last_update = jiffies - HZ; 383 383 mutex_init(&data->lock); 384 384 385 - indio_dev->dev.parent = &client->dev; 386 385 indio_dev->info = &vz89x_info; 387 386 indio_dev->name = dev_name(&client->dev); 388 387 indio_dev->modes = INDIO_DIRECT_MODE;
+5
drivers/iio/common/cros_ec_sensors/cros_ec_sensors.c
··· 200 200 st->core.param.sensor_range.roundup = 1; 201 201 202 202 ret = cros_ec_motion_send_host_cmd(&st->core, 0); 203 + if (ret == 0) { 204 + st->core.range_updated = true; 205 + st->core.curr_range = val; 206 + } 203 207 break; 204 208 default: 205 209 ret = cros_ec_sensors_core_write( ··· 319 315 static struct platform_driver cros_ec_sensors_platform_driver = { 320 316 .driver = { 321 317 .name = "cros-ec-sensors", 318 + .pm = &cros_ec_sensors_pm_ops, 322 319 }, 323 320 .probe = cros_ec_sensors_probe, 324 321 .id_table = cros_ec_sensors_ids,
+22 -2
drivers/iio/common/cros_ec_sensors/cros_ec_sensors_core.c
··· 281 281 state->msg->command = EC_CMD_MOTION_SENSE_CMD + ec->cmd_offset; 282 282 state->msg->outsize = sizeof(struct ec_params_motion_sense); 283 283 284 - indio_dev->dev.parent = &pdev->dev; 285 284 indio_dev->name = pdev->name; 286 285 287 286 if (physical_device) { ··· 351 352 } else { 352 353 /* 353 354 * The only way to get samples in buffer is to set a 354 - * software tigger (systrig, hrtimer). 355 + * software trigger (systrig, hrtimer). 355 356 */ 356 357 ret = devm_iio_triggered_buffer_setup( 357 358 dev, indio_dev, NULL, trigger_capture, ··· 822 823 return ret; 823 824 } 824 825 EXPORT_SYMBOL_GPL(cros_ec_sensors_core_write); 826 + 827 + static int __maybe_unused cros_ec_sensors_resume(struct device *dev) 828 + { 829 + struct platform_device *pdev = to_platform_device(dev); 830 + struct iio_dev *indio_dev = platform_get_drvdata(pdev); 831 + struct cros_ec_sensors_core_state *st = iio_priv(indio_dev); 832 + int ret = 0; 833 + 834 + if (st->range_updated) { 835 + mutex_lock(&st->cmd_lock); 836 + st->param.cmd = MOTIONSENSE_CMD_SENSOR_RANGE; 837 + st->param.sensor_range.data = st->curr_range; 838 + st->param.sensor_range.roundup = 1; 839 + ret = cros_ec_motion_send_host_cmd(st, 0); 840 + mutex_unlock(&st->cmd_lock); 841 + } 842 + return ret; 843 + } 844 + 845 + SIMPLE_DEV_PM_OPS(cros_ec_sensors_pm_ops, NULL, cros_ec_sensors_resume); 846 + EXPORT_SYMBOL_GPL(cros_ec_sensors_pm_ops); 825 847 826 848 MODULE_DESCRIPTION("ChromeOS EC sensor hub core functions"); 827 849 MODULE_LICENSE("GPL v2");
-1
drivers/iio/common/st_sensors/st_sensors_i2c.c
··· 56 56 57 57 i2c_set_clientdata(client, indio_dev); 58 58 59 - indio_dev->dev.parent = &client->dev; 60 59 indio_dev->name = client->name; 61 60 62 61 sdata->dev = &client->dev;
-1
drivers/iio/common/st_sensors/st_sensors_spi.c
··· 108 108 109 109 spi_set_drvdata(spi, indio_dev); 110 110 111 - indio_dev->dev.parent = &spi->dev; 112 111 indio_dev->name = spi->modalias; 113 112 114 113 sdata->dev = &spi->dev;
-1
drivers/iio/dac/ad5064.c
··· 874 874 return ret; 875 875 } 876 876 877 - indio_dev->dev.parent = dev; 878 877 indio_dev->name = name; 879 878 indio_dev->info = &ad5064_info; 880 879 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/dac/ad5360.c
··· 476 476 st->chip_info = &ad5360_chip_info_tbl[type]; 477 477 st->spi = spi; 478 478 479 - indio_dev->dev.parent = &spi->dev; 480 479 indio_dev->name = spi_get_device_id(spi)->name; 481 480 indio_dev->info = &ad5360_info; 482 481 indio_dev->modes = INDIO_DIRECT_MODE;
+1 -2
drivers/iio/dac/ad5380.c
··· 240 240 .write_raw = ad5380_write_raw, 241 241 }; 242 242 243 - static struct iio_chan_spec_ext_info ad5380_ext_info[] = { 243 + static const struct iio_chan_spec_ext_info ad5380_ext_info[] = { 244 244 { 245 245 .name = "powerdown", 246 246 .read = ad5380_read_dac_powerdown, ··· 386 386 st->chip_info = &ad5380_chip_info_tbl[type]; 387 387 st->regmap = regmap; 388 388 389 - indio_dev->dev.parent = dev; 390 389 indio_dev->name = name; 391 390 indio_dev->info = &ad5380_info; 392 391 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/dac/ad5421.c
··· 487 487 488 488 st->spi = spi; 489 489 490 - indio_dev->dev.parent = &spi->dev; 491 490 indio_dev->name = "ad5421"; 492 491 indio_dev->info = &ad5421_info; 493 492 indio_dev->modes = INDIO_DIRECT_MODE;
-2
drivers/iio/dac/ad5446.c
··· 250 250 st->reg = reg; 251 251 st->dev = dev; 252 252 253 - /* Establish that the iio_dev is a child of the device */ 254 - indio_dev->dev.parent = dev; 255 253 indio_dev->name = name; 256 254 indio_dev->info = &ad5446_info; 257 255 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/dac/ad5449.c
··· 297 297 if (ret) 298 298 return ret; 299 299 300 - indio_dev->dev.parent = &spi->dev; 301 300 indio_dev->name = id->name; 302 301 indio_dev->info = &ad5449_info; 303 302 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/dac/ad5504.c
··· 304 304 305 305 st->reg = reg; 306 306 st->spi = spi; 307 - indio_dev->dev.parent = &spi->dev; 308 307 indio_dev->name = spi_get_device_id(st->spi)->name; 309 308 indio_dev->info = &ad5504_info; 310 309 if (spi_get_device_id(st->spi)->driver_data == ID_AD5501)
+4 -5
drivers/iio/dac/ad5592r-base.c
··· 484 484 st->scale_avail[1][0], st->scale_avail[1][1]); 485 485 } 486 486 487 - static struct iio_chan_spec_ext_info ad5592r_ext_info[] = { 487 + static const struct iio_chan_spec_ext_info ad5592r_ext_info[] = { 488 488 { 489 489 .name = "scale_available", 490 490 .read = ad5592r_show_scale_available, ··· 508 508 chan->ext_info = ad5592r_ext_info; 509 509 } 510 510 511 - static int ad5592r_alloc_channels(struct ad5592r_state *st) 511 + static int ad5592r_alloc_channels(struct iio_dev *iio_dev) 512 512 { 513 + struct ad5592r_state *st = iio_priv(iio_dev); 513 514 unsigned i, curr_channel = 0, 514 515 num_channels = st->num_channels; 515 - struct iio_dev *iio_dev = iio_priv_to_dev(st); 516 516 struct iio_chan_spec *channels; 517 517 struct fwnode_handle *child; 518 518 u32 reg, tmp; ··· 618 618 return ret; 619 619 } 620 620 621 - iio_dev->dev.parent = dev; 622 621 iio_dev->name = name; 623 622 iio_dev->info = &ad5592r_info; 624 623 iio_dev->modes = INDIO_DIRECT_MODE; ··· 635 636 if (ret) 636 637 goto error_disable_reg; 637 638 638 - ret = ad5592r_alloc_channels(st); 639 + ret = ad5592r_alloc_channels(iio_dev); 639 640 if (ret) 640 641 goto error_disable_reg; 641 642
-1
drivers/iio/dac/ad5624r_spi.c
··· 253 253 254 254 st->us = spi; 255 255 256 - indio_dev->dev.parent = &spi->dev; 257 256 indio_dev->name = spi_get_device_id(spi)->name; 258 257 indio_dev->info = &ad5624r_info; 259 258 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/dac/ad5686.c
··· 461 461 for (i = 0; i < st->chip_info->num_channels; i++) 462 462 st->pwr_down_mode |= (0x01 << (i * 2)); 463 463 464 - indio_dev->dev.parent = dev; 465 464 indio_dev->name = name; 466 465 indio_dev->info = &ad5686_info; 467 466 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/dac/ad5755.c
··· 744 744 st->spi = spi; 745 745 st->pwr_down = 0xf; 746 746 747 - indio_dev->dev.parent = &spi->dev; 748 747 indio_dev->name = spi_get_device_id(spi)->name; 749 748 indio_dev->info = &ad5755_info; 750 749 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/dac/ad5758.c
··· 854 854 855 855 mutex_init(&st->lock); 856 856 857 - indio_dev->dev.parent = &spi->dev; 858 857 indio_dev->name = spi_get_device_id(spi)->name; 859 858 indio_dev->info = &ad5758_info; 860 859 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/dac/ad5761.c
··· 376 376 if (ret) 377 377 goto disable_regulator_err; 378 378 379 - iio_dev->dev.parent = &spi->dev; 380 379 iio_dev->info = &ad5761_info; 381 380 iio_dev->modes = INDIO_DIRECT_MODE; 382 381 iio_dev->channels = &chip_info->channel;
-1
drivers/iio/dac/ad5764.c
··· 290 290 st->spi = spi; 291 291 st->chip_info = &ad5764_chip_infos[type]; 292 292 293 - indio_dev->dev.parent = &spi->dev; 294 293 indio_dev->name = spi_get_device_id(spi)->name; 295 294 indio_dev->info = &ad5764_info; 296 295 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/dac/ad5770r.c
··· 651 651 } 652 652 } 653 653 654 - indio_dev->dev.parent = &spi->dev; 655 654 indio_dev->name = spi_get_device_id(spi)->name; 656 655 indio_dev->info = &ad5770r_info; 657 656 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/dac/ad5791.c
··· 409 409 goto error_disable_reg_neg; 410 410 411 411 spi_set_drvdata(spi, indio_dev); 412 - indio_dev->dev.parent = &spi->dev; 413 412 indio_dev->info = &ad5791_info; 414 413 indio_dev->modes = INDIO_DIRECT_MODE; 415 414 indio_dev->channels
-1
drivers/iio/dac/ad7303.c
··· 238 238 st->config |= AD7303_CFG_EXTERNAL_VREF; 239 239 } 240 240 241 - indio_dev->dev.parent = &spi->dev; 242 241 indio_dev->name = id->name; 243 242 indio_dev->info = &ad7303_info; 244 243 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/dac/ad8801.c
··· 171 171 } 172 172 173 173 spi_set_drvdata(spi, indio_dev); 174 - indio_dev->dev.parent = &spi->dev; 175 174 indio_dev->info = &ad8801_info; 176 175 indio_dev->modes = INDIO_DIRECT_MODE; 177 176 indio_dev->channels = ad8801_channels;
-1
drivers/iio/dac/cio-dac.c
··· 110 110 indio_dev->channels = cio_dac_channels; 111 111 indio_dev->num_channels = CIO_DAC_NUM_CHAN; 112 112 indio_dev->name = dev_name(dev); 113 - indio_dev->dev.parent = dev; 114 113 115 114 priv = iio_priv(indio_dev); 116 115 priv->base = base[id];
-1
drivers/iio/dac/dpot-dac.c
··· 177 177 dac = iio_priv(indio_dev); 178 178 179 179 indio_dev->name = dev_name(dev); 180 - indio_dev->dev.parent = dev; 181 180 indio_dev->info = &dpot_dac_info; 182 181 indio_dev->modes = INDIO_DIRECT_MODE; 183 182 indio_dev->channels = &dpot_dac_iio_channel;
-2
drivers/iio/dac/ds4424.c
··· 230 230 i2c_set_clientdata(client, indio_dev); 231 231 data->client = client; 232 232 indio_dev->name = id->name; 233 - indio_dev->dev.of_node = client->dev.of_node; 234 - indio_dev->dev.parent = &client->dev; 235 233 236 234 data->vcc_reg = devm_regulator_get(&client->dev, "vcc"); 237 235 if (IS_ERR(data->vcc_reg)) {
-1
drivers/iio/dac/lpc18xx_dac.c
··· 133 133 } 134 134 135 135 indio_dev->name = dev_name(&pdev->dev); 136 - indio_dev->dev.parent = &pdev->dev; 137 136 indio_dev->info = &lpc18xx_dac_info; 138 137 indio_dev->modes = INDIO_DIRECT_MODE; 139 138 indio_dev->channels = lpc18xx_dac_iio_channels;
-1
drivers/iio/dac/ltc1660.c
··· 186 186 187 187 priv->spi = spi; 188 188 spi_set_drvdata(spi, indio_dev); 189 - indio_dev->dev.parent = &spi->dev; 190 189 indio_dev->info = &ltc1660_info; 191 190 indio_dev->modes = INDIO_DIRECT_MODE; 192 191 indio_dev->channels = ltc1660_channels[id->driver_data];
-1
drivers/iio/dac/ltc2632.c
··· 362 362 } 363 363 } 364 364 365 - indio_dev->dev.parent = &spi->dev; 366 365 indio_dev->name = dev_of_node(&spi->dev) ? dev_of_node(&spi->dev)->name 367 366 : spi_get_device_id(spi)->name; 368 367 indio_dev->info = &ltc2632_info;
-3
drivers/iio/dac/m62332.c
··· 204 204 if (IS_ERR(data->vcc)) 205 205 return PTR_ERR(data->vcc); 206 206 207 - /* establish that the iio_dev is a child of the i2c device */ 208 - indio_dev->dev.parent = &client->dev; 209 - 210 207 indio_dev->num_channels = ARRAY_SIZE(m62332_channels); 211 208 indio_dev->channels = m62332_channels; 212 209 indio_dev->modes = INDIO_DIRECT_MODE;
-3
drivers/iio/dac/max517.c
··· 156 156 i2c_set_clientdata(client, indio_dev); 157 157 data->client = client; 158 158 159 - /* establish that the iio_dev is a child of the i2c device */ 160 - indio_dev->dev.parent = &client->dev; 161 - 162 159 switch (id->driver_data) { 163 160 case ID_MAX521: 164 161 indio_dev->num_channels = 8;
-1
drivers/iio/dac/max5821.c
··· 341 341 data->vref_mv = ret / 1000; 342 342 343 343 indio_dev->name = id->name; 344 - indio_dev->dev.parent = &client->dev; 345 344 indio_dev->num_channels = ARRAY_SIZE(max5821_channels); 346 345 indio_dev->channels = max5821_channels; 347 346 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/dac/mcp4725.c
··· 453 453 goto err_disable_vdd_reg; 454 454 } 455 455 456 - indio_dev->dev.parent = &client->dev; 457 456 indio_dev->name = id->name; 458 457 indio_dev->info = &mcp4725_info; 459 458 indio_dev->channels = &mcp472x_channel[id->driver_data];
-1
drivers/iio/dac/mcp4922.c
··· 152 152 153 153 spi_set_drvdata(spi, indio_dev); 154 154 id = spi_get_device_id(spi); 155 - indio_dev->dev.parent = &spi->dev; 156 155 indio_dev->info = &mcp4922_info; 157 156 indio_dev->modes = INDIO_DIRECT_MODE; 158 157 indio_dev->channels = mcp4922_channels[id->driver_data];
-1
drivers/iio/dac/stm32-dac.c
··· 323 323 dac = iio_priv(indio_dev); 324 324 dac->common = dev_get_drvdata(pdev->dev.parent); 325 325 indio_dev->name = dev_name(&pdev->dev); 326 - indio_dev->dev.parent = &pdev->dev; 327 326 indio_dev->dev.of_node = pdev->dev.of_node; 328 327 indio_dev->info = &stm32_dac_iio_info; 329 328 indio_dev->modes = INDIO_DIRECT_MODE;
+6 -7
drivers/iio/dac/ti-dac082s085.c
··· 4 4 * 5 5 * Copyright (C) 2017 KUNBUS GmbH 6 6 * 7 - * http://www.ti.com/lit/ds/symlink/dac082s085.pdf 8 - * http://www.ti.com/lit/ds/symlink/dac102s085.pdf 9 - * http://www.ti.com/lit/ds/symlink/dac122s085.pdf 10 - * http://www.ti.com/lit/ds/symlink/dac084s085.pdf 11 - * http://www.ti.com/lit/ds/symlink/dac104s085.pdf 12 - * http://www.ti.com/lit/ds/symlink/dac124s085.pdf 7 + * https://www.ti.com/lit/ds/symlink/dac082s085.pdf 8 + * https://www.ti.com/lit/ds/symlink/dac102s085.pdf 9 + * https://www.ti.com/lit/ds/symlink/dac122s085.pdf 10 + * https://www.ti.com/lit/ds/symlink/dac084s085.pdf 11 + * https://www.ti.com/lit/ds/symlink/dac104s085.pdf 12 + * https://www.ti.com/lit/ds/symlink/dac124s085.pdf 13 13 */ 14 14 15 15 #include <linux/iio/iio.h> ··· 268 268 if (!indio_dev) 269 269 return -ENOMEM; 270 270 271 - indio_dev->dev.parent = dev; 272 271 indio_dev->info = &ti_dac_info; 273 272 indio_dev->name = spi->modalias; 274 273 indio_dev->modes = INDIO_DIRECT_MODE;
+9 -11
drivers/iio/dac/ti-dac5571.c
··· 4 4 * 5 5 * Copyright (C) 2018 Prevas A/S 6 6 * 7 - * http://www.ti.com/lit/ds/symlink/dac5571.pdf 8 - * http://www.ti.com/lit/ds/symlink/dac6571.pdf 9 - * http://www.ti.com/lit/ds/symlink/dac7571.pdf 10 - * http://www.ti.com/lit/ds/symlink/dac5574.pdf 11 - * http://www.ti.com/lit/ds/symlink/dac6574.pdf 12 - * http://www.ti.com/lit/ds/symlink/dac7574.pdf 13 - * http://www.ti.com/lit/ds/symlink/dac5573.pdf 14 - * http://www.ti.com/lit/ds/symlink/dac6573.pdf 15 - * http://www.ti.com/lit/ds/symlink/dac7573.pdf 7 + * https://www.ti.com/lit/ds/symlink/dac5571.pdf 8 + * https://www.ti.com/lit/ds/symlink/dac6571.pdf 9 + * https://www.ti.com/lit/ds/symlink/dac7571.pdf 10 + * https://www.ti.com/lit/ds/symlink/dac5574.pdf 11 + * https://www.ti.com/lit/ds/symlink/dac6574.pdf 12 + * https://www.ti.com/lit/ds/symlink/dac7574.pdf 13 + * https://www.ti.com/lit/ds/symlink/dac5573.pdf 14 + * https://www.ti.com/lit/ds/symlink/dac6573.pdf 15 + * https://www.ti.com/lit/ds/symlink/dac7573.pdf 16 16 */ 17 17 18 18 #include <linux/iio/iio.h> ··· 321 321 i2c_set_clientdata(client, indio_dev); 322 322 data->client = client; 323 323 324 - indio_dev->dev.parent = dev; 325 - indio_dev->dev.of_node = client->dev.of_node; 326 324 indio_dev->info = &dac5571_info; 327 325 indio_dev->name = id->name; 328 326 indio_dev->modes = INDIO_DIRECT_MODE;
+1 -3
drivers/iio/dac/ti-dac7311.c
··· 3 3 * 4 4 * Copyright (C) 2018 CMC NV 5 5 * 6 - * http://www.ti.com/lit/ds/symlink/dac7311.pdf 6 + * https://www.ti.com/lit/ds/symlink/dac7311.pdf 7 7 */ 8 8 9 9 #include <linux/iio/iio.h> ··· 251 251 spi->bits_per_word = 16; 252 252 spi_setup(spi); 253 253 254 - indio_dev->dev.parent = dev; 255 - indio_dev->dev.of_node = spi->dev.of_node; 256 254 indio_dev->info = &ti_dac_info; 257 255 indio_dev->name = spi_get_device_id(spi)->name; 258 256 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/dac/ti-dac7612.c
··· 139 139 return PTR_ERR(priv->loaddacs); 140 140 priv->spi = spi; 141 141 spi_set_drvdata(spi, iio_dev); 142 - iio_dev->dev.parent = &spi->dev; 143 142 iio_dev->info = &dac7612_info; 144 143 iio_dev->modes = INDIO_DIRECT_MODE; 145 144 iio_dev->channels = dac7612_channels;
-2
drivers/iio/dac/vf610_dac.c
··· 199 199 platform_set_drvdata(pdev, indio_dev); 200 200 201 201 indio_dev->name = dev_name(&pdev->dev); 202 - indio_dev->dev.parent = &pdev->dev; 203 - indio_dev->dev.of_node = pdev->dev.of_node; 204 202 indio_dev->info = &vf610_dac_iio_info; 205 203 indio_dev->modes = INDIO_DIRECT_MODE; 206 204 indio_dev->channels = vf610_dac_iio_channels;
+8 -6
drivers/iio/dummy/iio_simple_dummy.c
··· 566 566 struct iio_dev *indio_dev; 567 567 struct iio_dummy_state *st; 568 568 struct iio_sw_device *swd; 569 + struct device *parent = NULL; 570 + 571 + /* 572 + * With hardware: Set the parent device. 573 + * parent = &spi->dev; 574 + * parent = &client->dev; 575 + */ 569 576 570 577 swd = kzalloc(sizeof(*swd), GFP_KERNEL); 571 578 if (!swd) { ··· 587 580 * It also has a region (accessed by iio_priv() 588 581 * for chip specific state information. 589 582 */ 590 - indio_dev = iio_device_alloc(sizeof(*st)); 583 + indio_dev = iio_device_alloc(parent, sizeof(*st)); 591 584 if (!indio_dev) { 592 585 ret = -ENOMEM; 593 586 goto error_ret; ··· 597 590 mutex_init(&st->lock); 598 591 599 592 iio_dummy_init_device(indio_dev); 600 - /* 601 - * With hardware: Set the parent device. 602 - * indio_dev->dev.parent = &spi->dev; 603 - * indio_dev->dev.parent = &client->dev; 604 - */ 605 593 606 594 /* 607 595 * Make the iio_dev struct available to remove function.
-14
drivers/iio/dummy/iio_simple_dummy_buffer.c
··· 99 99 } 100 100 101 101 static const struct iio_buffer_setup_ops iio_simple_dummy_buffer_setup_ops = { 102 - /* 103 - * iio_triggered_buffer_postenable: 104 - * Generic function that simply attaches the pollfunc to the trigger. 105 - * Replace this to mess with hardware state before we attach the 106 - * trigger. 107 - */ 108 - .postenable = &iio_triggered_buffer_postenable, 109 - /* 110 - * iio_triggered_buffer_predisable: 111 - * Generic function that simple detaches the pollfunc from the trigger. 112 - * Replace this to put hardware state back again after the trigger is 113 - * detached but before userspace knows we have disabled the ring. 114 - */ 115 - .predisable = &iio_triggered_buffer_predisable, 116 102 }; 117 103 118 104 int iio_simple_dummy_configure_buffer(struct iio_dev *indio_dev)
-1
drivers/iio/frequency/ad9523.c
··· 1026 1026 st->spi = spi; 1027 1027 st->pdata = pdata; 1028 1028 1029 - indio_dev->dev.parent = &spi->dev; 1030 1029 indio_dev->name = (pdata->name[0] != 0) ? pdata->name : 1031 1030 spi_get_device_id(spi)->name; 1032 1031 indio_dev->info = &ad9523_info;
-1
drivers/iio/frequency/adf4350.c
··· 531 531 st->spi = spi; 532 532 st->pdata = pdata; 533 533 534 - indio_dev->dev.parent = &spi->dev; 535 534 indio_dev->name = (pdata->name[0] != 0) ? pdata->name : 536 535 spi_get_device_id(spi)->name; 537 536
-1
drivers/iio/frequency/adf4371.c
··· 573 573 mutex_init(&st->lock); 574 574 575 575 st->chip_info = &adf4371_chip_info[id->driver_data]; 576 - indio_dev->dev.parent = &spi->dev; 577 576 indio_dev->name = id->name; 578 577 indio_dev->info = &adf4371_info; 579 578 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/gyro/adis16080.c
··· 207 207 indio_dev->name = spi->dev.driver->name; 208 208 indio_dev->channels = adis16080_channels; 209 209 indio_dev->num_channels = ARRAY_SIZE(adis16080_channels); 210 - indio_dev->dev.parent = &spi->dev; 211 210 indio_dev->info = &adis16080_info; 212 211 indio_dev->modes = INDIO_DIRECT_MODE; 213 212
-1
drivers/iio/gyro/adis16130.c
··· 155 155 indio_dev->name = spi->dev.driver->name; 156 156 indio_dev->channels = adis16130_channels; 157 157 indio_dev->num_channels = ARRAY_SIZE(adis16130_channels); 158 - indio_dev->dev.parent = &spi->dev; 159 158 indio_dev->info = &adis16130_info; 160 159 indio_dev->modes = INDIO_DIRECT_MODE; 161 160
-1
drivers/iio/gyro/adis16136.c
··· 540 540 adis16136 = iio_priv(indio_dev); 541 541 542 542 adis16136->chip_info = &adis16136_chip_info[id->driver_data]; 543 - indio_dev->dev.parent = &spi->dev; 544 543 indio_dev->name = spi_get_device_id(spi)->name; 545 544 indio_dev->channels = adis16136_channels; 546 545 indio_dev->num_channels = ARRAY_SIZE(adis16136_channels);
-1
drivers/iio/gyro/adis16260.c
··· 381 381 adis16260->info = &adis16260_chip_info_table[id->driver_data]; 382 382 383 383 indio_dev->name = id->name; 384 - indio_dev->dev.parent = &spi->dev; 385 384 indio_dev->info = &adis16260_info; 386 385 indio_dev->channels = adis16260->info->channels; 387 386 indio_dev->num_channels = adis16260->info->num_channels;
-1
drivers/iio/gyro/adxrs450.c
··· 424 424 /* This is only used for removal purposes */ 425 425 spi_set_drvdata(spi, indio_dev); 426 426 427 - indio_dev->dev.parent = &spi->dev; 428 427 indio_dev->info = &adxrs450_info; 429 428 indio_dev->modes = INDIO_DIRECT_MODE; 430 429 indio_dev->channels =
-3
drivers/iio/gyro/bmg160_core.c
··· 1051 1051 1052 1052 static const struct iio_buffer_setup_ops bmg160_buffer_setup_ops = { 1053 1053 .preenable = bmg160_buffer_preenable, 1054 - .postenable = iio_triggered_buffer_postenable, 1055 - .predisable = iio_triggered_buffer_predisable, 1056 1054 .postdisable = bmg160_buffer_postdisable, 1057 1055 }; 1058 1056 ··· 1095 1097 if (ACPI_HANDLE(dev)) 1096 1098 name = bmg160_match_acpi_device(dev); 1097 1099 1098 - indio_dev->dev.parent = dev; 1099 1100 indio_dev->channels = bmg160_channels; 1100 1101 indio_dev->num_channels = ARRAY_SIZE(bmg160_channels); 1101 1102 indio_dev->name = name;
-1
drivers/iio/gyro/fxas21002c_core.c
··· 905 905 if (ret < 0) 906 906 return ret; 907 907 908 - indio_dev->dev.parent = dev; 909 908 indio_dev->channels = fxas21002c_channels; 910 909 indio_dev->num_channels = ARRAY_SIZE(fxas21002c_channels); 911 910 indio_dev->name = name;
-1
drivers/iio/gyro/hid-sensor-gyro-3d.c
··· 319 319 } 320 320 321 321 indio_dev->num_channels = ARRAY_SIZE(gyro_3d_channels); 322 - indio_dev->dev.parent = &pdev->dev; 323 322 indio_dev->info = &gyro_3d_info; 324 323 indio_dev->name = name; 325 324 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/gyro/itg3200_core.c
··· 316 316 i2c_set_clientdata(client, indio_dev); 317 317 st->i2c = client; 318 318 319 - indio_dev->dev.parent = &client->dev; 320 319 indio_dev->name = client->dev.driver->name; 321 320 indio_dev->channels = itg3200_channels; 322 321 indio_dev->num_channels = ARRAY_SIZE(itg3200_channels);
-3
drivers/iio/gyro/mpu3050-core.c
··· 662 662 663 663 static const struct iio_buffer_setup_ops mpu3050_buffer_setup_ops = { 664 664 .preenable = mpu3050_buffer_preenable, 665 - .postenable = iio_triggered_buffer_postenable, 666 - .predisable = iio_triggered_buffer_predisable, 667 665 .postdisable = mpu3050_buffer_postdisable, 668 666 }; 669 667 ··· 1196 1198 if (ret) 1197 1199 goto err_power_down; 1198 1200 1199 - indio_dev->dev.parent = dev; 1200 1201 indio_dev->channels = mpu3050_channels; 1201 1202 indio_dev->num_channels = ARRAY_SIZE(mpu3050_channels); 1202 1203 indio_dev->info = &mpu3050_info;
-1
drivers/iio/gyro/ssp_gyro_sensor.c
··· 108 108 spd->type = SSP_GYROSCOPE_SENSOR; 109 109 110 110 indio_dev->name = ssp_gyro_name; 111 - indio_dev->dev.parent = &pdev->dev; 112 111 indio_dev->info = &ssp_gyro_iio_info; 113 112 indio_dev->modes = INDIO_BUFFER_SOFTWARE; 114 113 indio_dev->channels = ssp_gyro_channels;
+4 -17
drivers/iio/gyro/st_gyro_buffer.c
··· 33 33 { 34 34 int err; 35 35 36 - err = iio_triggered_buffer_postenable(indio_dev); 37 - if (err < 0) 38 - return err; 39 - 40 36 err = st_sensors_set_axis_enable(indio_dev, indio_dev->active_scan_mask[0]); 41 37 if (err < 0) 42 - goto st_gyro_buffer_predisable; 38 + return err; 43 39 44 40 err = st_sensors_set_enable(indio_dev, true); 45 41 if (err < 0) ··· 45 49 46 50 st_gyro_buffer_enable_all_axis: 47 51 st_sensors_set_axis_enable(indio_dev, ST_SENSORS_ENABLE_ALL_AXIS); 48 - st_gyro_buffer_predisable: 49 - iio_triggered_buffer_predisable(indio_dev); 50 52 return err; 51 53 } 52 54 53 55 static int st_gyro_buffer_predisable(struct iio_dev *indio_dev) 54 56 { 55 - int err, err2; 57 + int err; 56 58 57 59 err = st_sensors_set_enable(indio_dev, false); 58 60 if (err < 0) 59 - goto st_gyro_buffer_predisable; 61 + return err; 60 62 61 - err = st_sensors_set_axis_enable(indio_dev, ST_SENSORS_ENABLE_ALL_AXIS); 62 - 63 - st_gyro_buffer_predisable: 64 - err2 = iio_triggered_buffer_predisable(indio_dev); 65 - if (!err) 66 - err = err2; 67 - 68 - return err; 63 + return st_sensors_set_axis_enable(indio_dev, ST_SENSORS_ENABLE_ALL_AXIS); 69 64 } 70 65 71 66 static const struct iio_buffer_setup_ops st_gyro_buffer_setup_ops = {
+1 -2
drivers/iio/health/afe4403.c
··· 2 2 /* 3 3 * AFE4403 Heart Rate Monitors and Low-Cost Pulse Oximeters 4 4 * 5 - * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ 5 + * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ 6 6 * Andrew F. Davis <afd@ti.com> 7 7 */ 8 8 ··· 509 509 } 510 510 511 511 indio_dev->modes = INDIO_DIRECT_MODE; 512 - indio_dev->dev.parent = afe->dev; 513 512 indio_dev->channels = afe4403_channels; 514 513 indio_dev->num_channels = ARRAY_SIZE(afe4403_channels); 515 514 indio_dev->name = AFE4403_DRIVER_NAME;
+1 -2
drivers/iio/health/afe4404.c
··· 2 2 /* 3 3 * AFE4404 Heart Rate Monitors and Low-Cost Pulse Oximeters 4 4 * 5 - * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ 5 + * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ 6 6 * Andrew F. Davis <afd@ti.com> 7 7 */ 8 8 ··· 517 517 } 518 518 519 519 indio_dev->modes = INDIO_DIRECT_MODE; 520 - indio_dev->dev.parent = afe->dev; 521 520 indio_dev->channels = afe4404_channels; 522 521 indio_dev->num_channels = ARRAY_SIZE(afe4404_channels); 523 522 indio_dev->name = AFE4404_DRIVER_NAME;
+1 -1
drivers/iio/health/afe440x.h
··· 2 2 /* 3 3 * AFE440X Heart Rate Monitors and Low-Cost Pulse Oximeters 4 4 * 5 - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ 5 + * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com/ 6 6 * Andrew F. Davis <afd@ti.com> 7 7 */ 8 8
-1
drivers/iio/health/max30100.c
··· 439 439 indio_dev->available_scan_masks = max30100_scan_masks; 440 440 indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE); 441 441 indio_dev->setup_ops = &max30100_buffer_setup_ops; 442 - indio_dev->dev.parent = &client->dev; 443 442 444 443 data = iio_priv(indio_dev); 445 444 data->indio_dev = indio_dev;
-1
drivers/iio/health/max30102.c
··· 526 526 indio_dev->info = &max30102_info; 527 527 indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE); 528 528 indio_dev->setup_ops = &max30102_buffer_setup_ops; 529 - indio_dev->dev.parent = &client->dev; 530 529 531 530 data = iio_priv(indio_dev); 532 531 data->indio_dev = indio_dev;
-1
drivers/iio/humidity/am2315.c
··· 233 233 i2c_set_clientdata(client, indio_dev); 234 234 mutex_init(&data->lock); 235 235 236 - indio_dev->dev.parent = &client->dev; 237 236 indio_dev->info = &am2315_info; 238 237 indio_dev->name = AM2315_DRIVER_NAME; 239 238 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/humidity/dht11.c
··· 321 321 init_completion(&dht11->completion); 322 322 mutex_init(&dht11->lock); 323 323 iio->name = pdev->name; 324 - iio->dev.parent = &pdev->dev; 325 324 iio->info = &dht11_iio_info; 326 325 iio->modes = INDIO_DIRECT_MODE; 327 326 iio->channels = dht11_chan_spec;
+6 -17
drivers/iio/humidity/hdc100x.c
··· 6 6 * Author: Matt Ranostay <matt.ranostay@konsulko.com> 7 7 * 8 8 * Datasheets: 9 - * http://www.ti.com/product/HDC1000/datasheet 10 - * http://www.ti.com/product/HDC1008/datasheet 11 - * http://www.ti.com/product/HDC1010/datasheet 12 - * http://www.ti.com/product/HDC1050/datasheet 13 - * http://www.ti.com/product/HDC1080/datasheet 9 + * https://www.ti.com/product/HDC1000/datasheet 10 + * https://www.ti.com/product/HDC1008/datasheet 11 + * https://www.ti.com/product/HDC1010/datasheet 12 + * https://www.ti.com/product/HDC1050/datasheet 13 + * https://www.ti.com/product/HDC1080/datasheet 14 14 */ 15 15 16 16 #include <linux/delay.h> ··· 278 278 struct hdc100x_data *data = iio_priv(indio_dev); 279 279 int ret; 280 280 281 - ret = iio_triggered_buffer_postenable(indio_dev); 282 - if (ret) 283 - return ret; 284 - 285 281 /* Buffer is enabled. First set ACQ Mode, then attach poll func */ 286 282 mutex_lock(&data->lock); 287 283 ret = hdc100x_update_config(data, HDC100X_REG_CONFIG_ACQ_MODE, 288 284 HDC100X_REG_CONFIG_ACQ_MODE); 289 285 mutex_unlock(&data->lock); 290 - if (ret) 291 - iio_triggered_buffer_predisable(indio_dev); 292 286 293 287 return ret; 294 288 } ··· 290 296 static int hdc100x_buffer_predisable(struct iio_dev *indio_dev) 291 297 { 292 298 struct hdc100x_data *data = iio_priv(indio_dev); 293 - int ret, ret2; 299 + int ret; 294 300 295 301 mutex_lock(&data->lock); 296 302 ret = hdc100x_update_config(data, HDC100X_REG_CONFIG_ACQ_MODE, 0); 297 303 mutex_unlock(&data->lock); 298 - 299 - ret2 = iio_triggered_buffer_predisable(indio_dev); 300 - if (ret == 0) 301 - ret = ret2; 302 304 303 305 return ret; 304 306 } ··· 364 374 data->client = client; 365 375 mutex_init(&data->lock); 366 376 367 - indio_dev->dev.parent = &client->dev; 368 377 indio_dev->name = dev_name(&client->dev); 369 378 indio_dev->modes = INDIO_DIRECT_MODE; 370 379 indio_dev->info = &hdc100x_info;
-1
drivers/iio/humidity/hid-sensor-humidity.c
··· 226 226 227 227 indio_dev->channels = humid_chans; 228 228 indio_dev->num_channels = ARRAY_SIZE(humidity_channels); 229 - indio_dev->dev.parent = &pdev->dev; 230 229 indio_dev->info = &humidity_info; 231 230 indio_dev->name = name; 232 231 indio_dev->modes = INDIO_DIRECT_MODE;
+2 -2
drivers/iio/humidity/hts221.h
··· 46 46 int hts221_probe(struct device *dev, int irq, const char *name, 47 47 struct regmap *regmap); 48 48 int hts221_set_enable(struct hts221_hw *hw, bool enable); 49 - int hts221_allocate_buffers(struct hts221_hw *hw); 50 - int hts221_allocate_trigger(struct hts221_hw *hw); 49 + int hts221_allocate_buffers(struct iio_dev *iio_dev); 50 + int hts221_allocate_trigger(struct iio_dev *iio_dev); 51 51 52 52 #endif /* HTS221_H */
+5 -6
drivers/iio/humidity/hts221_buffer.c
··· 72 72 return IRQ_HANDLED; 73 73 } 74 74 75 - int hts221_allocate_trigger(struct hts221_hw *hw) 75 + int hts221_allocate_trigger(struct iio_dev *iio_dev) 76 76 { 77 + struct hts221_hw *hw = iio_priv(iio_dev); 77 78 struct st_sensors_platform_data *pdata = dev_get_platdata(hw->dev); 78 - struct iio_dev *iio_dev = iio_priv_to_dev(hw); 79 79 bool irq_active_low = false, open_drain = false; 80 80 unsigned long irq_type; 81 81 int err; ··· 153 153 154 154 static const struct iio_buffer_setup_ops hts221_buffer_ops = { 155 155 .preenable = hts221_buffer_preenable, 156 - .postenable = iio_triggered_buffer_postenable, 157 - .predisable = iio_triggered_buffer_predisable, 158 156 .postdisable = hts221_buffer_postdisable, 159 157 }; 160 158 ··· 188 190 return IRQ_HANDLED; 189 191 } 190 192 191 - int hts221_allocate_buffers(struct hts221_hw *hw) 193 + int hts221_allocate_buffers(struct iio_dev *iio_dev) 192 194 { 193 - return devm_iio_triggered_buffer_setup(hw->dev, iio_priv_to_dev(hw), 195 + struct hts221_hw *hw = iio_priv(iio_dev); 196 + return devm_iio_triggered_buffer_setup(hw->dev, iio_dev, 194 197 NULL, hts221_buffer_handler_thread, 195 198 &hts221_buffer_ops); 196 199 }
+2 -3
drivers/iio/humidity/hts221_core.c
··· 572 572 return err; 573 573 574 574 iio_dev->modes = INDIO_DIRECT_MODE; 575 - iio_dev->dev.parent = hw->dev; 576 575 iio_dev->available_scan_masks = hts221_scan_masks; 577 576 iio_dev->channels = hts221_channels; 578 577 iio_dev->num_channels = ARRAY_SIZE(hts221_channels); ··· 620 621 } 621 622 622 623 if (hw->irq > 0) { 623 - err = hts221_allocate_buffers(hw); 624 + err = hts221_allocate_buffers(iio_dev); 624 625 if (err < 0) 625 626 return err; 626 627 627 - err = hts221_allocate_trigger(hw); 628 + err = hts221_allocate_trigger(iio_dev); 628 629 if (err) 629 630 return err; 630 631 }
-1
drivers/iio/humidity/htu21.c
··· 204 204 205 205 indio_dev->info = &htu21_info; 206 206 indio_dev->name = id->name; 207 - indio_dev->dev.parent = &client->dev; 208 207 indio_dev->modes = INDIO_DIRECT_MODE; 209 208 210 209 if (id->driver_data == MS8607) {
-1
drivers/iio/humidity/si7005.c
··· 142 142 data->client = client; 143 143 mutex_init(&data->lock); 144 144 145 - indio_dev->dev.parent = &client->dev; 146 145 indio_dev->name = dev_name(&client->dev); 147 146 indio_dev->modes = INDIO_DIRECT_MODE; 148 147 indio_dev->info = &si7005_info;
-1
drivers/iio/humidity/si7020.c
··· 128 128 data = iio_priv(indio_dev); 129 129 *data = client; 130 130 131 - indio_dev->dev.parent = &client->dev; 132 131 indio_dev->name = dev_name(&client->dev); 133 132 indio_dev->modes = INDIO_DIRECT_MODE; 134 133 indio_dev->info = &si7020_info;
+17
drivers/iio/iio_core_trigger.h
··· 18 18 **/ 19 19 void iio_device_unregister_trigger_consumer(struct iio_dev *indio_dev); 20 20 21 + 22 + int iio_trigger_attach_poll_func(struct iio_trigger *trig, 23 + struct iio_poll_func *pf); 24 + int iio_trigger_detach_poll_func(struct iio_trigger *trig, 25 + struct iio_poll_func *pf); 26 + 21 27 #else 22 28 23 29 /** ··· 41 35 **/ 42 36 static void iio_device_unregister_trigger_consumer(struct iio_dev *indio_dev) 43 37 { 38 + } 39 + 40 + static inline int iio_trigger_attach_poll_func(struct iio_trigger *trig, 41 + struct iio_poll_func *pf) 42 + { 43 + return 0; 44 + } 45 + static inline int iio_trigger_detach_poll_func(struct iio_trigger *trig, 46 + struct iio_poll_func *pf) 47 + { 48 + return 0; 44 49 } 45 50 46 51 #endif /* CONFIG_TRIGGER_CONSUMER */
+1
drivers/iio/imu/Kconfig
··· 91 91 To compile this driver as module, choose M here: the module will 92 92 be called kmx61. 93 93 94 + source "drivers/iio/imu/inv_icm42600/Kconfig" 94 95 source "drivers/iio/imu/inv_mpu6050/Kconfig" 95 96 source "drivers/iio/imu/st_lsm6dsx/Kconfig" 96 97
+1
drivers/iio/imu/Makefile
··· 20 20 obj-$(CONFIG_FXOS8700_I2C) += fxos8700_i2c.o 21 21 obj-$(CONFIG_FXOS8700_SPI) += fxos8700_spi.o 22 22 23 + obj-y += inv_icm42600/ 23 24 obj-y += inv_mpu6050/ 24 25 25 26 obj-$(CONFIG_KMX61) += kmx61.o
-1
drivers/iio/imu/adis16400.c
··· 1181 1181 1182 1182 /* setup the industrialio driver allocated elements */ 1183 1183 st->variant = &adis16400_chips[spi_get_device_id(spi)->driver_data]; 1184 - indio_dev->dev.parent = &spi->dev; 1185 1184 indio_dev->name = spi_get_device_id(spi)->name; 1186 1185 indio_dev->channels = st->variant->channels; 1187 1186 indio_dev->num_channels = st->variant->num_channels;
-1
drivers/iio/imu/adis16460.c
··· 393 393 st = iio_priv(indio_dev); 394 394 395 395 st->chip_info = &adis16460_chip_info; 396 - indio_dev->dev.parent = &spi->dev; 397 396 indio_dev->name = spi_get_device_id(spi)->name; 398 397 indio_dev->channels = st->chip_info->channels; 399 398 indio_dev->num_channels = st->chip_info->num_channels;
-1
drivers/iio/imu/adis16475.c
··· 1289 1289 if (ret) 1290 1290 return ret; 1291 1291 1292 - indio_dev->dev.parent = &spi->dev; 1293 1292 indio_dev->name = st->info->name; 1294 1293 indio_dev->channels = st->info->channels; 1295 1294 indio_dev->num_channels = st->info->num_channels;
+3 -4
drivers/iio/imu/adis16480.c
··· 1102 1102 /* 1103 1103 * Get the interrupt line behaviour. The data ready polarity can be 1104 1104 * configured as positive or negative, corresponding to 1105 - * IRQF_TRIGGER_RISING or IRQF_TRIGGER_FALLING respectively. 1105 + * IRQ_TYPE_EDGE_RISING or IRQ_TYPE_EDGE_FALLING respectively. 1106 1106 */ 1107 1107 irq_type = irqd_get_trigger_type(desc); 1108 - if (irq_type == IRQF_TRIGGER_RISING) { /* Default */ 1108 + if (irq_type == IRQ_TYPE_EDGE_RISING) { /* Default */ 1109 1109 val |= ADIS16480_DRDY_POL(1); 1110 - } else if (irq_type == IRQF_TRIGGER_FALLING) { 1110 + } else if (irq_type == IRQ_TYPE_EDGE_FALLING) { 1111 1111 val |= ADIS16480_DRDY_POL(0); 1112 1112 } else { 1113 1113 dev_err(&st->adis.spi->dev, ··· 1229 1229 st = iio_priv(indio_dev); 1230 1230 1231 1231 st->chip_info = &adis16480_chip_info[id->driver_data]; 1232 - indio_dev->dev.parent = &spi->dev; 1233 1232 indio_dev->name = spi_get_device_id(spi)->name; 1234 1233 indio_dev->channels = st->chip_info->channels; 1235 1234 indio_dev->num_channels = st->chip_info->num_channels;
+3
drivers/iio/imu/bmi160/bmi160.h
··· 3 3 #define BMI160_H_ 4 4 5 5 #include <linux/iio/iio.h> 6 + #include <linux/regulator/consumer.h> 6 7 7 8 struct bmi160_data { 8 9 struct regmap *regmap; 9 10 struct iio_trigger *trig; 11 + struct regulator_bulk_data supplies[2]; 12 + struct iio_mount_matrix orientation; 10 13 }; 11 14 12 15 extern const struct regmap_config bmi160_regmap_config;
+45 -2
drivers/iio/imu/bmi160/bmi160_core.c
··· 15 15 #include <linux/delay.h> 16 16 #include <linux/irq.h> 17 17 #include <linux/of_irq.h> 18 + #include <linux/regulator/consumer.h> 18 19 19 20 #include <linux/iio/iio.h> 20 21 #include <linux/iio/triggered_buffer.h> ··· 110 109 .storagebits = 16, \ 111 110 .endianness = IIO_LE, \ 112 111 }, \ 112 + .ext_info = bmi160_ext_info, \ 113 113 } 114 114 115 115 /* scan indexes follow DATA register order */ ··· 264 262 .tbl = bmi160_gyro_odr, 265 263 .num = ARRAY_SIZE(bmi160_gyro_odr), 266 264 }, 265 + }; 266 + 267 + static const struct iio_mount_matrix * 268 + bmi160_get_mount_matrix(const struct iio_dev *indio_dev, 269 + const struct iio_chan_spec *chan) 270 + { 271 + struct bmi160_data *data = iio_priv(indio_dev); 272 + 273 + return &data->orientation; 274 + } 275 + 276 + static const struct iio_chan_spec_ext_info bmi160_ext_info[] = { 277 + IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bmi160_get_mount_matrix), 278 + { } 267 279 }; 268 280 269 281 static const struct iio_chan_spec bmi160_channels[] = { ··· 725 709 unsigned int val; 726 710 struct device *dev = regmap_get_device(data->regmap); 727 711 712 + ret = regulator_bulk_enable(ARRAY_SIZE(data->supplies), data->supplies); 713 + if (ret) { 714 + dev_err(dev, "Failed to enable regulators: %d\n", ret); 715 + return ret; 716 + } 717 + 728 718 ret = regmap_write(data->regmap, BMI160_REG_CMD, BMI160_CMD_SOFTRESET); 729 719 if (ret) 730 720 return ret; ··· 815 793 static void bmi160_chip_uninit(void *data) 816 794 { 817 795 struct bmi160_data *bmi_data = data; 796 + struct device *dev = regmap_get_device(bmi_data->regmap); 797 + int ret; 818 798 819 799 bmi160_set_mode(bmi_data, BMI160_GYRO, false); 820 800 bmi160_set_mode(bmi_data, BMI160_ACCEL, false); 801 + 802 + ret = regulator_bulk_disable(ARRAY_SIZE(bmi_data->supplies), 803 + bmi_data->supplies); 804 + if (ret) 805 + dev_err(dev, "Failed to disable regulators: %d\n", ret); 821 806 } 822 807 823 808 int bmi160_core_probe(struct device *dev, struct regmap *regmap, ··· 844 815 dev_set_drvdata(dev, indio_dev); 845 816 data->regmap = regmap; 846 817 818 + data->supplies[0].supply = "vdd"; 819 + data->supplies[1].supply = "vddio"; 820 + ret = devm_regulator_bulk_get(dev, 821 + ARRAY_SIZE(data->supplies), 822 + data->supplies); 823 + if (ret) { 824 + dev_err(dev, "Failed to get regulators: %d\n", ret); 825 + return ret; 826 + } 827 + 828 + ret = iio_read_mount_matrix(dev, "mount-matrix", 829 + &data->orientation); 830 + if (ret) 831 + return ret; 832 + 847 833 ret = bmi160_chip_init(data, use_spi); 848 834 if (ret) 849 835 return ret; ··· 870 826 if (!name && ACPI_HANDLE(dev)) 871 827 name = bmi160_match_acpi_device(dev); 872 828 873 - indio_dev->dev.parent = dev; 874 829 indio_dev->channels = bmi160_channels; 875 830 indio_dev->num_channels = ARRAY_SIZE(bmi160_channels); 876 831 indio_dev->name = name; ··· 896 853 } 897 854 EXPORT_SYMBOL_GPL(bmi160_core_probe); 898 855 899 - MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com"); 856 + MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>"); 900 857 MODULE_DESCRIPTION("Bosch BMI160 driver"); 901 858 MODULE_LICENSE("GPL v2");
-1
drivers/iio/imu/fxos8700_core.c
··· 633 633 if (ret) 634 634 return ret; 635 635 636 - indio_dev->dev.parent = dev; 637 636 indio_dev->channels = fxos8700_channels; 638 637 indio_dev->num_channels = ARRAY_SIZE(fxos8700_channels); 639 638 indio_dev->name = name ? name : "fxos8700";
+29
drivers/iio/imu/inv_icm42600/Kconfig
··· 1 + # SPDX-License-Identifier: GPL-2.0-or-later 2 + 3 + config INV_ICM42600 4 + tristate 5 + select IIO_BUFFER 6 + 7 + config INV_ICM42600_I2C 8 + tristate "InvenSense ICM-426xx I2C driver" 9 + depends on I2C 10 + select INV_ICM42600 11 + select REGMAP_I2C 12 + help 13 + This driver supports the InvenSense ICM-426xx motion tracking 14 + devices over I2C. 15 + 16 + This driver can be built as a module. The module will be called 17 + inv-icm42600-i2c. 18 + 19 + config INV_ICM42600_SPI 20 + tristate "InvenSense ICM-426xx SPI driver" 21 + depends on SPI_MASTER 22 + select INV_ICM42600 23 + select REGMAP_SPI 24 + help 25 + This driver supports the InvenSense ICM-426xx motion tracking 26 + devices over SPI. 27 + 28 + This driver can be built as a module. The module will be called 29 + inv-icm42600-spi.
+15
drivers/iio/imu/inv_icm42600/Makefile
··· 1 + # SPDX-License-Identifier: GPL-2.0-or-later 2 + 3 + obj-$(CONFIG_INV_ICM42600) += inv-icm42600.o 4 + inv-icm42600-y += inv_icm42600_core.o 5 + inv-icm42600-y += inv_icm42600_gyro.o 6 + inv-icm42600-y += inv_icm42600_accel.o 7 + inv-icm42600-y += inv_icm42600_temp.o 8 + inv-icm42600-y += inv_icm42600_buffer.o 9 + inv-icm42600-y += inv_icm42600_timestamp.o 10 + 11 + obj-$(CONFIG_INV_ICM42600_I2C) += inv-icm42600-i2c.o 12 + inv-icm42600-i2c-y += inv_icm42600_i2c.o 13 + 14 + obj-$(CONFIG_INV_ICM42600_SPI) += inv-icm42600-spi.o 15 + inv-icm42600-spi-y += inv_icm42600_spi.o
+395
drivers/iio/imu/inv_icm42600/inv_icm42600.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 + /* 3 + * Copyright (C) 2020 Invensense, Inc. 4 + */ 5 + 6 + #ifndef INV_ICM42600_H_ 7 + #define INV_ICM42600_H_ 8 + 9 + #include <linux/bits.h> 10 + #include <linux/bitfield.h> 11 + #include <linux/regmap.h> 12 + #include <linux/mutex.h> 13 + #include <linux/regulator/consumer.h> 14 + #include <linux/pm.h> 15 + #include <linux/iio/iio.h> 16 + 17 + #include "inv_icm42600_buffer.h" 18 + 19 + enum inv_icm42600_chip { 20 + INV_CHIP_ICM42600, 21 + INV_CHIP_ICM42602, 22 + INV_CHIP_ICM42605, 23 + INV_CHIP_ICM42622, 24 + INV_CHIP_NB, 25 + }; 26 + 27 + /* serial bus slew rates */ 28 + enum inv_icm42600_slew_rate { 29 + INV_ICM42600_SLEW_RATE_20_60NS, 30 + INV_ICM42600_SLEW_RATE_12_36NS, 31 + INV_ICM42600_SLEW_RATE_6_18NS, 32 + INV_ICM42600_SLEW_RATE_4_12NS, 33 + INV_ICM42600_SLEW_RATE_2_6NS, 34 + INV_ICM42600_SLEW_RATE_INF_2NS, 35 + }; 36 + 37 + enum inv_icm42600_sensor_mode { 38 + INV_ICM42600_SENSOR_MODE_OFF, 39 + INV_ICM42600_SENSOR_MODE_STANDBY, 40 + INV_ICM42600_SENSOR_MODE_LOW_POWER, 41 + INV_ICM42600_SENSOR_MODE_LOW_NOISE, 42 + INV_ICM42600_SENSOR_MODE_NB, 43 + }; 44 + 45 + /* gyroscope fullscale values */ 46 + enum inv_icm42600_gyro_fs { 47 + INV_ICM42600_GYRO_FS_2000DPS, 48 + INV_ICM42600_GYRO_FS_1000DPS, 49 + INV_ICM42600_GYRO_FS_500DPS, 50 + INV_ICM42600_GYRO_FS_250DPS, 51 + INV_ICM42600_GYRO_FS_125DPS, 52 + INV_ICM42600_GYRO_FS_62_5DPS, 53 + INV_ICM42600_GYRO_FS_31_25DPS, 54 + INV_ICM42600_GYRO_FS_15_625DPS, 55 + INV_ICM42600_GYRO_FS_NB, 56 + }; 57 + 58 + /* accelerometer fullscale values */ 59 + enum inv_icm42600_accel_fs { 60 + INV_ICM42600_ACCEL_FS_16G, 61 + INV_ICM42600_ACCEL_FS_8G, 62 + INV_ICM42600_ACCEL_FS_4G, 63 + INV_ICM42600_ACCEL_FS_2G, 64 + INV_ICM42600_ACCEL_FS_NB, 65 + }; 66 + 67 + /* ODR suffixed by LN or LP are Low-Noise or Low-Power mode only */ 68 + enum inv_icm42600_odr { 69 + INV_ICM42600_ODR_8KHZ_LN = 3, 70 + INV_ICM42600_ODR_4KHZ_LN, 71 + INV_ICM42600_ODR_2KHZ_LN, 72 + INV_ICM42600_ODR_1KHZ_LN, 73 + INV_ICM42600_ODR_200HZ, 74 + INV_ICM42600_ODR_100HZ, 75 + INV_ICM42600_ODR_50HZ, 76 + INV_ICM42600_ODR_25HZ, 77 + INV_ICM42600_ODR_12_5HZ, 78 + INV_ICM42600_ODR_6_25HZ_LP, 79 + INV_ICM42600_ODR_3_125HZ_LP, 80 + INV_ICM42600_ODR_1_5625HZ_LP, 81 + INV_ICM42600_ODR_500HZ, 82 + INV_ICM42600_ODR_NB, 83 + }; 84 + 85 + enum inv_icm42600_filter { 86 + /* Low-Noise mode sensor data filter (3rd order filter by default) */ 87 + INV_ICM42600_FILTER_BW_ODR_DIV_2, 88 + 89 + /* Low-Power mode sensor data filter (averaging) */ 90 + INV_ICM42600_FILTER_AVG_1X = 1, 91 + INV_ICM42600_FILTER_AVG_16X = 6, 92 + }; 93 + 94 + struct inv_icm42600_sensor_conf { 95 + int mode; 96 + int fs; 97 + int odr; 98 + int filter; 99 + }; 100 + #define INV_ICM42600_SENSOR_CONF_INIT {-1, -1, -1, -1} 101 + 102 + struct inv_icm42600_conf { 103 + struct inv_icm42600_sensor_conf gyro; 104 + struct inv_icm42600_sensor_conf accel; 105 + bool temp_en; 106 + }; 107 + 108 + struct inv_icm42600_suspended { 109 + enum inv_icm42600_sensor_mode gyro; 110 + enum inv_icm42600_sensor_mode accel; 111 + bool temp; 112 + }; 113 + 114 + /** 115 + * struct inv_icm42600_state - driver state variables 116 + * @lock: lock for serializing multiple registers access. 117 + * @chip: chip identifier. 118 + * @name: chip name. 119 + * @map: regmap pointer. 120 + * @vdd_supply: VDD voltage regulator for the chip. 121 + * @vddio_supply: I/O voltage regulator for the chip. 122 + * @orientation: sensor chip orientation relative to main hardware. 123 + * @conf: chip sensors configurations. 124 + * @suspended: suspended sensors configuration. 125 + * @indio_gyro: gyroscope IIO device. 126 + * @indio_accel: accelerometer IIO device. 127 + * @buffer: data transfer buffer aligned for DMA. 128 + * @fifo: FIFO management structure. 129 + * @timestamp: interrupt timestamps. 130 + */ 131 + struct inv_icm42600_state { 132 + struct mutex lock; 133 + enum inv_icm42600_chip chip; 134 + const char *name; 135 + struct regmap *map; 136 + struct regulator *vdd_supply; 137 + struct regulator *vddio_supply; 138 + struct iio_mount_matrix orientation; 139 + struct inv_icm42600_conf conf; 140 + struct inv_icm42600_suspended suspended; 141 + struct iio_dev *indio_gyro; 142 + struct iio_dev *indio_accel; 143 + uint8_t buffer[2] ____cacheline_aligned; 144 + struct inv_icm42600_fifo fifo; 145 + struct { 146 + int64_t gyro; 147 + int64_t accel; 148 + } timestamp; 149 + }; 150 + 151 + /* Virtual register addresses: @bank on MSB (4 upper bits), @address on LSB */ 152 + 153 + /* Bank selection register, available in all banks */ 154 + #define INV_ICM42600_REG_BANK_SEL 0x76 155 + #define INV_ICM42600_BANK_SEL_MASK GENMASK(2, 0) 156 + 157 + /* User bank 0 (MSB 0x00) */ 158 + #define INV_ICM42600_REG_DEVICE_CONFIG 0x0011 159 + #define INV_ICM42600_DEVICE_CONFIG_SOFT_RESET BIT(0) 160 + 161 + #define INV_ICM42600_REG_DRIVE_CONFIG 0x0013 162 + #define INV_ICM42600_DRIVE_CONFIG_I2C_MASK GENMASK(5, 3) 163 + #define INV_ICM42600_DRIVE_CONFIG_I2C(_rate) \ 164 + FIELD_PREP(INV_ICM42600_DRIVE_CONFIG_I2C_MASK, (_rate)) 165 + #define INV_ICM42600_DRIVE_CONFIG_SPI_MASK GENMASK(2, 0) 166 + #define INV_ICM42600_DRIVE_CONFIG_SPI(_rate) \ 167 + FIELD_PREP(INV_ICM42600_DRIVE_CONFIG_SPI_MASK, (_rate)) 168 + 169 + #define INV_ICM42600_REG_INT_CONFIG 0x0014 170 + #define INV_ICM42600_INT_CONFIG_INT2_LATCHED BIT(5) 171 + #define INV_ICM42600_INT_CONFIG_INT2_PUSH_PULL BIT(4) 172 + #define INV_ICM42600_INT_CONFIG_INT2_ACTIVE_HIGH BIT(3) 173 + #define INV_ICM42600_INT_CONFIG_INT2_ACTIVE_LOW 0x00 174 + #define INV_ICM42600_INT_CONFIG_INT1_LATCHED BIT(2) 175 + #define INV_ICM42600_INT_CONFIG_INT1_PUSH_PULL BIT(1) 176 + #define INV_ICM42600_INT_CONFIG_INT1_ACTIVE_HIGH BIT(0) 177 + #define INV_ICM42600_INT_CONFIG_INT1_ACTIVE_LOW 0x00 178 + 179 + #define INV_ICM42600_REG_FIFO_CONFIG 0x0016 180 + #define INV_ICM42600_FIFO_CONFIG_MASK GENMASK(7, 6) 181 + #define INV_ICM42600_FIFO_CONFIG_BYPASS \ 182 + FIELD_PREP(INV_ICM42600_FIFO_CONFIG_MASK, 0) 183 + #define INV_ICM42600_FIFO_CONFIG_STREAM \ 184 + FIELD_PREP(INV_ICM42600_FIFO_CONFIG_MASK, 1) 185 + #define INV_ICM42600_FIFO_CONFIG_STOP_ON_FULL \ 186 + FIELD_PREP(INV_ICM42600_FIFO_CONFIG_MASK, 2) 187 + 188 + /* all sensor data are 16 bits (2 registers wide) in big-endian */ 189 + #define INV_ICM42600_REG_TEMP_DATA 0x001D 190 + #define INV_ICM42600_REG_ACCEL_DATA_X 0x001F 191 + #define INV_ICM42600_REG_ACCEL_DATA_Y 0x0021 192 + #define INV_ICM42600_REG_ACCEL_DATA_Z 0x0023 193 + #define INV_ICM42600_REG_GYRO_DATA_X 0x0025 194 + #define INV_ICM42600_REG_GYRO_DATA_Y 0x0027 195 + #define INV_ICM42600_REG_GYRO_DATA_Z 0x0029 196 + #define INV_ICM42600_DATA_INVALID -32768 197 + 198 + #define INV_ICM42600_REG_INT_STATUS 0x002D 199 + #define INV_ICM42600_INT_STATUS_UI_FSYNC BIT(6) 200 + #define INV_ICM42600_INT_STATUS_PLL_RDY BIT(5) 201 + #define INV_ICM42600_INT_STATUS_RESET_DONE BIT(4) 202 + #define INV_ICM42600_INT_STATUS_DATA_RDY BIT(3) 203 + #define INV_ICM42600_INT_STATUS_FIFO_THS BIT(2) 204 + #define INV_ICM42600_INT_STATUS_FIFO_FULL BIT(1) 205 + #define INV_ICM42600_INT_STATUS_AGC_RDY BIT(0) 206 + 207 + /* 208 + * FIFO access registers 209 + * FIFO count is 16 bits (2 registers) big-endian 210 + * FIFO data is a continuous read register to read FIFO content 211 + */ 212 + #define INV_ICM42600_REG_FIFO_COUNT 0x002E 213 + #define INV_ICM42600_REG_FIFO_DATA 0x0030 214 + 215 + #define INV_ICM42600_REG_SIGNAL_PATH_RESET 0x004B 216 + #define INV_ICM42600_SIGNAL_PATH_RESET_DMP_INIT_EN BIT(6) 217 + #define INV_ICM42600_SIGNAL_PATH_RESET_DMP_MEM_RESET BIT(5) 218 + #define INV_ICM42600_SIGNAL_PATH_RESET_RESET BIT(3) 219 + #define INV_ICM42600_SIGNAL_PATH_RESET_TMST_STROBE BIT(2) 220 + #define INV_ICM42600_SIGNAL_PATH_RESET_FIFO_FLUSH BIT(1) 221 + 222 + /* default configuration: all data big-endian and fifo count in bytes */ 223 + #define INV_ICM42600_REG_INTF_CONFIG0 0x004C 224 + #define INV_ICM42600_INTF_CONFIG0_FIFO_HOLD_LAST_DATA BIT(7) 225 + #define INV_ICM42600_INTF_CONFIG0_FIFO_COUNT_REC BIT(6) 226 + #define INV_ICM42600_INTF_CONFIG0_FIFO_COUNT_ENDIAN BIT(5) 227 + #define INV_ICM42600_INTF_CONFIG0_SENSOR_DATA_ENDIAN BIT(4) 228 + #define INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_MASK GENMASK(1, 0) 229 + #define INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_SPI_DIS \ 230 + FIELD_PREP(INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_MASK, 2) 231 + #define INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_I2C_DIS \ 232 + FIELD_PREP(INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_MASK, 3) 233 + 234 + #define INV_ICM42600_REG_INTF_CONFIG1 0x004D 235 + #define INV_ICM42600_INTF_CONFIG1_ACCEL_LP_CLK_RC BIT(3) 236 + 237 + #define INV_ICM42600_REG_PWR_MGMT0 0x004E 238 + #define INV_ICM42600_PWR_MGMT0_TEMP_DIS BIT(5) 239 + #define INV_ICM42600_PWR_MGMT0_IDLE BIT(4) 240 + #define INV_ICM42600_PWR_MGMT0_GYRO(_mode) \ 241 + FIELD_PREP(GENMASK(3, 2), (_mode)) 242 + #define INV_ICM42600_PWR_MGMT0_ACCEL(_mode) \ 243 + FIELD_PREP(GENMASK(1, 0), (_mode)) 244 + 245 + #define INV_ICM42600_REG_GYRO_CONFIG0 0x004F 246 + #define INV_ICM42600_GYRO_CONFIG0_FS(_fs) \ 247 + FIELD_PREP(GENMASK(7, 5), (_fs)) 248 + #define INV_ICM42600_GYRO_CONFIG0_ODR(_odr) \ 249 + FIELD_PREP(GENMASK(3, 0), (_odr)) 250 + 251 + #define INV_ICM42600_REG_ACCEL_CONFIG0 0x0050 252 + #define INV_ICM42600_ACCEL_CONFIG0_FS(_fs) \ 253 + FIELD_PREP(GENMASK(7, 5), (_fs)) 254 + #define INV_ICM42600_ACCEL_CONFIG0_ODR(_odr) \ 255 + FIELD_PREP(GENMASK(3, 0), (_odr)) 256 + 257 + #define INV_ICM42600_REG_GYRO_ACCEL_CONFIG0 0x0052 258 + #define INV_ICM42600_GYRO_ACCEL_CONFIG0_ACCEL_FILT(_f) \ 259 + FIELD_PREP(GENMASK(7, 4), (_f)) 260 + #define INV_ICM42600_GYRO_ACCEL_CONFIG0_GYRO_FILT(_f) \ 261 + FIELD_PREP(GENMASK(3, 0), (_f)) 262 + 263 + #define INV_ICM42600_REG_TMST_CONFIG 0x0054 264 + #define INV_ICM42600_TMST_CONFIG_MASK GENMASK(4, 0) 265 + #define INV_ICM42600_TMST_CONFIG_TMST_TO_REGS_EN BIT(4) 266 + #define INV_ICM42600_TMST_CONFIG_TMST_RES_16US BIT(3) 267 + #define INV_ICM42600_TMST_CONFIG_TMST_DELTA_EN BIT(2) 268 + #define INV_ICM42600_TMST_CONFIG_TMST_FSYNC_EN BIT(1) 269 + #define INV_ICM42600_TMST_CONFIG_TMST_EN BIT(0) 270 + 271 + #define INV_ICM42600_REG_FIFO_CONFIG1 0x005F 272 + #define INV_ICM42600_FIFO_CONFIG1_RESUME_PARTIAL_RD BIT(6) 273 + #define INV_ICM42600_FIFO_CONFIG1_WM_GT_TH BIT(5) 274 + #define INV_ICM42600_FIFO_CONFIG1_TMST_FSYNC_EN BIT(3) 275 + #define INV_ICM42600_FIFO_CONFIG1_TEMP_EN BIT(2) 276 + #define INV_ICM42600_FIFO_CONFIG1_GYRO_EN BIT(1) 277 + #define INV_ICM42600_FIFO_CONFIG1_ACCEL_EN BIT(0) 278 + 279 + /* FIFO watermark is 16 bits (2 registers wide) in little-endian */ 280 + #define INV_ICM42600_REG_FIFO_WATERMARK 0x0060 281 + #define INV_ICM42600_FIFO_WATERMARK_VAL(_wm) \ 282 + cpu_to_le16((_wm) & GENMASK(11, 0)) 283 + /* FIFO is 2048 bytes, let 12 samples for reading latency */ 284 + #define INV_ICM42600_FIFO_WATERMARK_MAX (2048 - 12 * 16) 285 + 286 + #define INV_ICM42600_REG_INT_CONFIG1 0x0064 287 + #define INV_ICM42600_INT_CONFIG1_TPULSE_DURATION BIT(6) 288 + #define INV_ICM42600_INT_CONFIG1_TDEASSERT_DISABLE BIT(5) 289 + #define INV_ICM42600_INT_CONFIG1_ASYNC_RESET BIT(4) 290 + 291 + #define INV_ICM42600_REG_INT_SOURCE0 0x0065 292 + #define INV_ICM42600_INT_SOURCE0_UI_FSYNC_INT1_EN BIT(6) 293 + #define INV_ICM42600_INT_SOURCE0_PLL_RDY_INT1_EN BIT(5) 294 + #define INV_ICM42600_INT_SOURCE0_RESET_DONE_INT1_EN BIT(4) 295 + #define INV_ICM42600_INT_SOURCE0_UI_DRDY_INT1_EN BIT(3) 296 + #define INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN BIT(2) 297 + #define INV_ICM42600_INT_SOURCE0_FIFO_FULL_INT1_EN BIT(1) 298 + #define INV_ICM42600_INT_SOURCE0_UI_AGC_RDY_INT1_EN BIT(0) 299 + 300 + #define INV_ICM42600_REG_WHOAMI 0x0075 301 + #define INV_ICM42600_WHOAMI_ICM42600 0x40 302 + #define INV_ICM42600_WHOAMI_ICM42602 0x41 303 + #define INV_ICM42600_WHOAMI_ICM42605 0x42 304 + #define INV_ICM42600_WHOAMI_ICM42622 0x46 305 + 306 + /* User bank 1 (MSB 0x10) */ 307 + #define INV_ICM42600_REG_SENSOR_CONFIG0 0x1003 308 + #define INV_ICM42600_SENSOR_CONFIG0_ZG_DISABLE BIT(5) 309 + #define INV_ICM42600_SENSOR_CONFIG0_YG_DISABLE BIT(4) 310 + #define INV_ICM42600_SENSOR_CONFIG0_XG_DISABLE BIT(3) 311 + #define INV_ICM42600_SENSOR_CONFIG0_ZA_DISABLE BIT(2) 312 + #define INV_ICM42600_SENSOR_CONFIG0_YA_DISABLE BIT(1) 313 + #define INV_ICM42600_SENSOR_CONFIG0_XA_DISABLE BIT(0) 314 + 315 + /* Timestamp value is 20 bits (3 registers) in little-endian */ 316 + #define INV_ICM42600_REG_TMSTVAL 0x1062 317 + #define INV_ICM42600_TMSTVAL_MASK GENMASK(19, 0) 318 + 319 + #define INV_ICM42600_REG_INTF_CONFIG4 0x107A 320 + #define INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY BIT(6) 321 + #define INV_ICM42600_INTF_CONFIG4_SPI_AP_4WIRE BIT(1) 322 + 323 + #define INV_ICM42600_REG_INTF_CONFIG6 0x107C 324 + #define INV_ICM42600_INTF_CONFIG6_MASK GENMASK(4, 0) 325 + #define INV_ICM42600_INTF_CONFIG6_I3C_EN BIT(4) 326 + #define INV_ICM42600_INTF_CONFIG6_I3C_IBI_BYTE_EN BIT(3) 327 + #define INV_ICM42600_INTF_CONFIG6_I3C_IBI_EN BIT(2) 328 + #define INV_ICM42600_INTF_CONFIG6_I3C_DDR_EN BIT(1) 329 + #define INV_ICM42600_INTF_CONFIG6_I3C_SDR_EN BIT(0) 330 + 331 + /* User bank 4 (MSB 0x40) */ 332 + #define INV_ICM42600_REG_INT_SOURCE8 0x404F 333 + #define INV_ICM42600_INT_SOURCE8_FSYNC_IBI_EN BIT(5) 334 + #define INV_ICM42600_INT_SOURCE8_PLL_RDY_IBI_EN BIT(4) 335 + #define INV_ICM42600_INT_SOURCE8_UI_DRDY_IBI_EN BIT(3) 336 + #define INV_ICM42600_INT_SOURCE8_FIFO_THS_IBI_EN BIT(2) 337 + #define INV_ICM42600_INT_SOURCE8_FIFO_FULL_IBI_EN BIT(1) 338 + #define INV_ICM42600_INT_SOURCE8_AGC_RDY_IBI_EN BIT(0) 339 + 340 + #define INV_ICM42600_REG_OFFSET_USER0 0x4077 341 + #define INV_ICM42600_REG_OFFSET_USER1 0x4078 342 + #define INV_ICM42600_REG_OFFSET_USER2 0x4079 343 + #define INV_ICM42600_REG_OFFSET_USER3 0x407A 344 + #define INV_ICM42600_REG_OFFSET_USER4 0x407B 345 + #define INV_ICM42600_REG_OFFSET_USER5 0x407C 346 + #define INV_ICM42600_REG_OFFSET_USER6 0x407D 347 + #define INV_ICM42600_REG_OFFSET_USER7 0x407E 348 + #define INV_ICM42600_REG_OFFSET_USER8 0x407F 349 + 350 + /* Sleep times required by the driver */ 351 + #define INV_ICM42600_POWER_UP_TIME_MS 100 352 + #define INV_ICM42600_RESET_TIME_MS 1 353 + #define INV_ICM42600_ACCEL_STARTUP_TIME_MS 20 354 + #define INV_ICM42600_GYRO_STARTUP_TIME_MS 60 355 + #define INV_ICM42600_GYRO_STOP_TIME_MS 150 356 + #define INV_ICM42600_TEMP_STARTUP_TIME_MS 14 357 + #define INV_ICM42600_SUSPEND_DELAY_MS 2000 358 + 359 + typedef int (*inv_icm42600_bus_setup)(struct inv_icm42600_state *); 360 + 361 + extern const struct regmap_config inv_icm42600_regmap_config; 362 + extern const struct dev_pm_ops inv_icm42600_pm_ops; 363 + 364 + const struct iio_mount_matrix * 365 + inv_icm42600_get_mount_matrix(const struct iio_dev *indio_dev, 366 + const struct iio_chan_spec *chan); 367 + 368 + uint32_t inv_icm42600_odr_to_period(enum inv_icm42600_odr odr); 369 + 370 + int inv_icm42600_set_accel_conf(struct inv_icm42600_state *st, 371 + struct inv_icm42600_sensor_conf *conf, 372 + unsigned int *sleep_ms); 373 + 374 + int inv_icm42600_set_gyro_conf(struct inv_icm42600_state *st, 375 + struct inv_icm42600_sensor_conf *conf, 376 + unsigned int *sleep_ms); 377 + 378 + int inv_icm42600_set_temp_conf(struct inv_icm42600_state *st, bool enable, 379 + unsigned int *sleep_ms); 380 + 381 + int inv_icm42600_debugfs_reg(struct iio_dev *indio_dev, unsigned int reg, 382 + unsigned int writeval, unsigned int *readval); 383 + 384 + int inv_icm42600_core_probe(struct regmap *regmap, int chip, int irq, 385 + inv_icm42600_bus_setup bus_setup); 386 + 387 + struct iio_dev *inv_icm42600_gyro_init(struct inv_icm42600_state *st); 388 + 389 + int inv_icm42600_gyro_parse_fifo(struct iio_dev *indio_dev); 390 + 391 + struct iio_dev *inv_icm42600_accel_init(struct inv_icm42600_state *st); 392 + 393 + int inv_icm42600_accel_parse_fifo(struct iio_dev *indio_dev); 394 + 395 + #endif
+787
drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * Copyright (C) 2020 Invensense, Inc. 4 + */ 5 + 6 + #include <linux/kernel.h> 7 + #include <linux/device.h> 8 + #include <linux/mutex.h> 9 + #include <linux/pm_runtime.h> 10 + #include <linux/regmap.h> 11 + #include <linux/delay.h> 12 + #include <linux/math64.h> 13 + #include <linux/iio/iio.h> 14 + #include <linux/iio/buffer.h> 15 + #include <linux/iio/kfifo_buf.h> 16 + 17 + #include "inv_icm42600.h" 18 + #include "inv_icm42600_temp.h" 19 + #include "inv_icm42600_buffer.h" 20 + #include "inv_icm42600_timestamp.h" 21 + 22 + #define INV_ICM42600_ACCEL_CHAN(_modifier, _index, _ext_info) \ 23 + { \ 24 + .type = IIO_ACCEL, \ 25 + .modified = 1, \ 26 + .channel2 = _modifier, \ 27 + .info_mask_separate = \ 28 + BIT(IIO_CHAN_INFO_RAW) | \ 29 + BIT(IIO_CHAN_INFO_CALIBBIAS), \ 30 + .info_mask_shared_by_type = \ 31 + BIT(IIO_CHAN_INFO_SCALE), \ 32 + .info_mask_shared_by_type_available = \ 33 + BIT(IIO_CHAN_INFO_SCALE) | \ 34 + BIT(IIO_CHAN_INFO_CALIBBIAS), \ 35 + .info_mask_shared_by_all = \ 36 + BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 37 + .info_mask_shared_by_all_available = \ 38 + BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 39 + .scan_index = _index, \ 40 + .scan_type = { \ 41 + .sign = 's', \ 42 + .realbits = 16, \ 43 + .storagebits = 16, \ 44 + .endianness = IIO_BE, \ 45 + }, \ 46 + .ext_info = _ext_info, \ 47 + } 48 + 49 + enum inv_icm42600_accel_scan { 50 + INV_ICM42600_ACCEL_SCAN_X, 51 + INV_ICM42600_ACCEL_SCAN_Y, 52 + INV_ICM42600_ACCEL_SCAN_Z, 53 + INV_ICM42600_ACCEL_SCAN_TEMP, 54 + INV_ICM42600_ACCEL_SCAN_TIMESTAMP, 55 + }; 56 + 57 + static const struct iio_chan_spec_ext_info inv_icm42600_accel_ext_infos[] = { 58 + IIO_MOUNT_MATRIX(IIO_SHARED_BY_ALL, inv_icm42600_get_mount_matrix), 59 + {}, 60 + }; 61 + 62 + static const struct iio_chan_spec inv_icm42600_accel_channels[] = { 63 + INV_ICM42600_ACCEL_CHAN(IIO_MOD_X, INV_ICM42600_ACCEL_SCAN_X, 64 + inv_icm42600_accel_ext_infos), 65 + INV_ICM42600_ACCEL_CHAN(IIO_MOD_Y, INV_ICM42600_ACCEL_SCAN_Y, 66 + inv_icm42600_accel_ext_infos), 67 + INV_ICM42600_ACCEL_CHAN(IIO_MOD_Z, INV_ICM42600_ACCEL_SCAN_Z, 68 + inv_icm42600_accel_ext_infos), 69 + INV_ICM42600_TEMP_CHAN(INV_ICM42600_ACCEL_SCAN_TEMP), 70 + IIO_CHAN_SOFT_TIMESTAMP(INV_ICM42600_ACCEL_SCAN_TIMESTAMP), 71 + }; 72 + 73 + /* 74 + * IIO buffer data: size must be a power of 2 and timestamp aligned 75 + * 16 bytes: 6 bytes acceleration, 2 bytes temperature, 8 bytes timestamp 76 + */ 77 + struct inv_icm42600_accel_buffer { 78 + struct inv_icm42600_fifo_sensor_data accel; 79 + int16_t temp; 80 + int64_t timestamp __aligned(8); 81 + }; 82 + 83 + #define INV_ICM42600_SCAN_MASK_ACCEL_3AXIS \ 84 + (BIT(INV_ICM42600_ACCEL_SCAN_X) | \ 85 + BIT(INV_ICM42600_ACCEL_SCAN_Y) | \ 86 + BIT(INV_ICM42600_ACCEL_SCAN_Z)) 87 + 88 + #define INV_ICM42600_SCAN_MASK_TEMP BIT(INV_ICM42600_ACCEL_SCAN_TEMP) 89 + 90 + static const unsigned long inv_icm42600_accel_scan_masks[] = { 91 + /* 3-axis accel + temperature */ 92 + INV_ICM42600_SCAN_MASK_ACCEL_3AXIS | INV_ICM42600_SCAN_MASK_TEMP, 93 + 0, 94 + }; 95 + 96 + /* enable accelerometer sensor and FIFO write */ 97 + static int inv_icm42600_accel_update_scan_mode(struct iio_dev *indio_dev, 98 + const unsigned long *scan_mask) 99 + { 100 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 101 + struct inv_icm42600_timestamp *ts = iio_priv(indio_dev); 102 + struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT; 103 + unsigned int fifo_en = 0; 104 + unsigned int sleep_temp = 0; 105 + unsigned int sleep_accel = 0; 106 + unsigned int sleep; 107 + int ret; 108 + 109 + mutex_lock(&st->lock); 110 + 111 + if (*scan_mask & INV_ICM42600_SCAN_MASK_TEMP) { 112 + /* enable temp sensor */ 113 + ret = inv_icm42600_set_temp_conf(st, true, &sleep_temp); 114 + if (ret) 115 + goto out_unlock; 116 + fifo_en |= INV_ICM42600_SENSOR_TEMP; 117 + } 118 + 119 + if (*scan_mask & INV_ICM42600_SCAN_MASK_ACCEL_3AXIS) { 120 + /* enable accel sensor */ 121 + conf.mode = INV_ICM42600_SENSOR_MODE_LOW_NOISE; 122 + ret = inv_icm42600_set_accel_conf(st, &conf, &sleep_accel); 123 + if (ret) 124 + goto out_unlock; 125 + fifo_en |= INV_ICM42600_SENSOR_ACCEL; 126 + } 127 + 128 + /* update data FIFO write */ 129 + inv_icm42600_timestamp_apply_odr(ts, 0, 0, 0); 130 + ret = inv_icm42600_buffer_set_fifo_en(st, fifo_en | st->fifo.en); 131 + if (ret) 132 + goto out_unlock; 133 + 134 + ret = inv_icm42600_buffer_update_watermark(st); 135 + 136 + out_unlock: 137 + mutex_unlock(&st->lock); 138 + /* sleep maximum required time */ 139 + if (sleep_accel > sleep_temp) 140 + sleep = sleep_accel; 141 + else 142 + sleep = sleep_temp; 143 + if (sleep) 144 + msleep(sleep); 145 + return ret; 146 + } 147 + 148 + static int inv_icm42600_accel_read_sensor(struct inv_icm42600_state *st, 149 + struct iio_chan_spec const *chan, 150 + int16_t *val) 151 + { 152 + struct device *dev = regmap_get_device(st->map); 153 + struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT; 154 + unsigned int reg; 155 + __be16 *data; 156 + int ret; 157 + 158 + if (chan->type != IIO_ACCEL) 159 + return -EINVAL; 160 + 161 + switch (chan->channel2) { 162 + case IIO_MOD_X: 163 + reg = INV_ICM42600_REG_ACCEL_DATA_X; 164 + break; 165 + case IIO_MOD_Y: 166 + reg = INV_ICM42600_REG_ACCEL_DATA_Y; 167 + break; 168 + case IIO_MOD_Z: 169 + reg = INV_ICM42600_REG_ACCEL_DATA_Z; 170 + break; 171 + default: 172 + return -EINVAL; 173 + } 174 + 175 + pm_runtime_get_sync(dev); 176 + mutex_lock(&st->lock); 177 + 178 + /* enable accel sensor */ 179 + conf.mode = INV_ICM42600_SENSOR_MODE_LOW_NOISE; 180 + ret = inv_icm42600_set_accel_conf(st, &conf, NULL); 181 + if (ret) 182 + goto exit; 183 + 184 + /* read accel register data */ 185 + data = (__be16 *)&st->buffer[0]; 186 + ret = regmap_bulk_read(st->map, reg, data, sizeof(*data)); 187 + if (ret) 188 + goto exit; 189 + 190 + *val = (int16_t)be16_to_cpup(data); 191 + if (*val == INV_ICM42600_DATA_INVALID) 192 + ret = -EINVAL; 193 + exit: 194 + mutex_unlock(&st->lock); 195 + pm_runtime_mark_last_busy(dev); 196 + pm_runtime_put_autosuspend(dev); 197 + return ret; 198 + } 199 + 200 + /* IIO format int + nano */ 201 + static const int inv_icm42600_accel_scale[] = { 202 + /* +/- 16G => 0.004788403 m/s-2 */ 203 + [2 * INV_ICM42600_ACCEL_FS_16G] = 0, 204 + [2 * INV_ICM42600_ACCEL_FS_16G + 1] = 4788403, 205 + /* +/- 8G => 0.002394202 m/s-2 */ 206 + [2 * INV_ICM42600_ACCEL_FS_8G] = 0, 207 + [2 * INV_ICM42600_ACCEL_FS_8G + 1] = 2394202, 208 + /* +/- 4G => 0.001197101 m/s-2 */ 209 + [2 * INV_ICM42600_ACCEL_FS_4G] = 0, 210 + [2 * INV_ICM42600_ACCEL_FS_4G + 1] = 1197101, 211 + /* +/- 2G => 0.000598550 m/s-2 */ 212 + [2 * INV_ICM42600_ACCEL_FS_2G] = 0, 213 + [2 * INV_ICM42600_ACCEL_FS_2G + 1] = 598550, 214 + }; 215 + 216 + static int inv_icm42600_accel_read_scale(struct inv_icm42600_state *st, 217 + int *val, int *val2) 218 + { 219 + unsigned int idx; 220 + 221 + idx = st->conf.accel.fs; 222 + 223 + *val = inv_icm42600_accel_scale[2 * idx]; 224 + *val2 = inv_icm42600_accel_scale[2 * idx + 1]; 225 + return IIO_VAL_INT_PLUS_NANO; 226 + } 227 + 228 + static int inv_icm42600_accel_write_scale(struct inv_icm42600_state *st, 229 + int val, int val2) 230 + { 231 + struct device *dev = regmap_get_device(st->map); 232 + unsigned int idx; 233 + struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT; 234 + int ret; 235 + 236 + for (idx = 0; idx < ARRAY_SIZE(inv_icm42600_accel_scale); idx += 2) { 237 + if (val == inv_icm42600_accel_scale[idx] && 238 + val2 == inv_icm42600_accel_scale[idx + 1]) 239 + break; 240 + } 241 + if (idx >= ARRAY_SIZE(inv_icm42600_accel_scale)) 242 + return -EINVAL; 243 + 244 + conf.fs = idx / 2; 245 + 246 + pm_runtime_get_sync(dev); 247 + mutex_lock(&st->lock); 248 + 249 + ret = inv_icm42600_set_accel_conf(st, &conf, NULL); 250 + 251 + mutex_unlock(&st->lock); 252 + pm_runtime_mark_last_busy(dev); 253 + pm_runtime_put_autosuspend(dev); 254 + 255 + return ret; 256 + } 257 + 258 + /* IIO format int + micro */ 259 + static const int inv_icm42600_accel_odr[] = { 260 + /* 12.5Hz */ 261 + 12, 500000, 262 + /* 25Hz */ 263 + 25, 0, 264 + /* 50Hz */ 265 + 50, 0, 266 + /* 100Hz */ 267 + 100, 0, 268 + /* 200Hz */ 269 + 200, 0, 270 + /* 1kHz */ 271 + 1000, 0, 272 + /* 2kHz */ 273 + 2000, 0, 274 + /* 4kHz */ 275 + 4000, 0, 276 + }; 277 + 278 + static const int inv_icm42600_accel_odr_conv[] = { 279 + INV_ICM42600_ODR_12_5HZ, 280 + INV_ICM42600_ODR_25HZ, 281 + INV_ICM42600_ODR_50HZ, 282 + INV_ICM42600_ODR_100HZ, 283 + INV_ICM42600_ODR_200HZ, 284 + INV_ICM42600_ODR_1KHZ_LN, 285 + INV_ICM42600_ODR_2KHZ_LN, 286 + INV_ICM42600_ODR_4KHZ_LN, 287 + }; 288 + 289 + static int inv_icm42600_accel_read_odr(struct inv_icm42600_state *st, 290 + int *val, int *val2) 291 + { 292 + unsigned int odr; 293 + unsigned int i; 294 + 295 + odr = st->conf.accel.odr; 296 + 297 + for (i = 0; i < ARRAY_SIZE(inv_icm42600_accel_odr_conv); ++i) { 298 + if (inv_icm42600_accel_odr_conv[i] == odr) 299 + break; 300 + } 301 + if (i >= ARRAY_SIZE(inv_icm42600_accel_odr_conv)) 302 + return -EINVAL; 303 + 304 + *val = inv_icm42600_accel_odr[2 * i]; 305 + *val2 = inv_icm42600_accel_odr[2 * i + 1]; 306 + 307 + return IIO_VAL_INT_PLUS_MICRO; 308 + } 309 + 310 + static int inv_icm42600_accel_write_odr(struct iio_dev *indio_dev, 311 + int val, int val2) 312 + { 313 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 314 + struct inv_icm42600_timestamp *ts = iio_priv(indio_dev); 315 + struct device *dev = regmap_get_device(st->map); 316 + unsigned int idx; 317 + struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT; 318 + int ret; 319 + 320 + for (idx = 0; idx < ARRAY_SIZE(inv_icm42600_accel_odr); idx += 2) { 321 + if (val == inv_icm42600_accel_odr[idx] && 322 + val2 == inv_icm42600_accel_odr[idx + 1]) 323 + break; 324 + } 325 + if (idx >= ARRAY_SIZE(inv_icm42600_accel_odr)) 326 + return -EINVAL; 327 + 328 + conf.odr = inv_icm42600_accel_odr_conv[idx / 2]; 329 + 330 + pm_runtime_get_sync(dev); 331 + mutex_lock(&st->lock); 332 + 333 + ret = inv_icm42600_timestamp_update_odr(ts, inv_icm42600_odr_to_period(conf.odr), 334 + iio_buffer_enabled(indio_dev)); 335 + if (ret) 336 + goto out_unlock; 337 + 338 + ret = inv_icm42600_set_accel_conf(st, &conf, NULL); 339 + if (ret) 340 + goto out_unlock; 341 + inv_icm42600_buffer_update_fifo_period(st); 342 + inv_icm42600_buffer_update_watermark(st); 343 + 344 + out_unlock: 345 + mutex_unlock(&st->lock); 346 + pm_runtime_mark_last_busy(dev); 347 + pm_runtime_put_autosuspend(dev); 348 + 349 + return ret; 350 + } 351 + 352 + /* 353 + * Calibration bias values, IIO range format int + micro. 354 + * Value is limited to +/-1g coded on 12 bits signed. Step is 0.5mg. 355 + */ 356 + static int inv_icm42600_accel_calibbias[] = { 357 + -10, 42010, /* min: -10.042010 m/s² */ 358 + 0, 4903, /* step: 0.004903 m/s² */ 359 + 10, 37106, /* max: 10.037106 m/s² */ 360 + }; 361 + 362 + static int inv_icm42600_accel_read_offset(struct inv_icm42600_state *st, 363 + struct iio_chan_spec const *chan, 364 + int *val, int *val2) 365 + { 366 + struct device *dev = regmap_get_device(st->map); 367 + int64_t val64; 368 + int32_t bias; 369 + unsigned int reg; 370 + int16_t offset; 371 + uint8_t data[2]; 372 + int ret; 373 + 374 + if (chan->type != IIO_ACCEL) 375 + return -EINVAL; 376 + 377 + switch (chan->channel2) { 378 + case IIO_MOD_X: 379 + reg = INV_ICM42600_REG_OFFSET_USER4; 380 + break; 381 + case IIO_MOD_Y: 382 + reg = INV_ICM42600_REG_OFFSET_USER6; 383 + break; 384 + case IIO_MOD_Z: 385 + reg = INV_ICM42600_REG_OFFSET_USER7; 386 + break; 387 + default: 388 + return -EINVAL; 389 + } 390 + 391 + pm_runtime_get_sync(dev); 392 + mutex_lock(&st->lock); 393 + 394 + ret = regmap_bulk_read(st->map, reg, st->buffer, sizeof(data)); 395 + memcpy(data, st->buffer, sizeof(data)); 396 + 397 + mutex_unlock(&st->lock); 398 + pm_runtime_mark_last_busy(dev); 399 + pm_runtime_put_autosuspend(dev); 400 + if (ret) 401 + return ret; 402 + 403 + /* 12 bits signed value */ 404 + switch (chan->channel2) { 405 + case IIO_MOD_X: 406 + offset = sign_extend32(((data[0] & 0xF0) << 4) | data[1], 11); 407 + break; 408 + case IIO_MOD_Y: 409 + offset = sign_extend32(((data[1] & 0x0F) << 8) | data[0], 11); 410 + break; 411 + case IIO_MOD_Z: 412 + offset = sign_extend32(((data[0] & 0xF0) << 4) | data[1], 11); 413 + break; 414 + default: 415 + return -EINVAL; 416 + } 417 + 418 + /* 419 + * convert raw offset to g then to m/s² 420 + * 12 bits signed raw step 0.5mg to g: 5 / 10000 421 + * g to m/s²: 9.806650 422 + * result in micro (1000000) 423 + * (offset * 5 * 9.806650 * 1000000) / 10000 424 + */ 425 + val64 = (int64_t)offset * 5LL * 9806650LL; 426 + /* for rounding, add + or - divisor (10000) divided by 2 */ 427 + if (val64 >= 0) 428 + val64 += 10000LL / 2LL; 429 + else 430 + val64 -= 10000LL / 2LL; 431 + bias = div_s64(val64, 10000L); 432 + *val = bias / 1000000L; 433 + *val2 = bias % 1000000L; 434 + 435 + return IIO_VAL_INT_PLUS_MICRO; 436 + } 437 + 438 + static int inv_icm42600_accel_write_offset(struct inv_icm42600_state *st, 439 + struct iio_chan_spec const *chan, 440 + int val, int val2) 441 + { 442 + struct device *dev = regmap_get_device(st->map); 443 + int64_t val64; 444 + int32_t min, max; 445 + unsigned int reg, regval; 446 + int16_t offset; 447 + int ret; 448 + 449 + if (chan->type != IIO_ACCEL) 450 + return -EINVAL; 451 + 452 + switch (chan->channel2) { 453 + case IIO_MOD_X: 454 + reg = INV_ICM42600_REG_OFFSET_USER4; 455 + break; 456 + case IIO_MOD_Y: 457 + reg = INV_ICM42600_REG_OFFSET_USER6; 458 + break; 459 + case IIO_MOD_Z: 460 + reg = INV_ICM42600_REG_OFFSET_USER7; 461 + break; 462 + default: 463 + return -EINVAL; 464 + } 465 + 466 + /* inv_icm42600_accel_calibbias: min - step - max in micro */ 467 + min = inv_icm42600_accel_calibbias[0] * 1000000L + 468 + inv_icm42600_accel_calibbias[1]; 469 + max = inv_icm42600_accel_calibbias[4] * 1000000L + 470 + inv_icm42600_accel_calibbias[5]; 471 + val64 = (int64_t)val * 1000000LL + (int64_t)val2; 472 + if (val64 < min || val64 > max) 473 + return -EINVAL; 474 + 475 + /* 476 + * convert m/s² to g then to raw value 477 + * m/s² to g: 1 / 9.806650 478 + * g to raw 12 bits signed, step 0.5mg: 10000 / 5 479 + * val in micro (1000000) 480 + * val * 10000 / (9.806650 * 1000000 * 5) 481 + */ 482 + val64 = val64 * 10000LL; 483 + /* for rounding, add + or - divisor (9806650 * 5) divided by 2 */ 484 + if (val64 >= 0) 485 + val64 += 9806650 * 5 / 2; 486 + else 487 + val64 -= 9806650 * 5 / 2; 488 + offset = div_s64(val64, 9806650 * 5); 489 + 490 + /* clamp value limited to 12 bits signed */ 491 + if (offset < -2048) 492 + offset = -2048; 493 + else if (offset > 2047) 494 + offset = 2047; 495 + 496 + pm_runtime_get_sync(dev); 497 + mutex_lock(&st->lock); 498 + 499 + switch (chan->channel2) { 500 + case IIO_MOD_X: 501 + /* OFFSET_USER4 register is shared */ 502 + ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER4, 503 + &regval); 504 + if (ret) 505 + goto out_unlock; 506 + st->buffer[0] = ((offset & 0xF00) >> 4) | (regval & 0x0F); 507 + st->buffer[1] = offset & 0xFF; 508 + break; 509 + case IIO_MOD_Y: 510 + /* OFFSET_USER7 register is shared */ 511 + ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER7, 512 + &regval); 513 + if (ret) 514 + goto out_unlock; 515 + st->buffer[0] = offset & 0xFF; 516 + st->buffer[1] = ((offset & 0xF00) >> 8) | (regval & 0xF0); 517 + break; 518 + case IIO_MOD_Z: 519 + /* OFFSET_USER7 register is shared */ 520 + ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER7, 521 + &regval); 522 + if (ret) 523 + goto out_unlock; 524 + st->buffer[0] = ((offset & 0xF00) >> 4) | (regval & 0x0F); 525 + st->buffer[1] = offset & 0xFF; 526 + break; 527 + default: 528 + ret = -EINVAL; 529 + goto out_unlock; 530 + } 531 + 532 + ret = regmap_bulk_write(st->map, reg, st->buffer, 2); 533 + 534 + out_unlock: 535 + mutex_unlock(&st->lock); 536 + pm_runtime_mark_last_busy(dev); 537 + pm_runtime_put_autosuspend(dev); 538 + return ret; 539 + } 540 + 541 + static int inv_icm42600_accel_read_raw(struct iio_dev *indio_dev, 542 + struct iio_chan_spec const *chan, 543 + int *val, int *val2, long mask) 544 + { 545 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 546 + int16_t data; 547 + int ret; 548 + 549 + switch (chan->type) { 550 + case IIO_ACCEL: 551 + break; 552 + case IIO_TEMP: 553 + return inv_icm42600_temp_read_raw(indio_dev, chan, val, val2, mask); 554 + default: 555 + return -EINVAL; 556 + } 557 + 558 + switch (mask) { 559 + case IIO_CHAN_INFO_RAW: 560 + ret = iio_device_claim_direct_mode(indio_dev); 561 + if (ret) 562 + return ret; 563 + ret = inv_icm42600_accel_read_sensor(st, chan, &data); 564 + iio_device_release_direct_mode(indio_dev); 565 + if (ret) 566 + return ret; 567 + *val = data; 568 + return IIO_VAL_INT; 569 + case IIO_CHAN_INFO_SCALE: 570 + return inv_icm42600_accel_read_scale(st, val, val2); 571 + case IIO_CHAN_INFO_SAMP_FREQ: 572 + return inv_icm42600_accel_read_odr(st, val, val2); 573 + case IIO_CHAN_INFO_CALIBBIAS: 574 + return inv_icm42600_accel_read_offset(st, chan, val, val2); 575 + default: 576 + return -EINVAL; 577 + } 578 + } 579 + 580 + static int inv_icm42600_accel_read_avail(struct iio_dev *indio_dev, 581 + struct iio_chan_spec const *chan, 582 + const int **vals, 583 + int *type, int *length, long mask) 584 + { 585 + if (chan->type != IIO_ACCEL) 586 + return -EINVAL; 587 + 588 + switch (mask) { 589 + case IIO_CHAN_INFO_SCALE: 590 + *vals = inv_icm42600_accel_scale; 591 + *type = IIO_VAL_INT_PLUS_NANO; 592 + *length = ARRAY_SIZE(inv_icm42600_accel_scale); 593 + return IIO_AVAIL_LIST; 594 + case IIO_CHAN_INFO_SAMP_FREQ: 595 + *vals = inv_icm42600_accel_odr; 596 + *type = IIO_VAL_INT_PLUS_MICRO; 597 + *length = ARRAY_SIZE(inv_icm42600_accel_odr); 598 + return IIO_AVAIL_LIST; 599 + case IIO_CHAN_INFO_CALIBBIAS: 600 + *vals = inv_icm42600_accel_calibbias; 601 + *type = IIO_VAL_INT_PLUS_MICRO; 602 + return IIO_AVAIL_RANGE; 603 + default: 604 + return -EINVAL; 605 + } 606 + } 607 + 608 + static int inv_icm42600_accel_write_raw(struct iio_dev *indio_dev, 609 + struct iio_chan_spec const *chan, 610 + int val, int val2, long mask) 611 + { 612 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 613 + int ret; 614 + 615 + if (chan->type != IIO_ACCEL) 616 + return -EINVAL; 617 + 618 + switch (mask) { 619 + case IIO_CHAN_INFO_SCALE: 620 + ret = iio_device_claim_direct_mode(indio_dev); 621 + if (ret) 622 + return ret; 623 + ret = inv_icm42600_accel_write_scale(st, val, val2); 624 + iio_device_release_direct_mode(indio_dev); 625 + return ret; 626 + case IIO_CHAN_INFO_SAMP_FREQ: 627 + return inv_icm42600_accel_write_odr(indio_dev, val, val2); 628 + case IIO_CHAN_INFO_CALIBBIAS: 629 + ret = iio_device_claim_direct_mode(indio_dev); 630 + if (ret) 631 + return ret; 632 + ret = inv_icm42600_accel_write_offset(st, chan, val, val2); 633 + iio_device_release_direct_mode(indio_dev); 634 + return ret; 635 + default: 636 + return -EINVAL; 637 + } 638 + } 639 + 640 + static int inv_icm42600_accel_write_raw_get_fmt(struct iio_dev *indio_dev, 641 + struct iio_chan_spec const *chan, 642 + long mask) 643 + { 644 + if (chan->type != IIO_ACCEL) 645 + return -EINVAL; 646 + 647 + switch (mask) { 648 + case IIO_CHAN_INFO_SCALE: 649 + return IIO_VAL_INT_PLUS_NANO; 650 + case IIO_CHAN_INFO_SAMP_FREQ: 651 + return IIO_VAL_INT_PLUS_MICRO; 652 + case IIO_CHAN_INFO_CALIBBIAS: 653 + return IIO_VAL_INT_PLUS_MICRO; 654 + default: 655 + return -EINVAL; 656 + } 657 + } 658 + 659 + static int inv_icm42600_accel_hwfifo_set_watermark(struct iio_dev *indio_dev, 660 + unsigned int val) 661 + { 662 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 663 + int ret; 664 + 665 + mutex_lock(&st->lock); 666 + 667 + st->fifo.watermark.accel = val; 668 + ret = inv_icm42600_buffer_update_watermark(st); 669 + 670 + mutex_unlock(&st->lock); 671 + 672 + return ret; 673 + } 674 + 675 + static int inv_icm42600_accel_hwfifo_flush(struct iio_dev *indio_dev, 676 + unsigned int count) 677 + { 678 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 679 + int ret; 680 + 681 + if (count == 0) 682 + return 0; 683 + 684 + mutex_lock(&st->lock); 685 + 686 + ret = inv_icm42600_buffer_hwfifo_flush(st, count); 687 + if (!ret) 688 + ret = st->fifo.nb.accel; 689 + 690 + mutex_unlock(&st->lock); 691 + 692 + return ret; 693 + } 694 + 695 + static const struct iio_info inv_icm42600_accel_info = { 696 + .read_raw = inv_icm42600_accel_read_raw, 697 + .read_avail = inv_icm42600_accel_read_avail, 698 + .write_raw = inv_icm42600_accel_write_raw, 699 + .write_raw_get_fmt = inv_icm42600_accel_write_raw_get_fmt, 700 + .debugfs_reg_access = inv_icm42600_debugfs_reg, 701 + .update_scan_mode = inv_icm42600_accel_update_scan_mode, 702 + .hwfifo_set_watermark = inv_icm42600_accel_hwfifo_set_watermark, 703 + .hwfifo_flush_to_buffer = inv_icm42600_accel_hwfifo_flush, 704 + }; 705 + 706 + struct iio_dev *inv_icm42600_accel_init(struct inv_icm42600_state *st) 707 + { 708 + struct device *dev = regmap_get_device(st->map); 709 + const char *name; 710 + struct inv_icm42600_timestamp *ts; 711 + struct iio_dev *indio_dev; 712 + struct iio_buffer *buffer; 713 + int ret; 714 + 715 + name = devm_kasprintf(dev, GFP_KERNEL, "%s-accel", st->name); 716 + if (!name) 717 + return ERR_PTR(-ENOMEM); 718 + 719 + indio_dev = devm_iio_device_alloc(dev, sizeof(*ts)); 720 + if (!indio_dev) 721 + return ERR_PTR(-ENOMEM); 722 + 723 + buffer = devm_iio_kfifo_allocate(dev); 724 + if (!buffer) 725 + return ERR_PTR(-ENOMEM); 726 + 727 + ts = iio_priv(indio_dev); 728 + inv_icm42600_timestamp_init(ts, inv_icm42600_odr_to_period(st->conf.accel.odr)); 729 + 730 + iio_device_set_drvdata(indio_dev, st); 731 + indio_dev->name = name; 732 + indio_dev->info = &inv_icm42600_accel_info; 733 + indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE; 734 + indio_dev->channels = inv_icm42600_accel_channels; 735 + indio_dev->num_channels = ARRAY_SIZE(inv_icm42600_accel_channels); 736 + indio_dev->available_scan_masks = inv_icm42600_accel_scan_masks; 737 + indio_dev->setup_ops = &inv_icm42600_buffer_ops; 738 + 739 + iio_device_attach_buffer(indio_dev, buffer); 740 + 741 + ret = devm_iio_device_register(dev, indio_dev); 742 + if (ret) 743 + return ERR_PTR(ret); 744 + 745 + return indio_dev; 746 + } 747 + 748 + int inv_icm42600_accel_parse_fifo(struct iio_dev *indio_dev) 749 + { 750 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 751 + struct inv_icm42600_timestamp *ts = iio_priv(indio_dev); 752 + ssize_t i, size; 753 + unsigned int no; 754 + const void *accel, *gyro, *timestamp; 755 + const int8_t *temp; 756 + unsigned int odr; 757 + int64_t ts_val; 758 + struct inv_icm42600_accel_buffer buffer; 759 + 760 + /* parse all fifo packets */ 761 + for (i = 0, no = 0; i < st->fifo.count; i += size, ++no) { 762 + size = inv_icm42600_fifo_decode_packet(&st->fifo.data[i], 763 + &accel, &gyro, &temp, &timestamp, &odr); 764 + /* quit if error or FIFO is empty */ 765 + if (size <= 0) 766 + return size; 767 + 768 + /* skip packet if no accel data or data is invalid */ 769 + if (accel == NULL || !inv_icm42600_fifo_is_data_valid(accel)) 770 + continue; 771 + 772 + /* update odr */ 773 + if (odr & INV_ICM42600_SENSOR_ACCEL) 774 + inv_icm42600_timestamp_apply_odr(ts, st->fifo.period, 775 + st->fifo.nb.total, no); 776 + 777 + /* buffer is copied to userspace, zeroing it to avoid any data leak */ 778 + memset(&buffer, 0, sizeof(buffer)); 779 + memcpy(&buffer.accel, accel, sizeof(buffer.accel)); 780 + /* convert 8 bits FIFO temperature in high resolution format */ 781 + buffer.temp = temp ? (*temp * 64) : 0; 782 + ts_val = inv_icm42600_timestamp_pop(ts); 783 + iio_push_to_buffers_with_timestamp(indio_dev, &buffer, ts_val); 784 + } 785 + 786 + return 0; 787 + }
+601
drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * Copyright (C) 2020 Invensense, Inc. 4 + */ 5 + 6 + #include <linux/kernel.h> 7 + #include <linux/device.h> 8 + #include <linux/mutex.h> 9 + #include <linux/pm_runtime.h> 10 + #include <linux/regmap.h> 11 + #include <linux/delay.h> 12 + #include <linux/iio/iio.h> 13 + #include <linux/iio/buffer.h> 14 + 15 + #include "inv_icm42600.h" 16 + #include "inv_icm42600_timestamp.h" 17 + #include "inv_icm42600_buffer.h" 18 + 19 + /* FIFO header: 1 byte */ 20 + #define INV_ICM42600_FIFO_HEADER_MSG BIT(7) 21 + #define INV_ICM42600_FIFO_HEADER_ACCEL BIT(6) 22 + #define INV_ICM42600_FIFO_HEADER_GYRO BIT(5) 23 + #define INV_ICM42600_FIFO_HEADER_TMST_FSYNC GENMASK(3, 2) 24 + #define INV_ICM42600_FIFO_HEADER_ODR_ACCEL BIT(1) 25 + #define INV_ICM42600_FIFO_HEADER_ODR_GYRO BIT(0) 26 + 27 + struct inv_icm42600_fifo_1sensor_packet { 28 + uint8_t header; 29 + struct inv_icm42600_fifo_sensor_data data; 30 + int8_t temp; 31 + } __packed; 32 + #define INV_ICM42600_FIFO_1SENSOR_PACKET_SIZE 8 33 + 34 + struct inv_icm42600_fifo_2sensors_packet { 35 + uint8_t header; 36 + struct inv_icm42600_fifo_sensor_data accel; 37 + struct inv_icm42600_fifo_sensor_data gyro; 38 + int8_t temp; 39 + __be16 timestamp; 40 + } __packed; 41 + #define INV_ICM42600_FIFO_2SENSORS_PACKET_SIZE 16 42 + 43 + ssize_t inv_icm42600_fifo_decode_packet(const void *packet, const void **accel, 44 + const void **gyro, const int8_t **temp, 45 + const void **timestamp, unsigned int *odr) 46 + { 47 + const struct inv_icm42600_fifo_1sensor_packet *pack1 = packet; 48 + const struct inv_icm42600_fifo_2sensors_packet *pack2 = packet; 49 + uint8_t header = *((const uint8_t *)packet); 50 + 51 + /* FIFO empty */ 52 + if (header & INV_ICM42600_FIFO_HEADER_MSG) { 53 + *accel = NULL; 54 + *gyro = NULL; 55 + *temp = NULL; 56 + *timestamp = NULL; 57 + *odr = 0; 58 + return 0; 59 + } 60 + 61 + /* handle odr flags */ 62 + *odr = 0; 63 + if (header & INV_ICM42600_FIFO_HEADER_ODR_GYRO) 64 + *odr |= INV_ICM42600_SENSOR_GYRO; 65 + if (header & INV_ICM42600_FIFO_HEADER_ODR_ACCEL) 66 + *odr |= INV_ICM42600_SENSOR_ACCEL; 67 + 68 + /* accel + gyro */ 69 + if ((header & INV_ICM42600_FIFO_HEADER_ACCEL) && 70 + (header & INV_ICM42600_FIFO_HEADER_GYRO)) { 71 + *accel = &pack2->accel; 72 + *gyro = &pack2->gyro; 73 + *temp = &pack2->temp; 74 + *timestamp = &pack2->timestamp; 75 + return INV_ICM42600_FIFO_2SENSORS_PACKET_SIZE; 76 + } 77 + 78 + /* accel only */ 79 + if (header & INV_ICM42600_FIFO_HEADER_ACCEL) { 80 + *accel = &pack1->data; 81 + *gyro = NULL; 82 + *temp = &pack1->temp; 83 + *timestamp = NULL; 84 + return INV_ICM42600_FIFO_1SENSOR_PACKET_SIZE; 85 + } 86 + 87 + /* gyro only */ 88 + if (header & INV_ICM42600_FIFO_HEADER_GYRO) { 89 + *accel = NULL; 90 + *gyro = &pack1->data; 91 + *temp = &pack1->temp; 92 + *timestamp = NULL; 93 + return INV_ICM42600_FIFO_1SENSOR_PACKET_SIZE; 94 + } 95 + 96 + /* invalid packet if here */ 97 + return -EINVAL; 98 + } 99 + 100 + void inv_icm42600_buffer_update_fifo_period(struct inv_icm42600_state *st) 101 + { 102 + uint32_t period_gyro, period_accel, period; 103 + 104 + if (st->fifo.en & INV_ICM42600_SENSOR_GYRO) 105 + period_gyro = inv_icm42600_odr_to_period(st->conf.gyro.odr); 106 + else 107 + period_gyro = U32_MAX; 108 + 109 + if (st->fifo.en & INV_ICM42600_SENSOR_ACCEL) 110 + period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr); 111 + else 112 + period_accel = U32_MAX; 113 + 114 + if (period_gyro <= period_accel) 115 + period = period_gyro; 116 + else 117 + period = period_accel; 118 + 119 + st->fifo.period = period; 120 + } 121 + 122 + int inv_icm42600_buffer_set_fifo_en(struct inv_icm42600_state *st, 123 + unsigned int fifo_en) 124 + { 125 + unsigned int mask, val; 126 + int ret; 127 + 128 + /* update only FIFO EN bits */ 129 + mask = INV_ICM42600_FIFO_CONFIG1_TMST_FSYNC_EN | 130 + INV_ICM42600_FIFO_CONFIG1_TEMP_EN | 131 + INV_ICM42600_FIFO_CONFIG1_GYRO_EN | 132 + INV_ICM42600_FIFO_CONFIG1_ACCEL_EN; 133 + 134 + val = 0; 135 + if (fifo_en & INV_ICM42600_SENSOR_GYRO) 136 + val |= INV_ICM42600_FIFO_CONFIG1_GYRO_EN; 137 + if (fifo_en & INV_ICM42600_SENSOR_ACCEL) 138 + val |= INV_ICM42600_FIFO_CONFIG1_ACCEL_EN; 139 + if (fifo_en & INV_ICM42600_SENSOR_TEMP) 140 + val |= INV_ICM42600_FIFO_CONFIG1_TEMP_EN; 141 + 142 + ret = regmap_update_bits(st->map, INV_ICM42600_REG_FIFO_CONFIG1, mask, val); 143 + if (ret) 144 + return ret; 145 + 146 + st->fifo.en = fifo_en; 147 + inv_icm42600_buffer_update_fifo_period(st); 148 + 149 + return 0; 150 + } 151 + 152 + static size_t inv_icm42600_get_packet_size(unsigned int fifo_en) 153 + { 154 + size_t packet_size; 155 + 156 + if ((fifo_en & INV_ICM42600_SENSOR_GYRO) && 157 + (fifo_en & INV_ICM42600_SENSOR_ACCEL)) 158 + packet_size = INV_ICM42600_FIFO_2SENSORS_PACKET_SIZE; 159 + else 160 + packet_size = INV_ICM42600_FIFO_1SENSOR_PACKET_SIZE; 161 + 162 + return packet_size; 163 + } 164 + 165 + static unsigned int inv_icm42600_wm_truncate(unsigned int watermark, 166 + size_t packet_size) 167 + { 168 + size_t wm_size; 169 + unsigned int wm; 170 + 171 + wm_size = watermark * packet_size; 172 + if (wm_size > INV_ICM42600_FIFO_WATERMARK_MAX) 173 + wm_size = INV_ICM42600_FIFO_WATERMARK_MAX; 174 + 175 + wm = wm_size / packet_size; 176 + 177 + return wm; 178 + } 179 + 180 + /** 181 + * inv_icm42600_buffer_update_watermark - update watermark FIFO threshold 182 + * @st: driver internal state 183 + * 184 + * Returns 0 on success, a negative error code otherwise. 185 + * 186 + * FIFO watermark threshold is computed based on the required watermark values 187 + * set for gyro and accel sensors. Since watermark is all about acceptable data 188 + * latency, use the smallest setting between the 2. It means choosing the 189 + * smallest latency but this is not as simple as choosing the smallest watermark 190 + * value. Latency depends on watermark and ODR. It requires several steps: 191 + * 1) compute gyro and accel latencies and choose the smallest value. 192 + * 2) adapt the choosen latency so that it is a multiple of both gyro and accel 193 + * ones. Otherwise it is possible that you don't meet a requirement. (for 194 + * example with gyro @100Hz wm 4 and accel @100Hz with wm 6, choosing the 195 + * value of 4 will not meet accel latency requirement because 6 is not a 196 + * multiple of 4. You need to use the value 2.) 197 + * 3) Since all periods are multiple of each others, watermark is computed by 198 + * dividing this computed latency by the smallest period, which corresponds 199 + * to the FIFO frequency. Beware that this is only true because we are not 200 + * using 500Hz frequency which is not a multiple of the others. 201 + */ 202 + int inv_icm42600_buffer_update_watermark(struct inv_icm42600_state *st) 203 + { 204 + size_t packet_size, wm_size; 205 + unsigned int wm_gyro, wm_accel, watermark; 206 + uint32_t period_gyro, period_accel, period; 207 + uint32_t latency_gyro, latency_accel, latency; 208 + bool restore; 209 + __le16 raw_wm; 210 + int ret; 211 + 212 + packet_size = inv_icm42600_get_packet_size(st->fifo.en); 213 + 214 + /* compute sensors latency, depending on sensor watermark and odr */ 215 + wm_gyro = inv_icm42600_wm_truncate(st->fifo.watermark.gyro, packet_size); 216 + wm_accel = inv_icm42600_wm_truncate(st->fifo.watermark.accel, packet_size); 217 + /* use us for odr to avoid overflow using 32 bits values */ 218 + period_gyro = inv_icm42600_odr_to_period(st->conf.gyro.odr) / 1000UL; 219 + period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr) / 1000UL; 220 + latency_gyro = period_gyro * wm_gyro; 221 + latency_accel = period_accel * wm_accel; 222 + 223 + /* 0 value for watermark means that the sensor is turned off */ 224 + if (latency_gyro == 0) { 225 + watermark = wm_accel; 226 + } else if (latency_accel == 0) { 227 + watermark = wm_gyro; 228 + } else { 229 + /* compute the smallest latency that is a multiple of both */ 230 + if (latency_gyro <= latency_accel) 231 + latency = latency_gyro - (latency_accel % latency_gyro); 232 + else 233 + latency = latency_accel - (latency_gyro % latency_accel); 234 + /* use the shortest period */ 235 + if (period_gyro <= period_accel) 236 + period = period_gyro; 237 + else 238 + period = period_accel; 239 + /* all this works because periods are multiple of each others */ 240 + watermark = latency / period; 241 + if (watermark < 1) 242 + watermark = 1; 243 + } 244 + 245 + /* compute watermark value in bytes */ 246 + wm_size = watermark * packet_size; 247 + 248 + /* changing FIFO watermark requires to turn off watermark interrupt */ 249 + ret = regmap_update_bits_check(st->map, INV_ICM42600_REG_INT_SOURCE0, 250 + INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN, 251 + 0, &restore); 252 + if (ret) 253 + return ret; 254 + 255 + raw_wm = INV_ICM42600_FIFO_WATERMARK_VAL(wm_size); 256 + memcpy(st->buffer, &raw_wm, sizeof(raw_wm)); 257 + ret = regmap_bulk_write(st->map, INV_ICM42600_REG_FIFO_WATERMARK, 258 + st->buffer, sizeof(raw_wm)); 259 + if (ret) 260 + return ret; 261 + 262 + /* restore watermark interrupt */ 263 + if (restore) { 264 + ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, 265 + INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN, 266 + INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN); 267 + if (ret) 268 + return ret; 269 + } 270 + 271 + return 0; 272 + } 273 + 274 + static int inv_icm42600_buffer_preenable(struct iio_dev *indio_dev) 275 + { 276 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 277 + struct device *dev = regmap_get_device(st->map); 278 + 279 + pm_runtime_get_sync(dev); 280 + 281 + return 0; 282 + } 283 + 284 + /* 285 + * update_scan_mode callback is turning sensors on and setting data FIFO enable 286 + * bits. 287 + */ 288 + static int inv_icm42600_buffer_postenable(struct iio_dev *indio_dev) 289 + { 290 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 291 + int ret; 292 + 293 + mutex_lock(&st->lock); 294 + 295 + /* exit if FIFO is already on */ 296 + if (st->fifo.on) { 297 + ret = 0; 298 + goto out_on; 299 + } 300 + 301 + /* set FIFO threshold interrupt */ 302 + ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, 303 + INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN, 304 + INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN); 305 + if (ret) 306 + goto out_unlock; 307 + 308 + /* flush FIFO data */ 309 + ret = regmap_write(st->map, INV_ICM42600_REG_SIGNAL_PATH_RESET, 310 + INV_ICM42600_SIGNAL_PATH_RESET_FIFO_FLUSH); 311 + if (ret) 312 + goto out_unlock; 313 + 314 + /* set FIFO in streaming mode */ 315 + ret = regmap_write(st->map, INV_ICM42600_REG_FIFO_CONFIG, 316 + INV_ICM42600_FIFO_CONFIG_STREAM); 317 + if (ret) 318 + goto out_unlock; 319 + 320 + /* workaround: first read of FIFO count after reset is always 0 */ 321 + ret = regmap_bulk_read(st->map, INV_ICM42600_REG_FIFO_COUNT, st->buffer, 2); 322 + if (ret) 323 + goto out_unlock; 324 + 325 + out_on: 326 + /* increase FIFO on counter */ 327 + st->fifo.on++; 328 + out_unlock: 329 + mutex_unlock(&st->lock); 330 + return ret; 331 + } 332 + 333 + static int inv_icm42600_buffer_predisable(struct iio_dev *indio_dev) 334 + { 335 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 336 + int ret; 337 + 338 + mutex_lock(&st->lock); 339 + 340 + /* exit if there are several sensors using the FIFO */ 341 + if (st->fifo.on > 1) { 342 + ret = 0; 343 + goto out_off; 344 + } 345 + 346 + /* set FIFO in bypass mode */ 347 + ret = regmap_write(st->map, INV_ICM42600_REG_FIFO_CONFIG, 348 + INV_ICM42600_FIFO_CONFIG_BYPASS); 349 + if (ret) 350 + goto out_unlock; 351 + 352 + /* flush FIFO data */ 353 + ret = regmap_write(st->map, INV_ICM42600_REG_SIGNAL_PATH_RESET, 354 + INV_ICM42600_SIGNAL_PATH_RESET_FIFO_FLUSH); 355 + if (ret) 356 + goto out_unlock; 357 + 358 + /* disable FIFO threshold interrupt */ 359 + ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, 360 + INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN, 0); 361 + if (ret) 362 + goto out_unlock; 363 + 364 + out_off: 365 + /* decrease FIFO on counter */ 366 + st->fifo.on--; 367 + out_unlock: 368 + mutex_unlock(&st->lock); 369 + return ret; 370 + } 371 + 372 + static int inv_icm42600_buffer_postdisable(struct iio_dev *indio_dev) 373 + { 374 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 375 + struct device *dev = regmap_get_device(st->map); 376 + unsigned int sensor; 377 + unsigned int *watermark; 378 + struct inv_icm42600_timestamp *ts; 379 + struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT; 380 + unsigned int sleep_temp = 0; 381 + unsigned int sleep_sensor = 0; 382 + unsigned int sleep; 383 + int ret; 384 + 385 + if (indio_dev == st->indio_gyro) { 386 + sensor = INV_ICM42600_SENSOR_GYRO; 387 + watermark = &st->fifo.watermark.gyro; 388 + ts = iio_priv(st->indio_gyro); 389 + } else if (indio_dev == st->indio_accel) { 390 + sensor = INV_ICM42600_SENSOR_ACCEL; 391 + watermark = &st->fifo.watermark.accel; 392 + ts = iio_priv(st->indio_accel); 393 + } else { 394 + return -EINVAL; 395 + } 396 + 397 + mutex_lock(&st->lock); 398 + 399 + ret = inv_icm42600_buffer_set_fifo_en(st, st->fifo.en & ~sensor); 400 + if (ret) 401 + goto out_unlock; 402 + 403 + *watermark = 0; 404 + ret = inv_icm42600_buffer_update_watermark(st); 405 + if (ret) 406 + goto out_unlock; 407 + 408 + conf.mode = INV_ICM42600_SENSOR_MODE_OFF; 409 + if (sensor == INV_ICM42600_SENSOR_GYRO) 410 + ret = inv_icm42600_set_gyro_conf(st, &conf, &sleep_sensor); 411 + else 412 + ret = inv_icm42600_set_accel_conf(st, &conf, &sleep_sensor); 413 + if (ret) 414 + goto out_unlock; 415 + 416 + /* if FIFO is off, turn temperature off */ 417 + if (!st->fifo.on) 418 + ret = inv_icm42600_set_temp_conf(st, false, &sleep_temp); 419 + 420 + inv_icm42600_timestamp_reset(ts); 421 + 422 + out_unlock: 423 + mutex_unlock(&st->lock); 424 + 425 + /* sleep maximum required time */ 426 + if (sleep_sensor > sleep_temp) 427 + sleep = sleep_sensor; 428 + else 429 + sleep = sleep_temp; 430 + if (sleep) 431 + msleep(sleep); 432 + 433 + pm_runtime_mark_last_busy(dev); 434 + pm_runtime_put_autosuspend(dev); 435 + 436 + return ret; 437 + } 438 + 439 + const struct iio_buffer_setup_ops inv_icm42600_buffer_ops = { 440 + .preenable = inv_icm42600_buffer_preenable, 441 + .postenable = inv_icm42600_buffer_postenable, 442 + .predisable = inv_icm42600_buffer_predisable, 443 + .postdisable = inv_icm42600_buffer_postdisable, 444 + }; 445 + 446 + int inv_icm42600_buffer_fifo_read(struct inv_icm42600_state *st, 447 + unsigned int max) 448 + { 449 + size_t max_count; 450 + __be16 *raw_fifo_count; 451 + ssize_t i, size; 452 + const void *accel, *gyro, *timestamp; 453 + const int8_t *temp; 454 + unsigned int odr; 455 + int ret; 456 + 457 + /* reset all samples counters */ 458 + st->fifo.count = 0; 459 + st->fifo.nb.gyro = 0; 460 + st->fifo.nb.accel = 0; 461 + st->fifo.nb.total = 0; 462 + 463 + /* compute maximum FIFO read size */ 464 + if (max == 0) 465 + max_count = sizeof(st->fifo.data); 466 + else 467 + max_count = max * inv_icm42600_get_packet_size(st->fifo.en); 468 + 469 + /* read FIFO count value */ 470 + raw_fifo_count = (__be16 *)st->buffer; 471 + ret = regmap_bulk_read(st->map, INV_ICM42600_REG_FIFO_COUNT, 472 + raw_fifo_count, sizeof(*raw_fifo_count)); 473 + if (ret) 474 + return ret; 475 + st->fifo.count = be16_to_cpup(raw_fifo_count); 476 + 477 + /* check and clamp FIFO count value */ 478 + if (st->fifo.count == 0) 479 + return 0; 480 + if (st->fifo.count > max_count) 481 + st->fifo.count = max_count; 482 + 483 + /* read all FIFO data in internal buffer */ 484 + ret = regmap_noinc_read(st->map, INV_ICM42600_REG_FIFO_DATA, 485 + st->fifo.data, st->fifo.count); 486 + if (ret) 487 + return ret; 488 + 489 + /* compute number of samples for each sensor */ 490 + for (i = 0; i < st->fifo.count; i += size) { 491 + size = inv_icm42600_fifo_decode_packet(&st->fifo.data[i], 492 + &accel, &gyro, &temp, &timestamp, &odr); 493 + if (size <= 0) 494 + break; 495 + if (gyro != NULL && inv_icm42600_fifo_is_data_valid(gyro)) 496 + st->fifo.nb.gyro++; 497 + if (accel != NULL && inv_icm42600_fifo_is_data_valid(accel)) 498 + st->fifo.nb.accel++; 499 + st->fifo.nb.total++; 500 + } 501 + 502 + return 0; 503 + } 504 + 505 + int inv_icm42600_buffer_fifo_parse(struct inv_icm42600_state *st) 506 + { 507 + struct inv_icm42600_timestamp *ts; 508 + int ret; 509 + 510 + if (st->fifo.nb.total == 0) 511 + return 0; 512 + 513 + /* handle gyroscope timestamp and FIFO data parsing */ 514 + ts = iio_priv(st->indio_gyro); 515 + inv_icm42600_timestamp_interrupt(ts, st->fifo.period, st->fifo.nb.total, 516 + st->fifo.nb.gyro, st->timestamp.gyro); 517 + if (st->fifo.nb.gyro > 0) { 518 + ret = inv_icm42600_gyro_parse_fifo(st->indio_gyro); 519 + if (ret) 520 + return ret; 521 + } 522 + 523 + /* handle accelerometer timestamp and FIFO data parsing */ 524 + ts = iio_priv(st->indio_accel); 525 + inv_icm42600_timestamp_interrupt(ts, st->fifo.period, st->fifo.nb.total, 526 + st->fifo.nb.accel, st->timestamp.accel); 527 + if (st->fifo.nb.accel > 0) { 528 + ret = inv_icm42600_accel_parse_fifo(st->indio_accel); 529 + if (ret) 530 + return ret; 531 + } 532 + 533 + return 0; 534 + } 535 + 536 + int inv_icm42600_buffer_hwfifo_flush(struct inv_icm42600_state *st, 537 + unsigned int count) 538 + { 539 + struct inv_icm42600_timestamp *ts; 540 + int64_t gyro_ts, accel_ts; 541 + int ret; 542 + 543 + gyro_ts = iio_get_time_ns(st->indio_gyro); 544 + accel_ts = iio_get_time_ns(st->indio_accel); 545 + 546 + ret = inv_icm42600_buffer_fifo_read(st, count); 547 + if (ret) 548 + return ret; 549 + 550 + if (st->fifo.nb.total == 0) 551 + return 0; 552 + 553 + if (st->fifo.nb.gyro > 0) { 554 + ts = iio_priv(st->indio_gyro); 555 + inv_icm42600_timestamp_interrupt(ts, st->fifo.period, 556 + st->fifo.nb.total, st->fifo.nb.gyro, 557 + gyro_ts); 558 + ret = inv_icm42600_gyro_parse_fifo(st->indio_gyro); 559 + if (ret) 560 + return ret; 561 + } 562 + 563 + if (st->fifo.nb.accel > 0) { 564 + ts = iio_priv(st->indio_accel); 565 + inv_icm42600_timestamp_interrupt(ts, st->fifo.period, 566 + st->fifo.nb.total, st->fifo.nb.accel, 567 + accel_ts); 568 + ret = inv_icm42600_accel_parse_fifo(st->indio_accel); 569 + if (ret) 570 + return ret; 571 + } 572 + 573 + return 0; 574 + } 575 + 576 + int inv_icm42600_buffer_init(struct inv_icm42600_state *st) 577 + { 578 + unsigned int val; 579 + int ret; 580 + 581 + /* 582 + * Default FIFO configuration (bits 7 to 5) 583 + * - use invalid value 584 + * - FIFO count in bytes 585 + * - FIFO count in big endian 586 + */ 587 + val = INV_ICM42600_INTF_CONFIG0_FIFO_COUNT_ENDIAN; 588 + ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0, 589 + GENMASK(7, 5), val); 590 + if (ret) 591 + return ret; 592 + 593 + /* 594 + * Enable FIFO partial read and continuous watermark interrupt. 595 + * Disable all FIFO EN bits. 596 + */ 597 + val = INV_ICM42600_FIFO_CONFIG1_RESUME_PARTIAL_RD | 598 + INV_ICM42600_FIFO_CONFIG1_WM_GT_TH; 599 + return regmap_update_bits(st->map, INV_ICM42600_REG_FIFO_CONFIG1, 600 + GENMASK(6, 5) | GENMASK(3, 0), val); 601 + }
+98
drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 + /* 3 + * Copyright (C) 2020 Invensense, Inc. 4 + */ 5 + 6 + #ifndef INV_ICM42600_BUFFER_H_ 7 + #define INV_ICM42600_BUFFER_H_ 8 + 9 + #include <linux/kernel.h> 10 + #include <linux/bits.h> 11 + 12 + struct inv_icm42600_state; 13 + 14 + #define INV_ICM42600_SENSOR_GYRO BIT(0) 15 + #define INV_ICM42600_SENSOR_ACCEL BIT(1) 16 + #define INV_ICM42600_SENSOR_TEMP BIT(2) 17 + 18 + /** 19 + * struct inv_icm42600_fifo - FIFO state variables 20 + * @on: reference counter for FIFO on. 21 + * @en: bits field of INV_ICM42600_SENSOR_* for FIFO EN bits. 22 + * @period: FIFO internal period. 23 + * @watermark: watermark configuration values for accel and gyro. 24 + * @count: number of bytes in the FIFO data buffer. 25 + * @nb: gyro, accel and total samples in the FIFO data buffer. 26 + * @data: FIFO data buffer aligned for DMA (2kB + 32 bytes of read cache). 27 + */ 28 + struct inv_icm42600_fifo { 29 + unsigned int on; 30 + unsigned int en; 31 + uint32_t period; 32 + struct { 33 + unsigned int gyro; 34 + unsigned int accel; 35 + } watermark; 36 + size_t count; 37 + struct { 38 + size_t gyro; 39 + size_t accel; 40 + size_t total; 41 + } nb; 42 + uint8_t data[2080] ____cacheline_aligned; 43 + }; 44 + 45 + /* FIFO data packet */ 46 + struct inv_icm42600_fifo_sensor_data { 47 + __be16 x; 48 + __be16 y; 49 + __be16 z; 50 + } __packed; 51 + #define INV_ICM42600_FIFO_DATA_INVALID -32768 52 + 53 + static inline int16_t inv_icm42600_fifo_get_sensor_data(__be16 d) 54 + { 55 + return be16_to_cpu(d); 56 + } 57 + 58 + static inline bool 59 + inv_icm42600_fifo_is_data_valid(const struct inv_icm42600_fifo_sensor_data *s) 60 + { 61 + int16_t x, y, z; 62 + 63 + x = inv_icm42600_fifo_get_sensor_data(s->x); 64 + y = inv_icm42600_fifo_get_sensor_data(s->y); 65 + z = inv_icm42600_fifo_get_sensor_data(s->z); 66 + 67 + if (x == INV_ICM42600_FIFO_DATA_INVALID && 68 + y == INV_ICM42600_FIFO_DATA_INVALID && 69 + z == INV_ICM42600_FIFO_DATA_INVALID) 70 + return false; 71 + 72 + return true; 73 + } 74 + 75 + ssize_t inv_icm42600_fifo_decode_packet(const void *packet, const void **accel, 76 + const void **gyro, const int8_t **temp, 77 + const void **timestamp, unsigned int *odr); 78 + 79 + extern const struct iio_buffer_setup_ops inv_icm42600_buffer_ops; 80 + 81 + int inv_icm42600_buffer_init(struct inv_icm42600_state *st); 82 + 83 + void inv_icm42600_buffer_update_fifo_period(struct inv_icm42600_state *st); 84 + 85 + int inv_icm42600_buffer_set_fifo_en(struct inv_icm42600_state *st, 86 + unsigned int fifo_en); 87 + 88 + int inv_icm42600_buffer_update_watermark(struct inv_icm42600_state *st); 89 + 90 + int inv_icm42600_buffer_fifo_read(struct inv_icm42600_state *st, 91 + unsigned int max); 92 + 93 + int inv_icm42600_buffer_fifo_parse(struct inv_icm42600_state *st); 94 + 95 + int inv_icm42600_buffer_hwfifo_flush(struct inv_icm42600_state *st, 96 + unsigned int count); 97 + 98 + #endif
+786
drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * Copyright (C) 2020 Invensense, Inc. 4 + */ 5 + 6 + #include <linux/kernel.h> 7 + #include <linux/device.h> 8 + #include <linux/module.h> 9 + #include <linux/slab.h> 10 + #include <linux/delay.h> 11 + #include <linux/mutex.h> 12 + #include <linux/interrupt.h> 13 + #include <linux/irq.h> 14 + #include <linux/regulator/consumer.h> 15 + #include <linux/pm_runtime.h> 16 + #include <linux/property.h> 17 + #include <linux/regmap.h> 18 + #include <linux/iio/iio.h> 19 + 20 + #include "inv_icm42600.h" 21 + #include "inv_icm42600_buffer.h" 22 + #include "inv_icm42600_timestamp.h" 23 + 24 + static const struct regmap_range_cfg inv_icm42600_regmap_ranges[] = { 25 + { 26 + .name = "user banks", 27 + .range_min = 0x0000, 28 + .range_max = 0x4FFF, 29 + .selector_reg = INV_ICM42600_REG_BANK_SEL, 30 + .selector_mask = INV_ICM42600_BANK_SEL_MASK, 31 + .selector_shift = 0, 32 + .window_start = 0, 33 + .window_len = 0x1000, 34 + }, 35 + }; 36 + 37 + const struct regmap_config inv_icm42600_regmap_config = { 38 + .reg_bits = 8, 39 + .val_bits = 8, 40 + .max_register = 0x4FFF, 41 + .ranges = inv_icm42600_regmap_ranges, 42 + .num_ranges = ARRAY_SIZE(inv_icm42600_regmap_ranges), 43 + }; 44 + EXPORT_SYMBOL_GPL(inv_icm42600_regmap_config); 45 + 46 + struct inv_icm42600_hw { 47 + uint8_t whoami; 48 + const char *name; 49 + const struct inv_icm42600_conf *conf; 50 + }; 51 + 52 + /* chip initial default configuration */ 53 + static const struct inv_icm42600_conf inv_icm42600_default_conf = { 54 + .gyro = { 55 + .mode = INV_ICM42600_SENSOR_MODE_OFF, 56 + .fs = INV_ICM42600_GYRO_FS_2000DPS, 57 + .odr = INV_ICM42600_ODR_50HZ, 58 + .filter = INV_ICM42600_FILTER_BW_ODR_DIV_2, 59 + }, 60 + .accel = { 61 + .mode = INV_ICM42600_SENSOR_MODE_OFF, 62 + .fs = INV_ICM42600_ACCEL_FS_16G, 63 + .odr = INV_ICM42600_ODR_50HZ, 64 + .filter = INV_ICM42600_FILTER_BW_ODR_DIV_2, 65 + }, 66 + .temp_en = false, 67 + }; 68 + 69 + static const struct inv_icm42600_hw inv_icm42600_hw[INV_CHIP_NB] = { 70 + [INV_CHIP_ICM42600] = { 71 + .whoami = INV_ICM42600_WHOAMI_ICM42600, 72 + .name = "icm42600", 73 + .conf = &inv_icm42600_default_conf, 74 + }, 75 + [INV_CHIP_ICM42602] = { 76 + .whoami = INV_ICM42600_WHOAMI_ICM42602, 77 + .name = "icm42602", 78 + .conf = &inv_icm42600_default_conf, 79 + }, 80 + [INV_CHIP_ICM42605] = { 81 + .whoami = INV_ICM42600_WHOAMI_ICM42605, 82 + .name = "icm42605", 83 + .conf = &inv_icm42600_default_conf, 84 + }, 85 + [INV_CHIP_ICM42622] = { 86 + .whoami = INV_ICM42600_WHOAMI_ICM42622, 87 + .name = "icm42622", 88 + .conf = &inv_icm42600_default_conf, 89 + }, 90 + }; 91 + 92 + const struct iio_mount_matrix * 93 + inv_icm42600_get_mount_matrix(const struct iio_dev *indio_dev, 94 + const struct iio_chan_spec *chan) 95 + { 96 + const struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 97 + 98 + return &st->orientation; 99 + } 100 + 101 + uint32_t inv_icm42600_odr_to_period(enum inv_icm42600_odr odr) 102 + { 103 + static uint32_t odr_periods[INV_ICM42600_ODR_NB] = { 104 + /* reserved values */ 105 + 0, 0, 0, 106 + /* 8kHz */ 107 + 125000, 108 + /* 4kHz */ 109 + 250000, 110 + /* 2kHz */ 111 + 500000, 112 + /* 1kHz */ 113 + 1000000, 114 + /* 200Hz */ 115 + 5000000, 116 + /* 100Hz */ 117 + 10000000, 118 + /* 50Hz */ 119 + 20000000, 120 + /* 25Hz */ 121 + 40000000, 122 + /* 12.5Hz */ 123 + 80000000, 124 + /* 6.25Hz */ 125 + 160000000, 126 + /* 3.125Hz */ 127 + 320000000, 128 + /* 1.5625Hz */ 129 + 640000000, 130 + /* 500Hz */ 131 + 2000000, 132 + }; 133 + 134 + return odr_periods[odr]; 135 + } 136 + 137 + static int inv_icm42600_set_pwr_mgmt0(struct inv_icm42600_state *st, 138 + enum inv_icm42600_sensor_mode gyro, 139 + enum inv_icm42600_sensor_mode accel, 140 + bool temp, unsigned int *sleep_ms) 141 + { 142 + enum inv_icm42600_sensor_mode oldgyro = st->conf.gyro.mode; 143 + enum inv_icm42600_sensor_mode oldaccel = st->conf.accel.mode; 144 + bool oldtemp = st->conf.temp_en; 145 + unsigned int sleepval; 146 + unsigned int val; 147 + int ret; 148 + 149 + /* if nothing changed, exit */ 150 + if (gyro == oldgyro && accel == oldaccel && temp == oldtemp) 151 + return 0; 152 + 153 + val = INV_ICM42600_PWR_MGMT0_GYRO(gyro) | 154 + INV_ICM42600_PWR_MGMT0_ACCEL(accel); 155 + if (!temp) 156 + val |= INV_ICM42600_PWR_MGMT0_TEMP_DIS; 157 + ret = regmap_write(st->map, INV_ICM42600_REG_PWR_MGMT0, val); 158 + if (ret) 159 + return ret; 160 + 161 + st->conf.gyro.mode = gyro; 162 + st->conf.accel.mode = accel; 163 + st->conf.temp_en = temp; 164 + 165 + /* compute required wait time for sensors to stabilize */ 166 + sleepval = 0; 167 + /* temperature stabilization time */ 168 + if (temp && !oldtemp) { 169 + if (sleepval < INV_ICM42600_TEMP_STARTUP_TIME_MS) 170 + sleepval = INV_ICM42600_TEMP_STARTUP_TIME_MS; 171 + } 172 + /* accel startup time */ 173 + if (accel != oldaccel && oldaccel == INV_ICM42600_SENSOR_MODE_OFF) { 174 + /* block any register write for at least 200 µs */ 175 + usleep_range(200, 300); 176 + if (sleepval < INV_ICM42600_ACCEL_STARTUP_TIME_MS) 177 + sleepval = INV_ICM42600_ACCEL_STARTUP_TIME_MS; 178 + } 179 + if (gyro != oldgyro) { 180 + /* gyro startup time */ 181 + if (oldgyro == INV_ICM42600_SENSOR_MODE_OFF) { 182 + /* block any register write for at least 200 µs */ 183 + usleep_range(200, 300); 184 + if (sleepval < INV_ICM42600_GYRO_STARTUP_TIME_MS) 185 + sleepval = INV_ICM42600_GYRO_STARTUP_TIME_MS; 186 + /* gyro stop time */ 187 + } else if (gyro == INV_ICM42600_SENSOR_MODE_OFF) { 188 + if (sleepval < INV_ICM42600_GYRO_STOP_TIME_MS) 189 + sleepval = INV_ICM42600_GYRO_STOP_TIME_MS; 190 + } 191 + } 192 + 193 + /* deferred sleep value if sleep pointer is provided or direct sleep */ 194 + if (sleep_ms) 195 + *sleep_ms = sleepval; 196 + else if (sleepval) 197 + msleep(sleepval); 198 + 199 + return 0; 200 + } 201 + 202 + int inv_icm42600_set_accel_conf(struct inv_icm42600_state *st, 203 + struct inv_icm42600_sensor_conf *conf, 204 + unsigned int *sleep_ms) 205 + { 206 + struct inv_icm42600_sensor_conf *oldconf = &st->conf.accel; 207 + unsigned int val; 208 + int ret; 209 + 210 + /* Sanitize missing values with current values */ 211 + if (conf->mode < 0) 212 + conf->mode = oldconf->mode; 213 + if (conf->fs < 0) 214 + conf->fs = oldconf->fs; 215 + if (conf->odr < 0) 216 + conf->odr = oldconf->odr; 217 + if (conf->filter < 0) 218 + conf->filter = oldconf->filter; 219 + 220 + /* set ACCEL_CONFIG0 register (accel fullscale & odr) */ 221 + if (conf->fs != oldconf->fs || conf->odr != oldconf->odr) { 222 + val = INV_ICM42600_ACCEL_CONFIG0_FS(conf->fs) | 223 + INV_ICM42600_ACCEL_CONFIG0_ODR(conf->odr); 224 + ret = regmap_write(st->map, INV_ICM42600_REG_ACCEL_CONFIG0, val); 225 + if (ret) 226 + return ret; 227 + oldconf->fs = conf->fs; 228 + oldconf->odr = conf->odr; 229 + } 230 + 231 + /* set GYRO_ACCEL_CONFIG0 register (accel filter) */ 232 + if (conf->filter != oldconf->filter) { 233 + val = INV_ICM42600_GYRO_ACCEL_CONFIG0_ACCEL_FILT(conf->filter) | 234 + INV_ICM42600_GYRO_ACCEL_CONFIG0_GYRO_FILT(st->conf.gyro.filter); 235 + ret = regmap_write(st->map, INV_ICM42600_REG_GYRO_ACCEL_CONFIG0, val); 236 + if (ret) 237 + return ret; 238 + oldconf->filter = conf->filter; 239 + } 240 + 241 + /* set PWR_MGMT0 register (accel sensor mode) */ 242 + return inv_icm42600_set_pwr_mgmt0(st, st->conf.gyro.mode, conf->mode, 243 + st->conf.temp_en, sleep_ms); 244 + } 245 + 246 + int inv_icm42600_set_gyro_conf(struct inv_icm42600_state *st, 247 + struct inv_icm42600_sensor_conf *conf, 248 + unsigned int *sleep_ms) 249 + { 250 + struct inv_icm42600_sensor_conf *oldconf = &st->conf.gyro; 251 + unsigned int val; 252 + int ret; 253 + 254 + /* sanitize missing values with current values */ 255 + if (conf->mode < 0) 256 + conf->mode = oldconf->mode; 257 + if (conf->fs < 0) 258 + conf->fs = oldconf->fs; 259 + if (conf->odr < 0) 260 + conf->odr = oldconf->odr; 261 + if (conf->filter < 0) 262 + conf->filter = oldconf->filter; 263 + 264 + /* set GYRO_CONFIG0 register (gyro fullscale & odr) */ 265 + if (conf->fs != oldconf->fs || conf->odr != oldconf->odr) { 266 + val = INV_ICM42600_GYRO_CONFIG0_FS(conf->fs) | 267 + INV_ICM42600_GYRO_CONFIG0_ODR(conf->odr); 268 + ret = regmap_write(st->map, INV_ICM42600_REG_GYRO_CONFIG0, val); 269 + if (ret) 270 + return ret; 271 + oldconf->fs = conf->fs; 272 + oldconf->odr = conf->odr; 273 + } 274 + 275 + /* set GYRO_ACCEL_CONFIG0 register (gyro filter) */ 276 + if (conf->filter != oldconf->filter) { 277 + val = INV_ICM42600_GYRO_ACCEL_CONFIG0_ACCEL_FILT(st->conf.accel.filter) | 278 + INV_ICM42600_GYRO_ACCEL_CONFIG0_GYRO_FILT(conf->filter); 279 + ret = regmap_write(st->map, INV_ICM42600_REG_GYRO_ACCEL_CONFIG0, val); 280 + if (ret) 281 + return ret; 282 + oldconf->filter = conf->filter; 283 + } 284 + 285 + /* set PWR_MGMT0 register (gyro sensor mode) */ 286 + return inv_icm42600_set_pwr_mgmt0(st, conf->mode, st->conf.accel.mode, 287 + st->conf.temp_en, sleep_ms); 288 + 289 + return 0; 290 + } 291 + 292 + int inv_icm42600_set_temp_conf(struct inv_icm42600_state *st, bool enable, 293 + unsigned int *sleep_ms) 294 + { 295 + return inv_icm42600_set_pwr_mgmt0(st, st->conf.gyro.mode, 296 + st->conf.accel.mode, enable, 297 + sleep_ms); 298 + } 299 + 300 + int inv_icm42600_debugfs_reg(struct iio_dev *indio_dev, unsigned int reg, 301 + unsigned int writeval, unsigned int *readval) 302 + { 303 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 304 + int ret; 305 + 306 + mutex_lock(&st->lock); 307 + 308 + if (readval) 309 + ret = regmap_read(st->map, reg, readval); 310 + else 311 + ret = regmap_write(st->map, reg, writeval); 312 + 313 + mutex_unlock(&st->lock); 314 + 315 + return ret; 316 + } 317 + 318 + static int inv_icm42600_set_conf(struct inv_icm42600_state *st, 319 + const struct inv_icm42600_conf *conf) 320 + { 321 + unsigned int val; 322 + int ret; 323 + 324 + /* set PWR_MGMT0 register (gyro & accel sensor mode, temp enabled) */ 325 + val = INV_ICM42600_PWR_MGMT0_GYRO(conf->gyro.mode) | 326 + INV_ICM42600_PWR_MGMT0_ACCEL(conf->accel.mode); 327 + if (!conf->temp_en) 328 + val |= INV_ICM42600_PWR_MGMT0_TEMP_DIS; 329 + ret = regmap_write(st->map, INV_ICM42600_REG_PWR_MGMT0, val); 330 + if (ret) 331 + return ret; 332 + 333 + /* set GYRO_CONFIG0 register (gyro fullscale & odr) */ 334 + val = INV_ICM42600_GYRO_CONFIG0_FS(conf->gyro.fs) | 335 + INV_ICM42600_GYRO_CONFIG0_ODR(conf->gyro.odr); 336 + ret = regmap_write(st->map, INV_ICM42600_REG_GYRO_CONFIG0, val); 337 + if (ret) 338 + return ret; 339 + 340 + /* set ACCEL_CONFIG0 register (accel fullscale & odr) */ 341 + val = INV_ICM42600_ACCEL_CONFIG0_FS(conf->accel.fs) | 342 + INV_ICM42600_ACCEL_CONFIG0_ODR(conf->accel.odr); 343 + ret = regmap_write(st->map, INV_ICM42600_REG_ACCEL_CONFIG0, val); 344 + if (ret) 345 + return ret; 346 + 347 + /* set GYRO_ACCEL_CONFIG0 register (gyro & accel filters) */ 348 + val = INV_ICM42600_GYRO_ACCEL_CONFIG0_ACCEL_FILT(conf->accel.filter) | 349 + INV_ICM42600_GYRO_ACCEL_CONFIG0_GYRO_FILT(conf->gyro.filter); 350 + ret = regmap_write(st->map, INV_ICM42600_REG_GYRO_ACCEL_CONFIG0, val); 351 + if (ret) 352 + return ret; 353 + 354 + /* update internal conf */ 355 + st->conf = *conf; 356 + 357 + return 0; 358 + } 359 + 360 + /** 361 + * inv_icm42600_setup() - check and setup chip 362 + * @st: driver internal state 363 + * @bus_setup: callback for setting up bus specific registers 364 + * 365 + * Returns 0 on success, a negative error code otherwise. 366 + */ 367 + static int inv_icm42600_setup(struct inv_icm42600_state *st, 368 + inv_icm42600_bus_setup bus_setup) 369 + { 370 + const struct inv_icm42600_hw *hw = &inv_icm42600_hw[st->chip]; 371 + const struct device *dev = regmap_get_device(st->map); 372 + unsigned int val; 373 + int ret; 374 + 375 + /* check chip self-identification value */ 376 + ret = regmap_read(st->map, INV_ICM42600_REG_WHOAMI, &val); 377 + if (ret) 378 + return ret; 379 + if (val != hw->whoami) { 380 + dev_err(dev, "invalid whoami %#02x expected %#02x (%s)\n", 381 + val, hw->whoami, hw->name); 382 + return -ENODEV; 383 + } 384 + st->name = hw->name; 385 + 386 + /* reset to make sure previous state are not there */ 387 + ret = regmap_write(st->map, INV_ICM42600_REG_DEVICE_CONFIG, 388 + INV_ICM42600_DEVICE_CONFIG_SOFT_RESET); 389 + if (ret) 390 + return ret; 391 + msleep(INV_ICM42600_RESET_TIME_MS); 392 + 393 + ret = regmap_read(st->map, INV_ICM42600_REG_INT_STATUS, &val); 394 + if (ret) 395 + return ret; 396 + if (!(val & INV_ICM42600_INT_STATUS_RESET_DONE)) { 397 + dev_err(dev, "reset error, reset done bit not set\n"); 398 + return -ENODEV; 399 + } 400 + 401 + /* set chip bus configuration */ 402 + ret = bus_setup(st); 403 + if (ret) 404 + return ret; 405 + 406 + /* sensor data in big-endian (default) */ 407 + ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0, 408 + INV_ICM42600_INTF_CONFIG0_SENSOR_DATA_ENDIAN, 409 + INV_ICM42600_INTF_CONFIG0_SENSOR_DATA_ENDIAN); 410 + if (ret) 411 + return ret; 412 + 413 + return inv_icm42600_set_conf(st, hw->conf); 414 + } 415 + 416 + static irqreturn_t inv_icm42600_irq_timestamp(int irq, void *_data) 417 + { 418 + struct inv_icm42600_state *st = _data; 419 + 420 + st->timestamp.gyro = iio_get_time_ns(st->indio_gyro); 421 + st->timestamp.accel = iio_get_time_ns(st->indio_accel); 422 + 423 + return IRQ_WAKE_THREAD; 424 + } 425 + 426 + static irqreturn_t inv_icm42600_irq_handler(int irq, void *_data) 427 + { 428 + struct inv_icm42600_state *st = _data; 429 + struct device *dev = regmap_get_device(st->map); 430 + unsigned int status; 431 + int ret; 432 + 433 + mutex_lock(&st->lock); 434 + 435 + ret = regmap_read(st->map, INV_ICM42600_REG_INT_STATUS, &status); 436 + if (ret) 437 + goto out_unlock; 438 + 439 + /* FIFO full */ 440 + if (status & INV_ICM42600_INT_STATUS_FIFO_FULL) 441 + dev_warn(dev, "FIFO full data lost!\n"); 442 + 443 + /* FIFO threshold reached */ 444 + if (status & INV_ICM42600_INT_STATUS_FIFO_THS) { 445 + ret = inv_icm42600_buffer_fifo_read(st, 0); 446 + if (ret) { 447 + dev_err(dev, "FIFO read error %d\n", ret); 448 + goto out_unlock; 449 + } 450 + ret = inv_icm42600_buffer_fifo_parse(st); 451 + if (ret) 452 + dev_err(dev, "FIFO parsing error %d\n", ret); 453 + } 454 + 455 + out_unlock: 456 + mutex_unlock(&st->lock); 457 + return IRQ_HANDLED; 458 + } 459 + 460 + /** 461 + * inv_icm42600_irq_init() - initialize int pin and interrupt handler 462 + * @st: driver internal state 463 + * @irq: irq number 464 + * @irq_type: irq trigger type 465 + * @open_drain: true if irq is open drain, false for push-pull 466 + * 467 + * Returns 0 on success, a negative error code otherwise. 468 + */ 469 + static int inv_icm42600_irq_init(struct inv_icm42600_state *st, int irq, 470 + int irq_type, bool open_drain) 471 + { 472 + struct device *dev = regmap_get_device(st->map); 473 + unsigned int val; 474 + int ret; 475 + 476 + /* configure INT1 interrupt: default is active low on edge */ 477 + switch (irq_type) { 478 + case IRQF_TRIGGER_RISING: 479 + case IRQF_TRIGGER_HIGH: 480 + val = INV_ICM42600_INT_CONFIG_INT1_ACTIVE_HIGH; 481 + break; 482 + default: 483 + val = INV_ICM42600_INT_CONFIG_INT1_ACTIVE_LOW; 484 + break; 485 + } 486 + 487 + switch (irq_type) { 488 + case IRQF_TRIGGER_LOW: 489 + case IRQF_TRIGGER_HIGH: 490 + val |= INV_ICM42600_INT_CONFIG_INT1_LATCHED; 491 + break; 492 + default: 493 + break; 494 + } 495 + 496 + if (!open_drain) 497 + val |= INV_ICM42600_INT_CONFIG_INT1_PUSH_PULL; 498 + 499 + ret = regmap_write(st->map, INV_ICM42600_REG_INT_CONFIG, val); 500 + if (ret) 501 + return ret; 502 + 503 + /* Deassert async reset for proper INT pin operation (cf datasheet) */ 504 + ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_CONFIG1, 505 + INV_ICM42600_INT_CONFIG1_ASYNC_RESET, 0); 506 + if (ret) 507 + return ret; 508 + 509 + return devm_request_threaded_irq(dev, irq, inv_icm42600_irq_timestamp, 510 + inv_icm42600_irq_handler, irq_type, 511 + "inv_icm42600", st); 512 + } 513 + 514 + static int inv_icm42600_enable_regulator_vddio(struct inv_icm42600_state *st) 515 + { 516 + int ret; 517 + 518 + ret = regulator_enable(st->vddio_supply); 519 + if (ret) 520 + return ret; 521 + 522 + /* wait a little for supply ramp */ 523 + usleep_range(3000, 4000); 524 + 525 + return 0; 526 + } 527 + 528 + static void inv_icm42600_disable_vdd_reg(void *_data) 529 + { 530 + struct inv_icm42600_state *st = _data; 531 + const struct device *dev = regmap_get_device(st->map); 532 + int ret; 533 + 534 + ret = regulator_disable(st->vdd_supply); 535 + if (ret) 536 + dev_err(dev, "failed to disable vdd error %d\n", ret); 537 + } 538 + 539 + static void inv_icm42600_disable_vddio_reg(void *_data) 540 + { 541 + struct inv_icm42600_state *st = _data; 542 + const struct device *dev = regmap_get_device(st->map); 543 + int ret; 544 + 545 + ret = regulator_disable(st->vddio_supply); 546 + if (ret) 547 + dev_err(dev, "failed to disable vddio error %d\n", ret); 548 + } 549 + 550 + static void inv_icm42600_disable_pm(void *_data) 551 + { 552 + struct device *dev = _data; 553 + 554 + pm_runtime_put_sync(dev); 555 + pm_runtime_disable(dev); 556 + } 557 + 558 + int inv_icm42600_core_probe(struct regmap *regmap, int chip, int irq, 559 + inv_icm42600_bus_setup bus_setup) 560 + { 561 + struct device *dev = regmap_get_device(regmap); 562 + struct inv_icm42600_state *st; 563 + struct irq_data *irq_desc; 564 + int irq_type; 565 + bool open_drain; 566 + int ret; 567 + 568 + if (chip < 0 || chip >= INV_CHIP_NB) { 569 + dev_err(dev, "invalid chip = %d\n", chip); 570 + return -ENODEV; 571 + } 572 + 573 + /* get irq properties, set trigger falling by default */ 574 + irq_desc = irq_get_irq_data(irq); 575 + if (!irq_desc) { 576 + dev_err(dev, "could not find IRQ %d\n", irq); 577 + return -EINVAL; 578 + } 579 + 580 + irq_type = irqd_get_trigger_type(irq_desc); 581 + if (!irq_type) 582 + irq_type = IRQF_TRIGGER_FALLING; 583 + 584 + open_drain = device_property_read_bool(dev, "drive-open-drain"); 585 + 586 + st = devm_kzalloc(dev, sizeof(*st), GFP_KERNEL); 587 + if (!st) 588 + return -ENOMEM; 589 + 590 + dev_set_drvdata(dev, st); 591 + mutex_init(&st->lock); 592 + st->chip = chip; 593 + st->map = regmap; 594 + 595 + ret = iio_read_mount_matrix(dev, "mount-matrix", &st->orientation); 596 + if (ret) { 597 + dev_err(dev, "failed to retrieve mounting matrix %d\n", ret); 598 + return ret; 599 + } 600 + 601 + st->vdd_supply = devm_regulator_get(dev, "vdd"); 602 + if (IS_ERR(st->vdd_supply)) 603 + return PTR_ERR(st->vdd_supply); 604 + 605 + st->vddio_supply = devm_regulator_get(dev, "vddio"); 606 + if (IS_ERR(st->vddio_supply)) 607 + return PTR_ERR(st->vddio_supply); 608 + 609 + ret = regulator_enable(st->vdd_supply); 610 + if (ret) 611 + return ret; 612 + msleep(INV_ICM42600_POWER_UP_TIME_MS); 613 + 614 + ret = devm_add_action_or_reset(dev, inv_icm42600_disable_vdd_reg, st); 615 + if (ret) 616 + return ret; 617 + 618 + ret = inv_icm42600_enable_regulator_vddio(st); 619 + if (ret) 620 + return ret; 621 + 622 + ret = devm_add_action_or_reset(dev, inv_icm42600_disable_vddio_reg, st); 623 + if (ret) 624 + return ret; 625 + 626 + /* setup chip registers */ 627 + ret = inv_icm42600_setup(st, bus_setup); 628 + if (ret) 629 + return ret; 630 + 631 + ret = inv_icm42600_timestamp_setup(st); 632 + if (ret) 633 + return ret; 634 + 635 + ret = inv_icm42600_buffer_init(st); 636 + if (ret) 637 + return ret; 638 + 639 + st->indio_gyro = inv_icm42600_gyro_init(st); 640 + if (IS_ERR(st->indio_gyro)) 641 + return PTR_ERR(st->indio_gyro); 642 + 643 + st->indio_accel = inv_icm42600_accel_init(st); 644 + if (IS_ERR(st->indio_accel)) 645 + return PTR_ERR(st->indio_accel); 646 + 647 + ret = inv_icm42600_irq_init(st, irq, irq_type, open_drain); 648 + if (ret) 649 + return ret; 650 + 651 + /* setup runtime power management */ 652 + ret = pm_runtime_set_active(dev); 653 + if (ret) 654 + return ret; 655 + pm_runtime_get_noresume(dev); 656 + pm_runtime_enable(dev); 657 + pm_runtime_set_autosuspend_delay(dev, INV_ICM42600_SUSPEND_DELAY_MS); 658 + pm_runtime_use_autosuspend(dev); 659 + pm_runtime_put(dev); 660 + 661 + return devm_add_action_or_reset(dev, inv_icm42600_disable_pm, dev); 662 + } 663 + EXPORT_SYMBOL_GPL(inv_icm42600_core_probe); 664 + 665 + /* 666 + * Suspend saves sensors state and turns everything off. 667 + * Check first if runtime suspend has not already done the job. 668 + */ 669 + static int __maybe_unused inv_icm42600_suspend(struct device *dev) 670 + { 671 + struct inv_icm42600_state *st = dev_get_drvdata(dev); 672 + int ret; 673 + 674 + mutex_lock(&st->lock); 675 + 676 + st->suspended.gyro = st->conf.gyro.mode; 677 + st->suspended.accel = st->conf.accel.mode; 678 + st->suspended.temp = st->conf.temp_en; 679 + if (pm_runtime_suspended(dev)) { 680 + ret = 0; 681 + goto out_unlock; 682 + } 683 + 684 + /* disable FIFO data streaming */ 685 + if (st->fifo.on) { 686 + ret = regmap_write(st->map, INV_ICM42600_REG_FIFO_CONFIG, 687 + INV_ICM42600_FIFO_CONFIG_BYPASS); 688 + if (ret) 689 + goto out_unlock; 690 + } 691 + 692 + ret = inv_icm42600_set_pwr_mgmt0(st, INV_ICM42600_SENSOR_MODE_OFF, 693 + INV_ICM42600_SENSOR_MODE_OFF, false, 694 + NULL); 695 + if (ret) 696 + goto out_unlock; 697 + 698 + regulator_disable(st->vddio_supply); 699 + 700 + out_unlock: 701 + mutex_unlock(&st->lock); 702 + return ret; 703 + } 704 + 705 + /* 706 + * System resume gets the system back on and restores the sensors state. 707 + * Manually put runtime power management in system active state. 708 + */ 709 + static int __maybe_unused inv_icm42600_resume(struct device *dev) 710 + { 711 + struct inv_icm42600_state *st = dev_get_drvdata(dev); 712 + int ret; 713 + 714 + mutex_lock(&st->lock); 715 + 716 + ret = inv_icm42600_enable_regulator_vddio(st); 717 + if (ret) 718 + goto out_unlock; 719 + 720 + pm_runtime_disable(dev); 721 + pm_runtime_set_active(dev); 722 + pm_runtime_enable(dev); 723 + 724 + /* restore sensors state */ 725 + ret = inv_icm42600_set_pwr_mgmt0(st, st->suspended.gyro, 726 + st->suspended.accel, 727 + st->suspended.temp, NULL); 728 + if (ret) 729 + goto out_unlock; 730 + 731 + /* restore FIFO data streaming */ 732 + if (st->fifo.on) 733 + ret = regmap_write(st->map, INV_ICM42600_REG_FIFO_CONFIG, 734 + INV_ICM42600_FIFO_CONFIG_STREAM); 735 + 736 + out_unlock: 737 + mutex_unlock(&st->lock); 738 + return ret; 739 + } 740 + 741 + /* Runtime suspend will turn off sensors that are enabled by iio devices. */ 742 + static int __maybe_unused inv_icm42600_runtime_suspend(struct device *dev) 743 + { 744 + struct inv_icm42600_state *st = dev_get_drvdata(dev); 745 + int ret; 746 + 747 + mutex_lock(&st->lock); 748 + 749 + /* disable all sensors */ 750 + ret = inv_icm42600_set_pwr_mgmt0(st, INV_ICM42600_SENSOR_MODE_OFF, 751 + INV_ICM42600_SENSOR_MODE_OFF, false, 752 + NULL); 753 + if (ret) 754 + goto error_unlock; 755 + 756 + regulator_disable(st->vddio_supply); 757 + 758 + error_unlock: 759 + mutex_unlock(&st->lock); 760 + return ret; 761 + } 762 + 763 + /* Sensors are enabled by iio devices, no need to turn them back on here. */ 764 + static int __maybe_unused inv_icm42600_runtime_resume(struct device *dev) 765 + { 766 + struct inv_icm42600_state *st = dev_get_drvdata(dev); 767 + int ret; 768 + 769 + mutex_lock(&st->lock); 770 + 771 + ret = inv_icm42600_enable_regulator_vddio(st); 772 + 773 + mutex_unlock(&st->lock); 774 + return ret; 775 + } 776 + 777 + const struct dev_pm_ops inv_icm42600_pm_ops = { 778 + SET_SYSTEM_SLEEP_PM_OPS(inv_icm42600_suspend, inv_icm42600_resume) 779 + SET_RUNTIME_PM_OPS(inv_icm42600_runtime_suspend, 780 + inv_icm42600_runtime_resume, NULL) 781 + }; 782 + EXPORT_SYMBOL_GPL(inv_icm42600_pm_ops); 783 + 784 + MODULE_AUTHOR("InvenSense, Inc."); 785 + MODULE_DESCRIPTION("InvenSense ICM-426xx device driver"); 786 + MODULE_LICENSE("GPL");
+798
drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * Copyright (C) 2020 Invensense, Inc. 4 + */ 5 + 6 + #include <linux/kernel.h> 7 + #include <linux/device.h> 8 + #include <linux/mutex.h> 9 + #include <linux/pm_runtime.h> 10 + #include <linux/regmap.h> 11 + #include <linux/delay.h> 12 + #include <linux/math64.h> 13 + #include <linux/iio/iio.h> 14 + #include <linux/iio/buffer.h> 15 + #include <linux/iio/kfifo_buf.h> 16 + 17 + #include "inv_icm42600.h" 18 + #include "inv_icm42600_temp.h" 19 + #include "inv_icm42600_buffer.h" 20 + #include "inv_icm42600_timestamp.h" 21 + 22 + #define INV_ICM42600_GYRO_CHAN(_modifier, _index, _ext_info) \ 23 + { \ 24 + .type = IIO_ANGL_VEL, \ 25 + .modified = 1, \ 26 + .channel2 = _modifier, \ 27 + .info_mask_separate = \ 28 + BIT(IIO_CHAN_INFO_RAW) | \ 29 + BIT(IIO_CHAN_INFO_CALIBBIAS), \ 30 + .info_mask_shared_by_type = \ 31 + BIT(IIO_CHAN_INFO_SCALE), \ 32 + .info_mask_shared_by_type_available = \ 33 + BIT(IIO_CHAN_INFO_SCALE) | \ 34 + BIT(IIO_CHAN_INFO_CALIBBIAS), \ 35 + .info_mask_shared_by_all = \ 36 + BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 37 + .info_mask_shared_by_all_available = \ 38 + BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 39 + .scan_index = _index, \ 40 + .scan_type = { \ 41 + .sign = 's', \ 42 + .realbits = 16, \ 43 + .storagebits = 16, \ 44 + .endianness = IIO_BE, \ 45 + }, \ 46 + .ext_info = _ext_info, \ 47 + } 48 + 49 + enum inv_icm42600_gyro_scan { 50 + INV_ICM42600_GYRO_SCAN_X, 51 + INV_ICM42600_GYRO_SCAN_Y, 52 + INV_ICM42600_GYRO_SCAN_Z, 53 + INV_ICM42600_GYRO_SCAN_TEMP, 54 + INV_ICM42600_GYRO_SCAN_TIMESTAMP, 55 + }; 56 + 57 + static const struct iio_chan_spec_ext_info inv_icm42600_gyro_ext_infos[] = { 58 + IIO_MOUNT_MATRIX(IIO_SHARED_BY_ALL, inv_icm42600_get_mount_matrix), 59 + {}, 60 + }; 61 + 62 + static const struct iio_chan_spec inv_icm42600_gyro_channels[] = { 63 + INV_ICM42600_GYRO_CHAN(IIO_MOD_X, INV_ICM42600_GYRO_SCAN_X, 64 + inv_icm42600_gyro_ext_infos), 65 + INV_ICM42600_GYRO_CHAN(IIO_MOD_Y, INV_ICM42600_GYRO_SCAN_Y, 66 + inv_icm42600_gyro_ext_infos), 67 + INV_ICM42600_GYRO_CHAN(IIO_MOD_Z, INV_ICM42600_GYRO_SCAN_Z, 68 + inv_icm42600_gyro_ext_infos), 69 + INV_ICM42600_TEMP_CHAN(INV_ICM42600_GYRO_SCAN_TEMP), 70 + IIO_CHAN_SOFT_TIMESTAMP(INV_ICM42600_GYRO_SCAN_TIMESTAMP), 71 + }; 72 + 73 + /* 74 + * IIO buffer data: size must be a power of 2 and timestamp aligned 75 + * 16 bytes: 6 bytes angular velocity, 2 bytes temperature, 8 bytes timestamp 76 + */ 77 + struct inv_icm42600_gyro_buffer { 78 + struct inv_icm42600_fifo_sensor_data gyro; 79 + int16_t temp; 80 + int64_t timestamp __aligned(8); 81 + }; 82 + 83 + #define INV_ICM42600_SCAN_MASK_GYRO_3AXIS \ 84 + (BIT(INV_ICM42600_GYRO_SCAN_X) | \ 85 + BIT(INV_ICM42600_GYRO_SCAN_Y) | \ 86 + BIT(INV_ICM42600_GYRO_SCAN_Z)) 87 + 88 + #define INV_ICM42600_SCAN_MASK_TEMP BIT(INV_ICM42600_GYRO_SCAN_TEMP) 89 + 90 + static const unsigned long inv_icm42600_gyro_scan_masks[] = { 91 + /* 3-axis gyro + temperature */ 92 + INV_ICM42600_SCAN_MASK_GYRO_3AXIS | INV_ICM42600_SCAN_MASK_TEMP, 93 + 0, 94 + }; 95 + 96 + /* enable gyroscope sensor and FIFO write */ 97 + static int inv_icm42600_gyro_update_scan_mode(struct iio_dev *indio_dev, 98 + const unsigned long *scan_mask) 99 + { 100 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 101 + struct inv_icm42600_timestamp *ts = iio_priv(indio_dev); 102 + struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT; 103 + unsigned int fifo_en = 0; 104 + unsigned int sleep_gyro = 0; 105 + unsigned int sleep_temp = 0; 106 + unsigned int sleep; 107 + int ret; 108 + 109 + mutex_lock(&st->lock); 110 + 111 + if (*scan_mask & INV_ICM42600_SCAN_MASK_TEMP) { 112 + /* enable temp sensor */ 113 + ret = inv_icm42600_set_temp_conf(st, true, &sleep_temp); 114 + if (ret) 115 + goto out_unlock; 116 + fifo_en |= INV_ICM42600_SENSOR_TEMP; 117 + } 118 + 119 + if (*scan_mask & INV_ICM42600_SCAN_MASK_GYRO_3AXIS) { 120 + /* enable gyro sensor */ 121 + conf.mode = INV_ICM42600_SENSOR_MODE_LOW_NOISE; 122 + ret = inv_icm42600_set_gyro_conf(st, &conf, &sleep_gyro); 123 + if (ret) 124 + goto out_unlock; 125 + fifo_en |= INV_ICM42600_SENSOR_GYRO; 126 + } 127 + 128 + /* update data FIFO write */ 129 + inv_icm42600_timestamp_apply_odr(ts, 0, 0, 0); 130 + ret = inv_icm42600_buffer_set_fifo_en(st, fifo_en | st->fifo.en); 131 + if (ret) 132 + goto out_unlock; 133 + 134 + ret = inv_icm42600_buffer_update_watermark(st); 135 + 136 + out_unlock: 137 + mutex_unlock(&st->lock); 138 + /* sleep maximum required time */ 139 + if (sleep_gyro > sleep_temp) 140 + sleep = sleep_gyro; 141 + else 142 + sleep = sleep_temp; 143 + if (sleep) 144 + msleep(sleep); 145 + return ret; 146 + } 147 + 148 + static int inv_icm42600_gyro_read_sensor(struct inv_icm42600_state *st, 149 + struct iio_chan_spec const *chan, 150 + int16_t *val) 151 + { 152 + struct device *dev = regmap_get_device(st->map); 153 + struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT; 154 + unsigned int reg; 155 + __be16 *data; 156 + int ret; 157 + 158 + if (chan->type != IIO_ANGL_VEL) 159 + return -EINVAL; 160 + 161 + switch (chan->channel2) { 162 + case IIO_MOD_X: 163 + reg = INV_ICM42600_REG_GYRO_DATA_X; 164 + break; 165 + case IIO_MOD_Y: 166 + reg = INV_ICM42600_REG_GYRO_DATA_Y; 167 + break; 168 + case IIO_MOD_Z: 169 + reg = INV_ICM42600_REG_GYRO_DATA_Z; 170 + break; 171 + default: 172 + return -EINVAL; 173 + } 174 + 175 + pm_runtime_get_sync(dev); 176 + mutex_lock(&st->lock); 177 + 178 + /* enable gyro sensor */ 179 + conf.mode = INV_ICM42600_SENSOR_MODE_LOW_NOISE; 180 + ret = inv_icm42600_set_gyro_conf(st, &conf, NULL); 181 + if (ret) 182 + goto exit; 183 + 184 + /* read gyro register data */ 185 + data = (__be16 *)&st->buffer[0]; 186 + ret = regmap_bulk_read(st->map, reg, data, sizeof(*data)); 187 + if (ret) 188 + goto exit; 189 + 190 + *val = (int16_t)be16_to_cpup(data); 191 + if (*val == INV_ICM42600_DATA_INVALID) 192 + ret = -EINVAL; 193 + exit: 194 + mutex_unlock(&st->lock); 195 + pm_runtime_mark_last_busy(dev); 196 + pm_runtime_put_autosuspend(dev); 197 + return ret; 198 + } 199 + 200 + /* IIO format int + nano */ 201 + static const int inv_icm42600_gyro_scale[] = { 202 + /* +/- 2000dps => 0.001065264 rad/s */ 203 + [2 * INV_ICM42600_GYRO_FS_2000DPS] = 0, 204 + [2 * INV_ICM42600_GYRO_FS_2000DPS + 1] = 1065264, 205 + /* +/- 1000dps => 0.000532632 rad/s */ 206 + [2 * INV_ICM42600_GYRO_FS_1000DPS] = 0, 207 + [2 * INV_ICM42600_GYRO_FS_1000DPS + 1] = 532632, 208 + /* +/- 500dps => 0.000266316 rad/s */ 209 + [2 * INV_ICM42600_GYRO_FS_500DPS] = 0, 210 + [2 * INV_ICM42600_GYRO_FS_500DPS + 1] = 266316, 211 + /* +/- 250dps => 0.000133158 rad/s */ 212 + [2 * INV_ICM42600_GYRO_FS_250DPS] = 0, 213 + [2 * INV_ICM42600_GYRO_FS_250DPS + 1] = 133158, 214 + /* +/- 125dps => 0.000066579 rad/s */ 215 + [2 * INV_ICM42600_GYRO_FS_125DPS] = 0, 216 + [2 * INV_ICM42600_GYRO_FS_125DPS + 1] = 66579, 217 + /* +/- 62.5dps => 0.000033290 rad/s */ 218 + [2 * INV_ICM42600_GYRO_FS_62_5DPS] = 0, 219 + [2 * INV_ICM42600_GYRO_FS_62_5DPS + 1] = 33290, 220 + /* +/- 31.25dps => 0.000016645 rad/s */ 221 + [2 * INV_ICM42600_GYRO_FS_31_25DPS] = 0, 222 + [2 * INV_ICM42600_GYRO_FS_31_25DPS + 1] = 16645, 223 + /* +/- 15.625dps => 0.000008322 rad/s */ 224 + [2 * INV_ICM42600_GYRO_FS_15_625DPS] = 0, 225 + [2 * INV_ICM42600_GYRO_FS_15_625DPS + 1] = 8322, 226 + }; 227 + 228 + static int inv_icm42600_gyro_read_scale(struct inv_icm42600_state *st, 229 + int *val, int *val2) 230 + { 231 + unsigned int idx; 232 + 233 + idx = st->conf.gyro.fs; 234 + 235 + *val = inv_icm42600_gyro_scale[2 * idx]; 236 + *val2 = inv_icm42600_gyro_scale[2 * idx + 1]; 237 + return IIO_VAL_INT_PLUS_NANO; 238 + } 239 + 240 + static int inv_icm42600_gyro_write_scale(struct inv_icm42600_state *st, 241 + int val, int val2) 242 + { 243 + struct device *dev = regmap_get_device(st->map); 244 + unsigned int idx; 245 + struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT; 246 + int ret; 247 + 248 + for (idx = 0; idx < ARRAY_SIZE(inv_icm42600_gyro_scale); idx += 2) { 249 + if (val == inv_icm42600_gyro_scale[idx] && 250 + val2 == inv_icm42600_gyro_scale[idx + 1]) 251 + break; 252 + } 253 + if (idx >= ARRAY_SIZE(inv_icm42600_gyro_scale)) 254 + return -EINVAL; 255 + 256 + conf.fs = idx / 2; 257 + 258 + pm_runtime_get_sync(dev); 259 + mutex_lock(&st->lock); 260 + 261 + ret = inv_icm42600_set_gyro_conf(st, &conf, NULL); 262 + 263 + mutex_unlock(&st->lock); 264 + pm_runtime_mark_last_busy(dev); 265 + pm_runtime_put_autosuspend(dev); 266 + 267 + return ret; 268 + } 269 + 270 + /* IIO format int + micro */ 271 + static const int inv_icm42600_gyro_odr[] = { 272 + /* 12.5Hz */ 273 + 12, 500000, 274 + /* 25Hz */ 275 + 25, 0, 276 + /* 50Hz */ 277 + 50, 0, 278 + /* 100Hz */ 279 + 100, 0, 280 + /* 200Hz */ 281 + 200, 0, 282 + /* 1kHz */ 283 + 1000, 0, 284 + /* 2kHz */ 285 + 2000, 0, 286 + /* 4kHz */ 287 + 4000, 0, 288 + }; 289 + 290 + static const int inv_icm42600_gyro_odr_conv[] = { 291 + INV_ICM42600_ODR_12_5HZ, 292 + INV_ICM42600_ODR_25HZ, 293 + INV_ICM42600_ODR_50HZ, 294 + INV_ICM42600_ODR_100HZ, 295 + INV_ICM42600_ODR_200HZ, 296 + INV_ICM42600_ODR_1KHZ_LN, 297 + INV_ICM42600_ODR_2KHZ_LN, 298 + INV_ICM42600_ODR_4KHZ_LN, 299 + }; 300 + 301 + static int inv_icm42600_gyro_read_odr(struct inv_icm42600_state *st, 302 + int *val, int *val2) 303 + { 304 + unsigned int odr; 305 + unsigned int i; 306 + 307 + odr = st->conf.gyro.odr; 308 + 309 + for (i = 0; i < ARRAY_SIZE(inv_icm42600_gyro_odr_conv); ++i) { 310 + if (inv_icm42600_gyro_odr_conv[i] == odr) 311 + break; 312 + } 313 + if (i >= ARRAY_SIZE(inv_icm42600_gyro_odr_conv)) 314 + return -EINVAL; 315 + 316 + *val = inv_icm42600_gyro_odr[2 * i]; 317 + *val2 = inv_icm42600_gyro_odr[2 * i + 1]; 318 + 319 + return IIO_VAL_INT_PLUS_MICRO; 320 + } 321 + 322 + static int inv_icm42600_gyro_write_odr(struct iio_dev *indio_dev, 323 + int val, int val2) 324 + { 325 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 326 + struct inv_icm42600_timestamp *ts = iio_priv(indio_dev); 327 + struct device *dev = regmap_get_device(st->map); 328 + unsigned int idx; 329 + struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT; 330 + int ret; 331 + 332 + for (idx = 0; idx < ARRAY_SIZE(inv_icm42600_gyro_odr); idx += 2) { 333 + if (val == inv_icm42600_gyro_odr[idx] && 334 + val2 == inv_icm42600_gyro_odr[idx + 1]) 335 + break; 336 + } 337 + if (idx >= ARRAY_SIZE(inv_icm42600_gyro_odr)) 338 + return -EINVAL; 339 + 340 + conf.odr = inv_icm42600_gyro_odr_conv[idx / 2]; 341 + 342 + pm_runtime_get_sync(dev); 343 + mutex_lock(&st->lock); 344 + 345 + ret = inv_icm42600_timestamp_update_odr(ts, inv_icm42600_odr_to_period(conf.odr), 346 + iio_buffer_enabled(indio_dev)); 347 + if (ret) 348 + goto out_unlock; 349 + 350 + ret = inv_icm42600_set_gyro_conf(st, &conf, NULL); 351 + if (ret) 352 + goto out_unlock; 353 + inv_icm42600_buffer_update_fifo_period(st); 354 + inv_icm42600_buffer_update_watermark(st); 355 + 356 + out_unlock: 357 + mutex_unlock(&st->lock); 358 + pm_runtime_mark_last_busy(dev); 359 + pm_runtime_put_autosuspend(dev); 360 + 361 + return ret; 362 + } 363 + 364 + /* 365 + * Calibration bias values, IIO range format int + nano. 366 + * Value is limited to +/-64dps coded on 12 bits signed. Step is 1/32 dps. 367 + */ 368 + static int inv_icm42600_gyro_calibbias[] = { 369 + -1, 117010721, /* min: -1.117010721 rad/s */ 370 + 0, 545415, /* step: 0.000545415 rad/s */ 371 + 1, 116465306, /* max: 1.116465306 rad/s */ 372 + }; 373 + 374 + static int inv_icm42600_gyro_read_offset(struct inv_icm42600_state *st, 375 + struct iio_chan_spec const *chan, 376 + int *val, int *val2) 377 + { 378 + struct device *dev = regmap_get_device(st->map); 379 + int64_t val64; 380 + int32_t bias; 381 + unsigned int reg; 382 + int16_t offset; 383 + uint8_t data[2]; 384 + int ret; 385 + 386 + if (chan->type != IIO_ANGL_VEL) 387 + return -EINVAL; 388 + 389 + switch (chan->channel2) { 390 + case IIO_MOD_X: 391 + reg = INV_ICM42600_REG_OFFSET_USER0; 392 + break; 393 + case IIO_MOD_Y: 394 + reg = INV_ICM42600_REG_OFFSET_USER1; 395 + break; 396 + case IIO_MOD_Z: 397 + reg = INV_ICM42600_REG_OFFSET_USER3; 398 + break; 399 + default: 400 + return -EINVAL; 401 + } 402 + 403 + pm_runtime_get_sync(dev); 404 + mutex_lock(&st->lock); 405 + 406 + ret = regmap_bulk_read(st->map, reg, st->buffer, sizeof(data)); 407 + memcpy(data, st->buffer, sizeof(data)); 408 + 409 + mutex_unlock(&st->lock); 410 + pm_runtime_mark_last_busy(dev); 411 + pm_runtime_put_autosuspend(dev); 412 + if (ret) 413 + return ret; 414 + 415 + /* 12 bits signed value */ 416 + switch (chan->channel2) { 417 + case IIO_MOD_X: 418 + offset = sign_extend32(((data[1] & 0x0F) << 8) | data[0], 11); 419 + break; 420 + case IIO_MOD_Y: 421 + offset = sign_extend32(((data[0] & 0xF0) << 4) | data[1], 11); 422 + break; 423 + case IIO_MOD_Z: 424 + offset = sign_extend32(((data[1] & 0x0F) << 8) | data[0], 11); 425 + break; 426 + default: 427 + return -EINVAL; 428 + } 429 + 430 + /* 431 + * convert raw offset to dps then to rad/s 432 + * 12 bits signed raw max 64 to dps: 64 / 2048 433 + * dps to rad: Pi / 180 434 + * result in nano (1000000000) 435 + * (offset * 64 * Pi * 1000000000) / (2048 * 180) 436 + */ 437 + val64 = (int64_t)offset * 64LL * 3141592653LL; 438 + /* for rounding, add + or - divisor (2048 * 180) divided by 2 */ 439 + if (val64 >= 0) 440 + val64 += 2048 * 180 / 2; 441 + else 442 + val64 -= 2048 * 180 / 2; 443 + bias = div_s64(val64, 2048 * 180); 444 + *val = bias / 1000000000L; 445 + *val2 = bias % 1000000000L; 446 + 447 + return IIO_VAL_INT_PLUS_NANO; 448 + } 449 + 450 + static int inv_icm42600_gyro_write_offset(struct inv_icm42600_state *st, 451 + struct iio_chan_spec const *chan, 452 + int val, int val2) 453 + { 454 + struct device *dev = regmap_get_device(st->map); 455 + int64_t val64, min, max; 456 + unsigned int reg, regval; 457 + int16_t offset; 458 + int ret; 459 + 460 + if (chan->type != IIO_ANGL_VEL) 461 + return -EINVAL; 462 + 463 + switch (chan->channel2) { 464 + case IIO_MOD_X: 465 + reg = INV_ICM42600_REG_OFFSET_USER0; 466 + break; 467 + case IIO_MOD_Y: 468 + reg = INV_ICM42600_REG_OFFSET_USER1; 469 + break; 470 + case IIO_MOD_Z: 471 + reg = INV_ICM42600_REG_OFFSET_USER3; 472 + break; 473 + default: 474 + return -EINVAL; 475 + } 476 + 477 + /* inv_icm42600_gyro_calibbias: min - step - max in nano */ 478 + min = (int64_t)inv_icm42600_gyro_calibbias[0] * 1000000000LL + 479 + (int64_t)inv_icm42600_gyro_calibbias[1]; 480 + max = (int64_t)inv_icm42600_gyro_calibbias[4] * 1000000000LL + 481 + (int64_t)inv_icm42600_gyro_calibbias[5]; 482 + val64 = (int64_t)val * 1000000000LL + (int64_t)val2; 483 + if (val64 < min || val64 > max) 484 + return -EINVAL; 485 + 486 + /* 487 + * convert rad/s to dps then to raw value 488 + * rad to dps: 180 / Pi 489 + * dps to raw 12 bits signed, max 64: 2048 / 64 490 + * val in nano (1000000000) 491 + * val * 180 * 2048 / (Pi * 1000000000 * 64) 492 + */ 493 + val64 = val64 * 180LL * 2048LL; 494 + /* for rounding, add + or - divisor (3141592653 * 64) divided by 2 */ 495 + if (val64 >= 0) 496 + val64 += 3141592653LL * 64LL / 2LL; 497 + else 498 + val64 -= 3141592653LL * 64LL / 2LL; 499 + offset = div64_s64(val64, 3141592653LL * 64LL); 500 + 501 + /* clamp value limited to 12 bits signed */ 502 + if (offset < -2048) 503 + offset = -2048; 504 + else if (offset > 2047) 505 + offset = 2047; 506 + 507 + pm_runtime_get_sync(dev); 508 + mutex_lock(&st->lock); 509 + 510 + switch (chan->channel2) { 511 + case IIO_MOD_X: 512 + /* OFFSET_USER1 register is shared */ 513 + ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER1, 514 + &regval); 515 + if (ret) 516 + goto out_unlock; 517 + st->buffer[0] = offset & 0xFF; 518 + st->buffer[1] = (regval & 0xF0) | ((offset & 0xF00) >> 8); 519 + break; 520 + case IIO_MOD_Y: 521 + /* OFFSET_USER1 register is shared */ 522 + ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER1, 523 + &regval); 524 + if (ret) 525 + goto out_unlock; 526 + st->buffer[0] = ((offset & 0xF00) >> 4) | (regval & 0x0F); 527 + st->buffer[1] = offset & 0xFF; 528 + break; 529 + case IIO_MOD_Z: 530 + /* OFFSET_USER4 register is shared */ 531 + ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER4, 532 + &regval); 533 + if (ret) 534 + goto out_unlock; 535 + st->buffer[0] = offset & 0xFF; 536 + st->buffer[1] = (regval & 0xF0) | ((offset & 0xF00) >> 8); 537 + break; 538 + default: 539 + ret = -EINVAL; 540 + goto out_unlock; 541 + } 542 + 543 + ret = regmap_bulk_write(st->map, reg, st->buffer, 2); 544 + 545 + out_unlock: 546 + mutex_unlock(&st->lock); 547 + pm_runtime_mark_last_busy(dev); 548 + pm_runtime_put_autosuspend(dev); 549 + return ret; 550 + } 551 + 552 + static int inv_icm42600_gyro_read_raw(struct iio_dev *indio_dev, 553 + struct iio_chan_spec const *chan, 554 + int *val, int *val2, long mask) 555 + { 556 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 557 + int16_t data; 558 + int ret; 559 + 560 + switch (chan->type) { 561 + case IIO_ANGL_VEL: 562 + break; 563 + case IIO_TEMP: 564 + return inv_icm42600_temp_read_raw(indio_dev, chan, val, val2, mask); 565 + default: 566 + return -EINVAL; 567 + } 568 + 569 + switch (mask) { 570 + case IIO_CHAN_INFO_RAW: 571 + ret = iio_device_claim_direct_mode(indio_dev); 572 + if (ret) 573 + return ret; 574 + ret = inv_icm42600_gyro_read_sensor(st, chan, &data); 575 + iio_device_release_direct_mode(indio_dev); 576 + if (ret) 577 + return ret; 578 + *val = data; 579 + return IIO_VAL_INT; 580 + case IIO_CHAN_INFO_SCALE: 581 + return inv_icm42600_gyro_read_scale(st, val, val2); 582 + case IIO_CHAN_INFO_SAMP_FREQ: 583 + return inv_icm42600_gyro_read_odr(st, val, val2); 584 + case IIO_CHAN_INFO_CALIBBIAS: 585 + return inv_icm42600_gyro_read_offset(st, chan, val, val2); 586 + default: 587 + return -EINVAL; 588 + } 589 + } 590 + 591 + static int inv_icm42600_gyro_read_avail(struct iio_dev *indio_dev, 592 + struct iio_chan_spec const *chan, 593 + const int **vals, 594 + int *type, int *length, long mask) 595 + { 596 + if (chan->type != IIO_ANGL_VEL) 597 + return -EINVAL; 598 + 599 + switch (mask) { 600 + case IIO_CHAN_INFO_SCALE: 601 + *vals = inv_icm42600_gyro_scale; 602 + *type = IIO_VAL_INT_PLUS_NANO; 603 + *length = ARRAY_SIZE(inv_icm42600_gyro_scale); 604 + return IIO_AVAIL_LIST; 605 + case IIO_CHAN_INFO_SAMP_FREQ: 606 + *vals = inv_icm42600_gyro_odr; 607 + *type = IIO_VAL_INT_PLUS_MICRO; 608 + *length = ARRAY_SIZE(inv_icm42600_gyro_odr); 609 + return IIO_AVAIL_LIST; 610 + case IIO_CHAN_INFO_CALIBBIAS: 611 + *vals = inv_icm42600_gyro_calibbias; 612 + *type = IIO_VAL_INT_PLUS_NANO; 613 + return IIO_AVAIL_RANGE; 614 + default: 615 + return -EINVAL; 616 + } 617 + } 618 + 619 + static int inv_icm42600_gyro_write_raw(struct iio_dev *indio_dev, 620 + struct iio_chan_spec const *chan, 621 + int val, int val2, long mask) 622 + { 623 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 624 + int ret; 625 + 626 + if (chan->type != IIO_ANGL_VEL) 627 + return -EINVAL; 628 + 629 + switch (mask) { 630 + case IIO_CHAN_INFO_SCALE: 631 + ret = iio_device_claim_direct_mode(indio_dev); 632 + if (ret) 633 + return ret; 634 + ret = inv_icm42600_gyro_write_scale(st, val, val2); 635 + iio_device_release_direct_mode(indio_dev); 636 + return ret; 637 + case IIO_CHAN_INFO_SAMP_FREQ: 638 + return inv_icm42600_gyro_write_odr(indio_dev, val, val2); 639 + case IIO_CHAN_INFO_CALIBBIAS: 640 + ret = iio_device_claim_direct_mode(indio_dev); 641 + if (ret) 642 + return ret; 643 + ret = inv_icm42600_gyro_write_offset(st, chan, val, val2); 644 + iio_device_release_direct_mode(indio_dev); 645 + return ret; 646 + default: 647 + return -EINVAL; 648 + } 649 + } 650 + 651 + static int inv_icm42600_gyro_write_raw_get_fmt(struct iio_dev *indio_dev, 652 + struct iio_chan_spec const *chan, 653 + long mask) 654 + { 655 + if (chan->type != IIO_ANGL_VEL) 656 + return -EINVAL; 657 + 658 + switch (mask) { 659 + case IIO_CHAN_INFO_SCALE: 660 + return IIO_VAL_INT_PLUS_NANO; 661 + case IIO_CHAN_INFO_SAMP_FREQ: 662 + return IIO_VAL_INT_PLUS_MICRO; 663 + case IIO_CHAN_INFO_CALIBBIAS: 664 + return IIO_VAL_INT_PLUS_NANO; 665 + default: 666 + return -EINVAL; 667 + } 668 + } 669 + 670 + static int inv_icm42600_gyro_hwfifo_set_watermark(struct iio_dev *indio_dev, 671 + unsigned int val) 672 + { 673 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 674 + int ret; 675 + 676 + mutex_lock(&st->lock); 677 + 678 + st->fifo.watermark.gyro = val; 679 + ret = inv_icm42600_buffer_update_watermark(st); 680 + 681 + mutex_unlock(&st->lock); 682 + 683 + return ret; 684 + } 685 + 686 + static int inv_icm42600_gyro_hwfifo_flush(struct iio_dev *indio_dev, 687 + unsigned int count) 688 + { 689 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 690 + int ret; 691 + 692 + if (count == 0) 693 + return 0; 694 + 695 + mutex_lock(&st->lock); 696 + 697 + ret = inv_icm42600_buffer_hwfifo_flush(st, count); 698 + if (!ret) 699 + ret = st->fifo.nb.gyro; 700 + 701 + mutex_unlock(&st->lock); 702 + 703 + return ret; 704 + } 705 + 706 + static const struct iio_info inv_icm42600_gyro_info = { 707 + .read_raw = inv_icm42600_gyro_read_raw, 708 + .read_avail = inv_icm42600_gyro_read_avail, 709 + .write_raw = inv_icm42600_gyro_write_raw, 710 + .write_raw_get_fmt = inv_icm42600_gyro_write_raw_get_fmt, 711 + .debugfs_reg_access = inv_icm42600_debugfs_reg, 712 + .update_scan_mode = inv_icm42600_gyro_update_scan_mode, 713 + .hwfifo_set_watermark = inv_icm42600_gyro_hwfifo_set_watermark, 714 + .hwfifo_flush_to_buffer = inv_icm42600_gyro_hwfifo_flush, 715 + }; 716 + 717 + struct iio_dev *inv_icm42600_gyro_init(struct inv_icm42600_state *st) 718 + { 719 + struct device *dev = regmap_get_device(st->map); 720 + const char *name; 721 + struct inv_icm42600_timestamp *ts; 722 + struct iio_dev *indio_dev; 723 + struct iio_buffer *buffer; 724 + int ret; 725 + 726 + name = devm_kasprintf(dev, GFP_KERNEL, "%s-gyro", st->name); 727 + if (!name) 728 + return ERR_PTR(-ENOMEM); 729 + 730 + indio_dev = devm_iio_device_alloc(dev, sizeof(*ts)); 731 + if (!indio_dev) 732 + return ERR_PTR(-ENOMEM); 733 + 734 + buffer = devm_iio_kfifo_allocate(dev); 735 + if (!buffer) 736 + return ERR_PTR(-ENOMEM); 737 + 738 + ts = iio_priv(indio_dev); 739 + inv_icm42600_timestamp_init(ts, inv_icm42600_odr_to_period(st->conf.gyro.odr)); 740 + 741 + iio_device_set_drvdata(indio_dev, st); 742 + indio_dev->name = name; 743 + indio_dev->info = &inv_icm42600_gyro_info; 744 + indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE; 745 + indio_dev->channels = inv_icm42600_gyro_channels; 746 + indio_dev->num_channels = ARRAY_SIZE(inv_icm42600_gyro_channels); 747 + indio_dev->available_scan_masks = inv_icm42600_gyro_scan_masks; 748 + indio_dev->setup_ops = &inv_icm42600_buffer_ops; 749 + 750 + iio_device_attach_buffer(indio_dev, buffer); 751 + 752 + ret = devm_iio_device_register(dev, indio_dev); 753 + if (ret) 754 + return ERR_PTR(ret); 755 + 756 + return indio_dev; 757 + } 758 + 759 + int inv_icm42600_gyro_parse_fifo(struct iio_dev *indio_dev) 760 + { 761 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 762 + struct inv_icm42600_timestamp *ts = iio_priv(indio_dev); 763 + ssize_t i, size; 764 + unsigned int no; 765 + const void *accel, *gyro, *timestamp; 766 + const int8_t *temp; 767 + unsigned int odr; 768 + int64_t ts_val; 769 + struct inv_icm42600_gyro_buffer buffer; 770 + 771 + /* parse all fifo packets */ 772 + for (i = 0, no = 0; i < st->fifo.count; i += size, ++no) { 773 + size = inv_icm42600_fifo_decode_packet(&st->fifo.data[i], 774 + &accel, &gyro, &temp, &timestamp, &odr); 775 + /* quit if error or FIFO is empty */ 776 + if (size <= 0) 777 + return size; 778 + 779 + /* skip packet if no gyro data or data is invalid */ 780 + if (gyro == NULL || !inv_icm42600_fifo_is_data_valid(gyro)) 781 + continue; 782 + 783 + /* update odr */ 784 + if (odr & INV_ICM42600_SENSOR_GYRO) 785 + inv_icm42600_timestamp_apply_odr(ts, st->fifo.period, 786 + st->fifo.nb.total, no); 787 + 788 + /* buffer is copied to userspace, zeroing it to avoid any data leak */ 789 + memset(&buffer, 0, sizeof(buffer)); 790 + memcpy(&buffer.gyro, gyro, sizeof(buffer.gyro)); 791 + /* convert 8 bits FIFO temperature in high resolution format */ 792 + buffer.temp = temp ? (*temp * 64) : 0; 793 + ts_val = inv_icm42600_timestamp_pop(ts); 794 + iio_push_to_buffers_with_timestamp(indio_dev, &buffer, ts_val); 795 + } 796 + 797 + return 0; 798 + }
+101
drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * Copyright (C) 2020 InvenSense, Inc. 4 + */ 5 + 6 + #include <linux/kernel.h> 7 + #include <linux/device.h> 8 + #include <linux/module.h> 9 + #include <linux/mod_devicetable.h> 10 + #include <linux/i2c.h> 11 + #include <linux/regmap.h> 12 + #include <linux/property.h> 13 + 14 + #include "inv_icm42600.h" 15 + 16 + static int inv_icm42600_i2c_bus_setup(struct inv_icm42600_state *st) 17 + { 18 + unsigned int mask, val; 19 + int ret; 20 + 21 + /* setup interface registers */ 22 + ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG6, 23 + INV_ICM42600_INTF_CONFIG6_MASK, 24 + INV_ICM42600_INTF_CONFIG6_I3C_EN); 25 + if (ret) 26 + return ret; 27 + 28 + ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4, 29 + INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY, 0); 30 + if (ret) 31 + return ret; 32 + 33 + /* set slew rates for I2C and SPI */ 34 + mask = INV_ICM42600_DRIVE_CONFIG_I2C_MASK | 35 + INV_ICM42600_DRIVE_CONFIG_SPI_MASK; 36 + val = INV_ICM42600_DRIVE_CONFIG_I2C(INV_ICM42600_SLEW_RATE_12_36NS) | 37 + INV_ICM42600_DRIVE_CONFIG_SPI(INV_ICM42600_SLEW_RATE_12_36NS); 38 + ret = regmap_update_bits(st->map, INV_ICM42600_REG_DRIVE_CONFIG, 39 + mask, val); 40 + if (ret) 41 + return ret; 42 + 43 + /* disable SPI bus */ 44 + return regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0, 45 + INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_MASK, 46 + INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_SPI_DIS); 47 + } 48 + 49 + static int inv_icm42600_probe(struct i2c_client *client) 50 + { 51 + const void *match; 52 + enum inv_icm42600_chip chip; 53 + struct regmap *regmap; 54 + 55 + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) 56 + return -ENOTSUPP; 57 + 58 + match = device_get_match_data(&client->dev); 59 + if (!match) 60 + return -EINVAL; 61 + chip = (enum inv_icm42600_chip)match; 62 + 63 + regmap = devm_regmap_init_i2c(client, &inv_icm42600_regmap_config); 64 + if (IS_ERR(regmap)) 65 + return PTR_ERR(regmap); 66 + 67 + return inv_icm42600_core_probe(regmap, chip, client->irq, 68 + inv_icm42600_i2c_bus_setup); 69 + } 70 + 71 + static const struct of_device_id inv_icm42600_of_matches[] = { 72 + { 73 + .compatible = "invensense,icm42600", 74 + .data = (void *)INV_CHIP_ICM42600, 75 + }, { 76 + .compatible = "invensense,icm42602", 77 + .data = (void *)INV_CHIP_ICM42602, 78 + }, { 79 + .compatible = "invensense,icm42605", 80 + .data = (void *)INV_CHIP_ICM42605, 81 + }, { 82 + .compatible = "invensense,icm42622", 83 + .data = (void *)INV_CHIP_ICM42622, 84 + }, 85 + {} 86 + }; 87 + MODULE_DEVICE_TABLE(of, inv_icm42600_of_matches); 88 + 89 + static struct i2c_driver inv_icm42600_driver = { 90 + .driver = { 91 + .name = "inv-icm42600-i2c", 92 + .of_match_table = inv_icm42600_of_matches, 93 + .pm = &inv_icm42600_pm_ops, 94 + }, 95 + .probe_new = inv_icm42600_probe, 96 + }; 97 + module_i2c_driver(inv_icm42600_driver); 98 + 99 + MODULE_AUTHOR("InvenSense, Inc."); 100 + MODULE_DESCRIPTION("InvenSense ICM-426xx I2C driver"); 101 + MODULE_LICENSE("GPL");
+100
drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * Copyright (C) 2020 InvenSense, Inc. 4 + */ 5 + 6 + #include <linux/kernel.h> 7 + #include <linux/device.h> 8 + #include <linux/module.h> 9 + #include <linux/mod_devicetable.h> 10 + #include <linux/spi/spi.h> 11 + #include <linux/regmap.h> 12 + #include <linux/property.h> 13 + 14 + #include "inv_icm42600.h" 15 + 16 + static int inv_icm42600_spi_bus_setup(struct inv_icm42600_state *st) 17 + { 18 + unsigned int mask, val; 19 + int ret; 20 + 21 + /* setup interface registers */ 22 + val = INV_ICM42600_INTF_CONFIG6_I3C_EN | 23 + INV_ICM42600_INTF_CONFIG6_I3C_SDR_EN | 24 + INV_ICM42600_INTF_CONFIG6_I3C_DDR_EN; 25 + ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG6, 26 + INV_ICM42600_INTF_CONFIG6_MASK, val); 27 + if (ret) 28 + return ret; 29 + 30 + ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4, 31 + INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY, 0); 32 + if (ret) 33 + return ret; 34 + 35 + /* set slew rates for I2C and SPI */ 36 + mask = INV_ICM42600_DRIVE_CONFIG_I2C_MASK | 37 + INV_ICM42600_DRIVE_CONFIG_SPI_MASK; 38 + val = INV_ICM42600_DRIVE_CONFIG_I2C(INV_ICM42600_SLEW_RATE_20_60NS) | 39 + INV_ICM42600_DRIVE_CONFIG_SPI(INV_ICM42600_SLEW_RATE_INF_2NS); 40 + ret = regmap_update_bits(st->map, INV_ICM42600_REG_DRIVE_CONFIG, 41 + mask, val); 42 + if (ret) 43 + return ret; 44 + 45 + /* disable i2c bus */ 46 + return regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0, 47 + INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_MASK, 48 + INV_ICM42600_INTF_CONFIG0_UI_SIFS_CFG_I2C_DIS); 49 + } 50 + 51 + static int inv_icm42600_probe(struct spi_device *spi) 52 + { 53 + const void *match; 54 + enum inv_icm42600_chip chip; 55 + struct regmap *regmap; 56 + 57 + match = device_get_match_data(&spi->dev); 58 + if (!match) 59 + return -EINVAL; 60 + chip = (enum inv_icm42600_chip)match; 61 + 62 + regmap = devm_regmap_init_spi(spi, &inv_icm42600_regmap_config); 63 + if (IS_ERR(regmap)) 64 + return PTR_ERR(regmap); 65 + 66 + return inv_icm42600_core_probe(regmap, chip, spi->irq, 67 + inv_icm42600_spi_bus_setup); 68 + } 69 + 70 + static const struct of_device_id inv_icm42600_of_matches[] = { 71 + { 72 + .compatible = "invensense,icm42600", 73 + .data = (void *)INV_CHIP_ICM42600, 74 + }, { 75 + .compatible = "invensense,icm42602", 76 + .data = (void *)INV_CHIP_ICM42602, 77 + }, { 78 + .compatible = "invensense,icm42605", 79 + .data = (void *)INV_CHIP_ICM42605, 80 + }, { 81 + .compatible = "invensense,icm42622", 82 + .data = (void *)INV_CHIP_ICM42622, 83 + }, 84 + {} 85 + }; 86 + MODULE_DEVICE_TABLE(of, inv_icm42600_of_matches); 87 + 88 + static struct spi_driver inv_icm42600_driver = { 89 + .driver = { 90 + .name = "inv-icm42600-spi", 91 + .of_match_table = inv_icm42600_of_matches, 92 + .pm = &inv_icm42600_pm_ops, 93 + }, 94 + .probe = inv_icm42600_probe, 95 + }; 96 + module_spi_driver(inv_icm42600_driver); 97 + 98 + MODULE_AUTHOR("InvenSense, Inc."); 99 + MODULE_DESCRIPTION("InvenSense ICM-426xx SPI driver"); 100 + MODULE_LICENSE("GPL");
+84
drivers/iio/imu/inv_icm42600/inv_icm42600_temp.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * Copyright (C) 2020 Invensense, Inc. 4 + */ 5 + 6 + #include <linux/kernel.h> 7 + #include <linux/device.h> 8 + #include <linux/mutex.h> 9 + #include <linux/pm_runtime.h> 10 + #include <linux/regmap.h> 11 + #include <linux/iio/iio.h> 12 + 13 + #include "inv_icm42600.h" 14 + #include "inv_icm42600_temp.h" 15 + 16 + static int inv_icm42600_temp_read(struct inv_icm42600_state *st, int16_t *temp) 17 + { 18 + struct device *dev = regmap_get_device(st->map); 19 + __be16 *raw; 20 + int ret; 21 + 22 + pm_runtime_get_sync(dev); 23 + mutex_lock(&st->lock); 24 + 25 + ret = inv_icm42600_set_temp_conf(st, true, NULL); 26 + if (ret) 27 + goto exit; 28 + 29 + raw = (__be16 *)&st->buffer[0]; 30 + ret = regmap_bulk_read(st->map, INV_ICM42600_REG_TEMP_DATA, raw, sizeof(*raw)); 31 + if (ret) 32 + goto exit; 33 + 34 + *temp = (int16_t)be16_to_cpup(raw); 35 + if (*temp == INV_ICM42600_DATA_INVALID) 36 + ret = -EINVAL; 37 + 38 + exit: 39 + mutex_unlock(&st->lock); 40 + pm_runtime_mark_last_busy(dev); 41 + pm_runtime_put_autosuspend(dev); 42 + 43 + return ret; 44 + } 45 + 46 + int inv_icm42600_temp_read_raw(struct iio_dev *indio_dev, 47 + struct iio_chan_spec const *chan, 48 + int *val, int *val2, long mask) 49 + { 50 + struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); 51 + int16_t temp; 52 + int ret; 53 + 54 + if (chan->type != IIO_TEMP) 55 + return -EINVAL; 56 + 57 + switch (mask) { 58 + case IIO_CHAN_INFO_RAW: 59 + ret = iio_device_claim_direct_mode(indio_dev); 60 + if (ret) 61 + return ret; 62 + ret = inv_icm42600_temp_read(st, &temp); 63 + iio_device_release_direct_mode(indio_dev); 64 + if (ret) 65 + return ret; 66 + *val = temp; 67 + return IIO_VAL_INT; 68 + /* 69 + * T°C = (temp / 132.48) + 25 70 + * Tm°C = 1000 * ((temp * 100 / 13248) + 25) 71 + * scale: 100000 / 13248 ~= 7.548309 72 + * offset: 25000 73 + */ 74 + case IIO_CHAN_INFO_SCALE: 75 + *val = 7; 76 + *val2 = 548309; 77 + return IIO_VAL_INT_PLUS_MICRO; 78 + case IIO_CHAN_INFO_OFFSET: 79 + *val = 25000; 80 + return IIO_VAL_INT; 81 + default: 82 + return -EINVAL; 83 + } 84 + }
+30
drivers/iio/imu/inv_icm42600/inv_icm42600_temp.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 + /* 3 + * Copyright (C) 2020 Invensense, Inc. 4 + */ 5 + 6 + #ifndef INV_ICM42600_TEMP_H_ 7 + #define INV_ICM42600_TEMP_H_ 8 + 9 + #include <linux/iio/iio.h> 10 + 11 + #define INV_ICM42600_TEMP_CHAN(_index) \ 12 + { \ 13 + .type = IIO_TEMP, \ 14 + .info_mask_separate = \ 15 + BIT(IIO_CHAN_INFO_RAW) | \ 16 + BIT(IIO_CHAN_INFO_OFFSET) | \ 17 + BIT(IIO_CHAN_INFO_SCALE), \ 18 + .scan_index = _index, \ 19 + .scan_type = { \ 20 + .sign = 's', \ 21 + .realbits = 16, \ 22 + .storagebits = 16, \ 23 + }, \ 24 + } 25 + 26 + int inv_icm42600_temp_read_raw(struct iio_dev *indio_dev, 27 + struct iio_chan_spec const *chan, 28 + int *val, int *val2, long mask); 29 + 30 + #endif
+195
drivers/iio/imu/inv_icm42600/inv_icm42600_timestamp.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * Copyright (C) 2020 Invensense, Inc. 4 + */ 5 + 6 + #include <linux/kernel.h> 7 + #include <linux/regmap.h> 8 + #include <linux/math64.h> 9 + 10 + #include "inv_icm42600.h" 11 + #include "inv_icm42600_timestamp.h" 12 + 13 + /* internal chip period is 32kHz, 31250ns */ 14 + #define INV_ICM42600_TIMESTAMP_PERIOD 31250 15 + /* allow a jitter of +/- 2% */ 16 + #define INV_ICM42600_TIMESTAMP_JITTER 2 17 + /* compute min and max periods accepted */ 18 + #define INV_ICM42600_TIMESTAMP_MIN_PERIOD(_p) \ 19 + (((_p) * (100 - INV_ICM42600_TIMESTAMP_JITTER)) / 100) 20 + #define INV_ICM42600_TIMESTAMP_MAX_PERIOD(_p) \ 21 + (((_p) * (100 + INV_ICM42600_TIMESTAMP_JITTER)) / 100) 22 + 23 + /* Add a new value inside an accumulator and update the estimate value */ 24 + static void inv_update_acc(struct inv_icm42600_timestamp_acc *acc, uint32_t val) 25 + { 26 + uint64_t sum = 0; 27 + size_t i; 28 + 29 + acc->values[acc->idx++] = val; 30 + if (acc->idx >= ARRAY_SIZE(acc->values)) 31 + acc->idx = 0; 32 + 33 + /* compute the mean of all stored values, use 0 as empty slot */ 34 + for (i = 0; i < ARRAY_SIZE(acc->values); ++i) { 35 + if (acc->values[i] == 0) 36 + break; 37 + sum += acc->values[i]; 38 + } 39 + 40 + acc->val = div_u64(sum, i); 41 + } 42 + 43 + void inv_icm42600_timestamp_init(struct inv_icm42600_timestamp *ts, 44 + uint32_t period) 45 + { 46 + /* initial odr for sensor after reset is 1kHz */ 47 + const uint32_t default_period = 1000000; 48 + 49 + /* current multiplier and period values after reset */ 50 + ts->mult = default_period / INV_ICM42600_TIMESTAMP_PERIOD; 51 + ts->period = default_period; 52 + /* new set multiplier is the one from chip initialization */ 53 + ts->new_mult = period / INV_ICM42600_TIMESTAMP_PERIOD; 54 + 55 + /* use theoretical value for chip period */ 56 + inv_update_acc(&ts->chip_period, INV_ICM42600_TIMESTAMP_PERIOD); 57 + } 58 + 59 + int inv_icm42600_timestamp_setup(struct inv_icm42600_state *st) 60 + { 61 + unsigned int val; 62 + 63 + /* enable timestamp register */ 64 + val = INV_ICM42600_TMST_CONFIG_TMST_TO_REGS_EN | 65 + INV_ICM42600_TMST_CONFIG_TMST_EN; 66 + return regmap_update_bits(st->map, INV_ICM42600_REG_TMST_CONFIG, 67 + INV_ICM42600_TMST_CONFIG_MASK, val); 68 + } 69 + 70 + int inv_icm42600_timestamp_update_odr(struct inv_icm42600_timestamp *ts, 71 + uint32_t period, bool fifo) 72 + { 73 + /* when FIFO is on, prevent odr change if one is already pending */ 74 + if (fifo && ts->new_mult != 0) 75 + return -EAGAIN; 76 + 77 + ts->new_mult = period / INV_ICM42600_TIMESTAMP_PERIOD; 78 + 79 + return 0; 80 + } 81 + 82 + static bool inv_validate_period(uint32_t period, uint32_t mult) 83 + { 84 + const uint32_t chip_period = INV_ICM42600_TIMESTAMP_PERIOD; 85 + uint32_t period_min, period_max; 86 + 87 + /* check that period is acceptable */ 88 + period_min = INV_ICM42600_TIMESTAMP_MIN_PERIOD(chip_period) * mult; 89 + period_max = INV_ICM42600_TIMESTAMP_MAX_PERIOD(chip_period) * mult; 90 + if (period > period_min && period < period_max) 91 + return true; 92 + else 93 + return false; 94 + } 95 + 96 + static bool inv_compute_chip_period(struct inv_icm42600_timestamp *ts, 97 + uint32_t mult, uint32_t period) 98 + { 99 + uint32_t new_chip_period; 100 + 101 + if (!inv_validate_period(period, mult)) 102 + return false; 103 + 104 + /* update chip internal period estimation */ 105 + new_chip_period = period / mult; 106 + inv_update_acc(&ts->chip_period, new_chip_period); 107 + 108 + return true; 109 + } 110 + 111 + void inv_icm42600_timestamp_interrupt(struct inv_icm42600_timestamp *ts, 112 + uint32_t fifo_period, size_t fifo_nb, 113 + size_t sensor_nb, int64_t timestamp) 114 + { 115 + struct inv_icm42600_timestamp_interval *it; 116 + int64_t delta, interval; 117 + const uint32_t fifo_mult = fifo_period / INV_ICM42600_TIMESTAMP_PERIOD; 118 + uint32_t period = ts->period; 119 + int32_t m; 120 + bool valid = false; 121 + 122 + if (fifo_nb == 0) 123 + return; 124 + 125 + /* update interrupt timestamp and compute chip and sensor periods */ 126 + it = &ts->it; 127 + it->lo = it->up; 128 + it->up = timestamp; 129 + delta = it->up - it->lo; 130 + if (it->lo != 0) { 131 + /* compute period: delta time divided by number of samples */ 132 + period = div_s64(delta, fifo_nb); 133 + valid = inv_compute_chip_period(ts, fifo_mult, period); 134 + /* update sensor period if chip internal period is updated */ 135 + if (valid) 136 + ts->period = ts->mult * ts->chip_period.val; 137 + } 138 + 139 + /* no previous data, compute theoritical value from interrupt */ 140 + if (ts->timestamp == 0) { 141 + /* elapsed time: sensor period * sensor samples number */ 142 + interval = (int64_t)ts->period * (int64_t)sensor_nb; 143 + ts->timestamp = it->up - interval; 144 + return; 145 + } 146 + 147 + /* if interrupt interval is valid, sync with interrupt timestamp */ 148 + if (valid) { 149 + /* compute measured fifo_period */ 150 + fifo_period = fifo_mult * ts->chip_period.val; 151 + /* delta time between last sample and last interrupt */ 152 + delta = it->lo - ts->timestamp; 153 + /* if there are multiple samples, go back to first one */ 154 + while (delta >= (fifo_period * 3 / 2)) 155 + delta -= fifo_period; 156 + /* compute maximal adjustment value */ 157 + m = INV_ICM42600_TIMESTAMP_MAX_PERIOD(ts->period) - ts->period; 158 + if (delta > m) 159 + delta = m; 160 + else if (delta < -m) 161 + delta = -m; 162 + ts->timestamp += delta; 163 + } 164 + } 165 + 166 + void inv_icm42600_timestamp_apply_odr(struct inv_icm42600_timestamp *ts, 167 + uint32_t fifo_period, size_t fifo_nb, 168 + unsigned int fifo_no) 169 + { 170 + int64_t interval; 171 + uint32_t fifo_mult; 172 + 173 + if (ts->new_mult == 0) 174 + return; 175 + 176 + /* update to new multiplier and update period */ 177 + ts->mult = ts->new_mult; 178 + ts->new_mult = 0; 179 + ts->period = ts->mult * ts->chip_period.val; 180 + 181 + /* 182 + * After ODR change the time interval with the previous sample is 183 + * undertermined (depends when the change occures). So we compute the 184 + * timestamp from the current interrupt using the new FIFO period, the 185 + * total number of samples and the current sample numero. 186 + */ 187 + if (ts->timestamp != 0) { 188 + /* compute measured fifo period */ 189 + fifo_mult = fifo_period / INV_ICM42600_TIMESTAMP_PERIOD; 190 + fifo_period = fifo_mult * ts->chip_period.val; 191 + /* computes time interval between interrupt and this sample */ 192 + interval = (int64_t)(fifo_nb - fifo_no) * (int64_t)fifo_period; 193 + ts->timestamp = ts->it.up - interval; 194 + } 195 + }
+85
drivers/iio/imu/inv_icm42600/inv_icm42600_timestamp.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 + /* 3 + * Copyright (C) 2020 Invensense, Inc. 4 + */ 5 + 6 + #ifndef INV_ICM42600_TIMESTAMP_H_ 7 + #define INV_ICM42600_TIMESTAMP_H_ 8 + 9 + #include <linux/kernel.h> 10 + 11 + struct inv_icm42600_state; 12 + 13 + /** 14 + * struct inv_icm42600_timestamp_interval - timestamps interval 15 + * @lo: interval lower bound 16 + * @up: interval upper bound 17 + */ 18 + struct inv_icm42600_timestamp_interval { 19 + int64_t lo; 20 + int64_t up; 21 + }; 22 + 23 + /** 24 + * struct inv_icm42600_timestamp_acc - accumulator for computing an estimation 25 + * @val: current estimation of the value, the mean of all values 26 + * @idx: current index of the next free place in values table 27 + * @values: table of all measured values, use for computing the mean 28 + */ 29 + struct inv_icm42600_timestamp_acc { 30 + uint32_t val; 31 + size_t idx; 32 + uint32_t values[32]; 33 + }; 34 + 35 + /** 36 + * struct inv_icm42600_timestamp - timestamp management states 37 + * @it: interrupts interval timestamps 38 + * @timestamp: store last timestamp for computing next data timestamp 39 + * @mult: current internal period multiplier 40 + * @new_mult: new set internal period multiplier (not yet effective) 41 + * @period: measured current period of the sensor 42 + * @chip_period: accumulator for computing internal chip period 43 + */ 44 + struct inv_icm42600_timestamp { 45 + struct inv_icm42600_timestamp_interval it; 46 + int64_t timestamp; 47 + uint32_t mult; 48 + uint32_t new_mult; 49 + uint32_t period; 50 + struct inv_icm42600_timestamp_acc chip_period; 51 + }; 52 + 53 + void inv_icm42600_timestamp_init(struct inv_icm42600_timestamp *ts, 54 + uint32_t period); 55 + 56 + int inv_icm42600_timestamp_setup(struct inv_icm42600_state *st); 57 + 58 + int inv_icm42600_timestamp_update_odr(struct inv_icm42600_timestamp *ts, 59 + uint32_t period, bool fifo); 60 + 61 + void inv_icm42600_timestamp_interrupt(struct inv_icm42600_timestamp *ts, 62 + uint32_t fifo_period, size_t fifo_nb, 63 + size_t sensor_nb, int64_t timestamp); 64 + 65 + static inline int64_t 66 + inv_icm42600_timestamp_pop(struct inv_icm42600_timestamp *ts) 67 + { 68 + ts->timestamp += ts->period; 69 + return ts->timestamp; 70 + } 71 + 72 + void inv_icm42600_timestamp_apply_odr(struct inv_icm42600_timestamp *ts, 73 + uint32_t fifo_period, size_t fifo_nb, 74 + unsigned int fifo_no); 75 + 76 + static inline void 77 + inv_icm42600_timestamp_reset(struct inv_icm42600_timestamp *ts) 78 + { 79 + const struct inv_icm42600_timestamp_interval interval_init = {0LL, 0LL}; 80 + 81 + ts->it = interval_init; 82 + ts->timestamp = 0; 83 + } 84 + 85 + #endif
+1 -5
drivers/iio/imu/inv_mpu6050/inv_mpu_acpi.c
··· 101 101 unsigned short *primary_addr, 102 102 unsigned short *secondary_addr) 103 103 { 104 + struct acpi_device *adev = ACPI_COMPANION(&client->dev); 104 105 const struct acpi_device_id *id; 105 - struct acpi_device *adev; 106 106 u32 i2c_addr = 0; 107 107 LIST_HEAD(resources); 108 108 int ret; ··· 110 110 id = acpi_match_device(client->dev.driver->acpi_match_table, 111 111 &client->dev); 112 112 if (!id) 113 - return -ENODEV; 114 - 115 - adev = ACPI_COMPANION(&client->dev); 116 - if (!adev) 117 113 return -ENODEV; 118 114 119 115 ret = acpi_dev_get_resources(adev, &resources,
-1
drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
··· 1530 1530 } 1531 1531 1532 1532 dev_set_drvdata(dev, indio_dev); 1533 - indio_dev->dev.parent = dev; 1534 1533 /* name will be NULL when enumerated via ACPI */ 1535 1534 if (name) 1536 1535 indio_dev->name = name;
-1
drivers/iio/imu/kmx61.c
··· 1248 1248 1249 1249 kmx61_set_data(indio_dev, data); 1250 1250 1251 - indio_dev->dev.parent = &data->client->dev; 1252 1251 indio_dev->channels = chan; 1253 1252 indio_dev->num_channels = num_channels; 1254 1253 indio_dev->name = name;
-1
drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
··· 2152 2152 return NULL; 2153 2153 2154 2154 iio_dev->modes = INDIO_DIRECT_MODE; 2155 - iio_dev->dev.parent = hw->dev; 2156 2155 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks; 2157 2156 iio_dev->channels = hw->settings->channels[id].chan; 2158 2157 iio_dev->num_channels = hw->settings->channels[id].len;
-1
drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_shub.c
··· 735 735 return NULL; 736 736 737 737 iio_dev->modes = INDIO_DIRECT_MODE; 738 - iio_dev->dev.parent = hw->dev; 739 738 iio_dev->info = &st_lsm6dsx_ext_info; 740 739 741 740 sensor = iio_priv(iio_dev);
+43 -15
drivers/iio/industrialio-buffer.c
··· 19 19 #include <linux/sched/signal.h> 20 20 21 21 #include <linux/iio/iio.h> 22 + #include <linux/iio/iio-opaque.h> 22 23 #include "iio_core.h" 24 + #include "iio_core_trigger.h" 23 25 #include <linux/iio/sysfs.h> 24 26 #include <linux/iio/buffer.h> 25 27 #include <linux/iio/buffer_impl.h> ··· 600 598 static void iio_buffer_activate(struct iio_dev *indio_dev, 601 599 struct iio_buffer *buffer) 602 600 { 601 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 602 + 603 603 iio_buffer_get(buffer); 604 - list_add(&buffer->buffer_list, &indio_dev->buffer_list); 604 + list_add(&buffer->buffer_list, &iio_dev_opaque->buffer_list); 605 605 } 606 606 607 607 static void iio_buffer_deactivate(struct iio_buffer *buffer) ··· 615 611 616 612 static void iio_buffer_deactivate_all(struct iio_dev *indio_dev) 617 613 { 614 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 618 615 struct iio_buffer *buffer, *_buffer; 619 616 620 617 list_for_each_entry_safe(buffer, _buffer, 621 - &indio_dev->buffer_list, buffer_list) 618 + &iio_dev_opaque->buffer_list, buffer_list) 622 619 iio_buffer_deactivate(buffer); 623 620 } 624 621 ··· 692 687 struct iio_buffer *insert_buffer, struct iio_buffer *remove_buffer, 693 688 struct iio_device_config *config) 694 689 { 690 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 695 691 unsigned long *compound_mask; 696 692 const unsigned long *scan_mask; 697 693 bool strict_scanmask = false; ··· 715 709 * to verify. 716 710 */ 717 711 if (remove_buffer && !insert_buffer && 718 - list_is_singular(&indio_dev->buffer_list)) 712 + list_is_singular(&iio_dev_opaque->buffer_list)) 719 713 return 0; 720 714 721 715 modes = indio_dev->modes; 722 716 723 - list_for_each_entry(buffer, &indio_dev->buffer_list, buffer_list) { 717 + list_for_each_entry(buffer, &iio_dev_opaque->buffer_list, buffer_list) { 724 718 if (buffer == remove_buffer) 725 719 continue; 726 720 modes &= buffer->access->modes; ··· 741 735 * Keep things simple for now and only allow a single buffer to 742 736 * be connected in hardware mode. 743 737 */ 744 - if (insert_buffer && !list_empty(&indio_dev->buffer_list)) 738 + if (insert_buffer && !list_empty(&iio_dev_opaque->buffer_list)) 745 739 return -EINVAL; 746 740 config->mode = INDIO_BUFFER_HARDWARE; 747 741 strict_scanmask = true; ··· 761 755 762 756 scan_timestamp = false; 763 757 764 - list_for_each_entry(buffer, &indio_dev->buffer_list, buffer_list) { 758 + list_for_each_entry(buffer, &iio_dev_opaque->buffer_list, buffer_list) { 765 759 if (buffer == remove_buffer) 766 760 continue; 767 761 bitmap_or(compound_mask, compound_mask, buffer->scan_mask, ··· 907 901 908 902 static int iio_update_demux(struct iio_dev *indio_dev) 909 903 { 904 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 910 905 struct iio_buffer *buffer; 911 906 int ret; 912 907 913 - list_for_each_entry(buffer, &indio_dev->buffer_list, buffer_list) { 908 + list_for_each_entry(buffer, &iio_dev_opaque->buffer_list, buffer_list) { 914 909 ret = iio_buffer_update_demux(indio_dev, buffer); 915 910 if (ret < 0) 916 911 goto error_clear_mux_table; ··· 919 912 return 0; 920 913 921 914 error_clear_mux_table: 922 - list_for_each_entry(buffer, &indio_dev->buffer_list, buffer_list) 915 + list_for_each_entry(buffer, &iio_dev_opaque->buffer_list, buffer_list) 923 916 iio_buffer_demux_free(buffer); 924 917 925 918 return ret; ··· 928 921 static int iio_enable_buffers(struct iio_dev *indio_dev, 929 922 struct iio_device_config *config) 930 923 { 924 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 931 925 struct iio_buffer *buffer; 932 926 int ret; 933 927 ··· 965 957 indio_dev->info->hwfifo_set_watermark(indio_dev, 966 958 config->watermark); 967 959 968 - list_for_each_entry(buffer, &indio_dev->buffer_list, buffer_list) { 960 + list_for_each_entry(buffer, &iio_dev_opaque->buffer_list, buffer_list) { 969 961 ret = iio_buffer_enable(buffer, indio_dev); 962 + if (ret) 963 + goto err_disable_buffers; 964 + } 965 + 966 + if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) { 967 + ret = iio_trigger_attach_poll_func(indio_dev->trig, 968 + indio_dev->pollfunc); 970 969 if (ret) 971 970 goto err_disable_buffers; 972 971 } ··· 983 968 if (ret) { 984 969 dev_dbg(&indio_dev->dev, 985 970 "Buffer not started: postenable failed (%d)\n", ret); 986 - goto err_disable_buffers; 971 + goto err_detach_pollfunc; 987 972 } 988 973 } 989 974 990 975 return 0; 991 976 977 + err_detach_pollfunc: 978 + if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) { 979 + iio_trigger_detach_poll_func(indio_dev->trig, 980 + indio_dev->pollfunc); 981 + } 992 982 err_disable_buffers: 993 - list_for_each_entry_continue_reverse(buffer, &indio_dev->buffer_list, 983 + list_for_each_entry_continue_reverse(buffer, &iio_dev_opaque->buffer_list, 994 984 buffer_list) 995 985 iio_buffer_disable(buffer, indio_dev); 996 986 err_run_postdisable: ··· 1010 990 1011 991 static int iio_disable_buffers(struct iio_dev *indio_dev) 1012 992 { 993 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 1013 994 struct iio_buffer *buffer; 1014 995 int ret = 0; 1015 996 int ret2; 1016 997 1017 998 /* Wind down existing buffers - iff there are any */ 1018 - if (list_empty(&indio_dev->buffer_list)) 999 + if (list_empty(&iio_dev_opaque->buffer_list)) 1019 1000 return 0; 1020 1001 1021 1002 /* ··· 1032 1011 ret = ret2; 1033 1012 } 1034 1013 1035 - list_for_each_entry(buffer, &indio_dev->buffer_list, buffer_list) { 1014 + if (indio_dev->currentmode == INDIO_BUFFER_TRIGGERED) { 1015 + iio_trigger_detach_poll_func(indio_dev->trig, 1016 + indio_dev->pollfunc); 1017 + } 1018 + 1019 + list_for_each_entry(buffer, &iio_dev_opaque->buffer_list, buffer_list) { 1036 1020 ret2 = iio_buffer_disable(buffer, indio_dev); 1037 1021 if (ret2 && !ret) 1038 1022 ret = ret2; ··· 1060 1034 struct iio_buffer *insert_buffer, 1061 1035 struct iio_buffer *remove_buffer) 1062 1036 { 1037 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 1063 1038 struct iio_device_config new_config; 1064 1039 int ret; 1065 1040 ··· 1085 1058 iio_buffer_activate(indio_dev, insert_buffer); 1086 1059 1087 1060 /* If no buffers in list, we are done */ 1088 - if (list_empty(&indio_dev->buffer_list)) 1061 + if (list_empty(&iio_dev_opaque->buffer_list)) 1089 1062 return 0; 1090 1063 1091 1064 ret = iio_enable_buffers(indio_dev, &new_config); ··· 1434 1407 */ 1435 1408 int iio_push_to_buffers(struct iio_dev *indio_dev, const void *data) 1436 1409 { 1410 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 1437 1411 int ret; 1438 1412 struct iio_buffer *buf; 1439 1413 1440 - list_for_each_entry(buf, &indio_dev->buffer_list, buffer_list) { 1414 + list_for_each_entry(buf, &iio_dev_opaque->buffer_list, buffer_list) { 1441 1415 ret = iio_push_to_buffer(buf, data); 1442 1416 if (ret < 0) 1443 1417 return ret;
+81 -48
drivers/iio/industrialio-core.c
··· 25 25 #include <linux/debugfs.h> 26 26 #include <linux/mutex.h> 27 27 #include <linux/iio/iio.h> 28 + #include <linux/iio/iio-opaque.h> 28 29 #include "iio_core.h" 29 30 #include "iio_core_trigger.h" 30 31 #include <linux/iio/sysfs.h> ··· 165 164 [IIO_CHAN_INFO_THERMOCOUPLE_TYPE] = "thermocouple_type", 166 165 }; 167 166 167 + #if defined(CONFIG_DEBUG_FS) 168 + /** 169 + * There's also a CONFIG_DEBUG_FS guard in include/linux/iio/iio.h for 170 + * iio_get_debugfs_dentry() to make it inline if CONFIG_DEBUG_FS is undefined 171 + */ 172 + struct dentry *iio_get_debugfs_dentry(struct iio_dev *indio_dev) 173 + { 174 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 175 + return iio_dev_opaque->debugfs_dentry; 176 + } 177 + EXPORT_SYMBOL_GPL(iio_get_debugfs_dentry); 178 + #endif 179 + 168 180 /** 169 181 * iio_find_channel_from_si() - get channel from its scan index 170 182 * @indio_dev: device ··· 211 197 int iio_device_set_clock(struct iio_dev *indio_dev, clockid_t clock_id) 212 198 { 213 199 int ret; 214 - const struct iio_event_interface *ev_int = indio_dev->event_interface; 200 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 201 + const struct iio_event_interface *ev_int = iio_dev_opaque->event_interface; 215 202 216 203 ret = mutex_lock_interruptible(&indio_dev->mlock); 217 204 if (ret) ··· 322 307 size_t count, loff_t *ppos) 323 308 { 324 309 struct iio_dev *indio_dev = file->private_data; 310 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 325 311 unsigned val = 0; 326 312 int ret; 327 313 328 314 if (*ppos > 0) 329 315 return simple_read_from_buffer(userbuf, count, ppos, 330 - indio_dev->read_buf, 331 - indio_dev->read_buf_len); 316 + iio_dev_opaque->read_buf, 317 + iio_dev_opaque->read_buf_len); 332 318 333 319 ret = indio_dev->info->debugfs_reg_access(indio_dev, 334 - indio_dev->cached_reg_addr, 320 + iio_dev_opaque->cached_reg_addr, 335 321 0, &val); 336 322 if (ret) { 337 323 dev_err(indio_dev->dev.parent, "%s: read failed\n", __func__); 338 324 return ret; 339 325 } 340 326 341 - indio_dev->read_buf_len = snprintf(indio_dev->read_buf, 342 - sizeof(indio_dev->read_buf), 343 - "0x%X\n", val); 327 + iio_dev_opaque->read_buf_len = snprintf(iio_dev_opaque->read_buf, 328 + sizeof(iio_dev_opaque->read_buf), 329 + "0x%X\n", val); 344 330 345 331 return simple_read_from_buffer(userbuf, count, ppos, 346 - indio_dev->read_buf, 347 - indio_dev->read_buf_len); 332 + iio_dev_opaque->read_buf, 333 + iio_dev_opaque->read_buf_len); 348 334 } 349 335 350 336 static ssize_t iio_debugfs_write_reg(struct file *file, 351 337 const char __user *userbuf, size_t count, loff_t *ppos) 352 338 { 353 339 struct iio_dev *indio_dev = file->private_data; 340 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 354 341 unsigned reg, val; 355 342 char buf[80]; 356 343 int ret; ··· 367 350 368 351 switch (ret) { 369 352 case 1: 370 - indio_dev->cached_reg_addr = reg; 353 + iio_dev_opaque->cached_reg_addr = reg; 371 354 break; 372 355 case 2: 373 - indio_dev->cached_reg_addr = reg; 356 + iio_dev_opaque->cached_reg_addr = reg; 374 357 ret = indio_dev->info->debugfs_reg_access(indio_dev, reg, 375 358 val, NULL); 376 359 if (ret) { ··· 394 377 395 378 static void iio_device_unregister_debugfs(struct iio_dev *indio_dev) 396 379 { 397 - debugfs_remove_recursive(indio_dev->debugfs_dentry); 380 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 381 + debugfs_remove_recursive(iio_dev_opaque->debugfs_dentry); 398 382 } 399 383 400 384 static void iio_device_register_debugfs(struct iio_dev *indio_dev) 401 385 { 386 + struct iio_dev_opaque *iio_dev_opaque; 387 + 402 388 if (indio_dev->info->debugfs_reg_access == NULL) 403 389 return; 404 390 405 391 if (!iio_debugfs_dentry) 406 392 return; 407 393 408 - indio_dev->debugfs_dentry = 394 + iio_dev_opaque = to_iio_dev_opaque(indio_dev); 395 + 396 + iio_dev_opaque->debugfs_dentry = 409 397 debugfs_create_dir(dev_name(&indio_dev->dev), 410 398 iio_debugfs_dentry); 411 399 412 400 debugfs_create_file("direct_reg_access", 0644, 413 - indio_dev->debugfs_dentry, indio_dev, 401 + iio_dev_opaque->debugfs_dentry, indio_dev, 414 402 &iio_debugfs_reg_fops); 415 403 } 416 404 #else ··· 1138 1116 enum iio_shared_by shared_by, 1139 1117 const long *infomask) 1140 1118 { 1119 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 1141 1120 int i, ret, attrcount = 0; 1142 1121 1143 1122 for_each_set_bit(i, infomask, sizeof(*infomask)*8) { ··· 1151 1128 i, 1152 1129 shared_by, 1153 1130 &indio_dev->dev, 1154 - &indio_dev->channel_attr_list); 1131 + &iio_dev_opaque->channel_attr_list); 1155 1132 if ((ret == -EBUSY) && (shared_by != IIO_SEPARATE)) 1156 1133 continue; 1157 1134 else if (ret < 0) ··· 1167 1144 enum iio_shared_by shared_by, 1168 1145 const long *infomask) 1169 1146 { 1147 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 1170 1148 int i, ret, attrcount = 0; 1171 1149 char *avail_postfix; 1172 1150 ··· 1187 1163 i, 1188 1164 shared_by, 1189 1165 &indio_dev->dev, 1190 - &indio_dev->channel_attr_list); 1166 + &iio_dev_opaque->channel_attr_list); 1191 1167 kfree(avail_postfix); 1192 1168 if ((ret == -EBUSY) && (shared_by != IIO_SEPARATE)) 1193 1169 continue; ··· 1202 1178 static int iio_device_add_channel_sysfs(struct iio_dev *indio_dev, 1203 1179 struct iio_chan_spec const *chan) 1204 1180 { 1181 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 1205 1182 int ret, attrcount = 0; 1206 1183 const struct iio_chan_spec_ext_info *ext_info; 1207 1184 ··· 1278 1253 i, 1279 1254 ext_info->shared, 1280 1255 &indio_dev->dev, 1281 - &indio_dev->channel_attr_list); 1256 + &iio_dev_opaque->channel_attr_list); 1282 1257 i++; 1283 1258 if (ret == -EBUSY && ext_info->shared) 1284 1259 continue; ··· 1413 1388 1414 1389 static int iio_device_register_sysfs(struct iio_dev *indio_dev) 1415 1390 { 1391 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 1416 1392 int i, ret = 0, attrcount, attrn, attrcount_orig = 0; 1417 1393 struct iio_dev_attr *p; 1418 1394 struct attribute **attr, *clk = NULL; ··· 1443 1417 attrcount += ret; 1444 1418 } 1445 1419 1446 - if (indio_dev->event_interface) 1420 + if (iio_dev_opaque->event_interface) 1447 1421 clk = &dev_attr_current_timestamp_clock.attr; 1448 1422 1449 1423 if (indio_dev->name) ··· 1453 1427 if (clk) 1454 1428 attrcount++; 1455 1429 1456 - indio_dev->chan_attr_group.attrs = kcalloc(attrcount + 1, 1457 - sizeof(indio_dev->chan_attr_group.attrs[0]), 1458 - GFP_KERNEL); 1459 - if (indio_dev->chan_attr_group.attrs == NULL) { 1430 + iio_dev_opaque->chan_attr_group.attrs = 1431 + kcalloc(attrcount + 1, 1432 + sizeof(iio_dev_opaque->chan_attr_group.attrs[0]), 1433 + GFP_KERNEL); 1434 + if (iio_dev_opaque->chan_attr_group.attrs == NULL) { 1460 1435 ret = -ENOMEM; 1461 1436 goto error_clear_attrs; 1462 1437 } 1463 1438 /* Copy across original attributes */ 1464 1439 if (indio_dev->info->attrs) 1465 - memcpy(indio_dev->chan_attr_group.attrs, 1440 + memcpy(iio_dev_opaque->chan_attr_group.attrs, 1466 1441 indio_dev->info->attrs->attrs, 1467 - sizeof(indio_dev->chan_attr_group.attrs[0]) 1442 + sizeof(iio_dev_opaque->chan_attr_group.attrs[0]) 1468 1443 *attrcount_orig); 1469 1444 attrn = attrcount_orig; 1470 1445 /* Add all elements from the list. */ 1471 - list_for_each_entry(p, &indio_dev->channel_attr_list, l) 1472 - indio_dev->chan_attr_group.attrs[attrn++] = &p->dev_attr.attr; 1446 + list_for_each_entry(p, &iio_dev_opaque->channel_attr_list, l) 1447 + iio_dev_opaque->chan_attr_group.attrs[attrn++] = &p->dev_attr.attr; 1473 1448 if (indio_dev->name) 1474 - indio_dev->chan_attr_group.attrs[attrn++] = &dev_attr_name.attr; 1449 + iio_dev_opaque->chan_attr_group.attrs[attrn++] = &dev_attr_name.attr; 1475 1450 if (indio_dev->label) 1476 - indio_dev->chan_attr_group.attrs[attrn++] = &dev_attr_label.attr; 1451 + iio_dev_opaque->chan_attr_group.attrs[attrn++] = &dev_attr_label.attr; 1477 1452 if (clk) 1478 - indio_dev->chan_attr_group.attrs[attrn++] = clk; 1453 + iio_dev_opaque->chan_attr_group.attrs[attrn++] = clk; 1479 1454 1480 1455 indio_dev->groups[indio_dev->groupcounter++] = 1481 - &indio_dev->chan_attr_group; 1456 + &iio_dev_opaque->chan_attr_group; 1482 1457 1483 1458 return 0; 1484 1459 1485 1460 error_clear_attrs: 1486 - iio_free_chan_devattr_list(&indio_dev->channel_attr_list); 1461 + iio_free_chan_devattr_list(&iio_dev_opaque->channel_attr_list); 1487 1462 1488 1463 return ret; 1489 1464 } 1490 1465 1491 1466 static void iio_device_unregister_sysfs(struct iio_dev *indio_dev) 1492 1467 { 1468 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 1493 1469 1494 - iio_free_chan_devattr_list(&indio_dev->channel_attr_list); 1495 - kfree(indio_dev->chan_attr_group.attrs); 1496 - indio_dev->chan_attr_group.attrs = NULL; 1470 + iio_free_chan_devattr_list(&iio_dev_opaque->channel_attr_list); 1471 + kfree(iio_dev_opaque->chan_attr_group.attrs); 1472 + iio_dev_opaque->chan_attr_group.attrs = NULL; 1497 1473 } 1498 1474 1499 1475 static void iio_dev_release(struct device *device) 1500 1476 { 1501 1477 struct iio_dev *indio_dev = dev_to_iio_dev(device); 1478 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 1479 + 1502 1480 if (indio_dev->modes & INDIO_ALL_TRIGGERED_MODES) 1503 1481 iio_device_unregister_trigger_consumer(indio_dev); 1504 1482 iio_device_unregister_eventset(indio_dev); ··· 1511 1481 iio_buffer_put(indio_dev->buffer); 1512 1482 1513 1483 ida_simple_remove(&iio_ida, indio_dev->id); 1514 - kfree(indio_dev); 1484 + kfree(iio_dev_opaque); 1515 1485 } 1516 1486 1517 1487 struct device_type iio_device_type = { ··· 1523 1493 * iio_device_alloc() - allocate an iio_dev from a driver 1524 1494 * @sizeof_priv: Space to allocate for private structure. 1525 1495 **/ 1526 - struct iio_dev *iio_device_alloc(int sizeof_priv) 1496 + struct iio_dev *iio_device_alloc(struct device *parent, int sizeof_priv) 1527 1497 { 1498 + struct iio_dev_opaque *iio_dev_opaque; 1528 1499 struct iio_dev *dev; 1529 1500 size_t alloc_size; 1530 1501 1531 - alloc_size = sizeof(struct iio_dev); 1502 + alloc_size = sizeof(struct iio_dev_opaque); 1532 1503 if (sizeof_priv) { 1533 1504 alloc_size = ALIGN(alloc_size, IIO_ALIGN); 1534 1505 alloc_size += sizeof_priv; 1535 1506 } 1536 - /* ensure 32-byte alignment of whole construct ? */ 1537 - alloc_size += IIO_ALIGN - 1; 1538 1507 1539 - dev = kzalloc(alloc_size, GFP_KERNEL); 1540 - if (!dev) 1508 + iio_dev_opaque = kzalloc(alloc_size, GFP_KERNEL); 1509 + if (!iio_dev_opaque) 1541 1510 return NULL; 1511 + 1512 + dev = &iio_dev_opaque->indio_dev; 1513 + dev->priv = (char *)iio_dev_opaque + 1514 + ALIGN(sizeof(struct iio_dev_opaque), IIO_ALIGN); 1542 1515 1543 1516 dev->dev.groups = dev->groups; 1544 1517 dev->dev.type = &iio_device_type; ··· 1550 1517 dev_set_drvdata(&dev->dev, (void *)dev); 1551 1518 mutex_init(&dev->mlock); 1552 1519 mutex_init(&dev->info_exist_lock); 1553 - INIT_LIST_HEAD(&dev->channel_attr_list); 1520 + INIT_LIST_HEAD(&iio_dev_opaque->channel_attr_list); 1554 1521 1555 1522 dev->id = ida_simple_get(&iio_ida, 0, 0, GFP_KERNEL); 1556 1523 if (dev->id < 0) { 1557 1524 /* cannot use a dev_err as the name isn't available */ 1558 1525 pr_err("failed to get device id\n"); 1559 - kfree(dev); 1526 + kfree(iio_dev_opaque); 1560 1527 return NULL; 1561 1528 } 1562 1529 dev_set_name(&dev->dev, "iio:device%d", dev->id); 1563 - INIT_LIST_HEAD(&dev->buffer_list); 1530 + INIT_LIST_HEAD(&iio_dev_opaque->buffer_list); 1564 1531 1565 1532 return dev; 1566 1533 } ··· 1584 1551 1585 1552 /** 1586 1553 * devm_iio_device_alloc - Resource-managed iio_device_alloc() 1587 - * @dev: Device to allocate iio_dev for 1554 + * @parent: Device to allocate iio_dev for, and parent for this IIO device 1588 1555 * @sizeof_priv: Space to allocate for private structure. 1589 1556 * 1590 1557 * Managed iio_device_alloc. iio_dev allocated with this function is ··· 1593 1560 * RETURNS: 1594 1561 * Pointer to allocated iio_dev on success, NULL on failure. 1595 1562 */ 1596 - struct iio_dev *devm_iio_device_alloc(struct device *dev, int sizeof_priv) 1563 + struct iio_dev *devm_iio_device_alloc(struct device *parent, int sizeof_priv) 1597 1564 { 1598 1565 struct iio_dev **ptr, *iio_dev; 1599 1566 ··· 1602 1569 if (!ptr) 1603 1570 return NULL; 1604 1571 1605 - iio_dev = iio_device_alloc(sizeof_priv); 1572 + iio_dev = iio_device_alloc(parent, sizeof_priv); 1606 1573 if (iio_dev) { 1607 1574 *ptr = iio_dev; 1608 - devres_add(dev, ptr); 1575 + devres_add(parent, ptr); 1609 1576 } else { 1610 1577 devres_free(ptr); 1611 1578 }
+40 -28
drivers/iio/industrialio-event.c
··· 18 18 #include <linux/uaccess.h> 19 19 #include <linux/wait.h> 20 20 #include <linux/iio/iio.h> 21 + #include <linux/iio/iio-opaque.h> 21 22 #include "iio_core.h" 22 23 #include <linux/iio/sysfs.h> 23 24 #include <linux/iio/events.h> ··· 63 62 **/ 64 63 int iio_push_event(struct iio_dev *indio_dev, u64 ev_code, s64 timestamp) 65 64 { 66 - struct iio_event_interface *ev_int = indio_dev->event_interface; 65 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 66 + struct iio_event_interface *ev_int = iio_dev_opaque->event_interface; 67 67 struct iio_event_data ev; 68 68 int copied; 69 69 ··· 98 96 struct poll_table_struct *wait) 99 97 { 100 98 struct iio_dev *indio_dev = filep->private_data; 101 - struct iio_event_interface *ev_int = indio_dev->event_interface; 99 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 100 + struct iio_event_interface *ev_int = iio_dev_opaque->event_interface; 102 101 __poll_t events = 0; 103 102 104 103 if (!indio_dev->info) ··· 119 116 loff_t *f_ps) 120 117 { 121 118 struct iio_dev *indio_dev = filep->private_data; 122 - struct iio_event_interface *ev_int = indio_dev->event_interface; 119 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 120 + struct iio_event_interface *ev_int = iio_dev_opaque->event_interface; 123 121 unsigned int copied; 124 122 int ret; 125 123 ··· 169 165 static int iio_event_chrdev_release(struct inode *inode, struct file *filep) 170 166 { 171 167 struct iio_dev *indio_dev = filep->private_data; 172 - struct iio_event_interface *ev_int = indio_dev->event_interface; 168 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 169 + struct iio_event_interface *ev_int = iio_dev_opaque->event_interface; 173 170 174 171 clear_bit(IIO_BUSY_BIT_POS, &ev_int->flags); 175 172 ··· 189 184 190 185 int iio_event_getfd(struct iio_dev *indio_dev) 191 186 { 192 - struct iio_event_interface *ev_int = indio_dev->event_interface; 187 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 188 + struct iio_event_interface *ev_int = iio_dev_opaque->event_interface; 193 189 int fd; 194 190 195 191 if (ev_int == NULL) ··· 349 343 enum iio_event_type type, enum iio_event_direction dir, 350 344 enum iio_shared_by shared_by, const unsigned long *mask) 351 345 { 346 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 352 347 ssize_t (*show)(struct device *, struct device_attribute *, char *); 353 348 ssize_t (*store)(struct device *, struct device_attribute *, 354 349 const char *, size_t); ··· 383 376 384 377 ret = __iio_add_chan_devattr(postfix, chan, show, store, 385 378 (i << 16) | spec_index, shared_by, &indio_dev->dev, 386 - &indio_dev->event_interface->dev_attr_list); 379 + &iio_dev_opaque->event_interface->dev_attr_list); 387 380 kfree(postfix); 388 381 389 382 if ((ret == -EBUSY) && (shared_by != IIO_SEPARATE)) ··· 476 469 static const char *iio_event_group_name = "events"; 477 470 int iio_device_register_eventset(struct iio_dev *indio_dev) 478 471 { 472 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 479 473 struct iio_dev_attr *p; 480 474 int ret = 0, attrcount_orig = 0, attrcount, attrn; 481 475 struct attribute **attr; ··· 485 477 iio_check_for_dynamic_events(indio_dev))) 486 478 return 0; 487 479 488 - indio_dev->event_interface = 480 + iio_dev_opaque->event_interface = 489 481 kzalloc(sizeof(struct iio_event_interface), GFP_KERNEL); 490 - if (indio_dev->event_interface == NULL) 482 + if (iio_dev_opaque->event_interface == NULL) 491 483 return -ENOMEM; 492 484 493 - INIT_LIST_HEAD(&indio_dev->event_interface->dev_attr_list); 485 + INIT_LIST_HEAD(&iio_dev_opaque->event_interface->dev_attr_list); 494 486 495 - iio_setup_ev_int(indio_dev->event_interface); 487 + iio_setup_ev_int(iio_dev_opaque->event_interface); 496 488 if (indio_dev->info->event_attrs != NULL) { 497 489 attr = indio_dev->info->event_attrs->attrs; 498 490 while (*attr++ != NULL) ··· 506 498 attrcount += ret; 507 499 } 508 500 509 - indio_dev->event_interface->group.name = iio_event_group_name; 510 - indio_dev->event_interface->group.attrs = kcalloc(attrcount + 1, 511 - sizeof(indio_dev->event_interface->group.attrs[0]), 501 + iio_dev_opaque->event_interface->group.name = iio_event_group_name; 502 + iio_dev_opaque->event_interface->group.attrs = kcalloc(attrcount + 1, 503 + sizeof(iio_dev_opaque->event_interface->group.attrs[0]), 512 504 GFP_KERNEL); 513 - if (indio_dev->event_interface->group.attrs == NULL) { 505 + if (iio_dev_opaque->event_interface->group.attrs == NULL) { 514 506 ret = -ENOMEM; 515 507 goto error_free_setup_event_lines; 516 508 } 517 509 if (indio_dev->info->event_attrs) 518 - memcpy(indio_dev->event_interface->group.attrs, 510 + memcpy(iio_dev_opaque->event_interface->group.attrs, 519 511 indio_dev->info->event_attrs->attrs, 520 - sizeof(indio_dev->event_interface->group.attrs[0]) 512 + sizeof(iio_dev_opaque->event_interface->group.attrs[0]) 521 513 *attrcount_orig); 522 514 attrn = attrcount_orig; 523 515 /* Add all elements from the list. */ 524 516 list_for_each_entry(p, 525 - &indio_dev->event_interface->dev_attr_list, 517 + &iio_dev_opaque->event_interface->dev_attr_list, 526 518 l) 527 - indio_dev->event_interface->group.attrs[attrn++] = 519 + iio_dev_opaque->event_interface->group.attrs[attrn++] = 528 520 &p->dev_attr.attr; 529 521 indio_dev->groups[indio_dev->groupcounter++] = 530 - &indio_dev->event_interface->group; 522 + &iio_dev_opaque->event_interface->group; 531 523 532 524 return 0; 533 525 534 526 error_free_setup_event_lines: 535 - iio_free_chan_devattr_list(&indio_dev->event_interface->dev_attr_list); 536 - kfree(indio_dev->event_interface); 537 - indio_dev->event_interface = NULL; 527 + iio_free_chan_devattr_list(&iio_dev_opaque->event_interface->dev_attr_list); 528 + kfree(iio_dev_opaque->event_interface); 529 + iio_dev_opaque->event_interface = NULL; 538 530 return ret; 539 531 } 540 532 ··· 547 539 */ 548 540 void iio_device_wakeup_eventset(struct iio_dev *indio_dev) 549 541 { 550 - if (indio_dev->event_interface == NULL) 542 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 543 + 544 + if (iio_dev_opaque->event_interface == NULL) 551 545 return; 552 - wake_up(&indio_dev->event_interface->wait); 546 + wake_up(&iio_dev_opaque->event_interface->wait); 553 547 } 554 548 555 549 void iio_device_unregister_eventset(struct iio_dev *indio_dev) 556 550 { 557 - if (indio_dev->event_interface == NULL) 551 + struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev); 552 + 553 + if (iio_dev_opaque->event_interface == NULL) 558 554 return; 559 - iio_free_chan_devattr_list(&indio_dev->event_interface->dev_attr_list); 560 - kfree(indio_dev->event_interface->group.attrs); 561 - kfree(indio_dev->event_interface); 555 + iio_free_chan_devattr_list(&iio_dev_opaque->event_interface->dev_attr_list); 556 + kfree(iio_dev_opaque->event_interface->group.attrs); 557 + kfree(iio_dev_opaque->event_interface); 562 558 }
+4 -18
drivers/iio/industrialio-trigger.c
··· 239 239 * the relevant function is in there may be the best option. 240 240 */ 241 241 /* Worth protecting against double additions? */ 242 - static int iio_trigger_attach_poll_func(struct iio_trigger *trig, 243 - struct iio_poll_func *pf) 242 + int iio_trigger_attach_poll_func(struct iio_trigger *trig, 243 + struct iio_poll_func *pf) 244 244 { 245 245 int ret = 0; 246 246 bool notinuse ··· 290 290 return ret; 291 291 } 292 292 293 - static int iio_trigger_detach_poll_func(struct iio_trigger *trig, 294 - struct iio_poll_func *pf) 293 + int iio_trigger_detach_poll_func(struct iio_trigger *trig, 294 + struct iio_poll_func *pf) 295 295 { 296 296 int ret = 0; 297 297 bool no_other_users ··· 705 705 if (indio_dev->trig) 706 706 iio_trigger_put(indio_dev->trig); 707 707 } 708 - 709 - int iio_triggered_buffer_postenable(struct iio_dev *indio_dev) 710 - { 711 - return iio_trigger_attach_poll_func(indio_dev->trig, 712 - indio_dev->pollfunc); 713 - } 714 - EXPORT_SYMBOL(iio_triggered_buffer_postenable); 715 - 716 - int iio_triggered_buffer_predisable(struct iio_dev *indio_dev) 717 - { 718 - return iio_trigger_detach_poll_func(indio_dev->trig, 719 - indio_dev->pollfunc); 720 - } 721 - EXPORT_SYMBOL(iio_triggered_buffer_predisable);
-1
drivers/iio/light/acpi-als.c
··· 178 178 mutex_init(&als->lock); 179 179 180 180 indio_dev->name = ACPI_ALS_DEVICE_NAME; 181 - indio_dev->dev.parent = &device->dev; 182 181 indio_dev->info = &acpi_als_info; 183 182 indio_dev->modes = INDIO_BUFFER_SOFTWARE; 184 183 indio_dev->channels = acpi_als_channels;
-1
drivers/iio/light/adjd_s311.c
··· 259 259 i2c_set_clientdata(client, indio_dev); 260 260 data->client = client; 261 261 262 - indio_dev->dev.parent = &client->dev; 263 262 indio_dev->info = &adjd_s311_info; 264 263 indio_dev->name = ADJD_S311_DRV_NAME; 265 264 indio_dev->channels = adjd_s311_channels;
-1
drivers/iio/light/adux1020.c
··· 785 785 if (!indio_dev) 786 786 return -ENOMEM; 787 787 788 - indio_dev->dev.parent = &client->dev; 789 788 indio_dev->info = &adux1020_info; 790 789 indio_dev->name = ADUX1020_DRV_NAME; 791 790 indio_dev->channels = adux1020_channels;
-1
drivers/iio/light/al3010.c
··· 179 179 i2c_set_clientdata(client, indio_dev); 180 180 data->client = client; 181 181 182 - indio_dev->dev.parent = &client->dev; 183 182 indio_dev->info = &al3010_info; 184 183 indio_dev->name = AL3010_DRV_NAME; 185 184 indio_dev->channels = al3010_channels;
-1
drivers/iio/light/al3320a.c
··· 202 202 i2c_set_clientdata(client, indio_dev); 203 203 data->client = client; 204 204 205 - indio_dev->dev.parent = &client->dev; 206 205 indio_dev->info = &al3320a_info; 207 206 indio_dev->name = AL3320A_DRV_NAME; 208 207 indio_dev->channels = al3320a_channels;
-1
drivers/iio/light/apds9300.c
··· 419 419 420 420 mutex_init(&data->mutex); 421 421 422 - indio_dev->dev.parent = &client->dev; 423 422 indio_dev->channels = apds9300_channels; 424 423 indio_dev->num_channels = ARRAY_SIZE(apds9300_channels); 425 424 indio_dev->name = APDS9300_DRV_NAME;
-1
drivers/iio/light/apds9960.c
··· 1001 1001 1002 1002 iio_device_attach_buffer(indio_dev, buffer); 1003 1003 1004 - indio_dev->dev.parent = &client->dev; 1005 1004 indio_dev->info = &apds9960_info; 1006 1005 indio_dev->name = APDS9960_DRV_NAME; 1007 1006 indio_dev->channels = apds9960_channels;
-1
drivers/iio/light/bh1750.c
··· 254 254 return ret; 255 255 256 256 mutex_init(&data->lock); 257 - indio_dev->dev.parent = &client->dev; 258 257 indio_dev->info = &bh1750_info; 259 258 indio_dev->name = id->name; 260 259 indio_dev->channels = bh1750_channels;
-1
drivers/iio/light/bh1780.c
··· 185 185 pm_runtime_use_autosuspend(&client->dev); 186 186 pm_runtime_put(&client->dev); 187 187 188 - indio_dev->dev.parent = &client->dev; 189 188 indio_dev->info = &bh1780_info; 190 189 indio_dev->name = "bh1780"; 191 190 indio_dev->channels = bh1780_channels;
-1
drivers/iio/light/cm32181.c
··· 465 465 cm32181->dev = dev; 466 466 467 467 mutex_init(&cm32181->lock); 468 - indio_dev->dev.parent = dev; 469 468 indio_dev->channels = cm32181_channels; 470 469 indio_dev->num_channels = ARRAY_SIZE(cm32181_channels); 471 470 indio_dev->info = &cm32181_info;
-1
drivers/iio/light/cm3232.c
··· 340 340 i2c_set_clientdata(client, indio_dev); 341 341 chip->client = client; 342 342 343 - indio_dev->dev.parent = &client->dev; 344 343 indio_dev->channels = cm3232_channels; 345 344 indio_dev->num_channels = ARRAY_SIZE(cm3232_channels); 346 345 indio_dev->info = &cm3232_info;
-1
drivers/iio/light/cm3323.c
··· 231 231 232 232 mutex_init(&data->mutex); 233 233 234 - indio_dev->dev.parent = &client->dev; 235 234 indio_dev->info = &cm3323_info; 236 235 indio_dev->name = CM3323_DRV_NAME; 237 236 indio_dev->channels = cm3323_channels;
-1
drivers/iio/light/cm3605.c
··· 239 239 led_trigger_register_simple("cm3605", &cm3605->led); 240 240 led_trigger_event(cm3605->led, LED_FULL); 241 241 242 - indio_dev->dev.parent = dev; 243 242 indio_dev->info = &cm3605_info; 244 243 indio_dev->name = "cm3605"; 245 244 indio_dev->channels = cm3605_channels;
-1
drivers/iio/light/cm36651.c
··· 662 662 } 663 663 664 664 mutex_init(&cm36651->lock); 665 - indio_dev->dev.parent = &client->dev; 666 665 indio_dev->channels = cm36651_channels; 667 666 indio_dev->num_channels = ARRAY_SIZE(cm36651_channels); 668 667 indio_dev->info = &cm36651_info;
+5 -1
drivers/iio/light/cros_ec_light_prox.c
··· 145 145 break; 146 146 case IIO_CHAN_INFO_CALIBSCALE: 147 147 st->core.param.cmd = MOTIONSENSE_CMD_SENSOR_RANGE; 148 - st->core.param.sensor_range.data = (val << 16) | (val2 / 100); 148 + st->core.curr_range = (val << 16) | (val2 / 100); 149 + st->core.param.sensor_range.data = st->core.curr_range; 149 150 ret = cros_ec_motion_send_host_cmd(&st->core, 0); 151 + if (ret == 0) 152 + st->core.range_updated = true; 150 153 break; 151 154 default: 152 155 ret = cros_ec_sensors_core_write(&st->core, chan, val, val2, ··· 259 256 static struct platform_driver cros_ec_light_prox_platform_driver = { 260 257 .driver = { 261 258 .name = "cros-ec-light-prox", 259 + .pm = &cros_ec_sensors_pm_ops, 262 260 }, 263 261 .probe = cros_ec_light_prox_probe, 264 262 .id_table = cros_ec_light_prox_ids,
-1
drivers/iio/light/gp2ap002.c
··· 596 596 pm_runtime_use_autosuspend(dev); 597 597 pm_runtime_put(dev); 598 598 599 - indio_dev->dev.parent = dev; 600 599 indio_dev->info = &gp2ap002_info; 601 600 indio_dev->name = "gp2ap002"; 602 601 indio_dev->channels = gp2ap002_channels;
-11
drivers/iio/light/gp2ap020a00f.c
··· 1390 1390 1391 1391 mutex_lock(&data->lock); 1392 1392 1393 - err = iio_triggered_buffer_postenable(indio_dev); 1394 - if (err < 0) { 1395 - mutex_unlock(&data->lock); 1396 - return err; 1397 - } 1398 - 1399 1393 /* 1400 1394 * Enable triggers according to the scan_mask. Enabling either 1401 1395 * LIGHT_CLEAR or LIGHT_IR scan mode results in enabling ALS ··· 1424 1430 err = -ENOMEM; 1425 1431 1426 1432 error_unlock: 1427 - if (err < 0) 1428 - iio_triggered_buffer_predisable(indio_dev); 1429 1433 mutex_unlock(&data->lock); 1430 1434 1431 1435 return err; ··· 1456 1464 1457 1465 if (err == 0) 1458 1466 kfree(data->buffer); 1459 - 1460 - iio_triggered_buffer_predisable(indio_dev); 1461 1467 1462 1468 mutex_unlock(&data->lock); 1463 1469 ··· 1517 1527 init_waitqueue_head(&data->data_ready_queue); 1518 1528 1519 1529 mutex_init(&data->lock); 1520 - indio_dev->dev.parent = &client->dev; 1521 1530 indio_dev->channels = gp2ap020a00f_channels; 1522 1531 indio_dev->num_channels = ARRAY_SIZE(gp2ap020a00f_channels); 1523 1532 indio_dev->info = &gp2ap020a00f_info;
-1
drivers/iio/light/hid-sensor-als.c
··· 301 301 302 302 indio_dev->num_channels = 303 303 ARRAY_SIZE(als_channels); 304 - indio_dev->dev.parent = &pdev->dev; 305 304 indio_dev->info = &als_info; 306 305 indio_dev->name = name; 307 306 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/light/hid-sensor-prox.c
··· 279 279 } 280 280 281 281 indio_dev->num_channels = ARRAY_SIZE(prox_channels); 282 - indio_dev->dev.parent = &pdev->dev; 283 282 indio_dev->info = &prox_info; 284 283 indio_dev->name = name; 285 284 indio_dev->modes = INDIO_DIRECT_MODE;
+4 -3
drivers/iio/light/iqs621-als.c
··· 36 36 37 37 struct iqs621_als_private { 38 38 struct iqs62x_core *iqs62x; 39 + struct iio_dev *indio_dev; 39 40 struct notifier_block notifier; 40 41 struct mutex lock; 41 42 bool light_en; ··· 104 103 105 104 iqs621_als = container_of(notifier, struct iqs621_als_private, 106 105 notifier); 107 - indio_dev = iio_priv_to_dev(iqs621_als); 106 + indio_dev = iqs621_als->indio_dev; 108 107 timestamp = iio_get_time_ns(indio_dev); 109 108 110 109 mutex_lock(&iqs621_als->lock); ··· 192 191 static void iqs621_als_notifier_unregister(void *context) 193 192 { 194 193 struct iqs621_als_private *iqs621_als = context; 195 - struct iio_dev *indio_dev = iio_priv_to_dev(iqs621_als); 194 + struct iio_dev *indio_dev = iqs621_als->indio_dev; 196 195 int ret; 197 196 198 197 ret = blocking_notifier_chain_unregister(&iqs621_als->iqs62x->nh, ··· 552 551 553 552 iqs621_als = iio_priv(indio_dev); 554 553 iqs621_als->iqs62x = iqs62x; 554 + iqs621_als->indio_dev = indio_dev; 555 555 556 556 if (iqs62x->dev_desc->prod_num == IQS622_PROD_NUM) { 557 557 ret = regmap_read(iqs62x->regmap, IQS622_IR_THRESH_TOUCH, ··· 582 580 } 583 581 584 582 indio_dev->modes = INDIO_DIRECT_MODE; 585 - indio_dev->dev.parent = &pdev->dev; 586 583 indio_dev->name = iqs62x->dev_desc->dev_name; 587 584 indio_dev->info = &iqs621_als_info; 588 585
-1
drivers/iio/light/isl29018.c
··· 782 782 indio_dev->channels = isl29018_chip_info_tbl[dev_id].channels; 783 783 indio_dev->num_channels = isl29018_chip_info_tbl[dev_id].num_channels; 784 784 indio_dev->name = name; 785 - indio_dev->dev.parent = &client->dev; 786 785 indio_dev->modes = INDIO_DIRECT_MODE; 787 786 788 787 return devm_iio_device_register(&client->dev, indio_dev);
-1
drivers/iio/light/isl29028.c
··· 620 620 indio_dev->channels = isl29028_channels; 621 621 indio_dev->num_channels = ARRAY_SIZE(isl29028_channels); 622 622 indio_dev->name = id->name; 623 - indio_dev->dev.parent = &client->dev; 624 623 indio_dev->modes = INDIO_DIRECT_MODE; 625 624 626 625 pm_runtime_enable(&client->dev);
+2 -19
drivers/iio/light/isl29125.c
··· 216 216 static int isl29125_buffer_postenable(struct iio_dev *indio_dev) 217 217 { 218 218 struct isl29125_data *data = iio_priv(indio_dev); 219 - int err; 220 - 221 - err = iio_triggered_buffer_postenable(indio_dev); 222 - if (err) 223 - return err; 224 219 225 220 data->conf1 |= ISL29125_MODE_RGB; 226 - err = i2c_smbus_write_byte_data(data->client, ISL29125_CONF1, 221 + return i2c_smbus_write_byte_data(data->client, ISL29125_CONF1, 227 222 data->conf1); 228 - if (err) { 229 - iio_triggered_buffer_predisable(indio_dev); 230 - return err; 231 - } 232 - 233 - return 0; 234 223 } 235 224 236 225 static int isl29125_buffer_predisable(struct iio_dev *indio_dev) 237 226 { 238 227 struct isl29125_data *data = iio_priv(indio_dev); 239 - int ret; 240 228 241 229 data->conf1 &= ~ISL29125_MODE_MASK; 242 230 data->conf1 |= ISL29125_MODE_PD; 243 - ret = i2c_smbus_write_byte_data(data->client, ISL29125_CONF1, 231 + return i2c_smbus_write_byte_data(data->client, ISL29125_CONF1, 244 232 data->conf1); 245 - 246 - iio_triggered_buffer_predisable(indio_dev); 247 - 248 - return ret; 249 233 } 250 234 251 235 static const struct iio_buffer_setup_ops isl29125_buffer_setup_ops = { ··· 252 268 i2c_set_clientdata(client, indio_dev); 253 269 data->client = client; 254 270 255 - indio_dev->dev.parent = &client->dev; 256 271 indio_dev->info = &isl29125_info; 257 272 indio_dev->name = ISL29125_DRV_NAME; 258 273 indio_dev->channels = isl29125_channels;
-1
drivers/iio/light/jsa1212.c
··· 338 338 if (ret < 0) 339 339 return ret; 340 340 341 - indio_dev->dev.parent = &client->dev; 342 341 indio_dev->channels = jsa1212_channels; 343 342 indio_dev->num_channels = ARRAY_SIZE(jsa1212_channels); 344 343 indio_dev->name = JSA1212_DRIVER_NAME;
+1 -1
drivers/iio/light/lm3533-als.c
··· 852 852 indio_dev->channels = lm3533_als_channels; 853 853 indio_dev->num_channels = ARRAY_SIZE(lm3533_als_channels); 854 854 indio_dev->name = dev_name(&pdev->dev); 855 - indio_dev->dev.parent = pdev->dev.parent; 855 + iio_device_set_parent(indio_dev, pdev->dev.parent); 856 856 indio_dev->modes = INDIO_DIRECT_MODE; 857 857 858 858 als = iio_priv(indio_dev);
-1
drivers/iio/light/ltr501.c
··· 1480 1480 if ((partid >> 4) != data->chip_info->partid) 1481 1481 return -ENODEV; 1482 1482 1483 - indio_dev->dev.parent = &client->dev; 1484 1483 indio_dev->info = data->chip_info->info; 1485 1484 indio_dev->channels = data->chip_info->channels; 1486 1485 indio_dev->num_channels = data->chip_info->no_channels;
+1 -2
drivers/iio/light/lv0104cs.c
··· 7 7 * 8 8 * 7-bit I2C slave address: 0x13 9 9 * 10 - * Link to data sheet: http://www.onsemi.com/pub/Collateral/LV0104CS-D.PDF 10 + * Link to data sheet: https://www.onsemi.com/pub/Collateral/LV0104CS-D.PDF 11 11 */ 12 12 13 13 #include <linux/kernel.h> ··· 502 502 return ret; 503 503 504 504 indio_dev->modes = INDIO_DIRECT_MODE; 505 - indio_dev->dev.parent = &client->dev; 506 505 indio_dev->channels = lv0104cs_channels; 507 506 indio_dev->num_channels = ARRAY_SIZE(lv0104cs_channels); 508 507 indio_dev->name = client->name;
-1
drivers/iio/light/max44000.c
··· 538 538 539 539 i2c_set_clientdata(client, indio_dev); 540 540 mutex_init(&data->lock); 541 - indio_dev->dev.parent = &client->dev; 542 541 indio_dev->info = &max44000_info; 543 542 indio_dev->name = MAX44000_DRV_NAME; 544 543 indio_dev->channels = max44000_channels;
-1
drivers/iio/light/max44009.c
··· 501 501 data = iio_priv(indio_dev); 502 502 i2c_set_clientdata(client, indio_dev); 503 503 data->client = client; 504 - indio_dev->dev.parent = &client->dev; 505 504 indio_dev->info = &max44009_info; 506 505 indio_dev->modes = INDIO_DIRECT_MODE; 507 506 indio_dev->name = MAX44009_DRV_NAME;
-1
drivers/iio/light/noa1305.c
··· 270 270 return ret; 271 271 } 272 272 273 - indio_dev->dev.parent = &client->dev; 274 273 indio_dev->info = &noa1305_info; 275 274 indio_dev->channels = noa1305_channels; 276 275 indio_dev->num_channels = ARRAY_SIZE(noa1305_channels);
+1 -2
drivers/iio/light/opt3001.c
··· 2 2 /** 3 3 * opt3001.c - Texas Instruments OPT3001 Light Sensor 4 4 * 5 - * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com 5 + * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com 6 6 * 7 7 * Author: Andreas Dannenberg <dannenberg@ti.com> 8 8 * Based on previous work from: Felipe Balbi <balbi@ti.com> ··· 768 768 iio->name = client->name; 769 769 iio->channels = opt3001_channels; 770 770 iio->num_channels = ARRAY_SIZE(opt3001_channels); 771 - iio->dev.parent = dev; 772 771 iio->modes = INDIO_DIRECT_MODE; 773 772 iio->info = &opt3001_info; 774 773
-1
drivers/iio/light/pa12203001.c
··· 362 362 363 363 mutex_init(&data->lock); 364 364 365 - indio_dev->dev.parent = &client->dev; 366 365 indio_dev->info = &pa12203001_info; 367 366 indio_dev->name = PA12203001_DRIVER_NAME; 368 367 indio_dev->channels = pa12203001_channels;
-3
drivers/iio/light/rpr0521.c
··· 570 570 571 571 static const struct iio_buffer_setup_ops rpr0521_buffer_setup_ops = { 572 572 .preenable = rpr0521_buffer_preenable, 573 - .postenable = iio_triggered_buffer_postenable, 574 - .predisable = iio_triggered_buffer_predisable, 575 573 .postdisable = rpr0521_buffer_postdisable, 576 574 }; 577 575 ··· 946 948 947 949 mutex_init(&data->lock); 948 950 949 - indio_dev->dev.parent = &client->dev; 950 951 indio_dev->info = &rpr0521_info; 951 952 indio_dev->name = RPR0521_DRV_NAME; 952 953 indio_dev->channels = rpr0521_channels;
-1
drivers/iio/light/si1133.c
··· 1015 1015 i2c_set_clientdata(client, iio_dev); 1016 1016 data->client = client; 1017 1017 1018 - iio_dev->dev.parent = &client->dev; 1019 1018 iio_dev->name = id->name; 1020 1019 iio_dev->channels = si1133_channels; 1021 1020 iio_dev->num_channels = ARRAY_SIZE(si1133_channels);
-3
drivers/iio/light/si1145.c
··· 1171 1171 1172 1172 static const struct iio_buffer_setup_ops si1145_buffer_setup_ops = { 1173 1173 .preenable = si1145_buffer_preenable, 1174 - .postenable = iio_triggered_buffer_postenable, 1175 - .predisable = iio_triggered_buffer_predisable, 1176 1174 .validate_scan_mask = si1145_validate_scan_mask, 1177 1175 }; 1178 1176 ··· 1305 1307 return -ENODEV; 1306 1308 } 1307 1309 1308 - indio_dev->dev.parent = &client->dev; 1309 1310 indio_dev->name = id->name; 1310 1311 indio_dev->channels = data->part_info->channels; 1311 1312 indio_dev->num_channels = data->part_info->num_channels;
-3
drivers/iio/light/st_uvis25_core.c
··· 227 227 228 228 static const struct iio_buffer_setup_ops st_uvis25_buffer_ops = { 229 229 .preenable = st_uvis25_buffer_preenable, 230 - .postenable = iio_triggered_buffer_postenable, 231 - .predisable = iio_triggered_buffer_predisable, 232 230 .postdisable = st_uvis25_buffer_postdisable, 233 231 }; 234 232 ··· 301 303 return err; 302 304 303 305 iio_dev->modes = INDIO_DIRECT_MODE; 304 - iio_dev->dev.parent = dev; 305 306 iio_dev->channels = st_uvis25_channels; 306 307 iio_dev->num_channels = ARRAY_SIZE(st_uvis25_channels); 307 308 iio_dev->name = ST_UVIS25_DEV_NAME;
+1 -2
drivers/iio/light/stk3310.c
··· 487 487 } 488 488 } 489 489 490 - static struct regmap_config stk3310_regmap_config = { 490 + static const struct regmap_config stk3310_regmap_config = { 491 491 .name = STK3310_REGMAP_NAME, 492 492 .reg_bits = 8, 493 493 .val_bits = 8, ··· 585 585 if (ret < 0) 586 586 return ret; 587 587 588 - indio_dev->dev.parent = &client->dev; 589 588 indio_dev->info = &stk3310_info; 590 589 indio_dev->name = STK3310_DRIVER_NAME; 591 590 indio_dev->modes = INDIO_DIRECT_MODE;
+2 -19
drivers/iio/light/tcs3414.c
··· 243 243 static int tcs3414_buffer_postenable(struct iio_dev *indio_dev) 244 244 { 245 245 struct tcs3414_data *data = iio_priv(indio_dev); 246 - int ret; 247 - 248 - ret = iio_triggered_buffer_postenable(indio_dev); 249 - if (ret) 250 - return ret; 251 246 252 247 data->control |= TCS3414_CONTROL_ADC_EN; 253 - ret = i2c_smbus_write_byte_data(data->client, TCS3414_CONTROL, 248 + return i2c_smbus_write_byte_data(data->client, TCS3414_CONTROL, 254 249 data->control); 255 - if (ret) 256 - iio_triggered_buffer_predisable(indio_dev); 257 - 258 - return ret; 259 250 } 260 251 261 252 static int tcs3414_buffer_predisable(struct iio_dev *indio_dev) 262 253 { 263 254 struct tcs3414_data *data = iio_priv(indio_dev); 264 - int ret, ret2; 265 255 266 256 data->control &= ~TCS3414_CONTROL_ADC_EN; 267 - ret = i2c_smbus_write_byte_data(data->client, TCS3414_CONTROL, 257 + return i2c_smbus_write_byte_data(data->client, TCS3414_CONTROL, 268 258 data->control); 269 - 270 - ret2 = iio_triggered_buffer_predisable(indio_dev); 271 - if (!ret) 272 - ret = ret2; 273 - 274 - return ret; 275 259 } 276 260 277 261 static const struct iio_buffer_setup_ops tcs3414_buffer_setup_ops = { ··· 278 294 i2c_set_clientdata(client, indio_dev); 279 295 data->client = client; 280 296 281 - indio_dev->dev.parent = &client->dev; 282 297 indio_dev->info = &tcs3414_info; 283 298 indio_dev->name = TCS3414_DRV_NAME; 284 299 indio_dev->channels = tcs3414_channels;
-1
drivers/iio/light/tcs3472.c
··· 454 454 data->client = client; 455 455 mutex_init(&data->lock); 456 456 457 - indio_dev->dev.parent = &client->dev; 458 457 indio_dev->info = &tcs3472_info; 459 458 indio_dev->name = TCS3472_DRV_NAME; 460 459 indio_dev->channels = tcs3472_channels;
+7 -6
drivers/iio/light/tsl2563.c
··· 713 713 714 714 chip = iio_priv(indio_dev); 715 715 716 - i2c_set_clientdata(client, chip); 716 + i2c_set_clientdata(client, indio_dev); 717 717 chip->client = client; 718 718 719 719 err = tsl2563_detect(chip); ··· 750 750 indio_dev->name = client->name; 751 751 indio_dev->channels = tsl2563_channels; 752 752 indio_dev->num_channels = ARRAY_SIZE(tsl2563_channels); 753 - indio_dev->dev.parent = &client->dev; 754 753 indio_dev->modes = INDIO_DIRECT_MODE; 755 754 756 755 if (client->irq) ··· 796 797 797 798 static int tsl2563_remove(struct i2c_client *client) 798 799 { 799 - struct tsl2563_chip *chip = i2c_get_clientdata(client); 800 - struct iio_dev *indio_dev = iio_priv_to_dev(chip); 800 + struct iio_dev *indio_dev = i2c_get_clientdata(client); 801 + struct tsl2563_chip *chip = iio_priv(indio_dev); 801 802 802 803 iio_device_unregister(indio_dev); 803 804 if (!chip->int_enabled) ··· 815 816 #ifdef CONFIG_PM_SLEEP 816 817 static int tsl2563_suspend(struct device *dev) 817 818 { 818 - struct tsl2563_chip *chip = i2c_get_clientdata(to_i2c_client(dev)); 819 + struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 820 + struct tsl2563_chip *chip = iio_priv(indio_dev); 819 821 int ret; 820 822 821 823 mutex_lock(&chip->lock); ··· 834 834 835 835 static int tsl2563_resume(struct device *dev) 836 836 { 837 - struct tsl2563_chip *chip = i2c_get_clientdata(to_i2c_client(dev)); 837 + struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 838 + struct tsl2563_chip *chip = iio_priv(indio_dev); 838 839 int ret; 839 840 840 841 mutex_lock(&chip->lock);
-1
drivers/iio/light/tsl2583.c
··· 840 840 indio_dev->info = &tsl2583_info; 841 841 indio_dev->channels = tsl2583_channels; 842 842 indio_dev->num_channels = ARRAY_SIZE(tsl2583_channels); 843 - indio_dev->dev.parent = &clientp->dev; 844 843 indio_dev->modes = INDIO_DIRECT_MODE; 845 844 indio_dev->name = chip->client->name; 846 845
-1
drivers/iio/light/tsl2772.c
··· 1833 1833 &tsl2772_chip_info_tbl[device_channel_config[id->driver_data]]; 1834 1834 1835 1835 indio_dev->info = chip->chip_info->info; 1836 - indio_dev->dev.parent = &clientp->dev; 1837 1836 indio_dev->modes = INDIO_DIRECT_MODE; 1838 1837 indio_dev->name = chip->client->name; 1839 1838 indio_dev->num_channels = chip->chip_info->chan_table_elements;
-1
drivers/iio/light/tsl4531.c
··· 192 192 if (ret < 0) 193 193 return ret; 194 194 195 - indio_dev->dev.parent = &client->dev; 196 195 indio_dev->info = &tsl4531_info; 197 196 indio_dev->channels = tsl4531_channels; 198 197 indio_dev->num_channels = ARRAY_SIZE(tsl4531_channels);
-1
drivers/iio/light/us5182d.c
··· 851 851 852 852 mutex_init(&data->lock); 853 853 854 - indio_dev->dev.parent = &client->dev; 855 854 indio_dev->info = &us5182d_info; 856 855 indio_dev->name = US5182D_DRV_NAME; 857 856 indio_dev->channels = us5182d_channels;
+7 -29
drivers/iio/light/vcnl4000.c
··· 957 957 int ret; 958 958 int cmd; 959 959 960 - ret = iio_triggered_buffer_postenable(indio_dev); 961 - if (ret) 962 - return ret; 963 - 964 960 /* Do not enable the buffer if we are already capturing events. */ 965 - if (vcnl4010_is_in_periodic_mode(data)) { 966 - ret = -EBUSY; 967 - goto end; 968 - } 961 + if (vcnl4010_is_in_periodic_mode(data)) 962 + return -EBUSY; 969 963 970 964 ret = i2c_smbus_write_byte_data(data->client, VCNL4010_INT_CTRL, 971 965 VCNL4010_INT_PROX_EN); 972 966 if (ret < 0) 973 - goto end; 967 + return ret; 974 968 975 969 cmd = VCNL4000_SELF_TIMED_EN | VCNL4000_PROX_EN; 976 - ret = i2c_smbus_write_byte_data(data->client, VCNL4000_COMMAND, cmd); 977 - if (ret < 0) 978 - goto end; 979 - 980 - return 0; 981 - end: 982 - iio_triggered_buffer_predisable(indio_dev); 983 - 984 - return ret; 970 + return i2c_smbus_write_byte_data(data->client, VCNL4000_COMMAND, cmd); 985 971 } 986 972 987 973 static int vcnl4010_buffer_predisable(struct iio_dev *indio_dev) 988 974 { 989 975 struct vcnl4000_data *data = iio_priv(indio_dev); 990 - int ret, ret_disable; 976 + int ret; 991 977 992 978 ret = i2c_smbus_write_byte_data(data->client, VCNL4010_INT_CTRL, 0); 993 979 if (ret < 0) 994 - goto end; 980 + return ret; 995 981 996 - ret = i2c_smbus_write_byte_data(data->client, VCNL4000_COMMAND, 0); 997 - 998 - end: 999 - ret_disable = iio_triggered_buffer_predisable(indio_dev); 1000 - if (ret == 0) 1001 - ret = ret_disable; 1002 - 1003 - return ret; 982 + return i2c_smbus_write_byte_data(data->client, VCNL4000_COMMAND, 0); 1004 983 } 1005 984 1006 985 static const struct iio_buffer_setup_ops vcnl4010_buffer_ops = { ··· 1037 1058 &data->near_level)) 1038 1059 data->near_level = 0; 1039 1060 1040 - indio_dev->dev.parent = &client->dev; 1041 1061 indio_dev->info = data->chip_spec->info; 1042 1062 indio_dev->channels = data->chip_spec->channels; 1043 1063 indio_dev->num_channels = data->chip_spec->num_channels;
-1
drivers/iio/light/vcnl4035.c
··· 564 564 data->client = client; 565 565 data->regmap = regmap; 566 566 567 - indio_dev->dev.parent = &client->dev; 568 567 indio_dev->info = &vcnl4035_info; 569 568 indio_dev->name = VCNL4035_DRV_NAME; 570 569 indio_dev->channels = vcnl4035_channels;
-1
drivers/iio/light/veml6030.c
··· 814 814 data->client = client; 815 815 data->regmap = regmap; 816 816 817 - indio_dev->dev.parent = &client->dev; 818 817 indio_dev->name = "veml6030"; 819 818 indio_dev->channels = veml6030_channels; 820 819 indio_dev->num_channels = ARRAY_SIZE(veml6030_channels);
-1
drivers/iio/light/veml6070.c
··· 151 151 data->client1 = client; 152 152 mutex_init(&data->lock); 153 153 154 - indio_dev->dev.parent = &client->dev; 155 154 indio_dev->info = &veml6070_info; 156 155 indio_dev->channels = veml6070_channels; 157 156 indio_dev->num_channels = ARRAY_SIZE(veml6070_channels);
-1
drivers/iio/light/vl6180.c
··· 509 509 data->client = client; 510 510 mutex_init(&data->lock); 511 511 512 - indio_dev->dev.parent = &client->dev; 513 512 indio_dev->info = &vl6180_info; 514 513 indio_dev->channels = vl6180_channels; 515 514 indio_dev->num_channels = ARRAY_SIZE(vl6180_channels);
-1
drivers/iio/light/zopt2201.c
··· 527 527 data->client = client; 528 528 mutex_init(&data->lock); 529 529 530 - indio_dev->dev.parent = &client->dev; 531 530 indio_dev->info = &zopt2201_info; 532 531 indio_dev->channels = zopt2201_channels; 533 532 indio_dev->num_channels = ARRAY_SIZE(zopt2201_channels);
-1
drivers/iio/magnetometer/ak8974.c
··· 892 892 pm_runtime_use_autosuspend(&i2c->dev); 893 893 pm_runtime_put(&i2c->dev); 894 894 895 - indio_dev->dev.parent = &i2c->dev; 896 895 switch (ak8974->variant) { 897 896 case AK8974_WHOAMI_VALUE_AMI306: 898 897 case AK8974_WHOAMI_VALUE_AMI305:
+20 -3
drivers/iio/magnetometer/ak8975.c
··· 358 358 u8 asa[3]; 359 359 long raw_to_gauss[3]; 360 360 struct gpio_desc *eoc_gpiod; 361 + struct gpio_desc *reset_gpiod; 361 362 int eoc_irq; 362 363 wait_queue_head_t data_ready_queue; 363 364 unsigned long flags; ··· 385 384 "Failed to enable specified Vid supply\n"); 386 385 return ret; 387 386 } 387 + 388 + gpiod_set_value_cansleep(data->reset_gpiod, 0); 389 + 388 390 /* 389 - * According to the datasheet the power supply rise time i 200us 391 + * According to the datasheet the power supply rise time is 200us 390 392 * and the minimum wait time before mode setting is 100us, in 391 - * total 300 us. Add some margin and say minimum 500us here. 393 + * total 300us. Add some margin and say minimum 500us here. 392 394 */ 393 395 usleep_range(500, 1000); 394 396 return 0; ··· 400 396 /* Disable attached power regulator if any. */ 401 397 static void ak8975_power_off(const struct ak8975_data *data) 402 398 { 399 + gpiod_set_value_cansleep(data->reset_gpiod, 1); 400 + 403 401 regulator_disable(data->vid); 404 402 regulator_disable(data->vdd); 405 403 } ··· 845 839 struct ak8975_data *data; 846 840 struct iio_dev *indio_dev; 847 841 struct gpio_desc *eoc_gpiod; 842 + struct gpio_desc *reset_gpiod; 848 843 const void *match; 849 844 unsigned int i; 850 845 int err; ··· 863 856 if (eoc_gpiod) 864 857 gpiod_set_consumer_name(eoc_gpiod, "ak_8975"); 865 858 859 + /* 860 + * According to AK09911 datasheet, if reset GPIO is provided then 861 + * deassert reset on ak8975_power_on() and assert reset on 862 + * ak8975_power_off(). 863 + */ 864 + reset_gpiod = devm_gpiod_get_optional(&client->dev, 865 + "reset", GPIOD_OUT_HIGH); 866 + if (IS_ERR(reset_gpiod)) 867 + return PTR_ERR(reset_gpiod); 868 + 866 869 /* Register with IIO */ 867 870 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 868 871 if (indio_dev == NULL) ··· 883 866 884 867 data->client = client; 885 868 data->eoc_gpiod = eoc_gpiod; 869 + data->reset_gpiod = reset_gpiod; 886 870 data->eoc_irq = 0; 887 871 888 872 err = iio_read_mount_matrix(&client->dev, "mount-matrix", &data->orientation); ··· 940 922 } 941 923 942 924 mutex_init(&data->lock); 943 - indio_dev->dev.parent = &client->dev; 944 925 indio_dev->channels = ak8975_channels; 945 926 indio_dev->num_channels = ARRAY_SIZE(ak8975_channels); 946 927 indio_dev->info = &ak8975_info;
-3
drivers/iio/magnetometer/bmc150_magn.c
··· 836 836 837 837 static const struct iio_buffer_setup_ops bmc150_magn_buffer_setup_ops = { 838 838 .preenable = bmc150_magn_buffer_preenable, 839 - .postenable = iio_triggered_buffer_postenable, 840 - .predisable = iio_triggered_buffer_predisable, 841 839 .postdisable = bmc150_magn_buffer_postdisable, 842 840 }; 843 841 ··· 881 883 if (ret < 0) 882 884 return ret; 883 885 884 - indio_dev->dev.parent = dev; 885 886 indio_dev->channels = bmc150_magn_channels; 886 887 indio_dev->num_channels = ARRAY_SIZE(bmc150_magn_channels); 887 888 indio_dev->available_scan_masks = bmc150_magn_scan_masks;
+2 -1
drivers/iio/magnetometer/bmc150_magn_i2c.c
··· 58 58 static const struct of_device_id bmc150_magn_of_match[] = { 59 59 { .compatible = "bosch,bmc150_magn" }, 60 60 { .compatible = "bosch,bmc156_magn" }, 61 - { .compatible = "bosch,bmm150_magn" }, 61 + { .compatible = "bosch,bmm150_magn" }, /* deprecated compatible */ 62 + { .compatible = "bosch,bmm150" }, 62 63 { } 63 64 }; 64 65 MODULE_DEVICE_TABLE(of, bmc150_magn_of_match);
-1
drivers/iio/magnetometer/hid-sensor-magn-3d.c
··· 512 512 513 513 indio_dev->channels = channels; 514 514 indio_dev->num_channels = chan_count; 515 - indio_dev->dev.parent = &pdev->dev; 516 515 indio_dev->info = &magn_3d_info; 517 516 indio_dev->name = name; 518 517 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/magnetometer/hmc5843_core.c
··· 642 642 if (ret) 643 643 return ret; 644 644 645 - indio_dev->dev.parent = dev; 646 645 indio_dev->name = name; 647 646 indio_dev->info = &hmc5843_info; 648 647 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/magnetometer/mag3110.c
··· 519 519 i2c_set_clientdata(client, indio_dev); 520 520 indio_dev->info = &mag3110_info; 521 521 indio_dev->name = id->name; 522 - indio_dev->dev.parent = &client->dev; 523 522 indio_dev->modes = INDIO_DIRECT_MODE; 524 523 indio_dev->channels = mag3110_channels; 525 524 indio_dev->num_channels = ARRAY_SIZE(mag3110_channels);
+1 -2
drivers/iio/magnetometer/mmc35240.c
··· 459 459 } 460 460 } 461 461 462 - static struct reg_default mmc35240_reg_defaults[] = { 462 + static const struct reg_default mmc35240_reg_defaults[] = { 463 463 { MMC35240_REG_CTRL0, 0x00 }, 464 464 { MMC35240_REG_CTRL1, 0x00 }, 465 465 }; ··· 507 507 508 508 mutex_init(&data->mutex); 509 509 510 - indio_dev->dev.parent = &client->dev; 511 510 indio_dev->info = &mmc35240_info; 512 511 indio_dev->name = MMC35240_DRV_NAME; 513 512 indio_dev->channels = mmc35240_channels;
-3
drivers/iio/magnetometer/rm3100-core.c
··· 463 463 464 464 static const struct iio_buffer_setup_ops rm3100_buffer_ops = { 465 465 .preenable = rm3100_buffer_preenable, 466 - .postenable = iio_triggered_buffer_postenable, 467 - .predisable = iio_triggered_buffer_predisable, 468 466 .postdisable = rm3100_buffer_postdisable, 469 467 }; 470 468 ··· 547 549 548 550 mutex_init(&data->lock); 549 551 550 - indio_dev->dev.parent = dev; 551 552 indio_dev->name = "rm3100"; 552 553 indio_dev->info = &rm3100_info; 553 554 indio_dev->channels = rm3100_channels;
+2 -24
drivers/iio/magnetometer/st_magn_buffer.c
··· 31 31 32 32 static int st_magn_buffer_postenable(struct iio_dev *indio_dev) 33 33 { 34 - int err; 35 - 36 - err = iio_triggered_buffer_postenable(indio_dev); 37 - if (err < 0) 38 - return err; 39 - 40 - err = st_sensors_set_enable(indio_dev, true); 41 - if (err < 0) 42 - goto st_magn_buffer_predisable; 43 - 44 - return 0; 45 - 46 - st_magn_buffer_predisable: 47 - iio_triggered_buffer_predisable(indio_dev); 48 - return err; 34 + return st_sensors_set_enable(indio_dev, true); 49 35 } 50 36 51 37 static int st_magn_buffer_predisable(struct iio_dev *indio_dev) 52 38 { 53 - int err, err2; 54 - 55 - err = st_sensors_set_enable(indio_dev, false); 56 - 57 - err2 = iio_triggered_buffer_predisable(indio_dev); 58 - if (!err) 59 - err = err2; 60 - 61 - return err; 39 + return st_sensors_set_enable(indio_dev, false); 62 40 } 63 41 64 42 static const struct iio_buffer_setup_ops st_magn_buffer_setup_ops = {
-1
drivers/iio/multiplexer/iio-mux.c
··· 395 395 mux->cached_state = -1; 396 396 397 397 indio_dev->name = dev_name(dev); 398 - indio_dev->dev.parent = dev; 399 398 indio_dev->info = &mux_info; 400 399 indio_dev->modes = INDIO_DIRECT_MODE; 401 400 indio_dev->channels = mux->chan;
-1
drivers/iio/orientation/hid-sensor-incl-3d.c
··· 339 339 } 340 340 341 341 indio_dev->num_channels = ARRAY_SIZE(incl_3d_channels); 342 - indio_dev->dev.parent = &pdev->dev; 343 342 indio_dev->info = &incl_3d_info; 344 343 indio_dev->name = name; 345 344 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/orientation/hid-sensor-rotation.c
··· 281 281 } 282 282 283 283 indio_dev->num_channels = ARRAY_SIZE(dev_rot_channels); 284 - indio_dev->dev.parent = &pdev->dev; 285 284 indio_dev->info = &dev_rot_info; 286 285 indio_dev->name = name; 287 286 indio_dev->modes = INDIO_DIRECT_MODE;
+4 -3
drivers/iio/position/iqs624-pos.c
··· 23 23 24 24 struct iqs624_pos_private { 25 25 struct iqs62x_core *iqs62x; 26 + struct iio_dev *indio_dev; 26 27 struct notifier_block notifier; 27 28 struct mutex lock; 28 29 bool angle_en; ··· 60 59 61 60 iqs624_pos = container_of(notifier, struct iqs624_pos_private, 62 61 notifier); 63 - indio_dev = iio_priv_to_dev(iqs624_pos); 62 + indio_dev = iqs624_pos->indio_dev; 64 63 timestamp = iio_get_time_ns(indio_dev); 65 64 66 65 iqs62x = iqs624_pos->iqs62x; ··· 99 98 static void iqs624_pos_notifier_unregister(void *context) 100 99 { 101 100 struct iqs624_pos_private *iqs624_pos = context; 102 - struct iio_dev *indio_dev = iio_priv_to_dev(iqs624_pos); 101 + struct iio_dev *indio_dev = iqs624_pos->indio_dev; 103 102 int ret; 104 103 105 104 ret = blocking_notifier_chain_unregister(&iqs624_pos->iqs62x->nh, ··· 244 243 245 244 iqs624_pos = iio_priv(indio_dev); 246 245 iqs624_pos->iqs62x = iqs62x; 246 + iqs624_pos->indio_dev = indio_dev; 247 247 248 248 indio_dev->modes = INDIO_DIRECT_MODE; 249 - indio_dev->dev.parent = &pdev->dev; 250 249 indio_dev->channels = iqs624_pos_channels; 251 250 indio_dev->num_channels = ARRAY_SIZE(iqs624_pos_channels); 252 251 indio_dev->name = iqs62x->dev_desc->dev_name;
+1 -2
drivers/iio/potentiometer/ad5272.c
··· 3 3 * Analog Devices AD5272 digital potentiometer driver 4 4 * Copyright (C) 2018 Phil Reid <preid@electromag.com.au> 5 5 * 6 - * Datasheet: http://www.analog.com/media/en/technical-documentation/data-sheets/AD5272_5274.pdf 6 + * Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/AD5272_5274.pdf 7 7 * 8 8 * DEVID #Wipers #Positions Resistor Opts (kOhm) i2c address 9 9 * ad5272 1 1024 20, 50, 100 01011xx ··· 184 184 if (ret < 0) 185 185 return -ENODEV; 186 186 187 - indio_dev->dev.parent = dev; 188 187 indio_dev->info = &ad5272_info; 189 188 indio_dev->channels = &ad5272_channel; 190 189 indio_dev->num_channels = 1;
-1
drivers/iio/potentiometer/ds1803.c
··· 126 126 data->client = client; 127 127 data->cfg = &ds1803_cfg[id->driver_data]; 128 128 129 - indio_dev->dev.parent = dev; 130 129 indio_dev->info = &ds1803_info; 131 130 indio_dev->channels = ds1803_channels; 132 131 indio_dev->num_channels = ARRAY_SIZE(ds1803_channels);
-1
drivers/iio/potentiometer/max5432.c
··· 102 102 data->client = client; 103 103 data->ohm = (unsigned long)of_device_get_match_data(dev); 104 104 105 - indio_dev->dev.parent = dev; 106 105 indio_dev->info = &max5432_info; 107 106 indio_dev->channels = max5432_channels; 108 107 indio_dev->num_channels = ARRAY_SIZE(max5432_channels);
+1 -2
drivers/iio/potentiometer/max5481.c
··· 4 4 * Copyright 2016 Rockwell Collins 5 5 * 6 6 * Datasheet: 7 - * http://datasheets.maximintegrated.com/en/ds/MAX5481-MAX5484.pdf 7 + * https://datasheets.maximintegrated.com/en/ds/MAX5481-MAX5484.pdf 8 8 */ 9 9 10 10 #include <linux/acpi.h> ··· 149 149 data->cfg = &max5481_cfg[id->driver_data]; 150 150 151 151 indio_dev->name = id->name; 152 - indio_dev->dev.parent = &spi->dev; 153 152 indio_dev->modes = INDIO_DIRECT_MODE; 154 153 155 154 /* variant specific configuration */
-1
drivers/iio/potentiometer/max5487.c
··· 100 100 101 101 indio_dev->info = &max5487_info; 102 102 indio_dev->name = id->name; 103 - indio_dev->dev.parent = &spi->dev; 104 103 indio_dev->modes = INDIO_DIRECT_MODE; 105 104 indio_dev->channels = max5487_channels; 106 105 indio_dev->num_channels = ARRAY_SIZE(max5487_channels);
-1
drivers/iio/potentiometer/mcp4018.c
··· 165 165 if (!data->cfg) 166 166 data->cfg = &mcp4018_cfg[i2c_match_id(mcp4018_id, client)->driver_data]; 167 167 168 - indio_dev->dev.parent = dev; 169 168 indio_dev->info = &mcp4018_info; 170 169 indio_dev->channels = &mcp4018_channel; 171 170 indio_dev->num_channels = 1;
+1 -2
drivers/iio/potentiometer/mcp41010.c
··· 5 5 * Copyright (c) 2018 Chris Coffey <cmc@babblebit.net> 6 6 * Based on: Slawomir Stepien's code from mcp4131.c 7 7 * 8 - * Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/11195c.pdf 8 + * Datasheet: https://ww1.microchip.com/downloads/en/devicedoc/11195c.pdf 9 9 * 10 10 * DEVID #Wipers #Positions Resistance (kOhm) 11 11 * mcp41010 1 256 10 ··· 152 152 153 153 mutex_init(&data->lock); 154 154 155 - indio_dev->dev.parent = dev; 156 155 indio_dev->info = &mcp41010_info; 157 156 indio_dev->channels = mcp41010_channels; 158 157 indio_dev->num_channels = data->cfg->wipers;
+1 -2
drivers/iio/potentiometer/mcp4131.c
··· 5 5 * Copyright (c) 2016 Slawomir Stepien 6 6 * Based on: Peter Rosin's code from mcp4531.c 7 7 * 8 - * Datasheet: http://ww1.microchip.com/downloads/en/DeviceDoc/22060b.pdf 8 + * Datasheet: https://ww1.microchip.com/downloads/en/DeviceDoc/22060b.pdf 9 9 * 10 10 * DEVID #Wipers #Positions Resistor Opts (kOhm) 11 11 * mcp4131 1 129 5, 10, 50, 100 ··· 260 260 261 261 mutex_init(&data->lock); 262 262 263 - indio_dev->dev.parent = dev; 264 263 indio_dev->info = &mcp4131_info; 265 264 indio_dev->channels = mcp4131_channels; 266 265 indio_dev->num_channels = data->cfg->wipers;
-1
drivers/iio/potentiometer/mcp4531.c
··· 375 375 if (!data->cfg) 376 376 data->cfg = &mcp4531_cfg[i2c_match_id(mcp4531_id, client)->driver_data]; 377 377 378 - indio_dev->dev.parent = dev; 379 378 indio_dev->info = &mcp4531_info; 380 379 indio_dev->channels = mcp4531_channels; 381 380 indio_dev->num_channels = data->cfg->wipers;
-1
drivers/iio/potentiometer/tpl0102.c
··· 140 140 return PTR_ERR(data->regmap); 141 141 } 142 142 143 - indio_dev->dev.parent = dev; 144 143 indio_dev->info = &tpl0102_info; 145 144 indio_dev->channels = tpl0102_channels; 146 145 indio_dev->num_channels = data->cfg->wipers;
+2 -12
drivers/iio/potentiostat/lmp91000.c
··· 278 278 static int lmp91000_buffer_postenable(struct iio_dev *indio_dev) 279 279 { 280 280 struct lmp91000_data *data = iio_priv(indio_dev); 281 - int err; 282 281 283 - err = iio_triggered_buffer_postenable(indio_dev); 284 - if (err) 285 - return err; 286 - 287 - err = iio_channel_start_all_cb(data->cb_buffer); 288 - if (err) 289 - iio_triggered_buffer_predisable(indio_dev); 290 - 291 - return err; 282 + return iio_channel_start_all_cb(data->cb_buffer); 292 283 } 293 284 294 285 static int lmp91000_buffer_predisable(struct iio_dev *indio_dev) ··· 288 297 289 298 iio_channel_stop_all_cb(data->cb_buffer); 290 299 291 - return iio_triggered_buffer_predisable(indio_dev); 300 + return 0; 292 301 } 293 302 294 303 static const struct iio_buffer_setup_ops lmp91000_buffer_setup_ops = { ··· 312 321 indio_dev->channels = lmp91000_channels; 313 322 indio_dev->num_channels = ARRAY_SIZE(lmp91000_channels); 314 323 indio_dev->name = LMP91000_DRV_NAME; 315 - indio_dev->dev.parent = &client->dev; 316 324 indio_dev->modes = INDIO_DIRECT_MODE; 317 325 i2c_set_clientdata(client, indio_dev); 318 326
-1
drivers/iio/pressure/abp060mg.c
··· 194 194 195 195 abp060mg_init_device(indio_dev, cfg_id); 196 196 197 - indio_dev->dev.parent = &client->dev; 198 197 indio_dev->name = dev_name(&client->dev); 199 198 indio_dev->modes = INDIO_DIRECT_MODE; 200 199 indio_dev->info = &abp060mg_info;
-1
drivers/iio/pressure/bmp280-core.c
··· 1004 1004 mutex_init(&data->lock); 1005 1005 data->dev = dev; 1006 1006 1007 - indio_dev->dev.parent = dev; 1008 1007 indio_dev->name = name; 1009 1008 indio_dev->channels = bmp280_channels; 1010 1009 indio_dev->info = &bmp280_info;
+6 -2
drivers/iio/pressure/cros_ec_baro.c
··· 96 96 /* Always roundup, so caller gets at least what it asks for. */ 97 97 st->core.param.sensor_range.roundup = 1; 98 98 99 - if (cros_ec_motion_send_host_cmd(&st->core, 0)) 100 - ret = -EIO; 99 + ret = cros_ec_motion_send_host_cmd(&st->core, 0); 100 + if (ret == 0) { 101 + st->core.range_updated = true; 102 + st->core.curr_range = val; 103 + } 101 104 break; 102 105 default: 103 106 ret = cros_ec_sensors_core_write(&st->core, chan, val, val2, ··· 202 199 static struct platform_driver cros_ec_baro_platform_driver = { 203 200 .driver = { 204 201 .name = "cros-ec-baro", 202 + .pm = &cros_ec_sensors_pm_ops, 205 203 }, 206 204 .probe = cros_ec_baro_probe, 207 205 .id_table = cros_ec_baro_ids,
+1 -3
drivers/iio/pressure/dlhl60d.c
··· 5 5 * Copyright (c) 2019 AVL DiTEST GmbH 6 6 * Tomislav Denis <tomislav.denis@avl.com> 7 7 * 8 - * Datasheet: http://www.allsensors.com/cad/DS-0355_Rev_B.PDF 8 + * Datasheet: https://www.allsensors.com/cad/DS-0355_Rev_B.PDF 9 9 */ 10 10 11 11 #include <linux/module.h> ··· 311 311 st->use_interrupt = false; 312 312 313 313 indio_dev->name = id->name; 314 - indio_dev->dev.parent = &client->dev; 315 - indio_dev->dev.of_node = client->dev.of_node; 316 314 indio_dev->info = &dlh_info; 317 315 indio_dev->modes = INDIO_DIRECT_MODE; 318 316 indio_dev->channels = dlh_channels;
-1
drivers/iio/pressure/dps310.c
··· 732 732 data->client = client; 733 733 mutex_init(&data->lock); 734 734 735 - iio->dev.parent = &client->dev; 736 735 iio->name = id->name; 737 736 iio->channels = dps310_channels; 738 737 iio->num_channels = ARRAY_SIZE(dps310_channels);
-1
drivers/iio/pressure/hid-sensor-press.c
··· 283 283 284 284 indio_dev->num_channels = 285 285 ARRAY_SIZE(press_channels); 286 - indio_dev->dev.parent = &pdev->dev; 287 286 indio_dev->info = &press_info; 288 287 indio_dev->name = name; 289 288 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/pressure/hp03.c
··· 224 224 priv->client = client; 225 225 mutex_init(&priv->lock); 226 226 227 - indio_dev->dev.parent = dev; 228 227 indio_dev->name = id->name; 229 228 indio_dev->channels = hp03_channels; 230 229 indio_dev->num_channels = ARRAY_SIZE(hp03_channels);
-1
drivers/iio/pressure/hp206c.c
··· 378 378 379 379 indio_dev->info = &hp206c_info; 380 380 indio_dev->name = id->name; 381 - indio_dev->dev.parent = &client->dev; 382 381 indio_dev->modes = INDIO_DIRECT_MODE; 383 382 indio_dev->channels = hp206c_channels; 384 383 indio_dev->num_channels = ARRAY_SIZE(hp206c_channels);
-1
drivers/iio/pressure/icp10100.c
··· 545 545 return -ENOMEM; 546 546 547 547 i2c_set_clientdata(client, indio_dev); 548 - indio_dev->dev.parent = &client->dev; 549 548 indio_dev->name = client->name; 550 549 indio_dev->modes = INDIO_DIRECT_MODE; 551 550 indio_dev->channels = icp10100_channels;
-1
drivers/iio/pressure/mpl115.c
··· 160 160 161 161 indio_dev->info = &mpl115_info; 162 162 indio_dev->name = name; 163 - indio_dev->dev.parent = dev; 164 163 indio_dev->modes = INDIO_DIRECT_MODE; 165 164 indio_dev->channels = mpl115_channels; 166 165 indio_dev->num_channels = ARRAY_SIZE(mpl115_channels);
-1
drivers/iio/pressure/mpl3115.c
··· 241 241 i2c_set_clientdata(client, indio_dev); 242 242 indio_dev->info = &mpl3115_info; 243 243 indio_dev->name = id->name; 244 - indio_dev->dev.parent = &client->dev; 245 244 indio_dev->modes = INDIO_DIRECT_MODE; 246 245 indio_dev->channels = mpl3115_channels; 247 246 indio_dev->num_channels = ARRAY_SIZE(mpl3115_channels);
-1
drivers/iio/pressure/ms5611_core.c
··· 435 435 st->pressure_osr = 436 436 &ms5611_avail_pressure_osr[ARRAY_SIZE(ms5611_avail_pressure_osr) 437 437 - 1]; 438 - indio_dev->dev.parent = dev; 439 438 indio_dev->name = name; 440 439 indio_dev->info = &ms5611_info; 441 440 indio_dev->channels = ms5611_channels;
-1
drivers/iio/pressure/ms5637.c
··· 152 152 153 153 indio_dev->info = &ms5637_info; 154 154 indio_dev->name = id->name; 155 - indio_dev->dev.parent = &client->dev; 156 155 indio_dev->modes = INDIO_DIRECT_MODE; 157 156 indio_dev->channels = ms5637_channels; 158 157 indio_dev->num_channels = ARRAY_SIZE(ms5637_channels);
+2 -24
drivers/iio/pressure/st_pressure_buffer.c
··· 31 31 32 32 static int st_press_buffer_postenable(struct iio_dev *indio_dev) 33 33 { 34 - int err; 35 - 36 - err = iio_triggered_buffer_postenable(indio_dev); 37 - if (err < 0) 38 - return err; 39 - 40 - err = st_sensors_set_enable(indio_dev, true); 41 - if (err < 0) 42 - goto st_press_buffer_predisable; 43 - 44 - return 0; 45 - 46 - st_press_buffer_predisable: 47 - iio_triggered_buffer_predisable(indio_dev); 48 - return err; 34 + return st_sensors_set_enable(indio_dev, true); 49 35 } 50 36 51 37 static int st_press_buffer_predisable(struct iio_dev *indio_dev) 52 38 { 53 - int err, err2; 54 - 55 - err = st_sensors_set_enable(indio_dev, false); 56 - 57 - err2 = iio_triggered_buffer_predisable(indio_dev); 58 - if (!err) 59 - err = err2; 60 - 61 - return err; 39 + return st_sensors_set_enable(indio_dev, false); 62 40 } 63 41 64 42 static const struct iio_buffer_setup_ops st_press_buffer_setup_ops = {
-1
drivers/iio/pressure/t5403.c
··· 236 236 i2c_set_clientdata(client, indio_dev); 237 237 indio_dev->info = &t5403_info; 238 238 indio_dev->name = id->name; 239 - indio_dev->dev.parent = &client->dev; 240 239 indio_dev->modes = INDIO_DIRECT_MODE; 241 240 indio_dev->channels = t5403_channels; 242 241 indio_dev->num_channels = ARRAY_SIZE(t5403_channels);
+10 -18
drivers/iio/pressure/zpa2326.c
··· 1242 1242 const struct zpa2326_private *priv = iio_priv(indio_dev); 1243 1243 int err; 1244 1244 1245 - /* Plug our own trigger event handler. */ 1246 - err = iio_triggered_buffer_postenable(indio_dev); 1247 - if (err) 1248 - goto err; 1249 - 1250 1245 if (!priv->waken) { 1251 1246 /* 1252 1247 * We were already power supplied. Just clear hardware FIFO to 1253 1248 * get rid of samples acquired during previous rounds (if any). 1254 1249 */ 1255 1250 err = zpa2326_clear_fifo(indio_dev, 0); 1256 - if (err) 1257 - goto err_buffer_predisable; 1251 + if (err) { 1252 + zpa2326_err(indio_dev, 1253 + "failed to enable buffering (%d)", err); 1254 + return err; 1255 + } 1258 1256 } 1259 1257 1260 1258 if (!iio_trigger_using_own(indio_dev) && priv->waken) { ··· 1261 1263 * powered up: reconfigure one-shot mode. 1262 1264 */ 1263 1265 err = zpa2326_config_oneshot(indio_dev, priv->irq); 1264 - if (err) 1265 - goto err_buffer_predisable; 1266 + if (err) { 1267 + zpa2326_err(indio_dev, 1268 + "failed to enable buffering (%d)", err); 1269 + return err; 1270 + } 1266 1271 } 1267 1272 1268 1273 return 0; 1269 - 1270 - err_buffer_predisable: 1271 - iio_triggered_buffer_predisable(indio_dev); 1272 - err: 1273 - zpa2326_err(indio_dev, "failed to enable buffering (%d)", err); 1274 - 1275 - return err; 1276 1274 } 1277 1275 1278 1276 static int zpa2326_postdisable_buffer(struct iio_dev *indio_dev) ··· 1281 1287 static const struct iio_buffer_setup_ops zpa2326_buffer_setup_ops = { 1282 1288 .preenable = zpa2326_preenable_buffer, 1283 1289 .postenable = zpa2326_postenable_buffer, 1284 - .predisable = iio_triggered_buffer_predisable, 1285 1290 .postdisable = zpa2326_postdisable_buffer 1286 1291 }; 1287 1292 ··· 1594 1601 1595 1602 /* Setup for userspace synchronous on demand sampling. */ 1596 1603 indio_dev->modes = INDIO_DIRECT_MODE; 1597 - indio_dev->dev.parent = device; 1598 1604 indio_dev->channels = zpa2326_channels; 1599 1605 indio_dev->num_channels = ARRAY_SIZE(zpa2326_channels); 1600 1606 indio_dev->name = name;
-1
drivers/iio/proximity/as3935.c
··· 399 399 return -EINVAL; 400 400 } 401 401 402 - indio_dev->dev.parent = &spi->dev; 403 402 indio_dev->name = spi_get_device_id(spi)->name; 404 403 indio_dev->channels = as3935_channels; 405 404 indio_dev->num_channels = ARRAY_SIZE(as3935_channels);
-1
drivers/iio/proximity/isl29501.c
··· 972 972 return ret; 973 973 974 974 indio_dev->modes = INDIO_DIRECT_MODE; 975 - indio_dev->dev.parent = &client->dev; 976 975 indio_dev->channels = isl29501_channels; 977 976 indio_dev->num_channels = ARRAY_SIZE(isl29501_channels); 978 977 indio_dev->name = client->name;
-1
drivers/iio/proximity/mb1232.c
··· 200 200 201 201 indio_dev->info = &mb1232_info; 202 202 indio_dev->name = id->name; 203 - indio_dev->dev.parent = dev; 204 203 indio_dev->modes = INDIO_DIRECT_MODE; 205 204 indio_dev->channels = mb1232_channels; 206 205 indio_dev->num_channels = ARRAY_SIZE(mb1232_channels);
-1
drivers/iio/proximity/ping.c
··· 309 309 platform_set_drvdata(pdev, indio_dev); 310 310 311 311 indio_dev->name = "ping"; 312 - indio_dev->dev.parent = &pdev->dev; 313 312 indio_dev->info = &ping_iio_info; 314 313 indio_dev->modes = INDIO_DIRECT_MODE; 315 314 indio_dev->channels = ping_chan_spec;
-1
drivers/iio/proximity/pulsedlight-lidar-lite-v2.c
··· 270 270 indio_dev->name = LIDAR_DRV_NAME; 271 271 indio_dev->channels = lidar_channels; 272 272 indio_dev->num_channels = ARRAY_SIZE(lidar_channels); 273 - indio_dev->dev.parent = &client->dev; 274 273 indio_dev->modes = INDIO_DIRECT_MODE; 275 274 276 275 i2c_set_clientdata(client, indio_dev);
-1
drivers/iio/proximity/rfd77402.c
··· 274 274 data->client = client; 275 275 mutex_init(&data->lock); 276 276 277 - indio_dev->dev.parent = &client->dev; 278 277 indio_dev->info = &rfd77402_info; 279 278 indio_dev->channels = rfd77402_channels; 280 279 indio_dev->num_channels = ARRAY_SIZE(rfd77402_channels);
+1 -2
drivers/iio/proximity/srf04.c
··· 5 5 * Copyright (c) 2017 Andreas Klinger <ak@it-klinger.de> 6 6 * 7 7 * For details about the device see: 8 - * http://www.robot-electronics.co.uk/htm/srf04tech.htm 8 + * https://www.robot-electronics.co.uk/htm/srf04tech.htm 9 9 * 10 10 * the measurement cycle as timing diagram looks like: 11 11 * ··· 317 317 platform_set_drvdata(pdev, indio_dev); 318 318 319 319 indio_dev->name = "srf04"; 320 - indio_dev->dev.parent = &pdev->dev; 321 320 indio_dev->info = &srf04_iio_info; 322 321 indio_dev->modes = INDIO_DIRECT_MODE; 323 322 indio_dev->channels = srf04_chan_spec;
+3 -4
drivers/iio/proximity/srf08.c
··· 7 7 * Copyright (c) 2016, 2017 Andreas Klinger <ak@it-klinger.de> 8 8 * 9 9 * For details about the device see: 10 - * http://www.robot-electronics.co.uk/htm/srf08tech.html 11 - * http://www.robot-electronics.co.uk/htm/srf10tech.htm 12 - * http://www.robot-electronics.co.uk/htm/srf02tech.htm 10 + * https://www.robot-electronics.co.uk/htm/srf08tech.html 11 + * https://www.robot-electronics.co.uk/htm/srf10tech.htm 12 + * https://www.robot-electronics.co.uk/htm/srf02tech.htm 13 13 */ 14 14 15 15 #include <linux/err.h> ··· 483 483 } 484 484 485 485 indio_dev->name = id->name; 486 - indio_dev->dev.parent = &client->dev; 487 486 indio_dev->modes = INDIO_DIRECT_MODE; 488 487 indio_dev->channels = srf08_channels; 489 488 indio_dev->num_channels = ARRAY_SIZE(srf08_channels);
-3
drivers/iio/proximity/sx9310.c
··· 736 736 737 737 static const struct iio_buffer_setup_ops sx9310_buffer_setup_ops = { 738 738 .preenable = sx9310_buffer_preenable, 739 - .postenable = iio_triggered_buffer_postenable, 740 - .predisable = iio_triggered_buffer_predisable, 741 739 .postdisable = sx9310_buffer_postdisable, 742 740 }; 743 741 ··· 929 931 return ret; 930 932 931 933 ACPI_COMPANION_SET(&indio_dev->dev, ACPI_COMPANION(&client->dev)); 932 - indio_dev->dev.parent = &client->dev; 933 934 indio_dev->channels = sx9310_channels; 934 935 indio_dev->num_channels = ARRAY_SIZE(sx9310_channels); 935 936 indio_dev->info = &sx9310_info;
-10
drivers/iio/proximity/sx9500.c
··· 680 680 struct sx9500_data *data = iio_priv(indio_dev); 681 681 int ret = 0, i; 682 682 683 - ret = iio_triggered_buffer_postenable(indio_dev); 684 - if (ret) 685 - return ret; 686 - 687 683 mutex_lock(&data->mutex); 688 684 689 685 for (i = 0; i < SX9500_NUM_CHANNELS; i++) ··· 695 699 sx9500_dec_chan_users(data, i); 696 700 697 701 mutex_unlock(&data->mutex); 698 - 699 - if (ret) 700 - iio_triggered_buffer_predisable(indio_dev); 701 702 702 703 return ret; 703 704 } ··· 719 726 sx9500_inc_chan_users(data, i); 720 727 721 728 mutex_unlock(&data->mutex); 722 - 723 - iio_triggered_buffer_predisable(indio_dev); 724 729 725 730 return ret; 726 731 } ··· 922 931 if (IS_ERR(data->regmap)) 923 932 return PTR_ERR(data->regmap); 924 933 925 - indio_dev->dev.parent = &client->dev; 926 934 indio_dev->name = SX9500_DRIVER_NAME; 927 935 indio_dev->channels = sx9500_channels; 928 936 indio_dev->num_channels = ARRAY_SIZE(sx9500_channels);
-1
drivers/iio/proximity/vcnl3020.c
··· 226 226 if (rc) 227 227 return rc; 228 228 229 - indio_dev->dev.parent = &client->dev; 230 229 indio_dev->info = &vcnl3020_info; 231 230 indio_dev->channels = vcnl3020_channels; 232 231 indio_dev->num_channels = ARRAY_SIZE(vcnl3020_channels);
-1
drivers/iio/proximity/vl53l0x-i2c.c
··· 134 134 I2C_FUNC_SMBUS_BYTE_DATA)) 135 135 return -EOPNOTSUPP; 136 136 137 - indio_dev->dev.parent = &client->dev; 138 137 indio_dev->name = "vl53l0x"; 139 138 indio_dev->info = &vl53l0x_info; 140 139 indio_dev->channels = vl53l0x_channels;
-1
drivers/iio/resolver/ad2s1200.c
··· 157 157 return PTR_ERR(st->rdvel); 158 158 } 159 159 160 - indio_dev->dev.parent = &spi->dev; 161 160 indio_dev->info = &ad2s1200_info; 162 161 indio_dev->modes = INDIO_DIRECT_MODE; 163 162 indio_dev->channels = ad2s1200_channels;
-1
drivers/iio/resolver/ad2s90.c
··· 94 94 95 95 mutex_init(&st->lock); 96 96 st->sdev = spi; 97 - indio_dev->dev.parent = &spi->dev; 98 97 indio_dev->info = &ad2s90_info; 99 98 indio_dev->modes = INDIO_DIRECT_MODE; 100 99 indio_dev->channels = &ad2s90_chan;
-1
drivers/iio/temperature/hid-sensor-temperature.c
··· 223 223 224 224 indio_dev->channels = temp_chans; 225 225 indio_dev->num_channels = ARRAY_SIZE(temperature_channels); 226 - indio_dev->dev.parent = &pdev->dev; 227 226 indio_dev->info = &temperature_info; 228 227 indio_dev->name = name; 229 228 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/iio/temperature/iqs620at-temp.c
··· 74 74 iio_device_set_drvdata(indio_dev, iqs62x); 75 75 76 76 indio_dev->modes = INDIO_DIRECT_MODE; 77 - indio_dev->dev.parent = &pdev->dev; 78 77 indio_dev->channels = iqs620_temp_channels; 79 78 indio_dev->num_channels = ARRAY_SIZE(iqs620_temp_channels); 80 79 indio_dev->name = iqs62x->dev_desc->dev_name;
-1
drivers/iio/temperature/ltc2983.c
··· 1500 1500 if (ret) 1501 1501 return ret; 1502 1502 1503 - indio_dev->dev.parent = &spi->dev; 1504 1503 indio_dev->name = name; 1505 1504 indio_dev->num_channels = st->iio_channels; 1506 1505 indio_dev->channels = st->iio_chan;
-2
drivers/iio/temperature/max31856.c
··· 417 417 spi_set_drvdata(spi, indio_dev); 418 418 419 419 indio_dev->info = &max31856_info; 420 - indio_dev->dev.parent = &spi->dev; 421 - indio_dev->dev.of_node = spi->dev.of_node; 422 420 indio_dev->name = id->name; 423 421 indio_dev->modes = INDIO_DIRECT_MODE; 424 422 indio_dev->channels = max31856_channels;
-1
drivers/iio/temperature/maxim_thermocouple.c
··· 244 244 indio_dev->available_scan_masks = chip->scan_masks; 245 245 indio_dev->num_channels = chip->num_channels; 246 246 indio_dev->modes = INDIO_DIRECT_MODE; 247 - indio_dev->dev.parent = &spi->dev; 248 247 249 248 data = iio_priv(indio_dev); 250 249 data->spi = spi;
-1
drivers/iio/temperature/mlx90614.c
··· 525 525 526 526 mlx90614_wakeup(data); 527 527 528 - indio_dev->dev.parent = &client->dev; 529 528 indio_dev->name = id->name; 530 529 indio_dev->modes = INDIO_DIRECT_MODE; 531 530 indio_dev->info = &mlx90614_info;
-1
drivers/iio/temperature/mlx90632.c
··· 645 645 mlx90632->regmap = regmap; 646 646 647 647 mutex_init(&mlx90632->lock); 648 - indio_dev->dev.parent = &client->dev; 649 648 indio_dev->name = id->name; 650 649 indio_dev->modes = INDIO_DIRECT_MODE; 651 650 indio_dev->info = &mlx90632_info;
-1
drivers/iio/temperature/tmp006.c
··· 216 216 i2c_set_clientdata(client, indio_dev); 217 217 data->client = client; 218 218 219 - indio_dev->dev.parent = &client->dev; 220 219 indio_dev->name = dev_name(&client->dev); 221 220 indio_dev->modes = INDIO_DIRECT_MODE; 222 221 indio_dev->info = &tmp006_info;
-1
drivers/iio/temperature/tmp007.c
··· 463 463 data->client = client; 464 464 mutex_init(&data->lock); 465 465 466 - indio_dev->dev.parent = &client->dev; 467 466 indio_dev->name = "tmp007"; 468 467 indio_dev->modes = INDIO_DIRECT_MODE; 469 468 indio_dev->info = &tmp007_info;
-1
drivers/iio/temperature/tsys01.c
··· 160 160 161 161 indio_dev->info = &tsys01_info; 162 162 indio_dev->name = dev->driver->name; 163 - indio_dev->dev.parent = dev; 164 163 indio_dev->modes = INDIO_DIRECT_MODE; 165 164 indio_dev->channels = tsys01_channels; 166 165 indio_dev->num_channels = ARRAY_SIZE(tsys01_channels);
-1
drivers/iio/temperature/tsys02d.c
··· 149 149 150 150 indio_dev->info = &tsys02d_info; 151 151 indio_dev->name = id->name; 152 - indio_dev->dev.parent = &client->dev; 153 152 indio_dev->modes = INDIO_DIRECT_MODE; 154 153 indio_dev->channels = tsys02d_channels; 155 154 indio_dev->num_channels = ARRAY_SIZE(tsys02d_channels);
-2
drivers/iio/trigger/stm32-timer-trigger.c
··· 723 723 return NULL; 724 724 725 725 indio_dev->name = dev_name(dev); 726 - indio_dev->dev.parent = dev; 727 726 indio_dev->info = &stm32_trigger_info; 728 727 indio_dev->modes = INDIO_HARDWARE_TRIGGERED; 729 728 indio_dev->num_channels = 1; 730 729 indio_dev->channels = &stm32_trigger_channel; 731 - indio_dev->dev.of_node = dev->of_node; 732 730 733 731 ret = devm_iio_device_register(dev, indio_dev); 734 732 if (ret)
-1
drivers/input/touchscreen/tsc2007_iio.c
··· 119 119 iio->ts = ts; 120 120 121 121 indio_dev->name = "tsc2007"; 122 - indio_dev->dev.parent = &ts->client->dev; 123 122 indio_dev->info = &tsc2007_iio_info; 124 123 indio_dev->modes = INDIO_DIRECT_MODE; 125 124 indio_dev->channels = tsc2007_iio_channel;
+1 -2
drivers/platform/x86/toshiba_acpi.c
··· 3114 3114 3115 3115 toshiba_accelerometer_available(dev); 3116 3116 if (dev->accelerometer_supported) { 3117 - dev->indio_dev = iio_device_alloc(sizeof(*dev)); 3117 + dev->indio_dev = iio_device_alloc(&acpi_dev->dev, sizeof(*dev)); 3118 3118 if (!dev->indio_dev) { 3119 3119 pr_err("Unable to allocate iio device\n"); 3120 3120 goto iio_error; ··· 3124 3124 3125 3125 dev->indio_dev->info = &toshiba_iio_accel_info; 3126 3126 dev->indio_dev->name = "Toshiba accelerometer"; 3127 - dev->indio_dev->dev.parent = &acpi_dev->dev; 3128 3127 dev->indio_dev->modes = INDIO_DIRECT_MODE; 3129 3128 dev->indio_dev->channels = toshiba_iio_accel_channels; 3130 3129 dev->indio_dev->num_channels =
+1 -3
drivers/staging/iio/Documentation/device.txt
··· 8 8 9 9 First allocate one using: 10 10 11 - struct iio_dev *indio_dev = iio_device_alloc(sizeof(struct chip_state)); 11 + struct iio_dev *indio_dev = iio_device_alloc(parent, sizeof(struct chip_state)); 12 12 where chip_state is a structure of local state data for this instance of 13 13 the chip. 14 14 ··· 16 16 17 17 Then fill in the following: 18 18 19 - - indio_dev->dev.parent 20 - Struct device associated with the underlying hardware. 21 19 - indio_dev->name 22 20 Name of the device being driven - made available as the name 23 21 attribute in sysfs.
-1
drivers/staging/iio/accel/adis16203.c
··· 277 277 spi_set_drvdata(spi, indio_dev); 278 278 279 279 indio_dev->name = spi->dev.driver->name; 280 - indio_dev->dev.parent = &spi->dev; 281 280 indio_dev->channels = adis16203_channels; 282 281 indio_dev->num_channels = ARRAY_SIZE(adis16203_channels); 283 282 indio_dev->info = &adis16203_info;
-1
drivers/staging/iio/accel/adis16240.c
··· 400 400 spi_set_drvdata(spi, indio_dev); 401 401 402 402 indio_dev->name = spi->dev.driver->name; 403 - indio_dev->dev.parent = &spi->dev; 404 403 indio_dev->info = &adis16240_info; 405 404 indio_dev->channels = adis16240_channels; 406 405 indio_dev->num_channels = ARRAY_SIZE(adis16240_channels);
-1
drivers/staging/iio/adc/ad7280a.c
··· 978 978 st->readback_delay_us += 5; /* Add tWAIT */ 979 979 980 980 indio_dev->name = spi_get_device_id(spi)->name; 981 - indio_dev->dev.parent = &spi->dev; 982 981 indio_dev->modes = INDIO_DIRECT_MODE; 983 982 984 983 ret = ad7280_channel_init(st);
-1
drivers/staging/iio/adc/ad7816.c
··· 394 394 } 395 395 396 396 indio_dev->name = spi_get_device_id(spi_dev)->name; 397 - indio_dev->dev.parent = &spi_dev->dev; 398 397 indio_dev->info = &ad7816_info; 399 398 indio_dev->modes = INDIO_DIRECT_MODE; 400 399
-1
drivers/staging/iio/addac/adt7316.c
··· 2171 2171 if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) 2172 2172 chip->int_mask |= ADT7516_AIN_INT_MASK; 2173 2173 2174 - indio_dev->dev.parent = dev; 2175 2174 if ((chip->id & ID_FAMILY_MASK) == ID_ADT75XX) 2176 2175 indio_dev->info = &adt7516_info; 2177 2176 else
-2
drivers/staging/iio/cdc/ad7150.c
··· 590 590 indio_dev->name = id->name; 591 591 indio_dev->channels = ad7150_channels; 592 592 indio_dev->num_channels = ARRAY_SIZE(ad7150_channels); 593 - /* Establish that the iio_dev is a child of the i2c device */ 594 - indio_dev->dev.parent = &client->dev; 595 593 596 594 indio_dev->info = &ad7150_info; 597 595
-2
drivers/staging/iio/cdc/ad7746.c
··· 693 693 chip->client = client; 694 694 chip->capdac_set = -1; 695 695 696 - /* Establish that the iio_dev is a child of the i2c device */ 697 696 indio_dev->name = id->name; 698 - indio_dev->dev.parent = &client->dev; 699 697 indio_dev->info = &ad7746_info; 700 698 indio_dev->channels = ad7746_channels; 701 699 if (id->driver_data == 7746)
-1
drivers/staging/iio/frequency/ad9832.c
··· 348 348 st->spi = spi; 349 349 mutex_init(&st->lock); 350 350 351 - indio_dev->dev.parent = &spi->dev; 352 351 indio_dev->name = spi_get_device_id(spi)->name; 353 352 indio_dev->info = &ad9832_info; 354 353 indio_dev->modes = INDIO_DIRECT_MODE;
-1
drivers/staging/iio/frequency/ad9834.c
··· 431 431 st->spi = spi; 432 432 st->devid = spi_get_device_id(spi)->driver_data; 433 433 st->reg = reg; 434 - indio_dev->dev.parent = &spi->dev; 435 434 indio_dev->name = spi_get_device_id(spi)->name; 436 435 switch (st->devid) { 437 436 case ID_AD9833:
-1
drivers/staging/iio/impedance-analyzer/ad5933.c
··· 759 759 INIT_DELAYED_WORK(&st->work, ad5933_work); 760 760 st->poll_time_jiffies = msecs_to_jiffies(AD5933_POLL_TIME_ms); 761 761 762 - indio_dev->dev.parent = &client->dev; 763 762 indio_dev->info = &ad5933_info; 764 763 indio_dev->name = id->name; 765 764 indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE);
-1
drivers/staging/iio/resolver/ad2s1210.c
··· 671 671 st->resolution = 12; 672 672 st->fexcit = AD2S1210_DEF_EXCIT; 673 673 674 - indio_dev->dev.parent = &spi->dev; 675 674 indio_dev->info = &ad2s1210_info; 676 675 indio_dev->modes = INDIO_DIRECT_MODE; 677 676 indio_dev->channels = ad2s1210_channels;
+67
include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-only */ 2 + /* 3 + * Copyright (c) 2020, The Linux Foundation. All rights reserved. 4 + */ 5 + 6 + #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H 7 + #define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H 8 + 9 + #ifndef PM8350_SID 10 + #define PM8350_SID 1 11 + #endif 12 + 13 + /* ADC channels for PM8350_ADC for PMIC7 */ 14 + #define PM8350_ADC7_REF_GND (PM8350_SID << 8 | 0x0) 15 + #define PM8350_ADC7_1P25VREF (PM8350_SID << 8 | 0x01) 16 + #define PM8350_ADC7_VREF_VADC (PM8350_SID << 8 | 0x02) 17 + #define PM8350_ADC7_DIE_TEMP (PM8350_SID << 8 | 0x03) 18 + 19 + #define PM8350_ADC7_AMUX_THM1 (PM8350_SID << 8 | 0x04) 20 + #define PM8350_ADC7_AMUX_THM2 (PM8350_SID << 8 | 0x05) 21 + #define PM8350_ADC7_AMUX_THM3 (PM8350_SID << 8 | 0x06) 22 + #define PM8350_ADC7_AMUX_THM4 (PM8350_SID << 8 | 0x07) 23 + #define PM8350_ADC7_AMUX_THM5 (PM8350_SID << 8 | 0x08) 24 + #define PM8350_ADC7_GPIO1 (PM8350_SID << 8 | 0x0a) 25 + #define PM8350_ADC7_GPIO2 (PM8350_SID << 8 | 0x0b) 26 + #define PM8350_ADC7_GPIO3 (PM8350_SID << 8 | 0x0c) 27 + #define PM8350_ADC7_GPIO4 (PM8350_SID << 8 | 0x0d) 28 + 29 + /* 30k pull-up1 */ 30 + #define PM8350_ADC7_AMUX_THM1_30K_PU (PM8350_SID << 8 | 0x24) 31 + #define PM8350_ADC7_AMUX_THM2_30K_PU (PM8350_SID << 8 | 0x25) 32 + #define PM8350_ADC7_AMUX_THM3_30K_PU (PM8350_SID << 8 | 0x26) 33 + #define PM8350_ADC7_AMUX_THM4_30K_PU (PM8350_SID << 8 | 0x27) 34 + #define PM8350_ADC7_AMUX_THM5_30K_PU (PM8350_SID << 8 | 0x28) 35 + #define PM8350_ADC7_GPIO1_30K_PU (PM8350_SID << 8 | 0x2a) 36 + #define PM8350_ADC7_GPIO2_30K_PU (PM8350_SID << 8 | 0x2b) 37 + #define PM8350_ADC7_GPIO3_30K_PU (PM8350_SID << 8 | 0x2c) 38 + #define PM8350_ADC7_GPIO4_30K_PU (PM8350_SID << 8 | 0x2d) 39 + 40 + /* 100k pull-up2 */ 41 + #define PM8350_ADC7_AMUX_THM1_100K_PU (PM8350_SID << 8 | 0x44) 42 + #define PM8350_ADC7_AMUX_THM2_100K_PU (PM8350_SID << 8 | 0x45) 43 + #define PM8350_ADC7_AMUX_THM3_100K_PU (PM8350_SID << 8 | 0x46) 44 + #define PM8350_ADC7_AMUX_THM4_100K_PU (PM8350_SID << 8 | 0x47) 45 + #define PM8350_ADC7_AMUX_THM5_100K_PU (PM8350_SID << 8 | 0x48) 46 + #define PM8350_ADC7_GPIO1_100K_PU (PM8350_SID << 8 | 0x4a) 47 + #define PM8350_ADC7_GPIO2_100K_PU (PM8350_SID << 8 | 0x4b) 48 + #define PM8350_ADC7_GPIO3_100K_PU (PM8350_SID << 8 | 0x4c) 49 + #define PM8350_ADC7_GPIO4_100K_PU (PM8350_SID << 8 | 0x4d) 50 + 51 + /* 400k pull-up3 */ 52 + #define PM8350_ADC7_AMUX_THM1_400K_PU (PM8350_SID << 8 | 0x64) 53 + #define PM8350_ADC7_AMUX_THM2_400K_PU (PM8350_SID << 8 | 0x65) 54 + #define PM8350_ADC7_AMUX_THM3_400K_PU (PM8350_SID << 8 | 0x66) 55 + #define PM8350_ADC7_AMUX_THM4_400K_PU (PM8350_SID << 8 | 0x67) 56 + #define PM8350_ADC7_AMUX_THM5_400K_PU (PM8350_SID << 8 | 0x68) 57 + #define PM8350_ADC7_GPIO1_400K_PU (PM8350_SID << 8 | 0x6a) 58 + #define PM8350_ADC7_GPIO2_400K_PU (PM8350_SID << 8 | 0x6b) 59 + #define PM8350_ADC7_GPIO3_400K_PU (PM8350_SID << 8 | 0x6c) 60 + #define PM8350_ADC7_GPIO4_400K_PU (PM8350_SID << 8 | 0x6d) 61 + 62 + /* 1/3 Divider */ 63 + #define PM8350_ADC7_GPIO4_DIV3 (PM8350_SID << 8 | 0x8d) 64 + 65 + #define PM8350_ADC7_VPH_PWR (PM8350_SID << 8 | 0x8e) 66 + 67 + #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H */
+88
include/dt-bindings/iio/qcom,spmi-adc7-pm8350b.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-only */ 2 + /* 3 + * Copyright (c) 2020 The Linux Foundation. All rights reserved. 4 + */ 5 + 6 + #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350B_H 7 + #define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350B_H 8 + 9 + #ifndef PM8350B_SID 10 + #define PM8350B_SID 3 11 + #endif 12 + 13 + /* ADC channels for PM8350B_ADC for PMIC7 */ 14 + #define PM8350B_ADC7_REF_GND (PM8350B_SID << 8 | 0x0) 15 + #define PM8350B_ADC7_1P25VREF (PM8350B_SID << 8 | 0x01) 16 + #define PM8350B_ADC7_VREF_VADC (PM8350B_SID << 8 | 0x02) 17 + #define PM8350B_ADC7_DIE_TEMP (PM8350B_SID << 8 | 0x03) 18 + 19 + #define PM8350B_ADC7_AMUX_THM1 (PM8350B_SID << 8 | 0x04) 20 + #define PM8350B_ADC7_AMUX_THM2 (PM8350B_SID << 8 | 0x05) 21 + #define PM8350B_ADC7_AMUX_THM3 (PM8350B_SID << 8 | 0x06) 22 + #define PM8350B_ADC7_AMUX_THM4 (PM8350B_SID << 8 | 0x07) 23 + #define PM8350B_ADC7_AMUX_THM5 (PM8350B_SID << 8 | 0x08) 24 + #define PM8350B_ADC7_AMUX_THM6 (PM8350B_SID << 8 | 0x09) 25 + #define PM8350B_ADC7_GPIO1 (PM8350B_SID << 8 | 0x0a) 26 + #define PM8350B_ADC7_GPIO2 (PM8350B_SID << 8 | 0x0b) 27 + #define PM8350B_ADC7_GPIO3 (PM8350B_SID << 8 | 0x0c) 28 + #define PM8350B_ADC7_GPIO4 (PM8350B_SID << 8 | 0x0d) 29 + 30 + #define PM8350B_ADC7_CHG_TEMP (PM8350B_SID << 8 | 0x10) 31 + #define PM8350B_ADC7_USB_IN_V_16 (PM8350B_SID << 8 | 0x11) 32 + #define PM8350B_ADC7_VDC_16 (PM8350B_SID << 8 | 0x12) 33 + #define PM8350B_ADC7_CC1_ID (PM8350B_SID << 8 | 0x13) 34 + #define PM8350B_ADC7_VREF_BAT_THERM (PM8350B_SID << 8 | 0x15) 35 + #define PM8350B_ADC7_IIN_FB (PM8350B_SID << 8 | 0x17) 36 + 37 + /* 30k pull-up1 */ 38 + #define PM8350B_ADC7_AMUX_THM1_30K_PU (PM8350B_SID << 8 | 0x24) 39 + #define PM8350B_ADC7_AMUX_THM2_30K_PU (PM8350B_SID << 8 | 0x25) 40 + #define PM8350B_ADC7_AMUX_THM3_30K_PU (PM8350B_SID << 8 | 0x26) 41 + #define PM8350B_ADC7_AMUX_THM4_30K_PU (PM8350B_SID << 8 | 0x27) 42 + #define PM8350B_ADC7_AMUX_THM5_30K_PU (PM8350B_SID << 8 | 0x28) 43 + #define PM8350B_ADC7_AMUX_THM6_30K_PU (PM8350B_SID << 8 | 0x29) 44 + #define PM8350B_ADC7_GPIO1_30K_PU (PM8350B_SID << 8 | 0x2a) 45 + #define PM8350B_ADC7_GPIO2_30K_PU (PM8350B_SID << 8 | 0x2b) 46 + #define PM8350B_ADC7_GPIO3_30K_PU (PM8350B_SID << 8 | 0x2c) 47 + #define PM8350B_ADC7_GPIO4_30K_PU (PM8350B_SID << 8 | 0x2d) 48 + #define PM8350B_ADC7_CC1_ID_30K_PU (PM8350B_SID << 8 | 0x33) 49 + 50 + /* 100k pull-up2 */ 51 + #define PM8350B_ADC7_AMUX_THM1_100K_PU (PM8350B_SID << 8 | 0x44) 52 + #define PM8350B_ADC7_AMUX_THM2_100K_PU (PM8350B_SID << 8 | 0x45) 53 + #define PM8350B_ADC7_AMUX_THM3_100K_PU (PM8350B_SID << 8 | 0x46) 54 + #define PM8350B_ADC7_AMUX_THM4_100K_PU (PM8350B_SID << 8 | 0x47) 55 + #define PM8350B_ADC7_AMUX_THM5_100K_PU (PM8350B_SID << 8 | 0x48) 56 + #define PM8350B_ADC7_AMUX_THM6_100K_PU (PM8350B_SID << 8 | 0x49) 57 + #define PM8350B_ADC7_GPIO1_100K_PU (PM8350B_SID << 8 | 0x4a) 58 + #define PM8350B_ADC7_GPIO2_100K_PU (PM8350B_SID << 8 | 0x4b) 59 + #define PM8350B_ADC7_GPIO3_100K_PU (PM8350B_SID << 8 | 0x4c) 60 + #define PM8350B_ADC7_GPIO4_100K_PU (PM8350B_SID << 8 | 0x4d) 61 + #define PM8350B_ADC7_CC1_ID_100K_PU (PM8350B_SID << 8 | 0x53) 62 + 63 + /* 400k pull-up3 */ 64 + #define PM8350B_ADC7_AMUX_THM1_400K_PU (PM8350B_SID << 8 | 0x64) 65 + #define PM8350B_ADC7_AMUX_THM2_400K_PU (PM8350B_SID << 8 | 0x65) 66 + #define PM8350B_ADC7_AMUX_THM3_400K_PU (PM8350B_SID << 8 | 0x66) 67 + #define PM8350B_ADC7_AMUX_THM4_400K_PU (PM8350B_SID << 8 | 0x67) 68 + #define PM8350B_ADC7_AMUX_THM5_400K_PU (PM8350B_SID << 8 | 0x68) 69 + #define PM8350B_ADC7_AMUX_THM6_400K_PU (PM8350B_SID << 8 | 0x69) 70 + #define PM8350B_ADC7_GPIO1_400K_PU (PM8350B_SID << 8 | 0x6a) 71 + #define PM8350B_ADC7_GPIO2_400K_PU (PM8350B_SID << 8 | 0x6b) 72 + #define PM8350B_ADC7_GPIO3_400K_PU (PM8350B_SID << 8 | 0x6c) 73 + #define PM8350B_ADC7_GPIO4_400K_PU (PM8350B_SID << 8 | 0x6d) 74 + #define PM8350B_ADC7_CC1_ID_400K_PU (PM8350B_SID << 8 | 0x73) 75 + 76 + /* 1/3 Divider */ 77 + #define PM8350B_ADC7_GPIO1_DIV3 (PM8350B_SID << 8 | 0x8a) 78 + #define PM8350B_ADC7_GPIO2_DIV3 (PM8350B_SID << 8 | 0x8b) 79 + #define PM8350B_ADC7_GPIO3_DIV3 (PM8350B_SID << 8 | 0x8c) 80 + #define PM8350B_ADC7_GPIO4_DIV3 (PM8350B_SID << 8 | 0x8d) 81 + 82 + #define PM8350B_ADC7_VPH_PWR (PM8350B_SID << 8 | 0x8e) 83 + #define PM8350B_ADC7_VBAT_SNS (PM8350B_SID << 8 | 0x8f) 84 + 85 + #define PM8350B_ADC7_SBUx (PM8350B_SID << 8 | 0x94) 86 + #define PM8350B_ADC7_VBAT_2S_MID (PM8350B_SID << 8 | 0x96) 87 + 88 + #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350B_H */
+46
include/dt-bindings/iio/qcom,spmi-adc7-pmk8350.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-only */ 2 + /* 3 + * Copyright (c) 2020 The Linux Foundation. All rights reserved. 4 + */ 5 + 6 + #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H 7 + #define _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H 8 + 9 + #ifndef PMK8350_SID 10 + #define PMK8350_SID 0 11 + #endif 12 + 13 + /* ADC channels for PMK8350_ADC for PMIC7 */ 14 + #define PMK8350_ADC7_REF_GND (PMK8350_SID << 8 | 0x0) 15 + #define PMK8350_ADC7_1P25VREF (PMK8350_SID << 8 | 0x01) 16 + #define PMK8350_ADC7_VREF_VADC (PMK8350_SID << 8 | 0x02) 17 + #define PMK8350_ADC7_DIE_TEMP (PMK8350_SID << 8 | 0x03) 18 + 19 + #define PMK8350_ADC7_AMUX_THM1 (PMK8350_SID << 8 | 0x04) 20 + #define PMK8350_ADC7_AMUX_THM2 (PMK8350_SID << 8 | 0x05) 21 + #define PMK8350_ADC7_AMUX_THM3 (PMK8350_SID << 8 | 0x06) 22 + #define PMK8350_ADC7_AMUX_THM4 (PMK8350_SID << 8 | 0x07) 23 + #define PMK8350_ADC7_AMUX_THM5 (PMK8350_SID << 8 | 0x08) 24 + 25 + /* 30k pull-up1 */ 26 + #define PMK8350_ADC7_AMUX_THM1_30K_PU (PMK8350_SID << 8 | 0x24) 27 + #define PMK8350_ADC7_AMUX_THM2_30K_PU (PMK8350_SID << 8 | 0x25) 28 + #define PMK8350_ADC7_AMUX_THM3_30K_PU (PMK8350_SID << 8 | 0x26) 29 + #define PMK8350_ADC7_AMUX_THM4_30K_PU (PMK8350_SID << 8 | 0x27) 30 + #define PMK8350_ADC7_AMUX_THM5_30K_PU (PMK8350_SID << 8 | 0x28) 31 + 32 + /* 100k pull-up2 */ 33 + #define PMK8350_ADC7_AMUX_THM1_100K_PU (PMK8350_SID << 8 | 0x44) 34 + #define PMK8350_ADC7_AMUX_THM2_100K_PU (PMK8350_SID << 8 | 0x45) 35 + #define PMK8350_ADC7_AMUX_THM3_100K_PU (PMK8350_SID << 8 | 0x46) 36 + #define PMK8350_ADC7_AMUX_THM4_100K_PU (PMK8350_SID << 8 | 0x47) 37 + #define PMK8350_ADC7_AMUX_THM5_100K_PU (PMK8350_SID << 8 | 0x48) 38 + 39 + /* 400k pull-up3 */ 40 + #define PMK8350_ADC7_AMUX_THM1_400K_PU (PMK8350_SID << 8 | 0x64) 41 + #define PMK8350_ADC7_AMUX_THM2_400K_PU (PMK8350_SID << 8 | 0x65) 42 + #define PMK8350_ADC7_AMUX_THM3_400K_PU (PMK8350_SID << 8 | 0x66) 43 + #define PMK8350_ADC7_AMUX_THM4_400K_PU (PMK8350_SID << 8 | 0x67) 44 + #define PMK8350_ADC7_AMUX_THM5_400K_PU (PMK8350_SID << 8 | 0x68) 45 + 46 + #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H */
+28
include/dt-bindings/iio/qcom,spmi-adc7-pmr735a.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-only */ 2 + /* 3 + * Copyright (c) 2020 The Linux Foundation. All rights reserved. 4 + */ 5 + 6 + #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PMR735A_H 7 + #define _DT_BINDINGS_QCOM_SPMI_VADC_PMR735A_H 8 + 9 + #ifndef PMR735A_SID 10 + #define PMR735A_SID 4 11 + #endif 12 + 13 + /* ADC channels for PMR735A_ADC for PMIC7 */ 14 + #define PMR735A_ADC7_REF_GND (PMR735A_SID << 8 | 0x0) 15 + #define PMR735A_ADC7_1P25VREF (PMR735A_SID << 8 | 0x01) 16 + #define PMR735A_ADC7_VREF_VADC (PMR735A_SID << 8 | 0x02) 17 + #define PMR735A_ADC7_DIE_TEMP (PMR735A_SID << 8 | 0x03) 18 + 19 + #define PMR735A_ADC7_GPIO1 (PMR735A_SID << 8 | 0x0a) 20 + #define PMR735A_ADC7_GPIO2 (PMR735A_SID << 8 | 0x0b) 21 + #define PMR735A_ADC7_GPIO3 (PMR735A_SID << 8 | 0x0c) 22 + 23 + /* 100k pull-up2 */ 24 + #define PMR735A_ADC7_GPIO1_100K_PU (PMR735A_SID << 8 | 0x4a) 25 + #define PMR735A_ADC7_GPIO2_100K_PU (PMR735A_SID << 8 | 0x4b) 26 + #define PMR735A_ADC7_GPIO3_100K_PU (PMR735A_SID << 8 | 0x4c) 27 + 28 + #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMR735A_H */
+28
include/dt-bindings/iio/qcom,spmi-adc7-pmr735b.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-only */ 2 + /* 3 + * Copyright (c) 2020 The Linux Foundation. All rights reserved. 4 + */ 5 + 6 + #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PMR735B_H 7 + #define _DT_BINDINGS_QCOM_SPMI_VADC_PMR735B_H 8 + 9 + #ifndef PMR735B_SID 10 + #define PMR735B_SID 5 11 + #endif 12 + 13 + /* ADC channels for PMR735B_ADC for PMIC7 */ 14 + #define PMR735B_ADC7_REF_GND (PMR735B_SID << 8 | 0x0) 15 + #define PMR735B_ADC7_1P25VREF (PMR735B_SID << 8 | 0x01) 16 + #define PMR735B_ADC7_VREF_VADC (PMR735B_SID << 8 | 0x02) 17 + #define PMR735B_ADC7_DIE_TEMP (PMR735B_SID << 8 | 0x03) 18 + 19 + #define PMR735B_ADC7_GPIO1 (PMR735B_SID << 8 | 0x0a) 20 + #define PMR735B_ADC7_GPIO2 (PMR735B_SID << 8 | 0x0b) 21 + #define PMR735B_ADC7_GPIO3 (PMR735B_SID << 8 | 0x0c) 22 + 23 + /* 100k pull-up2 */ 24 + #define PMR735B_ADC7_GPIO1_100K_PU (PMR735B_SID << 8 | 0x4a) 25 + #define PMR735B_ADC7_GPIO2_100K_PU (PMR735B_SID << 8 | 0x4b) 26 + #define PMR735B_ADC7_GPIO3_100K_PU (PMR735B_SID << 8 | 0x4c) 27 + 28 + #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMR735B_H */
+77 -1
include/dt-bindings/iio/qcom,spmi-vadc.h
··· 1 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 2 /* 3 - * Copyright (c) 2012-2014,2018 The Linux Foundation. All rights reserved. 3 + * Copyright (c) 2012-2014,2018,2020 The Linux Foundation. All rights reserved. 4 4 */ 5 5 6 6 #ifndef _DT_BINDINGS_QCOM_SPMI_VADC_H ··· 220 220 #define ADC5_PARALLEL_ISENSE_VBAT_IDATA 0xb5 221 221 222 222 #define ADC5_MAX_CHANNEL 0xc0 223 + 224 + /* ADC channels for ADC for PMIC7 */ 225 + 226 + #define ADC7_REF_GND 0x00 227 + #define ADC7_1P25VREF 0x01 228 + #define ADC7_VREF_VADC 0x02 229 + #define ADC7_DIE_TEMP 0x03 230 + 231 + #define ADC7_AMUX_THM1 0x04 232 + #define ADC7_AMUX_THM2 0x05 233 + #define ADC7_AMUX_THM3 0x06 234 + #define ADC7_AMUX_THM4 0x07 235 + #define ADC7_AMUX_THM5 0x08 236 + #define ADC7_AMUX_THM6 0x09 237 + #define ADC7_GPIO1 0x0a 238 + #define ADC7_GPIO2 0x0b 239 + #define ADC7_GPIO3 0x0c 240 + #define ADC7_GPIO4 0x0d 241 + 242 + #define ADC7_CHG_TEMP 0x10 243 + #define ADC7_USB_IN_V_16 0x11 244 + #define ADC7_VDC_16 0x12 245 + #define ADC7_CC1_ID 0x13 246 + #define ADC7_VREF_BAT_THERM 0x15 247 + #define ADC7_IIN_FB 0x17 248 + 249 + /* 30k pull-up1 */ 250 + #define ADC7_AMUX_THM1_30K_PU 0x24 251 + #define ADC7_AMUX_THM2_30K_PU 0x25 252 + #define ADC7_AMUX_THM3_30K_PU 0x26 253 + #define ADC7_AMUX_THM4_30K_PU 0x27 254 + #define ADC7_AMUX_THM5_30K_PU 0x28 255 + #define ADC7_AMUX_THM6_30K_PU 0x29 256 + #define ADC7_GPIO1_30K_PU 0x2a 257 + #define ADC7_GPIO2_30K_PU 0x2b 258 + #define ADC7_GPIO3_30K_PU 0x2c 259 + #define ADC7_GPIO4_30K_PU 0x2d 260 + #define ADC7_CC1_ID_30K_PU 0x33 261 + 262 + /* 100k pull-up2 */ 263 + #define ADC7_AMUX_THM1_100K_PU 0x44 264 + #define ADC7_AMUX_THM2_100K_PU 0x45 265 + #define ADC7_AMUX_THM3_100K_PU 0x46 266 + #define ADC7_AMUX_THM4_100K_PU 0x47 267 + #define ADC7_AMUX_THM5_100K_PU 0x48 268 + #define ADC7_AMUX_THM6_100K_PU 0x49 269 + #define ADC7_GPIO1_100K_PU 0x4a 270 + #define ADC7_GPIO2_100K_PU 0x4b 271 + #define ADC7_GPIO3_100K_PU 0x4c 272 + #define ADC7_GPIO4_100K_PU 0x4d 273 + #define ADC7_CC1_ID_100K_PU 0x53 274 + 275 + /* 400k pull-up3 */ 276 + #define ADC7_AMUX_THM1_400K_PU 0x64 277 + #define ADC7_AMUX_THM2_400K_PU 0x65 278 + #define ADC7_AMUX_THM3_400K_PU 0x66 279 + #define ADC7_AMUX_THM4_400K_PU 0x67 280 + #define ADC7_AMUX_THM5_400K_PU 0x68 281 + #define ADC7_AMUX_THM6_400K_PU 0x69 282 + #define ADC7_GPIO1_400K_PU 0x6a 283 + #define ADC7_GPIO2_400K_PU 0x6b 284 + #define ADC7_GPIO3_400K_PU 0x6c 285 + #define ADC7_GPIO4_400K_PU 0x6d 286 + #define ADC7_CC1_ID_400K_PU 0x73 287 + 288 + /* 1/3 Divider */ 289 + #define ADC7_GPIO1_DIV3 0x8a 290 + #define ADC7_GPIO2_DIV3 0x8b 291 + #define ADC7_GPIO3_DIV3 0x8c 292 + #define ADC7_GPIO4_DIV3 0x8d 293 + 294 + #define ADC7_VPH_PWR 0x8e 295 + #define ADC7_VBAT_SNS 0x8f 296 + 297 + #define ADC7_SBUx 0x94 298 + #define ADC7_VBAT_2S_MID 0x96 223 299 224 300 #endif /* _DT_BINDINGS_QCOM_SPMI_VADC_H */
+10 -1
include/linux/iio/common/cros_ec_sensors_core.h
··· 42 42 * @resp: motion sensor response structure 43 43 * @type: type of motion sensor 44 44 * @loc: location where the motion sensor is placed 45 + * @range_updated: True if the range of the sensor has been 46 + * updated. 47 + * @curr_range: If updated, the current range value. 48 + * It will be reapplied at every resume. 45 49 * @calib: calibration parameters. Note that trigger 46 50 * captured data will always provide the calibrated 47 51 * data ··· 68 64 69 65 enum motionsensor_type type; 70 66 enum motionsensor_location loc; 67 + 68 + bool range_updated; 69 + int curr_range; 71 70 72 71 struct calib_data { 73 72 s16 offset; ··· 121 114 struct iio_chan_spec const *chan, 122 115 int val, int val2, long mask); 123 116 124 - /* List of extended channel specification for all sensors */ 117 + extern const struct dev_pm_ops cros_ec_sensors_pm_ops; 118 + 119 + /* List of extended channel specification for all sensors. */ 125 120 extern const struct iio_chan_spec_ext_info cros_ec_sensors_ext_info[]; 126 121 extern const struct attribute *cros_ec_sensor_fifo_attributes[]; 127 122
+36
include/linux/iio/iio-opaque.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0 */ 2 + 3 + #ifndef _INDUSTRIAL_IO_OPAQUE_H_ 4 + #define _INDUSTRIAL_IO_OPAQUE_H_ 5 + 6 + /** 7 + * struct iio_dev_opaque - industrial I/O device opaque information 8 + * @indio_dev: public industrial I/O device information 9 + * @event_interface: event chrdevs associated with interrupt lines 10 + * @buffer_list: list of all buffers currently attached 11 + * @channel_attr_list: keep track of automatically created channel 12 + * attributes 13 + * @chan_attr_group: group for all attrs in base directory 14 + * @debugfs_dentry: device specific debugfs dentry 15 + * @cached_reg_addr: cached register address for debugfs reads 16 + * @read_buf: read buffer to be used for the initial reg read 17 + * @read_buf_len: data length in @read_buf 18 + */ 19 + struct iio_dev_opaque { 20 + struct iio_dev indio_dev; 21 + struct iio_event_interface *event_interface; 22 + struct list_head buffer_list; 23 + struct list_head channel_attr_list; 24 + struct attribute_group chan_attr_group; 25 + #if defined(CONFIG_DEBUG_FS) 26 + struct dentry *debugfs_dentry; 27 + unsigned cached_reg_addr; 28 + char read_buf[20]; 29 + unsigned int read_buf_len; 30 + #endif 31 + }; 32 + 33 + #define to_iio_dev_opaque(indio_dev) \ 34 + container_of(indio_dev, struct iio_dev_opaque, indio_dev) 35 + 36 + #endif
+29 -32
include/linux/iio/iio.h
··· 488 488 * @currentmode: [DRIVER] current operating mode 489 489 * @dev: [DRIVER] device structure, should be assigned a parent 490 490 * and owner 491 - * @event_interface: [INTERN] event chrdevs associated with interrupt lines 492 491 * @buffer: [DRIVER] any buffer present 493 - * @buffer_list: [INTERN] list of all buffers currently attached 494 492 * @scan_bytes: [INTERN] num bytes captured to be fed to buffer demux 495 493 * @mlock: [INTERN] lock used to prevent simultaneous device state 496 494 * changes ··· 504 506 * @pollfunc_event: [DRIVER] function run on events trigger being received 505 507 * @channels: [DRIVER] channel specification structure table 506 508 * @num_channels: [DRIVER] number of channels specified in @channels. 507 - * @channel_attr_list: [INTERN] keep track of automatically created channel 508 - * attributes 509 - * @chan_attr_group: [INTERN] group for all attrs in base directory 510 509 * @name: [DRIVER] name of the device. 511 510 * @label: [DRIVER] unique name to identify which device this is 512 511 * @info: [DRIVER] callbacks and constant info from driver ··· 515 520 * @groups: [INTERN] attribute groups 516 521 * @groupcounter: [INTERN] index of next attribute group 517 522 * @flags: [INTERN] file ops related flags including busy flag. 518 - * @debugfs_dentry: [INTERN] device specific debugfs dentry. 519 - * @cached_reg_addr: [INTERN] cached register address for debugfs reads. 523 + * @priv: [DRIVER] reference to driver's private information 524 + * **MUST** be accessed **ONLY** via iio_priv() helper 520 525 */ 521 526 struct iio_dev { 522 527 int id; ··· 526 531 int currentmode; 527 532 struct device dev; 528 533 529 - struct iio_event_interface *event_interface; 530 - 531 534 struct iio_buffer *buffer; 532 - struct list_head buffer_list; 533 535 int scan_bytes; 534 536 struct mutex mlock; 535 537 ··· 543 551 struct iio_chan_spec const *channels; 544 552 int num_channels; 545 553 546 - struct list_head channel_attr_list; 547 - struct attribute_group chan_attr_group; 548 554 const char *name; 549 555 const char *label; 550 556 const struct iio_info *info; ··· 555 565 int groupcounter; 556 566 557 567 unsigned long flags; 558 - #if defined(CONFIG_DEBUG_FS) 559 - struct dentry *debugfs_dentry; 560 - unsigned cached_reg_addr; 561 - char read_buf[20]; 562 - unsigned int read_buf_len; 563 - #endif 568 + void *priv; 564 569 }; 565 570 566 571 const struct iio_chan_spec ··· 634 649 return indio_dev ? dev_to_iio_dev(get_device(&indio_dev->dev)) : NULL; 635 650 } 636 651 652 + /** 653 + * iio_device_set_parent() - assign parent device to the IIO device object 654 + * @indio_dev: IIO device structure 655 + * @parent: reference to parent device object 656 + * 657 + * This utility must be called between IIO device allocation 658 + * (via devm_iio_device_alloc()) & IIO device registration 659 + * (via {devm_}iio_device_register()). 660 + * By default, the device allocation will also assign a parent device to 661 + * the IIO device object. In cases where devm_iio_device_alloc() is used, 662 + * sometimes the parent device must be different than the device used to 663 + * manage the allocation. 664 + * In that case, this helper should be used to change the parent, hence the 665 + * requirement to call this between allocation & registration. 666 + **/ 667 + static inline void iio_device_set_parent(struct iio_dev *indio_dev, 668 + struct device *parent) 669 + { 670 + indio_dev->dev.parent = parent; 671 + } 637 672 638 673 /** 639 674 * iio_device_set_drvdata() - Set device driver data ··· 674 669 * 675 670 * Returns the data previously set with iio_device_set_drvdata() 676 671 */ 677 - static inline void *iio_device_get_drvdata(struct iio_dev *indio_dev) 672 + static inline void *iio_device_get_drvdata(const struct iio_dev *indio_dev) 678 673 { 679 674 return dev_get_drvdata(&indio_dev->dev); 680 675 } 681 676 682 677 /* Can we make this smaller? */ 683 678 #define IIO_ALIGN L1_CACHE_BYTES 684 - struct iio_dev *iio_device_alloc(int sizeof_priv); 679 + struct iio_dev *iio_device_alloc(struct device *parent, int sizeof_priv); 685 680 681 + /* The information at the returned address is guaranteed to be cacheline aligned */ 686 682 static inline void *iio_priv(const struct iio_dev *indio_dev) 687 683 { 688 - return (char *)indio_dev + ALIGN(sizeof(struct iio_dev), IIO_ALIGN); 689 - } 690 - 691 - static inline struct iio_dev *iio_priv_to_dev(void *priv) 692 - { 693 - return (struct iio_dev *)((char *)priv - 694 - ALIGN(sizeof(struct iio_dev), IIO_ALIGN)); 684 + return indio_dev->priv; 695 685 } 696 686 697 687 void iio_device_free(struct iio_dev *indio_dev); 698 - struct iio_dev *devm_iio_device_alloc(struct device *dev, int sizeof_priv); 688 + struct iio_dev *devm_iio_device_alloc(struct device *parent, int sizeof_priv); 699 689 struct iio_trigger *devm_iio_trigger_alloc(struct device *dev, 700 690 const char *fmt, ...); 701 691 /** ··· 709 709 * @indio_dev: IIO device structure for device 710 710 **/ 711 711 #if defined(CONFIG_DEBUG_FS) 712 - static inline struct dentry *iio_get_debugfs_dentry(struct iio_dev *indio_dev) 713 - { 714 - return indio_dev->debugfs_dentry; 715 - } 712 + struct dentry *iio_get_debugfs_dentry(struct iio_dev *indio_dev); 716 713 #else 717 714 static inline struct dentry *iio_get_debugfs_dentry(struct iio_dev *indio_dev) 718 715 {
-7
include/linux/iio/trigger_consumer.h
··· 50 50 51 51 void iio_trigger_notify_done(struct iio_trigger *trig); 52 52 53 - /* 54 - * Two functions for common case where all that happens is a pollfunc 55 - * is attached and detached from a trigger 56 - */ 57 - int iio_triggered_buffer_postenable(struct iio_dev *indio_dev); 58 - int iio_triggered_buffer_predisable(struct iio_dev *indio_dev); 59 - 60 53 #endif