tjh.dev
+11
-1
arch/x86/events/intel/core.c
+11
-1
arch/x86/events/intel/core.c
···
429
429
EVENT_CONSTRAINT_END
430
430
};
431
431
432
+
static struct extra_reg intel_lnc_extra_regs[] __read_mostly = {
433
+
INTEL_UEVENT_EXTRA_REG(0x012a, MSR_OFFCORE_RSP_0, 0xfffffffffffull, RSP_0),
434
+
INTEL_UEVENT_EXTRA_REG(0x012b, MSR_OFFCORE_RSP_1, 0xfffffffffffull, RSP_1),
435
+
INTEL_UEVENT_PEBS_LDLAT_EXTRA_REG(0x01cd),
436
+
INTEL_UEVENT_EXTRA_REG(0x02c6, MSR_PEBS_FRONTEND, 0x9, FE),
437
+
INTEL_UEVENT_EXTRA_REG(0x03c6, MSR_PEBS_FRONTEND, 0x7fff1f, FE),
438
+
INTEL_UEVENT_EXTRA_REG(0x40ad, MSR_PEBS_FRONTEND, 0xf, FE),
439
+
INTEL_UEVENT_EXTRA_REG(0x04c2, MSR_PEBS_FRONTEND, 0x8, FE),
440
+
EVENT_EXTRA_END
441
+
};
432
442
433
443
EVENT_ATTR_STR(mem-loads, mem_ld_nhm, "event=0x0b,umask=0x10,ldlat=3");
434
444
EVENT_ATTR_STR(mem-loads, mem_ld_snb, "event=0xcd,umask=0x1,ldlat=3");
···
6432
6422
intel_pmu_init_glc(pmu);
6433
6423
hybrid(pmu, event_constraints) = intel_lnc_event_constraints;
6434
6424
hybrid(pmu, pebs_constraints) = intel_lnc_pebs_event_constraints;
6435
-
hybrid(pmu, extra_regs) = intel_rwc_extra_regs;
6425
+
hybrid(pmu, extra_regs) = intel_lnc_extra_regs;
6436
6426
}
6437
6427
6438
6428
static __always_inline void intel_pmu_init_skt(struct pmu *pmu)
+1
arch/x86/events/intel/ds.c
+1
arch/x86/events/intel/ds.c
+1
arch/x86/events/intel/uncore.c
+1
arch/x86/events/intel/uncore.c
···
1910
1910
X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, &adl_uncore_init),
1911
1911
X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, &gnr_uncore_init),
1912
1912
X86_MATCH_VFM(INTEL_ATOM_CRESTMONT, &gnr_uncore_init),
1913
+
X86_MATCH_VFM(INTEL_ATOM_DARKMONT_X, &gnr_uncore_init),
1913
1914
{},
1914
1915
};
1915
1916
MODULE_DEVICE_TABLE(x86cpu, intel_uncore_match);