tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'gemini-dts-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
Pull "DTS updates for the Gemini on top of the multiplatform base" from Linus Walleij:
- Add the power controller to the DTS.
- Augment the GPIO nodes to also include the Faraday
compatible.
- Add the PCI bus host and config to the Gemini device trees.
* tag 'gemini-dts-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: add PCI to the Gemini device trees
ARM: dts: augment Gemini GPIO nodes
ARM: dts: add power controller to the Gemini DTS
+73
-3
+22
arch/arm/boot/dts/gemini-sq201.dts
+22
arch/arm/boot/dts/gemini-sq201.dts
···
92
92
read-only;
93
93
};
94
94
};
95
+
96
+
pci@50000000 {
97
+
status = "okay";
98
+
interrupt-map-mask = <0xf800 0 0 7>;
99
+
interrupt-map =
100
+
<0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
101
+
<0x4800 0 0 2 &pci_intc 1>,
102
+
<0x4800 0 0 3 &pci_intc 2>,
103
+
<0x4800 0 0 4 &pci_intc 3>,
104
+
<0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
105
+
<0x5000 0 0 2 &pci_intc 2>,
106
+
<0x5000 0 0 3 &pci_intc 3>,
107
+
<0x5000 0 0 4 &pci_intc 0>,
108
+
<0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
109
+
<0x5800 0 0 2 &pci_intc 3>,
110
+
<0x5800 0 0 3 &pci_intc 0>,
111
+
<0x5800 0 0 4 &pci_intc 1>,
112
+
<0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
113
+
<0x6000 0 0 2 &pci_intc 0>,
114
+
<0x6000 0 0 3 &pci_intc 1>,
115
+
<0x6000 0 0 4 &pci_intc 2>;
116
+
};
95
117
};
96
118
};
+51
-3
arch/arm/boot/dts/gemini.dtsi
+51
-3
arch/arm/boot/dts/gemini.dtsi
···
75
75
#interrupt-cells = <2>;
76
76
};
77
77
78
+
power-controller@4b000000 {
79
+
compatible = "cortina,gemini-power-controller";
80
+
reg = <0x4b000000 0x100>;
81
+
interrupts = <26 IRQ_TYPE_EDGE_RISING>;
82
+
};
83
+
78
84
gpio0: gpio@4d000000 {
79
-
compatible = "cortina,gemini-gpio";
85
+
compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
80
86
reg = <0x4d000000 0x100>;
81
87
interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
82
88
gpio-controller;
···
92
86
};
93
87
94
88
gpio1: gpio@4e000000 {
95
-
compatible = "cortina,gemini-gpio";
89
+
compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
96
90
reg = <0x4e000000 0x100>;
97
91
interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
98
92
gpio-controller;
···
102
96
};
103
97
104
98
gpio2: gpio@4f000000 {
105
-
compatible = "cortina,gemini-gpio";
99
+
compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
106
100
reg = <0x4f000000 0x100>;
107
101
interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
108
102
gpio-controller;
109
103
#gpio-cells = <2>;
110
104
interrupt-controller;
111
105
#interrupt-cells = <2>;
106
+
};
107
+
108
+
pci@50000000 {
109
+
compatible = "cortina,gemini-pci", "faraday,ftpci100";
110
+
/*
111
+
* The first 256 bytes in the IO range is actually used
112
+
* to configure the host bridge.
113
+
*/
114
+
reg = <0x50000000 0x100>;
115
+
#address-cells = <3>;
116
+
#size-cells = <2>;
117
+
#interrupt-cells = <1>;
118
+
status = "disabled";
119
+
120
+
bus-range = <0x00 0xff>;
121
+
/* PCI ranges mappings */
122
+
ranges =
123
+
/* 1MiB I/O space 0x50000000-0x500fffff */
124
+
<0x01000000 0 0 0x50000000 0 0x00100000>,
125
+
/* 128MiB non-prefetchable memory 0x58000000-0x5fffffff */
126
+
<0x02000000 0 0x58000000 0x58000000 0 0x08000000>;
127
+
128
+
/* DMA ranges */
129
+
dma-ranges =
130
+
/* 128MiB at 0x00000000-0x07ffffff */
131
+
<0x02000000 0 0x00000000 0x00000000 0 0x08000000>,
132
+
/* 64MiB at 0x00000000-0x03ffffff */
133
+
<0x02000000 0 0x00000000 0x00000000 0 0x04000000>,
134
+
/* 64MiB at 0x00000000-0x03ffffff */
135
+
<0x02000000 0 0x00000000 0x00000000 0 0x04000000>;
136
+
137
+
/*
138
+
* This PCI host bridge variant has a cascaded interrupt
139
+
* controller embedded in the host bridge.
140
+
*/
141
+
pci_intc: interrupt-controller {
142
+
interrupt-parent = <&intcon>;
143
+
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
144
+
interrupt-controller;
145
+
#address-cells = <0>;
146
+
#interrupt-cells = <1>;
147
+
};
112
148
};
113
149
};
114
150
};