dt-bindings: Update Sibi Sankar's email address

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Update email address to the quicinc.com domain.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1654130923-18722-1-git-send-email-quic_sibis@quicinc.com

authored by

Sibi Sankar and committed by

Rob Herring 3 years ago f5f1a977 304e4d53

+3 -3

3 changed files

expand all

Documentation

devicetree

bindings

interconnect

qcom,osm-l3.yaml

reset

qcom,aoss-reset.yaml

qcom,pdc-global.yaml

+1 -1

Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml

··· 7 7 title: Qualcomm Operating State Manager (OSM) L3 Interconnect Provider 8 8 9 9 maintainers: 10 - - Sibi Sankar <sibis@codeaurora.org> 10 + - Sibi Sankar <quic_sibis@quicinc.com> 11 11 12 12 description: 13 13 L3 cache bandwidth requirements on Qualcomm SoCs is serviced by the OSM.

+1 -1

Documentation/devicetree/bindings/reset/qcom,aoss-reset.yaml

··· 7 7 title: Qualcomm AOSS Reset Controller 8 8 9 9 maintainers: 10 - - Sibi Sankar <sibis@codeaurora.org> 10 + - Sibi Sankar <quic_sibis@quicinc.com> 11 11 12 12 description: 13 13 The bindings describe the reset-controller found on AOSS-CC (always on

+1 -1

Documentation/devicetree/bindings/reset/qcom,pdc-global.yaml

··· 7 7 title: Qualcomm PDC Global 8 8 9 9 maintainers: 10 - - Sibi Sankar <sibis@codeaurora.org> 10 + - Sibi Sankar <quic_sibis@quicinc.com> 11 11 12 12 description: 13 13 The bindings describes the reset-controller found on PDC-Global (Power Domain