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kernel os linux

dmaengine: dw: platform: Split OF helpers to separate module

For better maintenance split OF helpers to the separate module.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-11-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Andy Shevchenko and committed by
Vinod Koul
f5e84eae b685fe26

+149 -113
+1
drivers/dma/dw/Makefile
··· 5 5 obj-$(CONFIG_DW_DMAC) += dw_dmac.o 6 6 dw_dmac-y := platform.o 7 7 dw_dmac-$(CONFIG_ACPI) += acpi.o 8 + dw_dmac-$(CONFIG_OF) += of.o 8 9 9 10 obj-$(CONFIG_DW_DMAC_PCI) += dw_dmac_pci.o 10 11 dw_dmac_pci-objs := pci.o
+15
drivers/dma/dw/internal.h
··· 31 31 static inline void dw_dma_acpi_controller_free(struct dw_dma *dw) {} 32 32 #endif /* !CONFIG_ACPI */ 33 33 34 + struct platform_device; 35 + 36 + #ifdef CONFIG_OF 37 + struct dw_dma_platform_data *dw_dma_parse_dt(struct platform_device *pdev); 38 + void dw_dma_of_controller_register(struct dw_dma *dw); 39 + void dw_dma_of_controller_free(struct dw_dma *dw); 40 + #else 41 + static inline struct dw_dma_platform_data *dw_dma_parse_dt(struct platform_device *pdev) 42 + { 43 + return NULL; 44 + } 45 + static inline void dw_dma_of_controller_register(struct dw_dma *dw) {} 46 + static inline void dw_dma_of_controller_free(struct dw_dma *dw) {} 47 + #endif 48 + 34 49 struct dw_dma_chip_pdata { 35 50 const struct dw_dma_platform_data *pdata; 36 51 int (*probe)(struct dw_dma_chip *chip);
+131
drivers/dma/dw/of.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Platform driver for the Synopsys DesignWare DMA Controller 4 + * 5 + * Copyright (C) 2007-2008 Atmel Corporation 6 + * Copyright (C) 2010-2011 ST Microelectronics 7 + * Copyright (C) 2013 Intel Corporation 8 + */ 9 + 10 + #include <linux/of.h> 11 + #include <linux/of_dma.h> 12 + #include <linux/platform_device.h> 13 + 14 + #include "internal.h" 15 + 16 + static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec, 17 + struct of_dma *ofdma) 18 + { 19 + struct dw_dma *dw = ofdma->of_dma_data; 20 + struct dw_dma_slave slave = { 21 + .dma_dev = dw->dma.dev, 22 + }; 23 + dma_cap_mask_t cap; 24 + 25 + if (dma_spec->args_count != 3) 26 + return NULL; 27 + 28 + slave.src_id = dma_spec->args[0]; 29 + slave.dst_id = dma_spec->args[0]; 30 + slave.m_master = dma_spec->args[1]; 31 + slave.p_master = dma_spec->args[2]; 32 + 33 + if (WARN_ON(slave.src_id >= DW_DMA_MAX_NR_REQUESTS || 34 + slave.dst_id >= DW_DMA_MAX_NR_REQUESTS || 35 + slave.m_master >= dw->pdata->nr_masters || 36 + slave.p_master >= dw->pdata->nr_masters)) 37 + return NULL; 38 + 39 + dma_cap_zero(cap); 40 + dma_cap_set(DMA_SLAVE, cap); 41 + 42 + /* TODO: there should be a simpler way to do this */ 43 + return dma_request_channel(cap, dw_dma_filter, &slave); 44 + } 45 + 46 + struct dw_dma_platform_data *dw_dma_parse_dt(struct platform_device *pdev) 47 + { 48 + struct device_node *np = pdev->dev.of_node; 49 + struct dw_dma_platform_data *pdata; 50 + u32 tmp, arr[DW_DMA_MAX_NR_MASTERS], mb[DW_DMA_MAX_NR_CHANNELS]; 51 + u32 nr_masters; 52 + u32 nr_channels; 53 + 54 + if (!np) { 55 + dev_err(&pdev->dev, "Missing DT data\n"); 56 + return NULL; 57 + } 58 + 59 + if (of_property_read_u32(np, "dma-masters", &nr_masters)) 60 + return NULL; 61 + if (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS) 62 + return NULL; 63 + 64 + if (of_property_read_u32(np, "dma-channels", &nr_channels)) 65 + return NULL; 66 + if (nr_channels > DW_DMA_MAX_NR_CHANNELS) 67 + return NULL; 68 + 69 + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 70 + if (!pdata) 71 + return NULL; 72 + 73 + pdata->nr_masters = nr_masters; 74 + pdata->nr_channels = nr_channels; 75 + 76 + if (!of_property_read_u32(np, "chan_allocation_order", &tmp)) 77 + pdata->chan_allocation_order = (unsigned char)tmp; 78 + 79 + if (!of_property_read_u32(np, "chan_priority", &tmp)) 80 + pdata->chan_priority = tmp; 81 + 82 + if (!of_property_read_u32(np, "block_size", &tmp)) 83 + pdata->block_size = tmp; 84 + 85 + if (!of_property_read_u32_array(np, "data-width", arr, nr_masters)) { 86 + for (tmp = 0; tmp < nr_masters; tmp++) 87 + pdata->data_width[tmp] = arr[tmp]; 88 + } else if (!of_property_read_u32_array(np, "data_width", arr, nr_masters)) { 89 + for (tmp = 0; tmp < nr_masters; tmp++) 90 + pdata->data_width[tmp] = BIT(arr[tmp] & 0x07); 91 + } 92 + 93 + if (!of_property_read_u32_array(np, "multi-block", mb, nr_channels)) { 94 + for (tmp = 0; tmp < nr_channels; tmp++) 95 + pdata->multi_block[tmp] = mb[tmp]; 96 + } else { 97 + for (tmp = 0; tmp < nr_channels; tmp++) 98 + pdata->multi_block[tmp] = 1; 99 + } 100 + 101 + if (!of_property_read_u32(np, "snps,dma-protection-control", &tmp)) { 102 + if (tmp > CHAN_PROTCTL_MASK) 103 + return NULL; 104 + pdata->protctl = tmp; 105 + } 106 + 107 + return pdata; 108 + } 109 + 110 + void dw_dma_of_controller_register(struct dw_dma *dw) 111 + { 112 + struct device *dev = dw->dma.dev; 113 + int ret; 114 + 115 + if (!dev->of_node) 116 + return; 117 + 118 + ret = of_dma_controller_register(dev->of_node, dw_dma_of_xlate, dw); 119 + if (ret) 120 + dev_err(dev, "could not register of_dma_controller\n"); 121 + } 122 + 123 + void dw_dma_of_controller_free(struct dw_dma *dw) 124 + { 125 + struct device *dev = dw->dma.dev; 126 + 127 + if (!dev->of_node) 128 + return; 129 + 130 + of_dma_controller_free(dev->of_node); 131 + }
+2 -113
drivers/dma/dw/platform.c
··· 17 17 #include <linux/dmaengine.h> 18 18 #include <linux/dma-mapping.h> 19 19 #include <linux/of.h> 20 - #include <linux/of_dma.h> 21 20 #include <linux/acpi.h> 22 21 23 22 #include "internal.h" 24 23 25 24 #define DRV_NAME "dw_dmac" 26 - 27 - static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec, 28 - struct of_dma *ofdma) 29 - { 30 - struct dw_dma *dw = ofdma->of_dma_data; 31 - struct dw_dma_slave slave = { 32 - .dma_dev = dw->dma.dev, 33 - }; 34 - dma_cap_mask_t cap; 35 - 36 - if (dma_spec->args_count != 3) 37 - return NULL; 38 - 39 - slave.src_id = dma_spec->args[0]; 40 - slave.dst_id = dma_spec->args[0]; 41 - slave.m_master = dma_spec->args[1]; 42 - slave.p_master = dma_spec->args[2]; 43 - 44 - if (WARN_ON(slave.src_id >= DW_DMA_MAX_NR_REQUESTS || 45 - slave.dst_id >= DW_DMA_MAX_NR_REQUESTS || 46 - slave.m_master >= dw->pdata->nr_masters || 47 - slave.p_master >= dw->pdata->nr_masters)) 48 - return NULL; 49 - 50 - dma_cap_zero(cap); 51 - dma_cap_set(DMA_SLAVE, cap); 52 - 53 - /* TODO: there should be a simpler way to do this */ 54 - return dma_request_channel(cap, dw_dma_filter, &slave); 55 - } 56 - 57 - #ifdef CONFIG_OF 58 - static struct dw_dma_platform_data * 59 - dw_dma_parse_dt(struct platform_device *pdev) 60 - { 61 - struct device_node *np = pdev->dev.of_node; 62 - struct dw_dma_platform_data *pdata; 63 - u32 tmp, arr[DW_DMA_MAX_NR_MASTERS], mb[DW_DMA_MAX_NR_CHANNELS]; 64 - u32 nr_masters; 65 - u32 nr_channels; 66 - 67 - if (!np) { 68 - dev_err(&pdev->dev, "Missing DT data\n"); 69 - return NULL; 70 - } 71 - 72 - if (of_property_read_u32(np, "dma-masters", &nr_masters)) 73 - return NULL; 74 - if (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS) 75 - return NULL; 76 - 77 - if (of_property_read_u32(np, "dma-channels", &nr_channels)) 78 - return NULL; 79 - if (nr_channels > DW_DMA_MAX_NR_CHANNELS) 80 - return NULL; 81 - 82 - pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 83 - if (!pdata) 84 - return NULL; 85 - 86 - pdata->nr_masters = nr_masters; 87 - pdata->nr_channels = nr_channels; 88 - 89 - if (!of_property_read_u32(np, "chan_allocation_order", &tmp)) 90 - pdata->chan_allocation_order = (unsigned char)tmp; 91 - 92 - if (!of_property_read_u32(np, "chan_priority", &tmp)) 93 - pdata->chan_priority = tmp; 94 - 95 - if (!of_property_read_u32(np, "block_size", &tmp)) 96 - pdata->block_size = tmp; 97 - 98 - if (!of_property_read_u32_array(np, "data-width", arr, nr_masters)) { 99 - for (tmp = 0; tmp < nr_masters; tmp++) 100 - pdata->data_width[tmp] = arr[tmp]; 101 - } else if (!of_property_read_u32_array(np, "data_width", arr, nr_masters)) { 102 - for (tmp = 0; tmp < nr_masters; tmp++) 103 - pdata->data_width[tmp] = BIT(arr[tmp] & 0x07); 104 - } 105 - 106 - if (!of_property_read_u32_array(np, "multi-block", mb, nr_channels)) { 107 - for (tmp = 0; tmp < nr_channels; tmp++) 108 - pdata->multi_block[tmp] = mb[tmp]; 109 - } else { 110 - for (tmp = 0; tmp < nr_channels; tmp++) 111 - pdata->multi_block[tmp] = 1; 112 - } 113 - 114 - if (!of_property_read_u32(np, "snps,dma-protection-control", &tmp)) { 115 - if (tmp > CHAN_PROTCTL_MASK) 116 - return NULL; 117 - pdata->protctl = tmp; 118 - } 119 - 120 - return pdata; 121 - } 122 - #else 123 - static inline struct dw_dma_platform_data * 124 - dw_dma_parse_dt(struct platform_device *pdev) 125 - { 126 - return NULL; 127 - } 128 - #endif 129 25 130 26 static int dw_probe(struct platform_device *pdev) 131 27 { ··· 81 185 82 186 platform_set_drvdata(pdev, data); 83 187 84 - if (pdev->dev.of_node) { 85 - err = of_dma_controller_register(pdev->dev.of_node, 86 - dw_dma_of_xlate, chip->dw); 87 - if (err) 88 - dev_err(&pdev->dev, 89 - "could not register of_dma_controller\n"); 90 - } 188 + dw_dma_of_controller_register(chip->dw); 91 189 92 190 dw_dma_acpi_controller_register(chip->dw); 93 191 ··· 101 211 102 212 dw_dma_acpi_controller_free(chip->dw); 103 213 104 - if (pdev->dev.of_node) 105 - of_dma_controller_free(pdev->dev.of_node); 214 + dw_dma_of_controller_free(chip->dw); 106 215 107 216 ret = data->remove(chip); 108 217 if (ret)