tjh.dev / kernel
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[media] m88ds3103: use Hz instead of kHz on calculations

There was some calculations where was kHz used in order to keep
calculation withing 32-bit. Convert all to Hz and use 64-bit
division helpers where needed.

Signed-off-by: Antti Palosaari <crope@iki.fi>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>

authored by

Antti Palosaari and committed by
Mauro Carvalho Chehab f5d9b88d 334ef18e

+26 -27
+25 -25
drivers/media/dvb-frontends/m88ds3103.c
··· 307 307 u8 u8tmp, u8tmp1 = 0, u8tmp2 = 0; /* silence compiler warning */ 308 308 u8 buf[3]; 309 309 u16 u16tmp; 310 - u32 tuner_frequency, target_mclk; 310 + u32 tuner_frequency_khz, target_mclk; 311 311 s32 s32tmp; 312 312 313 313 dev_dbg(&client->dev, ··· 344 344 } 345 345 346 346 if (fe->ops.tuner_ops.get_frequency) { 347 - ret = fe->ops.tuner_ops.get_frequency(fe, &tuner_frequency); 347 + ret = fe->ops.tuner_ops.get_frequency(fe, &tuner_frequency_khz); 348 348 if (ret) 349 349 goto err; 350 350 } else { ··· 353 353 * actual frequency used. Carrier offset calculation is not 354 354 * valid. 355 355 */ 356 - tuner_frequency = c->frequency; 356 + tuner_frequency_khz = c->frequency; 357 357 } 358 358 359 359 /* select M88RS6000 demod main mclk and ts mclk from tuner die. */ 360 360 if (dev->chip_id == M88RS6000_CHIP_ID) { 361 361 if (c->symbol_rate > 45010000) 362 - dev->mclk_khz = 110250; 362 + dev->mclk = 110250000; 363 363 else 364 - dev->mclk_khz = 96000; 364 + dev->mclk = 96000000; 365 365 366 366 if (c->delivery_system == SYS_DVBS) 367 - target_mclk = 96000; 367 + target_mclk = 96000000; 368 368 else 369 - target_mclk = 144000; 369 + target_mclk = 144000000; 370 370 371 371 /* Enable demod clock path */ 372 372 ret = regmap_write(dev->regmap, 0x06, 0x00); ··· 375 375 usleep_range(10000, 20000); 376 376 } else { 377 377 /* set M88DS3103 mclk and ts mclk. */ 378 - dev->mclk_khz = 96000; 378 + dev->mclk = 96000000; 379 379 380 380 switch (dev->cfg->ts_mode) { 381 381 case M88DS3103_TS_SERIAL: ··· 385 385 case M88DS3103_TS_PARALLEL: 386 386 case M88DS3103_TS_CI: 387 387 if (c->delivery_system == SYS_DVBS) 388 - target_mclk = 96000; 388 + target_mclk = 96000000; 389 389 else { 390 390 if (c->symbol_rate < 18000000) 391 - target_mclk = 96000; 391 + target_mclk = 96000000; 392 392 else if (c->symbol_rate < 28000000) 393 - target_mclk = 144000; 393 + target_mclk = 144000000; 394 394 else 395 - target_mclk = 192000; 395 + target_mclk = 192000000; 396 396 } 397 397 break; 398 398 default: ··· 402 402 } 403 403 404 404 switch (target_mclk) { 405 - case 96000: 405 + case 96000000: 406 406 u8tmp1 = 0x02; /* 0b10 */ 407 407 u8tmp2 = 0x01; /* 0b01 */ 408 408 break; 409 - case 144000: 409 + case 144000000: 410 410 u8tmp1 = 0x00; /* 0b00 */ 411 411 u8tmp2 = 0x01; /* 0b01 */ 412 412 break; 413 - case 192000: 413 + case 192000000: 414 414 u8tmp1 = 0x03; /* 0b11 */ 415 415 u8tmp2 = 0x00; /* 0b00 */ 416 416 break; ··· 464 464 } 465 465 466 466 if (dev->chip_id == M88RS6000_CHIP_ID) { 467 - if ((c->delivery_system == SYS_DVBS2) 468 - && ((c->symbol_rate / 1000) <= 5000)) { 467 + if (c->delivery_system == SYS_DVBS2 && 468 + c->symbol_rate <= 5000000) { 469 469 ret = regmap_write(dev->regmap, 0xc0, 0x04); 470 470 if (ret) 471 471 goto err; ··· 532 532 u8tmp2 = DIV_ROUND_UP(u16tmp, 2) - 1; 533 533 } 534 534 535 - dev_dbg(&client->dev, "target_mclk=%d ts_clk=%d ts_clk_divide_ratio=%u\n", 535 + dev_dbg(&client->dev, "target_mclk=%u ts_clk=%u ts_clk_divide_ratio=%u\n", 536 536 target_mclk, dev->cfg->ts_clk, u16tmp); 537 537 538 538 /* u8tmp1[5:2] => fe[3:0], u8tmp1[1:0] => ea[7:6] */ ··· 569 569 if (ret) 570 570 goto err; 571 571 572 - u16tmp = DIV_ROUND_CLOSEST((c->symbol_rate / 1000) << 15, dev->mclk_khz / 2); 572 + u16tmp = DIV_ROUND_CLOSEST_ULL((u64)c->symbol_rate * 0x10000, dev->mclk); 573 573 buf[0] = (u16tmp >> 0) & 0xff; 574 574 buf[1] = (u16tmp >> 8) & 0xff; 575 575 ret = regmap_bulk_write(dev->regmap, 0x61, buf, 2); ··· 589 589 goto err; 590 590 591 591 dev_dbg(&client->dev, "carrier offset=%d\n", 592 - (tuner_frequency - c->frequency)); 592 + (tuner_frequency_khz - c->frequency)); 593 593 594 - s32tmp = 0x10000 * (tuner_frequency - c->frequency); 595 - s32tmp = DIV_ROUND_CLOSEST(s32tmp, dev->mclk_khz); 594 + /* Use 32-bit calc as there is no s64 version of DIV_ROUND_CLOSEST() */ 595 + s32tmp = 0x10000 * (tuner_frequency_khz - c->frequency); 596 + s32tmp = DIV_ROUND_CLOSEST(s32tmp, dev->mclk / 1000); 596 597 buf[0] = (s32tmp >> 0) & 0xff; 597 598 buf[1] = (s32tmp >> 8) & 0xff; 598 599 ret = regmap_bulk_write(dev->regmap, 0x5e, buf, 2); ··· 938 937 if (ret) 939 938 goto err; 940 939 941 - c->symbol_rate = 1ull * ((buf[1] << 8) | (buf[0] << 0)) * 942 - dev->mclk_khz * 1000 / 0x10000; 940 + c->symbol_rate = DIV_ROUND_CLOSEST_ULL((u64)(buf[1] << 8 | buf[0] << 0) * dev->mclk, 0x10000); 943 941 944 942 return 0; 945 943 err: ··· 1381 1381 dev->config.clock = pdata->clk; 1382 1382 dev->config.i2c_wr_max = pdata->i2c_wr_max; 1383 1383 dev->config.ts_mode = pdata->ts_mode; 1384 - dev->config.ts_clk = pdata->ts_clk; 1384 + dev->config.ts_clk = pdata->ts_clk * 1000; 1385 1385 dev->config.ts_clk_pol = pdata->ts_clk_pol; 1386 1386 dev->config.spec_inv = pdata->spec_inv; 1387 1387 dev->config.agc_inv = pdata->agc_inv;
+1 -2
drivers/media/dvb-frontends/m88ds3103_priv.h
··· 27 27 28 28 #define M88DS3103_FIRMWARE "dvb-demod-m88ds3103.fw" 29 29 #define M88RS6000_FIRMWARE "dvb-demod-m88rs6000.fw" 30 - #define M88DS3103_MCLK_KHZ 96000 31 30 #define M88RS6000_CHIP_ID 0x74 32 31 #define M88DS3103_CHIP_ID 0x70 33 32 ··· 45 46 /* auto detect chip id to do different config */ 46 47 u8 chip_id; 47 48 /* main mclk is calculated for M88RS6000 dynamically */ 48 - s32 mclk_khz; 49 + s32 mclk; 49 50 u64 post_bit_error; 50 51 u64 post_bit_count; 51 52 };