clk: mxs: Use a better name for the USB PHY clock

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Use a better name for the USB PHY clock.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

authored by

Fabio Estevam and committed by

Mike Turquette 13 years ago f5894539 90d4971d

+11 -11

4 changed files

expand all

Documentation

devicetree

bindings

clock

imx23-clock.txt

imx28-clock.txt

drivers

clk

mxs

clk-imx23.c

clk-imx28.c

+1 -1

Documentation/devicetree/bindings/clock/imx23-clock.txt

··· 52 52 lcdif 38 53 53 etm 39 54 54 usb 40 55 - usb_pwr 41 55 + usb_phy 41 56 56 57 57 Examples: 58 58

+2 -2

Documentation/devicetree/bindings/clock/imx28-clock.txt

··· 73 73 can1 59 74 74 usb0 60 75 75 usb1 61 76 - usb0_pwr 62 77 - usb1_pwr 63 76 + usb0_phy 62 77 + usb1_phy 63 78 78 enet_out 64 79 79 80 80 Examples:

+3 -3

drivers/clk/mxs/clk-imx23.c

··· 85 85 cpu_xtal, hbus, xbus, lcdif_div, ssp_div, gpmi_div, emi_pll, 86 86 emi_xtal, etm_div, saif_div, clk32k_div, rtc, adc, spdif_div, 87 87 clk32k, dri, pwm, filt, uart, ssp, gpmi, spdif, emi, saif, 88 - lcdif, etm, usb, usb_pwr, 88 + lcdif, etm, usb, usb_phy, 89 89 clk_max 90 90 }; 91 91 ··· 143 143 clks[saif] = mxs_clk_gate("saif", "saif_div", SAIF, 31); 144 144 clks[lcdif] = mxs_clk_gate("lcdif", "lcdif_div", PIX, 31); 145 145 clks[etm] = mxs_clk_gate("etm", "etm_div", ETM, 31); 146 - clks[usb] = mxs_clk_gate("usb", "usb_pwr", DIGCTRL, 2); 147 - clks[usb_pwr] = clk_register_gate(NULL, "usb_pwr", "pll", 0, PLLCTRL0, 18, 0, &mxs_lock); 146 + clks[usb] = mxs_clk_gate("usb", "usb_phy", DIGCTRL, 2); 147 + clks[usb_phy] = clk_register_gate(NULL, "usb_phy", "pll", 0, PLLCTRL0, 18, 0, &mxs_lock); 148 148 149 149 for (i = 0; i < ARRAY_SIZE(clks); i++) 150 150 if (IS_ERR(clks[i])) {

+5 -5

drivers/clk/mxs/clk-imx28.c

··· 140 140 emi_xtal, lcdif_div, etm_div, ptp, saif0_div, saif1_div, 141 141 clk32k_div, rtc, lradc, spdif_div, clk32k, pwm, uart, ssp0, 142 142 ssp1, ssp2, ssp3, gpmi, spdif, emi, saif0, saif1, lcdif, etm, 143 - fec, can0, can1, usb0, usb1, usb0_pwr, usb1_pwr, enet_out, 143 + fec, can0, can1, usb0, usb1, usb0_phy, usb1_phy, enet_out, 144 144 clk_max 145 145 }; 146 146 ··· 218 218 clks[fec] = mxs_clk_gate("fec", "hbus", ENET, 30); 219 219 clks[can0] = mxs_clk_gate("can0", "ref_xtal", FLEXCAN, 30); 220 220 clks[can1] = mxs_clk_gate("can1", "ref_xtal", FLEXCAN, 28); 221 - clks[usb0] = mxs_clk_gate("usb0", "usb0_pwr", DIGCTRL, 2); 222 - clks[usb1] = mxs_clk_gate("usb1", "usb1_pwr", DIGCTRL, 16); 223 - clks[usb0_pwr] = clk_register_gate(NULL, "usb0_pwr", "pll0", 0, PLL0CTRL0, 18, 0, &mxs_lock); 224 - clks[usb1_pwr] = clk_register_gate(NULL, "usb1_pwr", "pll1", 0, PLL1CTRL0, 18, 0, &mxs_lock); 221 + clks[usb0] = mxs_clk_gate("usb0", "usb0_phy", DIGCTRL, 2); 222 + clks[usb1] = mxs_clk_gate("usb1", "usb1_phy", DIGCTRL, 16); 223 + clks[usb0_phy] = clk_register_gate(NULL, "usb0_phy", "pll0", 0, PLL0CTRL0, 18, 0, &mxs_lock); 224 + clks[usb1_phy] = clk_register_gate(NULL, "usb1_phy", "pll1", 0, PLL1CTRL0, 18, 0, &mxs_lock); 225 225 clks[enet_out] = clk_register_gate(NULL, "enet_out", "pll2", 0, ENET, 18, 0, &mxs_lock); 226 226 227 227 for (i = 0; i < ARRAY_SIZE(clks); i++)