Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

gpio: zynq: fix zynqmp_gpio not an immutable chip warning

Make the struct irq_chip const and flag it as IRQCHIP_IMMUTABLE,
call gpiochip_disable_irq() in the .irq_mask() callback and
gpiochip_enable_irq() in the .irq_unmask() callback to fix
"gpio gpiochip1: (zynqmp_gpio): not an immutable chip" warning.

Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

authored by

Manikanta Guntupalli and committed by
Bartosz Golaszewski
f5691439 8507f354

+15 -7
+15 -7
drivers/gpio/gpio-zynq.c
··· 151 151 int bank_max[ZYNQMP_GPIO_MAX_BANK]; 152 152 }; 153 153 154 - static struct irq_chip zynq_gpio_level_irqchip; 155 - static struct irq_chip zynq_gpio_edge_irqchip; 154 + static const struct irq_chip zynq_gpio_level_irqchip; 155 + static const struct irq_chip zynq_gpio_edge_irqchip; 156 156 157 157 /** 158 158 * zynq_gpio_is_zynq - test if HW is zynq or zynqmp ··· 404 404 static void zynq_gpio_irq_mask(struct irq_data *irq_data) 405 405 { 406 406 unsigned int device_pin_num, bank_num, bank_pin_num; 407 + const unsigned long offset = irqd_to_hwirq(irq_data); 408 + struct gpio_chip *chip = irq_data_get_irq_chip_data(irq_data); 407 409 struct zynq_gpio *gpio = 408 410 gpiochip_get_data(irq_data_get_irq_chip_data(irq_data)); 409 411 412 + gpiochip_disable_irq(chip, offset); 410 413 device_pin_num = irq_data->hwirq; 411 414 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); 412 415 writel_relaxed(BIT(bank_pin_num), ··· 428 425 static void zynq_gpio_irq_unmask(struct irq_data *irq_data) 429 426 { 430 427 unsigned int device_pin_num, bank_num, bank_pin_num; 428 + const unsigned long offset = irqd_to_hwirq(irq_data); 429 + struct gpio_chip *chip = irq_data_get_irq_chip_data(irq_data); 431 430 struct zynq_gpio *gpio = 432 431 gpiochip_get_data(irq_data_get_irq_chip_data(irq_data)); 433 432 433 + gpiochip_enable_irq(chip, offset); 434 434 device_pin_num = irq_data->hwirq; 435 435 zynq_gpio_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num, gpio); 436 436 writel_relaxed(BIT(bank_pin_num), ··· 596 590 } 597 591 598 592 /* irq chip descriptor */ 599 - static struct irq_chip zynq_gpio_level_irqchip = { 593 + static const struct irq_chip zynq_gpio_level_irqchip = { 600 594 .name = DRIVER_NAME, 601 595 .irq_enable = zynq_gpio_irq_enable, 602 596 .irq_eoi = zynq_gpio_irq_ack, ··· 607 601 .irq_request_resources = zynq_gpio_irq_reqres, 608 602 .irq_release_resources = zynq_gpio_irq_relres, 609 603 .flags = IRQCHIP_EOI_THREADED | IRQCHIP_EOI_IF_HANDLED | 610 - IRQCHIP_MASK_ON_SUSPEND, 604 + IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE, 605 + GPIOCHIP_IRQ_RESOURCE_HELPERS, 611 606 }; 612 607 613 - static struct irq_chip zynq_gpio_edge_irqchip = { 608 + static const struct irq_chip zynq_gpio_edge_irqchip = { 614 609 .name = DRIVER_NAME, 615 610 .irq_enable = zynq_gpio_irq_enable, 616 611 .irq_ack = zynq_gpio_irq_ack, ··· 621 614 .irq_set_wake = zynq_gpio_set_wake, 622 615 .irq_request_resources = zynq_gpio_irq_reqres, 623 616 .irq_release_resources = zynq_gpio_irq_relres, 624 - .flags = IRQCHIP_MASK_ON_SUSPEND, 617 + .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE, 618 + GPIOCHIP_IRQ_RESOURCE_HELPERS, 625 619 }; 626 620 627 621 static void zynq_gpio_handle_bank_irq(struct zynq_gpio *gpio, ··· 970 962 971 963 /* Set up the GPIO irqchip */ 972 964 girq = &chip->irq; 973 - girq->chip = &zynq_gpio_edge_irqchip; 965 + gpio_irq_chip_set_chip(girq, &zynq_gpio_edge_irqchip); 974 966 girq->parent_handler = zynq_gpio_irqhandler; 975 967 girq->num_parents = 1; 976 968 girq->parents = devm_kcalloc(&pdev->dev, 1,