Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drivers: usb: fsl: Modify phy clk valid bit checking

Phy_clk_valid bit is checked only when the boolean
property phy-clk-valid in present in usb node device tree.
This property is added to the usb node via device tree fixup.

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Nikhil Badola and committed by
Greg Kroah-Hartman
f4fdfaa2 6009d95e

+18 -8
+8 -8
drivers/usb/host/ehci-fsl.c
··· 230 230 break; 231 231 } 232 232 233 - if (pdata->have_sysif_regs && 234 - pdata->controller_ver > FSL_USB_VER_1_6 && 235 - (phy_mode == FSL_USB2_PHY_ULPI)) { 236 - /* check PHY_CLK_VALID to get phy clk valid */ 237 - if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) & 238 - PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0) || 239 - in_be32(non_ehci + FSL_SOC_USB_PRICTRL))) { 240 - dev_warn(hcd->self.controller, "USB PHY clock invalid\n"); 233 + /* 234 + * check PHY_CLK_VALID to determine phy clock presence before writing 235 + * to portsc 236 + */ 237 + if (pdata->check_phy_clk_valid) { 238 + if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID)) { 239 + dev_warn(hcd->self.controller, 240 + "USB PHY clock invalid\n"); 241 241 return -EINVAL; 242 242 } 243 243 }
+9
drivers/usb/host/fsl-mph-dr-of.c
··· 222 222 else 223 223 pdata->has_fsl_erratum_a007792 = 0; 224 224 225 + /* 226 + * Determine whether phy_clk_valid needs to be checked 227 + * by reading property in device tree 228 + */ 229 + if (of_get_property(np, "phy-clk-valid", NULL)) 230 + pdata->check_phy_clk_valid = 1; 231 + else 232 + pdata->check_phy_clk_valid = 0; 233 + 225 234 if (pdata->have_sysif_regs) { 226 235 if (pdata->controller_ver == FSL_USB_VER_NONE) { 227 236 dev_warn(&ofdev->dev, "Could not get controller version\n");
+1
include/linux/fsl_devices.h
··· 99 99 unsigned suspended:1; 100 100 unsigned already_suspended:1; 101 101 unsigned has_fsl_erratum_a007792:1; 102 + unsigned check_phy_clk_valid:1; 102 103 103 104 /* register save area for suspend/resume */ 104 105 u32 pm_command;