Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: OMAP: Sync headers with linux-omap

This patch syncs omap specific headers with linux-omap.
Most of the changes needed because of bitrot caused by
driver changes in linux-omap tree. Integrating this
is needed for adding support for various omap drivers.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by

Tony Lindgren and committed by
Russell King
f4e4c324 994c84ea

+333 -387
+2 -2
include/asm-arm/arch-omap/aic23.h
··· 110 110 #define TLV320AIC23ID1 (0x1a) // cs low 111 111 #define TLV320AIC23ID2 (0x1b) // cs high 112 112 113 - void tlv320aic23_power_up(void); 114 - void tlv320aic23_power_down(void); 113 + void aic23_power_up(void); 114 + void aic23_power_down(void); 115 115 116 116 #endif /* __ASM_ARCH_AIC23_H */
-9
include/asm-arm/arch-omap/board-apollon.h
··· 30 30 #define __ASM_ARCH_OMAP_APOLLON_H 31 31 32 32 /* Placeholder for APOLLON specific defines */ 33 - /* GPMC CS0 */ 34 - #define APOLLON_CS0_BASE 0x00000000 35 - /* GPMC CS1 */ 36 - #define APOLLON_CS1_BASE 0x08000000 37 - #define APOLLON_ETHR_START (APOLLON_CS1_BASE + 0x300) 38 33 #define APOLLON_ETHR_GPIO_IRQ 74 39 - /* GPMC CS2 - reserved for OneNAND */ 40 - #define APOLLON_CS2_BASE 0x10000000 41 - /* GPMC CS3 - reserved for NOR or NAND */ 42 - #define APOLLON_CS3_BASE 0x18000000 43 34 44 35 #endif /* __ASM_ARCH_OMAP_APOLLON_H */ 45 36
-3
include/asm-arm/arch-omap/board-h4.h
··· 30 30 #define __ASM_ARCH_OMAP_H4_H 31 31 32 32 /* Placeholder for H4 specific defines */ 33 - /* GPMC CS1 */ 34 - #define OMAP24XX_ETHR_START 0x08000300 35 33 #define OMAP24XX_ETHR_GPIO_IRQ 92 36 - #define H4_CS0_BASE 0x04000000 37 34 #endif /* __ASM_ARCH_OMAP_H4_H */ 38 35
+22 -15
include/asm-arm/arch-omap/board.h
··· 12 12 13 13 #include <linux/types.h> 14 14 15 + #include <asm/arch/gpio-switch.h> 16 + 15 17 /* Different peripheral ids */ 16 18 #define OMAP_TAG_CLOCK 0x4f01 17 19 #define OMAP_TAG_MMC 0x4f02 ··· 101 99 struct omap_lcd_config { 102 100 char panel_name[16]; 103 101 char ctrl_name[16]; 102 + s16 nreset_gpio; 103 + u8 data_lines; 104 + }; 105 + 106 + struct device; 107 + struct fb_info; 108 + struct omap_backlight_config { 109 + int default_intensity; 110 + int (*set_power)(struct device *dev, int state); 111 + int (*check_fb)(struct fb_info *fb); 104 112 }; 105 113 106 114 struct omap_fbmem_config { 107 - u32 fb_sram_start; 108 - u32 fb_sram_size; 109 - u32 fb_sdram_start; 110 - u32 fb_sdram_size; 115 + u32 start; 116 + u32 size; 111 117 }; 112 118 113 - /* Cover: 114 - * high -> closed 115 - * low -> open 116 - * Connection: 117 - * high -> connected 118 - * low -> disconnected 119 - */ 120 - #define OMAP_GPIO_SWITCH_TYPE_COVER 0x0000 121 - #define OMAP_GPIO_SWITCH_TYPE_CONNECTION 0x0001 122 - #define OMAP_GPIO_SWITCH_FLAG_INVERTED 0x0001 123 - #define OMAP_GPIO_SWITCH_FLAG_OUTPUT 0x0002 119 + struct omap_pwm_led_platform_data { 120 + const char *name; 121 + int intensity_timer; 122 + int blink_timer; 123 + void (*set_power)(struct omap_pwm_led_platform_data *self, int on_off); 124 + }; 125 + 126 + /* See include/asm-arm/arch-omap/gpio-switch.h for definitions */ 124 127 struct omap_gpio_switch_config { 125 128 char name[12]; 126 129 u16 gpio;
-250
include/asm-arm/arch-omap/dsp.h
··· 1 - /* 2 - * linux/include/asm-arm/arch-omap/dsp.h 3 - * 4 - * Header for OMAP DSP driver 5 - * 6 - * Copyright (C) 2002-2005 Nokia Corporation 7 - * 8 - * Written by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com> 9 - * 10 - * This program is free software; you can redistribute it and/or modify 11 - * it under the terms of the GNU General Public License as published by 12 - * the Free Software Foundation; either version 2 of the License, or 13 - * (at your option) any later version. 14 - * 15 - * This program is distributed in the hope that it will be useful, 16 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 - * GNU General Public License for more details. 19 - * 20 - * You should have received a copy of the GNU General Public License 21 - * along with this program; if not, write to the Free Software 22 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 - * 24 - * 2005/06/01: DSP Gateway version 3.3 25 - */ 26 - 27 - #ifndef ASM_ARCH_DSP_H 28 - #define ASM_ARCH_DSP_H 29 - 30 - 31 - /* 32 - * for /dev/dspctl/ctl 33 - */ 34 - #define OMAP_DSP_IOCTL_RESET 1 35 - #define OMAP_DSP_IOCTL_RUN 2 36 - #define OMAP_DSP_IOCTL_SETRSTVECT 3 37 - #define OMAP_DSP_IOCTL_CPU_IDLE 4 38 - #define OMAP_DSP_IOCTL_MPUI_WORDSWAP_ON 5 39 - #define OMAP_DSP_IOCTL_MPUI_WORDSWAP_OFF 6 40 - #define OMAP_DSP_IOCTL_MPUI_BYTESWAP_ON 7 41 - #define OMAP_DSP_IOCTL_MPUI_BYTESWAP_OFF 8 42 - #define OMAP_DSP_IOCTL_GBL_IDLE 9 43 - #define OMAP_DSP_IOCTL_DSPCFG 10 44 - #define OMAP_DSP_IOCTL_DSPUNCFG 11 45 - #define OMAP_DSP_IOCTL_TASKCNT 12 46 - #define OMAP_DSP_IOCTL_POLL 13 47 - #define OMAP_DSP_IOCTL_REGMEMR 40 48 - #define OMAP_DSP_IOCTL_REGMEMW 41 49 - #define OMAP_DSP_IOCTL_REGIOR 42 50 - #define OMAP_DSP_IOCTL_REGIOW 43 51 - #define OMAP_DSP_IOCTL_GETVAR 44 52 - #define OMAP_DSP_IOCTL_SETVAR 45 53 - #define OMAP_DSP_IOCTL_RUNLEVEL 50 54 - #define OMAP_DSP_IOCTL_SUSPEND 51 55 - #define OMAP_DSP_IOCTL_RESUME 52 56 - #define OMAP_DSP_IOCTL_FBEN 53 57 - #define OMAP_DSP_IOCTL_FBDIS 54 58 - #define OMAP_DSP_IOCTL_MBSEND 99 59 - 60 - /* 61 - * for taskdev 62 - * (ioctls below should be >= 0x10000) 63 - */ 64 - #define OMAP_DSP_TASK_IOCTL_BFLSH 0x10000 65 - #define OMAP_DSP_TASK_IOCTL_SETBSZ 0x10001 66 - #define OMAP_DSP_TASK_IOCTL_LOCK 0x10002 67 - #define OMAP_DSP_TASK_IOCTL_UNLOCK 0x10003 68 - #define OMAP_DSP_TASK_IOCTL_GETNAME 0x10004 69 - 70 - /* 71 - * for /dev/dspctl/mem 72 - */ 73 - #define OMAP_DSP_MEM_IOCTL_EXMAP 1 74 - #define OMAP_DSP_MEM_IOCTL_EXUNMAP 2 75 - #define OMAP_DSP_MEM_IOCTL_EXMAP_FLUSH 3 76 - #define OMAP_DSP_MEM_IOCTL_FBEXPORT 5 77 - #define OMAP_DSP_MEM_IOCTL_MMUITACK 7 78 - #define OMAP_DSP_MEM_IOCTL_MMUINIT 9 79 - #define OMAP_DSP_MEM_IOCTL_KMEM_RESERVE 11 80 - #define OMAP_DSP_MEM_IOCTL_KMEM_RELEASE 12 81 - 82 - struct omap_dsp_mapinfo { 83 - unsigned long dspadr; 84 - unsigned long size; 85 - }; 86 - 87 - /* 88 - * for /dev/dspctl/twch 89 - */ 90 - #define OMAP_DSP_TWCH_IOCTL_MKDEV 1 91 - #define OMAP_DSP_TWCH_IOCTL_RMDEV 2 92 - #define OMAP_DSP_TWCH_IOCTL_TADD 11 93 - #define OMAP_DSP_TWCH_IOCTL_TDEL 12 94 - #define OMAP_DSP_TWCH_IOCTL_TKILL 13 95 - 96 - #define OMAP_DSP_DEVSTATE_NOTASK 0x00000001 97 - #define OMAP_DSP_DEVSTATE_ATTACHED 0x00000002 98 - #define OMAP_DSP_DEVSTATE_GARBAGE 0x00000004 99 - #define OMAP_DSP_DEVSTATE_INVALID 0x00000008 100 - #define OMAP_DSP_DEVSTATE_ADDREQ 0x00000100 101 - #define OMAP_DSP_DEVSTATE_DELREQ 0x00000200 102 - #define OMAP_DSP_DEVSTATE_ADDFAIL 0x00001000 103 - #define OMAP_DSP_DEVSTATE_ADDING 0x00010000 104 - #define OMAP_DSP_DEVSTATE_DELING 0x00020000 105 - #define OMAP_DSP_DEVSTATE_KILLING 0x00040000 106 - #define OMAP_DSP_DEVSTATE_STATE_MASK 0x7fffffff 107 - #define OMAP_DSP_DEVSTATE_STALE 0x80000000 108 - 109 - struct omap_dsp_taddinfo { 110 - unsigned char minor; 111 - unsigned long taskadr; 112 - }; 113 - #define OMAP_DSP_TADD_ABORTADR 0xffffffff 114 - 115 - 116 - /* 117 - * error cause definition (for error detection device) 118 - */ 119 - #define OMAP_DSP_ERRDT_WDT 0x00000001 120 - #define OMAP_DSP_ERRDT_MMU 0x00000002 121 - 122 - 123 - /* 124 - * mailbox protocol definitions 125 - */ 126 - 127 - struct omap_dsp_mailbox_cmd { 128 - unsigned short cmd; 129 - unsigned short data; 130 - }; 131 - 132 - struct omap_dsp_reginfo { 133 - unsigned short adr; 134 - unsigned short val; 135 - }; 136 - 137 - struct omap_dsp_varinfo { 138 - unsigned char varid; 139 - unsigned short val[0]; 140 - }; 141 - 142 - #define OMAP_DSP_MBPROT_REVISION 0x0019 143 - 144 - #define OMAP_DSP_MBCMD_WDSND 0x10 145 - #define OMAP_DSP_MBCMD_WDREQ 0x11 146 - #define OMAP_DSP_MBCMD_BKSND 0x20 147 - #define OMAP_DSP_MBCMD_BKREQ 0x21 148 - #define OMAP_DSP_MBCMD_BKYLD 0x23 149 - #define OMAP_DSP_MBCMD_BKSNDP 0x24 150 - #define OMAP_DSP_MBCMD_BKREQP 0x25 151 - #define OMAP_DSP_MBCMD_TCTL 0x30 152 - #define OMAP_DSP_MBCMD_TCTLDATA 0x31 153 - #define OMAP_DSP_MBCMD_POLL 0x32 154 - #define OMAP_DSP_MBCMD_WDT 0x50 /* v3.3: obsolete */ 155 - #define OMAP_DSP_MBCMD_RUNLEVEL 0x51 156 - #define OMAP_DSP_MBCMD_PM 0x52 157 - #define OMAP_DSP_MBCMD_SUSPEND 0x53 158 - #define OMAP_DSP_MBCMD_KFUNC 0x54 159 - #define OMAP_DSP_MBCMD_TCFG 0x60 160 - #define OMAP_DSP_MBCMD_TADD 0x62 161 - #define OMAP_DSP_MBCMD_TDEL 0x63 162 - #define OMAP_DSP_MBCMD_TSTOP 0x65 163 - #define OMAP_DSP_MBCMD_DSPCFG 0x70 164 - #define OMAP_DSP_MBCMD_REGRW 0x72 165 - #define OMAP_DSP_MBCMD_GETVAR 0x74 166 - #define OMAP_DSP_MBCMD_SETVAR 0x75 167 - #define OMAP_DSP_MBCMD_ERR 0x78 168 - #define OMAP_DSP_MBCMD_DBG 0x79 169 - 170 - #define OMAP_DSP_MBCMD_TCTL_TINIT 0x0000 171 - #define OMAP_DSP_MBCMD_TCTL_TEN 0x0001 172 - #define OMAP_DSP_MBCMD_TCTL_TDIS 0x0002 173 - #define OMAP_DSP_MBCMD_TCTL_TCLR 0x0003 174 - #define OMAP_DSP_MBCMD_TCTL_TCLR_FORCE 0x0004 175 - 176 - #define OMAP_DSP_MBCMD_RUNLEVEL_USER 0x01 177 - #define OMAP_DSP_MBCMD_RUNLEVEL_SUPER 0x0e 178 - #define OMAP_DSP_MBCMD_RUNLEVEL_RECOVERY 0x10 179 - 180 - #define OMAP_DSP_MBCMD_PM_DISABLE 0x00 181 - #define OMAP_DSP_MBCMD_PM_ENABLE 0x01 182 - 183 - #define OMAP_DSP_MBCMD_KFUNC_FBCTL 0x00 184 - #define OMAP_DSP_MBCMD_KFUNC_AUDIO_PWR 0x01 185 - 186 - #define OMAP_DSP_MBCMD_FBCTL_UPD 0x0000 187 - #define OMAP_DSP_MBCMD_FBCTL_ENABLE 0x0002 188 - #define OMAP_DSP_MBCMD_FBCTL_DISABLE 0x0003 189 - 190 - #define OMAP_DSP_MBCMD_AUDIO_PWR_UP 0x0000 191 - #define OMAP_DSP_MBCMD_AUDIO_PWR_DOWN1 0x0001 192 - #define OMAP_DSP_MBCMD_AUDIO_PWR_DOWN2 0x0002 193 - 194 - #define OMAP_DSP_MBCMD_TDEL_SAFE 0x0000 195 - #define OMAP_DSP_MBCMD_TDEL_KILL 0x0001 196 - 197 - #define OMAP_DSP_MBCMD_DSPCFG_REQ 0x00 198 - #define OMAP_DSP_MBCMD_DSPCFG_SYSADRH 0x28 199 - #define OMAP_DSP_MBCMD_DSPCFG_SYSADRL 0x29 200 - #define OMAP_DSP_MBCMD_DSPCFG_PROTREV 0x70 201 - #define OMAP_DSP_MBCMD_DSPCFG_ABORT 0x78 202 - #define OMAP_DSP_MBCMD_DSPCFG_LAST 0x80 203 - 204 - #define OMAP_DSP_MBCMD_REGRW_MEMR 0x00 205 - #define OMAP_DSP_MBCMD_REGRW_MEMW 0x01 206 - #define OMAP_DSP_MBCMD_REGRW_IOR 0x02 207 - #define OMAP_DSP_MBCMD_REGRW_IOW 0x03 208 - #define OMAP_DSP_MBCMD_REGRW_DATA 0x04 209 - 210 - #define OMAP_DSP_MBCMD_VARID_ICRMASK 0x00 211 - #define OMAP_DSP_MBCMD_VARID_LOADINFO 0x01 212 - 213 - #define OMAP_DSP_TTYP_ARCV 0x0001 214 - #define OMAP_DSP_TTYP_ASND 0x0002 215 - #define OMAP_DSP_TTYP_BKMD 0x0004 216 - #define OMAP_DSP_TTYP_BKDM 0x0008 217 - #define OMAP_DSP_TTYP_PVMD 0x0010 218 - #define OMAP_DSP_TTYP_PVDM 0x0020 219 - 220 - #define OMAP_DSP_EID_BADTID 0x10 221 - #define OMAP_DSP_EID_BADTCN 0x11 222 - #define OMAP_DSP_EID_BADBID 0x20 223 - #define OMAP_DSP_EID_BADCNT 0x21 224 - #define OMAP_DSP_EID_NOTLOCKED 0x22 225 - #define OMAP_DSP_EID_STVBUF 0x23 226 - #define OMAP_DSP_EID_BADADR 0x24 227 - #define OMAP_DSP_EID_BADTCTL 0x30 228 - #define OMAP_DSP_EID_BADPARAM 0x50 229 - #define OMAP_DSP_EID_FATAL 0x58 230 - #define OMAP_DSP_EID_NOMEM 0xc0 231 - #define OMAP_DSP_EID_NORES 0xc1 232 - #define OMAP_DSP_EID_IPBFULL 0xc2 233 - #define OMAP_DSP_EID_WDT 0xd0 234 - #define OMAP_DSP_EID_TASKNOTRDY 0xe0 235 - #define OMAP_DSP_EID_TASKBSY 0xe1 236 - #define OMAP_DSP_EID_TASKERR 0xef 237 - #define OMAP_DSP_EID_BADCFGTYP 0xf0 238 - #define OMAP_DSP_EID_DEBUG 0xf8 239 - #define OMAP_DSP_EID_BADSEQ 0xfe 240 - #define OMAP_DSP_EID_BADCMD 0xff 241 - 242 - #define OMAP_DSP_TNM_LEN 16 243 - 244 - #define OMAP_DSP_TID_FREE 0xff 245 - #define OMAP_DSP_TID_ANON 0xfe 246 - 247 - #define OMAP_DSP_BID_NULL 0xffff 248 - #define OMAP_DSP_BID_PVT 0xfffe 249 - 250 - #endif /* ASM_ARCH_DSP_H */
+14 -18
include/asm-arm/arch-omap/dsp_common.h
··· 1 1 /* 2 - * linux/include/asm-arm/arch-omap/dsp_common.h 2 + * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1) 3 3 * 4 - * Header for OMAP DSP subsystem control 4 + * Copyright (C) 2004-2006 Nokia Corporation. All rights reserved. 5 5 * 6 - * Copyright (C) 2004,2005 Nokia Corporation 6 + * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com> 7 7 * 8 - * Written by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com> 8 + * This program is free software; you can redistribute it and/or 9 + * modify it under the terms of the GNU General Public License 10 + * version 2 as published by the Free Software Foundation. 9 11 * 10 - * This program is free software; you can redistribute it and/or modify 11 - * it under the terms of the GNU General Public License as published by 12 - * the Free Software Foundation; either version 2 of the License, or 13 - * (at your option) any later version. 14 - * 15 - * This program is distributed in the hope that it will be useful, 16 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 - * GNU General Public License for more details. 12 + * This program is distributed in the hope that it will be useful, but 13 + * WITHOUT ANY WARRANTY; without even the implied warranty of 14 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 + * General Public License for more details. 19 16 * 20 17 * You should have received a copy of the GNU General Public License 21 18 * along with this program; if not, write to the Free Software 22 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 20 + * 02110-1301 USA 23 21 * 24 - * 2005/06/03: DSP Gateway version 3.3 25 22 */ 26 23 27 24 #ifndef ASM_ARCH_DSP_COMMON_H 28 25 #define ASM_ARCH_DSP_COMMON_H 29 26 27 + #ifdef CONFIG_ARCH_OMAP1 30 28 extern void omap_dsp_request_mpui(void); 31 29 extern void omap_dsp_release_mpui(void); 32 30 extern int omap_dsp_request_mem(void); 33 31 extern int omap_dsp_release_mem(void); 34 - 35 - extern void (*omap_dsp_audio_pwr_up_request)(int stage); 36 - extern void (*omap_dsp_audio_pwr_down_request)(int stage); 32 + #endif 37 33 38 34 #endif /* ASM_ARCH_DSP_COMMON_H */
+54
include/asm-arm/arch-omap/gpio-switch.h
··· 1 + /* 2 + * GPIO switch definitions 3 + * 4 + * Copyright (C) 2006 Nokia Corporation 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License version 2 as 8 + * published by the Free Software Foundation. 9 + */ 10 + 11 + #ifndef __ASM_ARCH_OMAP_GPIO_SWITCH_H 12 + #define __ASM_ARCH_OMAP_GPIO_SWITCH_H 13 + 14 + #include <linux/types.h> 15 + 16 + /* Cover: 17 + * high -> closed 18 + * low -> open 19 + * Connection: 20 + * high -> connected 21 + * low -> disconnected 22 + * Activity: 23 + * high -> active 24 + * low -> inactive 25 + * 26 + */ 27 + #define OMAP_GPIO_SWITCH_TYPE_COVER 0x0000 28 + #define OMAP_GPIO_SWITCH_TYPE_CONNECTION 0x0001 29 + #define OMAP_GPIO_SWITCH_TYPE_ACTIVITY 0x0002 30 + #define OMAP_GPIO_SWITCH_FLAG_INVERTED 0x0001 31 + #define OMAP_GPIO_SWITCH_FLAG_OUTPUT 0x0002 32 + 33 + struct omap_gpio_switch { 34 + const char *name; 35 + s16 gpio; 36 + unsigned flags:4; 37 + unsigned type:4; 38 + 39 + /* Time in ms to debounce when transitioning from 40 + * inactive state to active state. */ 41 + u16 debounce_rising; 42 + /* Same for transition from active to inactive state. */ 43 + u16 debounce_falling; 44 + 45 + /* notify board-specific code about state changes */ 46 + void (* notify)(void *data, int state); 47 + void *notify_data; 48 + }; 49 + 50 + /* Call at init time only */ 51 + extern void omap_register_gpio_switches(const struct omap_gpio_switch *tbl, 52 + int count); 53 + 54 + #endif
+2
include/asm-arm/arch-omap/gpmc.h
··· 87 87 extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t); 88 88 extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base); 89 89 extern void gpmc_cs_free(int cs); 90 + extern void gpmc_cs_set_reserved(int cs, int reserved); 91 + extern int gpmc_cs_reserved(int cs); 90 92 91 93 #endif
+9
include/asm-arm/arch-omap/hardware.h
··· 267 267 #define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04) 268 268 269 269 /* 270 + * ---------------------------------------------------------------------------- 271 + * Pulse-Width Light 272 + * ---------------------------------------------------------------------------- 273 + */ 274 + #define OMAP_PWL_BASE 0xfffb5800 275 + #define OMAP_PWL_ENABLE (OMAP_PWL_BASE + 0x00) 276 + #define OMAP_PWL_CLK_ENABLE (OMAP_PWL_BASE + 0x04) 277 + 278 + /* 270 279 * --------------------------------------------------------------------------- 271 280 * Processor specific defines 272 281 * ---------------------------------------------------------------------------
+11
include/asm-arm/arch-omap/io.h
··· 77 77 #define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ 78 78 #define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */ 79 79 80 + /* DSP */ 81 + #define DSP_MEM_24XX_PHYS OMAP24XX_DSP_MEM_BASE /* 0x58000000 */ 82 + #define DSP_MEM_24XX_VIRT 0xe0000000 83 + #define DSP_MEM_24XX_SIZE 0x28000 84 + #define DSP_IPI_24XX_PHYS OMAP24XX_DSP_IPI_BASE /* 0x59000000 */ 85 + #define DSP_IPI_24XX_VIRT 0xe1000000 86 + #define DSP_IPI_24XX_SIZE SZ_4K 87 + #define DSP_MMU_24XX_PHYS OMAP24XX_DSP_MMU_BASE /* 0x5a000000 */ 88 + #define DSP_MMU_24XX_VIRT 0xe2000000 89 + #define DSP_MMU_24XX_SIZE SZ_4K 90 + 80 91 #endif 81 92 82 93 #ifndef __ASSEMBLER__
+17 -3
include/asm-arm/arch-omap/irqs.h
··· 37 37 #define INT_DSP_MMU_ABORT 7 38 38 #define INT_HOST 8 39 39 #define INT_ABORT 9 40 - #define INT_DSP_MAILBOX1 10 41 - #define INT_DSP_MAILBOX2 11 42 40 #define INT_BRIDGE_PRIV 13 43 41 #define INT_GPIO_BANK1 14 44 42 #define INT_UART3 15 ··· 61 63 #define INT_1510_RES2 2 62 64 #define INT_1510_SPI_TX 4 63 65 #define INT_1510_SPI_RX 5 66 + #define INT_1510_DSP_MAILBOX1 10 67 + #define INT_1510_DSP_MAILBOX2 11 64 68 #define INT_1510_RES12 12 65 69 #define INT_1510_LB_MMU 17 66 70 #define INT_1510_RES18 18 ··· 75 75 #define INT_1610_IH2_FIQ 2 76 76 #define INT_1610_McBSP2_TX 4 77 77 #define INT_1610_McBSP2_RX 5 78 + #define INT_1610_DSP_MAILBOX1 10 79 + #define INT_1610_DSP_MAILBOX2 11 78 80 #define INT_1610_LCD_LINE 12 79 81 #define INT_1610_GPTIMER1 17 80 82 #define INT_1610_GPTIMER2 18 ··· 133 131 #define INT_RTC_TIMER (25 + IH2_BASE) 134 132 #define INT_RTC_ALARM (26 + IH2_BASE) 135 133 #define INT_MEM_STICK (27 + IH2_BASE) 136 - #define INT_DSP_MMU (28 + IH2_BASE) 137 134 138 135 /* 139 136 * OMAP-1510 specific IRQ numbers for interrupt handler 2 140 137 */ 138 + #define INT_1510_DSP_MMU (28 + IH2_BASE) 141 139 #define INT_1510_COM_SPI_RO (31 + IH2_BASE) 142 140 143 141 /* ··· 148 146 #define INT_1610_USB_OTG (8 + IH2_BASE) 149 147 #define INT_1610_SoSSI (9 + IH2_BASE) 150 148 #define INT_1610_SoSSI_MATCH (19 + IH2_BASE) 149 + #define INT_1610_DSP_MMU (28 + IH2_BASE) 151 150 #define INT_1610_McBSP2RX_OF (31 + IH2_BASE) 152 151 #define INT_1610_STI (32 + IH2_BASE) 153 152 #define INT_1610_STI_WAKEUP (33 + IH2_BASE) ··· 242 239 #define INT_24XX_SDMA_IRQ3 15 243 240 #define INT_24XX_CAM_IRQ 24 244 241 #define INT_24XX_DSS_IRQ 25 242 + #define INT_24XX_MAIL_U0_MPU 26 243 + #define INT_24XX_DSP_UMA 27 244 + #define INT_24XX_DSP_MMU 28 245 245 #define INT_24XX_GPIO_BANK1 29 246 246 #define INT_24XX_GPIO_BANK2 30 247 247 #define INT_24XX_GPIO_BANK3 31 248 248 #define INT_24XX_GPIO_BANK4 32 249 + #define INT_24XX_GPIO_BANK5 33 250 + #define INT_24XX_MAIL_U3_MPU 34 249 251 #define INT_24XX_GPTIMER1 37 250 252 #define INT_24XX_GPTIMER2 38 251 253 #define INT_24XX_GPTIMER3 39 ··· 270 262 #define INT_24XX_UART1_IRQ 72 271 263 #define INT_24XX_UART2_IRQ 73 272 264 #define INT_24XX_UART3_IRQ 74 265 + #define INT_24XX_USB_IRQ_GEN 75 266 + #define INT_24XX_USB_IRQ_NISO 76 267 + #define INT_24XX_USB_IRQ_ISO 77 268 + #define INT_24XX_USB_IRQ_HGEN 78 269 + #define INT_24XX_USB_IRQ_HSOF 79 270 + #define INT_24XX_USB_IRQ_OTG 80 273 271 #define INT_24XX_MMC_IRQ 83 274 272 275 273 /* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and
-14
include/asm-arm/arch-omap/lcd_lph8923.h
··· 1 - #ifndef __LCD_LPH8923_H 2 - #define __LCD_LPH8923_H 3 - 4 - enum lcd_lph8923_test_num { 5 - LCD_LPH8923_TEST_RGB_LINES, 6 - }; 7 - 8 - enum lcd_lph8923_test_result { 9 - LCD_LPH8923_TEST_SUCCESS, 10 - LCD_LPH8923_TEST_INVALID, 11 - LCD_LPH8923_TEST_FAILED, 12 - }; 13 - 14 - #endif
+24
include/asm-arm/arch-omap/lcd_mipid.h
··· 1 + #ifndef __LCD_MIPID_H 2 + #define __LCD_MIPID_H 3 + 4 + enum mipid_test_num { 5 + MIPID_TEST_RGB_LINES, 6 + }; 7 + 8 + enum mipid_test_result { 9 + MIPID_TEST_SUCCESS, 10 + MIPID_TEST_INVALID, 11 + MIPID_TEST_FAILED, 12 + }; 13 + 14 + #ifdef __KERNEL__ 15 + 16 + struct mipid_platform_data { 17 + int nreset_gpio; 18 + int data_lines; 19 + void (*shutdown)(struct mipid_platform_data *pdata); 20 + }; 21 + 22 + #endif 23 + 24 + #endif
+24
include/asm-arm/arch-omap/led.h
··· 1 + /* 2 + * linux/include/asm-arm/arch-omap/led.h 3 + * 4 + * Copyright (C) 2006 Samsung Electronics 5 + * Kyungmin Park <kyungmin.park@samsung.com> 6 + * 7 + * This program is free software; you can redistribute it and/or modify 8 + * it under the terms of the GNU General Public License version 2 as 9 + * published by the Free Software Foundation. 10 + */ 11 + #ifndef ASMARM_ARCH_LED_H 12 + #define ASMARM_ARCH_LED_H 13 + 14 + struct omap_led_config { 15 + struct led_classdev cdev; 16 + s16 gpio; 17 + }; 18 + 19 + struct omap_led_platform_data { 20 + s16 nr_leds; 21 + struct omap_led_config *leds; 22 + }; 23 + 24 + #endif
-1
include/asm-arm/arch-omap/mcspi.h
··· 2 2 #define _OMAP2_MCSPI_H 3 3 4 4 struct omap2_mcspi_platform_config { 5 - unsigned long base; 6 5 unsigned short num_cs; 7 6 }; 8 7
+13
include/asm-arm/arch-omap/memory.h
··· 86 86 87 87 #endif /* CONFIG_ARCH_OMAP15XX */ 88 88 89 + /* Override the ARM default */ 90 + #ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE 91 + 92 + #if (CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE == 0) 93 + #undef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE 94 + #define CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE 2 95 + #endif 96 + 97 + #define CONSISTENT_DMA_SIZE \ 98 + (((CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE + 1) & ~1) * 1024 * 1024) 99 + 100 + #endif 101 + 89 102 #endif 90 103
+13 -4
include/asm-arm/arch-omap/menelaus.h
··· 7 7 #ifndef __ASM_ARCH_MENELAUS_H 8 8 #define __ASM_ARCH_MENELAUS_H 9 9 10 - extern void menelaus_mmc_register(void (*callback)(unsigned long data, u8 card_mask), 11 - unsigned long data); 12 - extern void menelaus_mmc_remove(void); 13 - extern void menelaus_mmc_opendrain(int enable); 10 + extern int menelaus_register_mmc_callback(void (*callback)(void *data, u8 card_mask), 11 + void *data); 12 + extern void menelaus_unregister_mmc_callback(void); 13 + extern int menelaus_set_mmc_opendrain(int slot, int enable); 14 + extern int menelaus_set_mmc_slot(int slot, int enable, int power, int cd_on); 15 + 16 + extern int menelaus_set_vmem(unsigned int mV); 17 + extern int menelaus_set_vio(unsigned int mV); 18 + extern int menelaus_set_vmmc(unsigned int mV); 19 + extern int menelaus_set_vaux(unsigned int mV); 20 + extern int menelaus_set_vdcdc(int dcdc, unsigned int mV); 21 + extern int menelaus_set_slot_sel(int enable); 22 + extern int menelaus_get_slot_pin_states(void); 14 23 15 24 #if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_MENELAUS) 16 25 #define omap_has_menelaus() 1
+3 -9
include/asm-arm/arch-omap/omap16xx.h
··· 159 159 #define UART3_MVR (OMAP_UART3_BASE + 0x50) 160 160 161 161 /* 162 - * ---------------------------------------------------------------------------- 163 - * Pulse-Width Light 164 - * ---------------------------------------------------------------------------- 165 - */ 166 - #define OMAP16XX_PWL_BASE (0xfffb5800) 167 - #define OMAP16XX_PWL_ENABLE (OMAP16XX_PWL_BASE + 0x00) 168 - #define OMAP16XX_PWL_CLK_ENABLE (OMAP16XX_PWL_BASE + 0x04) 169 - 170 - /* 171 162 * --------------------------------------------------------------------------- 172 163 * Watchdog timer 173 164 * --------------------------------------------------------------------------- ··· 189 198 #define WSPR_ENABLE_1 (0x00004444) 190 199 #define WSPR_DISABLE_0 (0x0000aaaa) 191 200 #define WSPR_DISABLE_1 (0x00005555) 201 + 202 + /* Mailbox */ 203 + #define OMAP16XX_MAILBOX_BASE (0xfffcf000) 192 204 193 205 #endif /* __ASM_ARCH_OMAP16XX_H */ 194 206
+9
include/asm-arm/arch-omap/omap24xx.h
··· 20 20 #define OMAP24XX_PRCM_BASE (L4_24XX_BASE + 0x8000) 21 21 #define OMAP24XX_SDRC_BASE (L3_24XX_BASE + 0x9000) 22 22 23 + /* DSP SS */ 24 + #define OMAP24XX_DSP_BASE 0x58000000 25 + #define OMAP24XX_DSP_MEM_BASE (OMAP24XX_DSP_BASE + 0x0) 26 + #define OMAP24XX_DSP_IPI_BASE (OMAP24XX_DSP_BASE + 0x1000000) 27 + #define OMAP24XX_DSP_MMU_BASE (OMAP24XX_DSP_BASE + 0x2000000) 28 + 29 + /* Mailbox */ 30 + #define OMAP24XX_MAILBOX_BASE (L4_24XX_BASE + 0x94000) 31 + 23 32 #endif /* __ASM_ARCH_OMAP24XX_H */ 24 33
+79 -52
include/asm-arm/arch-omap/omapfb.h
··· 24 24 #ifndef __OMAPFB_H 25 25 #define __OMAPFB_H 26 26 27 + #include <asm/ioctl.h> 28 + #include <asm/types.h> 29 + 27 30 /* IOCTL commands. */ 28 31 29 32 #define OMAP_IOW(num, dtype) _IOW('O', num, dtype) ··· 39 36 #define OMAPFB_VSYNC OMAP_IO(38) 40 37 #define OMAPFB_SET_UPDATE_MODE OMAP_IOW(40, int) 41 38 #define OMAPFB_UPDATE_WINDOW_OLD OMAP_IOW(41, struct omapfb_update_window_old) 42 - #define OMAPFB_GET_CAPS OMAP_IOR(42, unsigned long) 43 39 #define OMAPFB_GET_UPDATE_MODE OMAP_IOW(43, int) 44 40 #define OMAPFB_LCD_TEST OMAP_IOW(45, int) 45 41 #define OMAPFB_CTRL_TEST OMAP_IOW(46, int) 46 42 #define OMAPFB_UPDATE_WINDOW OMAP_IOW(47, struct omapfb_update_window) 47 - #define OMAPFB_SETUP_PLANE OMAP_IOW(48, struct omapfb_setup_plane) 48 - #define OMAPFB_ENABLE_PLANE OMAP_IOW(49, struct omapfb_enable_plane) 49 43 #define OMAPFB_SET_COLOR_KEY OMAP_IOW(50, struct omapfb_color_key) 44 + #define OMAPFB_GET_COLOR_KEY OMAP_IOW(51, struct omapfb_color_key) 45 + #define OMAPFB_SETUP_PLANE OMAP_IOW(52, struct omapfb_plane_info) 46 + #define OMAPFB_QUERY_PLANE OMAP_IOW(53, struct omapfb_plane_info) 50 47 51 48 #define OMAPFB_CAPS_GENERIC_MASK 0x00000fff 52 49 #define OMAPFB_CAPS_LCDC_MASK 0x00fff000 ··· 59 56 #define OMAPFB_FORMAT_MASK 0x00ff 60 57 #define OMAPFB_FORMAT_FLAG_DOUBLE 0x0100 61 58 59 + #define OMAPFB_EVENT_READY 1 60 + #define OMAPFB_EVENT_DISABLED 2 61 + 62 62 enum omapfb_color_format { 63 63 OMAPFB_COLOR_RGB565 = 0, 64 64 OMAPFB_COLOR_YUV422, ··· 70 64 OMAPFB_COLOR_CLUT_4BPP, 71 65 OMAPFB_COLOR_CLUT_2BPP, 72 66 OMAPFB_COLOR_CLUT_1BPP, 67 + OMAPFB_COLOR_RGB444, 68 + OMAPFB_COLOR_YUY422, 73 69 }; 74 70 75 71 struct omapfb_update_window { ··· 96 88 OMAPFB_CHANNEL_OUT_DIGIT, 97 89 }; 98 90 99 - struct omapfb_setup_plane { 100 - __u8 plane; 91 + struct omapfb_plane_info { 92 + __u32 pos_x; 93 + __u32 pos_y; 94 + __u8 enabled; 101 95 __u8 channel_out; 102 - __u32 offset; 103 - __u32 pos_x, pos_y; 104 - __u32 width, height; 105 - __u32 color_mode; 106 - }; 107 - 108 - struct omapfb_enable_plane { 109 - __u8 plane; 110 - __u8 enable; 96 + __u8 mirror; 97 + __u8 reserved1; 98 + __u32 out_width; 99 + __u32 out_height; 100 + __u32 reserved2[12]; 111 101 }; 112 102 113 103 enum omapfb_color_key_type { ··· 147 141 148 142 #define OMAP_LCDC_PANEL_TFT 0x0100 149 143 144 + #define OMAPFB_PLANE_XRES_MIN 8 145 + #define OMAPFB_PLANE_YRES_MIN 8 146 + 150 147 #ifdef CONFIG_ARCH_OMAP1 151 148 #define OMAPFB_PLANE_NUM 1 152 149 #else ··· 178 169 int pcd; /* pixel clock divider. 179 170 Obsolete use pixel_clock instead */ 180 171 181 - int (*init) (struct omapfb_device *fbdev); 182 - void (*cleanup) (void); 183 - int (*enable) (void); 184 - void (*disable) (void); 185 - unsigned long (*get_caps) (void); 186 - int (*set_bklight_level)(unsigned int level); 187 - unsigned int (*get_bklight_level)(void); 188 - unsigned int (*get_bklight_max) (void); 189 - int (*run_test) (int test_num); 172 + int (*init) (struct lcd_panel *panel, 173 + struct omapfb_device *fbdev); 174 + void (*cleanup) (struct lcd_panel *panel); 175 + int (*enable) (struct lcd_panel *panel); 176 + void (*disable) (struct lcd_panel *panel); 177 + unsigned long (*get_caps) (struct lcd_panel *panel); 178 + int (*set_bklight_level)(struct lcd_panel *panel, 179 + unsigned int level); 180 + unsigned int (*get_bklight_level)(struct lcd_panel *panel); 181 + unsigned int (*get_bklight_max) (struct lcd_panel *panel); 182 + int (*run_test) (struct lcd_panel *panel, int test_num); 190 183 }; 191 184 192 185 struct omapfb_device; ··· 213 202 }; 214 203 215 204 struct lcd_ctrl_extif { 216 - int (*init) (void); 205 + int (*init) (struct omapfb_device *fbdev); 217 206 void (*cleanup) (void); 218 207 void (*get_clk_info) (u32 *clk_period, u32 *max_clk_div); 219 208 int (*convert_timings) (struct extif_timings *timings); ··· 224 213 void (*write_data) (const void *buf, unsigned int len); 225 214 void (*transfer_area) (int width, int height, 226 215 void (callback)(void * data), void *data); 216 + 227 217 unsigned long max_transmit_size; 228 218 }; 229 219 230 220 struct omapfb_notifier_block { 231 221 struct notifier_block nb; 232 222 void *data; 223 + int plane_idx; 233 224 }; 234 225 235 - typedef int (*omapfb_notifier_callback_t)(struct omapfb_notifier_block *, 236 - unsigned long event, 237 - struct omapfb_device *fbdev); 226 + typedef int (*omapfb_notifier_callback_t)(struct notifier_block *, 227 + unsigned long event, 228 + void *fbi); 229 + 230 + struct omapfb_mem_region { 231 + dma_addr_t paddr; 232 + void *vaddr; 233 + unsigned long size; 234 + int alloc:1; 235 + }; 236 + 237 + struct omapfb_mem_desc { 238 + int region_cnt; 239 + struct omapfb_mem_region region[OMAPFB_PLANE_NUM]; 240 + }; 238 241 239 242 struct lcd_ctrl { 240 243 const char *name; 241 244 void *data; 242 245 243 246 int (*init) (struct omapfb_device *fbdev, 244 - int ext_mode, int req_vram_size); 247 + int ext_mode, 248 + struct omapfb_mem_desc *req_md); 245 249 void (*cleanup) (void); 246 250 void (*bind_client) (struct omapfb_notifier_block *nb); 247 - void (*get_vram_layout)(unsigned long *size, 248 - void **virt_base, 249 - dma_addr_t *phys_base); 250 - int (*mmap) (struct vm_area_struct *vma); 251 251 unsigned long (*get_caps) (void); 252 252 int (*set_update_mode)(enum omapfb_update_mode mode); 253 253 enum omapfb_update_mode (*get_update_mode)(void); ··· 267 245 int screen_width, 268 246 int pos_x, int pos_y, int width, 269 247 int height, int color_mode); 248 + int (*set_scale) (int plane, 249 + int orig_width, int orig_height, 250 + int out_width, int out_height); 270 251 int (*enable_plane) (int plane, int enable); 271 - int (*update_window) (struct omapfb_update_window *win, 252 + int (*update_window) (struct fb_info *fbi, 253 + struct omapfb_update_window *win, 272 254 void (*callback)(void *), 273 255 void *callback_data); 274 256 void (*sync) (void); ··· 283 257 u16 blue, u16 transp, 284 258 int update_hw_mem); 285 259 int (*set_color_key) (struct omapfb_color_key *ck); 260 + int (*get_color_key) (struct omapfb_color_key *ck); 286 261 287 262 }; 288 263 ··· 293 266 OMAPFB_ACTIVE = 100 294 267 }; 295 268 269 + struct omapfb_plane_struct { 270 + int idx; 271 + struct omapfb_plane_info info; 272 + enum omapfb_color_format color_mode; 273 + struct omapfb_device *fbdev; 274 + }; 275 + 296 276 struct omapfb_device { 297 277 int state; 298 278 int ext_lcdc; /* Using external 299 279 LCD controller */ 300 280 struct mutex rqueue_mutex; 301 281 302 - void *vram_virt_base; 303 - dma_addr_t vram_phys_base; 304 - unsigned long vram_size; 305 - 306 - int color_mode; 307 282 int palette_size; 308 - int mirror; 309 283 u32 pseudo_palette[17]; 310 284 311 285 struct lcd_panel *panel; /* LCD panel */ ··· 314 286 struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */ 315 287 struct lcd_ctrl_extif *ext_if; /* LCD ctrl external 316 288 interface */ 317 - struct fb_info *fb_info; 318 - 319 289 struct device *dev; 290 + 291 + struct omapfb_mem_desc mem_desc; 292 + struct fb_info *fb_info[OMAPFB_PLANE_NUM]; 320 293 }; 321 294 322 295 struct omapfb_platform_data { 323 - struct omap_lcd_config lcd; 324 - struct omapfb_mem_desc mem_desc; 325 - void *ctrl_platform_data; 296 + struct omap_lcd_config lcd; 297 + struct omapfb_mem_desc mem_desc; 298 + void *ctrl_platform_data; 326 299 }; 327 - 328 - #define OMAPFB_EVENT_READY 1 329 - #define OMAPFB_EVENT_DISABLED 2 330 300 331 301 #ifdef CONFIG_ARCH_OMAP1 332 302 extern struct lcd_ctrl omap1_lcd_ctrl; ··· 337 311 extern void omapfb_notify_clients(struct omapfb_device *fbdev, 338 312 unsigned long event); 339 313 extern int omapfb_register_client(struct omapfb_notifier_block *nb, 340 - omapfb_notifier_callback_t callback, 341 - void *callback_data); 314 + omapfb_notifier_callback_t callback, 315 + void *callback_data); 342 316 extern int omapfb_unregister_client(struct omapfb_notifier_block *nb); 343 - extern int omapfb_update_window_async(struct omapfb_update_window *win, 344 - void (*callback)(void *), 345 - void *callback_data); 317 + extern int omapfb_update_window_async(struct fb_info *fbi, 318 + struct omapfb_update_window *win, 319 + void (*callback)(void *), 320 + void *callback_data); 346 321 347 322 /* in arch/arm/plat-omap/fb.c */ 348 323 extern void omapfb_reserve_mem(void);
+2 -2
include/asm-arm/arch-omap/sram.h
··· 20 20 u32 mem_type); 21 21 extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); 22 22 23 - extern unsigned long omap_fb_sram_start; 24 - extern unsigned long omap_fb_sram_size; 23 + extern int omap_fb_sram_plane; 24 + extern int omap_fb_sram_valid; 25 25 26 26 /* Do not use these */ 27 27 extern void sram_reprogram_clock(u32 ckctl, u32 dpllctl);
+35 -5
include/asm-arm/arch-omap/usb.h
··· 7 7 8 8 /*-------------------------------------------------------------------------*/ 9 9 10 - #define OTG_BASE 0xfffb0400 11 - #define UDC_BASE 0xfffb4000 12 - #define OMAP_OHCI_BASE 0xfffba000 10 + #define OMAP1_OTG_BASE 0xfffb0400 11 + #define OMAP1_UDC_BASE 0xfffb4000 12 + #define OMAP1_OHCI_BASE 0xfffba000 13 + 14 + #define OMAP2_OHCI_BASE 0x4805e000 15 + #define OMAP2_UDC_BASE 0x4805e200 16 + #define OMAP2_OTG_BASE 0x4805e300 17 + 18 + #ifdef CONFIG_ARCH_OMAP1 19 + 20 + #define OTG_BASE OMAP1_OTG_BASE 21 + #define UDC_BASE OMAP1_UDC_BASE 22 + #define OMAP_OHCI_BASE OMAP1_OHCI_BASE 23 + 24 + #else 25 + 26 + #define OTG_BASE OMAP2_OTG_BASE 27 + #define UDC_BASE OMAP2_UDC_BASE 28 + #define OMAP_OHCI_BASE OMAP2_OHCI_BASE 29 + 30 + #endif 13 31 14 32 /*-------------------------------------------------------------------------*/ 15 33 ··· 46 28 # define HST_IDLE_EN (1 << 14) 47 29 # define DEV_IDLE_EN (1 << 13) 48 30 # define OTG_RESET_DONE (1 << 2) 31 + # define OTG_SOFT_RESET (1 << 1) 49 32 #define OTG_SYSCON_2_REG OTG_REG32(0x08) 50 33 # define OTG_EN (1 << 31) 51 34 # define USBX_SYNCHRO (1 << 30) ··· 122 103 123 104 /*-------------------------------------------------------------------------*/ 124 105 106 + /* OMAP1 */ 125 107 #define USB_TRANSCEIVER_CTRL_REG __REG32(0xfffe1000 + 0x0064) 126 108 # define CONF_USB2_UNI_R (1 << 8) 127 109 # define CONF_USB1_UNI_R (1 << 7) ··· 131 111 # define CONF_USB_PWRDN_DM_R (1 << 2) 132 112 # define CONF_USB_PWRDN_DP_R (1 << 1) 133 113 134 - 135 - 114 + /* OMAP2 */ 115 + #define CONTROL_DEVCONF_REG __REG32(L4_24XX_BASE + 0x0274) 116 + # define USB_UNIDIR 0x0 117 + # define USB_UNIDIR_TLL 0x1 118 + # define USB_BIDIR 0x2 119 + # define USB_BIDIR_TLL 0x3 120 + # define USBT0WRMODEI(x) ((x) << 22) 121 + # define USBT1WRMODEI(x) ((x) << 20) 122 + # define USBT2WRMODEI(x) ((x) << 18) 123 + # define USBT2TLL5PI (1 << 17) 124 + # define USB0PUENACTLOI (1 << 16) 125 + # define USBSTANDBYCTRL (1 << 15) 136 126 137 127 #endif /* __ASM_ARCH_OMAP_USB_H */