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Documentation: DT: Add binding documentation for NVIDIA ADMA

Add device-tree binding documentation for the Tegra210 Audio DMA
controller.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

authored by

Jon Hunter and committed by
Vinod Koul
f4cb295b 00ef4490

+55
+55
Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt
··· 1 + * NVIDIA Tegra Audio DMA (ADMA) controller 2 + 3 + The Tegra Audio DMA controller that is used for transferring data 4 + between system memory and the Audio Processing Engine (APE). 5 + 6 + Required properties: 7 + - compatible: Must be "nvidia,tegra210-adma". 8 + - reg: Should contain DMA registers location and length. This should be 9 + a single entry that includes all of the per-channel registers in one 10 + contiguous bank. 11 + - interrupt-parent: Phandle to the interrupt parent controller. 12 + - interrupts: Should contain all of the per-channel DMA interrupts in 13 + ascending order with respect to the DMA channel index. 14 + - clocks: Must contain one entry for the ADMA module clock 15 + (TEGRA210_CLK_D_AUDIO). 16 + - clock-names: Must contain the name "d_audio" for the corresponding 17 + 'clocks' entry. 18 + - #dma-cells : Must be 1. The first cell denotes the receive/transmit 19 + request number and should be between 1 and the maximum number of 20 + requests supported. This value corresponds to the RX/TX_REQUEST_SELECT 21 + fields in the ADMA_CHn_CTRL register. 22 + 23 + 24 + Example: 25 + 26 + adma: dma@702e2000 { 27 + compatible = "nvidia,tegra210-adma"; 28 + reg = <0x0 0x702e2000 0x0 0x2000>; 29 + interrupt-parent = <&tegra_agic>; 30 + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, 31 + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, 32 + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, 33 + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, 34 + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, 35 + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 36 + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, 37 + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, 38 + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 39 + <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 40 + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 41 + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 42 + <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 43 + <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 44 + <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, 45 + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 46 + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 47 + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 48 + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 49 + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 50 + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 51 + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 52 + clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; 53 + clock-names = "d_audio"; 54 + #dma-cells = <1>; 55 + };