Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: (62 commits)
mlx4_core: Deprecate log_num_vlan module param
IB/mlx4: Don't set VLAN in IBoE WQEs' control segment
IB/mlx4: Enable 4K mtu for IBoE
RDMA/cxgb4: Mark QP in error before disabling the queue in firmware
RDMA/cxgb4: Serialize calls to CQ's comp_handler
RDMA/cxgb3: Serialize calls to CQ's comp_handler
IB/qib: Fix issue with link states and QSFP cables
IB/mlx4: Configure extended active speeds
mlx4_core: Add extended port capabilities support
IB/qib: Hold links until tuning data is available
IB/qib: Clean up checkpatch issue
IB/qib: Remove s_lock around header validation
IB/qib: Precompute timeout jiffies to optimize latency
IB/qib: Use RCU for qpn lookup
IB/qib: Eliminate divide/mod in converting idx to egr buf pointer
IB/qib: Decode path MTU optimization
IB/qib: Optimize RC/UC code by IB operation
IPoIB: Use the right function to do DMA unmap pages
RDMA/cxgb4: Use correct QID in insert_recv_cqe()
RDMA/cxgb4: Make sure flush CQ entries are collected on connection close
...

+4782 -1028
+41 -22
drivers/infiniband/core/cm.c
··· 889 889 break; 890 890 case IB_CM_ESTABLISHED: 891 891 spin_unlock_irq(&cm_id_priv->lock); 892 + if (cm_id_priv->qp_type == IB_QPT_XRC_TGT) 893 + break; 892 894 ib_send_cm_dreq(cm_id, NULL, 0); 893 895 goto retest; 894 896 case IB_CM_DREQ_SENT: ··· 1010 1008 req_msg->service_id = param->service_id; 1011 1009 req_msg->local_ca_guid = cm_id_priv->id.device->node_guid; 1012 1010 cm_req_set_local_qpn(req_msg, cpu_to_be32(param->qp_num)); 1013 - cm_req_set_resp_res(req_msg, param->responder_resources); 1014 1011 cm_req_set_init_depth(req_msg, param->initiator_depth); 1015 1012 cm_req_set_remote_resp_timeout(req_msg, 1016 1013 param->remote_cm_response_timeout); ··· 1018 1017 cm_req_set_starting_psn(req_msg, cpu_to_be32(param->starting_psn)); 1019 1018 cm_req_set_local_resp_timeout(req_msg, 1020 1019 param->local_cm_response_timeout); 1021 - cm_req_set_retry_count(req_msg, param->retry_count); 1022 1020 req_msg->pkey = param->primary_path->pkey; 1023 1021 cm_req_set_path_mtu(req_msg, param->primary_path->mtu); 1024 - cm_req_set_rnr_retry_count(req_msg, param->rnr_retry_count); 1025 1022 cm_req_set_max_cm_retries(req_msg, param->max_cm_retries); 1026 - cm_req_set_srq(req_msg, param->srq); 1023 + 1024 + if (param->qp_type != IB_QPT_XRC_INI) { 1025 + cm_req_set_resp_res(req_msg, param->responder_resources); 1026 + cm_req_set_retry_count(req_msg, param->retry_count); 1027 + cm_req_set_rnr_retry_count(req_msg, param->rnr_retry_count); 1028 + cm_req_set_srq(req_msg, param->srq); 1029 + } 1027 1030 1028 1031 if (pri_path->hop_limit <= 1) { 1029 1032 req_msg->primary_local_lid = pri_path->slid; ··· 1085 1080 if (!param->primary_path) 1086 1081 return -EINVAL; 1087 1082 1088 - if (param->qp_type != IB_QPT_RC && param->qp_type != IB_QPT_UC) 1083 + if (param->qp_type != IB_QPT_RC && param->qp_type != IB_QPT_UC && 1084 + param->qp_type != IB_QPT_XRC_INI) 1089 1085 return -EINVAL; 1090 1086 1091 1087 if (param->private_data && ··· 1607 1601 cm_format_mad_hdr(&rep_msg->hdr, CM_REP_ATTR_ID, cm_id_priv->tid); 1608 1602 rep_msg->local_comm_id = cm_id_priv->id.local_id; 1609 1603 rep_msg->remote_comm_id = cm_id_priv->id.remote_id; 1610 - cm_rep_set_local_qpn(rep_msg, cpu_to_be32(param->qp_num)); 1611 1604 cm_rep_set_starting_psn(rep_msg, cpu_to_be32(param->starting_psn)); 1612 1605 rep_msg->resp_resources = param->responder_resources; 1613 - rep_msg->initiator_depth = param->initiator_depth; 1614 1606 cm_rep_set_target_ack_delay(rep_msg, 1615 1607 cm_id_priv->av.port->cm_dev->ack_delay); 1616 1608 cm_rep_set_failover(rep_msg, param->failover_accepted); 1617 - cm_rep_set_flow_ctrl(rep_msg, param->flow_control); 1618 1609 cm_rep_set_rnr_retry_count(rep_msg, param->rnr_retry_count); 1619 - cm_rep_set_srq(rep_msg, param->srq); 1620 1610 rep_msg->local_ca_guid = cm_id_priv->id.device->node_guid; 1611 + 1612 + if (cm_id_priv->qp_type != IB_QPT_XRC_TGT) { 1613 + rep_msg->initiator_depth = param->initiator_depth; 1614 + cm_rep_set_flow_ctrl(rep_msg, param->flow_control); 1615 + cm_rep_set_srq(rep_msg, param->srq); 1616 + cm_rep_set_local_qpn(rep_msg, cpu_to_be32(param->qp_num)); 1617 + } else { 1618 + cm_rep_set_srq(rep_msg, 1); 1619 + cm_rep_set_local_eecn(rep_msg, cpu_to_be32(param->qp_num)); 1620 + } 1621 1621 1622 1622 if (param->private_data && param->private_data_len) 1623 1623 memcpy(rep_msg->private_data, param->private_data, ··· 1672 1660 cm_id_priv->initiator_depth = param->initiator_depth; 1673 1661 cm_id_priv->responder_resources = param->responder_resources; 1674 1662 cm_id_priv->rq_psn = cm_rep_get_starting_psn(rep_msg); 1675 - cm_id_priv->local_qpn = cm_rep_get_local_qpn(rep_msg); 1663 + cm_id_priv->local_qpn = cpu_to_be32(param->qp_num & 0xFFFFFF); 1676 1664 1677 1665 out: spin_unlock_irqrestore(&cm_id_priv->lock, flags); 1678 1666 return ret; ··· 1743 1731 } 1744 1732 EXPORT_SYMBOL(ib_send_cm_rtu); 1745 1733 1746 - static void cm_format_rep_event(struct cm_work *work) 1734 + static void cm_format_rep_event(struct cm_work *work, enum ib_qp_type qp_type) 1747 1735 { 1748 1736 struct cm_rep_msg *rep_msg; 1749 1737 struct ib_cm_rep_event_param *param; ··· 1752 1740 param = &work->cm_event.param.rep_rcvd; 1753 1741 param->remote_ca_guid = rep_msg->local_ca_guid; 1754 1742 param->remote_qkey = be32_to_cpu(rep_msg->local_qkey); 1755 - param->remote_qpn = be32_to_cpu(cm_rep_get_local_qpn(rep_msg)); 1743 + param->remote_qpn = be32_to_cpu(cm_rep_get_qpn(rep_msg, qp_type)); 1756 1744 param->starting_psn = be32_to_cpu(cm_rep_get_starting_psn(rep_msg)); 1757 1745 param->responder_resources = rep_msg->initiator_depth; 1758 1746 param->initiator_depth = rep_msg->resp_resources; ··· 1820 1808 return -EINVAL; 1821 1809 } 1822 1810 1823 - cm_format_rep_event(work); 1811 + cm_format_rep_event(work, cm_id_priv->qp_type); 1824 1812 1825 1813 spin_lock_irq(&cm_id_priv->lock); 1826 1814 switch (cm_id_priv->id.state) { ··· 1835 1823 1836 1824 cm_id_priv->timewait_info->work.remote_id = rep_msg->local_comm_id; 1837 1825 cm_id_priv->timewait_info->remote_ca_guid = rep_msg->local_ca_guid; 1838 - cm_id_priv->timewait_info->remote_qpn = cm_rep_get_local_qpn(rep_msg); 1826 + cm_id_priv->timewait_info->remote_qpn = cm_rep_get_qpn(rep_msg, cm_id_priv->qp_type); 1839 1827 1840 1828 spin_lock(&cm.lock); 1841 1829 /* Check for duplicate REP. */ ··· 1862 1850 1863 1851 cm_id_priv->id.state = IB_CM_REP_RCVD; 1864 1852 cm_id_priv->id.remote_id = rep_msg->local_comm_id; 1865 - cm_id_priv->remote_qpn = cm_rep_get_local_qpn(rep_msg); 1853 + cm_id_priv->remote_qpn = cm_rep_get_qpn(rep_msg, cm_id_priv->qp_type); 1866 1854 cm_id_priv->initiator_depth = rep_msg->resp_resources; 1867 1855 cm_id_priv->responder_resources = rep_msg->initiator_depth; 1868 1856 cm_id_priv->sq_psn = cm_rep_get_starting_psn(rep_msg); ··· 3504 3492 qp_attr->path_mtu = cm_id_priv->path_mtu; 3505 3493 qp_attr->dest_qp_num = be32_to_cpu(cm_id_priv->remote_qpn); 3506 3494 qp_attr->rq_psn = be32_to_cpu(cm_id_priv->rq_psn); 3507 - if (cm_id_priv->qp_type == IB_QPT_RC) { 3495 + if (cm_id_priv->qp_type == IB_QPT_RC || 3496 + cm_id_priv->qp_type == IB_QPT_XRC_TGT) { 3508 3497 *qp_attr_mask |= IB_QP_MAX_DEST_RD_ATOMIC | 3509 3498 IB_QP_MIN_RNR_TIMER; 3510 3499 qp_attr->max_dest_rd_atomic = ··· 3550 3537 if (cm_id_priv->id.lap_state == IB_CM_LAP_UNINIT) { 3551 3538 *qp_attr_mask = IB_QP_STATE | IB_QP_SQ_PSN; 3552 3539 qp_attr->sq_psn = be32_to_cpu(cm_id_priv->sq_psn); 3553 - if (cm_id_priv->qp_type == IB_QPT_RC) { 3554 - *qp_attr_mask |= IB_QP_TIMEOUT | IB_QP_RETRY_CNT | 3555 - IB_QP_RNR_RETRY | 3540 + switch (cm_id_priv->qp_type) { 3541 + case IB_QPT_RC: 3542 + case IB_QPT_XRC_INI: 3543 + *qp_attr_mask |= IB_QP_RETRY_CNT | IB_QP_RNR_RETRY | 3556 3544 IB_QP_MAX_QP_RD_ATOMIC; 3557 - qp_attr->timeout = cm_id_priv->av.timeout; 3558 3545 qp_attr->retry_cnt = cm_id_priv->retry_count; 3559 3546 qp_attr->rnr_retry = cm_id_priv->rnr_retry_count; 3560 - qp_attr->max_rd_atomic = 3561 - cm_id_priv->initiator_depth; 3547 + qp_attr->max_rd_atomic = cm_id_priv->initiator_depth; 3548 + /* fall through */ 3549 + case IB_QPT_XRC_TGT: 3550 + *qp_attr_mask |= IB_QP_TIMEOUT; 3551 + qp_attr->timeout = cm_id_priv->av.timeout; 3552 + break; 3553 + default: 3554 + break; 3562 3555 } 3563 3556 if (cm_id_priv->alt_av.ah_attr.dlid) { 3564 3557 *qp_attr_mask |= IB_QP_PATH_MIG_STATE;
+30 -2
drivers/infiniband/core/cm_msgs.h
··· 1 1 /* 2 - * Copyright (c) 2004 Intel Corporation. All rights reserved. 2 + * Copyright (c) 2004, 2011 Intel Corporation. All rights reserved. 3 3 * Copyright (c) 2004 Topspin Corporation. All rights reserved. 4 4 * Copyright (c) 2004 Voltaire Corporation. All rights reserved. 5 5 * ··· 86 86 __be16 pkey; 87 87 /* path MTU:4, RDC exists:1, RNR retry count:3. */ 88 88 u8 offset50; 89 - /* max CM Retries:4, SRQ:1, rsvd:3 */ 89 + /* max CM Retries:4, SRQ:1, extended transport type:3 */ 90 90 u8 offset51; 91 91 92 92 __be16 primary_local_lid; ··· 175 175 switch(transport_type) { 176 176 case 0: return IB_QPT_RC; 177 177 case 1: return IB_QPT_UC; 178 + case 3: 179 + switch (req_msg->offset51 & 0x7) { 180 + case 1: return IB_QPT_XRC_TGT; 181 + default: return 0; 182 + } 178 183 default: return 0; 179 184 } 180 185 } ··· 192 187 req_msg->offset40 = cpu_to_be32((be32_to_cpu( 193 188 req_msg->offset40) & 194 189 0xFFFFFFF9) | 0x2); 190 + break; 191 + case IB_QPT_XRC_INI: 192 + req_msg->offset40 = cpu_to_be32((be32_to_cpu( 193 + req_msg->offset40) & 194 + 0xFFFFFFF9) | 0x6); 195 + req_msg->offset51 = (req_msg->offset51 & 0xF8) | 1; 195 196 break; 196 197 default: 197 198 req_msg->offset40 = cpu_to_be32(be32_to_cpu( ··· 536 525 { 537 526 rep_msg->offset12 = cpu_to_be32((be32_to_cpu(qpn) << 8) | 538 527 (be32_to_cpu(rep_msg->offset12) & 0x000000FF)); 528 + } 529 + 530 + static inline __be32 cm_rep_get_local_eecn(struct cm_rep_msg *rep_msg) 531 + { 532 + return cpu_to_be32(be32_to_cpu(rep_msg->offset16) >> 8); 533 + } 534 + 535 + static inline void cm_rep_set_local_eecn(struct cm_rep_msg *rep_msg, __be32 eecn) 536 + { 537 + rep_msg->offset16 = cpu_to_be32((be32_to_cpu(eecn) << 8) | 538 + (be32_to_cpu(rep_msg->offset16) & 0x000000FF)); 539 + } 540 + 541 + static inline __be32 cm_rep_get_qpn(struct cm_rep_msg *rep_msg, enum ib_qp_type qp_type) 542 + { 543 + return (qp_type == IB_QPT_XRC_INI) ? 544 + cm_rep_get_local_eecn(rep_msg) : cm_rep_get_local_qpn(rep_msg); 539 545 } 540 546 541 547 static inline __be32 cm_rep_get_starting_psn(struct cm_rep_msg *rep_msg)
+48 -19
drivers/infiniband/core/cma.c
··· 81 81 static DEFINE_IDR(tcp_ps); 82 82 static DEFINE_IDR(udp_ps); 83 83 static DEFINE_IDR(ipoib_ps); 84 + static DEFINE_IDR(ib_ps); 84 85 85 86 struct cma_device { 86 87 struct list_head list; ··· 1180 1179 event->param.conn.qp_num = req_data->remote_qpn; 1181 1180 } 1182 1181 1182 + static int cma_check_req_qp_type(struct rdma_cm_id *id, struct ib_cm_event *ib_event) 1183 + { 1184 + return (((ib_event->event == IB_CM_REQ_RECEIVED) || 1185 + (ib_event->param.req_rcvd.qp_type == id->qp_type)) || 1186 + ((ib_event->event == IB_CM_SIDR_REQ_RECEIVED) && 1187 + (id->qp_type == IB_QPT_UD)) || 1188 + (!id->qp_type)); 1189 + } 1190 + 1183 1191 static int cma_req_handler(struct ib_cm_id *cm_id, struct ib_cm_event *ib_event) 1184 1192 { 1185 1193 struct rdma_id_private *listen_id, *conn_id; ··· 1196 1186 int offset, ret; 1197 1187 1198 1188 listen_id = cm_id->context; 1189 + if (!cma_check_req_qp_type(&listen_id->id, ib_event)) 1190 + return -EINVAL; 1191 + 1199 1192 if (cma_disable_callback(listen_id, RDMA_CM_LISTEN)) 1200 1193 return -ECONNABORTED; 1201 1194 1202 1195 memset(&event, 0, sizeof event); 1203 1196 offset = cma_user_data_offset(listen_id->id.ps); 1204 1197 event.event = RDMA_CM_EVENT_CONNECT_REQUEST; 1205 - if (listen_id->id.qp_type == IB_QPT_UD) { 1198 + if (ib_event->event == IB_CM_SIDR_REQ_RECEIVED) { 1206 1199 conn_id = cma_new_udp_id(&listen_id->id, ib_event); 1207 1200 event.param.ud.private_data = ib_event->private_data + offset; 1208 1201 event.param.ud.private_data_len = ··· 1341 1328 switch (iw_event->status) { 1342 1329 case 0: 1343 1330 event.event = RDMA_CM_EVENT_ESTABLISHED; 1331 + event.param.conn.initiator_depth = iw_event->ird; 1332 + event.param.conn.responder_resources = iw_event->ord; 1344 1333 break; 1345 1334 case -ECONNRESET: 1346 1335 case -ECONNREFUSED: ··· 1358 1343 break; 1359 1344 case IW_CM_EVENT_ESTABLISHED: 1360 1345 event.event = RDMA_CM_EVENT_ESTABLISHED; 1346 + event.param.conn.initiator_depth = iw_event->ird; 1347 + event.param.conn.responder_resources = iw_event->ord; 1361 1348 break; 1362 1349 default: 1363 1350 BUG_ON(1); ··· 1450 1433 event.event = RDMA_CM_EVENT_CONNECT_REQUEST; 1451 1434 event.param.conn.private_data = iw_event->private_data; 1452 1435 event.param.conn.private_data_len = iw_event->private_data_len; 1453 - event.param.conn.initiator_depth = attr.max_qp_init_rd_atom; 1454 - event.param.conn.responder_resources = attr.max_qp_rd_atom; 1436 + event.param.conn.initiator_depth = iw_event->ird; 1437 + event.param.conn.responder_resources = iw_event->ord; 1455 1438 1456 1439 /* 1457 1440 * Protect against the user destroying conn_id from another thread ··· 2251 2234 case RDMA_PS_IPOIB: 2252 2235 ps = &ipoib_ps; 2253 2236 break; 2237 + case RDMA_PS_IB: 2238 + ps = &ib_ps; 2239 + break; 2254 2240 default: 2255 2241 return -EPROTONOSUPPORT; 2256 2242 } ··· 2589 2569 req.service_id = cma_get_service_id(id_priv->id.ps, 2590 2570 (struct sockaddr *) &route->addr.dst_addr); 2591 2571 req.qp_num = id_priv->qp_num; 2592 - req.qp_type = IB_QPT_RC; 2572 + req.qp_type = id_priv->id.qp_type; 2593 2573 req.starting_psn = id_priv->seq_num; 2594 2574 req.responder_resources = conn_param->responder_resources; 2595 2575 req.initiator_depth = conn_param->initiator_depth; ··· 2636 2616 if (ret) 2637 2617 goto out; 2638 2618 2639 - iw_param.ord = conn_param->initiator_depth; 2640 - iw_param.ird = conn_param->responder_resources; 2641 - iw_param.private_data = conn_param->private_data; 2642 - iw_param.private_data_len = conn_param->private_data_len; 2643 - if (id_priv->id.qp) 2619 + if (conn_param) { 2620 + iw_param.ord = conn_param->initiator_depth; 2621 + iw_param.ird = conn_param->responder_resources; 2622 + iw_param.private_data = conn_param->private_data; 2623 + iw_param.private_data_len = conn_param->private_data_len; 2624 + iw_param.qpn = id_priv->id.qp ? id_priv->qp_num : conn_param->qp_num; 2625 + } else { 2626 + memset(&iw_param, 0, sizeof iw_param); 2644 2627 iw_param.qpn = id_priv->qp_num; 2645 - else 2646 - iw_param.qpn = conn_param->qp_num; 2628 + } 2647 2629 ret = iw_cm_connect(cm_id, &iw_param); 2648 2630 out: 2649 2631 if (ret) { ··· 2787 2765 2788 2766 switch (rdma_node_get_transport(id->device->node_type)) { 2789 2767 case RDMA_TRANSPORT_IB: 2790 - if (id->qp_type == IB_QPT_UD) 2791 - ret = cma_send_sidr_rep(id_priv, IB_SIDR_SUCCESS, 2792 - conn_param->private_data, 2793 - conn_param->private_data_len); 2794 - else if (conn_param) 2795 - ret = cma_accept_ib(id_priv, conn_param); 2796 - else 2797 - ret = cma_rep_recv(id_priv); 2768 + if (id->qp_type == IB_QPT_UD) { 2769 + if (conn_param) 2770 + ret = cma_send_sidr_rep(id_priv, IB_SIDR_SUCCESS, 2771 + conn_param->private_data, 2772 + conn_param->private_data_len); 2773 + else 2774 + ret = cma_send_sidr_rep(id_priv, IB_SIDR_SUCCESS, 2775 + NULL, 0); 2776 + } else { 2777 + if (conn_param) 2778 + ret = cma_accept_ib(id_priv, conn_param); 2779 + else 2780 + ret = cma_rep_recv(id_priv); 2781 + } 2798 2782 break; 2799 2783 case RDMA_TRANSPORT_IWARP: 2800 2784 ret = cma_accept_iw(id_priv, conn_param); ··· 3488 3460 idr_destroy(&tcp_ps); 3489 3461 idr_destroy(&udp_ps); 3490 3462 idr_destroy(&ipoib_ps); 3463 + idr_destroy(&ib_ps); 3491 3464 } 3492 3465 3493 3466 module_init(cma_init);
+3
drivers/infiniband/core/mad.c
··· 1596 1596 mad->mad_hdr.class_version].class; 1597 1597 if (!class) 1598 1598 goto out; 1599 + if (convert_mgmt_class(mad->mad_hdr.mgmt_class) >= 1600 + IB_MGMT_MAX_METHODS) 1601 + goto out; 1599 1602 method = class->method_table[convert_mgmt_class( 1600 1603 mad->mad_hdr.mgmt_class)]; 1601 1604 if (method)
+22 -4
drivers/infiniband/core/sysfs.c
··· 185 185 if (ret) 186 186 return ret; 187 187 188 + rate = (25 * attr.active_speed) / 10; 189 + 188 190 switch (attr.active_speed) { 189 - case 2: speed = " DDR"; break; 190 - case 4: speed = " QDR"; break; 191 + case 2: 192 + speed = " DDR"; 193 + break; 194 + case 4: 195 + speed = " QDR"; 196 + break; 197 + case 8: 198 + speed = " FDR10"; 199 + rate = 10; 200 + break; 201 + case 16: 202 + speed = " FDR"; 203 + rate = 14; 204 + break; 205 + case 32: 206 + speed = " EDR"; 207 + rate = 25; 208 + break; 191 209 } 192 210 193 - rate = 25 * ib_width_enum_to_int(attr.active_width) * attr.active_speed; 211 + rate *= ib_width_enum_to_int(attr.active_width); 194 212 if (rate < 0) 195 213 return -EINVAL; 196 214 197 215 return sprintf(buf, "%d%s Gb/sec (%dX%s)\n", 198 - rate / 10, rate % 10 ? ".5" : "", 216 + rate, (attr.active_speed == 1) ? ".5" : "", 199 217 ib_width_enum_to_int(attr.active_width), speed); 200 218 } 201 219
+1 -1
drivers/infiniband/core/ucm.c
··· 1122 1122 if (copy_from_user(&hdr, buf, sizeof(hdr))) 1123 1123 return -EFAULT; 1124 1124 1125 - if (hdr.cmd < 0 || hdr.cmd >= ARRAY_SIZE(ucm_cmd_table)) 1125 + if (hdr.cmd >= ARRAY_SIZE(ucm_cmd_table)) 1126 1126 return -EINVAL; 1127 1127 1128 1128 if (hdr.in + sizeof(hdr) > len)
+5 -2
drivers/infiniband/core/ucma.c
··· 276 276 ucma_set_event_context(ctx, event, uevent); 277 277 uevent->resp.event = event->event; 278 278 uevent->resp.status = event->status; 279 - if (cm_id->ps == RDMA_PS_UDP || cm_id->ps == RDMA_PS_IPOIB) 279 + if (cm_id->qp_type == IB_QPT_UD) 280 280 ucma_copy_ud_event(&uevent->resp.param.ud, &event->param.ud); 281 281 else 282 282 ucma_copy_conn_event(&uevent->resp.param.conn, ··· 376 376 case RDMA_PS_UDP: 377 377 case RDMA_PS_IPOIB: 378 378 *qp_type = IB_QPT_UD; 379 + return 0; 380 + case RDMA_PS_IB: 381 + *qp_type = cmd->qp_type; 379 382 return 0; 380 383 default: 381 384 return -EINVAL; ··· 1273 1270 if (copy_from_user(&hdr, buf, sizeof(hdr))) 1274 1271 return -EFAULT; 1275 1272 1276 - if (hdr.cmd < 0 || hdr.cmd >= ARRAY_SIZE(ucma_cmd_table)) 1273 + if (hdr.cmd >= ARRAY_SIZE(ucma_cmd_table)) 1277 1274 return -EINVAL; 1278 1275 1279 1276 if (hdr.in + sizeof(hdr) > len)
+2 -3
drivers/infiniband/core/user_mad.c
··· 458 458 goto err; 459 459 } 460 460 461 - if (packet->mad.hdr.id < 0 || 462 - packet->mad.hdr.id >= IB_UMAD_MAX_AGENTS) { 461 + if (packet->mad.hdr.id >= IB_UMAD_MAX_AGENTS) { 463 462 ret = -EINVAL; 464 463 goto err; 465 464 } ··· 702 703 mutex_lock(&file->port->file_mutex); 703 704 mutex_lock(&file->mutex); 704 705 705 - if (id < 0 || id >= IB_UMAD_MAX_AGENTS || !__get_agent(file, id)) { 706 + if (id >= IB_UMAD_MAX_AGENTS || !__get_agent(file, id)) { 706 707 ret = -EINVAL; 707 708 goto out; 708 709 }
+18
drivers/infiniband/core/uverbs.h
··· 76 76 struct ib_device *ib_dev; 77 77 int devnum; 78 78 struct cdev cdev; 79 + struct rb_root xrcd_tree; 80 + struct mutex xrcd_tree_mutex; 79 81 }; 80 82 81 83 struct ib_uverbs_event_file { ··· 122 120 u32 events_reported; 123 121 }; 124 122 123 + struct ib_uxrcd_object { 124 + struct ib_uobject uobject; 125 + atomic_t refcnt; 126 + }; 127 + 128 + struct ib_usrq_object { 129 + struct ib_uevent_object uevent; 130 + struct ib_uxrcd_object *uxrcd; 131 + }; 132 + 125 133 struct ib_uqp_object { 126 134 struct ib_uevent_object uevent; 127 135 struct list_head mcast_list; ··· 154 142 extern struct idr ib_uverbs_cq_idr; 155 143 extern struct idr ib_uverbs_qp_idr; 156 144 extern struct idr ib_uverbs_srq_idr; 145 + extern struct idr ib_uverbs_xrcd_idr; 157 146 158 147 void idr_remove_uobj(struct idr *idp, struct ib_uobject *uobj); 159 148 ··· 174 161 void ib_uverbs_srq_event_handler(struct ib_event *event, void *context_ptr); 175 162 void ib_uverbs_event_handler(struct ib_event_handler *handler, 176 163 struct ib_event *event); 164 + void ib_uverbs_dealloc_xrcd(struct ib_uverbs_device *dev, struct ib_xrcd *xrcd); 177 165 178 166 #define IB_UVERBS_DECLARE_CMD(name) \ 179 167 ssize_t ib_uverbs_##name(struct ib_uverbs_file *file, \ ··· 195 181 IB_UVERBS_DECLARE_CMD(req_notify_cq); 196 182 IB_UVERBS_DECLARE_CMD(destroy_cq); 197 183 IB_UVERBS_DECLARE_CMD(create_qp); 184 + IB_UVERBS_DECLARE_CMD(open_qp); 198 185 IB_UVERBS_DECLARE_CMD(query_qp); 199 186 IB_UVERBS_DECLARE_CMD(modify_qp); 200 187 IB_UVERBS_DECLARE_CMD(destroy_qp); ··· 210 195 IB_UVERBS_DECLARE_CMD(modify_srq); 211 196 IB_UVERBS_DECLARE_CMD(query_srq); 212 197 IB_UVERBS_DECLARE_CMD(destroy_srq); 198 + IB_UVERBS_DECLARE_CMD(create_xsrq); 199 + IB_UVERBS_DECLARE_CMD(open_xrcd); 200 + IB_UVERBS_DECLARE_CMD(close_xrcd); 213 201 214 202 #endif /* UVERBS_H */
+672 -109
drivers/infiniband/core/uverbs_cmd.c
··· 47 47 static struct lock_class_key qp_lock_key; 48 48 static struct lock_class_key ah_lock_key; 49 49 static struct lock_class_key srq_lock_key; 50 + static struct lock_class_key xrcd_lock_key; 50 51 51 52 #define INIT_UDATA(udata, ibuf, obuf, ilen, olen) \ 52 53 do { \ ··· 256 255 put_uobj_read(srq->uobject); 257 256 } 258 257 258 + static struct ib_xrcd *idr_read_xrcd(int xrcd_handle, struct ib_ucontext *context, 259 + struct ib_uobject **uobj) 260 + { 261 + *uobj = idr_read_uobj(&ib_uverbs_xrcd_idr, xrcd_handle, context, 0); 262 + return *uobj ? (*uobj)->object : NULL; 263 + } 264 + 265 + static void put_xrcd_read(struct ib_uobject *uobj) 266 + { 267 + put_uobj_read(uobj); 268 + } 269 + 259 270 ssize_t ib_uverbs_get_context(struct ib_uverbs_file *file, 260 271 const char __user *buf, 261 272 int in_len, int out_len) ··· 311 298 INIT_LIST_HEAD(&ucontext->qp_list); 312 299 INIT_LIST_HEAD(&ucontext->srq_list); 313 300 INIT_LIST_HEAD(&ucontext->ah_list); 301 + INIT_LIST_HEAD(&ucontext->xrcd_list); 314 302 ucontext->closing = 0; 315 303 316 304 resp.num_comp_vectors = file->device->num_comp_vectors; ··· 591 577 put_uobj(uobj); 592 578 593 579 return in_len; 580 + } 581 + 582 + struct xrcd_table_entry { 583 + struct rb_node node; 584 + struct ib_xrcd *xrcd; 585 + struct inode *inode; 586 + }; 587 + 588 + static int xrcd_table_insert(struct ib_uverbs_device *dev, 589 + struct inode *inode, 590 + struct ib_xrcd *xrcd) 591 + { 592 + struct xrcd_table_entry *entry, *scan; 593 + struct rb_node **p = &dev->xrcd_tree.rb_node; 594 + struct rb_node *parent = NULL; 595 + 596 + entry = kmalloc(sizeof *entry, GFP_KERNEL); 597 + if (!entry) 598 + return -ENOMEM; 599 + 600 + entry->xrcd = xrcd; 601 + entry->inode = inode; 602 + 603 + while (*p) { 604 + parent = *p; 605 + scan = rb_entry(parent, struct xrcd_table_entry, node); 606 + 607 + if (inode < scan->inode) { 608 + p = &(*p)->rb_left; 609 + } else if (inode > scan->inode) { 610 + p = &(*p)->rb_right; 611 + } else { 612 + kfree(entry); 613 + return -EEXIST; 614 + } 615 + } 616 + 617 + rb_link_node(&entry->node, parent, p); 618 + rb_insert_color(&entry->node, &dev->xrcd_tree); 619 + igrab(inode); 620 + return 0; 621 + } 622 + 623 + static struct xrcd_table_entry *xrcd_table_search(struct ib_uverbs_device *dev, 624 + struct inode *inode) 625 + { 626 + struct xrcd_table_entry *entry; 627 + struct rb_node *p = dev->xrcd_tree.rb_node; 628 + 629 + while (p) { 630 + entry = rb_entry(p, struct xrcd_table_entry, node); 631 + 632 + if (inode < entry->inode) 633 + p = p->rb_left; 634 + else if (inode > entry->inode) 635 + p = p->rb_right; 636 + else 637 + return entry; 638 + } 639 + 640 + return NULL; 641 + } 642 + 643 + static struct ib_xrcd *find_xrcd(struct ib_uverbs_device *dev, struct inode *inode) 644 + { 645 + struct xrcd_table_entry *entry; 646 + 647 + entry = xrcd_table_search(dev, inode); 648 + if (!entry) 649 + return NULL; 650 + 651 + return entry->xrcd; 652 + } 653 + 654 + static void xrcd_table_delete(struct ib_uverbs_device *dev, 655 + struct inode *inode) 656 + { 657 + struct xrcd_table_entry *entry; 658 + 659 + entry = xrcd_table_search(dev, inode); 660 + if (entry) { 661 + iput(inode); 662 + rb_erase(&entry->node, &dev->xrcd_tree); 663 + kfree(entry); 664 + } 665 + } 666 + 667 + ssize_t ib_uverbs_open_xrcd(struct ib_uverbs_file *file, 668 + const char __user *buf, int in_len, 669 + int out_len) 670 + { 671 + struct ib_uverbs_open_xrcd cmd; 672 + struct ib_uverbs_open_xrcd_resp resp; 673 + struct ib_udata udata; 674 + struct ib_uxrcd_object *obj; 675 + struct ib_xrcd *xrcd = NULL; 676 + struct file *f = NULL; 677 + struct inode *inode = NULL; 678 + int ret = 0; 679 + int new_xrcd = 0; 680 + 681 + if (out_len < sizeof resp) 682 + return -ENOSPC; 683 + 684 + if (copy_from_user(&cmd, buf, sizeof cmd)) 685 + return -EFAULT; 686 + 687 + INIT_UDATA(&udata, buf + sizeof cmd, 688 + (unsigned long) cmd.response + sizeof resp, 689 + in_len - sizeof cmd, out_len - sizeof resp); 690 + 691 + mutex_lock(&file->device->xrcd_tree_mutex); 692 + 693 + if (cmd.fd != -1) { 694 + /* search for file descriptor */ 695 + f = fget(cmd.fd); 696 + if (!f) { 697 + ret = -EBADF; 698 + goto err_tree_mutex_unlock; 699 + } 700 + 701 + inode = f->f_dentry->d_inode; 702 + if (!inode) { 703 + ret = -EBADF; 704 + goto err_tree_mutex_unlock; 705 + } 706 + 707 + xrcd = find_xrcd(file->device, inode); 708 + if (!xrcd && !(cmd.oflags & O_CREAT)) { 709 + /* no file descriptor. Need CREATE flag */ 710 + ret = -EAGAIN; 711 + goto err_tree_mutex_unlock; 712 + } 713 + 714 + if (xrcd && cmd.oflags & O_EXCL) { 715 + ret = -EINVAL; 716 + goto err_tree_mutex_unlock; 717 + } 718 + } 719 + 720 + obj = kmalloc(sizeof *obj, GFP_KERNEL); 721 + if (!obj) { 722 + ret = -ENOMEM; 723 + goto err_tree_mutex_unlock; 724 + } 725 + 726 + init_uobj(&obj->uobject, 0, file->ucontext, &xrcd_lock_key); 727 + 728 + down_write(&obj->uobject.mutex); 729 + 730 + if (!xrcd) { 731 + xrcd = file->device->ib_dev->alloc_xrcd(file->device->ib_dev, 732 + file->ucontext, &udata); 733 + if (IS_ERR(xrcd)) { 734 + ret = PTR_ERR(xrcd); 735 + goto err; 736 + } 737 + 738 + xrcd->inode = inode; 739 + xrcd->device = file->device->ib_dev; 740 + atomic_set(&xrcd->usecnt, 0); 741 + mutex_init(&xrcd->tgt_qp_mutex); 742 + INIT_LIST_HEAD(&xrcd->tgt_qp_list); 743 + new_xrcd = 1; 744 + } 745 + 746 + atomic_set(&obj->refcnt, 0); 747 + obj->uobject.object = xrcd; 748 + ret = idr_add_uobj(&ib_uverbs_xrcd_idr, &obj->uobject); 749 + if (ret) 750 + goto err_idr; 751 + 752 + memset(&resp, 0, sizeof resp); 753 + resp.xrcd_handle = obj->uobject.id; 754 + 755 + if (inode) { 756 + if (new_xrcd) { 757 + /* create new inode/xrcd table entry */ 758 + ret = xrcd_table_insert(file->device, inode, xrcd); 759 + if (ret) 760 + goto err_insert_xrcd; 761 + } 762 + atomic_inc(&xrcd->usecnt); 763 + } 764 + 765 + if (copy_to_user((void __user *) (unsigned long) cmd.response, 766 + &resp, sizeof resp)) { 767 + ret = -EFAULT; 768 + goto err_copy; 769 + } 770 + 771 + if (f) 772 + fput(f); 773 + 774 + mutex_lock(&file->mutex); 775 + list_add_tail(&obj->uobject.list, &file->ucontext->xrcd_list); 776 + mutex_unlock(&file->mutex); 777 + 778 + obj->uobject.live = 1; 779 + up_write(&obj->uobject.mutex); 780 + 781 + mutex_unlock(&file->device->xrcd_tree_mutex); 782 + return in_len; 783 + 784 + err_copy: 785 + if (inode) { 786 + if (new_xrcd) 787 + xrcd_table_delete(file->device, inode); 788 + atomic_dec(&xrcd->usecnt); 789 + } 790 + 791 + err_insert_xrcd: 792 + idr_remove_uobj(&ib_uverbs_xrcd_idr, &obj->uobject); 793 + 794 + err_idr: 795 + ib_dealloc_xrcd(xrcd); 796 + 797 + err: 798 + put_uobj_write(&obj->uobject); 799 + 800 + err_tree_mutex_unlock: 801 + if (f) 802 + fput(f); 803 + 804 + mutex_unlock(&file->device->xrcd_tree_mutex); 805 + 806 + return ret; 807 + } 808 + 809 + ssize_t ib_uverbs_close_xrcd(struct ib_uverbs_file *file, 810 + const char __user *buf, int in_len, 811 + int out_len) 812 + { 813 + struct ib_uverbs_close_xrcd cmd; 814 + struct ib_uobject *uobj; 815 + struct ib_xrcd *xrcd = NULL; 816 + struct inode *inode = NULL; 817 + struct ib_uxrcd_object *obj; 818 + int live; 819 + int ret = 0; 820 + 821 + if (copy_from_user(&cmd, buf, sizeof cmd)) 822 + return -EFAULT; 823 + 824 + mutex_lock(&file->device->xrcd_tree_mutex); 825 + uobj = idr_write_uobj(&ib_uverbs_xrcd_idr, cmd.xrcd_handle, file->ucontext); 826 + if (!uobj) { 827 + ret = -EINVAL; 828 + goto out; 829 + } 830 + 831 + xrcd = uobj->object; 832 + inode = xrcd->inode; 833 + obj = container_of(uobj, struct ib_uxrcd_object, uobject); 834 + if (atomic_read(&obj->refcnt)) { 835 + put_uobj_write(uobj); 836 + ret = -EBUSY; 837 + goto out; 838 + } 839 + 840 + if (!inode || atomic_dec_and_test(&xrcd->usecnt)) { 841 + ret = ib_dealloc_xrcd(uobj->object); 842 + if (!ret) 843 + uobj->live = 0; 844 + } 845 + 846 + live = uobj->live; 847 + if (inode && ret) 848 + atomic_inc(&xrcd->usecnt); 849 + 850 + put_uobj_write(uobj); 851 + 852 + if (ret) 853 + goto out; 854 + 855 + if (inode && !live) 856 + xrcd_table_delete(file->device, inode); 857 + 858 + idr_remove_uobj(&ib_uverbs_xrcd_idr, uobj); 859 + mutex_lock(&file->mutex); 860 + list_del(&uobj->list); 861 + mutex_unlock(&file->mutex); 862 + 863 + put_uobj(uobj); 864 + ret = in_len; 865 + 866 + out: 867 + mutex_unlock(&file->device->xrcd_tree_mutex); 868 + return ret; 869 + } 870 + 871 + void ib_uverbs_dealloc_xrcd(struct ib_uverbs_device *dev, 872 + struct ib_xrcd *xrcd) 873 + { 874 + struct inode *inode; 875 + 876 + inode = xrcd->inode; 877 + if (inode && !atomic_dec_and_test(&xrcd->usecnt)) 878 + return; 879 + 880 + ib_dealloc_xrcd(xrcd); 881 + 882 + if (inode) 883 + xrcd_table_delete(dev, inode); 594 884 } 595 885 596 886 ssize_t ib_uverbs_reg_mr(struct ib_uverbs_file *file, ··· 1370 1052 struct ib_uverbs_create_qp_resp resp; 1371 1053 struct ib_udata udata; 1372 1054 struct ib_uqp_object *obj; 1373 - struct ib_pd *pd; 1374 - struct ib_cq *scq, *rcq; 1375 - struct ib_srq *srq; 1055 + struct ib_device *device; 1056 + struct ib_pd *pd = NULL; 1057 + struct ib_xrcd *xrcd = NULL; 1058 + struct ib_uobject *uninitialized_var(xrcd_uobj); 1059 + struct ib_cq *scq = NULL, *rcq = NULL; 1060 + struct ib_srq *srq = NULL; 1376 1061 struct ib_qp *qp; 1377 1062 struct ib_qp_init_attr attr; 1378 1063 int ret; ··· 1397 1076 init_uobj(&obj->uevent.uobject, cmd.user_handle, file->ucontext, &qp_lock_key); 1398 1077 down_write(&obj->uevent.uobject.mutex); 1399 1078 1400 - srq = cmd.is_srq ? idr_read_srq(cmd.srq_handle, file->ucontext) : NULL; 1401 - pd = idr_read_pd(cmd.pd_handle, file->ucontext); 1402 - scq = idr_read_cq(cmd.send_cq_handle, file->ucontext, 0); 1403 - rcq = cmd.recv_cq_handle == cmd.send_cq_handle ? 1404 - scq : idr_read_cq(cmd.recv_cq_handle, file->ucontext, 1); 1079 + if (cmd.qp_type == IB_QPT_XRC_TGT) { 1080 + xrcd = idr_read_xrcd(cmd.pd_handle, file->ucontext, &xrcd_uobj); 1081 + if (!xrcd) { 1082 + ret = -EINVAL; 1083 + goto err_put; 1084 + } 1085 + device = xrcd->device; 1086 + } else { 1087 + pd = idr_read_pd(cmd.pd_handle, file->ucontext); 1088 + scq = idr_read_cq(cmd.send_cq_handle, file->ucontext, 0); 1089 + if (!pd || !scq) { 1090 + ret = -EINVAL; 1091 + goto err_put; 1092 + } 1405 1093 1406 - if (!pd || !scq || !rcq || (cmd.is_srq && !srq)) { 1407 - ret = -EINVAL; 1408 - goto err_put; 1094 + if (cmd.qp_type == IB_QPT_XRC_INI) { 1095 + cmd.max_recv_wr = cmd.max_recv_sge = 0; 1096 + } else { 1097 + if (cmd.is_srq) { 1098 + srq = idr_read_srq(cmd.srq_handle, file->ucontext); 1099 + if (!srq || srq->srq_type != IB_SRQT_BASIC) { 1100 + ret = -EINVAL; 1101 + goto err_put; 1102 + } 1103 + } 1104 + rcq = (cmd.recv_cq_handle == cmd.send_cq_handle) ? 1105 + scq : idr_read_cq(cmd.recv_cq_handle, file->ucontext, 1); 1106 + if (!rcq) { 1107 + ret = -EINVAL; 1108 + goto err_put; 1109 + } 1110 + } 1111 + device = pd->device; 1409 1112 } 1410 1113 1411 1114 attr.event_handler = ib_uverbs_qp_event_handler; ··· 1437 1092 attr.send_cq = scq; 1438 1093 attr.recv_cq = rcq; 1439 1094 attr.srq = srq; 1095 + attr.xrcd = xrcd; 1440 1096 attr.sq_sig_type = cmd.sq_sig_all ? IB_SIGNAL_ALL_WR : IB_SIGNAL_REQ_WR; 1441 1097 attr.qp_type = cmd.qp_type; 1442 1098 attr.create_flags = 0; ··· 1452 1106 INIT_LIST_HEAD(&obj->uevent.event_list); 1453 1107 INIT_LIST_HEAD(&obj->mcast_list); 1454 1108 1455 - qp = pd->device->create_qp(pd, &attr, &udata); 1109 + if (cmd.qp_type == IB_QPT_XRC_TGT) 1110 + qp = ib_create_qp(pd, &attr); 1111 + else 1112 + qp = device->create_qp(pd, &attr, &udata); 1113 + 1456 1114 if (IS_ERR(qp)) { 1457 1115 ret = PTR_ERR(qp); 1458 1116 goto err_put; 1459 1117 } 1460 1118 1461 - qp->device = pd->device; 1462 - qp->pd = pd; 1463 - qp->send_cq = attr.send_cq; 1464 - qp->recv_cq = attr.recv_cq; 1465 - qp->srq = attr.srq; 1466 - qp->uobject = &obj->uevent.uobject; 1467 - qp->event_handler = attr.event_handler; 1468 - qp->qp_context = attr.qp_context; 1469 - qp->qp_type = attr.qp_type; 1470 - atomic_inc(&pd->usecnt); 1471 - atomic_inc(&attr.send_cq->usecnt); 1472 - atomic_inc(&attr.recv_cq->usecnt); 1473 - if (attr.srq) 1474 - atomic_inc(&attr.srq->usecnt); 1119 + if (cmd.qp_type != IB_QPT_XRC_TGT) { 1120 + qp->real_qp = qp; 1121 + qp->device = device; 1122 + qp->pd = pd; 1123 + qp->send_cq = attr.send_cq; 1124 + qp->recv_cq = attr.recv_cq; 1125 + qp->srq = attr.srq; 1126 + qp->event_handler = attr.event_handler; 1127 + qp->qp_context = attr.qp_context; 1128 + qp->qp_type = attr.qp_type; 1129 + atomic_inc(&pd->usecnt); 1130 + atomic_inc(&attr.send_cq->usecnt); 1131 + if (attr.recv_cq) 1132 + atomic_inc(&attr.recv_cq->usecnt); 1133 + if (attr.srq) 1134 + atomic_inc(&attr.srq->usecnt); 1135 + } 1136 + qp->uobject = &obj->uevent.uobject; 1475 1137 1476 1138 obj->uevent.uobject.object = qp; 1477 1139 ret = idr_add_uobj(&ib_uverbs_qp_idr, &obj->uevent.uobject); ··· 1501 1147 goto err_copy; 1502 1148 } 1503 1149 1504 - put_pd_read(pd); 1505 - put_cq_read(scq); 1506 - if (rcq != scq) 1150 + if (xrcd) 1151 + put_xrcd_read(xrcd_uobj); 1152 + if (pd) 1153 + put_pd_read(pd); 1154 + if (scq) 1155 + put_cq_read(scq); 1156 + if (rcq && rcq != scq) 1507 1157 put_cq_read(rcq); 1508 1158 if (srq) 1509 1159 put_srq_read(srq); ··· 1529 1171 ib_destroy_qp(qp); 1530 1172 1531 1173 err_put: 1174 + if (xrcd) 1175 + put_xrcd_read(xrcd_uobj); 1532 1176 if (pd) 1533 1177 put_pd_read(pd); 1534 1178 if (scq) ··· 1540 1180 if (srq) 1541 1181 put_srq_read(srq); 1542 1182 1183 + put_uobj_write(&obj->uevent.uobject); 1184 + return ret; 1185 + } 1186 + 1187 + ssize_t ib_uverbs_open_qp(struct ib_uverbs_file *file, 1188 + const char __user *buf, int in_len, int out_len) 1189 + { 1190 + struct ib_uverbs_open_qp cmd; 1191 + struct ib_uverbs_create_qp_resp resp; 1192 + struct ib_udata udata; 1193 + struct ib_uqp_object *obj; 1194 + struct ib_xrcd *xrcd; 1195 + struct ib_uobject *uninitialized_var(xrcd_uobj); 1196 + struct ib_qp *qp; 1197 + struct ib_qp_open_attr attr; 1198 + int ret; 1199 + 1200 + if (out_len < sizeof resp) 1201 + return -ENOSPC; 1202 + 1203 + if (copy_from_user(&cmd, buf, sizeof cmd)) 1204 + return -EFAULT; 1205 + 1206 + INIT_UDATA(&udata, buf + sizeof cmd, 1207 + (unsigned long) cmd.response + sizeof resp, 1208 + in_len - sizeof cmd, out_len - sizeof resp); 1209 + 1210 + obj = kmalloc(sizeof *obj, GFP_KERNEL); 1211 + if (!obj) 1212 + return -ENOMEM; 1213 + 1214 + init_uobj(&obj->uevent.uobject, cmd.user_handle, file->ucontext, &qp_lock_key); 1215 + down_write(&obj->uevent.uobject.mutex); 1216 + 1217 + xrcd = idr_read_xrcd(cmd.pd_handle, file->ucontext, &xrcd_uobj); 1218 + if (!xrcd) { 1219 + ret = -EINVAL; 1220 + goto err_put; 1221 + } 1222 + 1223 + attr.event_handler = ib_uverbs_qp_event_handler; 1224 + attr.qp_context = file; 1225 + attr.qp_num = cmd.qpn; 1226 + attr.qp_type = cmd.qp_type; 1227 + 1228 + obj->uevent.events_reported = 0; 1229 + INIT_LIST_HEAD(&obj->uevent.event_list); 1230 + INIT_LIST_HEAD(&obj->mcast_list); 1231 + 1232 + qp = ib_open_qp(xrcd, &attr); 1233 + if (IS_ERR(qp)) { 1234 + ret = PTR_ERR(qp); 1235 + goto err_put; 1236 + } 1237 + 1238 + qp->uobject = &obj->uevent.uobject; 1239 + 1240 + obj->uevent.uobject.object = qp; 1241 + ret = idr_add_uobj(&ib_uverbs_qp_idr, &obj->uevent.uobject); 1242 + if (ret) 1243 + goto err_destroy; 1244 + 1245 + memset(&resp, 0, sizeof resp); 1246 + resp.qpn = qp->qp_num; 1247 + resp.qp_handle = obj->uevent.uobject.id; 1248 + 1249 + if (copy_to_user((void __user *) (unsigned long) cmd.response, 1250 + &resp, sizeof resp)) { 1251 + ret = -EFAULT; 1252 + goto err_remove; 1253 + } 1254 + 1255 + put_xrcd_read(xrcd_uobj); 1256 + 1257 + mutex_lock(&file->mutex); 1258 + list_add_tail(&obj->uevent.uobject.list, &file->ucontext->qp_list); 1259 + mutex_unlock(&file->mutex); 1260 + 1261 + obj->uevent.uobject.live = 1; 1262 + 1263 + up_write(&obj->uevent.uobject.mutex); 1264 + 1265 + return in_len; 1266 + 1267 + err_remove: 1268 + idr_remove_uobj(&ib_uverbs_qp_idr, &obj->uevent.uobject); 1269 + 1270 + err_destroy: 1271 + ib_destroy_qp(qp); 1272 + 1273 + err_put: 1274 + put_xrcd_read(xrcd_uobj); 1543 1275 put_uobj_write(&obj->uevent.uobject); 1544 1276 return ret; 1545 1277 } ··· 1736 1284 return ret ? ret : in_len; 1737 1285 } 1738 1286 1287 + /* Remove ignored fields set in the attribute mask */ 1288 + static int modify_qp_mask(enum ib_qp_type qp_type, int mask) 1289 + { 1290 + switch (qp_type) { 1291 + case IB_QPT_XRC_INI: 1292 + return mask & ~(IB_QP_MAX_DEST_RD_ATOMIC | IB_QP_MIN_RNR_TIMER); 1293 + case IB_QPT_XRC_TGT: 1294 + return mask & ~(IB_QP_MAX_QP_RD_ATOMIC | IB_QP_RETRY_CNT | 1295 + IB_QP_RNR_RETRY); 1296 + default: 1297 + return mask; 1298 + } 1299 + } 1300 + 1739 1301 ssize_t ib_uverbs_modify_qp(struct ib_uverbs_file *file, 1740 1302 const char __user *buf, int in_len, 1741 1303 int out_len) ··· 1822 1356 attr->alt_ah_attr.ah_flags = cmd.alt_dest.is_global ? IB_AH_GRH : 0; 1823 1357 attr->alt_ah_attr.port_num = cmd.alt_dest.port_num; 1824 1358 1825 - ret = qp->device->modify_qp(qp, attr, cmd.attr_mask, &udata); 1359 + if (qp->real_qp == qp) { 1360 + ret = qp->device->modify_qp(qp, attr, 1361 + modify_qp_mask(qp->qp_type, cmd.attr_mask), &udata); 1362 + } else { 1363 + ret = ib_modify_qp(qp, attr, modify_qp_mask(qp->qp_type, cmd.attr_mask)); 1364 + } 1826 1365 1827 1366 put_qp_read(qp); 1828 1367 ··· 2024 1553 } 2025 1554 2026 1555 resp.bad_wr = 0; 2027 - ret = qp->device->post_send(qp, wr, &bad_wr); 1556 + ret = qp->device->post_send(qp->real_qp, wr, &bad_wr); 2028 1557 if (ret) 2029 1558 for (next = wr; next; next = next->next) { 2030 1559 ++resp.bad_wr; ··· 2162 1691 goto out; 2163 1692 2164 1693 resp.bad_wr = 0; 2165 - ret = qp->device->post_recv(qp, wr, &bad_wr); 1694 + ret = qp->device->post_recv(qp->real_qp, wr, &bad_wr); 2166 1695 2167 1696 put_qp_read(qp); 2168 1697 ··· 2446 1975 return ret ? ret : in_len; 2447 1976 } 2448 1977 1978 + int __uverbs_create_xsrq(struct ib_uverbs_file *file, 1979 + struct ib_uverbs_create_xsrq *cmd, 1980 + struct ib_udata *udata) 1981 + { 1982 + struct ib_uverbs_create_srq_resp resp; 1983 + struct ib_usrq_object *obj; 1984 + struct ib_pd *pd; 1985 + struct ib_srq *srq; 1986 + struct ib_uobject *uninitialized_var(xrcd_uobj); 1987 + struct ib_srq_init_attr attr; 1988 + int ret; 1989 + 1990 + obj = kmalloc(sizeof *obj, GFP_KERNEL); 1991 + if (!obj) 1992 + return -ENOMEM; 1993 + 1994 + init_uobj(&obj->uevent.uobject, cmd->user_handle, file->ucontext, &srq_lock_key); 1995 + down_write(&obj->uevent.uobject.mutex); 1996 + 1997 + pd = idr_read_pd(cmd->pd_handle, file->ucontext); 1998 + if (!pd) { 1999 + ret = -EINVAL; 2000 + goto err; 2001 + } 2002 + 2003 + if (cmd->srq_type == IB_SRQT_XRC) { 2004 + attr.ext.xrc.cq = idr_read_cq(cmd->cq_handle, file->ucontext, 0); 2005 + if (!attr.ext.xrc.cq) { 2006 + ret = -EINVAL; 2007 + goto err_put_pd; 2008 + } 2009 + 2010 + attr.ext.xrc.xrcd = idr_read_xrcd(cmd->xrcd_handle, file->ucontext, &xrcd_uobj); 2011 + if (!attr.ext.xrc.xrcd) { 2012 + ret = -EINVAL; 2013 + goto err_put_cq; 2014 + } 2015 + 2016 + obj->uxrcd = container_of(xrcd_uobj, struct ib_uxrcd_object, uobject); 2017 + atomic_inc(&obj->uxrcd->refcnt); 2018 + } 2019 + 2020 + attr.event_handler = ib_uverbs_srq_event_handler; 2021 + attr.srq_context = file; 2022 + attr.srq_type = cmd->srq_type; 2023 + attr.attr.max_wr = cmd->max_wr; 2024 + attr.attr.max_sge = cmd->max_sge; 2025 + attr.attr.srq_limit = cmd->srq_limit; 2026 + 2027 + obj->uevent.events_reported = 0; 2028 + INIT_LIST_HEAD(&obj->uevent.event_list); 2029 + 2030 + srq = pd->device->create_srq(pd, &attr, udata); 2031 + if (IS_ERR(srq)) { 2032 + ret = PTR_ERR(srq); 2033 + goto err_put; 2034 + } 2035 + 2036 + srq->device = pd->device; 2037 + srq->pd = pd; 2038 + srq->srq_type = cmd->srq_type; 2039 + srq->uobject = &obj->uevent.uobject; 2040 + srq->event_handler = attr.event_handler; 2041 + srq->srq_context = attr.srq_context; 2042 + 2043 + if (cmd->srq_type == IB_SRQT_XRC) { 2044 + srq->ext.xrc.cq = attr.ext.xrc.cq; 2045 + srq->ext.xrc.xrcd = attr.ext.xrc.xrcd; 2046 + atomic_inc(&attr.ext.xrc.cq->usecnt); 2047 + atomic_inc(&attr.ext.xrc.xrcd->usecnt); 2048 + } 2049 + 2050 + atomic_inc(&pd->usecnt); 2051 + atomic_set(&srq->usecnt, 0); 2052 + 2053 + obj->uevent.uobject.object = srq; 2054 + ret = idr_add_uobj(&ib_uverbs_srq_idr, &obj->uevent.uobject); 2055 + if (ret) 2056 + goto err_destroy; 2057 + 2058 + memset(&resp, 0, sizeof resp); 2059 + resp.srq_handle = obj->uevent.uobject.id; 2060 + resp.max_wr = attr.attr.max_wr; 2061 + resp.max_sge = attr.attr.max_sge; 2062 + if (cmd->srq_type == IB_SRQT_XRC) 2063 + resp.srqn = srq->ext.xrc.srq_num; 2064 + 2065 + if (copy_to_user((void __user *) (unsigned long) cmd->response, 2066 + &resp, sizeof resp)) { 2067 + ret = -EFAULT; 2068 + goto err_copy; 2069 + } 2070 + 2071 + if (cmd->srq_type == IB_SRQT_XRC) { 2072 + put_uobj_read(xrcd_uobj); 2073 + put_cq_read(attr.ext.xrc.cq); 2074 + } 2075 + put_pd_read(pd); 2076 + 2077 + mutex_lock(&file->mutex); 2078 + list_add_tail(&obj->uevent.uobject.list, &file->ucontext->srq_list); 2079 + mutex_unlock(&file->mutex); 2080 + 2081 + obj->uevent.uobject.live = 1; 2082 + 2083 + up_write(&obj->uevent.uobject.mutex); 2084 + 2085 + return 0; 2086 + 2087 + err_copy: 2088 + idr_remove_uobj(&ib_uverbs_srq_idr, &obj->uevent.uobject); 2089 + 2090 + err_destroy: 2091 + ib_destroy_srq(srq); 2092 + 2093 + err_put: 2094 + if (cmd->srq_type == IB_SRQT_XRC) { 2095 + atomic_dec(&obj->uxrcd->refcnt); 2096 + put_uobj_read(xrcd_uobj); 2097 + } 2098 + 2099 + err_put_cq: 2100 + if (cmd->srq_type == IB_SRQT_XRC) 2101 + put_cq_read(attr.ext.xrc.cq); 2102 + 2103 + err_put_pd: 2104 + put_pd_read(pd); 2105 + 2106 + err: 2107 + put_uobj_write(&obj->uevent.uobject); 2108 + return ret; 2109 + } 2110 + 2449 2111 ssize_t ib_uverbs_create_srq(struct ib_uverbs_file *file, 2450 2112 const char __user *buf, int in_len, 2451 2113 int out_len) 2452 2114 { 2453 2115 struct ib_uverbs_create_srq cmd; 2116 + struct ib_uverbs_create_xsrq xcmd; 2454 2117 struct ib_uverbs_create_srq_resp resp; 2455 2118 struct ib_udata udata; 2456 - struct ib_uevent_object *obj; 2457 - struct ib_pd *pd; 2458 - struct ib_srq *srq; 2459 - struct ib_srq_init_attr attr; 2119 + int ret; 2120 + 2121 + if (out_len < sizeof resp) 2122 + return -ENOSPC; 2123 + 2124 + if (copy_from_user(&cmd, buf, sizeof cmd)) 2125 + return -EFAULT; 2126 + 2127 + xcmd.response = cmd.response; 2128 + xcmd.user_handle = cmd.user_handle; 2129 + xcmd.srq_type = IB_SRQT_BASIC; 2130 + xcmd.pd_handle = cmd.pd_handle; 2131 + xcmd.max_wr = cmd.max_wr; 2132 + xcmd.max_sge = cmd.max_sge; 2133 + xcmd.srq_limit = cmd.srq_limit; 2134 + 2135 + INIT_UDATA(&udata, buf + sizeof cmd, 2136 + (unsigned long) cmd.response + sizeof resp, 2137 + in_len - sizeof cmd, out_len - sizeof resp); 2138 + 2139 + ret = __uverbs_create_xsrq(file, &xcmd, &udata); 2140 + if (ret) 2141 + return ret; 2142 + 2143 + return in_len; 2144 + } 2145 + 2146 + ssize_t ib_uverbs_create_xsrq(struct ib_uverbs_file *file, 2147 + const char __user *buf, int in_len, int out_len) 2148 + { 2149 + struct ib_uverbs_create_xsrq cmd; 2150 + struct ib_uverbs_create_srq_resp resp; 2151 + struct ib_udata udata; 2460 2152 int ret; 2461 2153 2462 2154 if (out_len < sizeof resp) ··· 2632 1998 (unsigned long) cmd.response + sizeof resp, 2633 1999 in_len - sizeof cmd, out_len - sizeof resp); 2634 2000 2635 - obj = kmalloc(sizeof *obj, GFP_KERNEL); 2636 - if (!obj) 2637 - return -ENOMEM; 2638 - 2639 - init_uobj(&obj->uobject, cmd.user_handle, file->ucontext, &srq_lock_key); 2640 - down_write(&obj->uobject.mutex); 2641 - 2642 - pd = idr_read_pd(cmd.pd_handle, file->ucontext); 2643 - if (!pd) { 2644 - ret = -EINVAL; 2645 - goto err; 2646 - } 2647 - 2648 - attr.event_handler = ib_uverbs_srq_event_handler; 2649 - attr.srq_context = file; 2650 - attr.attr.max_wr = cmd.max_wr; 2651 - attr.attr.max_sge = cmd.max_sge; 2652 - attr.attr.srq_limit = cmd.srq_limit; 2653 - 2654 - obj->events_reported = 0; 2655 - INIT_LIST_HEAD(&obj->event_list); 2656 - 2657 - srq = pd->device->create_srq(pd, &attr, &udata); 2658 - if (IS_ERR(srq)) { 2659 - ret = PTR_ERR(srq); 2660 - goto err_put; 2661 - } 2662 - 2663 - srq->device = pd->device; 2664 - srq->pd = pd; 2665 - srq->uobject = &obj->uobject; 2666 - srq->event_handler = attr.event_handler; 2667 - srq->srq_context = attr.srq_context; 2668 - atomic_inc(&pd->usecnt); 2669 - atomic_set(&srq->usecnt, 0); 2670 - 2671 - obj->uobject.object = srq; 2672 - ret = idr_add_uobj(&ib_uverbs_srq_idr, &obj->uobject); 2001 + ret = __uverbs_create_xsrq(file, &cmd, &udata); 2673 2002 if (ret) 2674 - goto err_destroy; 2675 - 2676 - memset(&resp, 0, sizeof resp); 2677 - resp.srq_handle = obj->uobject.id; 2678 - resp.max_wr = attr.attr.max_wr; 2679 - resp.max_sge = attr.attr.max_sge; 2680 - 2681 - if (copy_to_user((void __user *) (unsigned long) cmd.response, 2682 - &resp, sizeof resp)) { 2683 - ret = -EFAULT; 2684 - goto err_copy; 2685 - } 2686 - 2687 - put_pd_read(pd); 2688 - 2689 - mutex_lock(&file->mutex); 2690 - list_add_tail(&obj->uobject.list, &file->ucontext->srq_list); 2691 - mutex_unlock(&file->mutex); 2692 - 2693 - obj->uobject.live = 1; 2694 - 2695 - up_write(&obj->uobject.mutex); 2003 + return ret; 2696 2004 2697 2005 return in_len; 2698 - 2699 - err_copy: 2700 - idr_remove_uobj(&ib_uverbs_srq_idr, &obj->uobject); 2701 - 2702 - err_destroy: 2703 - ib_destroy_srq(srq); 2704 - 2705 - err_put: 2706 - put_pd_read(pd); 2707 - 2708 - err: 2709 - put_uobj_write(&obj->uobject); 2710 - return ret; 2711 2006 } 2712 2007 2713 2008 ssize_t ib_uverbs_modify_srq(struct ib_uverbs_file *file,
+26 -4
drivers/infiniband/core/uverbs_main.c
··· 72 72 DEFINE_IDR(ib_uverbs_cq_idr); 73 73 DEFINE_IDR(ib_uverbs_qp_idr); 74 74 DEFINE_IDR(ib_uverbs_srq_idr); 75 + DEFINE_IDR(ib_uverbs_xrcd_idr); 75 76 76 77 static DEFINE_SPINLOCK(map_lock); 77 78 static DECLARE_BITMAP(dev_map, IB_UVERBS_MAX_DEVICES); ··· 108 107 [IB_USER_VERBS_CMD_MODIFY_SRQ] = ib_uverbs_modify_srq, 109 108 [IB_USER_VERBS_CMD_QUERY_SRQ] = ib_uverbs_query_srq, 110 109 [IB_USER_VERBS_CMD_DESTROY_SRQ] = ib_uverbs_destroy_srq, 110 + [IB_USER_VERBS_CMD_OPEN_XRCD] = ib_uverbs_open_xrcd, 111 + [IB_USER_VERBS_CMD_CLOSE_XRCD] = ib_uverbs_close_xrcd, 112 + [IB_USER_VERBS_CMD_CREATE_XSRQ] = ib_uverbs_create_xsrq, 113 + [IB_USER_VERBS_CMD_OPEN_QP] = ib_uverbs_open_qp 111 114 }; 112 115 113 116 static void ib_uverbs_add_one(struct ib_device *device); ··· 207 202 container_of(uobj, struct ib_uqp_object, uevent.uobject); 208 203 209 204 idr_remove_uobj(&ib_uverbs_qp_idr, uobj); 210 - ib_uverbs_detach_umcast(qp, uqp); 211 - ib_destroy_qp(qp); 205 + if (qp != qp->real_qp) { 206 + ib_close_qp(qp); 207 + } else { 208 + ib_uverbs_detach_umcast(qp, uqp); 209 + ib_destroy_qp(qp); 210 + } 212 211 ib_uverbs_release_uevent(file, &uqp->uevent); 213 212 kfree(uqp); 214 213 } ··· 249 240 ib_dereg_mr(mr); 250 241 kfree(uobj); 251 242 } 243 + 244 + mutex_lock(&file->device->xrcd_tree_mutex); 245 + list_for_each_entry_safe(uobj, tmp, &context->xrcd_list, list) { 246 + struct ib_xrcd *xrcd = uobj->object; 247 + struct ib_uxrcd_object *uxrcd = 248 + container_of(uobj, struct ib_uxrcd_object, uobject); 249 + 250 + idr_remove_uobj(&ib_uverbs_xrcd_idr, uobj); 251 + ib_uverbs_dealloc_xrcd(file->device, xrcd); 252 + kfree(uxrcd); 253 + } 254 + mutex_unlock(&file->device->xrcd_tree_mutex); 252 255 253 256 list_for_each_entry_safe(uobj, tmp, &context->pd_list, list) { 254 257 struct ib_pd *pd = uobj->object; ··· 578 557 if (hdr.in_words * 4 != count) 579 558 return -EINVAL; 580 559 581 - if (hdr.command < 0 || 582 - hdr.command >= ARRAY_SIZE(uverbs_cmd_table) || 560 + if (hdr.command >= ARRAY_SIZE(uverbs_cmd_table) || 583 561 !uverbs_cmd_table[hdr.command]) 584 562 return -EINVAL; 585 563 ··· 761 741 762 742 kref_init(&uverbs_dev->ref); 763 743 init_completion(&uverbs_dev->comp); 744 + uverbs_dev->xrcd_tree = RB_ROOT; 745 + mutex_init(&uverbs_dev->xrcd_tree_mutex); 764 746 765 747 spin_lock(&map_lock); 766 748 devnum = find_first_zero_bit(dev_map, IB_UVERBS_MAX_DEVICES);
+348 -28
drivers/infiniband/core/verbs.c
··· 39 39 #include <linux/errno.h> 40 40 #include <linux/err.h> 41 41 #include <linux/string.h> 42 + #include <linux/slab.h> 42 43 43 44 #include <rdma/ib_verbs.h> 44 45 #include <rdma/ib_cache.h> ··· 77 76 } 78 77 } 79 78 EXPORT_SYMBOL(mult_to_ib_rate); 79 + 80 + int ib_rate_to_mbps(enum ib_rate rate) 81 + { 82 + switch (rate) { 83 + case IB_RATE_2_5_GBPS: return 2500; 84 + case IB_RATE_5_GBPS: return 5000; 85 + case IB_RATE_10_GBPS: return 10000; 86 + case IB_RATE_20_GBPS: return 20000; 87 + case IB_RATE_30_GBPS: return 30000; 88 + case IB_RATE_40_GBPS: return 40000; 89 + case IB_RATE_60_GBPS: return 60000; 90 + case IB_RATE_80_GBPS: return 80000; 91 + case IB_RATE_120_GBPS: return 120000; 92 + case IB_RATE_14_GBPS: return 14062; 93 + case IB_RATE_56_GBPS: return 56250; 94 + case IB_RATE_112_GBPS: return 112500; 95 + case IB_RATE_168_GBPS: return 168750; 96 + case IB_RATE_25_GBPS: return 25781; 97 + case IB_RATE_100_GBPS: return 103125; 98 + case IB_RATE_200_GBPS: return 206250; 99 + case IB_RATE_300_GBPS: return 309375; 100 + default: return -1; 101 + } 102 + } 103 + EXPORT_SYMBOL(ib_rate_to_mbps); 80 104 81 105 enum rdma_transport_type 82 106 rdma_node_get_transport(enum rdma_node_type node_type) ··· 276 250 srq->uobject = NULL; 277 251 srq->event_handler = srq_init_attr->event_handler; 278 252 srq->srq_context = srq_init_attr->srq_context; 253 + srq->srq_type = srq_init_attr->srq_type; 254 + if (srq->srq_type == IB_SRQT_XRC) { 255 + srq->ext.xrc.xrcd = srq_init_attr->ext.xrc.xrcd; 256 + srq->ext.xrc.cq = srq_init_attr->ext.xrc.cq; 257 + atomic_inc(&srq->ext.xrc.xrcd->usecnt); 258 + atomic_inc(&srq->ext.xrc.cq->usecnt); 259 + } 279 260 atomic_inc(&pd->usecnt); 280 261 atomic_set(&srq->usecnt, 0); 281 262 } ··· 312 279 int ib_destroy_srq(struct ib_srq *srq) 313 280 { 314 281 struct ib_pd *pd; 282 + enum ib_srq_type srq_type; 283 + struct ib_xrcd *uninitialized_var(xrcd); 284 + struct ib_cq *uninitialized_var(cq); 315 285 int ret; 316 286 317 287 if (atomic_read(&srq->usecnt)) 318 288 return -EBUSY; 319 289 320 290 pd = srq->pd; 291 + srq_type = srq->srq_type; 292 + if (srq_type == IB_SRQT_XRC) { 293 + xrcd = srq->ext.xrc.xrcd; 294 + cq = srq->ext.xrc.cq; 295 + } 321 296 322 297 ret = srq->device->destroy_srq(srq); 323 - if (!ret) 298 + if (!ret) { 324 299 atomic_dec(&pd->usecnt); 300 + if (srq_type == IB_SRQT_XRC) { 301 + atomic_dec(&xrcd->usecnt); 302 + atomic_dec(&cq->usecnt); 303 + } 304 + } 325 305 326 306 return ret; 327 307 } ··· 342 296 343 297 /* Queue pairs */ 344 298 299 + static void __ib_shared_qp_event_handler(struct ib_event *event, void *context) 300 + { 301 + struct ib_qp *qp = context; 302 + 303 + list_for_each_entry(event->element.qp, &qp->open_list, open_list) 304 + event->element.qp->event_handler(event, event->element.qp->qp_context); 305 + } 306 + 307 + static void __ib_insert_xrcd_qp(struct ib_xrcd *xrcd, struct ib_qp *qp) 308 + { 309 + mutex_lock(&xrcd->tgt_qp_mutex); 310 + list_add(&qp->xrcd_list, &xrcd->tgt_qp_list); 311 + mutex_unlock(&xrcd->tgt_qp_mutex); 312 + } 313 + 314 + static struct ib_qp *__ib_open_qp(struct ib_qp *real_qp, 315 + void (*event_handler)(struct ib_event *, void *), 316 + void *qp_context) 317 + { 318 + struct ib_qp *qp; 319 + unsigned long flags; 320 + 321 + qp = kzalloc(sizeof *qp, GFP_KERNEL); 322 + if (!qp) 323 + return ERR_PTR(-ENOMEM); 324 + 325 + qp->real_qp = real_qp; 326 + atomic_inc(&real_qp->usecnt); 327 + qp->device = real_qp->device; 328 + qp->event_handler = event_handler; 329 + qp->qp_context = qp_context; 330 + qp->qp_num = real_qp->qp_num; 331 + qp->qp_type = real_qp->qp_type; 332 + 333 + spin_lock_irqsave(&real_qp->device->event_handler_lock, flags); 334 + list_add(&qp->open_list, &real_qp->open_list); 335 + spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags); 336 + 337 + return qp; 338 + } 339 + 340 + struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd, 341 + struct ib_qp_open_attr *qp_open_attr) 342 + { 343 + struct ib_qp *qp, *real_qp; 344 + 345 + if (qp_open_attr->qp_type != IB_QPT_XRC_TGT) 346 + return ERR_PTR(-EINVAL); 347 + 348 + qp = ERR_PTR(-EINVAL); 349 + mutex_lock(&xrcd->tgt_qp_mutex); 350 + list_for_each_entry(real_qp, &xrcd->tgt_qp_list, xrcd_list) { 351 + if (real_qp->qp_num == qp_open_attr->qp_num) { 352 + qp = __ib_open_qp(real_qp, qp_open_attr->event_handler, 353 + qp_open_attr->qp_context); 354 + break; 355 + } 356 + } 357 + mutex_unlock(&xrcd->tgt_qp_mutex); 358 + return qp; 359 + } 360 + EXPORT_SYMBOL(ib_open_qp); 361 + 345 362 struct ib_qp *ib_create_qp(struct ib_pd *pd, 346 363 struct ib_qp_init_attr *qp_init_attr) 347 364 { 348 - struct ib_qp *qp; 365 + struct ib_qp *qp, *real_qp; 366 + struct ib_device *device; 349 367 350 - qp = pd->device->create_qp(pd, qp_init_attr, NULL); 368 + device = pd ? pd->device : qp_init_attr->xrcd->device; 369 + qp = device->create_qp(pd, qp_init_attr, NULL); 351 370 352 371 if (!IS_ERR(qp)) { 353 - qp->device = pd->device; 354 - qp->pd = pd; 355 - qp->send_cq = qp_init_attr->send_cq; 356 - qp->recv_cq = qp_init_attr->recv_cq; 357 - qp->srq = qp_init_attr->srq; 358 - qp->uobject = NULL; 359 - qp->event_handler = qp_init_attr->event_handler; 360 - qp->qp_context = qp_init_attr->qp_context; 361 - qp->qp_type = qp_init_attr->qp_type; 362 - atomic_inc(&pd->usecnt); 363 - atomic_inc(&qp_init_attr->send_cq->usecnt); 364 - atomic_inc(&qp_init_attr->recv_cq->usecnt); 365 - if (qp_init_attr->srq) 366 - atomic_inc(&qp_init_attr->srq->usecnt); 372 + qp->device = device; 373 + qp->real_qp = qp; 374 + qp->uobject = NULL; 375 + qp->qp_type = qp_init_attr->qp_type; 376 + 377 + if (qp_init_attr->qp_type == IB_QPT_XRC_TGT) { 378 + qp->event_handler = __ib_shared_qp_event_handler; 379 + qp->qp_context = qp; 380 + qp->pd = NULL; 381 + qp->send_cq = qp->recv_cq = NULL; 382 + qp->srq = NULL; 383 + qp->xrcd = qp_init_attr->xrcd; 384 + atomic_inc(&qp_init_attr->xrcd->usecnt); 385 + INIT_LIST_HEAD(&qp->open_list); 386 + atomic_set(&qp->usecnt, 0); 387 + 388 + real_qp = qp; 389 + qp = __ib_open_qp(real_qp, qp_init_attr->event_handler, 390 + qp_init_attr->qp_context); 391 + if (!IS_ERR(qp)) 392 + __ib_insert_xrcd_qp(qp_init_attr->xrcd, real_qp); 393 + else 394 + real_qp->device->destroy_qp(real_qp); 395 + } else { 396 + qp->event_handler = qp_init_attr->event_handler; 397 + qp->qp_context = qp_init_attr->qp_context; 398 + if (qp_init_attr->qp_type == IB_QPT_XRC_INI) { 399 + qp->recv_cq = NULL; 400 + qp->srq = NULL; 401 + } else { 402 + qp->recv_cq = qp_init_attr->recv_cq; 403 + atomic_inc(&qp_init_attr->recv_cq->usecnt); 404 + qp->srq = qp_init_attr->srq; 405 + if (qp->srq) 406 + atomic_inc(&qp_init_attr->srq->usecnt); 407 + } 408 + 409 + qp->pd = pd; 410 + qp->send_cq = qp_init_attr->send_cq; 411 + qp->xrcd = NULL; 412 + 413 + atomic_inc(&pd->usecnt); 414 + atomic_inc(&qp_init_attr->send_cq->usecnt); 415 + } 367 416 } 368 417 369 418 return qp; ··· 467 326 468 327 static const struct { 469 328 int valid; 470 - enum ib_qp_attr_mask req_param[IB_QPT_RAW_ETHERTYPE + 1]; 471 - enum ib_qp_attr_mask opt_param[IB_QPT_RAW_ETHERTYPE + 1]; 329 + enum ib_qp_attr_mask req_param[IB_QPT_MAX]; 330 + enum ib_qp_attr_mask opt_param[IB_QPT_MAX]; 472 331 } qp_state_table[IB_QPS_ERR + 1][IB_QPS_ERR + 1] = { 473 332 [IB_QPS_RESET] = { 474 333 [IB_QPS_RESET] = { .valid = 1 }, ··· 482 341 IB_QP_PORT | 483 342 IB_QP_ACCESS_FLAGS), 484 343 [IB_QPT_RC] = (IB_QP_PKEY_INDEX | 344 + IB_QP_PORT | 345 + IB_QP_ACCESS_FLAGS), 346 + [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX | 347 + IB_QP_PORT | 348 + IB_QP_ACCESS_FLAGS), 349 + [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX | 485 350 IB_QP_PORT | 486 351 IB_QP_ACCESS_FLAGS), 487 352 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX | ··· 512 365 [IB_QPT_RC] = (IB_QP_PKEY_INDEX | 513 366 IB_QP_PORT | 514 367 IB_QP_ACCESS_FLAGS), 368 + [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX | 369 + IB_QP_PORT | 370 + IB_QP_ACCESS_FLAGS), 371 + [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX | 372 + IB_QP_PORT | 373 + IB_QP_ACCESS_FLAGS), 515 374 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX | 516 375 IB_QP_QKEY), 517 376 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX | ··· 537 384 IB_QP_RQ_PSN | 538 385 IB_QP_MAX_DEST_RD_ATOMIC | 539 386 IB_QP_MIN_RNR_TIMER), 387 + [IB_QPT_XRC_INI] = (IB_QP_AV | 388 + IB_QP_PATH_MTU | 389 + IB_QP_DEST_QPN | 390 + IB_QP_RQ_PSN), 391 + [IB_QPT_XRC_TGT] = (IB_QP_AV | 392 + IB_QP_PATH_MTU | 393 + IB_QP_DEST_QPN | 394 + IB_QP_RQ_PSN | 395 + IB_QP_MAX_DEST_RD_ATOMIC | 396 + IB_QP_MIN_RNR_TIMER), 540 397 }, 541 398 .opt_param = { 542 399 [IB_QPT_UD] = (IB_QP_PKEY_INDEX | ··· 555 392 IB_QP_ACCESS_FLAGS | 556 393 IB_QP_PKEY_INDEX), 557 394 [IB_QPT_RC] = (IB_QP_ALT_PATH | 395 + IB_QP_ACCESS_FLAGS | 396 + IB_QP_PKEY_INDEX), 397 + [IB_QPT_XRC_INI] = (IB_QP_ALT_PATH | 398 + IB_QP_ACCESS_FLAGS | 399 + IB_QP_PKEY_INDEX), 400 + [IB_QPT_XRC_TGT] = (IB_QP_ALT_PATH | 558 401 IB_QP_ACCESS_FLAGS | 559 402 IB_QP_PKEY_INDEX), 560 403 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX | ··· 583 414 IB_QP_RNR_RETRY | 584 415 IB_QP_SQ_PSN | 585 416 IB_QP_MAX_QP_RD_ATOMIC), 417 + [IB_QPT_XRC_INI] = (IB_QP_TIMEOUT | 418 + IB_QP_RETRY_CNT | 419 + IB_QP_RNR_RETRY | 420 + IB_QP_SQ_PSN | 421 + IB_QP_MAX_QP_RD_ATOMIC), 422 + [IB_QPT_XRC_TGT] = (IB_QP_TIMEOUT | 423 + IB_QP_SQ_PSN), 586 424 [IB_QPT_SMI] = IB_QP_SQ_PSN, 587 425 [IB_QPT_GSI] = IB_QP_SQ_PSN, 588 426 }, ··· 601 425 IB_QP_ACCESS_FLAGS | 602 426 IB_QP_PATH_MIG_STATE), 603 427 [IB_QPT_RC] = (IB_QP_CUR_STATE | 428 + IB_QP_ALT_PATH | 429 + IB_QP_ACCESS_FLAGS | 430 + IB_QP_MIN_RNR_TIMER | 431 + IB_QP_PATH_MIG_STATE), 432 + [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE | 433 + IB_QP_ALT_PATH | 434 + IB_QP_ACCESS_FLAGS | 435 + IB_QP_PATH_MIG_STATE), 436 + [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE | 604 437 IB_QP_ALT_PATH | 605 438 IB_QP_ACCESS_FLAGS | 606 439 IB_QP_MIN_RNR_TIMER | ··· 638 453 IB_QP_ALT_PATH | 639 454 IB_QP_PATH_MIG_STATE | 640 455 IB_QP_MIN_RNR_TIMER), 456 + [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE | 457 + IB_QP_ACCESS_FLAGS | 458 + IB_QP_ALT_PATH | 459 + IB_QP_PATH_MIG_STATE), 460 + [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE | 461 + IB_QP_ACCESS_FLAGS | 462 + IB_QP_ALT_PATH | 463 + IB_QP_PATH_MIG_STATE | 464 + IB_QP_MIN_RNR_TIMER), 641 465 [IB_QPT_SMI] = (IB_QP_CUR_STATE | 642 466 IB_QP_QKEY), 643 467 [IB_QPT_GSI] = (IB_QP_CUR_STATE | ··· 659 465 [IB_QPT_UD] = IB_QP_EN_SQD_ASYNC_NOTIFY, 660 466 [IB_QPT_UC] = IB_QP_EN_SQD_ASYNC_NOTIFY, 661 467 [IB_QPT_RC] = IB_QP_EN_SQD_ASYNC_NOTIFY, 468 + [IB_QPT_XRC_INI] = IB_QP_EN_SQD_ASYNC_NOTIFY, 469 + [IB_QPT_XRC_TGT] = IB_QP_EN_SQD_ASYNC_NOTIFY, /* ??? */ 662 470 [IB_QPT_SMI] = IB_QP_EN_SQD_ASYNC_NOTIFY, 663 471 [IB_QPT_GSI] = IB_QP_EN_SQD_ASYNC_NOTIFY 664 472 } ··· 679 483 IB_QP_ACCESS_FLAGS | 680 484 IB_QP_PATH_MIG_STATE), 681 485 [IB_QPT_RC] = (IB_QP_CUR_STATE | 486 + IB_QP_ALT_PATH | 487 + IB_QP_ACCESS_FLAGS | 488 + IB_QP_MIN_RNR_TIMER | 489 + IB_QP_PATH_MIG_STATE), 490 + [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE | 491 + IB_QP_ALT_PATH | 492 + IB_QP_ACCESS_FLAGS | 493 + IB_QP_PATH_MIG_STATE), 494 + [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE | 682 495 IB_QP_ALT_PATH | 683 496 IB_QP_ACCESS_FLAGS | 684 497 IB_QP_MIN_RNR_TIMER | ··· 714 509 IB_QP_RETRY_CNT | 715 510 IB_QP_RNR_RETRY | 716 511 IB_QP_MAX_QP_RD_ATOMIC | 512 + IB_QP_MAX_DEST_RD_ATOMIC | 513 + IB_QP_ALT_PATH | 514 + IB_QP_ACCESS_FLAGS | 515 + IB_QP_PKEY_INDEX | 516 + IB_QP_MIN_RNR_TIMER | 517 + IB_QP_PATH_MIG_STATE), 518 + [IB_QPT_XRC_INI] = (IB_QP_PORT | 519 + IB_QP_AV | 520 + IB_QP_TIMEOUT | 521 + IB_QP_RETRY_CNT | 522 + IB_QP_RNR_RETRY | 523 + IB_QP_MAX_QP_RD_ATOMIC | 524 + IB_QP_ALT_PATH | 525 + IB_QP_ACCESS_FLAGS | 526 + IB_QP_PKEY_INDEX | 527 + IB_QP_PATH_MIG_STATE), 528 + [IB_QPT_XRC_TGT] = (IB_QP_PORT | 529 + IB_QP_AV | 530 + IB_QP_TIMEOUT | 717 531 IB_QP_MAX_DEST_RD_ATOMIC | 718 532 IB_QP_ALT_PATH | 719 533 IB_QP_ACCESS_FLAGS | ··· 803 579 struct ib_qp_attr *qp_attr, 804 580 int qp_attr_mask) 805 581 { 806 - return qp->device->modify_qp(qp, qp_attr, qp_attr_mask, NULL); 582 + return qp->device->modify_qp(qp->real_qp, qp_attr, qp_attr_mask, NULL); 807 583 } 808 584 EXPORT_SYMBOL(ib_modify_qp); 809 585 ··· 813 589 struct ib_qp_init_attr *qp_init_attr) 814 590 { 815 591 return qp->device->query_qp ? 816 - qp->device->query_qp(qp, qp_attr, qp_attr_mask, qp_init_attr) : 592 + qp->device->query_qp(qp->real_qp, qp_attr, qp_attr_mask, qp_init_attr) : 817 593 -ENOSYS; 818 594 } 819 595 EXPORT_SYMBOL(ib_query_qp); 596 + 597 + int ib_close_qp(struct ib_qp *qp) 598 + { 599 + struct ib_qp *real_qp; 600 + unsigned long flags; 601 + 602 + real_qp = qp->real_qp; 603 + if (real_qp == qp) 604 + return -EINVAL; 605 + 606 + spin_lock_irqsave(&real_qp->device->event_handler_lock, flags); 607 + list_del(&qp->open_list); 608 + spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags); 609 + 610 + atomic_dec(&real_qp->usecnt); 611 + kfree(qp); 612 + 613 + return 0; 614 + } 615 + EXPORT_SYMBOL(ib_close_qp); 616 + 617 + static int __ib_destroy_shared_qp(struct ib_qp *qp) 618 + { 619 + struct ib_xrcd *xrcd; 620 + struct ib_qp *real_qp; 621 + int ret; 622 + 623 + real_qp = qp->real_qp; 624 + xrcd = real_qp->xrcd; 625 + 626 + mutex_lock(&xrcd->tgt_qp_mutex); 627 + ib_close_qp(qp); 628 + if (atomic_read(&real_qp->usecnt) == 0) 629 + list_del(&real_qp->xrcd_list); 630 + else 631 + real_qp = NULL; 632 + mutex_unlock(&xrcd->tgt_qp_mutex); 633 + 634 + if (real_qp) { 635 + ret = ib_destroy_qp(real_qp); 636 + if (!ret) 637 + atomic_dec(&xrcd->usecnt); 638 + else 639 + __ib_insert_xrcd_qp(xrcd, real_qp); 640 + } 641 + 642 + return 0; 643 + } 820 644 821 645 int ib_destroy_qp(struct ib_qp *qp) 822 646 { ··· 873 601 struct ib_srq *srq; 874 602 int ret; 875 603 876 - pd = qp->pd; 877 - scq = qp->send_cq; 878 - rcq = qp->recv_cq; 879 - srq = qp->srq; 604 + if (atomic_read(&qp->usecnt)) 605 + return -EBUSY; 606 + 607 + if (qp->real_qp != qp) 608 + return __ib_destroy_shared_qp(qp); 609 + 610 + pd = qp->pd; 611 + scq = qp->send_cq; 612 + rcq = qp->recv_cq; 613 + srq = qp->srq; 880 614 881 615 ret = qp->device->destroy_qp(qp); 882 616 if (!ret) { 883 - atomic_dec(&pd->usecnt); 884 - atomic_dec(&scq->usecnt); 885 - atomic_dec(&rcq->usecnt); 617 + if (pd) 618 + atomic_dec(&pd->usecnt); 619 + if (scq) 620 + atomic_dec(&scq->usecnt); 621 + if (rcq) 622 + atomic_dec(&rcq->usecnt); 886 623 if (srq) 887 624 atomic_dec(&srq->usecnt); 888 625 } ··· 1201 920 return qp->device->detach_mcast(qp, gid, lid); 1202 921 } 1203 922 EXPORT_SYMBOL(ib_detach_mcast); 923 + 924 + struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device) 925 + { 926 + struct ib_xrcd *xrcd; 927 + 928 + if (!device->alloc_xrcd) 929 + return ERR_PTR(-ENOSYS); 930 + 931 + xrcd = device->alloc_xrcd(device, NULL, NULL); 932 + if (!IS_ERR(xrcd)) { 933 + xrcd->device = device; 934 + xrcd->inode = NULL; 935 + atomic_set(&xrcd->usecnt, 0); 936 + mutex_init(&xrcd->tgt_qp_mutex); 937 + INIT_LIST_HEAD(&xrcd->tgt_qp_list); 938 + } 939 + 940 + return xrcd; 941 + } 942 + EXPORT_SYMBOL(ib_alloc_xrcd); 943 + 944 + int ib_dealloc_xrcd(struct ib_xrcd *xrcd) 945 + { 946 + struct ib_qp *qp; 947 + int ret; 948 + 949 + if (atomic_read(&xrcd->usecnt)) 950 + return -EBUSY; 951 + 952 + while (!list_empty(&xrcd->tgt_qp_list)) { 953 + qp = list_entry(xrcd->tgt_qp_list.next, struct ib_qp, xrcd_list); 954 + ret = ib_destroy_qp(qp); 955 + if (ret) 956 + return ret; 957 + } 958 + 959 + return xrcd->device->dealloc_xrcd(xrcd); 960 + } 961 + EXPORT_SYMBOL(ib_dealloc_xrcd);
+5
drivers/infiniband/hw/amso1100/c2_ae.c
··· 288 288 cm_event.private_data_len = 289 289 be32_to_cpu(req->private_data_length); 290 290 cm_event.private_data = req->private_data; 291 + /* 292 + * Until ird/ord negotiation via MPAv2 support is added, send 293 + * max supported values 294 + */ 295 + cm_event.ird = cm_event.ord = 128; 291 296 292 297 if (cm_id->event_handler) 293 298 cm_id->event_handler(cm_id, &cm_event);
+5
drivers/infiniband/hw/amso1100/c2_intr.c
··· 183 183 case IW_CM_EVENT_ESTABLISHED: 184 184 c2_set_qp_state(req->qp, 185 185 C2_QP_STATE_RTS); 186 + /* 187 + * Until ird/ord negotiation via MPAv2 support is added, send 188 + * max supported values 189 + */ 190 + cm_event.ird = cm_event.ord = 128; 186 191 case IW_CM_EVENT_CLOSE: 187 192 188 193 /*
+1 -4
drivers/infiniband/hw/amso1100/c2_provider.c
··· 753 753 memcpy_fromio(netdev->dev_addr, c2dev->kva + C2_REGS_RDMA_ENADDR, 6); 754 754 755 755 /* Print out the MAC address */ 756 - pr_debug("%s: MAC %02X:%02X:%02X:%02X:%02X:%02X\n", 757 - netdev->name, 758 - netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2], 759 - netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]); 756 + pr_debug("%s: MAC %pM\n", netdev->name, netdev->dev_addr); 760 757 761 758 #if 0 762 759 /* Disable network packets */
+10
drivers/infiniband/hw/cxgb3/iwch_cm.c
··· 753 753 event.private_data_len = ep->plen; 754 754 event.private_data = ep->mpa_pkt + sizeof(struct mpa_message); 755 755 event.provider_data = ep; 756 + /* 757 + * Until ird/ord negotiation via MPAv2 support is added, send max 758 + * supported values 759 + */ 760 + event.ird = event.ord = 8; 756 761 if (state_read(&ep->parent_ep->com) != DEAD) { 757 762 get_ep(&ep->com); 758 763 ep->parent_ep->com.cm_id->event_handler( ··· 775 770 PDBG("%s ep %p\n", __func__, ep); 776 771 memset(&event, 0, sizeof(event)); 777 772 event.event = IW_CM_EVENT_ESTABLISHED; 773 + /* 774 + * Until ird/ord negotiation via MPAv2 support is added, send max 775 + * supported values 776 + */ 777 + event.ird = event.ord = 8; 778 778 if (ep->com.cm_id) { 779 779 PDBG("%s ep %p tid %d\n", __func__, ep, ep->hwtid); 780 780 ep->com.cm_id->event_handler(ep->com.cm_id, &event);
+6
drivers/infiniband/hw/cxgb3/iwch_ev.c
··· 46 46 struct ib_event event; 47 47 struct iwch_qp_attributes attrs; 48 48 struct iwch_qp *qhp; 49 + unsigned long flag; 49 50 50 51 spin_lock(&rnicp->lock); 51 52 qhp = get_qhp(rnicp, CQE_QPID(rsp_msg->cqe)); ··· 95 94 if (qhp->ibqp.event_handler) 96 95 (*qhp->ibqp.event_handler)(&event, qhp->ibqp.qp_context); 97 96 97 + spin_lock_irqsave(&chp->comp_handler_lock, flag); 98 98 (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context); 99 + spin_unlock_irqrestore(&chp->comp_handler_lock, flag); 99 100 100 101 if (atomic_dec_and_test(&qhp->refcnt)) 101 102 wake_up(&qhp->wait); ··· 110 107 struct iwch_cq *chp; 111 108 struct iwch_qp *qhp; 112 109 u32 cqid = RSPQ_CQID(rsp_msg); 110 + unsigned long flag; 113 111 114 112 rnicp = (struct iwch_dev *) rdev_p->ulp; 115 113 spin_lock(&rnicp->lock); ··· 174 170 */ 175 171 if (qhp->ep && SQ_TYPE(rsp_msg->cqe)) 176 172 dst_confirm(qhp->ep->dst); 173 + spin_lock_irqsave(&chp->comp_handler_lock, flag); 177 174 (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context); 175 + spin_unlock_irqrestore(&chp->comp_handler_lock, flag); 178 176 break; 179 177 180 178 case TPT_ERR_STAG:
+1
drivers/infiniband/hw/cxgb3/iwch_provider.c
··· 190 190 chp->rhp = rhp; 191 191 chp->ibcq.cqe = 1 << chp->cq.size_log2; 192 192 spin_lock_init(&chp->lock); 193 + spin_lock_init(&chp->comp_handler_lock); 193 194 atomic_set(&chp->refcnt, 1); 194 195 init_waitqueue_head(&chp->wait); 195 196 if (insert_handle(rhp, &rhp->cqidr, chp, chp->cq.cqid)) {
+1
drivers/infiniband/hw/cxgb3/iwch_provider.h
··· 103 103 struct iwch_dev *rhp; 104 104 struct t3_cq cq; 105 105 spinlock_t lock; 106 + spinlock_t comp_handler_lock; 106 107 atomic_t refcnt; 107 108 wait_queue_head_t wait; 108 109 u32 __user *user_rptr_addr;
+12 -2
drivers/infiniband/hw/cxgb3/iwch_qp.c
··· 822 822 flushed = cxio_flush_rq(&qhp->wq, &rchp->cq, count); 823 823 spin_unlock(&qhp->lock); 824 824 spin_unlock_irqrestore(&rchp->lock, *flag); 825 - if (flushed) 825 + if (flushed) { 826 + spin_lock_irqsave(&rchp->comp_handler_lock, *flag); 826 827 (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); 828 + spin_unlock_irqrestore(&rchp->comp_handler_lock, *flag); 829 + } 827 830 828 831 /* locking hierarchy: cq lock first, then qp lock. */ 829 832 spin_lock_irqsave(&schp->lock, *flag); ··· 836 833 flushed = cxio_flush_sq(&qhp->wq, &schp->cq, count); 837 834 spin_unlock(&qhp->lock); 838 835 spin_unlock_irqrestore(&schp->lock, *flag); 839 - if (flushed) 836 + if (flushed) { 837 + spin_lock_irqsave(&schp->comp_handler_lock, *flag); 840 838 (*schp->ibcq.comp_handler)(&schp->ibcq, schp->ibcq.cq_context); 839 + spin_unlock_irqrestore(&schp->comp_handler_lock, *flag); 840 + } 841 841 842 842 /* deref */ 843 843 if (atomic_dec_and_test(&qhp->refcnt)) ··· 859 853 if (qhp->ibqp.uobject) { 860 854 cxio_set_wq_in_error(&qhp->wq); 861 855 cxio_set_cq_in_error(&rchp->cq); 856 + spin_lock_irqsave(&rchp->comp_handler_lock, *flag); 862 857 (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); 858 + spin_unlock_irqrestore(&rchp->comp_handler_lock, *flag); 863 859 if (schp != rchp) { 864 860 cxio_set_cq_in_error(&schp->cq); 861 + spin_lock_irqsave(&schp->comp_handler_lock, *flag); 865 862 (*schp->ibcq.comp_handler)(&schp->ibcq, 866 863 schp->ibcq.cq_context); 864 + spin_unlock_irqrestore(&schp->comp_handler_lock, *flag); 867 865 } 868 866 return; 869 867 }
+433 -36
drivers/infiniband/hw/cxgb4/cm.c
··· 103 103 static int mpa_rev = 1; 104 104 module_param(mpa_rev, int, 0644); 105 105 MODULE_PARM_DESC(mpa_rev, "MPA Revision, 0 supports amso1100, " 106 - "1 is spec compliant. (default=1)"); 106 + "1 is RFC0544 spec compliant, 2 is IETF MPA Peer Connect Draft" 107 + " compliant (default=1)"); 107 108 108 109 static int markers_enabled; 109 110 module_param(markers_enabled, int, 0644); ··· 498 497 return c4iw_l2t_send(&ep->com.dev->rdev, skb, ep->l2t); 499 498 } 500 499 501 - static void send_mpa_req(struct c4iw_ep *ep, struct sk_buff *skb) 500 + static void send_mpa_req(struct c4iw_ep *ep, struct sk_buff *skb, 501 + u8 mpa_rev_to_use) 502 502 { 503 503 int mpalen, wrlen; 504 504 struct fw_ofld_tx_data_wr *req; 505 505 struct mpa_message *mpa; 506 + struct mpa_v2_conn_params mpa_v2_params; 506 507 507 508 PDBG("%s ep %p tid %u pd_len %d\n", __func__, ep, ep->hwtid, ep->plen); 508 509 509 510 BUG_ON(skb_cloned(skb)); 510 511 511 512 mpalen = sizeof(*mpa) + ep->plen; 513 + if (mpa_rev_to_use == 2) 514 + mpalen += sizeof(struct mpa_v2_conn_params); 512 515 wrlen = roundup(mpalen + sizeof *req, 16); 513 516 skb = get_skb(skb, wrlen, GFP_KERNEL); 514 517 if (!skb) { ··· 538 533 mpa = (struct mpa_message *)(req + 1); 539 534 memcpy(mpa->key, MPA_KEY_REQ, sizeof(mpa->key)); 540 535 mpa->flags = (crc_enabled ? MPA_CRC : 0) | 541 - (markers_enabled ? MPA_MARKERS : 0); 536 + (markers_enabled ? MPA_MARKERS : 0) | 537 + (mpa_rev_to_use == 2 ? MPA_ENHANCED_RDMA_CONN : 0); 542 538 mpa->private_data_size = htons(ep->plen); 543 - mpa->revision = mpa_rev; 539 + mpa->revision = mpa_rev_to_use; 540 + if (mpa_rev_to_use == 1) 541 + ep->tried_with_mpa_v1 = 1; 544 542 545 - if (ep->plen) 546 - memcpy(mpa->private_data, ep->mpa_pkt + sizeof(*mpa), ep->plen); 543 + if (mpa_rev_to_use == 2) { 544 + mpa->private_data_size += 545 + htons(sizeof(struct mpa_v2_conn_params)); 546 + mpa_v2_params.ird = htons((u16)ep->ird); 547 + mpa_v2_params.ord = htons((u16)ep->ord); 548 + 549 + if (peer2peer) { 550 + mpa_v2_params.ird |= htons(MPA_V2_PEER2PEER_MODEL); 551 + if (p2p_type == FW_RI_INIT_P2PTYPE_RDMA_WRITE) 552 + mpa_v2_params.ord |= 553 + htons(MPA_V2_RDMA_WRITE_RTR); 554 + else if (p2p_type == FW_RI_INIT_P2PTYPE_READ_REQ) 555 + mpa_v2_params.ord |= 556 + htons(MPA_V2_RDMA_READ_RTR); 557 + } 558 + memcpy(mpa->private_data, &mpa_v2_params, 559 + sizeof(struct mpa_v2_conn_params)); 560 + 561 + if (ep->plen) 562 + memcpy(mpa->private_data + 563 + sizeof(struct mpa_v2_conn_params), 564 + ep->mpa_pkt + sizeof(*mpa), ep->plen); 565 + } else 566 + if (ep->plen) 567 + memcpy(mpa->private_data, 568 + ep->mpa_pkt + sizeof(*mpa), ep->plen); 547 569 548 570 /* 549 571 * Reference the mpa skb. This ensures the data area ··· 594 562 struct fw_ofld_tx_data_wr *req; 595 563 struct mpa_message *mpa; 596 564 struct sk_buff *skb; 565 + struct mpa_v2_conn_params mpa_v2_params; 597 566 598 567 PDBG("%s ep %p tid %u pd_len %d\n", __func__, ep, ep->hwtid, ep->plen); 599 568 600 569 mpalen = sizeof(*mpa) + plen; 570 + if (ep->mpa_attr.version == 2 && ep->mpa_attr.enhanced_rdma_conn) 571 + mpalen += sizeof(struct mpa_v2_conn_params); 601 572 wrlen = roundup(mpalen + sizeof *req, 16); 602 573 603 574 skb = get_skb(NULL, wrlen, GFP_KERNEL); ··· 630 595 mpa->flags = MPA_REJECT; 631 596 mpa->revision = mpa_rev; 632 597 mpa->private_data_size = htons(plen); 633 - if (plen) 634 - memcpy(mpa->private_data, pdata, plen); 598 + 599 + if (ep->mpa_attr.version == 2 && ep->mpa_attr.enhanced_rdma_conn) { 600 + mpa->flags |= MPA_ENHANCED_RDMA_CONN; 601 + mpa->private_data_size += 602 + htons(sizeof(struct mpa_v2_conn_params)); 603 + mpa_v2_params.ird = htons(((u16)ep->ird) | 604 + (peer2peer ? MPA_V2_PEER2PEER_MODEL : 605 + 0)); 606 + mpa_v2_params.ord = htons(((u16)ep->ord) | (peer2peer ? 607 + (p2p_type == 608 + FW_RI_INIT_P2PTYPE_RDMA_WRITE ? 609 + MPA_V2_RDMA_WRITE_RTR : p2p_type == 610 + FW_RI_INIT_P2PTYPE_READ_REQ ? 611 + MPA_V2_RDMA_READ_RTR : 0) : 0)); 612 + memcpy(mpa->private_data, &mpa_v2_params, 613 + sizeof(struct mpa_v2_conn_params)); 614 + 615 + if (ep->plen) 616 + memcpy(mpa->private_data + 617 + sizeof(struct mpa_v2_conn_params), pdata, plen); 618 + } else 619 + if (plen) 620 + memcpy(mpa->private_data, pdata, plen); 635 621 636 622 /* 637 623 * Reference the mpa skb again. This ensures the data area ··· 673 617 struct fw_ofld_tx_data_wr *req; 674 618 struct mpa_message *mpa; 675 619 struct sk_buff *skb; 620 + struct mpa_v2_conn_params mpa_v2_params; 676 621 677 622 PDBG("%s ep %p tid %u pd_len %d\n", __func__, ep, ep->hwtid, ep->plen); 678 623 679 624 mpalen = sizeof(*mpa) + plen; 625 + if (ep->mpa_attr.version == 2 && ep->mpa_attr.enhanced_rdma_conn) 626 + mpalen += sizeof(struct mpa_v2_conn_params); 680 627 wrlen = roundup(mpalen + sizeof *req, 16); 681 628 682 629 skb = get_skb(NULL, wrlen, GFP_KERNEL); ··· 708 649 memcpy(mpa->key, MPA_KEY_REP, sizeof(mpa->key)); 709 650 mpa->flags = (ep->mpa_attr.crc_enabled ? MPA_CRC : 0) | 710 651 (markers_enabled ? MPA_MARKERS : 0); 711 - mpa->revision = mpa_rev; 652 + mpa->revision = ep->mpa_attr.version; 712 653 mpa->private_data_size = htons(plen); 713 - if (plen) 714 - memcpy(mpa->private_data, pdata, plen); 654 + 655 + if (ep->mpa_attr.version == 2 && ep->mpa_attr.enhanced_rdma_conn) { 656 + mpa->flags |= MPA_ENHANCED_RDMA_CONN; 657 + mpa->private_data_size += 658 + htons(sizeof(struct mpa_v2_conn_params)); 659 + mpa_v2_params.ird = htons((u16)ep->ird); 660 + mpa_v2_params.ord = htons((u16)ep->ord); 661 + if (peer2peer && (ep->mpa_attr.p2p_type != 662 + FW_RI_INIT_P2PTYPE_DISABLED)) { 663 + mpa_v2_params.ird |= htons(MPA_V2_PEER2PEER_MODEL); 664 + 665 + if (p2p_type == FW_RI_INIT_P2PTYPE_RDMA_WRITE) 666 + mpa_v2_params.ord |= 667 + htons(MPA_V2_RDMA_WRITE_RTR); 668 + else if (p2p_type == FW_RI_INIT_P2PTYPE_READ_REQ) 669 + mpa_v2_params.ord |= 670 + htons(MPA_V2_RDMA_READ_RTR); 671 + } 672 + 673 + memcpy(mpa->private_data, &mpa_v2_params, 674 + sizeof(struct mpa_v2_conn_params)); 675 + 676 + if (ep->plen) 677 + memcpy(mpa->private_data + 678 + sizeof(struct mpa_v2_conn_params), pdata, plen); 679 + } else 680 + if (plen) 681 + memcpy(mpa->private_data, pdata, plen); 715 682 716 683 /* 717 684 * Reference the mpa skb. This ensures the data area ··· 780 695 781 696 /* start MPA negotiation */ 782 697 send_flowc(ep, NULL); 783 - send_mpa_req(ep, skb); 698 + if (ep->retry_with_mpa_v1) 699 + send_mpa_req(ep, skb, 1); 700 + else 701 + send_mpa_req(ep, skb, mpa_rev); 784 702 785 703 return 0; 786 704 } ··· 857 769 event.remote_addr = ep->com.remote_addr; 858 770 859 771 if ((status == 0) || (status == -ECONNREFUSED)) { 860 - event.private_data_len = ep->plen; 861 - event.private_data = ep->mpa_pkt + sizeof(struct mpa_message); 772 + if (!ep->tried_with_mpa_v1) { 773 + /* this means MPA_v2 is used */ 774 + event.private_data_len = ep->plen - 775 + sizeof(struct mpa_v2_conn_params); 776 + event.private_data = ep->mpa_pkt + 777 + sizeof(struct mpa_message) + 778 + sizeof(struct mpa_v2_conn_params); 779 + } else { 780 + /* this means MPA_v1 is used */ 781 + event.private_data_len = ep->plen; 782 + event.private_data = ep->mpa_pkt + 783 + sizeof(struct mpa_message); 784 + } 862 785 } 863 786 864 787 PDBG("%s ep %p tid %u status %d\n", __func__, ep, ··· 892 793 event.event = IW_CM_EVENT_CONNECT_REQUEST; 893 794 event.local_addr = ep->com.local_addr; 894 795 event.remote_addr = ep->com.remote_addr; 895 - event.private_data_len = ep->plen; 896 - event.private_data = ep->mpa_pkt + sizeof(struct mpa_message); 897 796 event.provider_data = ep; 797 + if (!ep->tried_with_mpa_v1) { 798 + /* this means MPA_v2 is used */ 799 + event.ord = ep->ord; 800 + event.ird = ep->ird; 801 + event.private_data_len = ep->plen - 802 + sizeof(struct mpa_v2_conn_params); 803 + event.private_data = ep->mpa_pkt + sizeof(struct mpa_message) + 804 + sizeof(struct mpa_v2_conn_params); 805 + } else { 806 + /* this means MPA_v1 is used. Send max supported */ 807 + event.ord = c4iw_max_read_depth; 808 + event.ird = c4iw_max_read_depth; 809 + event.private_data_len = ep->plen; 810 + event.private_data = ep->mpa_pkt + sizeof(struct mpa_message); 811 + } 898 812 if (state_read(&ep->parent_ep->com) != DEAD) { 899 813 c4iw_get_ep(&ep->com); 900 814 ep->parent_ep->com.cm_id->event_handler( ··· 925 813 PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); 926 814 memset(&event, 0, sizeof(event)); 927 815 event.event = IW_CM_EVENT_ESTABLISHED; 816 + event.ird = ep->ird; 817 + event.ord = ep->ord; 928 818 if (ep->com.cm_id) { 929 819 PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); 930 820 ep->com.cm_id->event_handler(ep->com.cm_id, &event); ··· 962 848 static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb) 963 849 { 964 850 struct mpa_message *mpa; 851 + struct mpa_v2_conn_params *mpa_v2_params; 965 852 u16 plen; 853 + u16 resp_ird, resp_ord; 854 + u8 rtr_mismatch = 0, insuff_ird = 0; 966 855 struct c4iw_qp_attributes attrs; 967 856 enum c4iw_qp_attr_mask mask; 968 857 int err; ··· 1005 888 mpa = (struct mpa_message *) ep->mpa_pkt; 1006 889 1007 890 /* Validate MPA header. */ 1008 - if (mpa->revision != mpa_rev) { 891 + if (mpa->revision > mpa_rev) { 892 + printk(KERN_ERR MOD "%s MPA version mismatch. Local = %d," 893 + " Received = %d\n", __func__, mpa_rev, mpa->revision); 1009 894 err = -EPROTO; 1010 895 goto err; 1011 896 } ··· 1057 938 ep->mpa_attr.crc_enabled = (mpa->flags & MPA_CRC) | crc_enabled ? 1 : 0; 1058 939 ep->mpa_attr.recv_marker_enabled = markers_enabled; 1059 940 ep->mpa_attr.xmit_marker_enabled = mpa->flags & MPA_MARKERS ? 1 : 0; 1060 - ep->mpa_attr.version = mpa_rev; 1061 - ep->mpa_attr.p2p_type = peer2peer ? p2p_type : 1062 - FW_RI_INIT_P2PTYPE_DISABLED; 941 + ep->mpa_attr.version = mpa->revision; 942 + ep->mpa_attr.p2p_type = FW_RI_INIT_P2PTYPE_DISABLED; 943 + 944 + if (mpa->revision == 2) { 945 + ep->mpa_attr.enhanced_rdma_conn = 946 + mpa->flags & MPA_ENHANCED_RDMA_CONN ? 1 : 0; 947 + if (ep->mpa_attr.enhanced_rdma_conn) { 948 + mpa_v2_params = (struct mpa_v2_conn_params *) 949 + (ep->mpa_pkt + sizeof(*mpa)); 950 + resp_ird = ntohs(mpa_v2_params->ird) & 951 + MPA_V2_IRD_ORD_MASK; 952 + resp_ord = ntohs(mpa_v2_params->ord) & 953 + MPA_V2_IRD_ORD_MASK; 954 + 955 + /* 956 + * This is a double-check. Ideally, below checks are 957 + * not required since ird/ord stuff has been taken 958 + * care of in c4iw_accept_cr 959 + */ 960 + if ((ep->ird < resp_ord) || (ep->ord > resp_ird)) { 961 + err = -ENOMEM; 962 + ep->ird = resp_ord; 963 + ep->ord = resp_ird; 964 + insuff_ird = 1; 965 + } 966 + 967 + if (ntohs(mpa_v2_params->ird) & 968 + MPA_V2_PEER2PEER_MODEL) { 969 + if (ntohs(mpa_v2_params->ord) & 970 + MPA_V2_RDMA_WRITE_RTR) 971 + ep->mpa_attr.p2p_type = 972 + FW_RI_INIT_P2PTYPE_RDMA_WRITE; 973 + else if (ntohs(mpa_v2_params->ord) & 974 + MPA_V2_RDMA_READ_RTR) 975 + ep->mpa_attr.p2p_type = 976 + FW_RI_INIT_P2PTYPE_READ_REQ; 977 + } 978 + } 979 + } else if (mpa->revision == 1) 980 + if (peer2peer) 981 + ep->mpa_attr.p2p_type = p2p_type; 982 + 1063 983 PDBG("%s - crc_enabled=%d, recv_marker_enabled=%d, " 1064 - "xmit_marker_enabled=%d, version=%d\n", __func__, 1065 - ep->mpa_attr.crc_enabled, ep->mpa_attr.recv_marker_enabled, 1066 - ep->mpa_attr.xmit_marker_enabled, ep->mpa_attr.version); 984 + "xmit_marker_enabled=%d, version=%d p2p_type=%d local-p2p_type = " 985 + "%d\n", __func__, ep->mpa_attr.crc_enabled, 986 + ep->mpa_attr.recv_marker_enabled, 987 + ep->mpa_attr.xmit_marker_enabled, ep->mpa_attr.version, 988 + ep->mpa_attr.p2p_type, p2p_type); 989 + 990 + /* 991 + * If responder's RTR does not match with that of initiator, assign 992 + * FW_RI_INIT_P2PTYPE_DISABLED in mpa attributes so that RTR is not 993 + * generated when moving QP to RTS state. 994 + * A TERM message will be sent after QP has moved to RTS state 995 + */ 996 + if ((ep->mpa_attr.version == 2) && 997 + (ep->mpa_attr.p2p_type != p2p_type)) { 998 + ep->mpa_attr.p2p_type = FW_RI_INIT_P2PTYPE_DISABLED; 999 + rtr_mismatch = 1; 1000 + } 1067 1001 1068 1002 attrs.mpa_attr = ep->mpa_attr; 1069 1003 attrs.max_ird = ep->ird; ··· 1133 961 ep->com.qp, mask, &attrs, 1); 1134 962 if (err) 1135 963 goto err; 964 + 965 + /* 966 + * If responder's RTR requirement did not match with what initiator 967 + * supports, generate TERM message 968 + */ 969 + if (rtr_mismatch) { 970 + printk(KERN_ERR "%s: RTR mismatch, sending TERM\n", __func__); 971 + attrs.layer_etype = LAYER_MPA | DDP_LLP; 972 + attrs.ecode = MPA_NOMATCH_RTR; 973 + attrs.next_state = C4IW_QP_STATE_TERMINATE; 974 + err = c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, 975 + C4IW_QP_ATTR_NEXT_STATE, &attrs, 0); 976 + err = -ENOMEM; 977 + goto out; 978 + } 979 + 980 + /* 981 + * Generate TERM if initiator IRD is not sufficient for responder 982 + * provided ORD. Currently, we do the same behaviour even when 983 + * responder provided IRD is also not sufficient as regards to 984 + * initiator ORD. 985 + */ 986 + if (insuff_ird) { 987 + printk(KERN_ERR "%s: Insufficient IRD, sending TERM\n", 988 + __func__); 989 + attrs.layer_etype = LAYER_MPA | DDP_LLP; 990 + attrs.ecode = MPA_INSUFF_IRD; 991 + attrs.next_state = C4IW_QP_STATE_TERMINATE; 992 + err = c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, 993 + C4IW_QP_ATTR_NEXT_STATE, &attrs, 0); 994 + err = -ENOMEM; 995 + goto out; 996 + } 1136 997 goto out; 1137 998 err: 1138 999 state_set(&ep->com, ABORTING); ··· 1178 973 static void process_mpa_request(struct c4iw_ep *ep, struct sk_buff *skb) 1179 974 { 1180 975 struct mpa_message *mpa; 976 + struct mpa_v2_conn_params *mpa_v2_params; 1181 977 u16 plen; 1182 978 1183 979 PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); ··· 1219 1013 /* 1220 1014 * Validate MPA Header. 1221 1015 */ 1222 - if (mpa->revision != mpa_rev) { 1016 + if (mpa->revision > mpa_rev) { 1017 + printk(KERN_ERR MOD "%s MPA version mismatch. Local = %d," 1018 + " Received = %d\n", __func__, mpa_rev, mpa->revision); 1223 1019 abort_connection(ep, skb, GFP_KERNEL); 1224 1020 return; 1225 1021 } ··· 1264 1056 ep->mpa_attr.crc_enabled = (mpa->flags & MPA_CRC) | crc_enabled ? 1 : 0; 1265 1057 ep->mpa_attr.recv_marker_enabled = markers_enabled; 1266 1058 ep->mpa_attr.xmit_marker_enabled = mpa->flags & MPA_MARKERS ? 1 : 0; 1267 - ep->mpa_attr.version = mpa_rev; 1268 - ep->mpa_attr.p2p_type = peer2peer ? p2p_type : 1269 - FW_RI_INIT_P2PTYPE_DISABLED; 1059 + ep->mpa_attr.version = mpa->revision; 1060 + if (mpa->revision == 1) 1061 + ep->tried_with_mpa_v1 = 1; 1062 + ep->mpa_attr.p2p_type = FW_RI_INIT_P2PTYPE_DISABLED; 1063 + 1064 + if (mpa->revision == 2) { 1065 + ep->mpa_attr.enhanced_rdma_conn = 1066 + mpa->flags & MPA_ENHANCED_RDMA_CONN ? 1 : 0; 1067 + if (ep->mpa_attr.enhanced_rdma_conn) { 1068 + mpa_v2_params = (struct mpa_v2_conn_params *) 1069 + (ep->mpa_pkt + sizeof(*mpa)); 1070 + ep->ird = ntohs(mpa_v2_params->ird) & 1071 + MPA_V2_IRD_ORD_MASK; 1072 + ep->ord = ntohs(mpa_v2_params->ord) & 1073 + MPA_V2_IRD_ORD_MASK; 1074 + if (ntohs(mpa_v2_params->ird) & MPA_V2_PEER2PEER_MODEL) 1075 + if (peer2peer) { 1076 + if (ntohs(mpa_v2_params->ord) & 1077 + MPA_V2_RDMA_WRITE_RTR) 1078 + ep->mpa_attr.p2p_type = 1079 + FW_RI_INIT_P2PTYPE_RDMA_WRITE; 1080 + else if (ntohs(mpa_v2_params->ord) & 1081 + MPA_V2_RDMA_READ_RTR) 1082 + ep->mpa_attr.p2p_type = 1083 + FW_RI_INIT_P2PTYPE_READ_REQ; 1084 + } 1085 + } 1086 + } else if (mpa->revision == 1) 1087 + if (peer2peer) 1088 + ep->mpa_attr.p2p_type = p2p_type; 1089 + 1270 1090 PDBG("%s - crc_enabled=%d, recv_marker_enabled=%d, " 1271 1091 "xmit_marker_enabled=%d, version=%d p2p_type=%d\n", __func__, 1272 1092 ep->mpa_attr.crc_enabled, ep->mpa_attr.recv_marker_enabled, ··· 1786 1550 status == CPL_ERR_PERSIST_NEG_ADVICE; 1787 1551 } 1788 1552 1553 + static int c4iw_reconnect(struct c4iw_ep *ep) 1554 + { 1555 + int err = 0; 1556 + struct rtable *rt; 1557 + struct net_device *pdev; 1558 + struct neighbour *neigh; 1559 + int step; 1560 + 1561 + PDBG("%s qp %p cm_id %p\n", __func__, ep->com.qp, ep->com.cm_id); 1562 + init_timer(&ep->timer); 1563 + 1564 + /* 1565 + * Allocate an active TID to initiate a TCP connection. 1566 + */ 1567 + ep->atid = cxgb4_alloc_atid(ep->com.dev->rdev.lldi.tids, ep); 1568 + if (ep->atid == -1) { 1569 + printk(KERN_ERR MOD "%s - cannot alloc atid.\n", __func__); 1570 + err = -ENOMEM; 1571 + goto fail2; 1572 + } 1573 + 1574 + /* find a route */ 1575 + rt = find_route(ep->com.dev, 1576 + ep->com.cm_id->local_addr.sin_addr.s_addr, 1577 + ep->com.cm_id->remote_addr.sin_addr.s_addr, 1578 + ep->com.cm_id->local_addr.sin_port, 1579 + ep->com.cm_id->remote_addr.sin_port, 0); 1580 + if (!rt) { 1581 + printk(KERN_ERR MOD "%s - cannot find route.\n", __func__); 1582 + err = -EHOSTUNREACH; 1583 + goto fail3; 1584 + } 1585 + ep->dst = &rt->dst; 1586 + 1587 + neigh = dst_get_neighbour(ep->dst); 1588 + 1589 + /* get a l2t entry */ 1590 + if (neigh->dev->flags & IFF_LOOPBACK) { 1591 + PDBG("%s LOOPBACK\n", __func__); 1592 + pdev = ip_dev_find(&init_net, 1593 + ep->com.cm_id->remote_addr.sin_addr.s_addr); 1594 + ep->l2t = cxgb4_l2t_get(ep->com.dev->rdev.lldi.l2t, 1595 + neigh, pdev, 0); 1596 + ep->mtu = pdev->mtu; 1597 + ep->tx_chan = cxgb4_port_chan(pdev); 1598 + ep->smac_idx = (cxgb4_port_viid(pdev) & 0x7F) << 1; 1599 + step = ep->com.dev->rdev.lldi.ntxq / 1600 + ep->com.dev->rdev.lldi.nchan; 1601 + ep->txq_idx = cxgb4_port_idx(pdev) * step; 1602 + step = ep->com.dev->rdev.lldi.nrxq / 1603 + ep->com.dev->rdev.lldi.nchan; 1604 + ep->ctrlq_idx = cxgb4_port_idx(pdev); 1605 + ep->rss_qid = ep->com.dev->rdev.lldi.rxq_ids[ 1606 + cxgb4_port_idx(pdev) * step]; 1607 + dev_put(pdev); 1608 + } else { 1609 + ep->l2t = cxgb4_l2t_get(ep->com.dev->rdev.lldi.l2t, 1610 + neigh, neigh->dev, 0); 1611 + ep->mtu = dst_mtu(ep->dst); 1612 + ep->tx_chan = cxgb4_port_chan(neigh->dev); 1613 + ep->smac_idx = (cxgb4_port_viid(neigh->dev) & 0x7F) << 1; 1614 + step = ep->com.dev->rdev.lldi.ntxq / 1615 + ep->com.dev->rdev.lldi.nchan; 1616 + ep->txq_idx = cxgb4_port_idx(neigh->dev) * step; 1617 + ep->ctrlq_idx = cxgb4_port_idx(neigh->dev); 1618 + step = ep->com.dev->rdev.lldi.nrxq / 1619 + ep->com.dev->rdev.lldi.nchan; 1620 + ep->rss_qid = ep->com.dev->rdev.lldi.rxq_ids[ 1621 + cxgb4_port_idx(neigh->dev) * step]; 1622 + } 1623 + if (!ep->l2t) { 1624 + printk(KERN_ERR MOD "%s - cannot alloc l2e.\n", __func__); 1625 + err = -ENOMEM; 1626 + goto fail4; 1627 + } 1628 + 1629 + PDBG("%s txq_idx %u tx_chan %u smac_idx %u rss_qid %u l2t_idx %u\n", 1630 + __func__, ep->txq_idx, ep->tx_chan, ep->smac_idx, ep->rss_qid, 1631 + ep->l2t->idx); 1632 + 1633 + state_set(&ep->com, CONNECTING); 1634 + ep->tos = 0; 1635 + 1636 + /* send connect request to rnic */ 1637 + err = send_connect(ep); 1638 + if (!err) 1639 + goto out; 1640 + 1641 + cxgb4_l2t_release(ep->l2t); 1642 + fail4: 1643 + dst_release(ep->dst); 1644 + fail3: 1645 + cxgb4_free_atid(ep->com.dev->rdev.lldi.tids, ep->atid); 1646 + fail2: 1647 + /* 1648 + * remember to send notification to upper layer. 1649 + * We are in here so the upper layer is not aware that this is 1650 + * re-connect attempt and so, upper layer is still waiting for 1651 + * response of 1st connect request. 1652 + */ 1653 + connect_reply_upcall(ep, -ECONNRESET); 1654 + c4iw_put_ep(&ep->com); 1655 + out: 1656 + return err; 1657 + } 1658 + 1789 1659 static int peer_abort(struct c4iw_dev *dev, struct sk_buff *skb) 1790 1660 { 1791 1661 struct cpl_abort_req_rss *req = cplhdr(skb); ··· 1915 1573 1916 1574 /* 1917 1575 * Wake up any threads in rdma_init() or rdma_fini(). 1576 + * However, this is not needed if com state is just 1577 + * MPA_REQ_SENT 1918 1578 */ 1919 - c4iw_wake_up(&ep->com.wr_wait, -ECONNRESET); 1579 + if (ep->com.state != MPA_REQ_SENT) 1580 + c4iw_wake_up(&ep->com.wr_wait, -ECONNRESET); 1920 1581 1921 1582 mutex_lock(&ep->com.mutex); 1922 1583 switch (ep->com.state) { ··· 1930 1585 break; 1931 1586 case MPA_REQ_SENT: 1932 1587 stop_ep_timer(ep); 1933 - connect_reply_upcall(ep, -ECONNRESET); 1588 + if (mpa_rev == 2 && ep->tried_with_mpa_v1) 1589 + connect_reply_upcall(ep, -ECONNRESET); 1590 + else { 1591 + /* 1592 + * we just don't send notification upwards because we 1593 + * want to retry with mpa_v1 without upper layers even 1594 + * knowing it. 1595 + * 1596 + * do some housekeeping so as to re-initiate the 1597 + * connection 1598 + */ 1599 + PDBG("%s: mpa_rev=%d. Retrying with mpav1\n", __func__, 1600 + mpa_rev); 1601 + ep->retry_with_mpa_v1 = 1; 1602 + } 1934 1603 break; 1935 1604 case MPA_REP_SENT: 1936 1605 break; ··· 1980 1621 dst_confirm(ep->dst); 1981 1622 if (ep->com.state != ABORTING) { 1982 1623 __state_set(&ep->com, DEAD); 1983 - release = 1; 1624 + /* we don't release if we want to retry with mpa_v1 */ 1625 + if (!ep->retry_with_mpa_v1) 1626 + release = 1; 1984 1627 } 1985 1628 mutex_unlock(&ep->com.mutex); 1986 1629 ··· 2002 1641 out: 2003 1642 if (release) 2004 1643 release_ep_resources(ep); 1644 + 1645 + /* retry with mpa-v1 */ 1646 + if (ep && ep->retry_with_mpa_v1) { 1647 + cxgb4_remove_tid(ep->com.dev->rdev.lldi.tids, 0, ep->hwtid); 1648 + dst_release(ep->dst); 1649 + cxgb4_l2t_release(ep->l2t); 1650 + c4iw_reconnect(ep); 1651 + } 1652 + 2005 1653 return 0; 2006 1654 } 2007 1655 ··· 2162 1792 goto err; 2163 1793 } 2164 1794 2165 - cm_id->add_ref(cm_id); 2166 - ep->com.cm_id = cm_id; 2167 - ep->com.qp = qp; 1795 + if (ep->mpa_attr.version == 2 && ep->mpa_attr.enhanced_rdma_conn) { 1796 + if (conn_param->ord > ep->ird) { 1797 + ep->ird = conn_param->ird; 1798 + ep->ord = conn_param->ord; 1799 + send_mpa_reject(ep, conn_param->private_data, 1800 + conn_param->private_data_len); 1801 + abort_connection(ep, NULL, GFP_KERNEL); 1802 + err = -ENOMEM; 1803 + goto err; 1804 + } 1805 + if (conn_param->ird > ep->ord) { 1806 + if (!ep->ord) 1807 + conn_param->ird = 1; 1808 + else { 1809 + abort_connection(ep, NULL, GFP_KERNEL); 1810 + err = -ENOMEM; 1811 + goto err; 1812 + } 1813 + } 2168 1814 1815 + } 2169 1816 ep->ird = conn_param->ird; 2170 1817 ep->ord = conn_param->ord; 2171 1818 2172 - if (peer2peer && ep->ird == 0) 2173 - ep->ird = 1; 1819 + if (ep->mpa_attr.version != 2) 1820 + if (peer2peer && ep->ird == 0) 1821 + ep->ird = 1; 2174 1822 2175 1823 PDBG("%s %d ird %d ord %d\n", __func__, __LINE__, ep->ird, ep->ord); 1824 + 1825 + cm_id->add_ref(cm_id); 1826 + ep->com.cm_id = cm_id; 1827 + ep->com.qp = qp; 2176 1828 2177 1829 /* bind QP to EP and move to RTS */ 2178 1830 attrs.mpa_attr = ep->mpa_attr; ··· 2336 1944 ep->com.dev->rdev.lldi.nchan; 2337 1945 ep->rss_qid = ep->com.dev->rdev.lldi.rxq_ids[ 2338 1946 cxgb4_port_idx(neigh->dev) * step]; 1947 + ep->retry_with_mpa_v1 = 0; 1948 + ep->tried_with_mpa_v1 = 0; 2339 1949 } 2340 1950 if (!ep->l2t) { 2341 1951 printk(KERN_ERR MOD "%s - cannot alloc l2e.\n", __func__); ··· 2717 2323 2718 2324 /* 2719 2325 * Wake up any threads in rdma_init() or rdma_fini(). 2326 + * However, this is not needed if com state is just 2327 + * MPA_REQ_SENT 2720 2328 */ 2721 - c4iw_wake_up(&ep->com.wr_wait, -ECONNRESET); 2329 + if (ep->com.state != MPA_REQ_SENT) 2330 + c4iw_wake_up(&ep->com.wr_wait, -ECONNRESET); 2722 2331 sched(dev, skb); 2723 2332 return 0; 2724 2333 }
+2 -1
drivers/infiniband/hw/cxgb4/cq.c
··· 185 185 V_CQE_OPCODE(FW_RI_SEND) | 186 186 V_CQE_TYPE(0) | 187 187 V_CQE_SWCQE(1) | 188 - V_CQE_QPID(wq->rq.qid)); 188 + V_CQE_QPID(wq->sq.qid)); 189 189 cqe.bits_type_ts = cpu_to_be64(V_CQE_GENBIT((u64)cq->gen)); 190 190 cq->sw_queue[cq->sw_pidx] = cqe; 191 191 t4_swcq_produce(cq); ··· 818 818 chp->cq.size--; /* status page */ 819 819 chp->ibcq.cqe = entries - 2; 820 820 spin_lock_init(&chp->lock); 821 + spin_lock_init(&chp->comp_handler_lock); 821 822 atomic_set(&chp->refcnt, 1); 822 823 init_waitqueue_head(&chp->wait); 823 824 ret = insert_handle(rhp, &rhp->cqidr, chp, chp->cq.cqid);
+33 -8
drivers/infiniband/hw/cxgb4/device.c
··· 376 376 struct c4iw_dev *dev; 377 377 }; 378 378 379 - static void c4iw_remove(struct uld_ctx *ctx) 379 + static void c4iw_dealloc(struct uld_ctx *ctx) 380 380 { 381 - PDBG("%s c4iw_dev %p\n", __func__, ctx->dev); 382 - c4iw_unregister_device(ctx->dev); 383 381 c4iw_rdev_close(&ctx->dev->rdev); 384 382 idr_destroy(&ctx->dev->cqidr); 385 383 idr_destroy(&ctx->dev->qpidr); ··· 387 389 ctx->dev = NULL; 388 390 } 389 391 392 + static void c4iw_remove(struct uld_ctx *ctx) 393 + { 394 + PDBG("%s c4iw_dev %p\n", __func__, ctx->dev); 395 + c4iw_unregister_device(ctx->dev); 396 + c4iw_dealloc(ctx); 397 + } 398 + 399 + static int rdma_supported(const struct cxgb4_lld_info *infop) 400 + { 401 + return infop->vr->stag.size > 0 && infop->vr->pbl.size > 0 && 402 + infop->vr->rq.size > 0 && infop->vr->qp.size > 0 && 403 + infop->vr->cq.size > 0 && infop->vr->ocq.size > 0; 404 + } 405 + 390 406 static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop) 391 407 { 392 408 struct c4iw_dev *devp; 393 409 int ret; 394 410 411 + if (!rdma_supported(infop)) { 412 + printk(KERN_INFO MOD "%s: RDMA not supported on this device.\n", 413 + pci_name(infop->pdev)); 414 + return ERR_PTR(-ENOSYS); 415 + } 395 416 devp = (struct c4iw_dev *)ib_alloc_device(sizeof(*devp)); 396 417 if (!devp) { 397 418 printk(KERN_ERR MOD "Cannot allocate ib device\n"); ··· 431 414 432 415 ret = c4iw_rdev_open(&devp->rdev); 433 416 if (ret) { 434 - mutex_unlock(&dev_mutex); 435 417 printk(KERN_ERR MOD "Unable to open CXIO rdev err %d\n", ret); 436 418 ib_dealloc_device(&devp->ibdev); 437 419 return ERR_PTR(ret); ··· 535 519 case CXGB4_STATE_UP: 536 520 printk(KERN_INFO MOD "%s: Up\n", pci_name(ctx->lldi.pdev)); 537 521 if (!ctx->dev) { 538 - int ret = 0; 522 + int ret; 539 523 540 524 ctx->dev = c4iw_alloc(&ctx->lldi); 541 - if (!IS_ERR(ctx->dev)) 542 - ret = c4iw_register_device(ctx->dev); 543 - if (IS_ERR(ctx->dev) || ret) 525 + if (IS_ERR(ctx->dev)) { 526 + printk(KERN_ERR MOD 527 + "%s: initialization failed: %ld\n", 528 + pci_name(ctx->lldi.pdev), 529 + PTR_ERR(ctx->dev)); 530 + ctx->dev = NULL; 531 + break; 532 + } 533 + ret = c4iw_register_device(ctx->dev); 534 + if (ret) { 544 535 printk(KERN_ERR MOD 545 536 "%s: RDMA registration failed: %d\n", 546 537 pci_name(ctx->lldi.pdev), ret); 538 + c4iw_dealloc(ctx); 539 + } 547 540 } 548 541 break; 549 542 case CXGB4_STATE_DOWN:
+8 -2
drivers/infiniband/hw/cxgb4/ev.c
··· 42 42 { 43 43 struct ib_event event; 44 44 struct c4iw_qp_attributes attrs; 45 + unsigned long flag; 45 46 46 47 if ((qhp->attr.state == C4IW_QP_STATE_ERROR) || 47 48 (qhp->attr.state == C4IW_QP_STATE_TERMINATE)) { ··· 73 72 if (qhp->ibqp.event_handler) 74 73 (*qhp->ibqp.event_handler)(&event, qhp->ibqp.qp_context); 75 74 75 + spin_lock_irqsave(&chp->comp_handler_lock, flag); 76 76 (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context); 77 + spin_unlock_irqrestore(&chp->comp_handler_lock, flag); 77 78 } 78 79 79 80 void c4iw_ev_dispatch(struct c4iw_dev *dev, struct t4_cqe *err_cqe) ··· 186 183 int c4iw_ev_handler(struct c4iw_dev *dev, u32 qid) 187 184 { 188 185 struct c4iw_cq *chp; 186 + unsigned long flag; 189 187 190 188 chp = get_chp(dev, qid); 191 - if (chp) 189 + if (chp) { 190 + spin_lock_irqsave(&chp->comp_handler_lock, flag); 192 191 (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context); 193 - else 192 + spin_unlock_irqrestore(&chp->comp_handler_lock, flag); 193 + } else 194 194 PDBG("%s unknown cqid 0x%x\n", __func__, qid); 195 195 return 0; 196 196 }
+22 -1
drivers/infiniband/hw/cxgb4/iw_cxgb4.h
··· 309 309 struct c4iw_dev *rhp; 310 310 struct t4_cq cq; 311 311 spinlock_t lock; 312 + spinlock_t comp_handler_lock; 312 313 atomic_t refcnt; 313 314 wait_queue_head_t wait; 314 315 }; ··· 324 323 u8 recv_marker_enabled; 325 324 u8 xmit_marker_enabled; 326 325 u8 crc_enabled; 326 + u8 enhanced_rdma_conn; 327 327 u8 version; 328 328 u8 p2p_type; 329 329 }; ··· 351 349 u8 is_terminate_local; 352 350 struct c4iw_mpa_attributes mpa_attr; 353 351 struct c4iw_ep *llp_stream_handle; 352 + u8 layer_etype; 353 + u8 ecode; 354 354 }; 355 355 356 356 struct c4iw_qp { ··· 505 501 #define MPA_KEY_REP "MPA ID Rep Frame" 506 502 507 503 #define MPA_MAX_PRIVATE_DATA 256 504 + #define MPA_ENHANCED_RDMA_CONN 0x10 508 505 #define MPA_REJECT 0x20 509 506 #define MPA_CRC 0x40 510 507 #define MPA_MARKERS 0x80 511 508 #define MPA_FLAGS_MASK 0xE0 509 + 510 + #define MPA_V2_PEER2PEER_MODEL 0x8000 511 + #define MPA_V2_ZERO_LEN_FPDU_RTR 0x4000 512 + #define MPA_V2_RDMA_WRITE_RTR 0x8000 513 + #define MPA_V2_RDMA_READ_RTR 0x4000 514 + #define MPA_V2_IRD_ORD_MASK 0x3FFF 512 515 513 516 #define c4iw_put_ep(ep) { \ 514 517 PDBG("put_ep (via %s:%u) ep %p refcnt %d\n", __func__, __LINE__, \ ··· 537 526 u8 revision; 538 527 __be16 private_data_size; 539 528 u8 private_data[0]; 529 + }; 530 + 531 + struct mpa_v2_conn_params { 532 + __be16 ird; 533 + __be16 ord; 540 534 }; 541 535 542 536 struct terminate_message { ··· 596 580 597 581 enum c4iw_mpa_ecodes { 598 582 MPA_CRC_ERR = 0x02, 599 - MPA_MARKER_ERR = 0x03 583 + MPA_MARKER_ERR = 0x03, 584 + MPA_LOCAL_CATA = 0x05, 585 + MPA_INSUFF_IRD = 0x06, 586 + MPA_NOMATCH_RTR = 0x07, 600 587 }; 601 588 602 589 enum c4iw_ep_state { ··· 670 651 u16 txq_idx; 671 652 u16 ctrlq_idx; 672 653 u8 tos; 654 + u8 retry_with_mpa_v1; 655 + u8 tried_with_mpa_v1; 673 656 }; 674 657 675 658 static inline struct c4iw_ep *to_ep(struct iw_cm_id *cm_id)
+34 -5
drivers/infiniband/hw/cxgb4/qp.c
··· 917 917 wqe->u.terminate.type = FW_RI_TYPE_TERMINATE; 918 918 wqe->u.terminate.immdlen = cpu_to_be32(sizeof *term); 919 919 term = (struct terminate_message *)wqe->u.terminate.termmsg; 920 - build_term_codes(err_cqe, &term->layer_etype, &term->ecode); 920 + if (qhp->attr.layer_etype == (LAYER_MPA|DDP_LLP)) { 921 + term->layer_etype = qhp->attr.layer_etype; 922 + term->ecode = qhp->attr.ecode; 923 + } else 924 + build_term_codes(err_cqe, &term->layer_etype, &term->ecode); 921 925 c4iw_ofld_send(&qhp->rhp->rdev, skb); 922 926 } 923 927 ··· 945 941 flushed = c4iw_flush_rq(&qhp->wq, &rchp->cq, count); 946 942 spin_unlock(&qhp->lock); 947 943 spin_unlock_irqrestore(&rchp->lock, flag); 948 - if (flushed) 944 + if (flushed) { 945 + spin_lock_irqsave(&rchp->comp_handler_lock, flag); 949 946 (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); 947 + spin_unlock_irqrestore(&rchp->comp_handler_lock, flag); 948 + } 950 949 951 950 /* locking hierarchy: cq lock first, then qp lock. */ 952 951 spin_lock_irqsave(&schp->lock, flag); ··· 959 952 flushed = c4iw_flush_sq(&qhp->wq, &schp->cq, count); 960 953 spin_unlock(&qhp->lock); 961 954 spin_unlock_irqrestore(&schp->lock, flag); 962 - if (flushed) 955 + if (flushed) { 956 + spin_lock_irqsave(&schp->comp_handler_lock, flag); 963 957 (*schp->ibcq.comp_handler)(&schp->ibcq, schp->ibcq.cq_context); 958 + spin_unlock_irqrestore(&schp->comp_handler_lock, flag); 959 + } 964 960 } 965 961 966 962 static void flush_qp(struct c4iw_qp *qhp) 967 963 { 968 964 struct c4iw_cq *rchp, *schp; 965 + unsigned long flag; 969 966 970 967 rchp = get_chp(qhp->rhp, qhp->attr.rcq); 971 968 schp = get_chp(qhp->rhp, qhp->attr.scq); ··· 977 966 if (qhp->ibqp.uobject) { 978 967 t4_set_wq_in_error(&qhp->wq); 979 968 t4_set_cq_in_error(&rchp->cq); 980 - if (schp != rchp) 969 + spin_lock_irqsave(&rchp->comp_handler_lock, flag); 970 + (*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context); 971 + spin_unlock_irqrestore(&rchp->comp_handler_lock, flag); 972 + if (schp != rchp) { 981 973 t4_set_cq_in_error(&schp->cq); 974 + spin_lock_irqsave(&schp->comp_handler_lock, flag); 975 + (*schp->ibcq.comp_handler)(&schp->ibcq, 976 + schp->ibcq.cq_context); 977 + spin_unlock_irqrestore(&schp->comp_handler_lock, flag); 978 + } 982 979 return; 983 980 } 984 981 __flush_qp(qhp, rchp, schp); ··· 1031 1012 1032 1013 static void build_rtr_msg(u8 p2p_type, struct fw_ri_init *init) 1033 1014 { 1015 + PDBG("%s p2p_type = %d\n", __func__, p2p_type); 1034 1016 memset(&init->u, 0, sizeof init->u); 1035 1017 switch (p2p_type) { 1036 1018 case FW_RI_INIT_P2PTYPE_RDMA_WRITE: ··· 1226 1206 disconnect = 1; 1227 1207 c4iw_get_ep(&qhp->ep->com); 1228 1208 } 1209 + if (qhp->ibqp.uobject) 1210 + t4_set_wq_in_error(&qhp->wq); 1229 1211 ret = rdma_fini(rhp, qhp, ep); 1230 1212 if (ret) 1231 1213 goto err; 1232 1214 break; 1233 1215 case C4IW_QP_STATE_TERMINATE: 1234 1216 set_state(qhp, C4IW_QP_STATE_TERMINATE); 1217 + qhp->attr.layer_etype = attrs->layer_etype; 1218 + qhp->attr.ecode = attrs->ecode; 1235 1219 if (qhp->ibqp.uobject) 1236 1220 t4_set_wq_in_error(&qhp->wq); 1237 1221 ep = qhp->ep; ··· 1246 1222 break; 1247 1223 case C4IW_QP_STATE_ERROR: 1248 1224 set_state(qhp, C4IW_QP_STATE_ERROR); 1225 + if (qhp->ibqp.uobject) 1226 + t4_set_wq_in_error(&qhp->wq); 1249 1227 if (!internal) { 1250 1228 abort = 1; 1251 1229 disconnect = 1; ··· 1360 1334 rhp = qhp->rhp; 1361 1335 1362 1336 attrs.next_state = C4IW_QP_STATE_ERROR; 1363 - c4iw_modify_qp(rhp, qhp, C4IW_QP_ATTR_NEXT_STATE, &attrs, 0); 1337 + if (qhp->attr.state == C4IW_QP_STATE_TERMINATE) 1338 + c4iw_modify_qp(rhp, qhp, C4IW_QP_ATTR_NEXT_STATE, &attrs, 1); 1339 + else 1340 + c4iw_modify_qp(rhp, qhp, C4IW_QP_ATTR_NEXT_STATE, &attrs, 0); 1364 1341 wait_event(qhp->wait, !qhp->ep); 1365 1342 1366 1343 remove_handle(rhp, &rhp->qpidr, qhp->wq.sq.qid);
+2 -2
drivers/infiniband/hw/ehca/ehca_eq.c
··· 125 125 tasklet_init(&eq->interrupt_task, ehca_tasklet_eq, (long)shca); 126 126 127 127 ret = ibmebus_request_irq(eq->ist, ehca_interrupt_eq, 128 - IRQF_DISABLED, "ehca_eq", 128 + 0, "ehca_eq", 129 129 (void *)shca); 130 130 if (ret < 0) 131 131 ehca_err(ib_dev, "Can't map interrupt handler."); ··· 133 133 tasklet_init(&eq->interrupt_task, ehca_tasklet_neq, (long)shca); 134 134 135 135 ret = ibmebus_request_irq(eq->ist, ehca_interrupt_neq, 136 - IRQF_DISABLED, "ehca_neq", 136 + 0, "ehca_neq", 137 137 (void *)shca); 138 138 if (ret < 0) 139 139 ehca_err(ib_dev, "Can't map interrupt handler.");
+3
drivers/infiniband/hw/ehca/ehca_qp.c
··· 977 977 struct hcp_modify_qp_control_block *mqpcb; 978 978 u64 hret, update_mask; 979 979 980 + if (srq_init_attr->srq_type != IB_SRQT_BASIC) 981 + return ERR_PTR(-ENOSYS); 982 + 980 983 /* For common attributes, internal_create_qp() takes its info 981 984 * out of qp_init_attr, so copy all common attrs there. 982 985 */
+1
drivers/infiniband/hw/ipath/ipath_init_chip.c
··· 34 34 #include <linux/pci.h> 35 35 #include <linux/netdevice.h> 36 36 #include <linux/slab.h> 37 + #include <linux/stat.h> 37 38 #include <linux/vmalloc.h> 38 39 39 40 #include "ipath_kernel.h"
+5
drivers/infiniband/hw/ipath/ipath_srq.c
··· 107 107 u32 sz; 108 108 struct ib_srq *ret; 109 109 110 + if (srq_init_attr->srq_type != IB_SRQT_BASIC) { 111 + ret = ERR_PTR(-ENOSYS); 112 + goto done; 113 + } 114 + 110 115 if (srq_init_attr->attr.max_wr == 0) { 111 116 ret = ERR_PTR(-EINVAL); 112 117 goto done;
+103 -3
drivers/infiniband/hw/mlx4/main.c
··· 128 128 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) && 129 129 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR)) 130 130 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 131 + if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) 132 + props->device_cap_flags |= IB_DEVICE_XRC; 131 133 132 134 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) & 133 135 0xffffff; ··· 183 181 184 182 static int ib_link_query_port(struct ib_device *ibdev, u8 port, 185 183 struct ib_port_attr *props, 184 + struct ib_smp *in_mad, 186 185 struct ib_smp *out_mad) 187 186 { 187 + int ext_active_speed; 188 + int err; 189 + 188 190 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); 189 191 props->lmc = out_mad->data[34] & 0x7; 190 192 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18)); ··· 208 202 props->subnet_timeout = out_mad->data[51] & 0x1f; 209 203 props->max_vl_num = out_mad->data[37] >> 4; 210 204 props->init_type_reply = out_mad->data[41] >> 4; 205 + 206 + /* Check if extended speeds (EDR/FDR/...) are supported */ 207 + if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { 208 + ext_active_speed = out_mad->data[62] >> 4; 209 + 210 + switch (ext_active_speed) { 211 + case 1: 212 + props->active_speed = 16; /* FDR */ 213 + break; 214 + case 2: 215 + props->active_speed = 32; /* EDR */ 216 + break; 217 + } 218 + } 219 + 220 + /* If reported active speed is QDR, check if is FDR-10 */ 221 + if (props->active_speed == 4) { 222 + if (to_mdev(ibdev)->dev->caps.ext_port_cap[port] & 223 + MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) { 224 + init_query_mad(in_mad); 225 + in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO; 226 + in_mad->attr_mod = cpu_to_be32(port); 227 + 228 + err = mlx4_MAD_IFC(to_mdev(ibdev), 1, 1, port, 229 + NULL, NULL, in_mad, out_mad); 230 + if (err) 231 + return err; 232 + 233 + /* Checking LinkSpeedActive for FDR-10 */ 234 + if (out_mad->data[15] & 0x1) 235 + props->active_speed = 8; 236 + } 237 + } 211 238 212 239 return 0; 213 240 } ··· 266 227 props->pkey_tbl_len = 1; 267 228 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46)); 268 229 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); 269 - props->max_mtu = IB_MTU_2048; 230 + props->max_mtu = IB_MTU_4096; 270 231 props->subnet_timeout = 0; 271 232 props->max_vl_num = out_mad->data[37] >> 4; 272 233 props->init_type_reply = 0; ··· 313 274 goto out; 314 275 315 276 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ? 316 - ib_link_query_port(ibdev, port, props, out_mad) : 277 + ib_link_query_port(ibdev, port, props, in_mad, out_mad) : 317 278 eth_link_query_port(ibdev, port, props, out_mad); 318 279 319 280 out: ··· 601 562 { 602 563 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn); 603 564 kfree(pd); 565 + 566 + return 0; 567 + } 568 + 569 + static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev, 570 + struct ib_ucontext *context, 571 + struct ib_udata *udata) 572 + { 573 + struct mlx4_ib_xrcd *xrcd; 574 + int err; 575 + 576 + if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)) 577 + return ERR_PTR(-ENOSYS); 578 + 579 + xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL); 580 + if (!xrcd) 581 + return ERR_PTR(-ENOMEM); 582 + 583 + err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn); 584 + if (err) 585 + goto err1; 586 + 587 + xrcd->pd = ib_alloc_pd(ibdev); 588 + if (IS_ERR(xrcd->pd)) { 589 + err = PTR_ERR(xrcd->pd); 590 + goto err2; 591 + } 592 + 593 + xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, 1, 0); 594 + if (IS_ERR(xrcd->cq)) { 595 + err = PTR_ERR(xrcd->cq); 596 + goto err3; 597 + } 598 + 599 + return &xrcd->ibxrcd; 600 + 601 + err3: 602 + ib_dealloc_pd(xrcd->pd); 603 + err2: 604 + mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn); 605 + err1: 606 + kfree(xrcd); 607 + return ERR_PTR(err); 608 + } 609 + 610 + static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd) 611 + { 612 + ib_destroy_cq(to_mxrcd(xrcd)->cq); 613 + ib_dealloc_pd(to_mxrcd(xrcd)->pd); 614 + mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn); 615 + kfree(xrcd); 604 616 605 617 return 0; 606 618 } ··· 1134 1044 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 1135 1045 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 1136 1046 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 1137 - (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ); 1047 + (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 1048 + (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 1049 + (1ull << IB_USER_VERBS_CMD_OPEN_QP); 1138 1050 1139 1051 ibdev->ib_dev.query_device = mlx4_ib_query_device; 1140 1052 ibdev->ib_dev.query_port = mlx4_ib_query_port; ··· 1184 1092 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr; 1185 1093 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr; 1186 1094 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc; 1095 + 1096 + if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) { 1097 + ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd; 1098 + ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd; 1099 + ibdev->ib_dev.uverbs_cmd_mask |= 1100 + (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | 1101 + (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); 1102 + } 1187 1103 1188 1104 spin_lock_init(&iboe->lock); 1189 1105
+13
drivers/infiniband/hw/mlx4/mlx4_ib.h
··· 56 56 u32 pdn; 57 57 }; 58 58 59 + struct mlx4_ib_xrcd { 60 + struct ib_xrcd ibxrcd; 61 + u32 xrcdn; 62 + struct ib_pd *pd; 63 + struct ib_cq *cq; 64 + }; 65 + 59 66 struct mlx4_ib_cq_buf { 60 67 struct mlx4_buf buf; 61 68 struct mlx4_mtt mtt; ··· 145 138 struct mlx4_mtt mtt; 146 139 int buf_size; 147 140 struct mutex mutex; 141 + u16 xrcdn; 148 142 u32 flags; 149 143 u8 port; 150 144 u8 alt_port; ··· 217 209 static inline struct mlx4_ib_pd *to_mpd(struct ib_pd *ibpd) 218 210 { 219 211 return container_of(ibpd, struct mlx4_ib_pd, ibpd); 212 + } 213 + 214 + static inline struct mlx4_ib_xrcd *to_mxrcd(struct ib_xrcd *ibxrcd) 215 + { 216 + return container_of(ibxrcd, struct mlx4_ib_xrcd, ibxrcd); 220 217 } 221 218 222 219 static inline struct mlx4_ib_cq *to_mcq(struct ib_cq *ibcq)
+89 -42
drivers/infiniband/hw/mlx4/qp.c
··· 302 302 } 303 303 304 304 static int set_rq_size(struct mlx4_ib_dev *dev, struct ib_qp_cap *cap, 305 - int is_user, int has_srq, struct mlx4_ib_qp *qp) 305 + int is_user, int has_rq, struct mlx4_ib_qp *qp) 306 306 { 307 307 /* Sanity check RQ size before proceeding */ 308 308 if (cap->max_recv_wr > dev->dev->caps.max_wqes || 309 309 cap->max_recv_sge > dev->dev->caps.max_rq_sg) 310 310 return -EINVAL; 311 311 312 - if (has_srq) { 313 - /* QPs attached to an SRQ should have no RQ */ 312 + if (!has_rq) { 314 313 if (cap->max_recv_wr) 315 314 return -EINVAL; 316 315 ··· 462 463 return 0; 463 464 } 464 465 466 + static int qp_has_rq(struct ib_qp_init_attr *attr) 467 + { 468 + if (attr->qp_type == IB_QPT_XRC_INI || attr->qp_type == IB_QPT_XRC_TGT) 469 + return 0; 470 + 471 + return !attr->srq; 472 + } 473 + 465 474 static int create_qp_common(struct mlx4_ib_dev *dev, struct ib_pd *pd, 466 475 struct ib_qp_init_attr *init_attr, 467 476 struct ib_udata *udata, int sqpn, struct mlx4_ib_qp *qp) ··· 486 479 if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) 487 480 qp->sq_signal_bits = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE); 488 481 489 - err = set_rq_size(dev, &init_attr->cap, !!pd->uobject, !!init_attr->srq, qp); 482 + err = set_rq_size(dev, &init_attr->cap, !!pd->uobject, qp_has_rq(init_attr), qp); 490 483 if (err) 491 484 goto err; 492 485 ··· 520 513 if (err) 521 514 goto err_mtt; 522 515 523 - if (!init_attr->srq) { 516 + if (qp_has_rq(init_attr)) { 524 517 err = mlx4_ib_db_map_user(to_mucontext(pd->uobject->context), 525 518 ucmd.db_addr, &qp->db); 526 519 if (err) ··· 539 532 if (err) 540 533 goto err; 541 534 542 - if (!init_attr->srq) { 535 + if (qp_has_rq(init_attr)) { 543 536 err = mlx4_db_alloc(dev->dev, &qp->db, 0); 544 537 if (err) 545 538 goto err; ··· 582 575 if (err) 583 576 goto err_qpn; 584 577 578 + if (init_attr->qp_type == IB_QPT_XRC_TGT) 579 + qp->mqp.qpn |= (1 << 23); 580 + 585 581 /* 586 582 * Hardware wants QPN written in big-endian order (after 587 583 * shifting) for send doorbell. Precompute this value to save ··· 602 592 603 593 err_wrid: 604 594 if (pd->uobject) { 605 - if (!init_attr->srq) 606 - mlx4_ib_db_unmap_user(to_mucontext(pd->uobject->context), 607 - &qp->db); 595 + if (qp_has_rq(init_attr)) 596 + mlx4_ib_db_unmap_user(to_mucontext(pd->uobject->context), &qp->db); 608 597 } else { 609 598 kfree(qp->sq.wrid); 610 599 kfree(qp->rq.wrid); ··· 619 610 mlx4_buf_free(dev->dev, qp->buf_size, &qp->buf); 620 611 621 612 err_db: 622 - if (!pd->uobject && !init_attr->srq) 613 + if (!pd->uobject && qp_has_rq(init_attr)) 623 614 mlx4_db_free(dev->dev, &qp->db); 624 615 625 616 err: ··· 680 671 } 681 672 } 682 673 674 + static struct mlx4_ib_pd *get_pd(struct mlx4_ib_qp *qp) 675 + { 676 + if (qp->ibqp.qp_type == IB_QPT_XRC_TGT) 677 + return to_mpd(to_mxrcd(qp->ibqp.xrcd)->pd); 678 + else 679 + return to_mpd(qp->ibqp.pd); 680 + } 681 + 682 + static void get_cqs(struct mlx4_ib_qp *qp, 683 + struct mlx4_ib_cq **send_cq, struct mlx4_ib_cq **recv_cq) 684 + { 685 + switch (qp->ibqp.qp_type) { 686 + case IB_QPT_XRC_TGT: 687 + *send_cq = to_mcq(to_mxrcd(qp->ibqp.xrcd)->cq); 688 + *recv_cq = *send_cq; 689 + break; 690 + case IB_QPT_XRC_INI: 691 + *send_cq = to_mcq(qp->ibqp.send_cq); 692 + *recv_cq = *send_cq; 693 + break; 694 + default: 695 + *send_cq = to_mcq(qp->ibqp.send_cq); 696 + *recv_cq = to_mcq(qp->ibqp.recv_cq); 697 + break; 698 + } 699 + } 700 + 683 701 static void destroy_qp_common(struct mlx4_ib_dev *dev, struct mlx4_ib_qp *qp, 684 702 int is_user) 685 703 { ··· 718 682 printk(KERN_WARNING "mlx4_ib: modify QP %06x to RESET failed.\n", 719 683 qp->mqp.qpn); 720 684 721 - send_cq = to_mcq(qp->ibqp.send_cq); 722 - recv_cq = to_mcq(qp->ibqp.recv_cq); 685 + get_cqs(qp, &send_cq, &recv_cq); 723 686 724 687 mlx4_ib_lock_cqs(send_cq, recv_cq); 725 688 ··· 741 706 mlx4_mtt_cleanup(dev->dev, &qp->mtt); 742 707 743 708 if (is_user) { 744 - if (!qp->ibqp.srq) 709 + if (qp->rq.wqe_cnt) 745 710 mlx4_ib_db_unmap_user(to_mucontext(qp->ibqp.uobject->context), 746 711 &qp->db); 747 712 ib_umem_release(qp->umem); ··· 749 714 kfree(qp->sq.wrid); 750 715 kfree(qp->rq.wrid); 751 716 mlx4_buf_free(dev->dev, qp->buf_size, &qp->buf); 752 - if (!qp->ibqp.srq) 717 + if (qp->rq.wqe_cnt) 753 718 mlx4_db_free(dev->dev, &qp->db); 754 719 } 755 720 ··· 760 725 struct ib_qp_init_attr *init_attr, 761 726 struct ib_udata *udata) 762 727 { 763 - struct mlx4_ib_dev *dev = to_mdev(pd->device); 764 728 struct mlx4_ib_sqp *sqp; 765 729 struct mlx4_ib_qp *qp; 766 730 int err; 731 + u16 xrcdn = 0; 767 732 768 733 /* 769 734 * We only support LSO and multicast loopback blocking, and ··· 774 739 return ERR_PTR(-EINVAL); 775 740 776 741 if (init_attr->create_flags && 777 - (pd->uobject || init_attr->qp_type != IB_QPT_UD)) 742 + (udata || init_attr->qp_type != IB_QPT_UD)) 778 743 return ERR_PTR(-EINVAL); 779 744 780 745 switch (init_attr->qp_type) { 746 + case IB_QPT_XRC_TGT: 747 + pd = to_mxrcd(init_attr->xrcd)->pd; 748 + xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn; 749 + init_attr->send_cq = to_mxrcd(init_attr->xrcd)->cq; 750 + /* fall through */ 751 + case IB_QPT_XRC_INI: 752 + if (!(to_mdev(pd->device)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)) 753 + return ERR_PTR(-ENOSYS); 754 + init_attr->recv_cq = init_attr->send_cq; 755 + /* fall through */ 781 756 case IB_QPT_RC: 782 757 case IB_QPT_UC: 783 758 case IB_QPT_UD: ··· 796 751 if (!qp) 797 752 return ERR_PTR(-ENOMEM); 798 753 799 - err = create_qp_common(dev, pd, init_attr, udata, 0, qp); 754 + err = create_qp_common(to_mdev(pd->device), pd, init_attr, udata, 0, qp); 800 755 if (err) { 801 756 kfree(qp); 802 757 return ERR_PTR(err); 803 758 } 804 759 805 760 qp->ibqp.qp_num = qp->mqp.qpn; 761 + qp->xrcdn = xrcdn; 806 762 807 763 break; 808 764 } ··· 811 765 case IB_QPT_GSI: 812 766 { 813 767 /* Userspace is not allowed to create special QPs: */ 814 - if (pd->uobject) 768 + if (udata) 815 769 return ERR_PTR(-EINVAL); 816 770 817 771 sqp = kzalloc(sizeof *sqp, GFP_KERNEL); ··· 820 774 821 775 qp = &sqp->qp; 822 776 823 - err = create_qp_common(dev, pd, init_attr, udata, 824 - dev->dev->caps.sqp_start + 777 + err = create_qp_common(to_mdev(pd->device), pd, init_attr, udata, 778 + to_mdev(pd->device)->dev->caps.sqp_start + 825 779 (init_attr->qp_type == IB_QPT_SMI ? 0 : 2) + 826 780 init_attr->port_num - 1, 827 781 qp); ··· 847 801 { 848 802 struct mlx4_ib_dev *dev = to_mdev(qp->device); 849 803 struct mlx4_ib_qp *mqp = to_mqp(qp); 804 + struct mlx4_ib_pd *pd; 850 805 851 806 if (is_qp0(dev, mqp)) 852 807 mlx4_CLOSE_PORT(dev->dev, mqp->port); 853 808 854 - destroy_qp_common(dev, mqp, !!qp->pd->uobject); 809 + pd = get_pd(mqp); 810 + destroy_qp_common(dev, mqp, !!pd->ibpd.uobject); 855 811 856 812 if (is_sqp(dev, mqp)) 857 813 kfree(to_msqp(mqp)); ··· 869 821 case IB_QPT_RC: return MLX4_QP_ST_RC; 870 822 case IB_QPT_UC: return MLX4_QP_ST_UC; 871 823 case IB_QPT_UD: return MLX4_QP_ST_UD; 824 + case IB_QPT_XRC_INI: 825 + case IB_QPT_XRC_TGT: return MLX4_QP_ST_XRC; 872 826 case IB_QPT_SMI: 873 827 case IB_QPT_GSI: return MLX4_QP_ST_MLX; 874 828 default: return -1; ··· 1009 959 { 1010 960 struct mlx4_ib_dev *dev = to_mdev(ibqp->device); 1011 961 struct mlx4_ib_qp *qp = to_mqp(ibqp); 962 + struct mlx4_ib_pd *pd; 963 + struct mlx4_ib_cq *send_cq, *recv_cq; 1012 964 struct mlx4_qp_context *context; 1013 965 enum mlx4_qp_optpar optpar = 0; 1014 966 int sqd_event; ··· 1066 1014 context->sq_size_stride = ilog2(qp->sq.wqe_cnt) << 3; 1067 1015 context->sq_size_stride |= qp->sq.wqe_shift - 4; 1068 1016 1069 - if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 1017 + if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { 1070 1018 context->sq_size_stride |= !!qp->sq_no_prefetch << 7; 1019 + context->xrcd = cpu_to_be32((u32) qp->xrcdn); 1020 + } 1071 1021 1072 1022 if (qp->ibqp.uobject) 1073 1023 context->usr_page = cpu_to_be32(to_mucontext(ibqp->uobject->context)->uar.index); ··· 1133 1079 optpar |= MLX4_QP_OPTPAR_ALT_ADDR_PATH; 1134 1080 } 1135 1081 1136 - context->pd = cpu_to_be32(to_mpd(ibqp->pd)->pdn); 1137 - context->params1 = cpu_to_be32(MLX4_IB_ACK_REQ_FREQ << 28); 1082 + pd = get_pd(qp); 1083 + get_cqs(qp, &send_cq, &recv_cq); 1084 + context->pd = cpu_to_be32(pd->pdn); 1085 + context->cqn_send = cpu_to_be32(send_cq->mcq.cqn); 1086 + context->cqn_recv = cpu_to_be32(recv_cq->mcq.cqn); 1087 + context->params1 = cpu_to_be32(MLX4_IB_ACK_REQ_FREQ << 28); 1138 1088 1139 1089 /* Set "fast registration enabled" for all kernel QPs */ 1140 1090 if (!qp->ibqp.uobject) ··· 1164 1106 if (attr_mask & IB_QP_SQ_PSN) 1165 1107 context->next_send_psn = cpu_to_be32(attr->sq_psn); 1166 1108 1167 - context->cqn_send = cpu_to_be32(to_mcq(ibqp->send_cq)->mcq.cqn); 1168 - 1169 1109 if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 1170 1110 if (attr->max_dest_rd_atomic) 1171 1111 context->params2 |= ··· 1186 1130 if (attr_mask & IB_QP_RQ_PSN) 1187 1131 context->rnr_nextrecvpsn |= cpu_to_be32(attr->rq_psn); 1188 1132 1189 - context->cqn_recv = cpu_to_be32(to_mcq(ibqp->recv_cq)->mcq.cqn); 1190 - 1191 1133 if (attr_mask & IB_QP_QKEY) { 1192 1134 context->qkey = cpu_to_be32(attr->qkey); 1193 1135 optpar |= MLX4_QP_OPTPAR_Q_KEY; ··· 1194 1140 if (ibqp->srq) 1195 1141 context->srqn = cpu_to_be32(1 << 24 | to_msrq(ibqp->srq)->msrq.srqn); 1196 1142 1197 - if (!ibqp->srq && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 1143 + if (qp->rq.wqe_cnt && cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) 1198 1144 context->db_rec_addr = cpu_to_be64(qp->db.dma); 1199 1145 1200 1146 if (cur_state == IB_QPS_INIT && ··· 1279 1225 * entries and reinitialize the QP. 1280 1226 */ 1281 1227 if (new_state == IB_QPS_RESET && !ibqp->uobject) { 1282 - mlx4_ib_cq_clean(to_mcq(ibqp->recv_cq), qp->mqp.qpn, 1228 + mlx4_ib_cq_clean(recv_cq, qp->mqp.qpn, 1283 1229 ibqp->srq ? to_msrq(ibqp->srq): NULL); 1284 - if (ibqp->send_cq != ibqp->recv_cq) 1285 - mlx4_ib_cq_clean(to_mcq(ibqp->send_cq), qp->mqp.qpn, NULL); 1230 + if (send_cq != recv_cq) 1231 + mlx4_ib_cq_clean(send_cq, qp->mqp.qpn, NULL); 1286 1232 1287 1233 qp->rq.head = 0; 1288 1234 qp->rq.tail = 0; 1289 1235 qp->sq.head = 0; 1290 1236 qp->sq.tail = 0; 1291 1237 qp->sq_next_wqe = 0; 1292 - if (!ibqp->srq) 1238 + if (qp->rq.wqe_cnt) 1293 1239 *qp->db.db = 0; 1294 1240 } 1295 1241 ··· 1601 1547 } 1602 1548 1603 1549 static void set_datagram_seg(struct mlx4_wqe_datagram_seg *dseg, 1604 - struct ib_send_wr *wr, __be16 *vlan) 1550 + struct ib_send_wr *wr) 1605 1551 { 1606 1552 memcpy(dseg->av, &to_mah(wr->wr.ud.ah)->av, sizeof (struct mlx4_av)); 1607 1553 dseg->dqpn = cpu_to_be32(wr->wr.ud.remote_qpn); 1608 1554 dseg->qkey = cpu_to_be32(wr->wr.ud.remote_qkey); 1609 1555 dseg->vlan = to_mah(wr->wr.ud.ah)->av.eth.vlan; 1610 1556 memcpy(dseg->mac, to_mah(wr->wr.ud.ah)->av.eth.mac, 6); 1611 - *vlan = dseg->vlan; 1612 1557 } 1613 1558 1614 1559 static void set_mlx_icrc_seg(void *dseg) ··· 1710 1657 __be32 uninitialized_var(lso_hdr_sz); 1711 1658 __be32 blh; 1712 1659 int i; 1713 - __be16 vlan = cpu_to_be16(0xffff); 1714 1660 1715 1661 spin_lock_irqsave(&qp->sq.lock, flags); 1716 1662 ··· 1813 1761 break; 1814 1762 1815 1763 case IB_QPT_UD: 1816 - set_datagram_seg(wqe, wr, &vlan); 1764 + set_datagram_seg(wqe, wr); 1817 1765 wqe += sizeof (struct mlx4_wqe_datagram_seg); 1818 1766 size += sizeof (struct mlx4_wqe_datagram_seg) / 16; 1819 1767 ··· 1875 1823 1876 1824 ctrl->fence_size = (wr->send_flags & IB_SEND_FENCE ? 1877 1825 MLX4_WQE_CTRL_FENCE : 0) | size; 1878 - 1879 - if (be16_to_cpu(vlan) < 0x1000) { 1880 - ctrl->ins_vlan = 1 << 6; 1881 - ctrl->vlan_tag = vlan; 1882 - } 1883 1826 1884 1827 /* 1885 1828 * Make sure descriptor is fully written before
+9 -1
drivers/infiniband/hw/mlx4/srq.c
··· 76 76 struct mlx4_ib_srq *srq; 77 77 struct mlx4_wqe_srq_next_seg *next; 78 78 struct mlx4_wqe_data_seg *scatter; 79 + u32 cqn; 80 + u16 xrcdn; 79 81 int desc_size; 80 82 int buf_size; 81 83 int err; ··· 176 174 } 177 175 } 178 176 179 - err = mlx4_srq_alloc(dev->dev, to_mpd(pd)->pdn, &srq->mtt, 177 + cqn = (init_attr->srq_type == IB_SRQT_XRC) ? 178 + to_mcq(init_attr->ext.xrc.cq)->mcq.cqn : 0; 179 + xrcdn = (init_attr->srq_type == IB_SRQT_XRC) ? 180 + to_mxrcd(init_attr->ext.xrc.xrcd)->xrcdn : 181 + (u16) dev->dev->caps.reserved_xrcds; 182 + err = mlx4_srq_alloc(dev->dev, to_mpd(pd)->pdn, cqn, xrcdn, &srq->mtt, 180 183 srq->db.dma, &srq->msrq); 181 184 if (err) 182 185 goto err_wrid; 183 186 184 187 srq->msrq.event = mlx4_ib_srq_event; 188 + srq->ibsrq.ext.xrc.srq_num = srq->msrq.srqn; 185 189 186 190 if (pd->uobject) 187 191 if (ib_copy_to_udata(udata, &srq->msrq.srqn, sizeof (__u32))) {
+3
drivers/infiniband/hw/mthca/mthca_provider.c
··· 438 438 struct mthca_srq *srq; 439 439 int err; 440 440 441 + if (init_attr->srq_type != IB_SRQT_BASIC) 442 + return ERR_PTR(-ENOSYS); 443 + 441 444 srq = kmalloc(sizeof *srq, GFP_KERNEL); 442 445 if (!srq) 443 446 return ERR_PTR(-ENOMEM);
+1 -1
drivers/infiniband/hw/nes/Makefile
··· 1 1 obj-$(CONFIG_INFINIBAND_NES) += iw_nes.o 2 2 3 - iw_nes-objs := nes.o nes_hw.o nes_nic.o nes_utils.o nes_verbs.o nes_cm.o 3 + iw_nes-objs := nes.o nes_hw.o nes_nic.o nes_utils.o nes_verbs.o nes_cm.o nes_mgt.o
+4 -4
drivers/infiniband/hw/nes/nes.c
··· 84 84 MODULE_PARM_DESC(send_first, "Send RDMA Message First on Active Connection"); 85 85 86 86 87 - unsigned int nes_drv_opt = 0; 87 + unsigned int nes_drv_opt = NES_DRV_OPT_DISABLE_INT_MOD | NES_DRV_OPT_ENABLE_PAU; 88 88 module_param(nes_drv_opt, int, 0644); 89 89 MODULE_PARM_DESC(nes_drv_opt, "Driver option parameters"); 90 90 ··· 129 129 static struct notifier_block nes_net_notifier = { 130 130 .notifier_call = nes_net_event 131 131 }; 132 - 133 - 134 - 135 132 136 133 /** 137 134 * nes_inetaddr_event ··· 318 321 } 319 322 320 323 if (atomic_dec_and_test(&nesqp->refcount)) { 324 + if (nesqp->pau_mode) 325 + nes_destroy_pau_qp(nesdev, nesqp); 326 + 321 327 /* Destroy the QP */ 322 328 cqp_request = nes_get_cqp_request(nesdev); 323 329 if (cqp_request == NULL) {
+15 -2
drivers/infiniband/hw/nes/nes.h
··· 102 102 #define NES_DRV_OPT_NO_INLINE_DATA 0x00000080 103 103 #define NES_DRV_OPT_DISABLE_INT_MOD 0x00000100 104 104 #define NES_DRV_OPT_DISABLE_VIRT_WQ 0x00000200 105 + #define NES_DRV_OPT_ENABLE_PAU 0x00000400 105 106 106 107 #define NES_AEQ_EVENT_TIMEOUT 2500 107 108 #define NES_DISCONNECT_EVENT_TIMEOUT 2000 ··· 129 128 #define NES_DBG_IW_RX 0x00020000 130 129 #define NES_DBG_IW_TX 0x00040000 131 130 #define NES_DBG_SHUTDOWN 0x00080000 131 + #define NES_DBG_PAU 0x00100000 132 132 #define NES_DBG_RSVD1 0x10000000 133 133 #define NES_DBG_RSVD2 0x20000000 134 134 #define NES_DBG_RSVD3 0x40000000 ··· 164 162 #include "nes_context.h" 165 163 #include "nes_user.h" 166 164 #include "nes_cm.h" 165 + #include "nes_mgt.h" 167 166 168 167 extern int max_mtu; 169 168 #define max_frame_len (max_mtu+ETH_HLEN) ··· 205 202 extern atomic_t cm_nodes_destroyed; 206 203 extern atomic_t cm_accel_dropped_pkts; 207 204 extern atomic_t cm_resets_recvd; 205 + extern atomic_t pau_qps_created; 206 + extern atomic_t pau_qps_destroyed; 208 207 209 208 extern u32 int_mod_timer_init; 210 209 extern u32 int_mod_cq_depth_256; ··· 278 273 u8 link_recheck; 279 274 }; 280 275 276 + /* Receive skb private area - must fit in skb->cb area */ 277 + struct nes_rskb_cb { 278 + u64 busaddr; 279 + u32 maplen; 280 + u32 seqnum; 281 + u8 *data_start; 282 + struct nes_qp *nesqp; 283 + }; 281 284 282 285 static inline __le32 get_crc_value(struct nes_v4_quad *nes_quad) 283 286 { ··· 318 305 static inline void 319 306 nes_fill_init_cqp_wqe(struct nes_hw_cqp_wqe *cqp_wqe, struct nes_device *nesdev) 320 307 { 321 - set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_COMP_CTX_LOW_IDX, 322 - (u64)((unsigned long) &nesdev->cqp)); 308 + cqp_wqe->wqe_words[NES_CQP_WQE_COMP_CTX_LOW_IDX] = 0; 309 + cqp_wqe->wqe_words[NES_CQP_WQE_COMP_CTX_HIGH_IDX] = 0; 323 310 cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX] = 0; 324 311 cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX] = 0; 325 312 cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX] = 0;
+661 -460
drivers/infiniband/hw/nes/nes_cm.c
··· 77 77 atomic_t cm_accel_dropped_pkts; 78 78 atomic_t cm_resets_recvd; 79 79 80 - static inline int mini_cm_accelerated(struct nes_cm_core *, 81 - struct nes_cm_node *); 82 - static struct nes_cm_listener *mini_cm_listen(struct nes_cm_core *, 83 - struct nes_vnic *, struct nes_cm_info *); 80 + static inline int mini_cm_accelerated(struct nes_cm_core *, struct nes_cm_node *); 81 + static struct nes_cm_listener *mini_cm_listen(struct nes_cm_core *, struct nes_vnic *, struct nes_cm_info *); 84 82 static int mini_cm_del_listen(struct nes_cm_core *, struct nes_cm_listener *); 85 - static struct nes_cm_node *mini_cm_connect(struct nes_cm_core *, 86 - struct nes_vnic *, u16, void *, struct nes_cm_info *); 83 + static struct nes_cm_node *mini_cm_connect(struct nes_cm_core *, struct nes_vnic *, u16, void *, struct nes_cm_info *); 87 84 static int mini_cm_close(struct nes_cm_core *, struct nes_cm_node *); 88 - static int mini_cm_accept(struct nes_cm_core *, struct ietf_mpa_frame *, 89 - struct nes_cm_node *); 90 - static int mini_cm_reject(struct nes_cm_core *, struct ietf_mpa_frame *, 91 - struct nes_cm_node *); 92 - static int mini_cm_recv_pkt(struct nes_cm_core *, struct nes_vnic *, 93 - struct sk_buff *); 85 + static int mini_cm_accept(struct nes_cm_core *, struct nes_cm_node *); 86 + static int mini_cm_reject(struct nes_cm_core *, struct nes_cm_node *); 87 + static int mini_cm_recv_pkt(struct nes_cm_core *, struct nes_vnic *, struct sk_buff *); 94 88 static int mini_cm_dealloc_core(struct nes_cm_core *); 95 89 static int mini_cm_get(struct nes_cm_core *); 96 90 static int mini_cm_set(struct nes_cm_core *, u32, u32); 97 91 98 - static void form_cm_frame(struct sk_buff *, struct nes_cm_node *, 99 - void *, u32, void *, u32, u8); 92 + static void form_cm_frame(struct sk_buff *, struct nes_cm_node *, void *, u32, void *, u32, u8); 100 93 static int add_ref_cm_node(struct nes_cm_node *); 101 94 static int rem_ref_cm_node(struct nes_cm_core *, struct nes_cm_node *); 102 95 ··· 104 111 static int send_reset(struct nes_cm_node *, struct sk_buff *); 105 112 static int send_ack(struct nes_cm_node *cm_node, struct sk_buff *skb); 106 113 static int send_fin(struct nes_cm_node *cm_node, struct sk_buff *skb); 107 - static void process_packet(struct nes_cm_node *, struct sk_buff *, 108 - struct nes_cm_core *); 114 + static void process_packet(struct nes_cm_node *, struct sk_buff *, struct nes_cm_core *); 109 115 110 116 static void active_open_err(struct nes_cm_node *, struct sk_buff *, int); 111 117 static void passive_open_err(struct nes_cm_node *, struct sk_buff *, int); 112 118 static void cleanup_retrans_entry(struct nes_cm_node *); 113 119 static void handle_rcv_mpa(struct nes_cm_node *, struct sk_buff *); 114 120 static void free_retrans_entry(struct nes_cm_node *cm_node); 115 - static int handle_tcp_options(struct nes_cm_node *cm_node, struct tcphdr *tcph, 116 - struct sk_buff *skb, int optionsize, int passive); 121 + static int handle_tcp_options(struct nes_cm_node *cm_node, struct tcphdr *tcph, struct sk_buff *skb, int optionsize, int passive); 117 122 118 123 /* CM event handler functions */ 119 124 static void cm_event_connected(struct nes_cm_event *); ··· 120 129 static void cm_event_mpa_req(struct nes_cm_event *); 121 130 static void cm_event_mpa_reject(struct nes_cm_event *); 122 131 static void handle_recv_entry(struct nes_cm_node *cm_node, u32 rem_node); 132 + 133 + /* MPA build functions */ 134 + static int cm_build_mpa_frame(struct nes_cm_node *, u8 **, u16 *, u8 *, u8); 135 + static void build_mpa_v2(struct nes_cm_node *, void *, u8); 136 + static void build_mpa_v1(struct nes_cm_node *, void *, u8); 137 + static void build_rdma0_msg(struct nes_cm_node *, struct nes_qp **); 123 138 124 139 static void print_core(struct nes_cm_core *core); 125 140 ··· 156 159 atomic_t cm_connect_reqs; 157 160 atomic_t cm_rejects; 158 161 162 + int nes_add_ref_cm_node(struct nes_cm_node *cm_node) 163 + { 164 + return add_ref_cm_node(cm_node); 165 + } 166 + 167 + int nes_rem_ref_cm_node(struct nes_cm_node *cm_node) 168 + { 169 + return rem_ref_cm_node(cm_node->cm_core, cm_node); 170 + } 159 171 160 172 /** 161 173 * create_event 162 174 */ 163 - static struct nes_cm_event *create_event(struct nes_cm_node *cm_node, 164 - enum nes_cm_event_type type) 175 + static struct nes_cm_event *create_event(struct nes_cm_node * cm_node, 176 + enum nes_cm_event_type type) 165 177 { 166 178 struct nes_cm_event *event; 167 179 ··· 192 186 event->cm_info.cm_id = cm_node->cm_id; 193 187 194 188 nes_debug(NES_DBG_CM, "cm_node=%p Created event=%p, type=%u, " 195 - "dst_addr=%08x[%x], src_addr=%08x[%x]\n", 196 - cm_node, event, type, event->cm_info.loc_addr, 197 - event->cm_info.loc_port, event->cm_info.rem_addr, 198 - event->cm_info.rem_port); 189 + "dst_addr=%08x[%x], src_addr=%08x[%x]\n", 190 + cm_node, event, type, event->cm_info.loc_addr, 191 + event->cm_info.loc_port, event->cm_info.rem_addr, 192 + event->cm_info.rem_port); 199 193 200 194 nes_cm_post_event(event); 201 195 return event; ··· 207 201 */ 208 202 static int send_mpa_request(struct nes_cm_node *cm_node, struct sk_buff *skb) 209 203 { 204 + u8 start_addr = 0; 205 + u8 *start_ptr = &start_addr; 206 + u8 **start_buff = &start_ptr; 207 + u16 buff_len = 0; 208 + 210 209 if (!skb) { 211 210 nes_debug(NES_DBG_CM, "skb set to NULL\n"); 212 211 return -1; 213 212 } 214 213 215 214 /* send an MPA Request frame */ 216 - form_cm_frame(skb, cm_node, NULL, 0, &cm_node->mpa_frame, 217 - cm_node->mpa_frame_size, SET_ACK); 215 + cm_build_mpa_frame(cm_node, start_buff, &buff_len, NULL, MPA_KEY_REQUEST); 216 + form_cm_frame(skb, cm_node, NULL, 0, *start_buff, buff_len, SET_ACK); 218 217 219 218 return schedule_nes_timer(cm_node, skb, NES_TIMER_TYPE_SEND, 1, 0); 220 219 } ··· 228 217 229 218 static int send_mpa_reject(struct nes_cm_node *cm_node) 230 219 { 231 - struct sk_buff *skb = NULL; 220 + struct sk_buff *skb = NULL; 221 + u8 start_addr = 0; 222 + u8 *start_ptr = &start_addr; 223 + u8 **start_buff = &start_ptr; 224 + u16 buff_len = 0; 232 225 233 226 skb = dev_alloc_skb(MAX_CM_BUFFER); 234 227 if (!skb) { ··· 241 226 } 242 227 243 228 /* send an MPA reject frame */ 244 - form_cm_frame(skb, cm_node, NULL, 0, &cm_node->mpa_frame, 245 - cm_node->mpa_frame_size, SET_ACK | SET_FIN); 229 + cm_build_mpa_frame(cm_node, start_buff, &buff_len, NULL, MPA_KEY_REPLY); 230 + form_cm_frame(skb, cm_node, NULL, 0, *start_buff, buff_len, SET_ACK | SET_FIN); 246 231 247 232 cm_node->state = NES_CM_STATE_FIN_WAIT1; 248 233 return schedule_nes_timer(cm_node, skb, NES_TIMER_TYPE_SEND, 1, 0); ··· 254 239 * IETF MPA frame 255 240 */ 256 241 static int parse_mpa(struct nes_cm_node *cm_node, u8 *buffer, u32 *type, 257 - u32 len) 242 + u32 len) 258 243 { 259 - struct ietf_mpa_frame *mpa_frame; 244 + struct ietf_mpa_v1 *mpa_frame; 245 + struct ietf_mpa_v2 *mpa_v2_frame; 246 + struct ietf_rtr_msg *rtr_msg; 247 + int mpa_hdr_len; 248 + int priv_data_len; 260 249 261 250 *type = NES_MPA_REQUEST_ACCEPT; 262 251 263 252 /* assume req frame is in tcp data payload */ 264 - if (len < sizeof(struct ietf_mpa_frame)) { 253 + if (len < sizeof(struct ietf_mpa_v1)) { 265 254 nes_debug(NES_DBG_CM, "The received ietf buffer was too small (%x)\n", len); 266 255 return -EINVAL; 267 256 } 268 257 269 - mpa_frame = (struct ietf_mpa_frame *)buffer; 270 - cm_node->mpa_frame_size = ntohs(mpa_frame->priv_data_len); 258 + /* points to the beginning of the frame, which could be MPA V1 or V2 */ 259 + mpa_frame = (struct ietf_mpa_v1 *)buffer; 260 + mpa_hdr_len = sizeof(struct ietf_mpa_v1); 261 + priv_data_len = ntohs(mpa_frame->priv_data_len); 262 + 271 263 /* make sure mpa private data len is less than 512 bytes */ 272 - if (cm_node->mpa_frame_size > IETF_MAX_PRIV_DATA_LEN) { 264 + if (priv_data_len > IETF_MAX_PRIV_DATA_LEN) { 273 265 nes_debug(NES_DBG_CM, "The received Length of Private" 274 - " Data field exceeds 512 octets\n"); 266 + " Data field exceeds 512 octets\n"); 275 267 return -EINVAL; 276 268 } 277 269 /* ··· 286 264 * received MPA version and MPA key information 287 265 * 288 266 */ 289 - if (mpa_frame->rev != mpa_version) { 267 + if (mpa_frame->rev != IETF_MPA_V1 && mpa_frame->rev != IETF_MPA_V2) { 290 268 nes_debug(NES_DBG_CM, "The received mpa version" 291 - " can not be interoperated\n"); 269 + " is not supported\n"); 292 270 return -EINVAL; 293 271 } 272 + /* 273 + * backwards compatibility only 274 + */ 275 + if (mpa_frame->rev > cm_node->mpa_frame_rev) { 276 + nes_debug(NES_DBG_CM, "The received mpa version" 277 + " can not be interoperated\n"); 278 + return -EINVAL; 279 + } else { 280 + cm_node->mpa_frame_rev = mpa_frame->rev; 281 + } 282 + 294 283 if (cm_node->state != NES_CM_STATE_MPAREQ_SENT) { 295 284 if (memcmp(mpa_frame->key, IEFT_MPA_KEY_REQ, IETF_MPA_KEY_SIZE)) { 296 285 nes_debug(NES_DBG_CM, "Unexpected MPA Key received \n"); ··· 314 281 } 315 282 } 316 283 317 - if (cm_node->mpa_frame_size + sizeof(struct ietf_mpa_frame) != len) { 284 + 285 + if (priv_data_len + mpa_hdr_len != len) { 318 286 nes_debug(NES_DBG_CM, "The received ietf buffer was not right" 319 - " complete (%x + %x != %x)\n", 320 - cm_node->mpa_frame_size, 321 - (u32)sizeof(struct ietf_mpa_frame), len); 287 + " complete (%x + %x != %x)\n", 288 + priv_data_len, mpa_hdr_len, len); 322 289 return -EINVAL; 323 290 } 324 291 /* make sure it does not exceed the max size */ 325 292 if (len > MAX_CM_BUFFER) { 326 293 nes_debug(NES_DBG_CM, "The received ietf buffer was too large" 327 - " (%x + %x != %x)\n", 328 - cm_node->mpa_frame_size, 329 - (u32)sizeof(struct ietf_mpa_frame), len); 294 + " (%x + %x != %x)\n", 295 + priv_data_len, mpa_hdr_len, len); 330 296 return -EINVAL; 331 297 } 332 298 299 + cm_node->mpa_frame_size = priv_data_len; 300 + 301 + switch (mpa_frame->rev) { 302 + case IETF_MPA_V2: { 303 + u16 ird_size; 304 + u16 ord_size; 305 + mpa_v2_frame = (struct ietf_mpa_v2 *)buffer; 306 + mpa_hdr_len += IETF_RTR_MSG_SIZE; 307 + cm_node->mpa_frame_size -= IETF_RTR_MSG_SIZE; 308 + rtr_msg = &mpa_v2_frame->rtr_msg; 309 + 310 + /* parse rtr message */ 311 + rtr_msg->ctrl_ird = ntohs(rtr_msg->ctrl_ird); 312 + rtr_msg->ctrl_ord = ntohs(rtr_msg->ctrl_ord); 313 + ird_size = rtr_msg->ctrl_ird & IETF_NO_IRD_ORD; 314 + ord_size = rtr_msg->ctrl_ord & IETF_NO_IRD_ORD; 315 + 316 + if (!(rtr_msg->ctrl_ird & IETF_PEER_TO_PEER)) { 317 + /* send reset */ 318 + return -EINVAL; 319 + } 320 + 321 + if (cm_node->state != NES_CM_STATE_MPAREQ_SENT) { 322 + /* responder */ 323 + if (cm_node->ord_size > ird_size) 324 + cm_node->ord_size = ird_size; 325 + } else { 326 + /* initiator */ 327 + if (cm_node->ord_size > ird_size) 328 + cm_node->ord_size = ird_size; 329 + 330 + if (cm_node->ird_size < ord_size) { 331 + /* no resources available */ 332 + /* send terminate message */ 333 + return -EINVAL; 334 + } 335 + } 336 + 337 + if (rtr_msg->ctrl_ord & IETF_RDMA0_READ) { 338 + cm_node->send_rdma0_op = SEND_RDMA_READ_ZERO; 339 + } else if (rtr_msg->ctrl_ord & IETF_RDMA0_WRITE) { 340 + cm_node->send_rdma0_op = SEND_RDMA_WRITE_ZERO; 341 + } else { /* Not supported RDMA0 operation */ 342 + return -EINVAL; 343 + } 344 + break; 345 + } 346 + case IETF_MPA_V1: 347 + default: 348 + break; 349 + } 350 + 333 351 /* copy entire MPA frame to our cm_node's frame */ 334 - memcpy(cm_node->mpa_frame_buf, buffer + sizeof(struct ietf_mpa_frame), 335 - cm_node->mpa_frame_size); 352 + memcpy(cm_node->mpa_frame_buf, buffer + mpa_hdr_len, cm_node->mpa_frame_size); 336 353 337 354 if (mpa_frame->flags & IETF_MPA_FLAGS_REJECT) 338 355 *type = NES_MPA_REQUEST_REJECT; ··· 395 312 * node info to build. 396 313 */ 397 314 static void form_cm_frame(struct sk_buff *skb, 398 - struct nes_cm_node *cm_node, void *options, u32 optionsize, 399 - void *data, u32 datasize, u8 flags) 315 + struct nes_cm_node *cm_node, void *options, u32 optionsize, 316 + void *data, u32 datasize, u8 flags) 400 317 { 401 318 struct tcphdr *tcph; 402 319 struct iphdr *iph; ··· 405 322 u16 packetsize = sizeof(*iph); 406 323 407 324 packetsize += sizeof(*tcph); 408 - packetsize += optionsize + datasize; 325 + packetsize += optionsize + datasize; 409 326 327 + skb_trim(skb, 0); 410 328 memset(skb->data, 0x00, ETH_HLEN + sizeof(*iph) + sizeof(*tcph)); 411 329 412 - skb->len = 0; 413 330 buf = skb_put(skb, packetsize + ETH_HLEN); 414 331 415 - ethh = (struct ethhdr *) buf; 332 + ethh = (struct ethhdr *)buf; 416 333 buf += ETH_HLEN; 417 334 418 335 iph = (struct iphdr *)buf; ··· 420 337 tcph = (struct tcphdr *)buf; 421 338 skb_reset_mac_header(skb); 422 339 skb_set_network_header(skb, ETH_HLEN); 423 - skb_set_transport_header(skb, ETH_HLEN+sizeof(*iph)); 340 + skb_set_transport_header(skb, ETH_HLEN + sizeof(*iph)); 424 341 buf += sizeof(*tcph); 425 342 426 343 skb->ip_summed = CHECKSUM_PARTIAL; ··· 433 350 ethh->h_proto = htons(0x0800); 434 351 435 352 iph->version = IPVERSION; 436 - iph->ihl = 5; /* 5 * 4Byte words, IP headr len */ 353 + iph->ihl = 5; /* 5 * 4Byte words, IP headr len */ 437 354 iph->tos = 0; 438 355 iph->tot_len = htons(packetsize); 439 356 iph->id = htons(++cm_node->tcp_cntxt.loc_id); 440 357 441 358 iph->frag_off = htons(0x4000); 442 359 iph->ttl = 0x40; 443 - iph->protocol = 0x06; /* IPPROTO_TCP */ 360 + iph->protocol = 0x06; /* IPPROTO_TCP */ 444 361 445 362 iph->saddr = htonl(cm_node->loc_addr); 446 363 iph->daddr = htonl(cm_node->rem_addr); ··· 453 370 cm_node->tcp_cntxt.loc_ack_num = cm_node->tcp_cntxt.rcv_nxt; 454 371 tcph->ack_seq = htonl(cm_node->tcp_cntxt.loc_ack_num); 455 372 tcph->ack = 1; 456 - } else 373 + } else { 457 374 tcph->ack_seq = 0; 375 + } 458 376 459 377 if (flags & SET_SYN) { 460 378 cm_node->tcp_cntxt.loc_seq_num++; 461 379 tcph->syn = 1; 462 - } else 380 + } else { 463 381 cm_node->tcp_cntxt.loc_seq_num += datasize; 382 + } 464 383 465 384 if (flags & SET_FIN) { 466 385 cm_node->tcp_cntxt.loc_seq_num++; ··· 483 398 484 399 skb_shinfo(skb)->nr_frags = 0; 485 400 cm_packets_created++; 486 - 487 401 } 488 - 489 402 490 403 /** 491 404 * print_core - dump a cm core ··· 496 413 return; 497 414 nes_debug(NES_DBG_CM, "---------------------------------------------\n"); 498 415 499 - nes_debug(NES_DBG_CM, "State : %u \n", core->state); 416 + nes_debug(NES_DBG_CM, "State : %u \n", core->state); 500 417 501 418 nes_debug(NES_DBG_CM, "Listen Nodes : %u \n", atomic_read(&core->listen_node_cnt)); 502 419 nes_debug(NES_DBG_CM, "Active Nodes : %u \n", atomic_read(&core->node_cnt)); ··· 506 423 nes_debug(NES_DBG_CM, "-------------- end core ---------------\n"); 507 424 } 508 425 426 + /** 427 + * cm_build_mpa_frame - build a MPA V1 frame or MPA V2 frame 428 + */ 429 + static int cm_build_mpa_frame(struct nes_cm_node *cm_node, u8 **start_buff, 430 + u16 *buff_len, u8 *pci_mem, u8 mpa_key) 431 + { 432 + int ret = 0; 433 + 434 + *start_buff = (pci_mem) ? pci_mem : &cm_node->mpa_frame_buf[0]; 435 + 436 + switch (cm_node->mpa_frame_rev) { 437 + case IETF_MPA_V1: 438 + *start_buff = (u8 *)*start_buff + sizeof(struct ietf_rtr_msg); 439 + *buff_len = sizeof(struct ietf_mpa_v1) + cm_node->mpa_frame_size; 440 + build_mpa_v1(cm_node, *start_buff, mpa_key); 441 + break; 442 + case IETF_MPA_V2: 443 + *buff_len = sizeof(struct ietf_mpa_v2) + cm_node->mpa_frame_size; 444 + build_mpa_v2(cm_node, *start_buff, mpa_key); 445 + break; 446 + default: 447 + ret = -EINVAL; 448 + } 449 + return ret; 450 + } 451 + 452 + /** 453 + * build_mpa_v2 - build a MPA V2 frame 454 + */ 455 + static void build_mpa_v2(struct nes_cm_node *cm_node, 456 + void *start_addr, u8 mpa_key) 457 + { 458 + struct ietf_mpa_v2 *mpa_frame = (struct ietf_mpa_v2 *)start_addr; 459 + struct ietf_rtr_msg *rtr_msg = &mpa_frame->rtr_msg; 460 + 461 + /* initialize the upper 5 bytes of the frame */ 462 + build_mpa_v1(cm_node, start_addr, mpa_key); 463 + mpa_frame->flags |= IETF_MPA_V2_FLAG; /* set a bit to indicate MPA V2 */ 464 + mpa_frame->priv_data_len += htons(IETF_RTR_MSG_SIZE); 465 + 466 + /* initialize RTR msg */ 467 + rtr_msg->ctrl_ird = (cm_node->ird_size > IETF_NO_IRD_ORD) ? 468 + IETF_NO_IRD_ORD : cm_node->ird_size; 469 + rtr_msg->ctrl_ord = (cm_node->ord_size > IETF_NO_IRD_ORD) ? 470 + IETF_NO_IRD_ORD : cm_node->ord_size; 471 + 472 + rtr_msg->ctrl_ird |= IETF_PEER_TO_PEER; 473 + rtr_msg->ctrl_ird |= IETF_FLPDU_ZERO_LEN; 474 + 475 + switch (mpa_key) { 476 + case MPA_KEY_REQUEST: 477 + rtr_msg->ctrl_ord |= IETF_RDMA0_WRITE; 478 + rtr_msg->ctrl_ord |= IETF_RDMA0_READ; 479 + break; 480 + case MPA_KEY_REPLY: 481 + switch (cm_node->send_rdma0_op) { 482 + case SEND_RDMA_WRITE_ZERO: 483 + rtr_msg->ctrl_ord |= IETF_RDMA0_WRITE; 484 + break; 485 + case SEND_RDMA_READ_ZERO: 486 + rtr_msg->ctrl_ord |= IETF_RDMA0_READ; 487 + break; 488 + } 489 + } 490 + rtr_msg->ctrl_ird = htons(rtr_msg->ctrl_ird); 491 + rtr_msg->ctrl_ord = htons(rtr_msg->ctrl_ord); 492 + } 493 + 494 + /** 495 + * build_mpa_v1 - build a MPA V1 frame 496 + */ 497 + static void build_mpa_v1(struct nes_cm_node *cm_node, void *start_addr, u8 mpa_key) 498 + { 499 + struct ietf_mpa_v1 *mpa_frame = (struct ietf_mpa_v1 *)start_addr; 500 + 501 + switch (mpa_key) { 502 + case MPA_KEY_REQUEST: 503 + memcpy(mpa_frame->key, IEFT_MPA_KEY_REQ, IETF_MPA_KEY_SIZE); 504 + break; 505 + case MPA_KEY_REPLY: 506 + memcpy(mpa_frame->key, IEFT_MPA_KEY_REP, IETF_MPA_KEY_SIZE); 507 + break; 508 + } 509 + mpa_frame->flags = IETF_MPA_FLAGS_CRC; 510 + mpa_frame->rev = cm_node->mpa_frame_rev; 511 + mpa_frame->priv_data_len = htons(cm_node->mpa_frame_size); 512 + } 513 + 514 + static void build_rdma0_msg(struct nes_cm_node *cm_node, struct nes_qp **nesqp_addr) 515 + { 516 + u64 u64temp; 517 + struct nes_qp *nesqp = *nesqp_addr; 518 + struct nes_hw_qp_wqe *wqe = &nesqp->hwqp.sq_vbase[0]; 519 + 520 + u64temp = (unsigned long)nesqp; 521 + u64temp |= NES_SW_CONTEXT_ALIGN >> 1; 522 + set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_LOW_IDX, u64temp); 523 + 524 + wqe->wqe_words[NES_IWARP_SQ_WQE_FRAG0_LOW_IDX] = 0; 525 + wqe->wqe_words[NES_IWARP_SQ_WQE_FRAG0_HIGH_IDX] = 0; 526 + 527 + switch (cm_node->send_rdma0_op) { 528 + case SEND_RDMA_WRITE_ZERO: 529 + nes_debug(NES_DBG_CM, "Sending first write.\n"); 530 + wqe->wqe_words[NES_IWARP_SQ_WQE_MISC_IDX] = 531 + cpu_to_le32(NES_IWARP_SQ_OP_RDMAW); 532 + wqe->wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX] = 0; 533 + wqe->wqe_words[NES_IWARP_SQ_WQE_LENGTH0_IDX] = 0; 534 + wqe->wqe_words[NES_IWARP_SQ_WQE_STAG0_IDX] = 0; 535 + break; 536 + 537 + case SEND_RDMA_READ_ZERO: 538 + default: 539 + if (cm_node->send_rdma0_op != SEND_RDMA_READ_ZERO) { 540 + printk(KERN_ERR "%s[%u]: Unsupported RDMA0 len operation=%u\n", 541 + __func__, __LINE__, cm_node->send_rdma0_op); 542 + WARN_ON(1); 543 + } 544 + nes_debug(NES_DBG_CM, "Sending first rdma operation.\n"); 545 + wqe->wqe_words[NES_IWARP_SQ_WQE_MISC_IDX] = 546 + cpu_to_le32(NES_IWARP_SQ_OP_RDMAR); 547 + wqe->wqe_words[NES_IWARP_SQ_WQE_RDMA_TO_LOW_IDX] = 1; 548 + wqe->wqe_words[NES_IWARP_SQ_WQE_RDMA_TO_HIGH_IDX] = 0; 549 + wqe->wqe_words[NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX] = 0; 550 + wqe->wqe_words[NES_IWARP_SQ_WQE_RDMA_STAG_IDX] = 1; 551 + wqe->wqe_words[NES_IWARP_SQ_WQE_STAG0_IDX] = 1; 552 + break; 553 + } 554 + 555 + if (nesqp->sq_kmapped) { 556 + nesqp->sq_kmapped = 0; 557 + kunmap(nesqp->page); 558 + } 559 + 560 + /*use the reserved spot on the WQ for the extra first WQE*/ 561 + nesqp->nesqp_context->ird_ord_sizes &= cpu_to_le32(~(NES_QPCONTEXT_ORDIRD_LSMM_PRESENT | 562 + NES_QPCONTEXT_ORDIRD_WRPDU | 563 + NES_QPCONTEXT_ORDIRD_ALSMM)); 564 + nesqp->skip_lsmm = 1; 565 + nesqp->hwqp.sq_tail = 0; 566 + } 509 567 510 568 /** 511 569 * schedule_nes_timer ··· 654 430 * rem_ref_cm_node(cm_core, cm_node);add_ref_cm_node(cm_node); 655 431 */ 656 432 int schedule_nes_timer(struct nes_cm_node *cm_node, struct sk_buff *skb, 657 - enum nes_timer_type type, int send_retrans, 658 - int close_when_complete) 433 + enum nes_timer_type type, int send_retrans, 434 + int close_when_complete) 659 435 { 660 - unsigned long flags; 436 + unsigned long flags; 661 437 struct nes_cm_core *cm_core = cm_node->cm_core; 662 438 struct nes_timer_entry *new_send; 663 439 int ret = 0; ··· 678 454 new_send->close_when_complete = close_when_complete; 679 455 680 456 if (type == NES_TIMER_TYPE_CLOSE) { 681 - new_send->timetosend += (HZ/10); 457 + new_send->timetosend += (HZ / 10); 682 458 if (cm_node->recv_entry) { 683 459 kfree(new_send); 684 460 WARN_ON(1); ··· 699 475 ret = nes_nic_cm_xmit(new_send->skb, cm_node->netdev); 700 476 if (ret != NETDEV_TX_OK) { 701 477 nes_debug(NES_DBG_CM, "Error sending packet %p " 702 - "(jiffies = %lu)\n", new_send, jiffies); 478 + "(jiffies = %lu)\n", new_send, jiffies); 703 479 new_send->timetosend = jiffies; 704 480 ret = NETDEV_TX_OK; 705 481 } else { ··· 728 504 struct iw_cm_id *cm_id = cm_node->cm_id; 729 505 enum nes_cm_node_state state = cm_node->state; 730 506 cm_node->state = NES_CM_STATE_CLOSED; 507 + 731 508 switch (state) { 732 509 case NES_CM_STATE_SYN_RCVD: 733 510 case NES_CM_STATE_CLOSING: ··· 761 536 spin_lock_irqsave(&nesqp->lock, qplockflags); 762 537 if (nesqp->cm_id) { 763 538 nes_debug(NES_DBG_CM, "QP%u: cm_id = %p, " 764 - "refcount = %d: HIT A " 765 - "NES_TIMER_TYPE_CLOSE with something " 766 - "to do!!!\n", nesqp->hwqp.qp_id, cm_id, 767 - atomic_read(&nesqp->refcount)); 539 + "refcount = %d: HIT A " 540 + "NES_TIMER_TYPE_CLOSE with something " 541 + "to do!!!\n", nesqp->hwqp.qp_id, cm_id, 542 + atomic_read(&nesqp->refcount)); 768 543 nesqp->hw_tcp_state = NES_AEQE_TCP_STATE_CLOSED; 769 544 nesqp->last_aeq = NES_AEQE_AEID_RESET_SENT; 770 545 nesqp->ibqp_state = IB_QPS_ERR; ··· 773 548 } else { 774 549 spin_unlock_irqrestore(&nesqp->lock, qplockflags); 775 550 nes_debug(NES_DBG_CM, "QP%u: cm_id = %p, " 776 - "refcount = %d: HIT A " 777 - "NES_TIMER_TYPE_CLOSE with nothing " 778 - "to do!!!\n", nesqp->hwqp.qp_id, cm_id, 779 - atomic_read(&nesqp->refcount)); 551 + "refcount = %d: HIT A " 552 + "NES_TIMER_TYPE_CLOSE with nothing " 553 + "to do!!!\n", nesqp->hwqp.qp_id, cm_id, 554 + atomic_read(&nesqp->refcount)); 780 555 } 781 556 } else if (rem_node) { 782 557 /* TIME_WAIT state */ ··· 805 580 int ret = NETDEV_TX_OK; 806 581 807 582 struct list_head timer_list; 583 + 808 584 INIT_LIST_HEAD(&timer_list); 809 585 spin_lock_irqsave(&cm_core->ht_lock, flags); 810 586 811 587 list_for_each_safe(list_node, list_core_temp, 812 - &cm_core->connected_nodes) { 588 + &cm_core->connected_nodes) { 813 589 cm_node = container_of(list_node, struct nes_cm_node, list); 814 590 if ((cm_node->recv_entry) || (cm_node->send_entry)) { 815 591 add_ref_cm_node(cm_node); ··· 821 595 822 596 list_for_each_safe(list_node, list_core_temp, &timer_list) { 823 597 cm_node = container_of(list_node, struct nes_cm_node, 824 - timer_entry); 598 + timer_entry); 825 599 recv_entry = cm_node->recv_entry; 826 600 827 601 if (recv_entry) { 828 602 if (time_after(recv_entry->timetosend, jiffies)) { 829 603 if (nexttimeout > recv_entry->timetosend || 830 - !settimer) { 604 + !settimer) { 831 605 nexttimeout = recv_entry->timetosend; 832 606 settimer = 1; 833 607 } 834 - } else 608 + } else { 835 609 handle_recv_entry(cm_node, 1); 610 + } 836 611 } 837 612 838 613 spin_lock_irqsave(&cm_node->retrans_list_lock, flags); ··· 844 617 if (time_after(send_entry->timetosend, jiffies)) { 845 618 if (cm_node->state != NES_CM_STATE_TSA) { 846 619 if ((nexttimeout > 847 - send_entry->timetosend) || 848 - !settimer) { 620 + send_entry->timetosend) || 621 + !settimer) { 849 622 nexttimeout = 850 623 send_entry->timetosend; 851 624 settimer = 1; ··· 857 630 } 858 631 859 632 if ((cm_node->state == NES_CM_STATE_TSA) || 860 - (cm_node->state == NES_CM_STATE_CLOSED)) { 633 + (cm_node->state == NES_CM_STATE_CLOSED)) { 861 634 free_retrans_entry(cm_node); 862 635 break; 863 636 } 864 637 865 638 if (!send_entry->retranscount || 866 - !send_entry->retrycount) { 639 + !send_entry->retrycount) { 867 640 cm_packets_dropped++; 868 641 free_retrans_entry(cm_node); 869 642 ··· 872 645 nes_retrans_expired(cm_node); 873 646 cm_node->state = NES_CM_STATE_CLOSED; 874 647 spin_lock_irqsave(&cm_node->retrans_list_lock, 875 - flags); 648 + flags); 876 649 break; 877 650 } 878 651 atomic_inc(&send_entry->skb->users); 879 652 cm_packets_retrans++; 880 653 nes_debug(NES_DBG_CM, "Retransmitting send_entry %p " 881 - "for node %p, jiffies = %lu, time to send = " 882 - "%lu, retranscount = %u, send_entry->seq_num = " 883 - "0x%08X, cm_node->tcp_cntxt.rem_ack_num = " 884 - "0x%08X\n", send_entry, cm_node, jiffies, 885 - send_entry->timetosend, 886 - send_entry->retranscount, 887 - send_entry->seq_num, 888 - cm_node->tcp_cntxt.rem_ack_num); 654 + "for node %p, jiffies = %lu, time to send = " 655 + "%lu, retranscount = %u, send_entry->seq_num = " 656 + "0x%08X, cm_node->tcp_cntxt.rem_ack_num = " 657 + "0x%08X\n", send_entry, cm_node, jiffies, 658 + send_entry->timetosend, 659 + send_entry->retranscount, 660 + send_entry->seq_num, 661 + cm_node->tcp_cntxt.rem_ack_num); 889 662 890 663 spin_unlock_irqrestore(&cm_node->retrans_list_lock, 891 - flags); 664 + flags); 892 665 ret = nes_nic_cm_xmit(send_entry->skb, cm_node->netdev); 893 666 spin_lock_irqsave(&cm_node->retrans_list_lock, flags); 894 667 if (ret != NETDEV_TX_OK) { 895 668 nes_debug(NES_DBG_CM, "rexmit failed for " 896 - "node=%p\n", cm_node); 669 + "node=%p\n", cm_node); 897 670 cm_packets_bounced++; 898 671 send_entry->retrycount--; 899 672 nexttimeout = jiffies + NES_SHORT_TIME; ··· 903 676 cm_packets_sent++; 904 677 } 905 678 nes_debug(NES_DBG_CM, "Packet Sent: retrans count = " 906 - "%u, retry count = %u.\n", 907 - send_entry->retranscount, 908 - send_entry->retrycount); 679 + "%u, retry count = %u.\n", 680 + send_entry->retranscount, 681 + send_entry->retrycount); 909 682 if (send_entry->send_retrans) { 910 683 send_entry->retranscount--; 911 684 timetosend = (NES_RETRY_TIMEOUT << 912 - (NES_DEFAULT_RETRANS - send_entry->retranscount)); 685 + (NES_DEFAULT_RETRANS - send_entry->retranscount)); 913 686 914 687 send_entry->timetosend = jiffies + 915 - min(timetosend, NES_MAX_TIMEOUT); 688 + min(timetosend, NES_MAX_TIMEOUT); 916 689 if (nexttimeout > send_entry->timetosend || 917 - !settimer) { 690 + !settimer) { 918 691 nexttimeout = send_entry->timetosend; 919 692 settimer = 1; 920 693 } ··· 923 696 close_when_complete = 924 697 send_entry->close_when_complete; 925 698 nes_debug(NES_DBG_CM, "cm_node=%p state=%d\n", 926 - cm_node, cm_node->state); 699 + cm_node, cm_node->state); 927 700 free_retrans_entry(cm_node); 928 701 if (close_when_complete) 929 702 rem_ref_cm_node(cm_node->cm_core, 930 - cm_node); 703 + cm_node); 931 704 } 932 705 } while (0); 933 706 ··· 937 710 938 711 if (settimer) { 939 712 if (!timer_pending(&cm_core->tcp_timer)) { 940 - cm_core->tcp_timer.expires = nexttimeout; 713 + cm_core->tcp_timer.expires = nexttimeout; 941 714 add_timer(&cm_core->tcp_timer); 942 715 } 943 716 } ··· 948 721 * send_syn 949 722 */ 950 723 static int send_syn(struct nes_cm_node *cm_node, u32 sendack, 951 - struct sk_buff *skb) 724 + struct sk_buff *skb) 952 725 { 953 726 int ret; 954 727 int flags = SET_SYN; 955 728 char optionsbuffer[sizeof(struct option_mss) + 956 - sizeof(struct option_windowscale) + sizeof(struct option_base) + 957 - TCP_OPTIONS_PADDING]; 729 + sizeof(struct option_windowscale) + sizeof(struct option_base) + 730 + TCP_OPTIONS_PADDING]; 958 731 959 732 int optionssize = 0; 960 733 /* Sending MSS option */ ··· 1081 854 * find_node - find a cm node that matches the reference cm node 1082 855 */ 1083 856 static struct nes_cm_node *find_node(struct nes_cm_core *cm_core, 1084 - u16 rem_port, nes_addr_t rem_addr, u16 loc_port, nes_addr_t loc_addr) 857 + u16 rem_port, nes_addr_t rem_addr, u16 loc_port, nes_addr_t loc_addr) 1085 858 { 1086 859 unsigned long flags; 1087 860 struct list_head *hte; ··· 1095 868 list_for_each_entry(cm_node, hte, list) { 1096 869 /* compare quad, return node handle if a match */ 1097 870 nes_debug(NES_DBG_CM, "finding node %x:%x =? %x:%x ^ %x:%x =? %x:%x\n", 1098 - cm_node->loc_addr, cm_node->loc_port, 1099 - loc_addr, loc_port, 1100 - cm_node->rem_addr, cm_node->rem_port, 1101 - rem_addr, rem_port); 871 + cm_node->loc_addr, cm_node->loc_port, 872 + loc_addr, loc_port, 873 + cm_node->rem_addr, cm_node->rem_port, 874 + rem_addr, rem_port); 1102 875 if ((cm_node->loc_addr == loc_addr) && (cm_node->loc_port == loc_port) && 1103 - (cm_node->rem_addr == rem_addr) && (cm_node->rem_port == rem_port)) { 876 + (cm_node->rem_addr == rem_addr) && (cm_node->rem_port == rem_port)) { 1104 877 add_ref_cm_node(cm_node); 1105 878 spin_unlock_irqrestore(&cm_core->ht_lock, flags); 1106 879 return cm_node; ··· 1117 890 * find_listener - find a cm node listening on this addr-port pair 1118 891 */ 1119 892 static struct nes_cm_listener *find_listener(struct nes_cm_core *cm_core, 1120 - nes_addr_t dst_addr, u16 dst_port, enum nes_cm_listener_state listener_state) 893 + nes_addr_t dst_addr, u16 dst_port, enum nes_cm_listener_state listener_state) 1121 894 { 1122 895 unsigned long flags; 1123 896 struct nes_cm_listener *listen_node; ··· 1127 900 list_for_each_entry(listen_node, &cm_core->listen_list.list, list) { 1128 901 /* compare node pair, return node handle if a match */ 1129 902 if (((listen_node->loc_addr == dst_addr) || 1130 - listen_node->loc_addr == 0x00000000) && 1131 - (listen_node->loc_port == dst_port) && 1132 - (listener_state & listen_node->listener_state)) { 903 + listen_node->loc_addr == 0x00000000) && 904 + (listen_node->loc_port == dst_port) && 905 + (listener_state & listen_node->listener_state)) { 1133 906 atomic_inc(&listen_node->ref_count); 1134 907 spin_unlock_irqrestore(&cm_core->listen_list_lock, flags); 1135 908 return listen_node; ··· 1154 927 return -EINVAL; 1155 928 1156 929 nes_debug(NES_DBG_CM, "Adding Node %p to Active Connection HT\n", 1157 - cm_node); 930 + cm_node); 1158 931 1159 932 spin_lock_irqsave(&cm_core->ht_lock, flags); 1160 933 ··· 1173 946 * mini_cm_dec_refcnt_listen 1174 947 */ 1175 948 static int mini_cm_dec_refcnt_listen(struct nes_cm_core *cm_core, 1176 - struct nes_cm_listener *listener, int free_hanging_nodes) 949 + struct nes_cm_listener *listener, int free_hanging_nodes) 1177 950 { 1178 951 int ret = -EINVAL; 1179 952 int err = 0; ··· 1184 957 struct list_head reset_list; 1185 958 1186 959 nes_debug(NES_DBG_CM, "attempting listener= %p free_nodes= %d, " 1187 - "refcnt=%d\n", listener, free_hanging_nodes, 1188 - atomic_read(&listener->ref_count)); 960 + "refcnt=%d\n", listener, free_hanging_nodes, 961 + atomic_read(&listener->ref_count)); 1189 962 /* free non-accelerated child nodes for this listener */ 1190 963 INIT_LIST_HEAD(&reset_list); 1191 964 if (free_hanging_nodes) { ··· 1193 966 list_for_each_safe(list_pos, list_temp, 1194 967 &g_cm_core->connected_nodes) { 1195 968 cm_node = container_of(list_pos, struct nes_cm_node, 1196 - list); 969 + list); 1197 970 if ((cm_node->listener == listener) && 1198 971 (!cm_node->accelerated)) { 1199 972 add_ref_cm_node(cm_node); ··· 1205 978 1206 979 list_for_each_safe(list_pos, list_temp, &reset_list) { 1207 980 cm_node = container_of(list_pos, struct nes_cm_node, 1208 - reset_entry); 981 + reset_entry); 1209 982 { 1210 983 struct nes_cm_node *loopback = cm_node->loopbackpartner; 1211 984 enum nes_cm_node_state old_state; ··· 1217 990 err = send_reset(cm_node, NULL); 1218 991 if (err) { 1219 992 cm_node->state = 1220 - NES_CM_STATE_CLOSED; 993 + NES_CM_STATE_CLOSED; 1221 994 WARN_ON(1); 1222 995 } else { 1223 996 old_state = cm_node->state; ··· 1262 1035 1263 1036 spin_unlock_irqrestore(&cm_core->listen_list_lock, flags); 1264 1037 1265 - if (listener->nesvnic) { 1038 + if (listener->nesvnic) 1266 1039 nes_manage_apbvt(listener->nesvnic, listener->loc_port, 1267 - PCI_FUNC(listener->nesvnic->nesdev->pcidev->devfn), NES_MANAGE_APBVT_DEL); 1268 - } 1040 + PCI_FUNC(listener->nesvnic->nesdev->pcidev->devfn), NES_MANAGE_APBVT_DEL); 1269 1041 1270 1042 nes_debug(NES_DBG_CM, "destroying listener (%p)\n", listener); 1271 1043 ··· 1278 1052 if (listener) { 1279 1053 if (atomic_read(&listener->pend_accepts_cnt) > 0) 1280 1054 nes_debug(NES_DBG_CM, "destroying listener (%p)" 1281 - " with non-zero pending accepts=%u\n", 1282 - listener, atomic_read(&listener->pend_accepts_cnt)); 1055 + " with non-zero pending accepts=%u\n", 1056 + listener, atomic_read(&listener->pend_accepts_cnt)); 1283 1057 } 1284 1058 1285 1059 return ret; ··· 1290 1064 * mini_cm_del_listen 1291 1065 */ 1292 1066 static int mini_cm_del_listen(struct nes_cm_core *cm_core, 1293 - struct nes_cm_listener *listener) 1067 + struct nes_cm_listener *listener) 1294 1068 { 1295 1069 listener->listener_state = NES_CM_LISTENER_PASSIVE_STATE; 1296 1070 listener->cm_id = NULL; /* going to be destroyed pretty soon */ ··· 1302 1076 * mini_cm_accelerated 1303 1077 */ 1304 1078 static inline int mini_cm_accelerated(struct nes_cm_core *cm_core, 1305 - struct nes_cm_node *cm_node) 1079 + struct nes_cm_node *cm_node) 1306 1080 { 1307 1081 u32 was_timer_set; 1082 + 1308 1083 cm_node->accelerated = 1; 1309 1084 1310 1085 if (cm_node->accept_pend) { ··· 1339 1112 rt = ip_route_output(&init_net, htonl(dst_ip), 0, 0, 0); 1340 1113 if (IS_ERR(rt)) { 1341 1114 printk(KERN_ERR "%s: ip_route_output_key failed for 0x%08X\n", 1342 - __func__, dst_ip); 1115 + __func__, dst_ip); 1343 1116 return rc; 1344 1117 } 1345 1118 ··· 1357 1130 1358 1131 if (arpindex >= 0) { 1359 1132 if (!memcmp(nesadapter->arp_table[arpindex].mac_addr, 1360 - neigh->ha, ETH_ALEN)){ 1133 + neigh->ha, ETH_ALEN)) { 1361 1134 /* Mac address same as in nes_arp_table */ 1362 1135 neigh_release(neigh); 1363 1136 ip_rt_put(rt); ··· 1365 1138 } 1366 1139 1367 1140 nes_manage_arp_cache(nesvnic->netdev, 1368 - nesadapter->arp_table[arpindex].mac_addr, 1369 - dst_ip, NES_ARP_DELETE); 1141 + nesadapter->arp_table[arpindex].mac_addr, 1142 + dst_ip, NES_ARP_DELETE); 1370 1143 } 1371 1144 1372 1145 nes_manage_arp_cache(nesvnic->netdev, neigh->ha, ··· 1388 1161 * make_cm_node - create a new instance of a cm node 1389 1162 */ 1390 1163 static struct nes_cm_node *make_cm_node(struct nes_cm_core *cm_core, 1391 - struct nes_vnic *nesvnic, struct nes_cm_info *cm_info, 1392 - struct nes_cm_listener *listener) 1164 + struct nes_vnic *nesvnic, struct nes_cm_info *cm_info, 1165 + struct nes_cm_listener *listener) 1393 1166 { 1394 1167 struct nes_cm_node *cm_node; 1395 1168 struct timespec ts; ··· 1408 1181 cm_node->rem_addr = cm_info->rem_addr; 1409 1182 cm_node->loc_port = cm_info->loc_port; 1410 1183 cm_node->rem_port = cm_info->rem_port; 1411 - cm_node->send_write0 = send_first; 1184 + 1185 + cm_node->mpa_frame_rev = mpa_version; 1186 + cm_node->send_rdma0_op = SEND_RDMA_READ_ZERO; 1187 + cm_node->ird_size = IETF_NO_IRD_ORD; 1188 + cm_node->ord_size = IETF_NO_IRD_ORD; 1189 + 1412 1190 nes_debug(NES_DBG_CM, "Make node addresses : loc = %pI4:%x, rem = %pI4:%x\n", 1413 1191 &cm_node->loc_addr, cm_node->loc_port, 1414 1192 &cm_node->rem_addr, cm_node->rem_port); ··· 1423 1191 memcpy(cm_node->loc_mac, nesvnic->netdev->dev_addr, ETH_ALEN); 1424 1192 1425 1193 nes_debug(NES_DBG_CM, "listener=%p, cm_id=%p\n", cm_node->listener, 1426 - cm_node->cm_id); 1194 + cm_node->cm_id); 1427 1195 1428 1196 spin_lock_init(&cm_node->retrans_list_lock); 1429 1197 ··· 1434 1202 cm_node->tcp_cntxt.loc_id = NES_CM_DEF_LOCAL_ID; 1435 1203 cm_node->tcp_cntxt.rcv_wscale = NES_CM_DEFAULT_RCV_WND_SCALE; 1436 1204 cm_node->tcp_cntxt.rcv_wnd = NES_CM_DEFAULT_RCV_WND_SCALED >> 1437 - NES_CM_DEFAULT_RCV_WND_SCALE; 1205 + NES_CM_DEFAULT_RCV_WND_SCALE; 1438 1206 ts = current_kernel_time(); 1439 1207 cm_node->tcp_cntxt.loc_seq_num = htonl(ts.tv_nsec); 1440 1208 cm_node->tcp_cntxt.mss = nesvnic->max_frame_size - sizeof(struct iphdr) - 1441 - sizeof(struct tcphdr) - ETH_HLEN - VLAN_HLEN; 1209 + sizeof(struct tcphdr) - ETH_HLEN - VLAN_HLEN; 1442 1210 cm_node->tcp_cntxt.rcv_nxt = 0; 1443 1211 /* get a unique session ID , add thread_id to an upcounter to handle race */ 1444 1212 atomic_inc(&cm_core->node_cnt); ··· 1454 1222 cm_node->loopbackpartner = NULL; 1455 1223 1456 1224 /* get the mac addr for the remote node */ 1457 - if (ipv4_is_loopback(htonl(cm_node->rem_addr))) 1225 + if (ipv4_is_loopback(htonl(cm_node->rem_addr))) { 1458 1226 arpindex = nes_arp_table(nesdev, ntohl(nesvnic->local_ipaddr), NULL, NES_ARP_RESOLVE); 1459 - else { 1227 + } else { 1460 1228 oldarpindex = nes_arp_table(nesdev, cm_node->rem_addr, NULL, NES_ARP_RESOLVE); 1461 1229 arpindex = nes_addr_resolve_neigh(nesvnic, cm_info->rem_addr, oldarpindex); 1462 - 1463 1230 } 1464 1231 if (arpindex < 0) { 1465 1232 kfree(cm_node); ··· 1491 1260 * rem_ref_cm_node - destroy an instance of a cm node 1492 1261 */ 1493 1262 static int rem_ref_cm_node(struct nes_cm_core *cm_core, 1494 - struct nes_cm_node *cm_node) 1263 + struct nes_cm_node *cm_node) 1495 1264 { 1496 1265 unsigned long flags; 1497 1266 struct nes_qp *nesqp; ··· 1522 1291 } else { 1523 1292 if (cm_node->apbvt_set && cm_node->nesvnic) { 1524 1293 nes_manage_apbvt(cm_node->nesvnic, cm_node->loc_port, 1525 - PCI_FUNC( 1526 - cm_node->nesvnic->nesdev->pcidev->devfn), 1527 - NES_MANAGE_APBVT_DEL); 1294 + PCI_FUNC( 1295 + cm_node->nesvnic->nesdev->pcidev->devfn), 1296 + NES_MANAGE_APBVT_DEL); 1528 1297 } 1529 1298 } 1530 1299 ··· 1545 1314 * process_options 1546 1315 */ 1547 1316 static int process_options(struct nes_cm_node *cm_node, u8 *optionsloc, 1548 - u32 optionsize, u32 syn_packet) 1317 + u32 optionsize, u32 syn_packet) 1549 1318 { 1550 1319 u32 tmp; 1551 1320 u32 offset = 0; ··· 1563 1332 continue; 1564 1333 case OPTION_NUMBER_MSS: 1565 1334 nes_debug(NES_DBG_CM, "%s: MSS Length: %d Offset: %d " 1566 - "Size: %d\n", __func__, 1567 - all_options->as_mss.length, offset, optionsize); 1335 + "Size: %d\n", __func__, 1336 + all_options->as_mss.length, offset, optionsize); 1568 1337 got_mss_option = 1; 1569 1338 if (all_options->as_mss.length != 4) { 1570 1339 return 1; 1571 1340 } else { 1572 1341 tmp = ntohs(all_options->as_mss.mss); 1573 1342 if (tmp > 0 && tmp < 1574 - cm_node->tcp_cntxt.mss) 1343 + cm_node->tcp_cntxt.mss) 1575 1344 cm_node->tcp_cntxt.mss = tmp; 1576 1345 } 1577 1346 break; ··· 1579 1348 cm_node->tcp_cntxt.snd_wscale = 1580 1349 all_options->as_windowscale.shiftcount; 1581 1350 break; 1582 - case OPTION_NUMBER_WRITE0: 1583 - cm_node->send_write0 = 1; 1584 - break; 1585 1351 default: 1586 1352 nes_debug(NES_DBG_CM, "TCP Option not understood: %x\n", 1587 - all_options->as_base.optionnum); 1353 + all_options->as_base.optionnum); 1588 1354 break; 1589 1355 } 1590 1356 offset += all_options->as_base.length; ··· 1600 1372 static void handle_fin_pkt(struct nes_cm_node *cm_node) 1601 1373 { 1602 1374 nes_debug(NES_DBG_CM, "Received FIN, cm_node = %p, state = %u. " 1603 - "refcnt=%d\n", cm_node, cm_node->state, 1604 - atomic_read(&cm_node->ref_count)); 1375 + "refcnt=%d\n", cm_node, cm_node->state, 1376 + atomic_read(&cm_node->ref_count)); 1605 1377 switch (cm_node->state) { 1606 1378 case NES_CM_STATE_SYN_RCVD: 1607 1379 case NES_CM_STATE_SYN_SENT: ··· 1667 1439 nes_debug(NES_DBG_CM, "%s[%u] create abort for cm_node=%p " 1668 1440 "listener=%p state=%d\n", __func__, __LINE__, cm_node, 1669 1441 cm_node->listener, cm_node->state); 1670 - active_open_err(cm_node, skb, reset); 1442 + switch (cm_node->mpa_frame_rev) { 1443 + case IETF_MPA_V2: 1444 + cm_node->mpa_frame_rev = IETF_MPA_V1; 1445 + /* send a syn and goto syn sent state */ 1446 + cm_node->state = NES_CM_STATE_SYN_SENT; 1447 + if (send_syn(cm_node, 0, NULL)) { 1448 + active_open_err(cm_node, skb, reset); 1449 + } 1450 + break; 1451 + case IETF_MPA_V1: 1452 + default: 1453 + active_open_err(cm_node, skb, reset); 1454 + break; 1455 + } 1671 1456 break; 1672 1457 case NES_CM_STATE_MPAREQ_RCVD: 1673 1458 atomic_inc(&cm_node->passive_state); ··· 1716 1475 1717 1476 static void handle_rcv_mpa(struct nes_cm_node *cm_node, struct sk_buff *skb) 1718 1477 { 1719 - 1720 - int ret = 0; 1478 + int ret = 0; 1721 1479 int datasize = skb->len; 1722 1480 u8 *dataloc = skb->data; 1723 1481 1724 1482 enum nes_cm_event_type type = NES_CM_EVENT_UNKNOWN; 1725 - u32 res_type; 1483 + u32 res_type; 1484 + 1726 1485 ret = parse_mpa(cm_node, dataloc, &res_type, datasize); 1727 1486 if (ret) { 1728 1487 nes_debug(NES_DBG_CM, "didn't like MPA Request\n"); 1729 1488 if (cm_node->state == NES_CM_STATE_MPAREQ_SENT) { 1730 1489 nes_debug(NES_DBG_CM, "%s[%u] create abort for " 1731 - "cm_node=%p listener=%p state=%d\n", __func__, 1732 - __LINE__, cm_node, cm_node->listener, 1733 - cm_node->state); 1490 + "cm_node=%p listener=%p state=%d\n", __func__, 1491 + __LINE__, cm_node, cm_node->listener, 1492 + cm_node->state); 1734 1493 active_open_err(cm_node, skb, 1); 1735 1494 } else { 1736 1495 passive_open_err(cm_node, skb, 1); ··· 1740 1499 1741 1500 switch (cm_node->state) { 1742 1501 case NES_CM_STATE_ESTABLISHED: 1743 - if (res_type == NES_MPA_REQUEST_REJECT) { 1502 + if (res_type == NES_MPA_REQUEST_REJECT) 1744 1503 /*BIG problem as we are receiving the MPA.. So should 1745 - * not be REJECT.. This is Passive Open.. We can 1746 - * only receive it Reject for Active Open...*/ 1504 + * not be REJECT.. This is Passive Open.. We can 1505 + * only receive it Reject for Active Open...*/ 1747 1506 WARN_ON(1); 1748 - } 1749 1507 cm_node->state = NES_CM_STATE_MPAREQ_RCVD; 1750 1508 type = NES_CM_EVENT_MPA_REQ; 1751 1509 atomic_set(&cm_node->passive_state, 1752 - NES_PASSIVE_STATE_INDICATED); 1510 + NES_PASSIVE_STATE_INDICATED); 1753 1511 break; 1754 1512 case NES_CM_STATE_MPAREQ_SENT: 1755 1513 cleanup_retrans_entry(cm_node); ··· 1775 1535 case NES_CM_STATE_SYN_SENT: 1776 1536 case NES_CM_STATE_MPAREQ_SENT: 1777 1537 nes_debug(NES_DBG_CM, "%s[%u] create abort for cm_node=%p " 1778 - "listener=%p state=%d\n", __func__, __LINE__, cm_node, 1779 - cm_node->listener, cm_node->state); 1538 + "listener=%p state=%d\n", __func__, __LINE__, cm_node, 1539 + cm_node->listener, cm_node->state); 1780 1540 active_open_err(cm_node, skb, 1); 1781 1541 break; 1782 1542 case NES_CM_STATE_ESTABLISHED: ··· 1790 1550 } 1791 1551 1792 1552 static int check_syn(struct nes_cm_node *cm_node, struct tcphdr *tcph, 1793 - struct sk_buff *skb) 1553 + struct sk_buff *skb) 1794 1554 { 1795 1555 int err; 1796 1556 1797 - err = ((ntohl(tcph->ack_seq) == cm_node->tcp_cntxt.loc_seq_num))? 0 : 1; 1557 + err = ((ntohl(tcph->ack_seq) == cm_node->tcp_cntxt.loc_seq_num)) ? 0 : 1; 1798 1558 if (err) 1799 1559 active_open_err(cm_node, skb, 1); 1800 1560 ··· 1802 1562 } 1803 1563 1804 1564 static int check_seq(struct nes_cm_node *cm_node, struct tcphdr *tcph, 1805 - struct sk_buff *skb) 1565 + struct sk_buff *skb) 1806 1566 { 1807 1567 int err = 0; 1808 1568 u32 seq; ··· 1810 1570 u32 loc_seq_num = cm_node->tcp_cntxt.loc_seq_num; 1811 1571 u32 rcv_nxt = cm_node->tcp_cntxt.rcv_nxt; 1812 1572 u32 rcv_wnd; 1573 + 1813 1574 seq = ntohl(tcph->seq); 1814 1575 ack_seq = ntohl(tcph->ack_seq); 1815 1576 rcv_wnd = cm_node->tcp_cntxt.rcv_wnd; 1816 1577 if (ack_seq != loc_seq_num) 1817 1578 err = 1; 1818 - else if (!between(seq, rcv_nxt, (rcv_nxt+rcv_wnd))) 1579 + else if (!between(seq, rcv_nxt, (rcv_nxt + rcv_wnd))) 1819 1580 err = 1; 1820 1581 if (err) { 1821 1582 nes_debug(NES_DBG_CM, "%s[%u] create abort for cm_node=%p " 1822 - "listener=%p state=%d\n", __func__, __LINE__, cm_node, 1823 - cm_node->listener, cm_node->state); 1583 + "listener=%p state=%d\n", __func__, __LINE__, cm_node, 1584 + cm_node->listener, cm_node->state); 1824 1585 indicate_pkt_err(cm_node, skb); 1825 1586 nes_debug(NES_DBG_CM, "seq ERROR cm_node =%p seq=0x%08X " 1826 - "rcv_nxt=0x%08X rcv_wnd=0x%x\n", cm_node, seq, rcv_nxt, 1827 - rcv_wnd); 1587 + "rcv_nxt=0x%08X rcv_wnd=0x%x\n", cm_node, seq, rcv_nxt, 1588 + rcv_wnd); 1828 1589 } 1829 1590 return err; 1830 1591 } ··· 1835 1594 * is created with a listener or it may comein as rexmitted packet which in 1836 1595 * that case will be just dropped. 1837 1596 */ 1838 - 1839 1597 static void handle_syn_pkt(struct nes_cm_node *cm_node, struct sk_buff *skb, 1840 - struct tcphdr *tcph) 1598 + struct tcphdr *tcph) 1841 1599 { 1842 1600 int ret; 1843 1601 u32 inc_sequence; ··· 1855 1615 case NES_CM_STATE_LISTENING: 1856 1616 /* Passive OPEN */ 1857 1617 if (atomic_read(&cm_node->listener->pend_accepts_cnt) > 1858 - cm_node->listener->backlog) { 1618 + cm_node->listener->backlog) { 1859 1619 nes_debug(NES_DBG_CM, "drop syn due to backlog " 1860 - "pressure \n"); 1620 + "pressure \n"); 1861 1621 cm_backlog_drops++; 1862 1622 passive_open_err(cm_node, skb, 0); 1863 1623 break; 1864 1624 } 1865 1625 ret = handle_tcp_options(cm_node, tcph, skb, optionsize, 1866 - 1); 1626 + 1); 1867 1627 if (ret) { 1868 1628 passive_open_err(cm_node, skb, 0); 1869 1629 /* drop pkt */ ··· 1897 1657 } 1898 1658 1899 1659 static void handle_synack_pkt(struct nes_cm_node *cm_node, struct sk_buff *skb, 1900 - struct tcphdr *tcph) 1660 + struct tcphdr *tcph) 1901 1661 { 1902 - 1903 1662 int ret; 1904 1663 u32 inc_sequence; 1905 1664 int optionsize; ··· 1917 1678 ret = handle_tcp_options(cm_node, tcph, skb, optionsize, 0); 1918 1679 if (ret) { 1919 1680 nes_debug(NES_DBG_CM, "cm_node=%p tcp_options failed\n", 1920 - cm_node); 1681 + cm_node); 1921 1682 break; 1922 1683 } 1923 1684 cleanup_retrans_entry(cm_node); ··· 1956 1717 } 1957 1718 1958 1719 static int handle_ack_pkt(struct nes_cm_node *cm_node, struct sk_buff *skb, 1959 - struct tcphdr *tcph) 1720 + struct tcphdr *tcph) 1960 1721 { 1961 1722 int datasize = 0; 1962 1723 u32 inc_sequence; 1963 1724 int ret = 0; 1964 1725 int optionsize; 1726 + 1965 1727 optionsize = (tcph->doff << 2) - sizeof(struct tcphdr); 1966 1728 1967 1729 if (check_seq(cm_node, tcph, skb)) ··· 1983 1743 if (datasize) { 1984 1744 cm_node->tcp_cntxt.rcv_nxt = inc_sequence + datasize; 1985 1745 handle_rcv_mpa(cm_node, skb); 1986 - } else /* rcvd ACK only */ 1746 + } else { /* rcvd ACK only */ 1987 1747 dev_kfree_skb_any(skb); 1748 + } 1988 1749 break; 1989 1750 case NES_CM_STATE_ESTABLISHED: 1990 1751 /* Passive OPEN */ ··· 1993 1752 if (datasize) { 1994 1753 cm_node->tcp_cntxt.rcv_nxt = inc_sequence + datasize; 1995 1754 handle_rcv_mpa(cm_node, skb); 1996 - } else 1755 + } else { 1997 1756 drop_packet(skb); 1757 + } 1998 1758 break; 1999 1759 case NES_CM_STATE_MPAREQ_SENT: 2000 1760 cm_node->tcp_cntxt.rem_ack_num = ntohl(tcph->ack_seq); 2001 1761 if (datasize) { 2002 1762 cm_node->tcp_cntxt.rcv_nxt = inc_sequence + datasize; 2003 1763 handle_rcv_mpa(cm_node, skb); 2004 - } else /* Could be just an ack pkt.. */ 1764 + } else { /* Could be just an ack pkt.. */ 2005 1765 dev_kfree_skb_any(skb); 1766 + } 2006 1767 break; 2007 1768 case NES_CM_STATE_LISTENING: 2008 1769 cleanup_retrans_entry(cm_node); ··· 2045 1802 2046 1803 2047 1804 static int handle_tcp_options(struct nes_cm_node *cm_node, struct tcphdr *tcph, 2048 - struct sk_buff *skb, int optionsize, int passive) 1805 + struct sk_buff *skb, int optionsize, int passive) 2049 1806 { 2050 1807 u8 *optionsloc = (u8 *)&tcph[1]; 1808 + 2051 1809 if (optionsize) { 2052 1810 if (process_options(cm_node, optionsloc, optionsize, 2053 - (u32)tcph->syn)) { 1811 + (u32)tcph->syn)) { 2054 1812 nes_debug(NES_DBG_CM, "%s: Node %p, Sending RESET\n", 2055 - __func__, cm_node); 1813 + __func__, cm_node); 2056 1814 if (passive) 2057 1815 passive_open_err(cm_node, skb, 1); 2058 1816 else ··· 2063 1819 } 2064 1820 2065 1821 cm_node->tcp_cntxt.snd_wnd = ntohs(tcph->window) << 2066 - cm_node->tcp_cntxt.snd_wscale; 1822 + cm_node->tcp_cntxt.snd_wscale; 2067 1823 2068 1824 if (cm_node->tcp_cntxt.snd_wnd > cm_node->tcp_cntxt.max_snd_wnd) 2069 1825 cm_node->tcp_cntxt.max_snd_wnd = cm_node->tcp_cntxt.snd_wnd; ··· 2074 1830 * active_open_err() will send reset() if flag set.. 2075 1831 * It will also send ABORT event. 2076 1832 */ 2077 - 2078 1833 static void active_open_err(struct nes_cm_node *cm_node, struct sk_buff *skb, 2079 - int reset) 1834 + int reset) 2080 1835 { 2081 1836 cleanup_retrans_entry(cm_node); 2082 1837 if (reset) { 2083 1838 nes_debug(NES_DBG_CM, "ERROR active err called for cm_node=%p, " 2084 - "state=%d\n", cm_node, cm_node->state); 1839 + "state=%d\n", cm_node, cm_node->state); 2085 1840 add_ref_cm_node(cm_node); 2086 1841 send_reset(cm_node, skb); 2087 - } else 1842 + } else { 2088 1843 dev_kfree_skb_any(skb); 1844 + } 2089 1845 2090 1846 cm_node->state = NES_CM_STATE_CLOSED; 2091 1847 create_event(cm_node, NES_CM_EVENT_ABORTED); ··· 2095 1851 * passive_open_err() will either do a reset() or will free up the skb and 2096 1852 * remove the cm_node. 2097 1853 */ 2098 - 2099 1854 static void passive_open_err(struct nes_cm_node *cm_node, struct sk_buff *skb, 2100 - int reset) 1855 + int reset) 2101 1856 { 2102 1857 cleanup_retrans_entry(cm_node); 2103 1858 cm_node->state = NES_CM_STATE_CLOSED; 2104 1859 if (reset) { 2105 1860 nes_debug(NES_DBG_CM, "passive_open_err sending RST for " 2106 - "cm_node=%p state =%d\n", cm_node, cm_node->state); 1861 + "cm_node=%p state =%d\n", cm_node, cm_node->state); 2107 1862 send_reset(cm_node, skb); 2108 1863 } else { 2109 1864 dev_kfree_skb_any(skb); ··· 2117 1874 static void free_retrans_entry(struct nes_cm_node *cm_node) 2118 1875 { 2119 1876 struct nes_timer_entry *send_entry; 1877 + 2120 1878 send_entry = cm_node->send_entry; 2121 1879 if (send_entry) { 2122 1880 cm_node->send_entry = NULL; ··· 2141 1897 * Returns skb if to be freed, else it will return NULL if already used.. 2142 1898 */ 2143 1899 static void process_packet(struct nes_cm_node *cm_node, struct sk_buff *skb, 2144 - struct nes_cm_core *cm_core) 1900 + struct nes_cm_core *cm_core) 2145 1901 { 2146 - enum nes_tcpip_pkt_type pkt_type = NES_PKT_TYPE_UNKNOWN; 1902 + enum nes_tcpip_pkt_type pkt_type = NES_PKT_TYPE_UNKNOWN; 2147 1903 struct tcphdr *tcph = tcp_hdr(skb); 2148 - u32 fin_set = 0; 1904 + u32 fin_set = 0; 2149 1905 int ret = 0; 1906 + 2150 1907 skb_pull(skb, ip_hdr(skb)->ihl << 2); 2151 1908 2152 1909 nes_debug(NES_DBG_CM, "process_packet: cm_node=%p state =%d syn=%d " 2153 - "ack=%d rst=%d fin=%d\n", cm_node, cm_node->state, tcph->syn, 2154 - tcph->ack, tcph->rst, tcph->fin); 1910 + "ack=%d rst=%d fin=%d\n", cm_node, cm_node->state, tcph->syn, 1911 + tcph->ack, tcph->rst, tcph->fin); 2155 1912 2156 - if (tcph->rst) 1913 + if (tcph->rst) { 2157 1914 pkt_type = NES_PKT_TYPE_RST; 2158 - else if (tcph->syn) { 1915 + } else if (tcph->syn) { 2159 1916 pkt_type = NES_PKT_TYPE_SYN; 2160 1917 if (tcph->ack) 2161 1918 pkt_type = NES_PKT_TYPE_SYNACK; 2162 - } else if (tcph->ack) 1919 + } else if (tcph->ack) { 2163 1920 pkt_type = NES_PKT_TYPE_ACK; 1921 + } 2164 1922 if (tcph->fin) 2165 1923 fin_set = 1; 2166 1924 ··· 2193 1947 * mini_cm_listen - create a listen node with params 2194 1948 */ 2195 1949 static struct nes_cm_listener *mini_cm_listen(struct nes_cm_core *cm_core, 2196 - struct nes_vnic *nesvnic, struct nes_cm_info *cm_info) 1950 + struct nes_vnic *nesvnic, struct nes_cm_info *cm_info) 2197 1951 { 2198 1952 struct nes_cm_listener *listener; 2199 1953 unsigned long flags; 2200 1954 2201 1955 nes_debug(NES_DBG_CM, "Search for 0x%08x : 0x%04x\n", 2202 - cm_info->loc_addr, cm_info->loc_port); 1956 + cm_info->loc_addr, cm_info->loc_port); 2203 1957 2204 1958 /* cannot have multiple matching listeners */ 2205 1959 listener = find_listener(cm_core, htonl(cm_info->loc_addr), 2206 - htons(cm_info->loc_port), NES_CM_LISTENER_EITHER_STATE); 1960 + htons(cm_info->loc_port), NES_CM_LISTENER_EITHER_STATE); 2207 1961 if (listener && listener->listener_state == NES_CM_LISTENER_ACTIVE_STATE) { 2208 1962 /* find automatically incs ref count ??? */ 2209 1963 atomic_dec(&listener->ref_count); ··· 2249 2003 } 2250 2004 2251 2005 nes_debug(NES_DBG_CM, "Api - listen(): addr=0x%08X, port=0x%04x," 2252 - " listener = %p, backlog = %d, cm_id = %p.\n", 2253 - cm_info->loc_addr, cm_info->loc_port, 2254 - listener, listener->backlog, listener->cm_id); 2006 + " listener = %p, backlog = %d, cm_id = %p.\n", 2007 + cm_info->loc_addr, cm_info->loc_port, 2008 + listener, listener->backlog, listener->cm_id); 2255 2009 2256 2010 return listener; 2257 2011 } ··· 2261 2015 * mini_cm_connect - make a connection node with params 2262 2016 */ 2263 2017 static struct nes_cm_node *mini_cm_connect(struct nes_cm_core *cm_core, 2264 - struct nes_vnic *nesvnic, u16 private_data_len, 2265 - void *private_data, struct nes_cm_info *cm_info) 2018 + struct nes_vnic *nesvnic, u16 private_data_len, 2019 + void *private_data, struct nes_cm_info *cm_info) 2266 2020 { 2267 2021 int ret = 0; 2268 2022 struct nes_cm_node *cm_node; 2269 2023 struct nes_cm_listener *loopbackremotelistener; 2270 2024 struct nes_cm_node *loopbackremotenode; 2271 2025 struct nes_cm_info loopback_cm_info; 2272 - u16 mpa_frame_size = sizeof(struct ietf_mpa_frame) + private_data_len; 2273 - struct ietf_mpa_frame *mpa_frame = NULL; 2026 + u8 *start_buff; 2274 2027 2275 2028 /* create a CM connection node */ 2276 2029 cm_node = make_cm_node(cm_core, nesvnic, cm_info, NULL); 2277 2030 if (!cm_node) 2278 2031 return NULL; 2279 - mpa_frame = &cm_node->mpa_frame; 2280 - memcpy(mpa_frame->key, IEFT_MPA_KEY_REQ, IETF_MPA_KEY_SIZE); 2281 - mpa_frame->flags = IETF_MPA_FLAGS_CRC; 2282 - mpa_frame->rev = IETF_MPA_VERSION; 2283 - mpa_frame->priv_data_len = htons(private_data_len); 2284 2032 2285 2033 /* set our node side to client (active) side */ 2286 2034 cm_node->tcp_cntxt.client = 1; ··· 2282 2042 2283 2043 if (cm_info->loc_addr == cm_info->rem_addr) { 2284 2044 loopbackremotelistener = find_listener(cm_core, 2285 - ntohl(nesvnic->local_ipaddr), cm_node->rem_port, 2286 - NES_CM_LISTENER_ACTIVE_STATE); 2045 + ntohl(nesvnic->local_ipaddr), cm_node->rem_port, 2046 + NES_CM_LISTENER_ACTIVE_STATE); 2287 2047 if (loopbackremotelistener == NULL) { 2288 2048 create_event(cm_node, NES_CM_EVENT_ABORTED); 2289 2049 } else { ··· 2292 2052 loopback_cm_info.rem_port = cm_info->loc_port; 2293 2053 loopback_cm_info.cm_id = loopbackremotelistener->cm_id; 2294 2054 loopbackremotenode = make_cm_node(cm_core, nesvnic, 2295 - &loopback_cm_info, loopbackremotelistener); 2055 + &loopback_cm_info, loopbackremotelistener); 2296 2056 if (!loopbackremotenode) { 2297 2057 rem_ref_cm_node(cm_node->cm_core, cm_node); 2298 2058 return NULL; ··· 2303 2063 NES_CM_DEFAULT_RCV_WND_SCALE; 2304 2064 cm_node->loopbackpartner = loopbackremotenode; 2305 2065 memcpy(loopbackremotenode->mpa_frame_buf, private_data, 2306 - private_data_len); 2066 + private_data_len); 2307 2067 loopbackremotenode->mpa_frame_size = private_data_len; 2308 2068 2309 2069 /* we are done handling this state. */ ··· 2331 2091 return cm_node; 2332 2092 } 2333 2093 2334 - /* set our node side to client (active) side */ 2335 - cm_node->tcp_cntxt.client = 1; 2336 - /* init our MPA frame ptr */ 2337 - memcpy(mpa_frame->priv_data, private_data, private_data_len); 2094 + start_buff = &cm_node->mpa_frame_buf[0] + sizeof(struct ietf_mpa_v2); 2095 + cm_node->mpa_frame_size = private_data_len; 2338 2096 2339 - cm_node->mpa_frame_size = mpa_frame_size; 2097 + memcpy(start_buff, private_data, private_data_len); 2340 2098 2341 2099 /* send a syn and goto syn sent state */ 2342 2100 cm_node->state = NES_CM_STATE_SYN_SENT; ··· 2343 2105 if (ret) { 2344 2106 /* error in sending the syn free up the cm_node struct */ 2345 2107 nes_debug(NES_DBG_CM, "Api - connect() FAILED: dest " 2346 - "addr=0x%08X, port=0x%04x, cm_node=%p, cm_id = %p.\n", 2347 - cm_node->rem_addr, cm_node->rem_port, cm_node, 2348 - cm_node->cm_id); 2108 + "addr=0x%08X, port=0x%04x, cm_node=%p, cm_id = %p.\n", 2109 + cm_node->rem_addr, cm_node->rem_port, cm_node, 2110 + cm_node->cm_id); 2349 2111 rem_ref_cm_node(cm_node->cm_core, cm_node); 2350 2112 cm_node = NULL; 2351 2113 } 2352 2114 2353 - if (cm_node) 2115 + if (cm_node) { 2354 2116 nes_debug(NES_DBG_CM, "Api - connect(): dest addr=0x%08X," 2355 - "port=0x%04x, cm_node=%p, cm_id = %p.\n", 2356 - cm_node->rem_addr, cm_node->rem_port, cm_node, 2357 - cm_node->cm_id); 2117 + "port=0x%04x, cm_node=%p, cm_id = %p.\n", 2118 + cm_node->rem_addr, cm_node->rem_port, cm_node, 2119 + cm_node->cm_id); 2120 + } 2358 2121 2359 2122 return cm_node; 2360 2123 } ··· 2365 2126 * mini_cm_accept - accept a connection 2366 2127 * This function is never called 2367 2128 */ 2368 - static int mini_cm_accept(struct nes_cm_core *cm_core, 2369 - struct ietf_mpa_frame *mpa_frame, struct nes_cm_node *cm_node) 2129 + static int mini_cm_accept(struct nes_cm_core *cm_core, struct nes_cm_node *cm_node) 2370 2130 { 2371 2131 return 0; 2372 2132 } ··· 2374 2136 /** 2375 2137 * mini_cm_reject - reject and teardown a connection 2376 2138 */ 2377 - static int mini_cm_reject(struct nes_cm_core *cm_core, 2378 - struct ietf_mpa_frame *mpa_frame, struct nes_cm_node *cm_node) 2139 + static int mini_cm_reject(struct nes_cm_core *cm_core, struct nes_cm_node *cm_node) 2379 2140 { 2380 2141 int ret = 0; 2381 2142 int err = 0; ··· 2384 2147 struct nes_cm_node *loopback = cm_node->loopbackpartner; 2385 2148 2386 2149 nes_debug(NES_DBG_CM, "%s cm_node=%p type=%d state=%d\n", 2387 - __func__, cm_node, cm_node->tcp_cntxt.client, cm_node->state); 2150 + __func__, cm_node, cm_node->tcp_cntxt.client, cm_node->state); 2388 2151 2389 2152 if (cm_node->tcp_cntxt.client) 2390 2153 return ret; ··· 2405 2168 err = send_reset(cm_node, NULL); 2406 2169 if (err) 2407 2170 WARN_ON(1); 2408 - } else 2171 + } else { 2409 2172 cm_id->add_ref(cm_id); 2173 + } 2410 2174 } 2411 2175 } 2412 2176 } else { ··· 2482 2244 case NES_CM_STATE_TSA: 2483 2245 if (cm_node->send_entry) 2484 2246 printk(KERN_ERR "ERROR Close got called from STATE_TSA " 2485 - "send_entry=%p\n", cm_node->send_entry); 2247 + "send_entry=%p\n", cm_node->send_entry); 2486 2248 ret = rem_ref_cm_node(cm_core, cm_node); 2487 2249 break; 2488 2250 } ··· 2495 2257 * node state machine 2496 2258 */ 2497 2259 static int mini_cm_recv_pkt(struct nes_cm_core *cm_core, 2498 - struct nes_vnic *nesvnic, struct sk_buff *skb) 2260 + struct nes_vnic *nesvnic, struct sk_buff *skb) 2499 2261 { 2500 2262 struct nes_cm_node *cm_node = NULL; 2501 2263 struct nes_cm_listener *listener = NULL; ··· 2507 2269 2508 2270 if (!skb) 2509 2271 return 0; 2510 - if (skb->len < sizeof(struct iphdr) + sizeof(struct tcphdr)) { 2272 + if (skb->len < sizeof(struct iphdr) + sizeof(struct tcphdr)) 2511 2273 return 0; 2512 - } 2513 2274 2514 2275 iph = (struct iphdr *)skb->data; 2515 2276 tcph = (struct tcphdr *)(skb->data + sizeof(struct iphdr)); ··· 2526 2289 2527 2290 do { 2528 2291 cm_node = find_node(cm_core, 2529 - nfo.rem_port, nfo.rem_addr, 2530 - nfo.loc_port, nfo.loc_addr); 2292 + nfo.rem_port, nfo.rem_addr, 2293 + nfo.loc_port, nfo.loc_addr); 2531 2294 2532 2295 if (!cm_node) { 2533 2296 /* Only type of packet accepted are for */ ··· 2537 2300 break; 2538 2301 } 2539 2302 listener = find_listener(cm_core, nfo.loc_addr, 2540 - nfo.loc_port, 2541 - NES_CM_LISTENER_ACTIVE_STATE); 2303 + nfo.loc_port, 2304 + NES_CM_LISTENER_ACTIVE_STATE); 2542 2305 if (!listener) { 2543 2306 nfo.cm_id = NULL; 2544 2307 nfo.conn_type = 0; ··· 2549 2312 nfo.cm_id = listener->cm_id; 2550 2313 nfo.conn_type = listener->conn_type; 2551 2314 cm_node = make_cm_node(cm_core, nesvnic, &nfo, 2552 - listener); 2315 + listener); 2553 2316 if (!cm_node) { 2554 2317 nes_debug(NES_DBG_CM, "Unable to allocate " 2555 - "node\n"); 2318 + "node\n"); 2556 2319 cm_packets_dropped++; 2557 2320 atomic_dec(&listener->ref_count); 2558 2321 dev_kfree_skb_any(skb); ··· 2568 2331 } 2569 2332 add_ref_cm_node(cm_node); 2570 2333 } else if (cm_node->state == NES_CM_STATE_TSA) { 2571 - rem_ref_cm_node(cm_core, cm_node); 2572 - atomic_inc(&cm_accel_dropped_pkts); 2573 - dev_kfree_skb_any(skb); 2334 + if (cm_node->nesqp->pau_mode) 2335 + nes_queue_mgt_skbs(skb, nesvnic, cm_node->nesqp); 2336 + else { 2337 + rem_ref_cm_node(cm_core, cm_node); 2338 + atomic_inc(&cm_accel_dropped_pkts); 2339 + dev_kfree_skb_any(skb); 2340 + } 2574 2341 break; 2575 2342 } 2576 2343 skb_reset_network_header(skb); ··· 2604 2363 init_timer(&cm_core->tcp_timer); 2605 2364 cm_core->tcp_timer.function = nes_cm_timer_tick; 2606 2365 2607 - cm_core->mtu = NES_CM_DEFAULT_MTU; 2366 + cm_core->mtu = NES_CM_DEFAULT_MTU; 2608 2367 cm_core->state = NES_CM_STATE_INITED; 2609 2368 cm_core->free_tx_pkt_max = NES_CM_DEFAULT_FREE_PKTS; 2610 2369 ··· 2642 2401 2643 2402 barrier(); 2644 2403 2645 - if (timer_pending(&cm_core->tcp_timer)) { 2404 + if (timer_pending(&cm_core->tcp_timer)) 2646 2405 del_timer(&cm_core->tcp_timer); 2647 - } 2648 2406 2649 2407 destroy_workqueue(cm_core->event_wq); 2650 2408 destroy_workqueue(cm_core->disconn_wq); ··· 2698 2458 return -EINVAL; 2699 2459 2700 2460 nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_IPV4 | 2701 - NES_QPCONTEXT_MISC_NO_NAGLE | NES_QPCONTEXT_MISC_DO_NOT_FRAG | 2702 - NES_QPCONTEXT_MISC_DROS); 2461 + NES_QPCONTEXT_MISC_NO_NAGLE | NES_QPCONTEXT_MISC_DO_NOT_FRAG | 2462 + NES_QPCONTEXT_MISC_DROS); 2703 2463 2704 2464 if (cm_node->tcp_cntxt.snd_wscale || cm_node->tcp_cntxt.rcv_wscale) 2705 2465 nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_WSCALE); ··· 2709 2469 nesqp->nesqp_context->mss |= cpu_to_le32(((u32)cm_node->tcp_cntxt.mss) << 16); 2710 2470 2711 2471 nesqp->nesqp_context->tcp_state_flow_label |= cpu_to_le32( 2712 - (u32)NES_QPCONTEXT_TCPSTATE_EST << NES_QPCONTEXT_TCPFLOW_TCP_STATE_SHIFT); 2472 + (u32)NES_QPCONTEXT_TCPSTATE_EST << NES_QPCONTEXT_TCPFLOW_TCP_STATE_SHIFT); 2713 2473 2714 2474 nesqp->nesqp_context->pd_index_wscale |= cpu_to_le32( 2715 - (cm_node->tcp_cntxt.snd_wscale << NES_QPCONTEXT_PDWSCALE_SND_WSCALE_SHIFT) & 2716 - NES_QPCONTEXT_PDWSCALE_SND_WSCALE_MASK); 2475 + (cm_node->tcp_cntxt.snd_wscale << NES_QPCONTEXT_PDWSCALE_SND_WSCALE_SHIFT) & 2476 + NES_QPCONTEXT_PDWSCALE_SND_WSCALE_MASK); 2717 2477 2718 2478 nesqp->nesqp_context->pd_index_wscale |= cpu_to_le32( 2719 - (cm_node->tcp_cntxt.rcv_wscale << NES_QPCONTEXT_PDWSCALE_RCV_WSCALE_SHIFT) & 2720 - NES_QPCONTEXT_PDWSCALE_RCV_WSCALE_MASK); 2479 + (cm_node->tcp_cntxt.rcv_wscale << NES_QPCONTEXT_PDWSCALE_RCV_WSCALE_SHIFT) & 2480 + NES_QPCONTEXT_PDWSCALE_RCV_WSCALE_MASK); 2721 2481 2722 2482 nesqp->nesqp_context->keepalive = cpu_to_le32(0x80); 2723 2483 nesqp->nesqp_context->ts_recent = 0; ··· 2726 2486 nesqp->nesqp_context->snd_wnd = cpu_to_le32(cm_node->tcp_cntxt.snd_wnd); 2727 2487 nesqp->nesqp_context->rcv_nxt = cpu_to_le32(cm_node->tcp_cntxt.rcv_nxt); 2728 2488 nesqp->nesqp_context->rcv_wnd = cpu_to_le32(cm_node->tcp_cntxt.rcv_wnd << 2729 - cm_node->tcp_cntxt.rcv_wscale); 2489 + cm_node->tcp_cntxt.rcv_wscale); 2730 2490 nesqp->nesqp_context->snd_max = cpu_to_le32(cm_node->tcp_cntxt.loc_seq_num); 2731 2491 nesqp->nesqp_context->snd_una = cpu_to_le32(cm_node->tcp_cntxt.loc_seq_num); 2732 2492 nesqp->nesqp_context->srtt = 0; 2733 2493 nesqp->nesqp_context->rttvar = cpu_to_le32(0x6); 2734 2494 nesqp->nesqp_context->ssthresh = cpu_to_le32(0x3FFFC000); 2735 - nesqp->nesqp_context->cwnd = cpu_to_le32(2*cm_node->tcp_cntxt.mss); 2495 + nesqp->nesqp_context->cwnd = cpu_to_le32(2 * cm_node->tcp_cntxt.mss); 2736 2496 nesqp->nesqp_context->snd_wl1 = cpu_to_le32(cm_node->tcp_cntxt.rcv_nxt); 2737 2497 nesqp->nesqp_context->snd_wl2 = cpu_to_le32(cm_node->tcp_cntxt.loc_seq_num); 2738 2498 nesqp->nesqp_context->max_snd_wnd = cpu_to_le32(cm_node->tcp_cntxt.max_snd_wnd); 2739 2499 2740 2500 nes_debug(NES_DBG_CM, "QP%u: rcv_nxt = 0x%08X, snd_nxt = 0x%08X," 2741 - " Setting MSS to %u, PDWscale = 0x%08X, rcv_wnd = %u, context misc = 0x%08X.\n", 2742 - nesqp->hwqp.qp_id, le32_to_cpu(nesqp->nesqp_context->rcv_nxt), 2743 - le32_to_cpu(nesqp->nesqp_context->snd_nxt), 2744 - cm_node->tcp_cntxt.mss, le32_to_cpu(nesqp->nesqp_context->pd_index_wscale), 2745 - le32_to_cpu(nesqp->nesqp_context->rcv_wnd), 2746 - le32_to_cpu(nesqp->nesqp_context->misc)); 2501 + " Setting MSS to %u, PDWscale = 0x%08X, rcv_wnd = %u, context misc = 0x%08X.\n", 2502 + nesqp->hwqp.qp_id, le32_to_cpu(nesqp->nesqp_context->rcv_nxt), 2503 + le32_to_cpu(nesqp->nesqp_context->snd_nxt), 2504 + cm_node->tcp_cntxt.mss, le32_to_cpu(nesqp->nesqp_context->pd_index_wscale), 2505 + le32_to_cpu(nesqp->nesqp_context->rcv_wnd), 2506 + le32_to_cpu(nesqp->nesqp_context->misc)); 2747 2507 nes_debug(NES_DBG_CM, " snd_wnd = 0x%08X.\n", le32_to_cpu(nesqp->nesqp_context->snd_wnd)); 2748 2508 nes_debug(NES_DBG_CM, " snd_cwnd = 0x%08X.\n", le32_to_cpu(nesqp->nesqp_context->cwnd)); 2749 2509 nes_debug(NES_DBG_CM, " max_swnd = 0x%08X.\n", le32_to_cpu(nesqp->nesqp_context->max_snd_wnd)); ··· 2764 2524 2765 2525 work = kzalloc(sizeof *work, GFP_ATOMIC); 2766 2526 if (!work) 2767 - return -ENOMEM; /* Timer will clean up */ 2527 + return -ENOMEM; /* Timer will clean up */ 2768 2528 2769 2529 nes_add_ref(&nesqp->ibqp); 2770 2530 work->nesqp = nesqp; ··· 2784 2544 2785 2545 kfree(dwork); 2786 2546 nes_debug(NES_DBG_CM, "processing AEQE id 0x%04X for QP%u.\n", 2787 - nesqp->last_aeq, nesqp->hwqp.qp_id); 2547 + nesqp->last_aeq, nesqp->hwqp.qp_id); 2788 2548 nes_cm_disconn_true(nesqp); 2789 2549 nes_rem_ref(&nesqp->ibqp); 2790 2550 } ··· 2820 2580 /* make sure we havent already closed this connection */ 2821 2581 if (!cm_id) { 2822 2582 nes_debug(NES_DBG_CM, "QP%u disconnect_worker cmid is NULL\n", 2823 - nesqp->hwqp.qp_id); 2583 + nesqp->hwqp.qp_id); 2824 2584 spin_unlock_irqrestore(&nesqp->lock, flags); 2825 2585 return -1; 2826 2586 } ··· 2829 2589 nes_debug(NES_DBG_CM, "Disconnecting QP%u\n", nesqp->hwqp.qp_id); 2830 2590 2831 2591 original_hw_tcp_state = nesqp->hw_tcp_state; 2832 - original_ibqp_state = nesqp->ibqp_state; 2592 + original_ibqp_state = nesqp->ibqp_state; 2833 2593 last_ae = nesqp->last_aeq; 2834 2594 2835 2595 if (nesqp->term_flags) { ··· 2887 2647 cm_event.private_data_len = 0; 2888 2648 2889 2649 nes_debug(NES_DBG_CM, "Generating a CM Disconnect Event" 2890 - " for QP%u, SQ Head = %u, SQ Tail = %u. " 2891 - "cm_id = %p, refcount = %u.\n", 2892 - nesqp->hwqp.qp_id, nesqp->hwqp.sq_head, 2893 - nesqp->hwqp.sq_tail, cm_id, 2894 - atomic_read(&nesqp->refcount)); 2650 + " for QP%u, SQ Head = %u, SQ Tail = %u. " 2651 + "cm_id = %p, refcount = %u.\n", 2652 + nesqp->hwqp.qp_id, nesqp->hwqp.sq_head, 2653 + nesqp->hwqp.sq_tail, cm_id, 2654 + atomic_read(&nesqp->refcount)); 2895 2655 2896 2656 ret = cm_id->event_handler(cm_id, &cm_event); 2897 2657 if (ret) 2898 2658 nes_debug(NES_DBG_CM, "OFA CM event_handler " 2899 - "returned, ret=%d\n", ret); 2659 + "returned, ret=%d\n", ret); 2900 2660 } 2901 2661 2902 2662 if (issue_close) { ··· 2914 2674 cm_event.private_data_len = 0; 2915 2675 2916 2676 ret = cm_id->event_handler(cm_id, &cm_event); 2917 - if (ret) { 2677 + if (ret) 2918 2678 nes_debug(NES_DBG_CM, "OFA CM event_handler returned, ret=%d\n", ret); 2919 - } 2920 2679 2921 2680 cm_id->rem_ref(cm_id); 2922 2681 } ··· 2955 2716 if (nesqp->lsmm_mr) 2956 2717 nesibdev->ibdev.dereg_mr(nesqp->lsmm_mr); 2957 2718 pci_free_consistent(nesdev->pcidev, 2958 - nesqp->private_data_len+sizeof(struct ietf_mpa_frame), 2959 - nesqp->ietf_frame, nesqp->ietf_frame_pbase); 2719 + nesqp->private_data_len + nesqp->ietf_frame_size, 2720 + nesqp->ietf_frame, nesqp->ietf_frame_pbase); 2960 2721 } 2961 2722 } 2962 2723 ··· 2995 2756 struct ib_phys_buf ibphysbuf; 2996 2757 struct nes_pd *nespd; 2997 2758 u64 tagged_offset; 2759 + u8 mpa_frame_offset = 0; 2760 + struct ietf_mpa_v2 *mpa_v2_frame; 2761 + u8 start_addr = 0; 2762 + u8 *start_ptr = &start_addr; 2763 + u8 **start_buff = &start_ptr; 2764 + u16 buff_len = 0; 2998 2765 2999 2766 ibqp = nes_get_qp(cm_id->device, conn_param->qpn); 3000 2767 if (!ibqp) ··· 3041 2796 nes_debug(NES_DBG_CM, "netdev refcnt = %u.\n", 3042 2797 netdev_refcnt_read(nesvnic->netdev)); 3043 2798 2799 + nesqp->ietf_frame_size = sizeof(struct ietf_mpa_v2); 3044 2800 /* allocate the ietf frame and space for private data */ 3045 2801 nesqp->ietf_frame = pci_alloc_consistent(nesdev->pcidev, 3046 - sizeof(struct ietf_mpa_frame) + conn_param->private_data_len, 3047 - &nesqp->ietf_frame_pbase); 2802 + nesqp->ietf_frame_size + conn_param->private_data_len, 2803 + &nesqp->ietf_frame_pbase); 3048 2804 3049 2805 if (!nesqp->ietf_frame) { 3050 - nes_debug(NES_DBG_CM, "Unable to allocate memory for private " 3051 - "data\n"); 2806 + nes_debug(NES_DBG_CM, "Unable to allocate memory for private data\n"); 3052 2807 return -ENOMEM; 3053 2808 } 2809 + mpa_v2_frame = (struct ietf_mpa_v2 *)nesqp->ietf_frame; 3054 2810 2811 + if (cm_node->mpa_frame_rev == IETF_MPA_V1) 2812 + mpa_frame_offset = 4; 3055 2813 3056 - /* setup the MPA frame */ 2814 + memcpy(mpa_v2_frame->priv_data, conn_param->private_data, 2815 + conn_param->private_data_len); 2816 + 2817 + cm_build_mpa_frame(cm_node, start_buff, &buff_len, nesqp->ietf_frame, MPA_KEY_REPLY); 3057 2818 nesqp->private_data_len = conn_param->private_data_len; 3058 - memcpy(nesqp->ietf_frame->key, IEFT_MPA_KEY_REP, IETF_MPA_KEY_SIZE); 3059 - 3060 - memcpy(nesqp->ietf_frame->priv_data, conn_param->private_data, 3061 - conn_param->private_data_len); 3062 - 3063 - nesqp->ietf_frame->priv_data_len = 3064 - cpu_to_be16(conn_param->private_data_len); 3065 - nesqp->ietf_frame->rev = mpa_version; 3066 - nesqp->ietf_frame->flags = IETF_MPA_FLAGS_CRC; 3067 2819 3068 2820 /* setup our first outgoing iWarp send WQE (the IETF frame response) */ 3069 2821 wqe = &nesqp->hwqp.sq_vbase[0]; 3070 2822 3071 2823 if (cm_id->remote_addr.sin_addr.s_addr != 3072 - cm_id->local_addr.sin_addr.s_addr) { 2824 + cm_id->local_addr.sin_addr.s_addr) { 3073 2825 u64temp = (unsigned long)nesqp; 3074 2826 nesibdev = nesvnic->nesibdev; 3075 2827 nespd = nesqp->nespd; 3076 - ibphysbuf.addr = nesqp->ietf_frame_pbase; 3077 - ibphysbuf.size = conn_param->private_data_len + 3078 - sizeof(struct ietf_mpa_frame); 3079 - tagged_offset = (u64)(unsigned long)nesqp->ietf_frame; 2828 + ibphysbuf.addr = nesqp->ietf_frame_pbase + mpa_frame_offset; 2829 + ibphysbuf.size = buff_len; 2830 + tagged_offset = (u64)(unsigned long)*start_buff; 3080 2831 ibmr = nesibdev->ibdev.reg_phys_mr((struct ib_pd *)nespd, 3081 - &ibphysbuf, 1, 3082 - IB_ACCESS_LOCAL_WRITE, 3083 - &tagged_offset); 2832 + &ibphysbuf, 1, 2833 + IB_ACCESS_LOCAL_WRITE, 2834 + &tagged_offset); 3084 2835 if (!ibmr) { 3085 2836 nes_debug(NES_DBG_CM, "Unable to register memory region" 3086 - "for lSMM for cm_node = %p \n", 3087 - cm_node); 2837 + "for lSMM for cm_node = %p \n", 2838 + cm_node); 3088 2839 pci_free_consistent(nesdev->pcidev, 3089 - nesqp->private_data_len+sizeof(struct ietf_mpa_frame), 3090 - nesqp->ietf_frame, nesqp->ietf_frame_pbase); 2840 + nesqp->private_data_len + nesqp->ietf_frame_size, 2841 + nesqp->ietf_frame, nesqp->ietf_frame_pbase); 3091 2842 return -ENOMEM; 3092 2843 } 3093 2844 ··· 3091 2850 ibmr->device = nespd->ibpd.device; 3092 2851 nesqp->lsmm_mr = ibmr; 3093 2852 3094 - u64temp |= NES_SW_CONTEXT_ALIGN>>1; 2853 + u64temp |= NES_SW_CONTEXT_ALIGN >> 1; 3095 2854 set_wqe_64bit_value(wqe->wqe_words, 3096 - NES_IWARP_SQ_WQE_COMP_CTX_LOW_IDX, 3097 - u64temp); 2855 + NES_IWARP_SQ_WQE_COMP_CTX_LOW_IDX, 2856 + u64temp); 3098 2857 wqe->wqe_words[NES_IWARP_SQ_WQE_MISC_IDX] = 3099 2858 cpu_to_le32(NES_IWARP_SQ_WQE_STREAMING | 3100 - NES_IWARP_SQ_WQE_WRPDU); 2859 + NES_IWARP_SQ_WQE_WRPDU); 3101 2860 wqe->wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX] = 3102 - cpu_to_le32(conn_param->private_data_len + 3103 - sizeof(struct ietf_mpa_frame)); 2861 + cpu_to_le32(buff_len); 3104 2862 set_wqe_64bit_value(wqe->wqe_words, 3105 - NES_IWARP_SQ_WQE_FRAG0_LOW_IDX, 3106 - (u64)(unsigned long)nesqp->ietf_frame); 2863 + NES_IWARP_SQ_WQE_FRAG0_LOW_IDX, 2864 + (u64)(unsigned long)(*start_buff)); 3107 2865 wqe->wqe_words[NES_IWARP_SQ_WQE_LENGTH0_IDX] = 3108 - cpu_to_le32(conn_param->private_data_len + 3109 - sizeof(struct ietf_mpa_frame)); 2866 + cpu_to_le32(buff_len); 3110 2867 wqe->wqe_words[NES_IWARP_SQ_WQE_STAG0_IDX] = ibmr->lkey; 3111 2868 if (nesqp->sq_kmapped) { 3112 2869 nesqp->sq_kmapped = 0; ··· 3113 2874 3114 2875 nesqp->nesqp_context->ird_ord_sizes |= 3115 2876 cpu_to_le32(NES_QPCONTEXT_ORDIRD_LSMM_PRESENT | 3116 - NES_QPCONTEXT_ORDIRD_WRPDU); 2877 + NES_QPCONTEXT_ORDIRD_WRPDU); 3117 2878 } else { 3118 2879 nesqp->nesqp_context->ird_ord_sizes |= 3119 2880 cpu_to_le32(NES_QPCONTEXT_ORDIRD_WRPDU); ··· 3127 2888 3128 2889 /* nesqp->cm_node = (void *)cm_id->provider_data; */ 3129 2890 cm_id->provider_data = nesqp; 3130 - nesqp->active_conn = 0; 2891 + nesqp->active_conn = 0; 3131 2892 3132 2893 if (cm_node->state == NES_CM_STATE_TSA) 3133 2894 nes_debug(NES_DBG_CM, "Already state = TSA for cm_node=%p\n", 3134 - cm_node); 2895 + cm_node); 3135 2896 3136 2897 nes_cm_init_tsa_conn(nesqp, cm_node); 3137 2898 ··· 3148 2909 cpu_to_le32(ntohl(cm_id->remote_addr.sin_addr.s_addr)); 3149 2910 3150 2911 nesqp->nesqp_context->misc2 |= cpu_to_le32( 3151 - (u32)PCI_FUNC(nesdev->pcidev->devfn) << 3152 - NES_QPCONTEXT_MISC2_SRC_IP_SHIFT); 2912 + (u32)PCI_FUNC(nesdev->pcidev->devfn) << 2913 + NES_QPCONTEXT_MISC2_SRC_IP_SHIFT); 3153 2914 3154 2915 nesqp->nesqp_context->arp_index_vlan |= 3155 2916 cpu_to_le32(nes_arp_table(nesdev, 3156 - le32_to_cpu(nesqp->nesqp_context->ip0), NULL, 3157 - NES_ARP_RESOLVE) << 16); 2917 + le32_to_cpu(nesqp->nesqp_context->ip0), NULL, 2918 + NES_ARP_RESOLVE) << 16); 3158 2919 3159 2920 nesqp->nesqp_context->ts_val_delta = cpu_to_le32( 3160 2921 jiffies - nes_read_indexed(nesdev, NES_IDX_TCP_NOW)); ··· 3180 2941 crc_value = get_crc_value(&nes_quad); 3181 2942 nesqp->hte_index = cpu_to_be32(crc_value ^ 0xffffffff); 3182 2943 nes_debug(NES_DBG_CM, "HTE Index = 0x%08X, CRC = 0x%08X\n", 3183 - nesqp->hte_index, nesqp->hte_index & adapter->hte_index_mask); 2944 + nesqp->hte_index, nesqp->hte_index & adapter->hte_index_mask); 3184 2945 3185 2946 nesqp->hte_index &= adapter->hte_index_mask; 3186 2947 nesqp->nesqp_context->hte_index = cpu_to_le32(nesqp->hte_index); ··· 3188 2949 cm_node->cm_core->api->accelerated(cm_node->cm_core, cm_node); 3189 2950 3190 2951 nes_debug(NES_DBG_CM, "QP%u, Destination IP = 0x%08X:0x%04X, local = " 3191 - "0x%08X:0x%04X, rcv_nxt=0x%08X, snd_nxt=0x%08X, mpa + " 3192 - "private data length=%zu.\n", nesqp->hwqp.qp_id, 3193 - ntohl(cm_id->remote_addr.sin_addr.s_addr), 3194 - ntohs(cm_id->remote_addr.sin_port), 3195 - ntohl(cm_id->local_addr.sin_addr.s_addr), 3196 - ntohs(cm_id->local_addr.sin_port), 3197 - le32_to_cpu(nesqp->nesqp_context->rcv_nxt), 3198 - le32_to_cpu(nesqp->nesqp_context->snd_nxt), 3199 - conn_param->private_data_len + 3200 - sizeof(struct ietf_mpa_frame)); 3201 - 2952 + "0x%08X:0x%04X, rcv_nxt=0x%08X, snd_nxt=0x%08X, mpa + " 2953 + "private data length=%u.\n", nesqp->hwqp.qp_id, 2954 + ntohl(cm_id->remote_addr.sin_addr.s_addr), 2955 + ntohs(cm_id->remote_addr.sin_port), 2956 + ntohl(cm_id->local_addr.sin_addr.s_addr), 2957 + ntohs(cm_id->local_addr.sin_port), 2958 + le32_to_cpu(nesqp->nesqp_context->rcv_nxt), 2959 + le32_to_cpu(nesqp->nesqp_context->snd_nxt), 2960 + buff_len); 3202 2961 3203 2962 /* notify OF layer that accept event was successful */ 3204 2963 cm_id->add_ref(cm_id); ··· 3217 2980 nesqp->private_data_len; 3218 2981 /* copy entire MPA frame to our cm_node's frame */ 3219 2982 memcpy(cm_node->loopbackpartner->mpa_frame_buf, 3220 - nesqp->ietf_frame->priv_data, nesqp->private_data_len); 2983 + conn_param->private_data, conn_param->private_data_len); 3221 2984 create_event(cm_node->loopbackpartner, NES_CM_EVENT_CONNECTED); 3222 2985 } 3223 2986 if (ret) 3224 2987 printk(KERN_ERR "%s[%u] OFA CM event_handler returned, " 3225 - "ret=%d\n", __func__, __LINE__, ret); 2988 + "ret=%d\n", __func__, __LINE__, ret); 3226 2989 3227 2990 return 0; 3228 2991 } ··· 3235 2998 { 3236 2999 struct nes_cm_node *cm_node; 3237 3000 struct nes_cm_node *loopback; 3238 - 3239 3001 struct nes_cm_core *cm_core; 3002 + u8 *start_buff; 3240 3003 3241 3004 atomic_inc(&cm_rejects); 3242 - cm_node = (struct nes_cm_node *) cm_id->provider_data; 3005 + cm_node = (struct nes_cm_node *)cm_id->provider_data; 3243 3006 loopback = cm_node->loopbackpartner; 3244 3007 cm_core = cm_node->cm_core; 3245 3008 cm_node->cm_id = cm_id; 3246 - cm_node->mpa_frame_size = sizeof(struct ietf_mpa_frame) + pdata_len; 3247 3009 3248 - if (cm_node->mpa_frame_size > MAX_CM_BUFFER) 3010 + if (pdata_len + sizeof(struct ietf_mpa_v2) > MAX_CM_BUFFER) 3249 3011 return -EINVAL; 3250 3012 3251 - memcpy(&cm_node->mpa_frame.key[0], IEFT_MPA_KEY_REP, IETF_MPA_KEY_SIZE); 3252 3013 if (loopback) { 3253 3014 memcpy(&loopback->mpa_frame.priv_data, pdata, pdata_len); 3254 3015 loopback->mpa_frame.priv_data_len = pdata_len; 3255 - loopback->mpa_frame_size = sizeof(struct ietf_mpa_frame) + 3256 - pdata_len; 3016 + loopback->mpa_frame_size = pdata_len; 3257 3017 } else { 3258 - memcpy(&cm_node->mpa_frame.priv_data, pdata, pdata_len); 3259 - cm_node->mpa_frame.priv_data_len = cpu_to_be16(pdata_len); 3018 + start_buff = &cm_node->mpa_frame_buf[0] + sizeof(struct ietf_mpa_v2); 3019 + cm_node->mpa_frame_size = pdata_len; 3020 + memcpy(start_buff, pdata, pdata_len); 3260 3021 } 3261 - 3262 - cm_node->mpa_frame.rev = mpa_version; 3263 - cm_node->mpa_frame.flags = IETF_MPA_FLAGS_CRC | IETF_MPA_FLAGS_REJECT; 3264 - 3265 - return cm_core->api->reject(cm_core, &cm_node->mpa_frame, cm_node); 3022 + return cm_core->api->reject(cm_core, cm_node); 3266 3023 } 3267 3024 3268 3025 ··· 3283 3052 nesvnic = to_nesvnic(nesqp->ibqp.device); 3284 3053 if (!nesvnic) 3285 3054 return -EINVAL; 3286 - nesdev = nesvnic->nesdev; 3055 + nesdev = nesvnic->nesdev; 3287 3056 if (!nesdev) 3288 3057 return -EINVAL; 3289 3058 ··· 3291 3060 return -EINVAL; 3292 3061 3293 3062 nes_debug(NES_DBG_CM, "QP%u, current IP = 0x%08X, Destination IP = " 3294 - "0x%08X:0x%04X, local = 0x%08X:0x%04X.\n", nesqp->hwqp.qp_id, 3295 - ntohl(nesvnic->local_ipaddr), 3296 - ntohl(cm_id->remote_addr.sin_addr.s_addr), 3297 - ntohs(cm_id->remote_addr.sin_port), 3298 - ntohl(cm_id->local_addr.sin_addr.s_addr), 3299 - ntohs(cm_id->local_addr.sin_port)); 3063 + "0x%08X:0x%04X, local = 0x%08X:0x%04X.\n", nesqp->hwqp.qp_id, 3064 + ntohl(nesvnic->local_ipaddr), 3065 + ntohl(cm_id->remote_addr.sin_addr.s_addr), 3066 + ntohs(cm_id->remote_addr.sin_port), 3067 + ntohl(cm_id->local_addr.sin_addr.s_addr), 3068 + ntohs(cm_id->local_addr.sin_port)); 3300 3069 3301 3070 atomic_inc(&cm_connects); 3302 3071 nesqp->active_conn = 1; ··· 3310 3079 nesqp->nesqp_context->ird_ord_sizes |= cpu_to_le32((u32)conn_param->ord); 3311 3080 nes_debug(NES_DBG_CM, "requested ord = 0x%08X.\n", (u32)conn_param->ord); 3312 3081 nes_debug(NES_DBG_CM, "mpa private data len =%u\n", 3313 - conn_param->private_data_len); 3082 + conn_param->private_data_len); 3314 3083 3315 3084 if (cm_id->local_addr.sin_addr.s_addr != 3316 - cm_id->remote_addr.sin_addr.s_addr) { 3085 + cm_id->remote_addr.sin_addr.s_addr) { 3317 3086 nes_manage_apbvt(nesvnic, ntohs(cm_id->local_addr.sin_port), 3318 - PCI_FUNC(nesdev->pcidev->devfn), NES_MANAGE_APBVT_ADD); 3087 + PCI_FUNC(nesdev->pcidev->devfn), NES_MANAGE_APBVT_ADD); 3319 3088 apbvt_set = 1; 3320 3089 } 3321 3090 ··· 3331 3100 3332 3101 /* create a connect CM node connection */ 3333 3102 cm_node = g_cm_core->api->connect(g_cm_core, nesvnic, 3334 - conn_param->private_data_len, (void *)conn_param->private_data, 3335 - &cm_info); 3103 + conn_param->private_data_len, (void *)conn_param->private_data, 3104 + &cm_info); 3336 3105 if (!cm_node) { 3337 3106 if (apbvt_set) 3338 3107 nes_manage_apbvt(nesvnic, ntohs(cm_id->local_addr.sin_port), 3339 - PCI_FUNC(nesdev->pcidev->devfn), 3340 - NES_MANAGE_APBVT_DEL); 3108 + PCI_FUNC(nesdev->pcidev->devfn), 3109 + NES_MANAGE_APBVT_DEL); 3341 3110 3342 3111 cm_id->rem_ref(cm_id); 3343 3112 return -ENOMEM; ··· 3387 3156 cm_node = g_cm_core->api->listen(g_cm_core, nesvnic, &cm_info); 3388 3157 if (!cm_node) { 3389 3158 printk(KERN_ERR "%s[%u] Error returned from listen API call\n", 3390 - __func__, __LINE__); 3159 + __func__, __LINE__); 3391 3160 return -ENOMEM; 3392 3161 } 3393 3162 ··· 3395 3164 3396 3165 if (!cm_node->reused_node) { 3397 3166 err = nes_manage_apbvt(nesvnic, 3398 - ntohs(cm_id->local_addr.sin_port), 3399 - PCI_FUNC(nesvnic->nesdev->pcidev->devfn), 3400 - NES_MANAGE_APBVT_ADD); 3167 + ntohs(cm_id->local_addr.sin_port), 3168 + PCI_FUNC(nesvnic->nesdev->pcidev->devfn), 3169 + NES_MANAGE_APBVT_ADD); 3401 3170 if (err) { 3402 3171 printk(KERN_ERR "nes_manage_apbvt call returned %d.\n", 3403 - err); 3172 + err); 3404 3173 g_cm_core->api->stop_listener(g_cm_core, (void *)cm_node); 3405 3174 return err; 3406 3175 } ··· 3437 3206 int nes_cm_recv(struct sk_buff *skb, struct net_device *netdevice) 3438 3207 { 3439 3208 int rc = 0; 3209 + 3440 3210 cm_packets_received++; 3441 - if ((g_cm_core) && (g_cm_core->api)) { 3211 + if ((g_cm_core) && (g_cm_core->api)) 3442 3212 rc = g_cm_core->api->recv_pkt(g_cm_core, netdev_priv(netdevice), skb); 3443 - } else { 3213 + else 3444 3214 nes_debug(NES_DBG_CM, "Unable to process packet for CM," 3445 - " cm is not setup properly.\n"); 3446 - } 3215 + " cm is not setup properly.\n"); 3447 3216 3448 3217 return rc; 3449 3218 } ··· 3458 3227 nes_debug(NES_DBG_CM, "\n"); 3459 3228 /* create the primary CM core, pass this handle to subsequent core inits */ 3460 3229 g_cm_core = nes_cm_alloc_core(); 3461 - if (g_cm_core) { 3230 + if (g_cm_core) 3462 3231 return 0; 3463 - } else { 3232 + else 3464 3233 return -ENOMEM; 3465 - } 3466 3234 } 3467 3235 3468 3236 ··· 3482 3252 */ 3483 3253 static void cm_event_connected(struct nes_cm_event *event) 3484 3254 { 3485 - u64 u64temp; 3486 3255 struct nes_qp *nesqp; 3487 3256 struct nes_vnic *nesvnic; 3488 3257 struct nes_device *nesdev; ··· 3490 3261 struct ib_qp_attr attr; 3491 3262 struct iw_cm_id *cm_id; 3492 3263 struct iw_cm_event cm_event; 3493 - struct nes_hw_qp_wqe *wqe; 3494 3264 struct nes_v4_quad nes_quad; 3495 3265 u32 crc_value; 3496 3266 int ret; ··· 3503 3275 nesdev = nesvnic->nesdev; 3504 3276 nesadapter = nesdev->nesadapter; 3505 3277 3506 - if (nesqp->destroyed) { 3278 + if (nesqp->destroyed) 3507 3279 return; 3508 - } 3509 3280 atomic_inc(&cm_connecteds); 3510 3281 nes_debug(NES_DBG_CM, "QP%u attempting to connect to 0x%08X:0x%04X on" 3511 - " local port 0x%04X. jiffies = %lu.\n", 3512 - nesqp->hwqp.qp_id, 3513 - ntohl(cm_id->remote_addr.sin_addr.s_addr), 3514 - ntohs(cm_id->remote_addr.sin_port), 3515 - ntohs(cm_id->local_addr.sin_port), 3516 - jiffies); 3282 + " local port 0x%04X. jiffies = %lu.\n", 3283 + nesqp->hwqp.qp_id, 3284 + ntohl(cm_id->remote_addr.sin_addr.s_addr), 3285 + ntohs(cm_id->remote_addr.sin_port), 3286 + ntohs(cm_id->local_addr.sin_port), 3287 + jiffies); 3517 3288 3518 3289 nes_cm_init_tsa_conn(nesqp, cm_node); 3519 3290 ··· 3543 3316 NES_QPCONTEXT_ORDIRD_IWARP_MODE_SHIFT); 3544 3317 3545 3318 /* Adjust tail for not having a LSMM */ 3546 - nesqp->hwqp.sq_tail = 1; 3319 + /*nesqp->hwqp.sq_tail = 1;*/ 3547 3320 3548 - #if defined(NES_SEND_FIRST_WRITE) 3549 - if (cm_node->send_write0) { 3550 - nes_debug(NES_DBG_CM, "Sending first write.\n"); 3551 - wqe = &nesqp->hwqp.sq_vbase[0]; 3552 - u64temp = (unsigned long)nesqp; 3553 - u64temp |= NES_SW_CONTEXT_ALIGN>>1; 3554 - set_wqe_64bit_value(wqe->wqe_words, 3555 - NES_IWARP_SQ_WQE_COMP_CTX_LOW_IDX, u64temp); 3556 - wqe->wqe_words[NES_IWARP_SQ_WQE_MISC_IDX] = 3557 - cpu_to_le32(NES_IWARP_SQ_OP_RDMAW); 3558 - wqe->wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX] = 0; 3559 - wqe->wqe_words[NES_IWARP_SQ_WQE_FRAG0_LOW_IDX] = 0; 3560 - wqe->wqe_words[NES_IWARP_SQ_WQE_FRAG0_HIGH_IDX] = 0; 3561 - wqe->wqe_words[NES_IWARP_SQ_WQE_LENGTH0_IDX] = 0; 3562 - wqe->wqe_words[NES_IWARP_SQ_WQE_STAG0_IDX] = 0; 3321 + build_rdma0_msg(cm_node, &nesqp); 3563 3322 3564 - if (nesqp->sq_kmapped) { 3565 - nesqp->sq_kmapped = 0; 3566 - kunmap(nesqp->page); 3567 - } 3568 - 3569 - /* use the reserved spot on the WQ for the extra first WQE */ 3570 - nesqp->nesqp_context->ird_ord_sizes &= 3571 - cpu_to_le32(~(NES_QPCONTEXT_ORDIRD_LSMM_PRESENT | 3572 - NES_QPCONTEXT_ORDIRD_WRPDU | 3573 - NES_QPCONTEXT_ORDIRD_ALSMM)); 3574 - nesqp->skip_lsmm = 1; 3575 - nesqp->hwqp.sq_tail = 0; 3576 - nes_write32(nesdev->regs + NES_WQE_ALLOC, 3577 - (1 << 24) | 0x00800000 | nesqp->hwqp.qp_id); 3578 - } 3579 - #endif 3323 + nes_write32(nesdev->regs + NES_WQE_ALLOC, 3324 + (1 << 24) | 0x00800000 | nesqp->hwqp.qp_id); 3580 3325 3581 3326 memset(&nes_quad, 0, sizeof(nes_quad)); 3582 3327 ··· 3565 3366 crc_value = get_crc_value(&nes_quad); 3566 3367 nesqp->hte_index = cpu_to_be32(crc_value ^ 0xffffffff); 3567 3368 nes_debug(NES_DBG_CM, "HTE Index = 0x%08X, After CRC = 0x%08X\n", 3568 - nesqp->hte_index, nesqp->hte_index & nesadapter->hte_index_mask); 3369 + nesqp->hte_index, nesqp->hte_index & nesadapter->hte_index_mask); 3569 3370 3570 3371 nesqp->hte_index &= nesadapter->hte_index_mask; 3571 3372 nesqp->nesqp_context->hte_index = cpu_to_le32(nesqp->hte_index); 3572 3373 3573 3374 nesqp->ietf_frame = &cm_node->mpa_frame; 3574 - nesqp->private_data_len = (u8) cm_node->mpa_frame_size; 3375 + nesqp->private_data_len = (u8)cm_node->mpa_frame_size; 3575 3376 cm_node->cm_core->api->accelerated(cm_node->cm_core, cm_node); 3576 3377 3577 3378 /* notify OF layer we successfully created the requested connection */ ··· 3583 3384 cm_event.remote_addr = cm_id->remote_addr; 3584 3385 3585 3386 cm_event.private_data = (void *)event->cm_node->mpa_frame_buf; 3586 - cm_event.private_data_len = (u8) event->cm_node->mpa_frame_size; 3387 + cm_event.private_data_len = (u8)event->cm_node->mpa_frame_size; 3388 + cm_event.ird = cm_node->ird_size; 3389 + cm_event.ord = cm_node->ord_size; 3587 3390 3588 3391 cm_event.local_addr.sin_addr.s_addr = event->cm_info.rem_addr; 3589 3392 ret = cm_id->event_handler(cm_id, &cm_event); ··· 3593 3392 3594 3393 if (ret) 3595 3394 printk(KERN_ERR "%s[%u] OFA CM event_handler returned, " 3596 - "ret=%d\n", __func__, __LINE__, ret); 3395 + "ret=%d\n", __func__, __LINE__, ret); 3597 3396 attr.qp_state = IB_QPS_RTS; 3598 3397 nes_modify_qp(&nesqp->ibqp, &attr, IB_QP_STATE, NULL); 3599 3398 3600 3399 nes_debug(NES_DBG_CM, "Exiting connect thread for QP%u. jiffies = " 3601 - "%lu\n", nesqp->hwqp.qp_id, jiffies); 3400 + "%lu\n", nesqp->hwqp.qp_id, jiffies); 3602 3401 3603 3402 return; 3604 3403 } ··· 3619 3418 return; 3620 3419 3621 3420 cm_id = event->cm_node->cm_id; 3622 - if (!cm_id) { 3421 + if (!cm_id) 3623 3422 return; 3624 - } 3625 3423 3626 3424 nes_debug(NES_DBG_CM, "cm_node=%p, cm_id=%p\n", event->cm_node, cm_id); 3627 3425 nesqp = cm_id->provider_data; 3628 3426 3629 - if (!nesqp) { 3427 + if (!nesqp) 3630 3428 return; 3631 - } 3632 3429 3633 3430 /* notify OF layer about this connection error event */ 3634 3431 /* cm_id->rem_ref(cm_id); */ ··· 3641 3442 cm_event.private_data_len = 0; 3642 3443 3643 3444 nes_debug(NES_DBG_CM, "call CM_EVENT REJECTED, local_addr=%08x, " 3644 - "remove_addr=%08x\n", cm_event.local_addr.sin_addr.s_addr, 3645 - cm_event.remote_addr.sin_addr.s_addr); 3445 + "remove_addr=%08x\n", cm_event.local_addr.sin_addr.s_addr, 3446 + cm_event.remote_addr.sin_addr.s_addr); 3646 3447 3647 3448 ret = cm_id->event_handler(cm_id, &cm_event); 3648 3449 nes_debug(NES_DBG_CM, "OFA CM event_handler returned, ret=%d\n", ret); 3649 3450 if (ret) 3650 3451 printk(KERN_ERR "%s[%u] OFA CM event_handler returned, " 3651 - "ret=%d\n", __func__, __LINE__, ret); 3452 + "ret=%d\n", __func__, __LINE__, ret); 3652 3453 cm_id->rem_ref(cm_id); 3653 3454 3654 3455 rem_ref_cm_node(event->cm_node->cm_core, event->cm_node); ··· 3718 3519 */ 3719 3520 static void cm_event_mpa_req(struct nes_cm_event *event) 3720 3521 { 3721 - struct iw_cm_id *cm_id; 3522 + struct iw_cm_id *cm_id; 3722 3523 struct iw_cm_event cm_event; 3723 3524 int ret; 3724 3525 struct nes_cm_node *cm_node; ··· 3730 3531 3731 3532 atomic_inc(&cm_connect_reqs); 3732 3533 nes_debug(NES_DBG_CM, "cm_node = %p - cm_id = %p, jiffies = %lu\n", 3733 - cm_node, cm_id, jiffies); 3534 + cm_node, cm_id, jiffies); 3734 3535 3735 3536 cm_event.event = IW_CM_EVENT_CONNECT_REQUEST; 3736 3537 cm_event.status = 0; ··· 3744 3545 cm_event.remote_addr.sin_port = htons(event->cm_info.rem_port); 3745 3546 cm_event.remote_addr.sin_addr.s_addr = htonl(event->cm_info.rem_addr); 3746 3547 cm_event.private_data = cm_node->mpa_frame_buf; 3747 - cm_event.private_data_len = (u8) cm_node->mpa_frame_size; 3548 + cm_event.private_data_len = (u8)cm_node->mpa_frame_size; 3549 + cm_event.ird = cm_node->ird_size; 3550 + cm_event.ord = cm_node->ord_size; 3748 3551 3749 3552 ret = cm_id->event_handler(cm_id, &cm_event); 3750 3553 if (ret) 3751 3554 printk(KERN_ERR "%s[%u] OFA CM event_handler returned, ret=%d\n", 3752 - __func__, __LINE__, ret); 3555 + __func__, __LINE__, ret); 3753 3556 return; 3754 3557 } 3755 3558 3756 3559 3757 3560 static void cm_event_mpa_reject(struct nes_cm_event *event) 3758 3561 { 3759 - struct iw_cm_id *cm_id; 3562 + struct iw_cm_id *cm_id; 3760 3563 struct iw_cm_event cm_event; 3761 3564 struct nes_cm_node *cm_node; 3762 3565 int ret; ··· 3770 3569 3771 3570 atomic_inc(&cm_connect_reqs); 3772 3571 nes_debug(NES_DBG_CM, "cm_node = %p - cm_id = %p, jiffies = %lu\n", 3773 - cm_node, cm_id, jiffies); 3572 + cm_node, cm_id, jiffies); 3774 3573 3775 3574 cm_event.event = IW_CM_EVENT_CONNECT_REPLY; 3776 3575 cm_event.status = -ECONNREFUSED; ··· 3785 3584 cm_event.remote_addr.sin_addr.s_addr = htonl(event->cm_info.rem_addr); 3786 3585 3787 3586 cm_event.private_data = cm_node->mpa_frame_buf; 3788 - cm_event.private_data_len = (u8) cm_node->mpa_frame_size; 3587 + cm_event.private_data_len = (u8)cm_node->mpa_frame_size; 3789 3588 3790 3589 nes_debug(NES_DBG_CM, "call CM_EVENT_MPA_REJECTED, local_addr=%08x, " 3791 - "remove_addr=%08x\n", 3792 - cm_event.local_addr.sin_addr.s_addr, 3793 - cm_event.remote_addr.sin_addr.s_addr); 3590 + "remove_addr=%08x\n", 3591 + cm_event.local_addr.sin_addr.s_addr, 3592 + cm_event.remote_addr.sin_addr.s_addr); 3794 3593 3795 3594 ret = cm_id->event_handler(cm_id, &cm_event); 3796 3595 if (ret) 3797 3596 printk(KERN_ERR "%s[%u] OFA CM event_handler returned, ret=%d\n", 3798 - __func__, __LINE__, ret); 3597 + __func__, __LINE__, ret); 3799 3598 3800 3599 return; 3801 3600 } ··· 3814 3613 event->cm_info.cm_id->add_ref(event->cm_info.cm_id); 3815 3614 INIT_WORK(&event->event_work, nes_cm_event_handler); 3816 3615 nes_debug(NES_DBG_CM, "cm_node=%p queue_work, event=%p\n", 3817 - event->cm_node, event); 3616 + event->cm_node, event); 3818 3617 3819 3618 queue_work(event->cm_node->cm_core->event_wq, &event->event_work); 3820 3619 ··· 3831 3630 static void nes_cm_event_handler(struct work_struct *work) 3832 3631 { 3833 3632 struct nes_cm_event *event = container_of(work, struct nes_cm_event, 3834 - event_work); 3633 + event_work); 3835 3634 struct nes_cm_core *cm_core; 3836 3635 3837 3636 if ((!event) || (!event->cm_node) || (!event->cm_node->cm_core)) ··· 3839 3638 3840 3639 cm_core = event->cm_node->cm_core; 3841 3640 nes_debug(NES_DBG_CM, "event=%p, event->type=%u, events posted=%u\n", 3842 - event, event->type, atomic_read(&cm_core->events_posted)); 3641 + event, event->type, atomic_read(&cm_core->events_posted)); 3843 3642 3844 3643 switch (event->type) { 3845 3644 case NES_CM_EVENT_MPA_REQ: 3846 3645 cm_event_mpa_req(event); 3847 3646 nes_debug(NES_DBG_CM, "cm_node=%p CM Event: MPA REQUEST\n", 3848 - event->cm_node); 3647 + event->cm_node); 3849 3648 break; 3850 3649 case NES_CM_EVENT_RESET: 3851 3650 nes_debug(NES_DBG_CM, "cm_node = %p CM Event: RESET\n", 3852 - event->cm_node); 3651 + event->cm_node); 3853 3652 cm_event_reset(event); 3854 3653 break; 3855 3654 case NES_CM_EVENT_CONNECTED: 3856 3655 if ((!event->cm_node->cm_id) || 3857 - (event->cm_node->state != NES_CM_STATE_TSA)) 3656 + (event->cm_node->state != NES_CM_STATE_TSA)) 3858 3657 break; 3859 3658 cm_event_connected(event); 3860 3659 nes_debug(NES_DBG_CM, "CM Event: CONNECTED\n"); 3861 3660 break; 3862 3661 case NES_CM_EVENT_MPA_REJECT: 3863 3662 if ((!event->cm_node->cm_id) || 3864 - (event->cm_node->state == NES_CM_STATE_TSA)) 3663 + (event->cm_node->state == NES_CM_STATE_TSA)) 3865 3664 break; 3866 3665 cm_event_mpa_reject(event); 3867 3666 nes_debug(NES_DBG_CM, "CM Event: REJECT\n"); ··· 3869 3668 3870 3669 case NES_CM_EVENT_ABORTED: 3871 3670 if ((!event->cm_node->cm_id) || 3872 - (event->cm_node->state == NES_CM_STATE_TSA)) 3671 + (event->cm_node->state == NES_CM_STATE_TSA)) 3873 3672 break; 3874 3673 cm_event_connect_error(event); 3875 3674 nes_debug(NES_DBG_CM, "CM Event: ABORTED\n");
+58 -17
drivers/infiniband/hw/nes/nes_cm.h
··· 48 48 #define IETF_MPA_KEY_SIZE 16 49 49 #define IETF_MPA_VERSION 1 50 50 #define IETF_MAX_PRIV_DATA_LEN 512 51 - #define IETF_MPA_FRAME_SIZE 20 51 + #define IETF_MPA_FRAME_SIZE 20 52 + #define IETF_RTR_MSG_SIZE 4 53 + #define IETF_MPA_V2_FLAG 0x10 54 + 55 + /* IETF RTR MSG Fields */ 56 + #define IETF_PEER_TO_PEER 0x8000 57 + #define IETF_FLPDU_ZERO_LEN 0x4000 58 + #define IETF_RDMA0_WRITE 0x8000 59 + #define IETF_RDMA0_READ 0x4000 60 + #define IETF_NO_IRD_ORD 0x3FFF 52 61 53 62 enum ietf_mpa_flags { 54 63 IETF_MPA_FLAGS_MARKERS = 0x80, /* receive Markers */ ··· 65 56 IETF_MPA_FLAGS_REJECT = 0x20, /* Reject */ 66 57 }; 67 58 68 - struct ietf_mpa_frame { 59 + struct ietf_mpa_v1 { 69 60 u8 key[IETF_MPA_KEY_SIZE]; 70 61 u8 flags; 71 62 u8 rev; ··· 74 65 }; 75 66 76 67 #define ietf_mpa_req_resp_frame ietf_mpa_frame 68 + 69 + struct ietf_rtr_msg { 70 + __be16 ctrl_ird; 71 + __be16 ctrl_ord; 72 + }; 73 + 74 + struct ietf_mpa_v2 { 75 + u8 key[IETF_MPA_KEY_SIZE]; 76 + u8 flags; 77 + u8 rev; 78 + __be16 priv_data_len; 79 + struct ietf_rtr_msg rtr_msg; 80 + u8 priv_data[0]; 81 + }; 77 82 78 83 struct nes_v4_quad { 79 84 u32 rsvd0; ··· 194 171 195 172 #define NES_CM_DEF_SEQ2 0x18ed5740 196 173 #define NES_CM_DEF_LOCAL_ID2 0xb807 197 - #define MAX_CM_BUFFER (IETF_MPA_FRAME_SIZE + IETF_MAX_PRIV_DATA_LEN) 198 - 174 + #define MAX_CM_BUFFER (IETF_MPA_FRAME_SIZE + IETF_RTR_MSG_SIZE + IETF_MAX_PRIV_DATA_LEN) 199 175 200 176 typedef u32 nes_addr_t; 201 177 ··· 224 202 NES_CM_STATE_CLOSING, 225 203 NES_CM_STATE_LISTENER_DESTROYED, 226 204 NES_CM_STATE_CLOSED 205 + }; 206 + 207 + enum mpa_frame_version { 208 + IETF_MPA_V1 = 1, 209 + IETF_MPA_V2 = 2 210 + }; 211 + 212 + enum mpa_frame_key { 213 + MPA_KEY_REQUEST, 214 + MPA_KEY_REPLY 215 + }; 216 + 217 + enum send_rdma0 { 218 + SEND_RDMA_READ_ZERO = 1, 219 + SEND_RDMA_WRITE_ZERO = 2 227 220 }; 228 221 229 222 enum nes_tcpip_pkt_type { ··· 282 245 283 246 284 247 enum nes_cm_listener_state { 285 - NES_CM_LISTENER_PASSIVE_STATE=1, 286 - NES_CM_LISTENER_ACTIVE_STATE=2, 287 - NES_CM_LISTENER_EITHER_STATE=3 248 + NES_CM_LISTENER_PASSIVE_STATE = 1, 249 + NES_CM_LISTENER_ACTIVE_STATE = 2, 250 + NES_CM_LISTENER_EITHER_STATE = 3 288 251 }; 289 252 290 253 struct nes_cm_listener { ··· 320 283 321 284 struct nes_cm_node *loopbackpartner; 322 285 323 - struct nes_timer_entry *send_entry; 324 - 286 + struct nes_timer_entry *send_entry; 287 + struct nes_timer_entry *recv_entry; 325 288 spinlock_t retrans_list_lock; 326 - struct nes_timer_entry *recv_entry; 289 + enum send_rdma0 send_rdma0_op; 327 290 328 - int send_write0; 329 291 union { 330 - struct ietf_mpa_frame mpa_frame; 331 - u8 mpa_frame_buf[MAX_CM_BUFFER]; 292 + struct ietf_mpa_v1 mpa_frame; 293 + struct ietf_mpa_v2 mpa_v2_frame; 294 + u8 mpa_frame_buf[MAX_CM_BUFFER]; 332 295 }; 296 + enum mpa_frame_version mpa_frame_rev; 297 + u16 ird_size; 298 + u16 ord_size; 299 + 333 300 u16 mpa_frame_size; 334 301 struct iw_cm_id *cm_id; 335 302 struct list_head list; ··· 440 399 struct nes_vnic *, u16, void *, 441 400 struct nes_cm_info *); 442 401 int (*close)(struct nes_cm_core *, struct nes_cm_node *); 443 - int (*accept)(struct nes_cm_core *, struct ietf_mpa_frame *, 444 - struct nes_cm_node *); 445 - int (*reject)(struct nes_cm_core *, struct ietf_mpa_frame *, 446 - struct nes_cm_node *); 402 + int (*accept)(struct nes_cm_core *, struct nes_cm_node *); 403 + int (*reject)(struct nes_cm_core *, struct nes_cm_node *); 447 404 int (*recv_pkt)(struct nes_cm_core *, struct nes_vnic *, 448 405 struct sk_buff *); 449 406 int (*destroy_cm_core)(struct nes_cm_core *); ··· 461 422 int nes_cm_recv(struct sk_buff *, struct net_device *); 462 423 int nes_cm_start(void); 463 424 int nes_cm_stop(void); 425 + int nes_add_ref_cm_node(struct nes_cm_node *cm_node); 426 + int nes_rem_ref_cm_node(struct nes_cm_node *cm_node); 464 427 465 428 #endif /* NES_CM_H */
+66 -33
drivers/infiniband/hw/nes/nes_hw.c
··· 110 110 }; 111 111 #endif 112 112 113 + static inline void print_ip(struct nes_cm_node *cm_node) 114 + { 115 + unsigned char *rem_addr; 116 + if (cm_node) { 117 + rem_addr = (unsigned char *)&cm_node->rem_addr; 118 + printk(KERN_ERR PFX "Remote IP addr: %pI4\n", rem_addr); 119 + } 120 + } 113 121 114 122 /** 115 123 * nes_nic_init_timer_defaults ··· 1563 1555 struct nes_hw_nic_rq_wqe *nic_rqe; 1564 1556 struct nes_hw_nic *nesnic; 1565 1557 struct nes_device *nesdev; 1558 + struct nes_rskb_cb *cb; 1566 1559 u32 rx_wqes_posted = 0; 1567 1560 1568 1561 nesnic = &nesvnic->nic; ··· 1589 1580 1590 1581 bus_address = pci_map_single(nesdev->pcidev, 1591 1582 skb->data, nesvnic->max_frame_size, PCI_DMA_FROMDEVICE); 1583 + cb = (struct nes_rskb_cb *)&skb->cb[0]; 1584 + cb->busaddr = bus_address; 1585 + cb->maplen = nesvnic->max_frame_size; 1592 1586 1593 1587 nic_rqe = &nesnic->rq_vbase[nesvnic->nic.rq_head]; 1594 1588 nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_1_0_IDX] = ··· 1681 1669 u32 cqp_head; 1682 1670 u32 counter; 1683 1671 u32 wqe_count; 1672 + struct nes_rskb_cb *cb; 1684 1673 u8 jumbomode=0; 1685 1674 1686 1675 /* Allocate fragment, SQ, RQ, and CQ; Reuse CEQ based on the PCI function */ ··· 1858 1845 1859 1846 pmem = pci_map_single(nesdev->pcidev, skb->data, 1860 1847 nesvnic->max_frame_size, PCI_DMA_FROMDEVICE); 1848 + cb = (struct nes_rskb_cb *)&skb->cb[0]; 1849 + cb->busaddr = pmem; 1850 + cb->maplen = nesvnic->max_frame_size; 1861 1851 1862 1852 nic_rqe = &nesvnic->nic.rq_vbase[counter]; 1863 1853 nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_1_0_IDX] = cpu_to_le32(nesvnic->max_frame_size); ··· 1889 1873 jumbomode = 1; 1890 1874 nes_nic_init_timer_defaults(nesdev, jumbomode); 1891 1875 } 1876 + if ((nesdev->nesadapter->allow_unaligned_fpdus) && 1877 + (nes_init_mgt_qp(nesdev, netdev, nesvnic))) { 1878 + nes_debug(NES_DBG_INIT, "%s: Out of memory for pau nic\n", netdev->name); 1879 + nes_destroy_nic_qp(nesvnic); 1880 + return -ENOMEM; 1881 + } 1882 + 1892 1883 nesvnic->lro_mgr.max_aggr = nes_lro_max_aggr; 1893 1884 nesvnic->lro_mgr.max_desc = NES_MAX_LRO_DESCRIPTORS; 1894 1885 nesvnic->lro_mgr.lro_arr = nesvnic->lro_desc; ··· 1918 1895 struct nes_device *nesdev = nesvnic->nesdev; 1919 1896 struct nes_hw_cqp_wqe *cqp_wqe; 1920 1897 struct nes_hw_nic_sq_wqe *nic_sqe; 1921 - struct nes_hw_nic_rq_wqe *nic_rqe; 1922 1898 __le16 *wqe_fragment_length; 1923 1899 u16 wqe_fragment_index; 1924 - u64 wqe_frag; 1925 1900 u32 cqp_head; 1926 1901 u32 wqm_cfg0; 1927 1902 unsigned long flags; 1903 + struct sk_buff *rx_skb; 1904 + struct nes_rskb_cb *cb; 1928 1905 int ret; 1906 + 1907 + if (nesdev->nesadapter->allow_unaligned_fpdus) 1908 + nes_destroy_mgt(nesvnic); 1929 1909 1930 1910 /* clear wqe stall before destroying NIC QP */ 1931 1911 wqm_cfg0 = nes_read_indexed(nesdev, NES_IDX_WQM_CONFIG0); ··· 1936 1910 1937 1911 /* Free remaining NIC receive buffers */ 1938 1912 while (nesvnic->nic.rq_head != nesvnic->nic.rq_tail) { 1939 - nic_rqe = &nesvnic->nic.rq_vbase[nesvnic->nic.rq_tail]; 1940 - wqe_frag = (u64)le32_to_cpu( 1941 - nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX]); 1942 - wqe_frag |= ((u64)le32_to_cpu( 1943 - nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX]))<<32; 1944 - pci_unmap_single(nesdev->pcidev, (dma_addr_t)wqe_frag, 1945 - nesvnic->max_frame_size, PCI_DMA_FROMDEVICE); 1913 + rx_skb = nesvnic->nic.rx_skb[nesvnic->nic.rq_tail]; 1914 + cb = (struct nes_rskb_cb *)&rx_skb->cb[0]; 1915 + pci_unmap_single(nesdev->pcidev, cb->busaddr, cb->maplen, 1916 + PCI_DMA_FROMDEVICE); 1917 + 1946 1918 dev_kfree_skb(nesvnic->nic.rx_skb[nesvnic->nic.rq_tail++]); 1947 1919 nesvnic->nic.rq_tail &= (nesvnic->nic.rq_size - 1); 1948 1920 } ··· 2799 2775 struct nes_hw_nic_sq_wqe *nic_sqe; 2800 2776 struct sk_buff *skb; 2801 2777 struct sk_buff *rx_skb; 2778 + struct nes_rskb_cb *cb; 2802 2779 __le16 *wqe_fragment_length; 2803 2780 u32 head; 2804 2781 u32 cq_size; ··· 2884 2859 bus_address += ((u64)le32_to_cpu(nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX])) << 32; 2885 2860 pci_unmap_single(nesdev->pcidev, bus_address, 2886 2861 nesvnic->max_frame_size, PCI_DMA_FROMDEVICE); 2862 + cb = (struct nes_rskb_cb *)&rx_skb->cb[0]; 2863 + cb->busaddr = 0; 2887 2864 /* rx_skb->tail = rx_skb->data + rx_pkt_size; */ 2888 2865 /* rx_skb->len = rx_pkt_size; */ 2889 2866 rx_skb->len = 0; /* TODO: see if this is necessary */ ··· 3010 2983 } 3011 2984 3012 2985 2986 + 3013 2987 /** 3014 2988 * nes_cqp_ce_handler 3015 2989 */ ··· 3025 2997 u32 cq_size; 3026 2998 u32 cqe_count=0; 3027 2999 u32 error_code; 3000 + u32 opcode; 3001 + u32 ctx_index; 3028 3002 /* u32 counter; */ 3029 3003 3030 3004 head = cq->cq_head; ··· 3037 3007 /* nes_debug(NES_DBG_CQP, "head=%u cqe_words=%08X\n", head, 3038 3008 le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX])); */ 3039 3009 3040 - if (le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX]) & NES_CQE_VALID) { 3041 - u64temp = (((u64)(le32_to_cpu(cq->cq_vbase[head]. 3042 - cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX]))) << 32) | 3043 - ((u64)(le32_to_cpu(cq->cq_vbase[head]. 3044 - cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX]))); 3045 - cqp = *((struct nes_hw_cqp **)&u64temp); 3010 + opcode = le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX]); 3011 + if (opcode & NES_CQE_VALID) { 3012 + cqp = &nesdev->cqp; 3046 3013 3047 3014 error_code = le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_CQE_ERROR_CODE_IDX]); 3048 3015 if (error_code) { ··· 3048 3021 le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX])&0x3f, 3049 3022 (u16)(error_code >> 16), 3050 3023 (u16)error_code); 3051 - nes_debug(NES_DBG_CQP, "cqp: qp_id=%u, sq_head=%u, sq_tail=%u\n", 3052 - cqp->qp_id, cqp->sq_head, cqp->sq_tail); 3053 3024 } 3054 3025 3055 - u64temp = (((u64)(le32_to_cpu(nesdev->cqp.sq_vbase[cqp->sq_tail]. 3056 - wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX]))) << 32) | 3057 - ((u64)(le32_to_cpu(nesdev->cqp.sq_vbase[cqp->sq_tail]. 3058 - wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX]))); 3059 - cqp_request = *((struct nes_cqp_request **)&u64temp); 3026 + u64temp = (((u64)(le32_to_cpu(cq->cq_vbase[head]. 3027 + cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX]))) << 32) | 3028 + ((u64)(le32_to_cpu(cq->cq_vbase[head]. 3029 + cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX]))); 3030 + 3031 + cqp_request = (struct nes_cqp_request *)(unsigned long)u64temp; 3060 3032 if (cqp_request) { 3061 3033 if (cqp_request->waiting) { 3062 3034 /* nes_debug(NES_DBG_CQP, "%s: Waking up requestor\n"); */ ··· 3101 3075 cqp_wqe = &nesdev->cqp.sq_vbase[head]; 3102 3076 memcpy(cqp_wqe, &cqp_request->cqp_wqe, sizeof(*cqp_wqe)); 3103 3077 barrier(); 3104 - cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX] = 3078 + 3079 + opcode = cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX]; 3080 + if ((opcode & NES_CQP_OPCODE_MASK) == NES_CQP_DOWNLOAD_SEGMENT) 3081 + ctx_index = NES_CQP_WQE_DL_COMP_CTX_LOW_IDX; 3082 + else 3083 + ctx_index = NES_CQP_WQE_COMP_CTX_LOW_IDX; 3084 + cqp_wqe->wqe_words[ctx_index] = 3105 3085 cpu_to_le32((u32)((unsigned long)cqp_request)); 3106 - cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX] = 3086 + cqp_wqe->wqe_words[ctx_index + 1] = 3107 3087 cpu_to_le32((u32)(upper_32_bits((unsigned long)cqp_request))); 3108 3088 nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) put on CQPs SQ wqe%u.\n", 3109 3089 cqp_request, le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f, head); ··· 3124 3092 cq->cq_number); 3125 3093 nes_read32(nesdev->regs+NES_CQE_ALLOC); 3126 3094 } 3127 - 3128 3095 3129 3096 static u8 *locate_mpa(u8 *pkt, u32 aeq_info) 3130 3097 { ··· 3584 3553 3585 3554 aeqe_cq_id = le32_to_cpu(aeqe->aeqe_words[NES_AEQE_COMP_QP_CQ_ID_IDX]); 3586 3555 if (aeq_info & NES_AEQE_QP) { 3587 - if ((!nes_is_resource_allocated(nesadapter, nesadapter->allocated_qps, 3588 - aeqe_cq_id)) || 3589 - (atomic_read(&nesqp->close_timer_started))) 3556 + if (!nes_is_resource_allocated(nesadapter, 3557 + nesadapter->allocated_qps, 3558 + aeqe_cq_id)) 3590 3559 return; 3591 3560 } 3592 3561 ··· 3597 3566 3598 3567 if (atomic_inc_return(&nesqp->close_timer_started) == 1) { 3599 3568 if ((tcp_state == NES_AEQE_TCP_STATE_CLOSE_WAIT) && 3600 - (nesqp->ibqp_state == IB_QPS_RTS) && 3601 - ((nesadapter->eeprom_version >> 16) != NES_A0)) { 3569 + (nesqp->ibqp_state == IB_QPS_RTS)) { 3602 3570 spin_lock_irqsave(&nesqp->lock, flags); 3603 3571 nesqp->hw_iwarp_state = iwarp_state; 3604 3572 nesqp->hw_tcp_state = tcp_state; ··· 3624 3594 return; 3625 3595 } 3626 3596 spin_lock_irqsave(&nesqp->lock, flags); 3627 - nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_CLOSING; 3597 + nesqp->hw_iwarp_state = iwarp_state; 3598 + nesqp->hw_tcp_state = tcp_state; 3599 + nesqp->last_aeq = async_event_id; 3628 3600 spin_unlock_irqrestore(&nesqp->lock, flags); 3629 - nes_hw_modify_qp(nesdev, nesqp, NES_CQP_QP_IWARP_STATE_CLOSING, 0, 0); 3630 3601 nes_cm_disconn(nesqp); 3631 3602 break; 3632 3603 ··· 3725 3694 case NES_AEQE_AEID_ROE_INVALID_RDMA_WRITE_OR_READ_RESP: 3726 3695 printk(KERN_ERR PFX "QP[%u] async_event_id=0x%04X IB_EVENT_QP_FATAL\n", 3727 3696 nesqp->hwqp.qp_id, async_event_id); 3728 - nes_terminate_connection(nesdev, nesqp, aeqe, IB_EVENT_QP_FATAL); 3697 + print_ip(nesqp->cm_node); 3698 + if (!atomic_read(&nesqp->close_timer_started)) 3699 + nes_terminate_connection(nesdev, nesqp, aeqe, IB_EVENT_QP_FATAL); 3729 3700 break; 3730 3701 3731 3702 case NES_AEQE_AEID_CQ_OPERATION_ERROR:
+34 -1
drivers/infiniband/hw/nes/nes_hw.h
··· 47 47 #define NES_MULTICAST_PF_MAX 8 48 48 #define NES_A0 3 49 49 50 + #define NES_ENABLE_PAU 0x07000001 51 + #define NES_DISABLE_PAU 0x07000000 52 + #define NES_PAU_COUNTER 10 53 + #define NES_CQP_OPCODE_MASK 0x3f 54 + 50 55 enum pci_regs { 51 56 NES_INT_STAT = 0x0000, 52 57 NES_INT_MASK = 0x0004, ··· 78 73 NES_IDX_QP_CONTROL = 0x0040, 79 74 NES_IDX_FLM_CONTROL = 0x0080, 80 75 NES_IDX_INT_CPU_STATUS = 0x00a0, 76 + NES_IDX_GPR_TRIGGER = 0x00bc, 81 77 NES_IDX_GPIO_CONTROL = 0x00f0, 82 78 NES_IDX_GPIO_DATA = 0x00f4, 79 + NES_IDX_GPR2 = 0x010c, 83 80 NES_IDX_TCP_CONFIG0 = 0x01e4, 84 81 NES_IDX_TCP_TIMER_CONFIG = 0x01ec, 85 82 NES_IDX_TCP_NOW = 0x01f0, ··· 209 202 NES_CQP_REGISTER_SHARED_STAG = 0x0c, 210 203 NES_CQP_DEALLOCATE_STAG = 0x0d, 211 204 NES_CQP_MANAGE_ARP_CACHE = 0x0f, 205 + NES_CQP_DOWNLOAD_SEGMENT = 0x10, 212 206 NES_CQP_SUSPEND_QPS = 0x11, 213 207 NES_CQP_UPLOAD_CONTEXT = 0x13, 214 208 NES_CQP_CREATE_CEQ = 0x16, ··· 218 210 NES_CQP_DESTROY_AEQ = 0x1b, 219 211 NES_CQP_LMI_ACCESS = 0x20, 220 212 NES_CQP_FLUSH_WQES = 0x22, 221 - NES_CQP_MANAGE_APBVT = 0x23 213 + NES_CQP_MANAGE_APBVT = 0x23, 214 + NES_CQP_MANAGE_QUAD_HASH = 0x25 222 215 }; 223 216 224 217 enum nes_cqp_wqe_word_idx { ··· 229 220 NES_CQP_WQE_COMP_CTX_HIGH_IDX = 3, 230 221 NES_CQP_WQE_COMP_SCRATCH_LOW_IDX = 4, 231 222 NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX = 5, 223 + }; 224 + 225 + enum nes_cqp_wqe_word_download_idx { /* format differs from other cqp ops */ 226 + NES_CQP_WQE_DL_OPCODE_IDX = 0, 227 + NES_CQP_WQE_DL_COMP_CTX_LOW_IDX = 1, 228 + NES_CQP_WQE_DL_COMP_CTX_HIGH_IDX = 2, 229 + NES_CQP_WQE_DL_LENGTH_0_TOTAL_IDX = 3 230 + /* For index values 4-15 use NES_NIC_SQ_WQE_ values */ 232 231 }; 233 232 234 233 enum nes_cqp_cq_wqeword_idx { ··· 259 242 NES_CQP_STAG_WQE_PBL_LEN_IDX = 14 260 243 }; 261 244 245 + #define NES_CQP_OP_LOGICAL_PORT_SHIFT 26 262 246 #define NES_CQP_OP_IWARP_STATE_SHIFT 28 263 247 #define NES_CQP_OP_TERMLEN_SHIFT 28 264 248 ··· 617 599 618 600 enum nes_nic_cqe_word_idx { 619 601 NES_NIC_CQE_ACCQP_ID_IDX = 0, 602 + NES_NIC_CQE_HASH_RCVNXT = 1, 620 603 NES_NIC_CQE_TAG_PKT_TYPE_IDX = 2, 621 604 NES_NIC_CQE_MISC_IDX = 3, 622 605 }; ··· 1024 1005 #define NES_NIC_CQ_DOWNWARD_TREND 16 1025 1006 #define NES_PFT_SIZE 48 1026 1007 1008 + #define NES_MGT_WQ_COUNT 32 1009 + #define NES_MGT_CTX_SIZE ((NES_NIC_CTX_RQ_SIZE_32) | (NES_NIC_CTX_SQ_SIZE_32)) 1010 + #define NES_MGT_QP_OFFSET 36 1011 + #define NES_MGT_QP_COUNT 4 1012 + 1027 1013 struct nes_hw_tune_timer { 1028 1014 /* u16 cq_count; */ 1029 1015 u16 threshold_low; ··· 1142 1118 u32 et_rate_sample_interval; 1143 1119 u32 timer_int_limit; 1144 1120 u32 wqm_quanta; 1121 + u8 allow_unaligned_fpdus; 1145 1122 1146 1123 /* Adapter base MAC address */ 1147 1124 u32 mac_addr_low; ··· 1276 1251 enum ib_event_type delayed_event; 1277 1252 enum ib_event_type last_dispatched_event; 1278 1253 spinlock_t port_ibevent_lock; 1254 + u32 mgt_mem_size; 1255 + void *mgt_vbase; 1256 + dma_addr_t mgt_pbase; 1257 + struct nes_vnic_mgt *mgtvnic[NES_MGT_QP_COUNT]; 1258 + struct task_struct *mgt_thread; 1259 + wait_queue_head_t mgt_wait_queue; 1260 + struct sk_buff_head mgt_skb_list; 1261 + 1279 1262 }; 1280 1263 1281 1264 struct nes_ib_device {
+1162
drivers/infiniband/hw/nes/nes_mgt.c
··· 1 + /* 2 + * Copyright (c) 2006 - 2009 Intel-NE, Inc. All rights reserved. 3 + * 4 + * This software is available to you under a choice of one of two 5 + * licenses. You may choose to be licensed under the terms of the GNU 6 + * General Public License (GPL) Version 2, available from the file 7 + * COPYING in the main directory of this source tree, or the 8 + * OpenIB.org BSD license below: 9 + * 10 + * Redistribution and use in source and binary forms, with or 11 + * without modification, are permitted provided that the following 12 + * conditions are met: 13 + * 14 + * - Redistributions of source code must retain the above 15 + * copyright notice, this list of conditions and the following 16 + * disclaimer. 17 + * 18 + * - Redistributions in binary form must reproduce the above 19 + * copyright notice, this list of conditions and the following 20 + * disclaimer in the documentation and/or other materials 21 + * provided with the distribution. 22 + * 23 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 + * SOFTWARE. 31 + * 32 + */ 33 + 34 + #include <linux/skbuff.h> 35 + #include <linux/etherdevice.h> 36 + #include <linux/kthread.h> 37 + #include <linux/ip.h> 38 + #include <linux/tcp.h> 39 + #include <net/tcp.h> 40 + #include "nes.h" 41 + #include "nes_mgt.h" 42 + 43 + atomic_t pau_qps_created; 44 + atomic_t pau_qps_destroyed; 45 + 46 + static void nes_replenish_mgt_rq(struct nes_vnic_mgt *mgtvnic) 47 + { 48 + unsigned long flags; 49 + dma_addr_t bus_address; 50 + struct sk_buff *skb; 51 + struct nes_hw_nic_rq_wqe *nic_rqe; 52 + struct nes_hw_mgt *nesmgt; 53 + struct nes_device *nesdev; 54 + struct nes_rskb_cb *cb; 55 + u32 rx_wqes_posted = 0; 56 + 57 + nesmgt = &mgtvnic->mgt; 58 + nesdev = mgtvnic->nesvnic->nesdev; 59 + spin_lock_irqsave(&nesmgt->rq_lock, flags); 60 + if (nesmgt->replenishing_rq != 0) { 61 + if (((nesmgt->rq_size - 1) == atomic_read(&mgtvnic->rx_skbs_needed)) && 62 + (atomic_read(&mgtvnic->rx_skb_timer_running) == 0)) { 63 + atomic_set(&mgtvnic->rx_skb_timer_running, 1); 64 + spin_unlock_irqrestore(&nesmgt->rq_lock, flags); 65 + mgtvnic->rq_wqes_timer.expires = jiffies + (HZ / 2); /* 1/2 second */ 66 + add_timer(&mgtvnic->rq_wqes_timer); 67 + } else { 68 + spin_unlock_irqrestore(&nesmgt->rq_lock, flags); 69 + } 70 + return; 71 + } 72 + nesmgt->replenishing_rq = 1; 73 + spin_unlock_irqrestore(&nesmgt->rq_lock, flags); 74 + do { 75 + skb = dev_alloc_skb(mgtvnic->nesvnic->max_frame_size); 76 + if (skb) { 77 + skb->dev = mgtvnic->nesvnic->netdev; 78 + 79 + bus_address = pci_map_single(nesdev->pcidev, 80 + skb->data, mgtvnic->nesvnic->max_frame_size, PCI_DMA_FROMDEVICE); 81 + cb = (struct nes_rskb_cb *)&skb->cb[0]; 82 + cb->busaddr = bus_address; 83 + cb->maplen = mgtvnic->nesvnic->max_frame_size; 84 + 85 + nic_rqe = &nesmgt->rq_vbase[mgtvnic->mgt.rq_head]; 86 + nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_1_0_IDX] = 87 + cpu_to_le32(mgtvnic->nesvnic->max_frame_size); 88 + nic_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_3_2_IDX] = 0; 89 + nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX] = 90 + cpu_to_le32((u32)bus_address); 91 + nic_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX] = 92 + cpu_to_le32((u32)((u64)bus_address >> 32)); 93 + nesmgt->rx_skb[nesmgt->rq_head] = skb; 94 + nesmgt->rq_head++; 95 + nesmgt->rq_head &= nesmgt->rq_size - 1; 96 + atomic_dec(&mgtvnic->rx_skbs_needed); 97 + barrier(); 98 + if (++rx_wqes_posted == 255) { 99 + nes_write32(nesdev->regs + NES_WQE_ALLOC, (rx_wqes_posted << 24) | nesmgt->qp_id); 100 + rx_wqes_posted = 0; 101 + } 102 + } else { 103 + spin_lock_irqsave(&nesmgt->rq_lock, flags); 104 + if (((nesmgt->rq_size - 1) == atomic_read(&mgtvnic->rx_skbs_needed)) && 105 + (atomic_read(&mgtvnic->rx_skb_timer_running) == 0)) { 106 + atomic_set(&mgtvnic->rx_skb_timer_running, 1); 107 + spin_unlock_irqrestore(&nesmgt->rq_lock, flags); 108 + mgtvnic->rq_wqes_timer.expires = jiffies + (HZ / 2); /* 1/2 second */ 109 + add_timer(&mgtvnic->rq_wqes_timer); 110 + } else { 111 + spin_unlock_irqrestore(&nesmgt->rq_lock, flags); 112 + } 113 + break; 114 + } 115 + } while (atomic_read(&mgtvnic->rx_skbs_needed)); 116 + barrier(); 117 + if (rx_wqes_posted) 118 + nes_write32(nesdev->regs + NES_WQE_ALLOC, (rx_wqes_posted << 24) | nesmgt->qp_id); 119 + nesmgt->replenishing_rq = 0; 120 + } 121 + 122 + /** 123 + * nes_mgt_rq_wqes_timeout 124 + */ 125 + static void nes_mgt_rq_wqes_timeout(unsigned long parm) 126 + { 127 + struct nes_vnic_mgt *mgtvnic = (struct nes_vnic_mgt *)parm; 128 + 129 + atomic_set(&mgtvnic->rx_skb_timer_running, 0); 130 + if (atomic_read(&mgtvnic->rx_skbs_needed)) 131 + nes_replenish_mgt_rq(mgtvnic); 132 + } 133 + 134 + /** 135 + * nes_mgt_free_skb - unmap and free skb 136 + */ 137 + static void nes_mgt_free_skb(struct nes_device *nesdev, struct sk_buff *skb, u32 dir) 138 + { 139 + struct nes_rskb_cb *cb; 140 + 141 + cb = (struct nes_rskb_cb *)&skb->cb[0]; 142 + pci_unmap_single(nesdev->pcidev, cb->busaddr, cb->maplen, dir); 143 + cb->busaddr = 0; 144 + dev_kfree_skb_any(skb); 145 + } 146 + 147 + /** 148 + * nes_download_callback - handle download completions 149 + */ 150 + static void nes_download_callback(struct nes_device *nesdev, struct nes_cqp_request *cqp_request) 151 + { 152 + struct pau_fpdu_info *fpdu_info = cqp_request->cqp_callback_pointer; 153 + struct nes_qp *nesqp = fpdu_info->nesqp; 154 + struct sk_buff *skb; 155 + int i; 156 + 157 + for (i = 0; i < fpdu_info->frag_cnt; i++) { 158 + skb = fpdu_info->frags[i].skb; 159 + if (fpdu_info->frags[i].cmplt) { 160 + nes_mgt_free_skb(nesdev, skb, PCI_DMA_TODEVICE); 161 + nes_rem_ref_cm_node(nesqp->cm_node); 162 + } 163 + } 164 + 165 + if (fpdu_info->hdr_vbase) 166 + pci_free_consistent(nesdev->pcidev, fpdu_info->hdr_len, 167 + fpdu_info->hdr_vbase, fpdu_info->hdr_pbase); 168 + kfree(fpdu_info); 169 + } 170 + 171 + /** 172 + * nes_get_seq - Get the seq, ack_seq and window from the packet 173 + */ 174 + static u32 nes_get_seq(struct sk_buff *skb, u32 *ack, u16 *wnd, u32 *fin_rcvd, u32 *rst_rcvd) 175 + { 176 + struct nes_rskb_cb *cb = (struct nes_rskb_cb *)&skb->cb[0]; 177 + struct iphdr *iph = (struct iphdr *)(cb->data_start + ETH_HLEN); 178 + struct tcphdr *tcph = (struct tcphdr *)(((char *)iph) + (4 * iph->ihl)); 179 + 180 + *ack = be32_to_cpu(tcph->ack_seq); 181 + *wnd = be16_to_cpu(tcph->window); 182 + *fin_rcvd = tcph->fin; 183 + *rst_rcvd = tcph->rst; 184 + return be32_to_cpu(tcph->seq); 185 + } 186 + 187 + /** 188 + * nes_get_next_skb - Get the next skb based on where current skb is in the queue 189 + */ 190 + static struct sk_buff *nes_get_next_skb(struct nes_device *nesdev, struct nes_qp *nesqp, 191 + struct sk_buff *skb, u32 nextseq, u32 *ack, 192 + u16 *wnd, u32 *fin_rcvd, u32 *rst_rcvd) 193 + { 194 + u32 seq; 195 + bool processacks; 196 + struct sk_buff *old_skb; 197 + 198 + if (skb) { 199 + /* Continue processing fpdu */ 200 + if (skb->next == (struct sk_buff *)&nesqp->pau_list) 201 + goto out; 202 + skb = skb->next; 203 + processacks = false; 204 + } else { 205 + /* Starting a new one */ 206 + if (skb_queue_empty(&nesqp->pau_list)) 207 + goto out; 208 + skb = skb_peek(&nesqp->pau_list); 209 + processacks = true; 210 + } 211 + 212 + while (1) { 213 + seq = nes_get_seq(skb, ack, wnd, fin_rcvd, rst_rcvd); 214 + if (seq == nextseq) { 215 + if (skb->len || processacks) 216 + break; 217 + } else if (after(seq, nextseq)) { 218 + goto out; 219 + } 220 + 221 + if (skb->next == (struct sk_buff *)&nesqp->pau_list) 222 + goto out; 223 + 224 + old_skb = skb; 225 + skb = skb->next; 226 + skb_unlink(old_skb, &nesqp->pau_list); 227 + nes_mgt_free_skb(nesdev, old_skb, PCI_DMA_TODEVICE); 228 + nes_rem_ref_cm_node(nesqp->cm_node); 229 + } 230 + return skb; 231 + 232 + out: 233 + return NULL; 234 + } 235 + 236 + /** 237 + * get_fpdu_info - Find the next complete fpdu and return its fragments. 238 + */ 239 + static int get_fpdu_info(struct nes_device *nesdev, struct nes_qp *nesqp, 240 + struct pau_fpdu_info **pau_fpdu_info) 241 + { 242 + struct sk_buff *skb; 243 + struct iphdr *iph; 244 + struct tcphdr *tcph; 245 + struct nes_rskb_cb *cb; 246 + struct pau_fpdu_info *fpdu_info = NULL; 247 + struct pau_fpdu_frag frags[MAX_FPDU_FRAGS]; 248 + unsigned long flags; 249 + u32 fpdu_len = 0; 250 + u32 tmp_len; 251 + int frag_cnt = 0; 252 + u32 tot_len; 253 + u32 frag_tot; 254 + u32 ack; 255 + u32 fin_rcvd; 256 + u32 rst_rcvd; 257 + u16 wnd; 258 + int i; 259 + int rc = 0; 260 + 261 + *pau_fpdu_info = NULL; 262 + 263 + spin_lock_irqsave(&nesqp->pau_lock, flags); 264 + skb = nes_get_next_skb(nesdev, nesqp, NULL, nesqp->pau_rcv_nxt, &ack, &wnd, &fin_rcvd, &rst_rcvd); 265 + if (!skb) { 266 + spin_unlock_irqrestore(&nesqp->pau_lock, flags); 267 + goto out; 268 + } 269 + cb = (struct nes_rskb_cb *)&skb->cb[0]; 270 + if (skb->len) { 271 + fpdu_len = be16_to_cpu(*(__be16 *) skb->data) + MPA_FRAMING; 272 + fpdu_len = (fpdu_len + 3) & 0xfffffffc; 273 + tmp_len = fpdu_len; 274 + 275 + /* See if we have all of the fpdu */ 276 + frag_tot = 0; 277 + memset(&frags, 0, sizeof frags); 278 + for (i = 0; i < MAX_FPDU_FRAGS; i++) { 279 + frags[i].physaddr = cb->busaddr; 280 + frags[i].physaddr += skb->data - cb->data_start; 281 + frags[i].frag_len = min(tmp_len, skb->len); 282 + frags[i].skb = skb; 283 + frags[i].cmplt = (skb->len == frags[i].frag_len); 284 + frag_tot += frags[i].frag_len; 285 + frag_cnt++; 286 + 287 + tmp_len -= frags[i].frag_len; 288 + if (tmp_len == 0) 289 + break; 290 + 291 + skb = nes_get_next_skb(nesdev, nesqp, skb, 292 + nesqp->pau_rcv_nxt + frag_tot, &ack, &wnd, &fin_rcvd, &rst_rcvd); 293 + if (!skb) { 294 + spin_unlock_irqrestore(&nesqp->pau_lock, flags); 295 + goto out; 296 + } else if (rst_rcvd) { 297 + /* rst received in the middle of fpdu */ 298 + for (; i >= 0; i--) { 299 + skb_unlink(frags[i].skb, &nesqp->pau_list); 300 + nes_mgt_free_skb(nesdev, frags[i].skb, PCI_DMA_TODEVICE); 301 + } 302 + cb = (struct nes_rskb_cb *)&skb->cb[0]; 303 + frags[0].physaddr = cb->busaddr; 304 + frags[0].physaddr += skb->data - cb->data_start; 305 + frags[0].frag_len = skb->len; 306 + frags[0].skb = skb; 307 + frags[0].cmplt = true; 308 + frag_cnt = 1; 309 + break; 310 + } 311 + 312 + cb = (struct nes_rskb_cb *)&skb->cb[0]; 313 + } 314 + } else { 315 + /* no data */ 316 + frags[0].physaddr = cb->busaddr; 317 + frags[0].frag_len = 0; 318 + frags[0].skb = skb; 319 + frags[0].cmplt = true; 320 + frag_cnt = 1; 321 + } 322 + 323 + spin_unlock_irqrestore(&nesqp->pau_lock, flags); 324 + 325 + /* Found one */ 326 + fpdu_info = kzalloc(sizeof(*fpdu_info), GFP_ATOMIC); 327 + if (fpdu_info == NULL) { 328 + nes_debug(NES_DBG_PAU, "Failed to alloc a fpdu_info.\n"); 329 + rc = -ENOMEM; 330 + goto out; 331 + } 332 + 333 + fpdu_info->cqp_request = nes_get_cqp_request(nesdev); 334 + if (fpdu_info->cqp_request == NULL) { 335 + nes_debug(NES_DBG_PAU, "Failed to get a cqp_request.\n"); 336 + rc = -ENOMEM; 337 + goto out; 338 + } 339 + 340 + cb = (struct nes_rskb_cb *)&frags[0].skb->cb[0]; 341 + iph = (struct iphdr *)(cb->data_start + ETH_HLEN); 342 + tcph = (struct tcphdr *)(((char *)iph) + (4 * iph->ihl)); 343 + fpdu_info->hdr_len = (((unsigned char *)tcph) + 4 * (tcph->doff)) - cb->data_start; 344 + fpdu_info->data_len = fpdu_len; 345 + tot_len = fpdu_info->hdr_len + fpdu_len - ETH_HLEN; 346 + 347 + if (frags[0].cmplt) { 348 + fpdu_info->hdr_pbase = cb->busaddr; 349 + fpdu_info->hdr_vbase = NULL; 350 + } else { 351 + fpdu_info->hdr_vbase = pci_alloc_consistent(nesdev->pcidev, 352 + fpdu_info->hdr_len, &fpdu_info->hdr_pbase); 353 + if (!fpdu_info->hdr_vbase) { 354 + nes_debug(NES_DBG_PAU, "Unable to allocate memory for pau first frag\n"); 355 + rc = -ENOMEM; 356 + goto out; 357 + } 358 + 359 + /* Copy hdrs, adjusting len and seqnum */ 360 + memcpy(fpdu_info->hdr_vbase, cb->data_start, fpdu_info->hdr_len); 361 + iph = (struct iphdr *)(fpdu_info->hdr_vbase + ETH_HLEN); 362 + tcph = (struct tcphdr *)(((char *)iph) + (4 * iph->ihl)); 363 + } 364 + 365 + iph->tot_len = cpu_to_be16(tot_len); 366 + iph->saddr = cpu_to_be32(0x7f000001); 367 + 368 + tcph->seq = cpu_to_be32(nesqp->pau_rcv_nxt); 369 + tcph->ack_seq = cpu_to_be32(ack); 370 + tcph->window = cpu_to_be16(wnd); 371 + 372 + nesqp->pau_rcv_nxt += fpdu_len + fin_rcvd; 373 + 374 + memcpy(fpdu_info->frags, frags, sizeof(fpdu_info->frags)); 375 + fpdu_info->frag_cnt = frag_cnt; 376 + fpdu_info->nesqp = nesqp; 377 + *pau_fpdu_info = fpdu_info; 378 + 379 + /* Update skb's for next pass */ 380 + for (i = 0; i < frag_cnt; i++) { 381 + cb = (struct nes_rskb_cb *)&frags[i].skb->cb[0]; 382 + skb_pull(frags[i].skb, frags[i].frag_len); 383 + 384 + if (frags[i].skb->len == 0) { 385 + /* Pull skb off the list - it will be freed in the callback */ 386 + spin_lock_irqsave(&nesqp->pau_lock, flags); 387 + skb_unlink(frags[i].skb, &nesqp->pau_list); 388 + spin_unlock_irqrestore(&nesqp->pau_lock, flags); 389 + } else { 390 + /* Last skb still has data so update the seq */ 391 + iph = (struct iphdr *)(cb->data_start + ETH_HLEN); 392 + tcph = (struct tcphdr *)(((char *)iph) + (4 * iph->ihl)); 393 + tcph->seq = cpu_to_be32(nesqp->pau_rcv_nxt); 394 + } 395 + } 396 + 397 + out: 398 + if (rc) { 399 + if (fpdu_info) { 400 + if (fpdu_info->cqp_request) 401 + nes_put_cqp_request(nesdev, fpdu_info->cqp_request); 402 + kfree(fpdu_info); 403 + } 404 + } 405 + return rc; 406 + } 407 + 408 + /** 409 + * forward_fpdu - send complete fpdus, one at a time 410 + */ 411 + static int forward_fpdus(struct nes_vnic *nesvnic, struct nes_qp *nesqp) 412 + { 413 + struct nes_device *nesdev = nesvnic->nesdev; 414 + struct pau_fpdu_info *fpdu_info; 415 + struct nes_hw_cqp_wqe *cqp_wqe; 416 + struct nes_cqp_request *cqp_request; 417 + u64 u64tmp; 418 + u32 u32tmp; 419 + int rc; 420 + 421 + while (1) { 422 + rc = get_fpdu_info(nesdev, nesqp, &fpdu_info); 423 + if (fpdu_info == NULL) 424 + return rc; 425 + 426 + cqp_request = fpdu_info->cqp_request; 427 + cqp_wqe = &cqp_request->cqp_wqe; 428 + nes_fill_init_cqp_wqe(cqp_wqe, nesdev); 429 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_DL_OPCODE_IDX, 430 + NES_CQP_DOWNLOAD_SEGMENT | 431 + (((u32)nesvnic->logical_port) << NES_CQP_OP_LOGICAL_PORT_SHIFT)); 432 + 433 + u32tmp = fpdu_info->hdr_len << 16; 434 + u32tmp |= fpdu_info->hdr_len + (u32)fpdu_info->data_len; 435 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_DL_LENGTH_0_TOTAL_IDX, 436 + u32tmp); 437 + 438 + u32tmp = (fpdu_info->frags[1].frag_len << 16) | fpdu_info->frags[0].frag_len; 439 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_NIC_SQ_WQE_LENGTH_2_1_IDX, 440 + u32tmp); 441 + 442 + u32tmp = (fpdu_info->frags[3].frag_len << 16) | fpdu_info->frags[2].frag_len; 443 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_NIC_SQ_WQE_LENGTH_4_3_IDX, 444 + u32tmp); 445 + 446 + u64tmp = (u64)fpdu_info->hdr_pbase; 447 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_NIC_SQ_WQE_FRAG0_LOW_IDX, 448 + lower_32_bits(u64tmp)); 449 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_NIC_SQ_WQE_FRAG0_HIGH_IDX, 450 + upper_32_bits(u64tmp >> 32)); 451 + 452 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_NIC_SQ_WQE_FRAG1_LOW_IDX, 453 + lower_32_bits(fpdu_info->frags[0].physaddr)); 454 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_NIC_SQ_WQE_FRAG1_HIGH_IDX, 455 + upper_32_bits(fpdu_info->frags[0].physaddr)); 456 + 457 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_NIC_SQ_WQE_FRAG2_LOW_IDX, 458 + lower_32_bits(fpdu_info->frags[1].physaddr)); 459 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_NIC_SQ_WQE_FRAG2_HIGH_IDX, 460 + upper_32_bits(fpdu_info->frags[1].physaddr)); 461 + 462 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_NIC_SQ_WQE_FRAG3_LOW_IDX, 463 + lower_32_bits(fpdu_info->frags[2].physaddr)); 464 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_NIC_SQ_WQE_FRAG3_HIGH_IDX, 465 + upper_32_bits(fpdu_info->frags[2].physaddr)); 466 + 467 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_NIC_SQ_WQE_FRAG4_LOW_IDX, 468 + lower_32_bits(fpdu_info->frags[3].physaddr)); 469 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_NIC_SQ_WQE_FRAG4_HIGH_IDX, 470 + upper_32_bits(fpdu_info->frags[3].physaddr)); 471 + 472 + cqp_request->cqp_callback_pointer = fpdu_info; 473 + cqp_request->callback = 1; 474 + cqp_request->cqp_callback = nes_download_callback; 475 + 476 + atomic_set(&cqp_request->refcount, 1); 477 + nes_post_cqp_request(nesdev, cqp_request); 478 + } 479 + 480 + return 0; 481 + } 482 + 483 + static void process_fpdus(struct nes_vnic *nesvnic, struct nes_qp *nesqp) 484 + { 485 + int again = 1; 486 + unsigned long flags; 487 + 488 + do { 489 + /* Ignore rc - if it failed, tcp retries will cause it to try again */ 490 + forward_fpdus(nesvnic, nesqp); 491 + 492 + spin_lock_irqsave(&nesqp->pau_lock, flags); 493 + if (nesqp->pau_pending) { 494 + nesqp->pau_pending = 0; 495 + } else { 496 + nesqp->pau_busy = 0; 497 + again = 0; 498 + } 499 + 500 + spin_unlock_irqrestore(&nesqp->pau_lock, flags); 501 + } while (again); 502 + } 503 + 504 + /** 505 + * queue_fpdus - Handle fpdu's that hw passed up to sw 506 + */ 507 + static void queue_fpdus(struct sk_buff *skb, struct nes_vnic *nesvnic, struct nes_qp *nesqp) 508 + { 509 + struct sk_buff *tmpskb; 510 + struct nes_rskb_cb *cb; 511 + struct iphdr *iph; 512 + struct tcphdr *tcph; 513 + unsigned char *tcph_end; 514 + u32 rcv_nxt; 515 + u32 rcv_wnd; 516 + u32 seqnum; 517 + u32 len; 518 + bool process_it = false; 519 + unsigned long flags; 520 + 521 + /* Move data ptr to after tcp header */ 522 + iph = (struct iphdr *)skb->data; 523 + tcph = (struct tcphdr *)(((char *)iph) + (4 * iph->ihl)); 524 + seqnum = be32_to_cpu(tcph->seq); 525 + tcph_end = (((char *)tcph) + (4 * tcph->doff)); 526 + 527 + len = be16_to_cpu(iph->tot_len); 528 + if (skb->len > len) 529 + skb_trim(skb, len); 530 + skb_pull(skb, tcph_end - skb->data); 531 + 532 + /* Initialize tracking values */ 533 + cb = (struct nes_rskb_cb *)&skb->cb[0]; 534 + cb->seqnum = seqnum; 535 + 536 + /* Make sure data is in the receive window */ 537 + rcv_nxt = nesqp->pau_rcv_nxt; 538 + rcv_wnd = le32_to_cpu(nesqp->nesqp_context->rcv_wnd); 539 + if (!between(seqnum, rcv_nxt, (rcv_nxt + rcv_wnd))) { 540 + nes_mgt_free_skb(nesvnic->nesdev, skb, PCI_DMA_TODEVICE); 541 + nes_rem_ref_cm_node(nesqp->cm_node); 542 + return; 543 + } 544 + 545 + spin_lock_irqsave(&nesqp->pau_lock, flags); 546 + 547 + if (nesqp->pau_busy) 548 + nesqp->pau_pending = 1; 549 + else 550 + nesqp->pau_busy = 1; 551 + 552 + /* Queue skb by sequence number */ 553 + if (skb_queue_len(&nesqp->pau_list) == 0) { 554 + skb_queue_head(&nesqp->pau_list, skb); 555 + } else { 556 + tmpskb = nesqp->pau_list.next; 557 + while (tmpskb != (struct sk_buff *)&nesqp->pau_list) { 558 + cb = (struct nes_rskb_cb *)&tmpskb->cb[0]; 559 + if (before(seqnum, cb->seqnum)) 560 + break; 561 + tmpskb = tmpskb->next; 562 + } 563 + skb_insert(tmpskb, skb, &nesqp->pau_list); 564 + } 565 + if (nesqp->pau_state == PAU_READY) 566 + process_it = true; 567 + spin_unlock_irqrestore(&nesqp->pau_lock, flags); 568 + 569 + if (process_it) 570 + process_fpdus(nesvnic, nesqp); 571 + 572 + return; 573 + } 574 + 575 + /** 576 + * mgt_thread - Handle mgt skbs in a safe context 577 + */ 578 + static int mgt_thread(void *context) 579 + { 580 + struct nes_vnic *nesvnic = context; 581 + struct sk_buff *skb; 582 + struct nes_rskb_cb *cb; 583 + 584 + while (!kthread_should_stop()) { 585 + wait_event_interruptible(nesvnic->mgt_wait_queue, 586 + skb_queue_len(&nesvnic->mgt_skb_list) || kthread_should_stop()); 587 + while ((skb_queue_len(&nesvnic->mgt_skb_list)) && !kthread_should_stop()) { 588 + skb = skb_dequeue(&nesvnic->mgt_skb_list); 589 + cb = (struct nes_rskb_cb *)&skb->cb[0]; 590 + cb->data_start = skb->data - ETH_HLEN; 591 + cb->busaddr = pci_map_single(nesvnic->nesdev->pcidev, cb->data_start, 592 + nesvnic->max_frame_size, PCI_DMA_TODEVICE); 593 + queue_fpdus(skb, nesvnic, cb->nesqp); 594 + } 595 + } 596 + 597 + /* Closing down so delete any entries on the queue */ 598 + while (skb_queue_len(&nesvnic->mgt_skb_list)) { 599 + skb = skb_dequeue(&nesvnic->mgt_skb_list); 600 + cb = (struct nes_rskb_cb *)&skb->cb[0]; 601 + nes_rem_ref_cm_node(cb->nesqp->cm_node); 602 + dev_kfree_skb_any(skb); 603 + } 604 + return 0; 605 + } 606 + 607 + /** 608 + * nes_queue_skbs - Queue skb so it can be handled in a thread context 609 + */ 610 + void nes_queue_mgt_skbs(struct sk_buff *skb, struct nes_vnic *nesvnic, struct nes_qp *nesqp) 611 + { 612 + struct nes_rskb_cb *cb; 613 + 614 + cb = (struct nes_rskb_cb *)&skb->cb[0]; 615 + cb->nesqp = nesqp; 616 + skb_queue_tail(&nesvnic->mgt_skb_list, skb); 617 + wake_up_interruptible(&nesvnic->mgt_wait_queue); 618 + } 619 + 620 + void nes_destroy_pau_qp(struct nes_device *nesdev, struct nes_qp *nesqp) 621 + { 622 + struct sk_buff *skb; 623 + unsigned long flags; 624 + atomic_inc(&pau_qps_destroyed); 625 + 626 + /* Free packets that have not yet been forwarded */ 627 + /* Lock is acquired by skb_dequeue when removing the skb */ 628 + spin_lock_irqsave(&nesqp->pau_lock, flags); 629 + while (skb_queue_len(&nesqp->pau_list)) { 630 + skb = skb_dequeue(&nesqp->pau_list); 631 + nes_mgt_free_skb(nesdev, skb, PCI_DMA_TODEVICE); 632 + nes_rem_ref_cm_node(nesqp->cm_node); 633 + } 634 + spin_unlock_irqrestore(&nesqp->pau_lock, flags); 635 + } 636 + 637 + static void nes_chg_qh_handler(struct nes_device *nesdev, struct nes_cqp_request *cqp_request) 638 + { 639 + struct pau_qh_chg *qh_chg = cqp_request->cqp_callback_pointer; 640 + struct nes_cqp_request *new_request; 641 + struct nes_hw_cqp_wqe *cqp_wqe; 642 + struct nes_adapter *nesadapter; 643 + struct nes_qp *nesqp; 644 + struct nes_v4_quad nes_quad; 645 + u32 crc_value; 646 + u64 u64temp; 647 + 648 + nesadapter = nesdev->nesadapter; 649 + nesqp = qh_chg->nesqp; 650 + 651 + /* Should we handle the bad completion */ 652 + if (cqp_request->major_code) { 653 + printk(KERN_ERR PFX "Invalid cqp_request major_code=0x%x\n", 654 + cqp_request->major_code); 655 + WARN_ON(1); 656 + } 657 + 658 + switch (nesqp->pau_state) { 659 + case PAU_DEL_QH: 660 + /* Old hash code deleted, now set the new one */ 661 + nesqp->pau_state = PAU_ADD_LB_QH; 662 + new_request = nes_get_cqp_request(nesdev); 663 + if (new_request == NULL) { 664 + nes_debug(NES_DBG_PAU, "Failed to get a new_request.\n"); 665 + WARN_ON(1); 666 + return; 667 + } 668 + 669 + memset(&nes_quad, 0, sizeof(nes_quad)); 670 + nes_quad.DstIpAdrIndex = 671 + cpu_to_le32((u32)PCI_FUNC(nesdev->pcidev->devfn) << 24); 672 + nes_quad.SrcIpadr = cpu_to_be32(0x7f000001); 673 + nes_quad.TcpPorts[0] = swab16(nesqp->nesqp_context->tcpPorts[1]); 674 + nes_quad.TcpPorts[1] = swab16(nesqp->nesqp_context->tcpPorts[0]); 675 + 676 + /* Produce hash key */ 677 + crc_value = get_crc_value(&nes_quad); 678 + nesqp->hte_index = cpu_to_be32(crc_value ^ 0xffffffff); 679 + nes_debug(NES_DBG_PAU, "new HTE Index = 0x%08X, CRC = 0x%08X\n", 680 + nesqp->hte_index, nesqp->hte_index & nesadapter->hte_index_mask); 681 + 682 + nesqp->hte_index &= nesadapter->hte_index_mask; 683 + nesqp->nesqp_context->hte_index = cpu_to_le32(nesqp->hte_index); 684 + nesqp->nesqp_context->ip0 = cpu_to_le32(0x7f000001); 685 + nesqp->nesqp_context->rcv_nxt = cpu_to_le32(nesqp->pau_rcv_nxt); 686 + 687 + cqp_wqe = &new_request->cqp_wqe; 688 + nes_fill_init_cqp_wqe(cqp_wqe, nesdev); 689 + set_wqe_32bit_value(cqp_wqe->wqe_words, 690 + NES_CQP_WQE_OPCODE_IDX, NES_CQP_MANAGE_QUAD_HASH | 691 + NES_CQP_QP_TYPE_IWARP | NES_CQP_QP_CONTEXT_VALID | NES_CQP_QP_IWARP_STATE_RTS); 692 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX, nesqp->hwqp.qp_id); 693 + u64temp = (u64)nesqp->nesqp_context_pbase; 694 + set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, u64temp); 695 + 696 + nes_debug(NES_DBG_PAU, "Waiting for CQP completion for adding the quad hash.\n"); 697 + 698 + new_request->cqp_callback_pointer = qh_chg; 699 + new_request->callback = 1; 700 + new_request->cqp_callback = nes_chg_qh_handler; 701 + atomic_set(&new_request->refcount, 1); 702 + nes_post_cqp_request(nesdev, new_request); 703 + break; 704 + 705 + case PAU_ADD_LB_QH: 706 + /* Start processing the queued fpdu's */ 707 + nesqp->pau_state = PAU_READY; 708 + process_fpdus(qh_chg->nesvnic, qh_chg->nesqp); 709 + kfree(qh_chg); 710 + break; 711 + } 712 + } 713 + 714 + /** 715 + * nes_change_quad_hash 716 + */ 717 + static int nes_change_quad_hash(struct nes_device *nesdev, 718 + struct nes_vnic *nesvnic, struct nes_qp *nesqp) 719 + { 720 + struct nes_cqp_request *cqp_request = NULL; 721 + struct pau_qh_chg *qh_chg = NULL; 722 + u64 u64temp; 723 + struct nes_hw_cqp_wqe *cqp_wqe; 724 + int ret = 0; 725 + 726 + cqp_request = nes_get_cqp_request(nesdev); 727 + if (cqp_request == NULL) { 728 + nes_debug(NES_DBG_PAU, "Failed to get a cqp_request.\n"); 729 + ret = -ENOMEM; 730 + goto chg_qh_err; 731 + } 732 + 733 + qh_chg = kmalloc(sizeof *qh_chg, GFP_ATOMIC); 734 + if (qh_chg == NULL) { 735 + nes_debug(NES_DBG_PAU, "Failed to get a cqp_request.\n"); 736 + ret = -ENOMEM; 737 + goto chg_qh_err; 738 + } 739 + qh_chg->nesdev = nesdev; 740 + qh_chg->nesvnic = nesvnic; 741 + qh_chg->nesqp = nesqp; 742 + nesqp->pau_state = PAU_DEL_QH; 743 + 744 + cqp_wqe = &cqp_request->cqp_wqe; 745 + nes_fill_init_cqp_wqe(cqp_wqe, nesdev); 746 + set_wqe_32bit_value(cqp_wqe->wqe_words, 747 + NES_CQP_WQE_OPCODE_IDX, NES_CQP_MANAGE_QUAD_HASH | NES_CQP_QP_DEL_HTE | 748 + NES_CQP_QP_TYPE_IWARP | NES_CQP_QP_CONTEXT_VALID | NES_CQP_QP_IWARP_STATE_RTS); 749 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX, nesqp->hwqp.qp_id); 750 + u64temp = (u64)nesqp->nesqp_context_pbase; 751 + set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, u64temp); 752 + 753 + nes_debug(NES_DBG_PAU, "Waiting for CQP completion for deleting the quad hash.\n"); 754 + 755 + cqp_request->cqp_callback_pointer = qh_chg; 756 + cqp_request->callback = 1; 757 + cqp_request->cqp_callback = nes_chg_qh_handler; 758 + atomic_set(&cqp_request->refcount, 1); 759 + nes_post_cqp_request(nesdev, cqp_request); 760 + 761 + return ret; 762 + 763 + chg_qh_err: 764 + kfree(qh_chg); 765 + if (cqp_request) 766 + nes_put_cqp_request(nesdev, cqp_request); 767 + return ret; 768 + } 769 + 770 + /** 771 + * nes_mgt_ce_handler 772 + * This management code deals with any packed and unaligned (pau) fpdu's 773 + * that the hardware cannot handle. 774 + */ 775 + static void nes_mgt_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq) 776 + { 777 + struct nes_vnic_mgt *mgtvnic = container_of(cq, struct nes_vnic_mgt, mgt_cq); 778 + struct nes_adapter *nesadapter = nesdev->nesadapter; 779 + u32 head; 780 + u32 cq_size; 781 + u32 cqe_count = 0; 782 + u32 cqe_misc; 783 + u32 qp_id = 0; 784 + u32 skbs_needed; 785 + unsigned long context; 786 + struct nes_qp *nesqp; 787 + struct sk_buff *rx_skb; 788 + struct nes_rskb_cb *cb; 789 + 790 + head = cq->cq_head; 791 + cq_size = cq->cq_size; 792 + 793 + while (1) { 794 + cqe_misc = le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_NIC_CQE_MISC_IDX]); 795 + if (!(cqe_misc & NES_NIC_CQE_VALID)) 796 + break; 797 + 798 + nesqp = NULL; 799 + if (cqe_misc & NES_NIC_CQE_ACCQP_VALID) { 800 + qp_id = le32_to_cpu(cq->cq_vbase[head].cqe_words[NES_NIC_CQE_ACCQP_ID_IDX]); 801 + qp_id &= 0x001fffff; 802 + if (qp_id < nesadapter->max_qp) { 803 + context = (unsigned long)nesadapter->qp_table[qp_id - NES_FIRST_QPN]; 804 + nesqp = (struct nes_qp *)context; 805 + } 806 + } 807 + 808 + if (nesqp) { 809 + if (nesqp->pau_mode == false) { 810 + nesqp->pau_mode = true; /* First time for this qp */ 811 + nesqp->pau_rcv_nxt = le32_to_cpu( 812 + cq->cq_vbase[head].cqe_words[NES_NIC_CQE_HASH_RCVNXT]); 813 + skb_queue_head_init(&nesqp->pau_list); 814 + spin_lock_init(&nesqp->pau_lock); 815 + atomic_inc(&pau_qps_created); 816 + nes_change_quad_hash(nesdev, mgtvnic->nesvnic, nesqp); 817 + } 818 + 819 + rx_skb = mgtvnic->mgt.rx_skb[mgtvnic->mgt.rq_tail]; 820 + rx_skb->len = 0; 821 + skb_put(rx_skb, cqe_misc & 0x0000ffff); 822 + rx_skb->protocol = eth_type_trans(rx_skb, mgtvnic->nesvnic->netdev); 823 + cb = (struct nes_rskb_cb *)&rx_skb->cb[0]; 824 + pci_unmap_single(nesdev->pcidev, cb->busaddr, cb->maplen, PCI_DMA_FROMDEVICE); 825 + cb->busaddr = 0; 826 + mgtvnic->mgt.rq_tail++; 827 + mgtvnic->mgt.rq_tail &= mgtvnic->mgt.rq_size - 1; 828 + 829 + nes_add_ref_cm_node(nesqp->cm_node); 830 + nes_queue_mgt_skbs(rx_skb, mgtvnic->nesvnic, nesqp); 831 + } else { 832 + printk(KERN_ERR PFX "Invalid QP %d for packed/unaligned handling\n", qp_id); 833 + } 834 + 835 + cq->cq_vbase[head].cqe_words[NES_NIC_CQE_MISC_IDX] = 0; 836 + cqe_count++; 837 + if (++head >= cq_size) 838 + head = 0; 839 + 840 + if (cqe_count == 255) { 841 + /* Replenish mgt CQ */ 842 + nes_write32(nesdev->regs + NES_CQE_ALLOC, cq->cq_number | (cqe_count << 16)); 843 + nesdev->currcq_count += cqe_count; 844 + cqe_count = 0; 845 + } 846 + 847 + skbs_needed = atomic_inc_return(&mgtvnic->rx_skbs_needed); 848 + if (skbs_needed > (mgtvnic->mgt.rq_size >> 1)) 849 + nes_replenish_mgt_rq(mgtvnic); 850 + } 851 + 852 + cq->cq_head = head; 853 + nes_write32(nesdev->regs + NES_CQE_ALLOC, NES_CQE_ALLOC_NOTIFY_NEXT | 854 + cq->cq_number | (cqe_count << 16)); 855 + nes_read32(nesdev->regs + NES_CQE_ALLOC); 856 + nesdev->currcq_count += cqe_count; 857 + } 858 + 859 + /** 860 + * nes_init_mgt_qp 861 + */ 862 + int nes_init_mgt_qp(struct nes_device *nesdev, struct net_device *netdev, struct nes_vnic *nesvnic) 863 + { 864 + struct nes_vnic_mgt *mgtvnic; 865 + u32 counter; 866 + void *vmem; 867 + dma_addr_t pmem; 868 + struct nes_hw_cqp_wqe *cqp_wqe; 869 + u32 cqp_head; 870 + unsigned long flags; 871 + struct nes_hw_nic_qp_context *mgt_context; 872 + u64 u64temp; 873 + struct nes_hw_nic_rq_wqe *mgt_rqe; 874 + struct sk_buff *skb; 875 + u32 wqe_count; 876 + struct nes_rskb_cb *cb; 877 + u32 mgt_mem_size; 878 + void *mgt_vbase; 879 + dma_addr_t mgt_pbase; 880 + int i; 881 + int ret; 882 + 883 + /* Allocate space the all mgt QPs once */ 884 + mgtvnic = kzalloc(NES_MGT_QP_COUNT * sizeof(struct nes_vnic_mgt), GFP_KERNEL); 885 + if (mgtvnic == NULL) { 886 + nes_debug(NES_DBG_INIT, "Unable to allocate memory for mgt structure\n"); 887 + return -ENOMEM; 888 + } 889 + 890 + /* Allocate fragment, RQ, and CQ; Reuse CEQ based on the PCI function */ 891 + /* We are not sending from this NIC so sq is not allocated */ 892 + mgt_mem_size = 256 + 893 + (NES_MGT_WQ_COUNT * sizeof(struct nes_hw_nic_rq_wqe)) + 894 + (NES_MGT_WQ_COUNT * sizeof(struct nes_hw_nic_cqe)) + 895 + sizeof(struct nes_hw_nic_qp_context); 896 + mgt_mem_size = (mgt_mem_size + PAGE_SIZE - 1) & ~(PAGE_SIZE - 1); 897 + mgt_vbase = pci_alloc_consistent(nesdev->pcidev, NES_MGT_QP_COUNT * mgt_mem_size, &mgt_pbase); 898 + if (!mgt_vbase) { 899 + kfree(mgtvnic); 900 + nes_debug(NES_DBG_INIT, "Unable to allocate memory for mgt host descriptor rings\n"); 901 + return -ENOMEM; 902 + } 903 + 904 + nesvnic->mgt_mem_size = NES_MGT_QP_COUNT * mgt_mem_size; 905 + nesvnic->mgt_vbase = mgt_vbase; 906 + nesvnic->mgt_pbase = mgt_pbase; 907 + 908 + skb_queue_head_init(&nesvnic->mgt_skb_list); 909 + init_waitqueue_head(&nesvnic->mgt_wait_queue); 910 + nesvnic->mgt_thread = kthread_run(mgt_thread, nesvnic, "nes_mgt_thread"); 911 + 912 + for (i = 0; i < NES_MGT_QP_COUNT; i++) { 913 + mgtvnic->nesvnic = nesvnic; 914 + mgtvnic->mgt.qp_id = nesdev->mac_index + NES_MGT_QP_OFFSET + i; 915 + memset(mgt_vbase, 0, mgt_mem_size); 916 + nes_debug(NES_DBG_INIT, "Allocated mgt QP structures at %p (phys = %016lX), size = %u.\n", 917 + mgt_vbase, (unsigned long)mgt_pbase, mgt_mem_size); 918 + 919 + vmem = (void *)(((unsigned long)mgt_vbase + (256 - 1)) & 920 + ~(unsigned long)(256 - 1)); 921 + pmem = (dma_addr_t)(((unsigned long long)mgt_pbase + (256 - 1)) & 922 + ~(unsigned long long)(256 - 1)); 923 + 924 + spin_lock_init(&mgtvnic->mgt.rq_lock); 925 + 926 + /* setup the RQ */ 927 + mgtvnic->mgt.rq_vbase = vmem; 928 + mgtvnic->mgt.rq_pbase = pmem; 929 + mgtvnic->mgt.rq_head = 0; 930 + mgtvnic->mgt.rq_tail = 0; 931 + mgtvnic->mgt.rq_size = NES_MGT_WQ_COUNT; 932 + 933 + /* setup the CQ */ 934 + vmem += (NES_MGT_WQ_COUNT * sizeof(struct nes_hw_nic_rq_wqe)); 935 + pmem += (NES_MGT_WQ_COUNT * sizeof(struct nes_hw_nic_rq_wqe)); 936 + 937 + mgtvnic->mgt_cq.cq_number = mgtvnic->mgt.qp_id; 938 + mgtvnic->mgt_cq.cq_vbase = vmem; 939 + mgtvnic->mgt_cq.cq_pbase = pmem; 940 + mgtvnic->mgt_cq.cq_head = 0; 941 + mgtvnic->mgt_cq.cq_size = NES_MGT_WQ_COUNT; 942 + 943 + mgtvnic->mgt_cq.ce_handler = nes_mgt_ce_handler; 944 + 945 + /* Send CreateCQ request to CQP */ 946 + spin_lock_irqsave(&nesdev->cqp.lock, flags); 947 + cqp_head = nesdev->cqp.sq_head; 948 + 949 + cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head]; 950 + nes_fill_init_cqp_wqe(cqp_wqe, nesdev); 951 + 952 + cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] = cpu_to_le32( 953 + NES_CQP_CREATE_CQ | NES_CQP_CQ_CEQ_VALID | 954 + ((u32)mgtvnic->mgt_cq.cq_size << 16)); 955 + cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX] = cpu_to_le32( 956 + mgtvnic->mgt_cq.cq_number | ((u32)nesdev->ceq_index << 16)); 957 + u64temp = (u64)mgtvnic->mgt_cq.cq_pbase; 958 + set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_CQ_WQE_PBL_LOW_IDX, u64temp); 959 + cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_HIGH_IDX] = 0; 960 + u64temp = (unsigned long)&mgtvnic->mgt_cq; 961 + cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_LOW_IDX] = cpu_to_le32((u32)(u64temp >> 1)); 962 + cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_HIGH_IDX] = 963 + cpu_to_le32(((u32)((u64temp) >> 33)) & 0x7FFFFFFF); 964 + cqp_wqe->wqe_words[NES_CQP_CQ_WQE_DOORBELL_INDEX_HIGH_IDX] = 0; 965 + 966 + if (++cqp_head >= nesdev->cqp.sq_size) 967 + cqp_head = 0; 968 + cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head]; 969 + nes_fill_init_cqp_wqe(cqp_wqe, nesdev); 970 + 971 + /* Send CreateQP request to CQP */ 972 + mgt_context = (void *)(&mgtvnic->mgt_cq.cq_vbase[mgtvnic->mgt_cq.cq_size]); 973 + mgt_context->context_words[NES_NIC_CTX_MISC_IDX] = 974 + cpu_to_le32((u32)NES_MGT_CTX_SIZE | 975 + ((u32)PCI_FUNC(nesdev->pcidev->devfn) << 12)); 976 + nes_debug(NES_DBG_INIT, "RX_WINDOW_BUFFER_PAGE_TABLE_SIZE = 0x%08X, RX_WINDOW_BUFFER_SIZE = 0x%08X\n", 977 + nes_read_indexed(nesdev, NES_IDX_RX_WINDOW_BUFFER_PAGE_TABLE_SIZE), 978 + nes_read_indexed(nesdev, NES_IDX_RX_WINDOW_BUFFER_SIZE)); 979 + if (nes_read_indexed(nesdev, NES_IDX_RX_WINDOW_BUFFER_SIZE) != 0) 980 + mgt_context->context_words[NES_NIC_CTX_MISC_IDX] |= cpu_to_le32(NES_NIC_BACK_STORE); 981 + 982 + u64temp = (u64)mgtvnic->mgt.rq_pbase; 983 + mgt_context->context_words[NES_NIC_CTX_SQ_LOW_IDX] = cpu_to_le32((u32)u64temp); 984 + mgt_context->context_words[NES_NIC_CTX_SQ_HIGH_IDX] = cpu_to_le32((u32)(u64temp >> 32)); 985 + u64temp = (u64)mgtvnic->mgt.rq_pbase; 986 + mgt_context->context_words[NES_NIC_CTX_RQ_LOW_IDX] = cpu_to_le32((u32)u64temp); 987 + mgt_context->context_words[NES_NIC_CTX_RQ_HIGH_IDX] = cpu_to_le32((u32)(u64temp >> 32)); 988 + 989 + cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] = cpu_to_le32(NES_CQP_CREATE_QP | 990 + NES_CQP_QP_TYPE_NIC); 991 + cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX] = cpu_to_le32(mgtvnic->mgt.qp_id); 992 + u64temp = (u64)mgtvnic->mgt_cq.cq_pbase + 993 + (mgtvnic->mgt_cq.cq_size * sizeof(struct nes_hw_nic_cqe)); 994 + set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, u64temp); 995 + 996 + if (++cqp_head >= nesdev->cqp.sq_size) 997 + cqp_head = 0; 998 + nesdev->cqp.sq_head = cqp_head; 999 + 1000 + barrier(); 1001 + 1002 + /* Ring doorbell (2 WQEs) */ 1003 + nes_write32(nesdev->regs + NES_WQE_ALLOC, 0x02800000 | nesdev->cqp.qp_id); 1004 + 1005 + spin_unlock_irqrestore(&nesdev->cqp.lock, flags); 1006 + nes_debug(NES_DBG_INIT, "Waiting for create MGT QP%u to complete.\n", 1007 + mgtvnic->mgt.qp_id); 1008 + 1009 + ret = wait_event_timeout(nesdev->cqp.waitq, (nesdev->cqp.sq_tail == cqp_head), 1010 + NES_EVENT_TIMEOUT); 1011 + nes_debug(NES_DBG_INIT, "Create MGT QP%u completed, wait_event_timeout ret = %u.\n", 1012 + mgtvnic->mgt.qp_id, ret); 1013 + if (!ret) { 1014 + nes_debug(NES_DBG_INIT, "MGT QP%u create timeout expired\n", mgtvnic->mgt.qp_id); 1015 + if (i == 0) { 1016 + pci_free_consistent(nesdev->pcidev, nesvnic->mgt_mem_size, nesvnic->mgt_vbase, 1017 + nesvnic->mgt_pbase); 1018 + kfree(mgtvnic); 1019 + } else { 1020 + nes_destroy_mgt(nesvnic); 1021 + } 1022 + return -EIO; 1023 + } 1024 + 1025 + /* Populate the RQ */ 1026 + for (counter = 0; counter < (NES_MGT_WQ_COUNT - 1); counter++) { 1027 + skb = dev_alloc_skb(nesvnic->max_frame_size); 1028 + if (!skb) { 1029 + nes_debug(NES_DBG_INIT, "%s: out of memory for receive skb\n", netdev->name); 1030 + return -ENOMEM; 1031 + } 1032 + 1033 + skb->dev = netdev; 1034 + 1035 + pmem = pci_map_single(nesdev->pcidev, skb->data, 1036 + nesvnic->max_frame_size, PCI_DMA_FROMDEVICE); 1037 + cb = (struct nes_rskb_cb *)&skb->cb[0]; 1038 + cb->busaddr = pmem; 1039 + cb->maplen = nesvnic->max_frame_size; 1040 + 1041 + mgt_rqe = &mgtvnic->mgt.rq_vbase[counter]; 1042 + mgt_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_1_0_IDX] = cpu_to_le32((u32)nesvnic->max_frame_size); 1043 + mgt_rqe->wqe_words[NES_NIC_RQ_WQE_LENGTH_3_2_IDX] = 0; 1044 + mgt_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_LOW_IDX] = cpu_to_le32((u32)pmem); 1045 + mgt_rqe->wqe_words[NES_NIC_RQ_WQE_FRAG0_HIGH_IDX] = cpu_to_le32((u32)((u64)pmem >> 32)); 1046 + mgtvnic->mgt.rx_skb[counter] = skb; 1047 + } 1048 + 1049 + init_timer(&mgtvnic->rq_wqes_timer); 1050 + mgtvnic->rq_wqes_timer.function = nes_mgt_rq_wqes_timeout; 1051 + mgtvnic->rq_wqes_timer.data = (unsigned long)mgtvnic; 1052 + 1053 + wqe_count = NES_MGT_WQ_COUNT - 1; 1054 + mgtvnic->mgt.rq_head = wqe_count; 1055 + barrier(); 1056 + do { 1057 + counter = min(wqe_count, ((u32)255)); 1058 + wqe_count -= counter; 1059 + nes_write32(nesdev->regs + NES_WQE_ALLOC, (counter << 24) | mgtvnic->mgt.qp_id); 1060 + } while (wqe_count); 1061 + 1062 + nes_write32(nesdev->regs + NES_CQE_ALLOC, NES_CQE_ALLOC_NOTIFY_NEXT | 1063 + mgtvnic->mgt_cq.cq_number); 1064 + nes_read32(nesdev->regs + NES_CQE_ALLOC); 1065 + 1066 + mgt_vbase += mgt_mem_size; 1067 + mgt_pbase += mgt_mem_size; 1068 + nesvnic->mgtvnic[i] = mgtvnic++; 1069 + } 1070 + return 0; 1071 + } 1072 + 1073 + 1074 + void nes_destroy_mgt(struct nes_vnic *nesvnic) 1075 + { 1076 + struct nes_device *nesdev = nesvnic->nesdev; 1077 + struct nes_vnic_mgt *mgtvnic; 1078 + struct nes_vnic_mgt *first_mgtvnic; 1079 + unsigned long flags; 1080 + struct nes_hw_cqp_wqe *cqp_wqe; 1081 + u32 cqp_head; 1082 + struct sk_buff *rx_skb; 1083 + int i; 1084 + int ret; 1085 + 1086 + kthread_stop(nesvnic->mgt_thread); 1087 + 1088 + /* Free remaining NIC receive buffers */ 1089 + first_mgtvnic = nesvnic->mgtvnic[0]; 1090 + for (i = 0; i < NES_MGT_QP_COUNT; i++) { 1091 + mgtvnic = nesvnic->mgtvnic[i]; 1092 + if (mgtvnic == NULL) 1093 + continue; 1094 + 1095 + while (mgtvnic->mgt.rq_head != mgtvnic->mgt.rq_tail) { 1096 + rx_skb = mgtvnic->mgt.rx_skb[mgtvnic->mgt.rq_tail]; 1097 + nes_mgt_free_skb(nesdev, rx_skb, PCI_DMA_FROMDEVICE); 1098 + mgtvnic->mgt.rq_tail++; 1099 + mgtvnic->mgt.rq_tail &= (mgtvnic->mgt.rq_size - 1); 1100 + } 1101 + 1102 + spin_lock_irqsave(&nesdev->cqp.lock, flags); 1103 + 1104 + /* Destroy NIC QP */ 1105 + cqp_head = nesdev->cqp.sq_head; 1106 + cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head]; 1107 + nes_fill_init_cqp_wqe(cqp_wqe, nesdev); 1108 + 1109 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, 1110 + (NES_CQP_DESTROY_QP | NES_CQP_QP_TYPE_NIC)); 1111 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX, 1112 + mgtvnic->mgt.qp_id); 1113 + 1114 + if (++cqp_head >= nesdev->cqp.sq_size) 1115 + cqp_head = 0; 1116 + 1117 + cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head]; 1118 + 1119 + /* Destroy NIC CQ */ 1120 + nes_fill_init_cqp_wqe(cqp_wqe, nesdev); 1121 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, 1122 + (NES_CQP_DESTROY_CQ | ((u32)mgtvnic->mgt_cq.cq_size << 16))); 1123 + set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX, 1124 + (mgtvnic->mgt_cq.cq_number | ((u32)nesdev->ceq_index << 16))); 1125 + 1126 + if (++cqp_head >= nesdev->cqp.sq_size) 1127 + cqp_head = 0; 1128 + 1129 + nesdev->cqp.sq_head = cqp_head; 1130 + barrier(); 1131 + 1132 + /* Ring doorbell (2 WQEs) */ 1133 + nes_write32(nesdev->regs + NES_WQE_ALLOC, 0x02800000 | nesdev->cqp.qp_id); 1134 + 1135 + spin_unlock_irqrestore(&nesdev->cqp.lock, flags); 1136 + nes_debug(NES_DBG_SHUTDOWN, "Waiting for CQP, cqp_head=%u, cqp.sq_head=%u," 1137 + " cqp.sq_tail=%u, cqp.sq_size=%u\n", 1138 + cqp_head, nesdev->cqp.sq_head, 1139 + nesdev->cqp.sq_tail, nesdev->cqp.sq_size); 1140 + 1141 + ret = wait_event_timeout(nesdev->cqp.waitq, (nesdev->cqp.sq_tail == cqp_head), 1142 + NES_EVENT_TIMEOUT); 1143 + 1144 + nes_debug(NES_DBG_SHUTDOWN, "Destroy MGT QP returned, wait_event_timeout ret = %u, cqp_head=%u," 1145 + " cqp.sq_head=%u, cqp.sq_tail=%u\n", 1146 + ret, cqp_head, nesdev->cqp.sq_head, nesdev->cqp.sq_tail); 1147 + if (!ret) 1148 + nes_debug(NES_DBG_SHUTDOWN, "MGT QP%u destroy timeout expired\n", 1149 + mgtvnic->mgt.qp_id); 1150 + 1151 + nesvnic->mgtvnic[i] = NULL; 1152 + } 1153 + 1154 + if (nesvnic->mgt_vbase) { 1155 + pci_free_consistent(nesdev->pcidev, nesvnic->mgt_mem_size, nesvnic->mgt_vbase, 1156 + nesvnic->mgt_pbase); 1157 + nesvnic->mgt_vbase = NULL; 1158 + nesvnic->mgt_pbase = 0; 1159 + } 1160 + 1161 + kfree(first_mgtvnic); 1162 + }
+97
drivers/infiniband/hw/nes/nes_mgt.h
··· 1 + /* 2 + * Copyright (c) 2010 Intel-NE, Inc. All rights reserved. 3 + * 4 + * This software is available to you under a choice of one of two 5 + * licenses. You may choose to be licensed under the terms of the GNU 6 + * General Public License (GPL) Version 2, available from the file 7 + * COPYING in the main directory of this source tree, or the 8 + * OpenIB.org BSD license below: 9 + * 10 + * Redistribution and use in source and binary forms, with or 11 + * without modification, are permitted provided that the following 12 + * conditions are met: 13 + * 14 + * - Redistributions of source code must retain the above 15 + * copyright notice, this list of conditions and the following 16 + * disclaimer. 17 + * 18 + * - Redistributions in binary form must reproduce the above 19 + * copyright notice, this list of conditions and the following 20 + * disclaimer in the documentation and/or other materials 21 + * provided with the distribution. 22 + * 23 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 + * SOFTWARE. 31 + */ 32 + 33 + #ifndef __NES_MGT_H 34 + #define __NES_MGT_H 35 + 36 + #define MPA_FRAMING 6 /* length is 2 bytes, crc is 4 bytes */ 37 + 38 + int nes_init_mgt_qp(struct nes_device *nesdev, struct net_device *netdev, struct nes_vnic *nesvnic); 39 + void nes_queue_mgt_skbs(struct sk_buff *skb, struct nes_vnic *nesvnic, struct nes_qp *nesqp); 40 + void nes_destroy_mgt(struct nes_vnic *nesvnic); 41 + void nes_destroy_pau_qp(struct nes_device *nesdev, struct nes_qp *nesqp); 42 + 43 + struct nes_hw_mgt { 44 + struct nes_hw_nic_rq_wqe *rq_vbase; /* virtual address of rq */ 45 + dma_addr_t rq_pbase; /* PCI memory for host rings */ 46 + struct sk_buff *rx_skb[NES_NIC_WQ_SIZE]; 47 + u16 qp_id; 48 + u16 sq_head; 49 + u16 rq_head; 50 + u16 rq_tail; 51 + u16 rq_size; 52 + u8 replenishing_rq; 53 + u8 reserved; 54 + spinlock_t rq_lock; 55 + }; 56 + 57 + struct nes_vnic_mgt { 58 + struct nes_vnic *nesvnic; 59 + struct nes_hw_mgt mgt; 60 + struct nes_hw_nic_cq mgt_cq; 61 + atomic_t rx_skbs_needed; 62 + struct timer_list rq_wqes_timer; 63 + atomic_t rx_skb_timer_running; 64 + }; 65 + 66 + #define MAX_FPDU_FRAGS 4 67 + struct pau_fpdu_frag { 68 + struct sk_buff *skb; 69 + u64 physaddr; 70 + u32 frag_len; 71 + bool cmplt; 72 + }; 73 + 74 + struct pau_fpdu_info { 75 + struct nes_qp *nesqp; 76 + struct nes_cqp_request *cqp_request; 77 + void *hdr_vbase; 78 + dma_addr_t hdr_pbase; 79 + int hdr_len; 80 + u16 data_len; 81 + u16 frag_cnt; 82 + struct pau_fpdu_frag frags[MAX_FPDU_FRAGS]; 83 + }; 84 + 85 + enum pau_qh_state { 86 + PAU_DEL_QH, 87 + PAU_ADD_LB_QH, 88 + PAU_READY 89 + }; 90 + 91 + struct pau_qh_chg { 92 + struct nes_device *nesdev; 93 + struct nes_vnic *nesvnic; 94 + struct nes_qp *nesqp; 95 + }; 96 + 97 + #endif /* __NES_MGT_H */
+4
drivers/infiniband/hw/nes/nes_nic.c
··· 1091 1091 "LRO aggregated", 1092 1092 "LRO flushed", 1093 1093 "LRO no_desc", 1094 + "PAU CreateQPs", 1095 + "PAU DestroyQPs", 1094 1096 }; 1095 1097 #define NES_ETHTOOL_STAT_COUNT ARRAY_SIZE(nes_ethtool_stringset) 1096 1098 ··· 1308 1306 target_stat_values[++index] = nesvnic->lro_mgr.stats.aggregated; 1309 1307 target_stat_values[++index] = nesvnic->lro_mgr.stats.flushed; 1310 1308 target_stat_values[++index] = nesvnic->lro_mgr.stats.no_desc; 1309 + target_stat_values[++index] = atomic_read(&pau_qps_created); 1310 + target_stat_values[++index] = atomic_read(&pau_qps_destroyed); 1311 1311 } 1312 1312 1313 1313 /**
+42 -11
drivers/infiniband/hw/nes/nes_utils.c
··· 51 51 52 52 #include "nes.h" 53 53 54 - 55 - 56 54 static u16 nes_read16_eeprom(void __iomem *addr, u16 offset); 57 55 58 56 u32 mh_detected; 59 57 u32 mh_pauses_sent; 58 + 59 + u32 nes_set_pau(struct nes_device *nesdev) 60 + { 61 + u32 ret = 0; 62 + u32 counter; 63 + 64 + nes_write_indexed(nesdev, NES_IDX_GPR2, NES_ENABLE_PAU); 65 + nes_write_indexed(nesdev, NES_IDX_GPR_TRIGGER, 1); 66 + 67 + for (counter = 0; counter < NES_PAU_COUNTER; counter++) { 68 + udelay(30); 69 + if (!nes_read_indexed(nesdev, NES_IDX_GPR2)) { 70 + printk(KERN_INFO PFX "PAU is supported.\n"); 71 + break; 72 + } 73 + nes_write_indexed(nesdev, NES_IDX_GPR_TRIGGER, 1); 74 + } 75 + if (counter == NES_PAU_COUNTER) { 76 + printk(KERN_INFO PFX "PAU is not supported.\n"); 77 + return -EPERM; 78 + } 79 + return ret; 80 + } 60 81 61 82 /** 62 83 * nes_read_eeprom_values - ··· 207 186 } 208 187 if (((major_ver == 3) && (minor_ver >= 16)) || (major_ver > 3)) 209 188 nesadapter->send_term_ok = 1; 189 + 190 + if (nes_drv_opt & NES_DRV_OPT_ENABLE_PAU) { 191 + if (!nes_set_pau(nesdev)) 192 + nesadapter->allow_unaligned_fpdus = 1; 193 + } 210 194 211 195 nesadapter->firmware_version = (((u32)(u8)(eeprom_data>>8)) << 16) + 212 196 (u32)((u8)eeprom_data); ··· 620 594 nes_free_cqp_request(nesdev, cqp_request); 621 595 } 622 596 597 + 623 598 /** 624 599 * nes_post_cqp_request 625 600 */ ··· 631 604 unsigned long flags; 632 605 u32 cqp_head; 633 606 u64 u64temp; 607 + u32 opcode; 608 + int ctx_index = NES_CQP_WQE_COMP_CTX_LOW_IDX; 634 609 635 610 spin_lock_irqsave(&nesdev->cqp.lock, flags); 636 611 ··· 643 614 nesdev->cqp.sq_head &= nesdev->cqp.sq_size-1; 644 615 cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head]; 645 616 memcpy(cqp_wqe, &cqp_request->cqp_wqe, sizeof(*cqp_wqe)); 617 + opcode = le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX]); 618 + if ((opcode & NES_CQP_OPCODE_MASK) == NES_CQP_DOWNLOAD_SEGMENT) 619 + ctx_index = NES_CQP_WQE_DL_COMP_CTX_LOW_IDX; 646 620 barrier(); 647 621 u64temp = (unsigned long)cqp_request; 648 - set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_COMP_SCRATCH_LOW_IDX, 649 - u64temp); 622 + set_wqe_64bit_value(cqp_wqe->wqe_words, ctx_index, u64temp); 650 623 nes_debug(NES_DBG_CQP, "CQP request (opcode 0x%02X), line 1 = 0x%08X put on CQPs SQ," 651 - " request = %p, cqp_head = %u, cqp_tail = %u, cqp_size = %u," 652 - " waiting = %d, refcount = %d.\n", 653 - le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f, 654 - le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX]), cqp_request, 655 - nesdev->cqp.sq_head, nesdev->cqp.sq_tail, nesdev->cqp.sq_size, 656 - cqp_request->waiting, atomic_read(&cqp_request->refcount)); 624 + " request = %p, cqp_head = %u, cqp_tail = %u, cqp_size = %u," 625 + " waiting = %d, refcount = %d.\n", 626 + opcode & NES_CQP_OPCODE_MASK, 627 + le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX]), cqp_request, 628 + nesdev->cqp.sq_head, nesdev->cqp.sq_tail, nesdev->cqp.sq_size, 629 + cqp_request->waiting, atomic_read(&cqp_request->refcount)); 630 + 657 631 barrier(); 658 632 659 633 /* Ring doorbell (1 WQEs) */ ··· 676 644 677 645 return; 678 646 } 679 - 680 647 681 648 /** 682 649 * nes_arp_table
+5 -3
drivers/infiniband/hw/nes/nes_verbs.c
··· 1458 1458 struct ib_qp_attr attr; 1459 1459 struct iw_cm_id *cm_id; 1460 1460 struct iw_cm_event cm_event; 1461 - int ret; 1461 + int ret = 0; 1462 1462 1463 1463 atomic_inc(&sw_qps_destroyed); 1464 1464 nesqp->destroyed = 1; ··· 1511 1511 if ((nesqp->nesrcq) && (nesqp->nesrcq != nesqp->nesscq)) 1512 1512 nes_clean_cq(nesqp, nesqp->nesrcq); 1513 1513 } 1514 - 1515 1514 nes_rem_ref(&nesqp->ibqp); 1516 1515 return 0; 1517 1516 } ··· 2337 2338 2338 2339 skip_pages = ((u32)region->offset) >> 12; 2339 2340 2340 - if (ib_copy_from_udata(&req, udata, sizeof(req))) 2341 + if (ib_copy_from_udata(&req, udata, sizeof(req))) { 2342 + ib_umem_release(region); 2341 2343 return ERR_PTR(-EFAULT); 2344 + } 2342 2345 nes_debug(NES_DBG_MR, "Memory Registration type = %08X.\n", req.reg_type); 2343 2346 2344 2347 switch (req.reg_type) { ··· 2632 2631 return &nesmr->ibmr; 2633 2632 } 2634 2633 2634 + ib_umem_release(region); 2635 2635 return ERR_PTR(-ENOSYS); 2636 2636 } 2637 2637
+10 -2
drivers/infiniband/hw/nes/nes_verbs.h
··· 139 139 struct nes_cq *nesrcq; 140 140 struct nes_pd *nespd; 141 141 void *cm_node; /* handle of the node this QP is associated with */ 142 - struct ietf_mpa_frame *ietf_frame; 142 + void *ietf_frame; 143 + u8 ietf_frame_size; 143 144 dma_addr_t ietf_frame_pbase; 144 145 struct ib_mr *lsmm_mr; 145 146 struct nes_hw_qp hwqp; ··· 155 154 u32 mmap_sq_db_index; 156 155 u32 mmap_rq_db_index; 157 156 spinlock_t lock; 157 + spinlock_t pau_lock; 158 158 struct nes_qp_context *nesqp_context; 159 159 dma_addr_t nesqp_context_pbase; 160 160 void *pbl_vbase; ··· 163 161 struct page *page; 164 162 struct timer_list terminate_timer; 165 163 enum ib_event_type terminate_eventtype; 164 + struct sk_buff_head pau_list; 165 + u32 pau_rcv_nxt; 166 166 u16 active_conn:1; 167 167 u16 skip_lsmm:1; 168 168 u16 user_mode:1; ··· 172 168 u16 flush_issued:1; 173 169 u16 destroyed:1; 174 170 u16 sig_all:1; 175 - u16 rsvd:9; 171 + u16 pau_mode:1; 172 + u16 rsvd:8; 176 173 u16 private_data_len; 177 174 u16 term_sq_flush_code; 178 175 u16 term_rq_flush_code; ··· 181 176 u8 hw_tcp_state; 182 177 u8 term_flags; 183 178 u8 sq_kmapped; 179 + u8 pau_busy; 180 + u8 pau_pending; 181 + u8 pau_state; 184 182 }; 185 183 #endif /* NES_VERBS_H */
+13 -2
drivers/infiniband/hw/qib/qib.h
··· 171 171 /* how many alloc_pages() chunks in rcvegrbuf_pages */ 172 172 u32 rcvegrbuf_chunks; 173 173 /* how many egrbufs per chunk */ 174 - u32 rcvegrbufs_perchunk; 174 + u16 rcvegrbufs_perchunk; 175 + /* ilog2 of above */ 176 + u16 rcvegrbufs_perchunk_shift; 175 177 /* order for rcvegrbuf_pages */ 176 178 size_t rcvegrbuf_size; 177 179 /* rcvhdrq size (for freeing) */ ··· 223 221 /* ctxt rcvhdrq head offset */ 224 222 u32 head; 225 223 u32 pkt_count; 224 + /* lookaside fields */ 225 + struct qib_qp *lookaside_qp; 226 + u32 lookaside_qpn; 226 227 /* QPs waiting for context processing */ 227 228 struct list_head qp_wait_list; 228 229 }; ··· 812 807 * supports, less gives more pio bufs/ctxt, etc. 813 808 */ 814 809 u32 cfgctxts; 810 + /* 811 + * number of ctxts available for PSM open 812 + */ 813 + u32 freectxts; 815 814 816 815 /* 817 816 * hint that we should update pioavailshadow before ··· 945 936 /* chip address space used by 4k pio buffers */ 946 937 u32 align4k; 947 938 /* size of each rcvegrbuffer */ 948 - u32 rcvegrbufsize; 939 + u16 rcvegrbufsize; 940 + /* log2 of above */ 941 + u16 rcvegrbufsize_shift; 949 942 /* localbus width (1, 2,4,8,16,32) from config space */ 950 943 u32 lbus_width; 951 944 /* localbus speed in MHz */
+12 -8
drivers/infiniband/hw/qib/qib_driver.c
··· 279 279 */ 280 280 static inline void *qib_get_egrbuf(const struct qib_ctxtdata *rcd, u32 etail) 281 281 { 282 - const u32 chunk = etail / rcd->rcvegrbufs_perchunk; 283 - const u32 idx = etail % rcd->rcvegrbufs_perchunk; 282 + const u32 chunk = etail >> rcd->rcvegrbufs_perchunk_shift; 283 + const u32 idx = etail & ((u32)rcd->rcvegrbufs_perchunk - 1); 284 284 285 - return rcd->rcvegrbuf[chunk] + idx * rcd->dd->rcvegrbufsize; 285 + return rcd->rcvegrbuf[chunk] + (idx << rcd->dd->rcvegrbufsize_shift); 286 286 } 287 287 288 288 /* ··· 310 310 u32 opcode; 311 311 u32 psn; 312 312 int diff; 313 - unsigned long flags; 314 313 315 314 /* Sanity check packet */ 316 315 if (tlen < 24) ··· 364 365 365 366 switch (qp->ibqp.qp_type) { 366 367 case IB_QPT_RC: 367 - spin_lock_irqsave(&qp->s_lock, flags); 368 368 ruc_res = 369 369 qib_ruc_check_hdr( 370 370 ibp, hdr, ··· 371 373 qp, 372 374 be32_to_cpu(ohdr->bth[0])); 373 375 if (ruc_res) { 374 - spin_unlock_irqrestore(&qp->s_lock, 375 - flags); 376 376 goto unlock; 377 377 } 378 - spin_unlock_irqrestore(&qp->s_lock, flags); 379 378 380 379 /* Only deal with RDMA Writes for now */ 381 380 if (opcode < ··· 541 546 dd->f_update_usrhead(rcd, lval, updegr, etail, i); 542 547 updegr = 0; 543 548 } 549 + } 550 + /* 551 + * Notify qib_destroy_qp() if it is waiting 552 + * for lookaside_qp to finish. 553 + */ 554 + if (rcd->lookaside_qp) { 555 + if (atomic_dec_and_test(&rcd->lookaside_qp->refcount)) 556 + wake_up(&rcd->lookaside_qp->wait); 557 + rcd->lookaside_qp = NULL; 544 558 } 545 559 546 560 rcd->head = l;
+2
drivers/infiniband/hw/qib/qib_file_ops.c
··· 1284 1284 strlcpy(rcd->comm, current->comm, sizeof(rcd->comm)); 1285 1285 ctxt_fp(fp) = rcd; 1286 1286 qib_stats.sps_ctxts++; 1287 + dd->freectxts++; 1287 1288 ret = 0; 1288 1289 goto bail; 1289 1290 ··· 1793 1792 if (dd->pageshadow) 1794 1793 unlock_expected_tids(rcd); 1795 1794 qib_stats.sps_ctxts--; 1795 + dd->freectxts--; 1796 1796 } 1797 1797 1798 1798 mutex_unlock(&qib_mutex);
+2
drivers/infiniband/hw/qib/qib_iba6120.c
··· 3273 3273 /* we always allocate at least 2048 bytes for eager buffers */ 3274 3274 ret = ib_mtu_enum_to_int(qib_ibmtu); 3275 3275 dd->rcvegrbufsize = ret != -1 ? max(ret, 2048) : QIB_DEFAULT_MTU; 3276 + BUG_ON(!is_power_of_2(dd->rcvegrbufsize)); 3277 + dd->rcvegrbufsize_shift = ilog2(dd->rcvegrbufsize); 3276 3278 3277 3279 qib_6120_tidtemplate(dd); 3278 3280
+2
drivers/infiniband/hw/qib/qib_iba7220.c
··· 4085 4085 /* we always allocate at least 2048 bytes for eager buffers */ 4086 4086 ret = ib_mtu_enum_to_int(qib_ibmtu); 4087 4087 dd->rcvegrbufsize = ret != -1 ? max(ret, 2048) : QIB_DEFAULT_MTU; 4088 + BUG_ON(!is_power_of_2(dd->rcvegrbufsize)); 4089 + dd->rcvegrbufsize_shift = ilog2(dd->rcvegrbufsize); 4088 4090 4089 4091 qib_7220_tidtemplate(dd); 4090 4092
+90 -45
drivers/infiniband/hw/qib/qib_iba7322.c
··· 2310 2310 val = ppd->cpspec->ibcctrl_a | (QLOGIC_IB_IBCC_LINKINITCMD_DISABLE << 2311 2311 QLOGIC_IB_IBCC_LINKINITCMD_SHIFT); 2312 2312 2313 + ppd->cpspec->ibcctrl_a = val; 2313 2314 /* 2314 2315 * Reset the PCS interface to the serdes (and also ibc, which is still 2315 2316 * in reset from above). Writes new value of ibcctrl_a as last step. 2316 2317 */ 2317 2318 qib_7322_mini_pcs_reset(ppd); 2318 2319 qib_write_kreg(dd, kr_scratch, 0ULL); 2320 + /* clear the linkinit cmds */ 2321 + ppd->cpspec->ibcctrl_a &= ~SYM_MASK(IBCCtrlA_0, LinkInitCmd); 2319 2322 2320 2323 if (!ppd->cpspec->ibcctrl_b) { 2321 2324 unsigned lse = ppd->link_speed_enabled; ··· 2389 2386 ppd->p_rcvctrl |= SYM_MASK(RcvCtrl_0, RcvIBPortEnable); 2390 2387 qib_write_kreg_port(ppd, krp_rcvctrl, ppd->p_rcvctrl); 2391 2388 spin_unlock_irqrestore(&dd->cspec->rcvmod_lock, flags); 2392 - 2393 - /* Hold the link state machine for mezz boards */ 2394 - if (IS_QMH(dd) || IS_QME(dd)) 2395 - qib_set_ib_7322_lstate(ppd, 0, 2396 - QLOGIC_IB_IBCC_LINKINITCMD_DISABLE); 2397 2389 2398 2390 /* Also enable IBSTATUSCHG interrupt. */ 2399 2391 val = qib_read_kreg_port(ppd, krp_errmask); ··· 2851 2853 for (i = 0; i < dd->first_user_ctxt; i++) { 2852 2854 if (ctxtrbits & rmask) { 2853 2855 ctxtrbits &= ~rmask; 2854 - if (dd->rcd[i]) { 2856 + if (dd->rcd[i]) 2855 2857 qib_kreceive(dd->rcd[i], NULL, &npkts); 2856 - } 2857 2858 } 2858 2859 rmask <<= 1; 2859 2860 } ··· 5227 5230 QIBL_IB_AUTONEG_INPROG))) 5228 5231 set_7322_ibspeed_fast(ppd, ppd->link_speed_enabled); 5229 5232 if (!(ppd->lflags & QIBL_IB_AUTONEG_INPROG)) { 5233 + struct qib_qsfp_data *qd = 5234 + &ppd->cpspec->qsfp_data; 5230 5235 /* unlock the Tx settings, speed may change */ 5231 5236 qib_write_kreg_port(ppd, krp_tx_deemph_override, 5232 5237 SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, ··· 5236 5237 qib_cancel_sends(ppd); 5237 5238 /* on link down, ensure sane pcs state */ 5238 5239 qib_7322_mini_pcs_reset(ppd); 5240 + /* schedule the qsfp refresh which should turn the link 5241 + off */ 5242 + if (ppd->dd->flags & QIB_HAS_QSFP) { 5243 + qd->t_insert = get_jiffies_64(); 5244 + schedule_work(&qd->work); 5245 + } 5239 5246 spin_lock_irqsave(&ppd->sdma_lock, flags); 5240 5247 if (__qib_sdma_running(ppd)) 5241 5248 __qib_sdma_process_event(ppd, ··· 5592 5587 struct qib_qsfp_data *qd; 5593 5588 struct qib_pportdata *ppd; 5594 5589 u64 pwrup; 5590 + unsigned long flags; 5595 5591 int ret; 5596 5592 u32 le2; 5597 5593 5598 5594 qd = container_of(work, struct qib_qsfp_data, work); 5599 5595 ppd = qd->ppd; 5600 - pwrup = qd->t_insert + msecs_to_jiffies(QSFP_PWR_LAG_MSEC); 5596 + pwrup = qd->t_insert + 5597 + msecs_to_jiffies(QSFP_PWR_LAG_MSEC - QSFP_MODPRS_LAG_MSEC); 5601 5598 5602 - /* 5603 - * Some QSFP's not only do not respond until the full power-up 5604 - * time, but may behave badly if we try. So hold off responding 5605 - * to insertion. 5606 - */ 5607 - while (1) { 5608 - u64 now = get_jiffies_64(); 5609 - if (time_after64(now, pwrup)) 5610 - break; 5611 - msleep(20); 5612 - } 5613 - ret = qib_refresh_qsfp_cache(ppd, &qd->cache); 5614 - /* 5615 - * Need to change LE2 back to defaults if we couldn't 5616 - * read the cable type (to handle cable swaps), so do this 5617 - * even on failure to read cable information. We don't 5618 - * get here for QME, so IS_QME check not needed here. 5619 - */ 5620 - if (!ret && !ppd->dd->cspec->r1) { 5621 - if (QSFP_IS_ACTIVE_FAR(qd->cache.tech)) 5622 - le2 = LE2_QME; 5623 - else if (qd->cache.atten[1] >= qib_long_atten && 5624 - QSFP_IS_CU(qd->cache.tech)) 5625 - le2 = LE2_5m; 5626 - else 5599 + /* Delay for 20 msecs to allow ModPrs resistor to setup */ 5600 + mdelay(QSFP_MODPRS_LAG_MSEC); 5601 + 5602 + if (!qib_qsfp_mod_present(ppd)) { 5603 + ppd->cpspec->qsfp_data.modpresent = 0; 5604 + /* Set the physical link to disabled */ 5605 + qib_set_ib_7322_lstate(ppd, 0, 5606 + QLOGIC_IB_IBCC_LINKINITCMD_DISABLE); 5607 + spin_lock_irqsave(&ppd->lflags_lock, flags); 5608 + ppd->lflags &= ~QIBL_LINKV; 5609 + spin_unlock_irqrestore(&ppd->lflags_lock, flags); 5610 + } else { 5611 + /* 5612 + * Some QSFP's not only do not respond until the full power-up 5613 + * time, but may behave badly if we try. So hold off responding 5614 + * to insertion. 5615 + */ 5616 + while (1) { 5617 + u64 now = get_jiffies_64(); 5618 + if (time_after64(now, pwrup)) 5619 + break; 5620 + msleep(20); 5621 + } 5622 + 5623 + ret = qib_refresh_qsfp_cache(ppd, &qd->cache); 5624 + 5625 + /* 5626 + * Need to change LE2 back to defaults if we couldn't 5627 + * read the cable type (to handle cable swaps), so do this 5628 + * even on failure to read cable information. We don't 5629 + * get here for QME, so IS_QME check not needed here. 5630 + */ 5631 + if (!ret && !ppd->dd->cspec->r1) { 5632 + if (QSFP_IS_ACTIVE_FAR(qd->cache.tech)) 5633 + le2 = LE2_QME; 5634 + else if (qd->cache.atten[1] >= qib_long_atten && 5635 + QSFP_IS_CU(qd->cache.tech)) 5636 + le2 = LE2_5m; 5637 + else 5638 + le2 = LE2_DEFAULT; 5639 + } else 5627 5640 le2 = LE2_DEFAULT; 5628 - } else 5629 - le2 = LE2_DEFAULT; 5630 - ibsd_wr_allchans(ppd, 13, (le2 << 7), BMASK(9, 7)); 5631 - init_txdds_table(ppd, 0); 5641 + ibsd_wr_allchans(ppd, 13, (le2 << 7), BMASK(9, 7)); 5642 + /* 5643 + * We always change parameteters, since we can choose 5644 + * values for cables without eeproms, and the cable may have 5645 + * changed from a cable with full or partial eeprom content 5646 + * to one with partial or no content. 5647 + */ 5648 + init_txdds_table(ppd, 0); 5649 + /* The physical link is being re-enabled only when the 5650 + * previous state was DISABLED and the VALID bit is not 5651 + * set. This should only happen when the cable has been 5652 + * physically pulled. */ 5653 + if (!ppd->cpspec->qsfp_data.modpresent && 5654 + (ppd->lflags & (QIBL_LINKV | QIBL_IB_LINK_DISABLED))) { 5655 + ppd->cpspec->qsfp_data.modpresent = 1; 5656 + qib_set_ib_7322_lstate(ppd, 0, 5657 + QLOGIC_IB_IBCC_LINKINITCMD_SLEEP); 5658 + spin_lock_irqsave(&ppd->lflags_lock, flags); 5659 + ppd->lflags |= QIBL_LINKV; 5660 + spin_unlock_irqrestore(&ppd->lflags_lock, flags); 5661 + } 5662 + } 5632 5663 } 5633 5664 5634 5665 /* ··· 5768 5727 /* now change the IBC and serdes, overriding generic */ 5769 5728 init_txdds_table(ppd, 1); 5770 5729 /* Re-enable the physical state machine on mezz boards 5771 - * now that the correct settings have been set. */ 5730 + * now that the correct settings have been set. 5731 + * QSFP boards are handles by the QSFP event handler */ 5772 5732 if (IS_QMH(dd) || IS_QME(dd)) 5773 5733 qib_set_ib_7322_lstate(ppd, 0, 5774 5734 QLOGIC_IB_IBCC_LINKINITCMD_SLEEP); ··· 6247 6205 6248 6206 /* we always allocate at least 2048 bytes for eager buffers */ 6249 6207 dd->rcvegrbufsize = max(mtu, 2048); 6208 + BUG_ON(!is_power_of_2(dd->rcvegrbufsize)); 6209 + dd->rcvegrbufsize_shift = ilog2(dd->rcvegrbufsize); 6250 6210 6251 6211 qib_7322_tidtemplate(dd); 6252 6212 ··· 7191 7147 } 7192 7148 } 7193 7149 7194 - /* Lookup serdes setting by cable type and attenuation */ 7150 + /* Active cables don't have attenuation so we only set SERDES 7151 + * settings to account for the attenuation of the board traces. */ 7195 7152 if (!override && QSFP_IS_ACTIVE(qd->tech)) { 7196 7153 *sdr_dds = txdds_sdr + ppd->dd->board_atten; 7197 7154 *ddr_dds = txdds_ddr + ppd->dd->board_atten; ··· 7509 7464 u32 le_val, rxcaldone; 7510 7465 int chan, chan_done = (1 << SERDES_CHANS) - 1; 7511 7466 7512 - /* 7513 - * Initialize the Tx DDS tables. Also done every QSFP event, 7514 - * for adapters with QSFP 7515 - */ 7516 - init_txdds_table(ppd, 0); 7517 - 7518 7467 /* Clear cmode-override, may be set from older driver */ 7519 7468 ahb_mod(ppd->dd, IBSD(ppd->hw_pidx), 5, 10, 0 << 14, 1 << 14); 7520 7469 ··· 7693 7654 ibsd_wr_allchans(ppd, 11, (1 << 11), BMASK(12, 11)); 7694 7655 /* VGA output common mode */ 7695 7656 ibsd_wr_allchans(ppd, 12, (3 << 2), BMASK(3, 2)); 7657 + 7658 + /* 7659 + * Initialize the Tx DDS tables. Also done every QSFP event, 7660 + * for adapters with QSFP 7661 + */ 7662 + init_txdds_table(ppd, 0); 7696 7663 7697 7664 return 0; 7698 7665 }
+4 -4
drivers/infiniband/hw/qib/qib_init.c
··· 183 183 rcd->rcvegrbuf_chunks = (rcd->rcvegrcnt + 184 184 rcd->rcvegrbufs_perchunk - 1) / 185 185 rcd->rcvegrbufs_perchunk; 186 + BUG_ON(!is_power_of_2(rcd->rcvegrbufs_perchunk)); 187 + rcd->rcvegrbufs_perchunk_shift = 188 + ilog2(rcd->rcvegrbufs_perchunk); 186 189 } 187 190 return rcd; 188 191 } ··· 401 398 if (rcd) 402 399 dd->f_rcvctrl(rcd->ppd, rcvmask, i); 403 400 } 401 + dd->freectxts = dd->cfgctxts - dd->first_user_ctxt; 404 402 } 405 403 406 404 static void verify_interrupt(unsigned long opaque) ··· 585 581 continue; 586 582 } 587 583 588 - /* let link come up, and enable IBC */ 589 - spin_lock_irqsave(&ppd->lflags_lock, flags); 590 - ppd->lflags &= ~QIBL_IB_LINK_DISABLED; 591 - spin_unlock_irqrestore(&ppd->lflags_lock, flags); 592 584 portok++; 593 585 } 594 586
+64 -36
drivers/infiniband/hw/qib/qib_qp.c
··· 34 34 35 35 #include <linux/err.h> 36 36 #include <linux/vmalloc.h> 37 + #include <linux/jhash.h> 37 38 38 39 #include "qib.h" 39 40 ··· 205 204 clear_bit(qpn & BITS_PER_PAGE_MASK, map->page); 206 205 } 207 206 207 + static inline unsigned qpn_hash(struct qib_ibdev *dev, u32 qpn) 208 + { 209 + return jhash_1word(qpn, dev->qp_rnd) & 210 + (dev->qp_table_size - 1); 211 + } 212 + 213 + 208 214 /* 209 215 * Put the QP into the hash table. 210 216 * The hash table holds a reference to the QP. ··· 219 211 static void insert_qp(struct qib_ibdev *dev, struct qib_qp *qp) 220 212 { 221 213 struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num); 222 - unsigned n = qp->ibqp.qp_num % dev->qp_table_size; 223 214 unsigned long flags; 215 + unsigned n = qpn_hash(dev, qp->ibqp.qp_num); 224 216 225 217 spin_lock_irqsave(&dev->qpt_lock, flags); 226 - 227 - if (qp->ibqp.qp_num == 0) 228 - ibp->qp0 = qp; 229 - else if (qp->ibqp.qp_num == 1) 230 - ibp->qp1 = qp; 231 - else { 232 - qp->next = dev->qp_table[n]; 233 - dev->qp_table[n] = qp; 234 - } 235 218 atomic_inc(&qp->refcount); 236 219 220 + if (qp->ibqp.qp_num == 0) 221 + rcu_assign_pointer(ibp->qp0, qp); 222 + else if (qp->ibqp.qp_num == 1) 223 + rcu_assign_pointer(ibp->qp1, qp); 224 + else { 225 + qp->next = dev->qp_table[n]; 226 + rcu_assign_pointer(dev->qp_table[n], qp); 227 + } 228 + 237 229 spin_unlock_irqrestore(&dev->qpt_lock, flags); 230 + synchronize_rcu(); 238 231 } 239 232 240 233 /* ··· 245 236 static void remove_qp(struct qib_ibdev *dev, struct qib_qp *qp) 246 237 { 247 238 struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num); 248 - struct qib_qp *q, **qpp; 239 + unsigned n = qpn_hash(dev, qp->ibqp.qp_num); 249 240 unsigned long flags; 250 - 251 - qpp = &dev->qp_table[qp->ibqp.qp_num % dev->qp_table_size]; 252 241 253 242 spin_lock_irqsave(&dev->qpt_lock, flags); 254 243 255 244 if (ibp->qp0 == qp) { 256 - ibp->qp0 = NULL; 257 245 atomic_dec(&qp->refcount); 246 + rcu_assign_pointer(ibp->qp0, NULL); 258 247 } else if (ibp->qp1 == qp) { 259 - ibp->qp1 = NULL; 260 248 atomic_dec(&qp->refcount); 261 - } else 249 + rcu_assign_pointer(ibp->qp1, NULL); 250 + } else { 251 + struct qib_qp *q, **qpp; 252 + 253 + qpp = &dev->qp_table[n]; 262 254 for (; (q = *qpp) != NULL; qpp = &q->next) 263 255 if (q == qp) { 264 - *qpp = qp->next; 265 - qp->next = NULL; 266 256 atomic_dec(&qp->refcount); 257 + rcu_assign_pointer(*qpp, qp->next); 258 + qp->next = NULL; 267 259 break; 268 260 } 261 + } 269 262 270 263 spin_unlock_irqrestore(&dev->qpt_lock, flags); 264 + synchronize_rcu(); 271 265 } 272 266 273 267 /** ··· 292 280 293 281 if (!qib_mcast_tree_empty(ibp)) 294 282 qp_inuse++; 295 - if (ibp->qp0) 283 + rcu_read_lock(); 284 + if (rcu_dereference(ibp->qp0)) 296 285 qp_inuse++; 297 - if (ibp->qp1) 286 + if (rcu_dereference(ibp->qp1)) 298 287 qp_inuse++; 288 + rcu_read_unlock(); 299 289 } 300 290 301 291 spin_lock_irqsave(&dev->qpt_lock, flags); 302 292 for (n = 0; n < dev->qp_table_size; n++) { 303 293 qp = dev->qp_table[n]; 304 - dev->qp_table[n] = NULL; 294 + rcu_assign_pointer(dev->qp_table[n], NULL); 305 295 306 296 for (; qp; qp = qp->next) 307 297 qp_inuse++; 308 298 } 309 299 spin_unlock_irqrestore(&dev->qpt_lock, flags); 300 + synchronize_rcu(); 310 301 311 302 return qp_inuse; 312 303 } ··· 324 309 */ 325 310 struct qib_qp *qib_lookup_qpn(struct qib_ibport *ibp, u32 qpn) 326 311 { 327 - struct qib_ibdev *dev = &ppd_from_ibp(ibp)->dd->verbs_dev; 328 - unsigned long flags; 329 - struct qib_qp *qp; 312 + struct qib_qp *qp = NULL; 330 313 331 - spin_lock_irqsave(&dev->qpt_lock, flags); 314 + if (unlikely(qpn <= 1)) { 315 + rcu_read_lock(); 316 + if (qpn == 0) 317 + qp = rcu_dereference(ibp->qp0); 318 + else 319 + qp = rcu_dereference(ibp->qp1); 320 + } else { 321 + struct qib_ibdev *dev = &ppd_from_ibp(ibp)->dd->verbs_dev; 322 + unsigned n = qpn_hash(dev, qpn); 332 323 333 - if (qpn == 0) 334 - qp = ibp->qp0; 335 - else if (qpn == 1) 336 - qp = ibp->qp1; 337 - else 338 - for (qp = dev->qp_table[qpn % dev->qp_table_size]; qp; 339 - qp = qp->next) 324 + rcu_read_lock(); 325 + for (qp = dev->qp_table[n]; rcu_dereference(qp); qp = qp->next) 340 326 if (qp->ibqp.qp_num == qpn) 341 327 break; 328 + } 342 329 if (qp) 343 - atomic_inc(&qp->refcount); 330 + if (unlikely(!atomic_inc_not_zero(&qp->refcount))) 331 + qp = NULL; 344 332 345 - spin_unlock_irqrestore(&dev->qpt_lock, flags); 333 + rcu_read_unlock(); 346 334 return qp; 347 335 } 348 336 ··· 783 765 } 784 766 } 785 767 786 - if (attr_mask & IB_QP_PATH_MTU) 768 + if (attr_mask & IB_QP_PATH_MTU) { 787 769 qp->path_mtu = pmtu; 770 + qp->pmtu = ib_mtu_enum_to_int(pmtu); 771 + } 788 772 789 773 if (attr_mask & IB_QP_RETRY_CNT) { 790 774 qp->s_retry_cnt = attr->retry_cnt; ··· 801 781 if (attr_mask & IB_QP_MIN_RNR_TIMER) 802 782 qp->r_min_rnr_timer = attr->min_rnr_timer; 803 783 804 - if (attr_mask & IB_QP_TIMEOUT) 784 + if (attr_mask & IB_QP_TIMEOUT) { 805 785 qp->timeout = attr->timeout; 786 + qp->timeout_jiffies = 787 + usecs_to_jiffies((4096UL * (1UL << qp->timeout)) / 788 + 1000UL); 789 + } 806 790 807 791 if (attr_mask & IB_QP_QKEY) 808 792 qp->qkey = attr->qkey; ··· 1037 1013 ret = ERR_PTR(-ENOMEM); 1038 1014 goto bail_swq; 1039 1015 } 1016 + RCU_INIT_POINTER(qp->next, NULL); 1017 + qp->timeout_jiffies = 1018 + usecs_to_jiffies((4096UL * (1UL << qp->timeout)) / 1019 + 1000UL); 1040 1020 if (init_attr->srq) 1041 1021 sz = 0; 1042 1022 else {
+15 -10
drivers/infiniband/hw/qib/qib_qsfp.c
··· 273 273 int ret; 274 274 int idx; 275 275 u16 cks; 276 - u32 mask; 277 276 u8 peek[4]; 278 277 279 278 /* ensure sane contents on invalid reads, for cable swaps */ 280 279 memset(cp, 0, sizeof(*cp)); 281 280 282 - mask = QSFP_GPIO_MOD_PRS_N; 283 - if (ppd->hw_pidx) 284 - mask <<= QSFP_GPIO_PORT2_SHIFT; 285 - 286 - ret = ppd->dd->f_gpio_mod(ppd->dd, 0, 0, 0); 287 - if (ret & mask) { 281 + if (!qib_qsfp_mod_present(ppd)) { 288 282 ret = -ENODEV; 289 283 goto bail; 290 284 } ··· 438 444 439 445 static const char *pwr_codes = "1.5W2.0W2.5W3.5W"; 440 446 447 + int qib_qsfp_mod_present(struct qib_pportdata *ppd) 448 + { 449 + u32 mask; 450 + int ret; 451 + 452 + mask = QSFP_GPIO_MOD_PRS_N << 453 + (ppd->hw_pidx * QSFP_GPIO_PORT2_SHIFT); 454 + ret = ppd->dd->f_gpio_mod(ppd->dd, 0, 0, 0); 455 + 456 + return !((ret & mask) >> 457 + ((ppd->hw_pidx * QSFP_GPIO_PORT2_SHIFT) + 3)); 458 + } 459 + 441 460 /* 442 461 * Initialize structures that control access to QSFP. Called once per port 443 462 * on cards that support QSFP. ··· 459 452 void (*fevent)(struct work_struct *)) 460 453 { 461 454 u32 mask, highs; 462 - int pins; 463 455 464 456 struct qib_devdata *dd = qd->ppd->dd; 465 457 ··· 486 480 mask <<= QSFP_GPIO_PORT2_SHIFT; 487 481 488 482 /* Do not try to wait here. Better to let event handle it */ 489 - pins = dd->f_gpio_mod(dd, 0, 0, 0); 490 - if (pins & mask) 483 + if (!qib_qsfp_mod_present(qd->ppd)) 491 484 goto bail; 492 485 /* We see a module, but it may be unwise to look yet. Just schedule */ 493 486 qd->t_insert = get_jiffies_64();
+3
drivers/infiniband/hw/qib/qib_qsfp.h
··· 34 34 35 35 #define QSFP_DEV 0xA0 36 36 #define QSFP_PWR_LAG_MSEC 2000 37 + #define QSFP_MODPRS_LAG_MSEC 20 37 38 38 39 /* 39 40 * Below are masks for various QSFP signals, for Port 1. ··· 178 177 struct work_struct work; 179 178 struct qib_qsfp_cache cache; 180 179 u64 t_insert; 180 + u8 modpresent; 181 181 }; 182 182 183 183 extern int qib_refresh_qsfp_cache(struct qib_pportdata *ppd, 184 184 struct qib_qsfp_cache *cp); 185 + extern int qib_qsfp_mod_present(struct qib_pportdata *ppd); 185 186 extern void qib_qsfp_init(struct qib_qsfp_data *qd, 186 187 void (*fevent)(struct work_struct *)); 187 188 extern void qib_qsfp_deinit(struct qib_qsfp_data *qd);
+19 -17
drivers/infiniband/hw/qib/qib_rc.c
··· 59 59 qp->s_flags |= QIB_S_TIMER; 60 60 qp->s_timer.function = rc_timeout; 61 61 /* 4.096 usec. * (1 << qp->timeout) */ 62 - qp->s_timer.expires = jiffies + 63 - usecs_to_jiffies((4096UL * (1UL << qp->timeout)) / 1000UL); 62 + qp->s_timer.expires = jiffies + qp->timeout_jiffies; 64 63 add_timer(&qp->s_timer); 65 64 } 66 65 ··· 238 239 u32 len; 239 240 u32 bth0; 240 241 u32 bth2; 241 - u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu); 242 + u32 pmtu = qp->pmtu; 242 243 char newreq; 243 244 unsigned long flags; 244 245 int ret = 0; ··· 1518 1519 * 4.096 usec. * (1 << qp->timeout) 1519 1520 */ 1520 1521 qp->s_flags |= QIB_S_TIMER; 1521 - mod_timer(&qp->s_timer, jiffies + 1522 - usecs_to_jiffies((4096UL * (1UL << qp->timeout)) / 1523 - 1000UL)); 1522 + mod_timer(&qp->s_timer, jiffies + qp->timeout_jiffies); 1524 1523 if (qp->s_flags & QIB_S_WAIT_ACK) { 1525 1524 qp->s_flags &= ~QIB_S_WAIT_ACK; 1526 1525 qib_schedule_send(qp); ··· 1729 1732 * same request. 1730 1733 */ 1731 1734 offset = ((psn - e->psn) & QIB_PSN_MASK) * 1732 - ib_mtu_enum_to_int(qp->path_mtu); 1735 + qp->pmtu; 1733 1736 len = be32_to_cpu(reth->length); 1734 1737 if (unlikely(offset + len != e->rdma_sge.sge_length)) 1735 1738 goto unlock_done; ··· 1873 1876 u32 psn; 1874 1877 u32 pad; 1875 1878 struct ib_wc wc; 1876 - u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu); 1879 + u32 pmtu = qp->pmtu; 1877 1880 int diff; 1878 1881 struct ib_reth *reth; 1879 1882 unsigned long flags; ··· 1889 1892 } 1890 1893 1891 1894 opcode = be32_to_cpu(ohdr->bth[0]); 1892 - spin_lock_irqsave(&qp->s_lock, flags); 1893 1895 if (qib_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode)) 1894 - goto sunlock; 1895 - spin_unlock_irqrestore(&qp->s_lock, flags); 1896 + return; 1896 1897 1897 1898 psn = be32_to_cpu(ohdr->bth[2]); 1898 1899 opcode >>= 24; ··· 1950 1955 break; 1951 1956 } 1952 1957 1953 - memset(&wc, 0, sizeof wc); 1954 - 1955 1958 if (qp->state == IB_QPS_RTR && !(qp->r_flags & QIB_R_COMM_EST)) { 1956 1959 qp->r_flags |= QIB_R_COMM_EST; 1957 1960 if (qp->ibqp.event_handler) { ··· 2002 2009 goto rnr_nak; 2003 2010 qp->r_rcv_len = 0; 2004 2011 if (opcode == OP(SEND_ONLY)) 2005 - goto send_last; 2006 - /* FALLTHROUGH */ 2012 + goto no_immediate_data; 2013 + /* FALLTHROUGH for SEND_ONLY_WITH_IMMEDIATE */ 2007 2014 case OP(SEND_LAST_WITH_IMMEDIATE): 2008 2015 send_last_imm: 2009 2016 wc.ex.imm_data = ohdr->u.imm_data; 2010 2017 hdrsize += 4; 2011 2018 wc.wc_flags = IB_WC_WITH_IMM; 2012 - /* FALLTHROUGH */ 2019 + goto send_last; 2013 2020 case OP(SEND_LAST): 2014 2021 case OP(RDMA_WRITE_LAST): 2022 + no_immediate_data: 2023 + wc.wc_flags = 0; 2024 + wc.ex.imm_data = 0; 2015 2025 send_last: 2016 2026 /* Get the number of bytes the message was padded by. */ 2017 2027 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; ··· 2047 2051 wc.src_qp = qp->remote_qpn; 2048 2052 wc.slid = qp->remote_ah_attr.dlid; 2049 2053 wc.sl = qp->remote_ah_attr.sl; 2054 + /* zero fields that are N/A */ 2055 + wc.vendor_err = 0; 2056 + wc.pkey_index = 0; 2057 + wc.dlid_path_bits = 0; 2058 + wc.port_num = 0; 2059 + wc.csum_ok = 0; 2050 2060 /* Signal completion event if the solicited bit is set. */ 2051 2061 qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 2052 2062 (ohdr->bth[0] & ··· 2091 2089 if (opcode == OP(RDMA_WRITE_FIRST)) 2092 2090 goto send_middle; 2093 2091 else if (opcode == OP(RDMA_WRITE_ONLY)) 2094 - goto send_last; 2092 + goto no_immediate_data; 2095 2093 ret = qib_get_rwqe(qp, 1); 2096 2094 if (ret < 0) 2097 2095 goto nack_op_err;
+6 -1
drivers/infiniband/hw/qib/qib_ruc.c
··· 260 260 261 261 /* 262 262 * 263 - * This should be called with the QP s_lock held. 263 + * This should be called with the QP r_lock held. 264 + * 265 + * The s_lock will be acquired around the qib_migrate_qp() call. 264 266 */ 265 267 int qib_ruc_check_hdr(struct qib_ibport *ibp, struct qib_ib_header *hdr, 266 268 int has_grh, struct qib_qp *qp, u32 bth0) 267 269 { 268 270 __be64 guid; 271 + unsigned long flags; 269 272 270 273 if (qp->s_mig_state == IB_MIG_ARMED && (bth0 & IB_BTH_MIG_REQ)) { 271 274 if (!has_grh) { ··· 298 295 if (be16_to_cpu(hdr->lrh[3]) != qp->alt_ah_attr.dlid || 299 296 ppd_from_ibp(ibp)->port != qp->alt_ah_attr.port_num) 300 297 goto err; 298 + spin_lock_irqsave(&qp->s_lock, flags); 301 299 qib_migrate_qp(qp); 300 + spin_unlock_irqrestore(&qp->s_lock, flags); 302 301 } else { 303 302 if (!has_grh) { 304 303 if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
+5
drivers/infiniband/hw/qib/qib_srq.c
··· 107 107 u32 sz; 108 108 struct ib_srq *ret; 109 109 110 + if (srq_init_attr->srq_type != IB_SRQT_BASIC) { 111 + ret = ERR_PTR(-ENOSYS); 112 + goto done; 113 + } 114 + 110 115 if (srq_init_attr->attr.max_sge == 0 || 111 116 srq_init_attr->attr.max_sge > ib_qib_max_srq_sges || 112 117 srq_init_attr->attr.max_wr == 0 ||
+1 -2
drivers/infiniband/hw/qib/qib_sysfs.c
··· 515 515 struct qib_devdata *dd = dd_from_dev(dev); 516 516 517 517 /* Return the number of free user ports (contexts) available. */ 518 - return scnprintf(buf, PAGE_SIZE, "%u\n", dd->cfgctxts - 519 - dd->first_user_ctxt - (u32)qib_stats.sps_ctxts); 518 + return scnprintf(buf, PAGE_SIZE, "%u\n", dd->freectxts); 520 519 } 521 520 522 521 static ssize_t show_serial(struct device *device,
+14 -11
drivers/infiniband/hw/qib/qib_uc.c
··· 51 51 u32 hwords; 52 52 u32 bth0; 53 53 u32 len; 54 - u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu); 54 + u32 pmtu = qp->pmtu; 55 55 int ret = 0; 56 56 57 57 spin_lock_irqsave(&qp->s_lock, flags); ··· 243 243 int has_grh, void *data, u32 tlen, struct qib_qp *qp) 244 244 { 245 245 struct qib_other_headers *ohdr; 246 - unsigned long flags; 247 246 u32 opcode; 248 247 u32 hdrsize; 249 248 u32 psn; 250 249 u32 pad; 251 250 struct ib_wc wc; 252 - u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu); 251 + u32 pmtu = qp->pmtu; 253 252 struct ib_reth *reth; 254 253 int ret; 255 254 ··· 262 263 } 263 264 264 265 opcode = be32_to_cpu(ohdr->bth[0]); 265 - spin_lock_irqsave(&qp->s_lock, flags); 266 266 if (qib_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode)) 267 - goto sunlock; 268 - spin_unlock_irqrestore(&qp->s_lock, flags); 267 + return; 269 268 270 269 psn = be32_to_cpu(ohdr->bth[2]); 271 270 opcode >>= 24; 272 - memset(&wc, 0, sizeof wc); 273 271 274 272 /* Compare the PSN verses the expected PSN. */ 275 273 if (unlikely(qib_cmp24(psn, qp->r_psn) != 0)) { ··· 366 370 } 367 371 qp->r_rcv_len = 0; 368 372 if (opcode == OP(SEND_ONLY)) 369 - goto send_last; 373 + goto no_immediate_data; 370 374 else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE)) 371 375 goto send_last_imm; 372 376 /* FALLTHROUGH */ ··· 385 389 wc.ex.imm_data = ohdr->u.imm_data; 386 390 hdrsize += 4; 387 391 wc.wc_flags = IB_WC_WITH_IMM; 388 - /* FALLTHROUGH */ 392 + goto send_last; 389 393 case OP(SEND_LAST): 394 + no_immediate_data: 395 + wc.ex.imm_data = 0; 396 + wc.wc_flags = 0; 390 397 send_last: 391 398 /* Get the number of bytes the message was padded by. */ 392 399 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; ··· 417 418 wc.src_qp = qp->remote_qpn; 418 419 wc.slid = qp->remote_ah_attr.dlid; 419 420 wc.sl = qp->remote_ah_attr.sl; 421 + /* zero fields that are N/A */ 422 + wc.vendor_err = 0; 423 + wc.pkey_index = 0; 424 + wc.dlid_path_bits = 0; 425 + wc.port_num = 0; 426 + wc.csum_ok = 0; 420 427 /* Signal completion event if the solicited bit is set. */ 421 428 qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 422 429 (ohdr->bth[0] & ··· 551 546 qib_rc_error(qp, IB_WC_LOC_QP_OP_ERR); 552 547 return; 553 548 554 - sunlock: 555 - spin_unlock_irqrestore(&qp->s_lock, flags); 556 549 }
+25 -11
drivers/infiniband/hw/qib/qib_verbs.c
··· 38 38 #include <linux/utsname.h> 39 39 #include <linux/rculist.h> 40 40 #include <linux/mm.h> 41 + #include <linux/random.h> 41 42 42 43 #include "qib.h" 43 44 #include "qib_common.h" 44 45 45 - static unsigned int ib_qib_qp_table_size = 251; 46 + static unsigned int ib_qib_qp_table_size = 256; 46 47 module_param_named(qp_table_size, ib_qib_qp_table_size, uint, S_IRUGO); 47 48 MODULE_PARM_DESC(qp_table_size, "QP table size"); 48 49 ··· 660 659 if (atomic_dec_return(&mcast->refcount) <= 1) 661 660 wake_up(&mcast->wait); 662 661 } else { 663 - qp = qib_lookup_qpn(ibp, qp_num); 664 - if (!qp) 665 - goto drop; 662 + if (rcd->lookaside_qp) { 663 + if (rcd->lookaside_qpn != qp_num) { 664 + if (atomic_dec_and_test( 665 + &rcd->lookaside_qp->refcount)) 666 + wake_up( 667 + &rcd->lookaside_qp->wait); 668 + rcd->lookaside_qp = NULL; 669 + } 670 + } 671 + if (!rcd->lookaside_qp) { 672 + qp = qib_lookup_qpn(ibp, qp_num); 673 + if (!qp) 674 + goto drop; 675 + rcd->lookaside_qp = qp; 676 + rcd->lookaside_qpn = qp_num; 677 + } else 678 + qp = rcd->lookaside_qp; 666 679 ibp->n_unicast_rcv++; 667 680 qib_qp_rcv(rcd, hdr, lnh == QIB_LRH_GRH, data, tlen, qp); 668 - /* 669 - * Notify qib_destroy_qp() if it is waiting 670 - * for us to finish. 671 - */ 672 - if (atomic_dec_and_test(&qp->refcount)) 673 - wake_up(&qp->wait); 674 681 } 675 682 return; 676 683 ··· 1983 1974 ibp->z_excessive_buffer_overrun_errors = 1984 1975 cntrs.excessive_buffer_overrun_errors; 1985 1976 ibp->z_vl15_dropped = cntrs.vl15_dropped; 1977 + RCU_INIT_POINTER(ibp->qp0, NULL); 1978 + RCU_INIT_POINTER(ibp->qp1, NULL); 1986 1979 } 1987 1980 1988 1981 /** ··· 2001 1990 int ret; 2002 1991 2003 1992 dev->qp_table_size = ib_qib_qp_table_size; 2004 - dev->qp_table = kzalloc(dev->qp_table_size * sizeof *dev->qp_table, 1993 + get_random_bytes(&dev->qp_rnd, sizeof(dev->qp_rnd)); 1994 + dev->qp_table = kmalloc(dev->qp_table_size * sizeof *dev->qp_table, 2005 1995 GFP_KERNEL); 2006 1996 if (!dev->qp_table) { 2007 1997 ret = -ENOMEM; 2008 1998 goto err_qpt; 2009 1999 } 2000 + for (i = 0; i < dev->qp_table_size; i++) 2001 + RCU_INIT_POINTER(dev->qp_table[i], NULL); 2010 2002 2011 2003 for (i = 0; i < dd->num_pports; i++) 2012 2004 init_ibport(ppd + i);
+4 -1
drivers/infiniband/hw/qib/qib_verbs.h
··· 485 485 u8 alt_timeout; /* Alternate path timeout for this QP */ 486 486 u8 port_num; 487 487 enum ib_mtu path_mtu; 488 + u32 pmtu; /* decoded from path_mtu */ 488 489 u32 remote_qpn; 489 490 u32 qkey; /* QKEY for this QP (for UD or RD) */ 490 491 u32 s_size; /* send work queue size */ ··· 496 495 u32 s_last; /* last completed entry */ 497 496 u32 s_ssn; /* SSN of tail entry */ 498 497 u32 s_lsn; /* limit sequence number (credit) */ 498 + unsigned long timeout_jiffies; /* computed from timeout */ 499 499 struct qib_swqe *s_wq; /* send work queue */ 500 500 struct qib_swqe *s_wqe; 501 501 struct qib_rq r_rq; /* receive work queue */ ··· 725 723 dma_addr_t pio_hdrs_phys; 726 724 /* list of QPs waiting for RNR timer */ 727 725 spinlock_t pending_lock; /* protect wait lists, PMA counters, etc. */ 728 - unsigned qp_table_size; /* size of the hash table */ 726 + u32 qp_table_size; /* size of the hash table */ 727 + u32 qp_rnd; /* random bytes for hash */ 729 728 spinlock_t qpt_lock; 730 729 731 730 u32 n_piowait;
+3 -2
drivers/infiniband/ulp/ipoib/ipoib_cm.c
··· 84 84 ib_dma_unmap_single(priv->ca, mapping[0], IPOIB_CM_HEAD_SIZE, DMA_FROM_DEVICE); 85 85 86 86 for (i = 0; i < frags; ++i) 87 - ib_dma_unmap_single(priv->ca, mapping[i + 1], PAGE_SIZE, DMA_FROM_DEVICE); 87 + ib_dma_unmap_page(priv->ca, mapping[i + 1], PAGE_SIZE, DMA_FROM_DEVICE); 88 88 } 89 89 90 90 static int ipoib_cm_post_receive_srq(struct net_device *dev, int id) ··· 183 183 ib_dma_unmap_single(priv->ca, mapping[0], IPOIB_CM_HEAD_SIZE, DMA_FROM_DEVICE); 184 184 185 185 for (; i > 0; --i) 186 - ib_dma_unmap_single(priv->ca, mapping[i], PAGE_SIZE, DMA_FROM_DEVICE); 186 + ib_dma_unmap_page(priv->ca, mapping[i], PAGE_SIZE, DMA_FROM_DEVICE); 187 187 188 188 dev_kfree_skb_any(skb); 189 189 return NULL; ··· 1497 1497 { 1498 1498 struct ipoib_dev_priv *priv = netdev_priv(dev); 1499 1499 struct ib_srq_init_attr srq_init_attr = { 1500 + .srq_type = IB_SRQT_BASIC, 1500 1501 .attr = { 1501 1502 .max_wr = ipoib_recvq_size, 1502 1503 .max_sge = max_sge
+3 -4
drivers/infiniband/ulp/ipoib/ipoib_fs.c
··· 212 212 gid_buf, path.pathrec.dlid ? "yes" : "no"); 213 213 214 214 if (path.pathrec.dlid) { 215 - rate = ib_rate_to_mult(path.pathrec.rate) * 25; 215 + rate = ib_rate_to_mbps(path.pathrec.rate); 216 216 217 217 seq_printf(file, 218 218 " DLID: 0x%04x\n" 219 219 " SL: %12d\n" 220 - " rate: %*d%s Gb/sec\n", 220 + " rate: %8d.%d Gb/sec\n", 221 221 be16_to_cpu(path.pathrec.dlid), 222 222 path.pathrec.sl, 223 - 10 - ((rate % 10) ? 2 : 0), 224 - rate / 10, rate % 10 ? ".5" : ""); 223 + rate / 1000, rate % 1000); 225 224 } 226 225 227 226 seq_putc(file, '\n');
+1 -1
drivers/net/ethernet/mellanox/mlx4/eq.c
··· 484 484 485 485 mlx4_mtt_cleanup(dev, &eq->mtt); 486 486 for (i = 0; i < npages; ++i) 487 - pci_free_consistent(dev->pdev, PAGE_SIZE, 487 + dma_free_coherent(&dev->pdev->dev, PAGE_SIZE, 488 488 eq->page_list[i].buf, 489 489 eq->page_list[i].map); 490 490
+6
drivers/net/ethernet/mellanox/mlx4/fw.c
··· 205 205 #define QUERY_DEV_CAP_MAX_MCG_OFFSET 0x63 206 206 #define QUERY_DEV_CAP_RSVD_PD_OFFSET 0x64 207 207 #define QUERY_DEV_CAP_MAX_PD_OFFSET 0x65 208 + #define QUERY_DEV_CAP_RSVD_XRC_OFFSET 0x66 209 + #define QUERY_DEV_CAP_MAX_XRC_OFFSET 0x67 208 210 #define QUERY_DEV_CAP_MAX_COUNTERS_OFFSET 0x68 209 211 #define QUERY_DEV_CAP_RDMARC_ENTRY_SZ_OFFSET 0x80 210 212 #define QUERY_DEV_CAP_QPC_ENTRY_SZ_OFFSET 0x82 ··· 321 319 dev_cap->reserved_pds = field >> 4; 322 320 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_PD_OFFSET); 323 321 dev_cap->max_pds = 1 << (field & 0x3f); 322 + MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_XRC_OFFSET); 323 + dev_cap->reserved_xrcds = field >> 4; 324 + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_PD_OFFSET); 325 + dev_cap->max_xrcds = 1 << (field & 0x1f); 324 326 325 327 MLX4_GET(size, outbox, QUERY_DEV_CAP_RDMARC_ENTRY_SZ_OFFSET); 326 328 dev_cap->rdmarc_entry_sz = size;
+2
drivers/net/ethernet/mellanox/mlx4/fw.h
··· 93 93 int max_mcgs; 94 94 int reserved_pds; 95 95 int max_pds; 96 + int reserved_xrcds; 97 + int max_xrcds; 96 98 int qpc_entry_sz; 97 99 int rdmarc_entry_sz; 98 100 int altc_entry_sz;
+30 -6
drivers/net/ethernet/mellanox/mlx4/main.c
··· 96 96 static int log_num_vlan; 97 97 module_param_named(log_num_vlan, log_num_vlan, int, 0444); 98 98 MODULE_PARM_DESC(log_num_vlan, "Log2 max number of VLANs per ETH port (0-7)"); 99 + /* Log2 max number of VLANs per ETH port (0-7) */ 100 + #define MLX4_LOG_NUM_VLANS 7 99 101 100 102 static int use_prio; 101 103 module_param_named(use_prio, use_prio, bool, 0444); ··· 222 220 dev->caps.reserved_mrws = dev_cap->reserved_mrws; 223 221 dev->caps.reserved_uars = dev_cap->reserved_uars; 224 222 dev->caps.reserved_pds = dev_cap->reserved_pds; 223 + dev->caps.reserved_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? 224 + dev_cap->reserved_xrcds : 0; 225 + dev->caps.max_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? 226 + dev_cap->max_xrcds : 0; 225 227 dev->caps.mtt_entry_sz = dev->caps.mtts_per_seg * dev_cap->mtt_entry_sz; 226 228 dev->caps.max_msg_sz = dev_cap->max_msg_sz; 227 229 dev->caps.page_size_cap = ~(u32) (dev_cap->min_page_sz - 1); ··· 236 230 dev->caps.max_gso_sz = dev_cap->max_gso_sz; 237 231 238 232 dev->caps.log_num_macs = log_num_mac; 239 - dev->caps.log_num_vlans = log_num_vlan; 233 + dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS; 240 234 dev->caps.log_num_prios = use_prio ? 3 : 0; 241 235 242 236 for (i = 1; i <= dev->caps.num_ports; ++i) { ··· 918 912 goto err_kar_unmap; 919 913 } 920 914 915 + err = mlx4_init_xrcd_table(dev); 916 + if (err) { 917 + mlx4_err(dev, "Failed to initialize " 918 + "reliable connection domain table, aborting.\n"); 919 + goto err_pd_table_free; 920 + } 921 + 921 922 err = mlx4_init_mr_table(dev); 922 923 if (err) { 923 924 mlx4_err(dev, "Failed to initialize " 924 925 "memory region table, aborting.\n"); 925 - goto err_pd_table_free; 926 + goto err_xrcd_table_free; 926 927 } 927 928 928 929 err = mlx4_init_eq_table(dev); ··· 1011 998 "ib capabilities (%d). Continuing with " 1012 999 "caps = 0\n", port, err); 1013 1000 dev->caps.ib_port_def_cap[port] = ib_port_default_caps; 1001 + 1002 + err = mlx4_check_ext_port_caps(dev, port); 1003 + if (err) 1004 + mlx4_warn(dev, "failed to get port %d extended " 1005 + "port capabilities support info (%d)." 1006 + " Assuming not supported\n", port, err); 1007 + 1014 1008 err = mlx4_SET_PORT(dev, port); 1015 1009 if (err) { 1016 1010 mlx4_err(dev, "Failed to set port %d, aborting\n", ··· 1052 1032 1053 1033 err_mr_table_free: 1054 1034 mlx4_cleanup_mr_table(dev); 1035 + 1036 + err_xrcd_table_free: 1037 + mlx4_cleanup_xrcd_table(dev); 1055 1038 1056 1039 err_pd_table_free: 1057 1040 mlx4_cleanup_pd_table(dev); ··· 1378 1355 mlx4_cmd_use_polling(dev); 1379 1356 mlx4_cleanup_eq_table(dev); 1380 1357 mlx4_cleanup_mr_table(dev); 1358 + mlx4_cleanup_xrcd_table(dev); 1381 1359 mlx4_cleanup_pd_table(dev); 1382 1360 mlx4_cleanup_uar_table(dev); 1383 1361 ··· 1440 1416 mlx4_cmd_use_polling(dev); 1441 1417 mlx4_cleanup_eq_table(dev); 1442 1418 mlx4_cleanup_mr_table(dev); 1419 + mlx4_cleanup_xrcd_table(dev); 1443 1420 mlx4_cleanup_pd_table(dev); 1444 1421 1445 1422 iounmap(priv->kar); ··· 1514 1489 return -1; 1515 1490 } 1516 1491 1517 - if ((log_num_vlan < 0) || (log_num_vlan > 7)) { 1518 - pr_warning("mlx4_core: bad num_vlan: %d\n", log_num_vlan); 1519 - return -1; 1520 - } 1492 + if (log_num_vlan != 0) 1493 + pr_warning("mlx4_core: log_num_vlan - obsolete module param, using %d\n", 1494 + MLX4_LOG_NUM_VLANS); 1521 1495 1522 1496 if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 7)) { 1523 1497 pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg);
+4
drivers/net/ethernet/mellanox/mlx4/mlx4.h
··· 335 335 struct mlx4_cmd cmd; 336 336 337 337 struct mlx4_bitmap pd_bitmap; 338 + struct mlx4_bitmap xrcd_bitmap; 338 339 struct mlx4_uar_table uar_table; 339 340 struct mlx4_mr_table mr_table; 340 341 struct mlx4_cq_table cq_table; ··· 385 384 void mlx4_free_eq_table(struct mlx4_dev *dev); 386 385 387 386 int mlx4_init_pd_table(struct mlx4_dev *dev); 387 + int mlx4_init_xrcd_table(struct mlx4_dev *dev); 388 388 int mlx4_init_uar_table(struct mlx4_dev *dev); 389 389 int mlx4_init_mr_table(struct mlx4_dev *dev); 390 390 int mlx4_init_eq_table(struct mlx4_dev *dev); ··· 395 393 int mlx4_init_mcg_table(struct mlx4_dev *dev); 396 394 397 395 void mlx4_cleanup_pd_table(struct mlx4_dev *dev); 396 + void mlx4_cleanup_xrcd_table(struct mlx4_dev *dev); 398 397 void mlx4_cleanup_uar_table(struct mlx4_dev *dev); 399 398 void mlx4_cleanup_mr_table(struct mlx4_dev *dev); 400 399 void mlx4_cleanup_eq_table(struct mlx4_dev *dev); ··· 453 450 454 451 int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port); 455 452 int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps); 453 + int mlx4_check_ext_port_caps(struct mlx4_dev *dev, u8 port); 456 454 457 455 int mlx4_qp_detach_common(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], 458 456 enum mlx4_protocol prot, enum mlx4_steer_type steer);
+1 -1
drivers/net/ethernet/mellanox/mlx4/mr.c
··· 139 139 140 140 buddy->bits = kzalloc((buddy->max_order + 1) * sizeof (long *), 141 141 GFP_KERNEL); 142 - buddy->num_free = kzalloc((buddy->max_order + 1) * sizeof (int *), 142 + buddy->num_free = kcalloc((buddy->max_order + 1), sizeof *buddy->num_free, 143 143 GFP_KERNEL); 144 144 if (!buddy->bits || !buddy->num_free) 145 145 goto err_out;
+30
drivers/net/ethernet/mellanox/mlx4/pd.c
··· 61 61 } 62 62 EXPORT_SYMBOL_GPL(mlx4_pd_free); 63 63 64 + int mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn) 65 + { 66 + struct mlx4_priv *priv = mlx4_priv(dev); 67 + 68 + *xrcdn = mlx4_bitmap_alloc(&priv->xrcd_bitmap); 69 + if (*xrcdn == -1) 70 + return -ENOMEM; 71 + 72 + return 0; 73 + } 74 + EXPORT_SYMBOL_GPL(mlx4_xrcd_alloc); 75 + 76 + void mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn) 77 + { 78 + mlx4_bitmap_free(&mlx4_priv(dev)->xrcd_bitmap, xrcdn); 79 + } 80 + EXPORT_SYMBOL_GPL(mlx4_xrcd_free); 81 + 64 82 int mlx4_init_pd_table(struct mlx4_dev *dev) 65 83 { 66 84 struct mlx4_priv *priv = mlx4_priv(dev); ··· 92 74 mlx4_bitmap_cleanup(&mlx4_priv(dev)->pd_bitmap); 93 75 } 94 76 77 + int mlx4_init_xrcd_table(struct mlx4_dev *dev) 78 + { 79 + struct mlx4_priv *priv = mlx4_priv(dev); 80 + 81 + return mlx4_bitmap_init(&priv->xrcd_bitmap, (1 << 16), 82 + (1 << 16) - 1, dev->caps.reserved_xrcds + 1, 0); 83 + } 84 + 85 + void mlx4_cleanup_xrcd_table(struct mlx4_dev *dev) 86 + { 87 + mlx4_bitmap_cleanup(&mlx4_priv(dev)->xrcd_bitmap); 88 + } 95 89 96 90 int mlx4_uar_alloc(struct mlx4_dev *dev, struct mlx4_uar *uar) 97 91 {
+59 -13
drivers/net/ethernet/mellanox/mlx4/port.c
··· 148 148 149 149 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER) { 150 150 err = mlx4_uc_steer_add(dev, port, mac, qpn, 1); 151 - if (!err) { 152 - entry = kmalloc(sizeof *entry, GFP_KERNEL); 153 - if (!entry) { 154 - mlx4_uc_steer_release(dev, port, mac, *qpn, 1); 155 - return -ENOMEM; 156 - } 157 - entry->mac = mac; 158 - err = radix_tree_insert(&info->mac_tree, *qpn, entry); 159 - if (err) { 160 - mlx4_uc_steer_release(dev, port, mac, *qpn, 1); 161 - return err; 162 - } 163 - } else 151 + if (err) 164 152 return err; 153 + 154 + entry = kmalloc(sizeof *entry, GFP_KERNEL); 155 + if (!entry) { 156 + mlx4_uc_steer_release(dev, port, mac, *qpn, 1); 157 + return -ENOMEM; 158 + } 159 + 160 + entry->mac = mac; 161 + err = radix_tree_insert(&info->mac_tree, *qpn, entry); 162 + if (err) { 163 + kfree(entry); 164 + mlx4_uc_steer_release(dev, port, mac, *qpn, 1); 165 + return err; 166 + } 165 167 } 168 + 166 169 mlx4_dbg(dev, "Registering MAC: 0x%llx\n", (unsigned long long) mac); 170 + 167 171 mutex_lock(&table->mutex); 168 172 for (i = 0; i < MLX4_MAX_MAC_NUM - 1; i++) { 169 173 if (free < 0 && !table->refs[i]) { ··· 464 460 MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C); 465 461 if (!err) 466 462 *caps = *(__be32 *) (outbuf + 84); 463 + mlx4_free_cmd_mailbox(dev, inmailbox); 464 + mlx4_free_cmd_mailbox(dev, outmailbox); 465 + return err; 466 + } 467 + 468 + int mlx4_check_ext_port_caps(struct mlx4_dev *dev, u8 port) 469 + { 470 + struct mlx4_cmd_mailbox *inmailbox, *outmailbox; 471 + u8 *inbuf, *outbuf; 472 + int err, packet_error; 473 + 474 + inmailbox = mlx4_alloc_cmd_mailbox(dev); 475 + if (IS_ERR(inmailbox)) 476 + return PTR_ERR(inmailbox); 477 + 478 + outmailbox = mlx4_alloc_cmd_mailbox(dev); 479 + if (IS_ERR(outmailbox)) { 480 + mlx4_free_cmd_mailbox(dev, inmailbox); 481 + return PTR_ERR(outmailbox); 482 + } 483 + 484 + inbuf = inmailbox->buf; 485 + outbuf = outmailbox->buf; 486 + memset(inbuf, 0, 256); 487 + memset(outbuf, 0, 256); 488 + inbuf[0] = 1; 489 + inbuf[1] = 1; 490 + inbuf[2] = 1; 491 + inbuf[3] = 1; 492 + 493 + *(__be16 *) (&inbuf[16]) = MLX4_ATTR_EXTENDED_PORT_INFO; 494 + *(__be32 *) (&inbuf[20]) = cpu_to_be32(port); 495 + 496 + err = mlx4_cmd_box(dev, inmailbox->dma, outmailbox->dma, port, 3, 497 + MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C); 498 + 499 + packet_error = be16_to_cpu(*(__be16 *) (outbuf + 4)); 500 + 501 + dev->caps.ext_port_cap[port] = (!err && !packet_error) ? 502 + MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO 503 + : 0; 504 + 467 505 mlx4_free_cmd_mailbox(dev, inmailbox); 468 506 mlx4_free_cmd_mailbox(dev, outmailbox); 469 507 return err;
+3
drivers/net/ethernet/mellanox/mlx4/qp.c
··· 280 280 * We reserve 2 extra QPs per port for the special QPs. The 281 281 * block of special QPs must be aligned to a multiple of 8, so 282 282 * round up. 283 + * 284 + * We also reserve the MSB of the 24-bit QP number to indicate 285 + * that a QP is an XRC QP. 283 286 */ 284 287 dev->caps.sqp_start = 285 288 ALIGN(dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], 8);
+11 -9
drivers/net/ethernet/mellanox/mlx4/srq.c
··· 40 40 struct mlx4_srq_context { 41 41 __be32 state_logsize_srqn; 42 42 u8 logstride; 43 - u8 reserved1[3]; 44 - u8 pg_offset; 45 - u8 reserved2[3]; 46 - u32 reserved3; 43 + u8 reserved1; 44 + __be16 xrcd; 45 + __be32 pg_offset_cqn; 46 + u32 reserved2; 47 47 u8 log_page_size; 48 - u8 reserved4[2]; 48 + u8 reserved3[2]; 49 49 u8 mtt_base_addr_h; 50 50 __be32 mtt_base_addr_l; 51 51 __be32 pd; 52 52 __be16 limit_watermark; 53 53 __be16 wqe_cnt; 54 - u16 reserved5; 54 + u16 reserved4; 55 55 __be16 wqe_counter; 56 - u32 reserved6; 56 + u32 reserved5; 57 57 __be64 db_rec_addr; 58 58 }; 59 59 ··· 109 109 MLX4_CMD_TIME_CLASS_A); 110 110 } 111 111 112 - int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, struct mlx4_mtt *mtt, 113 - u64 db_rec, struct mlx4_srq *srq) 112 + int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcd, 113 + struct mlx4_mtt *mtt, u64 db_rec, struct mlx4_srq *srq) 114 114 { 115 115 struct mlx4_srq_table *srq_table = &mlx4_priv(dev)->srq_table; 116 116 struct mlx4_cmd_mailbox *mailbox; ··· 148 148 srq_context->state_logsize_srqn = cpu_to_be32((ilog2(srq->max) << 24) | 149 149 srq->srqn); 150 150 srq_context->logstride = srq->wqe_shift - 4; 151 + srq_context->xrcd = cpu_to_be16(xrcd); 152 + srq_context->pg_offset_cqn = cpu_to_be32(cqn & 0xffffff); 151 153 srq_context->log_page_size = mtt->page_shift - MLX4_ICM_PAGE_SHIFT; 152 154 153 155 mtt_addr = mlx4_mtt_addr(dev, mtt);
+14 -2
include/linux/mlx4/device.h
··· 61 61 MLX4_DEV_CAP_FLAG_RC = 1LL << 0, 62 62 MLX4_DEV_CAP_FLAG_UC = 1LL << 1, 63 63 MLX4_DEV_CAP_FLAG_UD = 1LL << 2, 64 + MLX4_DEV_CAP_FLAG_XRC = 1LL << 3, 64 65 MLX4_DEV_CAP_FLAG_SRQ = 1LL << 6, 65 66 MLX4_DEV_CAP_FLAG_IPOIB_CSUM = 1LL << 7, 66 67 MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1LL << 8, ··· 82 81 MLX4_DEV_CAP_FLAG_VEP_UC_STEER = 1LL << 41, 83 82 MLX4_DEV_CAP_FLAG_VEP_MC_STEER = 1LL << 42, 84 83 MLX4_DEV_CAP_FLAG_COUNTERS = 1LL << 48 84 + }; 85 + 86 + #define MLX4_ATTR_EXTENDED_PORT_INFO cpu_to_be16(0xff90) 87 + 88 + enum { 89 + MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO = 1 << 0 85 90 }; 86 91 87 92 enum { ··· 264 257 int num_qp_per_mgm; 265 258 int num_pds; 266 259 int reserved_pds; 260 + int max_xrcds; 261 + int reserved_xrcds; 267 262 int mtt_entry_sz; 268 263 u32 max_msg_sz; 269 264 u32 page_size_cap; ··· 286 277 u32 port_mask; 287 278 enum mlx4_port_type possible_type[MLX4_MAX_PORTS + 1]; 288 279 u32 max_counters; 280 + u8 ext_port_cap[MLX4_MAX_PORTS + 1]; 289 281 }; 290 282 291 283 struct mlx4_buf_list { ··· 510 500 511 501 int mlx4_pd_alloc(struct mlx4_dev *dev, u32 *pdn); 512 502 void mlx4_pd_free(struct mlx4_dev *dev, u32 pdn); 503 + int mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn); 504 + void mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn); 513 505 514 506 int mlx4_uar_alloc(struct mlx4_dev *dev, struct mlx4_uar *uar); 515 507 void mlx4_uar_free(struct mlx4_dev *dev, struct mlx4_uar *uar); ··· 551 539 int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp); 552 540 void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp); 553 541 554 - int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, struct mlx4_mtt *mtt, 555 - u64 db_rec, struct mlx4_srq *srq); 542 + int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcdn, 543 + struct mlx4_mtt *mtt, u64 db_rec, struct mlx4_srq *srq); 556 544 void mlx4_srq_free(struct mlx4_dev *dev, struct mlx4_srq *srq); 557 545 int mlx4_srq_arm(struct mlx4_dev *dev, struct mlx4_srq *srq, int limit_watermark); 558 546 int mlx4_srq_query(struct mlx4_dev *dev, struct mlx4_srq *srq, int *limit_watermark);
+2 -1
include/linux/mlx4/qp.h
··· 75 75 MLX4_QP_ST_UC = 0x1, 76 76 MLX4_QP_ST_RD = 0x2, 77 77 MLX4_QP_ST_UD = 0x3, 78 + MLX4_QP_ST_XRC = 0x6, 78 79 MLX4_QP_ST_MLX = 0x7 79 80 }; 80 81 ··· 138 137 __be32 ssn; 139 138 __be32 params2; 140 139 __be32 rnr_nextrecvpsn; 141 - __be32 srcd; 140 + __be32 xrcd; 142 141 __be32 cqn_recv; 143 142 __be64 db_rec_addr; 144 143 __be32 qkey;
+46 -2
include/rdma/ib_user_verbs.h
··· 81 81 IB_USER_VERBS_CMD_MODIFY_SRQ, 82 82 IB_USER_VERBS_CMD_QUERY_SRQ, 83 83 IB_USER_VERBS_CMD_DESTROY_SRQ, 84 - IB_USER_VERBS_CMD_POST_SRQ_RECV 84 + IB_USER_VERBS_CMD_POST_SRQ_RECV, 85 + IB_USER_VERBS_CMD_OPEN_XRCD, 86 + IB_USER_VERBS_CMD_CLOSE_XRCD, 87 + IB_USER_VERBS_CMD_CREATE_XSRQ, 88 + IB_USER_VERBS_CMD_OPEN_QP 85 89 }; 86 90 87 91 /* ··· 224 220 225 221 struct ib_uverbs_dealloc_pd { 226 222 __u32 pd_handle; 223 + }; 224 + 225 + struct ib_uverbs_open_xrcd { 226 + __u64 response; 227 + __u32 fd; 228 + __u32 oflags; 229 + __u64 driver_data[0]; 230 + }; 231 + 232 + struct ib_uverbs_open_xrcd_resp { 233 + __u32 xrcd_handle; 234 + }; 235 + 236 + struct ib_uverbs_close_xrcd { 237 + __u32 xrcd_handle; 227 238 }; 228 239 229 240 struct ib_uverbs_reg_mr { ··· 423 404 __u64 driver_data[0]; 424 405 }; 425 406 407 + struct ib_uverbs_open_qp { 408 + __u64 response; 409 + __u64 user_handle; 410 + __u32 pd_handle; 411 + __u32 qpn; 412 + __u8 qp_type; 413 + __u8 reserved[7]; 414 + __u64 driver_data[0]; 415 + }; 416 + 417 + /* also used for open response */ 426 418 struct ib_uverbs_create_qp_resp { 427 419 __u32 qp_handle; 428 420 __u32 qpn; ··· 678 648 __u64 driver_data[0]; 679 649 }; 680 650 651 + struct ib_uverbs_create_xsrq { 652 + __u64 response; 653 + __u64 user_handle; 654 + __u32 srq_type; 655 + __u32 pd_handle; 656 + __u32 max_wr; 657 + __u32 max_sge; 658 + __u32 srq_limit; 659 + __u32 reserved; 660 + __u32 xrcd_handle; 661 + __u32 cq_handle; 662 + __u64 driver_data[0]; 663 + }; 664 + 681 665 struct ib_uverbs_create_srq_resp { 682 666 __u32 srq_handle; 683 667 __u32 max_wr; 684 668 __u32 max_sge; 685 - __u32 reserved; 669 + __u32 srqn; 686 670 }; 687 671 688 672 struct ib_uverbs_modify_srq {
+104 -2
include/rdma/ib_verbs.h
··· 112 112 */ 113 113 IB_DEVICE_UD_IP_CSUM = (1<<18), 114 114 IB_DEVICE_UD_TSO = (1<<19), 115 + IB_DEVICE_XRC = (1<<20), 115 116 IB_DEVICE_MEM_MGT_EXTENSIONS = (1<<21), 116 117 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK = (1<<22), 117 118 }; ··· 208 207 IB_PORT_SM_DISABLED = 1 << 10, 209 208 IB_PORT_SYS_IMAGE_GUID_SUP = 1 << 11, 210 209 IB_PORT_PKEY_SW_EXT_PORT_TRAP_SUP = 1 << 12, 210 + IB_PORT_EXTENDED_SPEEDS_SUP = 1 << 14, 211 211 IB_PORT_CM_SUP = 1 << 16, 212 212 IB_PORT_SNMP_TUNNEL_SUP = 1 << 17, 213 213 IB_PORT_REINIT_SUP = 1 << 18, ··· 417 415 IB_RATE_40_GBPS = 7, 418 416 IB_RATE_60_GBPS = 8, 419 417 IB_RATE_80_GBPS = 9, 420 - IB_RATE_120_GBPS = 10 418 + IB_RATE_120_GBPS = 10, 419 + IB_RATE_14_GBPS = 11, 420 + IB_RATE_56_GBPS = 12, 421 + IB_RATE_112_GBPS = 13, 422 + IB_RATE_168_GBPS = 14, 423 + IB_RATE_25_GBPS = 15, 424 + IB_RATE_100_GBPS = 16, 425 + IB_RATE_200_GBPS = 17, 426 + IB_RATE_300_GBPS = 18 421 427 }; 422 428 423 429 /** ··· 435 425 * @rate: rate to convert. 436 426 */ 437 427 int ib_rate_to_mult(enum ib_rate rate) __attribute_const__; 428 + 429 + /** 430 + * ib_rate_to_mbps - Convert the IB rate enum to Mbps. 431 + * For example, IB_RATE_2_5_GBPS will be converted to 2500. 432 + * @rate: rate to convert. 433 + */ 434 + int ib_rate_to_mbps(enum ib_rate rate) __attribute_const__; 438 435 439 436 /** 440 437 * mult_to_ib_rate - Convert a multiple of 2.5 Gbit/sec to an IB rate ··· 539 522 IB_CQ_REPORT_MISSED_EVENTS = 1 << 2, 540 523 }; 541 524 525 + enum ib_srq_type { 526 + IB_SRQT_BASIC, 527 + IB_SRQT_XRC 528 + }; 529 + 542 530 enum ib_srq_attr_mask { 543 531 IB_SRQ_MAX_WR = 1 << 0, 544 532 IB_SRQ_LIMIT = 1 << 1, ··· 559 537 void (*event_handler)(struct ib_event *, void *); 560 538 void *srq_context; 561 539 struct ib_srq_attr attr; 540 + enum ib_srq_type srq_type; 541 + 542 + union { 543 + struct { 544 + struct ib_xrcd *xrcd; 545 + struct ib_cq *cq; 546 + } xrc; 547 + } ext; 562 548 }; 563 549 564 550 struct ib_qp_cap { ··· 595 565 IB_QPT_UC, 596 566 IB_QPT_UD, 597 567 IB_QPT_RAW_IPV6, 598 - IB_QPT_RAW_ETHERTYPE 568 + IB_QPT_RAW_ETHERTYPE, 569 + /* Save 8 for RAW_PACKET */ 570 + IB_QPT_XRC_INI = 9, 571 + IB_QPT_XRC_TGT, 572 + IB_QPT_MAX 599 573 }; 600 574 601 575 enum ib_qp_create_flags { ··· 613 579 struct ib_cq *send_cq; 614 580 struct ib_cq *recv_cq; 615 581 struct ib_srq *srq; 582 + struct ib_xrcd *xrcd; /* XRC TGT QPs only */ 616 583 struct ib_qp_cap cap; 617 584 enum ib_sig_type sq_sig_type; 618 585 enum ib_qp_type qp_type; 619 586 enum ib_qp_create_flags create_flags; 620 587 u8 port_num; /* special QP types only */ 588 + }; 589 + 590 + struct ib_qp_open_attr { 591 + void (*event_handler)(struct ib_event *, void *); 592 + void *qp_context; 593 + u32 qp_num; 594 + enum ib_qp_type qp_type; 621 595 }; 622 596 623 597 enum ib_rnr_timeout { ··· 812 770 u32 rkey; 813 771 } fast_reg; 814 772 } wr; 773 + u32 xrc_remote_srq_num; /* XRC TGT QPs only */ 815 774 }; 816 775 817 776 struct ib_recv_wr { ··· 874 831 struct list_head qp_list; 875 832 struct list_head srq_list; 876 833 struct list_head ah_list; 834 + struct list_head xrcd_list; 877 835 int closing; 878 836 }; 879 837 ··· 902 858 atomic_t usecnt; /* count all resources */ 903 859 }; 904 860 861 + struct ib_xrcd { 862 + struct ib_device *device; 863 + atomic_t usecnt; /* count all exposed resources */ 864 + struct inode *inode; 865 + 866 + struct mutex tgt_qp_mutex; 867 + struct list_head tgt_qp_list; 868 + }; 869 + 905 870 struct ib_ah { 906 871 struct ib_device *device; 907 872 struct ib_pd *pd; ··· 935 882 struct ib_uobject *uobject; 936 883 void (*event_handler)(struct ib_event *, void *); 937 884 void *srq_context; 885 + enum ib_srq_type srq_type; 938 886 atomic_t usecnt; 887 + 888 + union { 889 + struct { 890 + struct ib_xrcd *xrcd; 891 + struct ib_cq *cq; 892 + u32 srq_num; 893 + } xrc; 894 + } ext; 939 895 }; 940 896 941 897 struct ib_qp { ··· 953 891 struct ib_cq *send_cq; 954 892 struct ib_cq *recv_cq; 955 893 struct ib_srq *srq; 894 + struct ib_xrcd *xrcd; /* XRC TGT QPs only */ 895 + struct list_head xrcd_list; 896 + atomic_t usecnt; /* count times opened */ 897 + struct list_head open_list; 898 + struct ib_qp *real_qp; 956 899 struct ib_uobject *uobject; 957 900 void (*event_handler)(struct ib_event *, void *); 958 901 void *qp_context; ··· 1216 1149 struct ib_grh *in_grh, 1217 1150 struct ib_mad *in_mad, 1218 1151 struct ib_mad *out_mad); 1152 + struct ib_xrcd * (*alloc_xrcd)(struct ib_device *device, 1153 + struct ib_ucontext *ucontext, 1154 + struct ib_udata *udata); 1155 + int (*dealloc_xrcd)(struct ib_xrcd *xrcd); 1219 1156 1220 1157 struct ib_dma_mapping_ops *dma_ops; 1221 1158 ··· 1512 1441 * @qp: The QP to destroy. 1513 1442 */ 1514 1443 int ib_destroy_qp(struct ib_qp *qp); 1444 + 1445 + /** 1446 + * ib_open_qp - Obtain a reference to an existing sharable QP. 1447 + * @xrcd - XRC domain 1448 + * @qp_open_attr: Attributes identifying the QP to open. 1449 + * 1450 + * Returns a reference to a sharable QP. 1451 + */ 1452 + struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd, 1453 + struct ib_qp_open_attr *qp_open_attr); 1454 + 1455 + /** 1456 + * ib_close_qp - Release an external reference to a QP. 1457 + * @qp: The QP handle to release 1458 + * 1459 + * The opened QP handle is released by the caller. The underlying 1460 + * shared QP is not destroyed until all internal references are released. 1461 + */ 1462 + int ib_close_qp(struct ib_qp *qp); 1515 1463 1516 1464 /** 1517 1465 * ib_post_send - Posts a list of work requests to the send queue of ··· 2149 2059 * @lid: Multicast group LID in host byte order. 2150 2060 */ 2151 2061 int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid); 2062 + 2063 + /** 2064 + * ib_alloc_xrcd - Allocates an XRC domain. 2065 + * @device: The device on which to allocate the XRC domain. 2066 + */ 2067 + struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device); 2068 + 2069 + /** 2070 + * ib_dealloc_xrcd - Deallocates an XRC domain. 2071 + * @xrcd: The XRC domain to deallocate. 2072 + */ 2073 + int ib_dealloc_xrcd(struct ib_xrcd *xrcd); 2152 2074 2153 2075 #endif /* IB_VERBS_H */
+3 -1
include/rdma/iw_cm.h
··· 52 52 struct sockaddr_in local_addr; 53 53 struct sockaddr_in remote_addr; 54 54 void *private_data; 55 - u8 private_data_len; 56 55 void *provider_data; 56 + u8 private_data_len; 57 + u8 ord; 58 + u8 ird; 57 59 }; 58 60 59 61 /**
+1
include/rdma/rdma_cm.h
··· 65 65 enum rdma_port_space { 66 66 RDMA_PS_SDP = 0x0001, 67 67 RDMA_PS_IPOIB = 0x0002, 68 + RDMA_PS_IB = 0x013F, 68 69 RDMA_PS_TCP = 0x0106, 69 70 RDMA_PS_UDP = 0x0111, 70 71 };
+2 -1
include/rdma/rdma_user_cm.h
··· 77 77 __u64 uid; 78 78 __u64 response; 79 79 __u16 ps; 80 - __u8 reserved[6]; 80 + __u8 qp_type; 81 + __u8 reserved[5]; 81 82 }; 82 83 83 84 struct rdma_ucm_create_id_resp {