Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'cleanup-initcall' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull sweeping late_initcall cleanup for arm-soc from Olof Johansson:
"This is a patch series from Shawn Guo that moves from individual
late_initcalls() to using a member in the machine structure to invoke
a platform's late initcalls.

This cleanup is a step in the move towards multiplatform kernels since
it would reduce the need to check for compatible platforms in each and
every initcall."

Fix up trivial conflicts in arch/arm/mach-{exynos/mach-universal_c210.c,
imx/mach-cpuimx51.c, omap2/board-generic.c} due to changes nearby (and,
in the case of cpuimx51.c the board support being deleted)

* tag 'cleanup-initcall' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: ux500: use machine specific hook for late init
ARM: tegra: use machine specific hook for late init
ARM: shmobile: use machine specific hook for late init
ARM: sa1100: use machine specific hook for late init
ARM: s3c64xx: use machine specific hook for late init
ARM: prima2: use machine specific hook for late init
ARM: pnx4008: use machine specific hook for late init
ARM: omap2: use machine specific hook for late init
ARM: omap1: use machine specific hook for late init
ARM: msm: use machine specific hook for late init
ARM: imx: use machine specific hook for late init
ARM: exynos: use machine specific hook for late init
ARM: ep93xx: use machine specific hook for late init
ARM: davinci: use machine specific hook for late init
ARM: provide a late_initcall hook for platform initialization

+614 -106
+1
arch/arm/include/asm/mach/arch.h
··· 43 43 void (*init_irq)(void); 44 44 struct sys_timer *timer; /* system tick timer */ 45 45 void (*init_machine)(void); 46 + void (*init_late)(void); 46 47 #ifdef CONFIG_MULTI_IRQ_HANDLER 47 48 void (*handle_irq)(struct pt_regs *); 48 49 #endif
+8
arch/arm/kernel/setup.c
··· 801 801 } 802 802 arch_initcall(customize_machine); 803 803 804 + static int __init init_machine_late(void) 805 + { 806 + if (machine_desc->init_late) 807 + machine_desc->init_late(); 808 + return 0; 809 + } 810 + late_initcall(init_machine_late); 811 + 804 812 #ifdef CONFIG_KEXEC 805 813 static inline unsigned long long get_total_mem(void) 806 814 {
+1
arch/arm/mach-davinci/board-da830-evm.c
··· 681 681 .init_irq = cp_intc_init, 682 682 .timer = &davinci_timer, 683 683 .init_machine = da830_evm_init, 684 + .init_late = davinci_init_late, 684 685 .dma_zone_size = SZ_128M, 685 686 .restart = da8xx_restart, 686 687 MACHINE_END
+1
arch/arm/mach-davinci/board-da850-evm.c
··· 1411 1411 .init_irq = cp_intc_init, 1412 1412 .timer = &davinci_timer, 1413 1413 .init_machine = da850_evm_init, 1414 + .init_late = davinci_init_late, 1414 1415 .dma_zone_size = SZ_128M, 1415 1416 .restart = da8xx_restart, 1416 1417 MACHINE_END
+1
arch/arm/mach-davinci/board-dm355-evm.c
··· 357 357 .init_irq = davinci_irq_init, 358 358 .timer = &davinci_timer, 359 359 .init_machine = dm355_evm_init, 360 + .init_late = davinci_init_late, 360 361 .dma_zone_size = SZ_128M, 361 362 .restart = davinci_restart, 362 363 MACHINE_END
+1
arch/arm/mach-davinci/board-dm355-leopard.c
··· 276 276 .init_irq = davinci_irq_init, 277 277 .timer = &davinci_timer, 278 278 .init_machine = dm355_leopard_init, 279 + .init_late = davinci_init_late, 279 280 .dma_zone_size = SZ_128M, 280 281 .restart = davinci_restart, 281 282 MACHINE_END
+1
arch/arm/mach-davinci/board-dm365-evm.c
··· 618 618 .init_irq = davinci_irq_init, 619 619 .timer = &davinci_timer, 620 620 .init_machine = dm365_evm_init, 621 + .init_late = davinci_init_late, 621 622 .dma_zone_size = SZ_128M, 622 623 .restart = davinci_restart, 623 624 MACHINE_END
+1
arch/arm/mach-davinci/board-dm644x-evm.c
··· 825 825 .init_irq = davinci_irq_init, 826 826 .timer = &davinci_timer, 827 827 .init_machine = davinci_evm_init, 828 + .init_late = davinci_init_late, 828 829 .dma_zone_size = SZ_128M, 829 830 .restart = davinci_restart, 830 831 MACHINE_END
+2
arch/arm/mach-davinci/board-dm646x-evm.c
··· 788 788 .init_irq = davinci_irq_init, 789 789 .timer = &davinci_timer, 790 790 .init_machine = evm_init, 791 + .init_late = davinci_init_late, 791 792 .dma_zone_size = SZ_128M, 792 793 .restart = davinci_restart, 793 794 MACHINE_END ··· 799 798 .init_irq = davinci_irq_init, 800 799 .timer = &davinci_timer, 801 800 .init_machine = evm_init, 801 + .init_late = davinci_init_late, 802 802 .dma_zone_size = SZ_128M, 803 803 .restart = davinci_restart, 804 804 MACHINE_END
+1
arch/arm/mach-davinci/board-mityomapl138.c
··· 572 572 .init_irq = cp_intc_init, 573 573 .timer = &davinci_timer, 574 574 .init_machine = mityomapl138_init, 575 + .init_late = davinci_init_late, 575 576 .dma_zone_size = SZ_128M, 576 577 .restart = da8xx_restart, 577 578 MACHINE_END
+1
arch/arm/mach-davinci/board-neuros-osd2.c
··· 278 278 .init_irq = davinci_irq_init, 279 279 .timer = &davinci_timer, 280 280 .init_machine = davinci_ntosd2_init, 281 + .init_late = davinci_init_late, 281 282 .dma_zone_size = SZ_128M, 282 283 .restart = davinci_restart, 283 284 MACHINE_END
+1
arch/arm/mach-davinci/board-omapl138-hawk.c
··· 343 343 .init_irq = cp_intc_init, 344 344 .timer = &davinci_timer, 345 345 .init_machine = omapl138_hawk_init, 346 + .init_late = davinci_init_late, 346 347 .dma_zone_size = SZ_128M, 347 348 .restart = da8xx_restart, 348 349 MACHINE_END
+1
arch/arm/mach-davinci/board-sffsdr.c
··· 157 157 .init_irq = davinci_irq_init, 158 158 .timer = &davinci_timer, 159 159 .init_machine = davinci_sffsdr_init, 160 + .init_late = davinci_init_late, 160 161 .dma_zone_size = SZ_128M, 161 162 .restart = davinci_restart, 162 163 MACHINE_END
+1
arch/arm/mach-davinci/board-tnetv107x-evm.c
··· 282 282 .init_irq = cp_intc_init, 283 283 .timer = &davinci_timer, 284 284 .init_machine = tnetv107x_evm_board_init, 285 + .init_late = davinci_init_late, 285 286 .dma_zone_size = SZ_128M, 286 287 .restart = tnetv107x_restart, 287 288 MACHINE_END
+1 -2
arch/arm/mach-davinci/clock.c
··· 213 213 /* 214 214 * Disable any unused clocks left on by the bootloader 215 215 */ 216 - static int __init clk_disable_unused(void) 216 + int __init davinci_clk_disable_unused(void) 217 217 { 218 218 struct clk *ck; 219 219 ··· 237 237 238 238 return 0; 239 239 } 240 - late_initcall(clk_disable_unused); 241 240 #endif 242 241 243 242 static unsigned long clk_sysclk_recalc(struct clk *clk)
+7
arch/arm/mach-davinci/common.c
··· 117 117 err: 118 118 panic("davinci_common_init: SoC Initialization failed\n"); 119 119 } 120 + 121 + void __init davinci_init_late(void) 122 + { 123 + davinci_cpufreq_init(); 124 + davinci_pm_init(); 125 + davinci_clk_disable_unused(); 126 + }
+1 -2
arch/arm/mach-davinci/cpufreq.c
··· 240 240 .remove = __exit_p(davinci_cpufreq_remove), 241 241 }; 242 242 243 - static int __init davinci_cpufreq_init(void) 243 + int __init davinci_cpufreq_init(void) 244 244 { 245 245 return platform_driver_probe(&davinci_cpufreq_driver, 246 246 davinci_cpufreq_probe); 247 247 } 248 - late_initcall(davinci_cpufreq_init); 249 248
+19
arch/arm/mach-davinci/include/mach/common.h
··· 84 84 extern void davinci_common_init(struct davinci_soc_info *soc_info); 85 85 extern void davinci_init_ide(void); 86 86 void davinci_restart(char mode, const char *cmd); 87 + void davinci_init_late(void); 88 + 89 + #ifdef CONFIG_DAVINCI_RESET_CLOCKS 90 + int davinci_clk_disable_unused(void); 91 + #else 92 + static inline int davinci_clk_disable_unused(void) { return 0; } 93 + #endif 94 + 95 + #ifdef CONFIG_CPU_FREQ 96 + int davinci_cpufreq_init(void); 97 + #else 98 + static inline int davinci_cpufreq_init(void) { return 0; } 99 + #endif 100 + 101 + #ifdef CONFIG_SUSPEND 102 + int davinci_pm_init(void); 103 + #else 104 + static inline int davinci_pm_init(void) { return 0; } 105 + #endif 87 106 88 107 /* standard place to map on-chip SRAMs; they *may* support DMA */ 89 108 #define SRAM_VIRT 0xfffe0000
+1 -2
arch/arm/mach-davinci/pm.c
··· 152 152 .remove = __exit_p(davinci_pm_remove), 153 153 }; 154 154 155 - static int __init davinci_pm_init(void) 155 + int __init davinci_pm_init(void) 156 156 { 157 157 return platform_driver_probe(&davinci_pm_driver, davinci_pm_probe); 158 158 } 159 - late_initcall(davinci_pm_init);
+1
arch/arm/mach-ep93xx/adssphere.c
··· 41 41 .handle_irq = vic_handle_irq, 42 42 .timer = &ep93xx_timer, 43 43 .init_machine = adssphere_init_machine, 44 + .init_late = ep93xx_init_late, 44 45 .restart = ep93xx_restart, 45 46 MACHINE_END
+5
arch/arm/mach-ep93xx/core.c
··· 834 834 while (1) 835 835 ; 836 836 } 837 + 838 + void __init ep93xx_init_late(void) 839 + { 840 + crunch_init(); 841 + }
+1 -3
arch/arm/mach-ep93xx/crunch.c
··· 79 79 .notifier_call = crunch_do, 80 80 }; 81 81 82 - static int __init crunch_init(void) 82 + int __init crunch_init(void) 83 83 { 84 84 thread_register_notifier(&crunch_notifier_block); 85 85 elf_hwcap |= HWCAP_CRUNCH; 86 86 87 87 return 0; 88 88 } 89 - 90 - late_initcall(crunch_init);
+8
arch/arm/mach-ep93xx/edb93xx.c
··· 255 255 .handle_irq = vic_handle_irq, 256 256 .timer = &ep93xx_timer, 257 257 .init_machine = edb93xx_init_machine, 258 + .init_late = ep93xx_init_late, 258 259 .restart = ep93xx_restart, 259 260 MACHINE_END 260 261 #endif ··· 269 268 .handle_irq = vic_handle_irq, 270 269 .timer = &ep93xx_timer, 271 270 .init_machine = edb93xx_init_machine, 271 + .init_late = ep93xx_init_late, 272 272 .restart = ep93xx_restart, 273 273 MACHINE_END 274 274 #endif ··· 283 281 .handle_irq = vic_handle_irq, 284 282 .timer = &ep93xx_timer, 285 283 .init_machine = edb93xx_init_machine, 284 + .init_late = ep93xx_init_late, 286 285 .restart = ep93xx_restart, 287 286 MACHINE_END 288 287 #endif ··· 297 294 .handle_irq = vic_handle_irq, 298 295 .timer = &ep93xx_timer, 299 296 .init_machine = edb93xx_init_machine, 297 + .init_late = ep93xx_init_late, 300 298 .restart = ep93xx_restart, 301 299 MACHINE_END 302 300 #endif ··· 311 307 .handle_irq = vic_handle_irq, 312 308 .timer = &ep93xx_timer, 313 309 .init_machine = edb93xx_init_machine, 310 + .init_late = ep93xx_init_late, 314 311 .restart = ep93xx_restart, 315 312 MACHINE_END 316 313 #endif ··· 325 320 .handle_irq = vic_handle_irq, 326 321 .timer = &ep93xx_timer, 327 322 .init_machine = edb93xx_init_machine, 323 + .init_late = ep93xx_init_late, 328 324 .restart = ep93xx_restart, 329 325 MACHINE_END 330 326 #endif ··· 339 333 .handle_irq = vic_handle_irq, 340 334 .timer = &ep93xx_timer, 341 335 .init_machine = edb93xx_init_machine, 336 + .init_late = ep93xx_init_late, 342 337 .restart = ep93xx_restart, 343 338 MACHINE_END 344 339 #endif ··· 353 346 .handle_irq = vic_handle_irq, 354 347 .timer = &ep93xx_timer, 355 348 .init_machine = edb93xx_init_machine, 349 + .init_late = ep93xx_init_late, 356 350 .restart = ep93xx_restart, 357 351 MACHINE_END 358 352 #endif
+1
arch/arm/mach-ep93xx/gesbc9312.c
··· 41 41 .handle_irq = vic_handle_irq, 42 42 .timer = &ep93xx_timer, 43 43 .init_machine = gesbc9312_init_machine, 44 + .init_late = ep93xx_init_late, 44 45 .restart = ep93xx_restart, 45 46 MACHINE_END
+7
arch/arm/mach-ep93xx/include/mach/platform.h
··· 53 53 extern struct sys_timer ep93xx_timer; 54 54 55 55 void ep93xx_restart(char, const char *); 56 + void ep93xx_init_late(void); 57 + 58 + #ifdef CONFIG_CRUNCH 59 + int crunch_init(void); 60 + #else 61 + static inline int crunch_init(void) { return 0; } 62 + #endif 56 63 57 64 #endif
+4
arch/arm/mach-ep93xx/micro9.c
··· 85 85 .handle_irq = vic_handle_irq, 86 86 .timer = &ep93xx_timer, 87 87 .init_machine = micro9_init_machine, 88 + .init_late = ep93xx_init_late, 88 89 .restart = ep93xx_restart, 89 90 MACHINE_END 90 91 #endif ··· 99 98 .handle_irq = vic_handle_irq, 100 99 .timer = &ep93xx_timer, 101 100 .init_machine = micro9_init_machine, 101 + .init_late = ep93xx_init_late, 102 102 .restart = ep93xx_restart, 103 103 MACHINE_END 104 104 #endif ··· 113 111 .handle_irq = vic_handle_irq, 114 112 .timer = &ep93xx_timer, 115 113 .init_machine = micro9_init_machine, 114 + .init_late = ep93xx_init_late, 116 115 .restart = ep93xx_restart, 117 116 MACHINE_END 118 117 #endif ··· 127 124 .handle_irq = vic_handle_irq, 128 125 .timer = &ep93xx_timer, 129 126 .init_machine = micro9_init_machine, 127 + .init_late = ep93xx_init_late, 130 128 .restart = ep93xx_restart, 131 129 MACHINE_END 132 130 #endif
+1
arch/arm/mach-ep93xx/simone.c
··· 86 86 .handle_irq = vic_handle_irq, 87 87 .timer = &ep93xx_timer, 88 88 .init_machine = simone_init_machine, 89 + .init_late = ep93xx_init_late, 89 90 .restart = ep93xx_restart, 90 91 MACHINE_END
+1
arch/arm/mach-ep93xx/snappercl15.c
··· 183 183 .handle_irq = vic_handle_irq, 184 184 .timer = &ep93xx_timer, 185 185 .init_machine = snappercl15_init_machine, 186 + .init_late = ep93xx_init_late, 186 187 .restart = ep93xx_restart, 187 188 MACHINE_END
+1
arch/arm/mach-ep93xx/ts72xx.c
··· 252 252 .handle_irq = vic_handle_irq, 253 253 .timer = &ep93xx_timer, 254 254 .init_machine = ts72xx_init_machine, 255 + .init_late = ep93xx_init_late, 255 256 .restart = ep93xx_restart, 256 257 MACHINE_END
+1
arch/arm/mach-ep93xx/vision_ep9307.c
··· 367 367 .handle_irq = vic_handle_irq, 368 368 .timer = &ep93xx_timer, 369 369 .init_machine = vision_init_machine, 370 + .init_late = ep93xx_init_late, 370 371 .restart = ep93xx_restart, 371 372 MACHINE_END
+5
arch/arm/mach-exynos/common.c
··· 288 288 __raw_writel(0x1, EXYNOS_SWRESET); 289 289 } 290 290 291 + void __init exynos_init_late(void) 292 + { 293 + exynos_pm_late_initcall(); 294 + } 295 + 291 296 /* 292 297 * exynos_map_io 293 298 *
+7
arch/arm/mach-exynos/common.h
··· 19 19 void exynos5_init_irq(void); 20 20 void exynos4_restart(char mode, const char *cmd); 21 21 void exynos5_restart(char mode, const char *cmd); 22 + void exynos_init_late(void); 23 + 24 + #ifdef CONFIG_PM_GENERIC_DOMAINS 25 + int exynos_pm_late_initcall(void); 26 + #else 27 + static int exynos_pm_late_initcall(void) { return 0; } 28 + #endif 22 29 23 30 #ifdef CONFIG_ARCH_EXYNOS4 24 31 void exynos4_register_clocks(void);
+1
arch/arm/mach-exynos/mach-armlex4210.c
··· 203 203 .map_io = armlex4210_map_io, 204 204 .handle_irq = gic_handle_irq, 205 205 .init_machine = armlex4210_machine_init, 206 + .init_late = exynos_init_late, 206 207 .timer = &exynos4_timer, 207 208 .restart = exynos4_restart, 208 209 MACHINE_END
+1
arch/arm/mach-exynos/mach-exynos4-dt.c
··· 83 83 .map_io = exynos4210_dt_map_io, 84 84 .handle_irq = gic_handle_irq, 85 85 .init_machine = exynos4210_dt_machine_init, 86 + .init_late = exynos_init_late, 86 87 .timer = &exynos4_timer, 87 88 .dt_compat = exynos4210_dt_compat, 88 89 .restart = exynos4_restart,
+1
arch/arm/mach-exynos/mach-exynos5-dt.c
··· 76 76 .map_io = exynos5250_dt_map_io, 77 77 .handle_irq = gic_handle_irq, 78 78 .init_machine = exynos5250_dt_machine_init, 79 + .init_late = exynos_init_late, 79 80 .timer = &exynos4_timer, 80 81 .dt_compat = exynos5250_dt_compat, 81 82 .restart = exynos5_restart,
+1
arch/arm/mach-exynos/mach-nuri.c
··· 1389 1389 .map_io = nuri_map_io, 1390 1390 .handle_irq = gic_handle_irq, 1391 1391 .init_machine = nuri_machine_init, 1392 + .init_late = exynos_init_late, 1392 1393 .timer = &exynos4_timer, 1393 1394 .reserve = &nuri_reserve, 1394 1395 .restart = exynos4_restart,
+1
arch/arm/mach-exynos/mach-origen.c
··· 766 766 .map_io = origen_map_io, 767 767 .handle_irq = gic_handle_irq, 768 768 .init_machine = origen_machine_init, 769 + .init_late = exynos_init_late, 769 770 .timer = &exynos4_timer, 770 771 .reserve = &origen_reserve, 771 772 .restart = exynos4_restart,
+1
arch/arm/mach-exynos/mach-smdk4x12.c
··· 316 316 .map_io = smdk4x12_map_io, 317 317 .handle_irq = gic_handle_irq, 318 318 .init_machine = smdk4x12_machine_init, 319 + .init_late = exynos_init_late, 319 320 .timer = &exynos4_timer, 320 321 .restart = exynos4_restart, 321 322 .reserve = &smdk4x12_reserve,
+1
arch/arm/mach-exynos/mach-smdkv310.c
··· 411 411 .map_io = smdkv310_map_io, 412 412 .handle_irq = gic_handle_irq, 413 413 .init_machine = smdkv310_machine_init, 414 + .init_late = exynos_init_late, 414 415 .timer = &exynos4_timer, 415 416 .restart = exynos4_restart, 416 417 MACHINE_END
+1
arch/arm/mach-exynos/mach-universal_c210.c
··· 1157 1157 .map_io = universal_map_io, 1158 1158 .handle_irq = gic_handle_irq, 1159 1159 .init_machine = universal_machine_init, 1160 + .init_late = exynos_init_late, 1160 1161 .timer = &s5p_timer, 1161 1162 .reserve = &universal_reserve, 1162 1163 .restart = exynos4_restart,
+1 -2
arch/arm/mach-exynos/pm_domains.c
··· 193 193 } 194 194 arch_initcall(exynos4_pm_init_power_domain); 195 195 196 - static __init int exynos_pm_late_initcall(void) 196 + int __init exynos_pm_late_initcall(void) 197 197 { 198 198 pm_genpd_poweroff_unused(); 199 199 return 0; 200 200 } 201 - late_initcall(exynos_pm_late_initcall);
+1 -5
arch/arm/mach-imx/cpu-imx5.c
··· 62 62 * Dependent on link order - so the assumption is that vfp_init is called 63 63 * before us. 64 64 */ 65 - static int __init mx51_neon_fixup(void) 65 + int __init mx51_neon_fixup(void) 66 66 { 67 - if (!cpu_is_mx51()) 68 - return 0; 69 - 70 67 if (mx51_revision() < IMX_CHIP_REVISION_3_0 && 71 68 (elf_hwcap & HWCAP_NEON)) { 72 69 elf_hwcap &= ~HWCAP_NEON; ··· 72 75 return 0; 73 76 } 74 77 75 - late_initcall(mx51_neon_fixup); 76 78 #endif 77 79 78 80 static int get_mx53_srev(void)
+1
arch/arm/mach-imx/imx51-dt.c
··· 118 118 .handle_irq = imx51_handle_irq, 119 119 .timer = &imx51_timer, 120 120 .init_machine = imx51_dt_init, 121 + .init_late = imx51_init_late, 121 122 .dt_compat = imx51_dt_board_compat, 122 123 .restart = mxc_restart, 123 124 MACHINE_END
+1
arch/arm/mach-imx/mach-cpuimx51sd.c
··· 369 369 .handle_irq = imx51_handle_irq, 370 370 .timer = &mxc_timer, 371 371 .init_machine = eukrea_cpuimx51sd_init, 372 + .init_late = imx51_init_late, 372 373 .restart = mxc_restart, 373 374 MACHINE_END
+1
arch/arm/mach-imx/mach-mx51_3ds.c
··· 175 175 .handle_irq = imx51_handle_irq, 176 176 .timer = &mx51_3ds_timer, 177 177 .init_machine = mx51_3ds_init, 178 + .init_late = imx51_init_late, 178 179 .restart = mxc_restart, 179 180 MACHINE_END
+1
arch/arm/mach-imx/mach-mx51_babbage.c
··· 432 432 .handle_irq = imx51_handle_irq, 433 433 .timer = &mx51_babbage_timer, 434 434 .init_machine = mx51_babbage_init, 435 + .init_late = imx51_init_late, 435 436 .restart = mxc_restart, 436 437 MACHINE_END
+23 -19
arch/arm/mach-imx/mach-mx51_efikamx.c
··· 207 207 208 208 static int __init mx51_efikamx_power_init(void) 209 209 { 210 - if (machine_is_mx51_efikamx()) { 211 - pwgt1 = regulator_get(NULL, "pwgt1"); 212 - pwgt2 = regulator_get(NULL, "pwgt2"); 213 - if (!IS_ERR(pwgt1) && !IS_ERR(pwgt2)) { 214 - regulator_enable(pwgt1); 215 - regulator_enable(pwgt2); 216 - } 217 - gpio_request(EFIKAMX_POWEROFF, "poweroff"); 218 - pm_power_off = mx51_efikamx_power_off; 219 - 220 - /* enable coincell charger. maybe need a small power driver ? */ 221 - coincell = regulator_get(NULL, "coincell"); 222 - if (!IS_ERR(coincell)) { 223 - regulator_set_voltage(coincell, 3000000, 3000000); 224 - regulator_enable(coincell); 225 - } 226 - 227 - regulator_has_full_constraints(); 210 + pwgt1 = regulator_get(NULL, "pwgt1"); 211 + pwgt2 = regulator_get(NULL, "pwgt2"); 212 + if (!IS_ERR(pwgt1) && !IS_ERR(pwgt2)) { 213 + regulator_enable(pwgt1); 214 + regulator_enable(pwgt2); 228 215 } 216 + gpio_request(EFIKAMX_POWEROFF, "poweroff"); 217 + pm_power_off = mx51_efikamx_power_off; 218 + 219 + /* enable coincell charger. maybe need a small power driver ? */ 220 + coincell = regulator_get(NULL, "coincell"); 221 + if (!IS_ERR(coincell)) { 222 + regulator_set_voltage(coincell, 3000000, 3000000); 223 + regulator_enable(coincell); 224 + } 225 + 226 + regulator_has_full_constraints(); 229 227 230 228 return 0; 231 229 } 232 - late_initcall(mx51_efikamx_power_init); 230 + 231 + static void __init mx51_efikamx_init_late(void) 232 + { 233 + imx51_init_late(); 234 + mx51_efikamx_power_init(); 235 + } 233 236 234 237 static void __init mx51_efikamx_init(void) 235 238 { ··· 295 292 .handle_irq = imx51_handle_irq, 296 293 .timer = &mx51_efikamx_timer, 297 294 .init_machine = mx51_efikamx_init, 295 + .init_late = mx51_efikamx_init_late, 298 296 .restart = mx51_efikamx_restart, 299 297 MACHINE_END
+16 -12
arch/arm/mach-imx/mach-mx51_efikasb.c
··· 211 211 212 212 static int __init mx51_efikasb_power_init(void) 213 213 { 214 - if (machine_is_mx51_efikasb()) { 215 - pwgt1 = regulator_get(NULL, "pwgt1"); 216 - pwgt2 = regulator_get(NULL, "pwgt2"); 217 - if (!IS_ERR(pwgt1) && !IS_ERR(pwgt2)) { 218 - regulator_enable(pwgt1); 219 - regulator_enable(pwgt2); 220 - } 221 - gpio_request(EFIKASB_POWEROFF, "poweroff"); 222 - pm_power_off = mx51_efikasb_power_off; 223 - 224 - regulator_has_full_constraints(); 214 + pwgt1 = regulator_get(NULL, "pwgt1"); 215 + pwgt2 = regulator_get(NULL, "pwgt2"); 216 + if (!IS_ERR(pwgt1) && !IS_ERR(pwgt2)) { 217 + regulator_enable(pwgt1); 218 + regulator_enable(pwgt2); 225 219 } 220 + gpio_request(EFIKASB_POWEROFF, "poweroff"); 221 + pm_power_off = mx51_efikasb_power_off; 222 + 223 + regulator_has_full_constraints(); 226 224 227 225 return 0; 228 226 } 229 - late_initcall(mx51_efikasb_power_init); 227 + 228 + static void __init mx51_efikasb_init_late(void) 229 + { 230 + imx51_init_late(); 231 + mx51_efikasb_power_init(); 232 + } 230 233 231 234 /* 01 R1.3 board 232 235 10 R2.0 board */ ··· 290 287 .init_irq = mx51_init_irq, 291 288 .handle_irq = imx51_handle_irq, 292 289 .init_machine = efikasb_board_init, 290 + .init_late = mx51_efikasb_init_late, 293 291 .timer = &mx51_efikasb_timer, 294 292 .restart = mxc_restart, 295 293 MACHINE_END
+6
arch/arm/mach-imx/mach-pcm037.c
··· 694 694 MX3_CAMERA_BUF_SIZE); 695 695 } 696 696 697 + static void __init pcm037_init_late(void) 698 + { 699 + pcm037_eet_init_devices(); 700 + } 701 + 697 702 MACHINE_START(PCM037, "Phytec Phycore pcm037") 698 703 /* Maintainer: Pengutronix */ 699 704 .atag_offset = 0x100, ··· 709 704 .handle_irq = imx31_handle_irq, 710 705 .timer = &pcm037_timer, 711 706 .init_machine = pcm037_init, 707 + .init_late = pcm037_init_late, 712 708 .restart = mxc_restart, 713 709 MACHINE_END
+2 -3
arch/arm/mach-imx/mach-pcm037_eet.c
··· 160 160 .rep = 0, /* No auto-repeat */ 161 161 }; 162 162 163 - static int __init eet_init_devices(void) 163 + int __init pcm037_eet_init_devices(void) 164 164 { 165 - if (!machine_is_pcm037() || pcm037_variant() != PCM037_EET) 165 + if (pcm037_variant() != PCM037_EET) 166 166 return 0; 167 167 168 168 mxc_iomux_setup_multiple_pins(pcm037_eet_pins, ··· 176 176 177 177 return 0; 178 178 } 179 - late_initcall(eet_init_devices);
+5
arch/arm/mach-imx/mm-imx5.c
··· 237 237 platform_device_register_simple("imx31-audmux", 0, imx53_audmux_res, 238 238 ARRAY_SIZE(imx53_audmux_res)); 239 239 } 240 + 241 + void __init imx51_init_late(void) 242 + { 243 + mx51_neon_fixup(); 244 + }
+6
arch/arm/mach-imx/pcm037.h
··· 8 8 9 9 extern enum pcm037_board_variant pcm037_variant(void); 10 10 11 + #ifdef CONFIG_MACH_PCM037_EET 12 + int pcm037_eet_init_devices(void); 13 + #else 14 + static inline int pcm037_eet_init_devices(void) { return 0; } 15 + #endif 16 + 11 17 #endif
+6
arch/arm/mach-msm/board-halibut.c
··· 94 94 msm_clock_init(msm_clocks_7x01a, msm_num_clocks_7x01a); 95 95 } 96 96 97 + static void __init halibut_init_late(void) 98 + { 99 + smd_debugfs_init(); 100 + } 101 + 97 102 MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)") 98 103 .atag_offset = 0x100, 99 104 .fixup = halibut_fixup, ··· 106 101 .init_early = halibut_init_early, 107 102 .init_irq = halibut_init_irq, 108 103 .init_machine = halibut_init, 104 + .init_late = halibut_init_late, 109 105 .timer = &msm_timer, 110 106 MACHINE_END
+6
arch/arm/mach-msm/board-mahimahi.c
··· 71 71 msm_clock_init(); 72 72 } 73 73 74 + static void __init mahimahi_init_late(void) 75 + { 76 + smd_debugfs_init(); 77 + } 78 + 74 79 extern struct sys_timer msm_timer; 75 80 76 81 MACHINE_START(MAHIMAHI, "mahimahi") ··· 84 79 .map_io = mahimahi_map_io, 85 80 .init_irq = msm_init_irq, 86 81 .init_machine = mahimahi_init, 82 + .init_late = mahimahi_init_late, 87 83 .timer = &msm_timer, 88 84 MACHINE_END
+9
arch/arm/mach-msm/board-msm7x27.c
··· 128 128 #endif 129 129 } 130 130 131 + static void __init msm7x2x_init_late(void) 132 + { 133 + smd_debugfs_init(); 134 + } 135 + 131 136 MACHINE_START(MSM7X27_SURF, "QCT MSM7x27 SURF") 132 137 .atag_offset = 0x100, 133 138 .map_io = msm7x2x_map_io, 134 139 .init_irq = msm7x2x_init_irq, 135 140 .init_machine = msm7x2x_init, 141 + .init_late = msm7x2x_init_late, 136 142 .timer = &msm_timer, 137 143 MACHINE_END 138 144 ··· 147 141 .map_io = msm7x2x_map_io, 148 142 .init_irq = msm7x2x_init_irq, 149 143 .init_machine = msm7x2x_init, 144 + .init_late = msm7x2x_init_late, 150 145 .timer = &msm_timer, 151 146 MACHINE_END 152 147 ··· 156 149 .map_io = msm7x2x_map_io, 157 150 .init_irq = msm7x2x_init_irq, 158 151 .init_machine = msm7x2x_init, 152 + .init_late = msm7x2x_init_late, 159 153 .timer = &msm_timer, 160 154 MACHINE_END 161 155 ··· 165 157 .map_io = msm7x2x_map_io, 166 158 .init_irq = msm7x2x_init_irq, 167 159 .init_machine = msm7x2x_init, 160 + .init_late = msm7x2x_init_late, 168 161 .timer = &msm_timer, 169 162 MACHINE_END
+8
arch/arm/mach-msm/board-msm7x30.c
··· 119 119 msm_clock_init(msm_clocks_7x30, msm_num_clocks_7x30); 120 120 } 121 121 122 + static void __init msm7x30_init_late(void) 123 + { 124 + smd_debugfs_init(); 125 + } 126 + 122 127 MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF") 123 128 .atag_offset = 0x100, 124 129 .fixup = msm7x30_fixup, ··· 131 126 .map_io = msm7x30_map_io, 132 127 .init_irq = msm7x30_init_irq, 133 128 .init_machine = msm7x30_init, 129 + .init_late = msm7x30_init_late, 134 130 .timer = &msm_timer, 135 131 MACHINE_END 136 132 ··· 142 136 .map_io = msm7x30_map_io, 143 137 .init_irq = msm7x30_init_irq, 144 138 .init_machine = msm7x30_init, 139 + .init_late = msm7x30_init_late, 145 140 .timer = &msm_timer, 146 141 MACHINE_END 147 142 ··· 153 146 .map_io = msm7x30_map_io, 154 147 .init_irq = msm7x30_init_irq, 155 148 .init_machine = msm7x30_init, 149 + .init_late = msm7x30_init_late, 156 150 .timer = &msm_timer, 157 151 MACHINE_END
+7
arch/arm/mach-msm/board-msm8960.c
··· 93 93 platform_add_devices(rumi3_devices, ARRAY_SIZE(rumi3_devices)); 94 94 } 95 95 96 + static void __init msm8960_init_late(void) 97 + { 98 + smd_debugfs_init(); 99 + } 100 + 96 101 MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR") 97 102 .fixup = msm8960_fixup, 98 103 .reserve = msm8960_reserve, ··· 106 101 .timer = &msm_timer, 107 102 .handle_irq = gic_handle_irq, 108 103 .init_machine = msm8960_sim_init, 104 + .init_late = msm8960_init_late, 109 105 MACHINE_END 110 106 111 107 MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3") ··· 117 111 .timer = &msm_timer, 118 112 .handle_irq = gic_handle_irq, 119 113 .init_machine = msm8960_rumi3_init, 114 + .init_late = msm8960_init_late, 120 115 MACHINE_END 121 116
+10
arch/arm/mach-msm/board-msm8x60.c
··· 81 81 { 82 82 } 83 83 84 + static void __init msm8x60_init_late(void) 85 + { 86 + smd_debugfs_init(); 87 + } 88 + 84 89 #ifdef CONFIG_OF 85 90 static struct of_dev_auxdata msm_auxdata_lookup[] __initdata = { 86 91 {} ··· 116 111 .init_irq = msm8x60_init_irq, 117 112 .handle_irq = gic_handle_irq, 118 113 .init_machine = msm8x60_init, 114 + .init_late = msm8x60_init_late, 119 115 .timer = &msm_timer, 120 116 MACHINE_END 121 117 ··· 127 121 .init_irq = msm8x60_init_irq, 128 122 .handle_irq = gic_handle_irq, 129 123 .init_machine = msm8x60_init, 124 + .init_late = msm8x60_init_late, 130 125 .timer = &msm_timer, 131 126 MACHINE_END 132 127 ··· 138 131 .init_irq = msm8x60_init_irq, 139 132 .handle_irq = gic_handle_irq, 140 133 .init_machine = msm8x60_init, 134 + .init_late = msm8x60_init_late, 141 135 .timer = &msm_timer, 142 136 MACHINE_END 143 137 ··· 149 141 .init_irq = msm8x60_init_irq, 150 142 .handle_irq = gic_handle_irq, 151 143 .init_machine = msm8x60_init, 144 + .init_late = msm8x60_init_late, 152 145 .timer = &msm_timer, 153 146 MACHINE_END 154 147 ··· 159 150 .map_io = msm8x60_map_io, 160 151 .init_irq = msm8x60_init_irq, 161 152 .init_machine = msm8x60_dt_init, 153 + .init_late = msm8x60_init_late, 162 154 .timer = &msm_timer, 163 155 .dt_compat = msm8x60_fluid_match, 164 156 MACHINE_END
+7
arch/arm/mach-msm/board-qsd8x50.c
··· 190 190 qsd8x50_init_mmc(); 191 191 } 192 192 193 + static void __init qsd8x50_init_late(void) 194 + { 195 + smd_debugfs_init(); 196 + } 197 + 193 198 MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF") 194 199 .atag_offset = 0x100, 195 200 .map_io = qsd8x50_map_io, 196 201 .init_irq = qsd8x50_init_irq, 197 202 .init_machine = qsd8x50_init, 203 + .init_late = qsd8x50_init_late, 198 204 .timer = &msm_timer, 199 205 MACHINE_END 200 206 ··· 209 203 .map_io = qsd8x50_map_io, 210 204 .init_irq = qsd8x50_init_irq, 211 205 .init_machine = qsd8x50_init, 206 + .init_late = qsd8x50_init_late, 212 207 .timer = &msm_timer, 213 208 MACHINE_END
+6
arch/arm/mach-msm/board-sapphire.c
··· 101 101 msm_clock_init(); 102 102 } 103 103 104 + static void __init sapphire_init_late(void) 105 + { 106 + smd_debugfs_init(); 107 + } 108 + 104 109 MACHINE_START(SAPPHIRE, "sapphire") 105 110 /* Maintainer: Brian Swetland <swetland@google.com> */ 106 111 .atag_offset = 0x100, ··· 113 108 .map_io = sapphire_map_io, 114 109 .init_irq = sapphire_init_irq, 115 110 .init_machine = sapphire_init, 111 + .init_late = sapphire_init_late, 116 112 .timer = &msm_timer, 117 113 MACHINE_END
+6
arch/arm/mach-msm/board-trout.c
··· 98 98 msm_clock_init(msm_clocks_7x01a, msm_num_clocks_7x01a); 99 99 } 100 100 101 + static void __init trout_init_late(void) 102 + { 103 + smd_debugfs_init(); 104 + } 105 + 101 106 MACHINE_START(TROUT, "HTC Dream") 102 107 .atag_offset = 0x100, 103 108 .fixup = trout_fixup, ··· 110 105 .init_early = trout_init_early, 111 106 .init_irq = trout_init_irq, 112 107 .init_machine = trout_init, 108 + .init_late = trout_init_late, 113 109 .timer = &msm_timer, 114 110 MACHINE_END
+6
arch/arm/mach-msm/include/mach/board.h
··· 47 47 struct msm_mmc_platform_data *plat, 48 48 unsigned int stat_irq, unsigned long stat_irq_flags); 49 49 50 + #if defined(CONFIG_MSM_SMD) && defined(CONFIG_DEBUG_FS) 51 + int smd_debugfs_init(void); 52 + #else 53 + static inline int smd_debugfs_init(void) { return 0; } 54 + #endif 55 + 50 56 #endif
+1 -2
arch/arm/mach-msm/smd_debug.c
··· 216 216 debugfs_create_file(name, mode, dent, fill, &debug_ops); 217 217 } 218 218 219 - static int smd_debugfs_init(void) 219 + int __init smd_debugfs_init(void) 220 220 { 221 221 struct dentry *dent; 222 222 ··· 234 234 return 0; 235 235 } 236 236 237 - late_initcall(smd_debugfs_init); 238 237 #endif 239 238 240 239
+7 -1
arch/arm/mach-omap1/board-ams-delta.c
··· 595 595 gpio_free(AMS_DELTA_GPIO_PIN_MODEM_IRQ); 596 596 return err; 597 597 } 598 - late_initcall(late_init); 598 + 599 + static void __init ams_delta_init_late(void) 600 + { 601 + omap1_init_late(); 602 + late_init(); 603 + } 599 604 600 605 static void __init ams_delta_map_io(void) 601 606 { ··· 616 611 .reserve = omap_reserve, 617 612 .init_irq = omap1_init_irq, 618 613 .init_machine = ams_delta_init, 614 + .init_late = ams_delta_init_late, 619 615 .timer = &omap1_timer, 620 616 .restart = omap1_restart, 621 617 MACHINE_END
+1
arch/arm/mach-omap1/board-fsample.c
··· 369 369 .reserve = omap_reserve, 370 370 .init_irq = omap1_init_irq, 371 371 .init_machine = omap_fsample_init, 372 + .init_late = omap1_init_late, 372 373 .timer = &omap1_timer, 373 374 .restart = omap1_restart, 374 375 MACHINE_END
+1
arch/arm/mach-omap1/board-generic.c
··· 88 88 .reserve = omap_reserve, 89 89 .init_irq = omap1_init_irq, 90 90 .init_machine = omap_generic_init, 91 + .init_late = omap1_init_late, 91 92 .timer = &omap1_timer, 92 93 .restart = omap1_restart, 93 94 MACHINE_END
+1
arch/arm/mach-omap1/board-h2.c
··· 431 431 .reserve = omap_reserve, 432 432 .init_irq = omap1_init_irq, 433 433 .init_machine = h2_init, 434 + .init_late = omap1_init_late, 434 435 .timer = &omap1_timer, 435 436 .restart = omap1_restart, 436 437 MACHINE_END
+1
arch/arm/mach-omap1/board-h3.c
··· 425 425 .reserve = omap_reserve, 426 426 .init_irq = omap1_init_irq, 427 427 .init_machine = h3_init, 428 + .init_late = omap1_init_late, 428 429 .timer = &omap1_timer, 429 430 .restart = omap1_restart, 430 431 MACHINE_END
+1
arch/arm/mach-omap1/board-htcherald.c
··· 605 605 .reserve = omap_reserve, 606 606 .init_irq = omap1_init_irq, 607 607 .init_machine = htcherald_init, 608 + .init_late = omap1_init_late, 608 609 .timer = &omap1_timer, 609 610 .restart = omap1_restart, 610 611 MACHINE_END
+1
arch/arm/mach-omap1/board-innovator.c
··· 457 457 .reserve = omap_reserve, 458 458 .init_irq = omap1_init_irq, 459 459 .init_machine = innovator_init, 460 + .init_late = omap1_init_late, 460 461 .timer = &omap1_timer, 461 462 .restart = omap1_restart, 462 463 MACHINE_END
+1
arch/arm/mach-omap1/board-nokia770.c
··· 255 255 .reserve = omap_reserve, 256 256 .init_irq = omap1_init_irq, 257 257 .init_machine = omap_nokia770_init, 258 + .init_late = omap1_init_late, 258 259 .timer = &omap1_timer, 259 260 .restart = omap1_restart, 260 261 MACHINE_END
+1
arch/arm/mach-omap1/board-osk.c
··· 574 574 .reserve = omap_reserve, 575 575 .init_irq = omap1_init_irq, 576 576 .init_machine = osk_init, 577 + .init_late = omap1_init_late, 577 578 .timer = &omap1_timer, 578 579 .restart = omap1_restart, 579 580 MACHINE_END
+1
arch/arm/mach-omap1/board-palmte.c
··· 267 267 .reserve = omap_reserve, 268 268 .init_irq = omap1_init_irq, 269 269 .init_machine = omap_palmte_init, 270 + .init_late = omap1_init_late, 270 271 .timer = &omap1_timer, 271 272 .restart = omap1_restart, 272 273 MACHINE_END
+1
arch/arm/mach-omap1/board-palmtt.c
··· 313 313 .reserve = omap_reserve, 314 314 .init_irq = omap1_init_irq, 315 315 .init_machine = omap_palmtt_init, 316 + .init_late = omap1_init_late, 316 317 .timer = &omap1_timer, 317 318 .restart = omap1_restart, 318 319 MACHINE_END
+1
arch/arm/mach-omap1/board-palmz71.c
··· 330 330 .reserve = omap_reserve, 331 331 .init_irq = omap1_init_irq, 332 332 .init_machine = omap_palmz71_init, 333 + .init_late = omap1_init_late, 333 334 .timer = &omap1_timer, 334 335 .restart = omap1_restart, 335 336 MACHINE_END
+1
arch/arm/mach-omap1/board-perseus2.c
··· 331 331 .reserve = omap_reserve, 332 332 .init_irq = omap1_init_irq, 333 333 .init_machine = omap_perseus2_init, 334 + .init_late = omap1_init_late, 334 335 .timer = &omap1_timer, 335 336 .restart = omap1_restart, 336 337 MACHINE_END
+1
arch/arm/mach-omap1/board-sx1.c
··· 407 407 .reserve = omap_reserve, 408 408 .init_irq = omap1_init_irq, 409 409 .init_machine = omap_sx1_init, 410 + .init_late = omap1_init_late, 410 411 .timer = &omap1_timer, 411 412 .restart = omap1_restart, 412 413 MACHINE_END
+1
arch/arm/mach-omap1/board-voiceblue.c
··· 294 294 .reserve = omap_reserve, 295 295 .init_irq = omap1_init_irq, 296 296 .init_machine = voiceblue_init, 297 + .init_late = omap1_init_late, 297 298 .timer = &omap1_timer, 298 299 .restart = voiceblue_restart, 299 300 MACHINE_END
+10
arch/arm/mach-omap1/common.h
··· 53 53 } 54 54 #endif 55 55 56 + #ifdef CONFIG_OMAP_SERIAL_WAKE 57 + int omap_serial_wakeup_init(void); 58 + #else 59 + static inline int omap_serial_wakeup_init(void) 60 + { 61 + return 0; 62 + } 63 + #endif 64 + 56 65 void omap1_init_early(void); 57 66 void omap1_init_irq(void); 67 + void omap1_init_late(void); 58 68 void omap1_restart(char, const char *); 59 69 60 70 extern void __init omap_check_revision(void);
+5
arch/arm/mach-omap1/io.c
··· 137 137 omap_init_consistent_dma_size(); 138 138 } 139 139 140 + void __init omap1_init_late(void) 141 + { 142 + omap_serial_wakeup_init(); 143 + } 144 + 140 145 /* 141 146 * NOTE: Please use ioremap + __raw_read/write where possible instead of these 142 147 */
+1 -2
arch/arm/mach-omap1/serial.c
··· 237 237 enable_irq_wake(gpio_to_irq(gpio_nr)); 238 238 } 239 239 240 - static int __init omap_serial_wakeup_init(void) 240 + int __init omap_serial_wakeup_init(void) 241 241 { 242 242 if (!cpu_is_omap16xx()) 243 243 return 0; ··· 251 251 252 252 return 0; 253 253 } 254 - late_initcall(omap_serial_wakeup_init); 255 254 256 255 #endif /* CONFIG_OMAP_SERIAL_WAKE */ 257 256
+1
arch/arm/mach-omap2/board-2430sdp.c
··· 303 303 .init_irq = omap2_init_irq, 304 304 .handle_irq = omap2_intc_handle_irq, 305 305 .init_machine = omap_2430sdp_init, 306 + .init_late = omap2430_init_late, 306 307 .timer = &omap2_timer, 307 308 .restart = omap_prcm_restart, 308 309 MACHINE_END
+1
arch/arm/mach-omap2/board-3430sdp.c
··· 605 605 .init_irq = omap3_init_irq, 606 606 .handle_irq = omap3_intc_handle_irq, 607 607 .init_machine = omap_3430sdp_init, 608 + .init_late = omap3430_init_late, 608 609 .timer = &omap3_timer, 609 610 .restart = omap_prcm_restart, 610 611 MACHINE_END
+1
arch/arm/mach-omap2/board-3630sdp.c
··· 217 217 .init_irq = omap3_init_irq, 218 218 .handle_irq = omap3_intc_handle_irq, 219 219 .init_machine = omap_sdp_init, 220 + .init_late = omap3630_init_late, 220 221 .timer = &omap3_timer, 221 222 .restart = omap_prcm_restart, 222 223 MACHINE_END
+1
arch/arm/mach-omap2/board-4430sdp.c
··· 912 912 .init_irq = gic_init_irq, 913 913 .handle_irq = gic_handle_irq, 914 914 .init_machine = omap_4430sdp_init, 915 + .init_late = omap4430_init_late, 915 916 .timer = &omap4_timer, 916 917 .restart = omap_prcm_restart, 917 918 MACHINE_END
+1
arch/arm/mach-omap2/board-am3517crane.c
··· 102 102 .init_irq = omap3_init_irq, 103 103 .handle_irq = omap3_intc_handle_irq, 104 104 .init_machine = am3517_crane_init, 105 + .init_late = am35xx_init_late, 105 106 .timer = &omap3_timer, 106 107 .restart = omap_prcm_restart, 107 108 MACHINE_END
+1
arch/arm/mach-omap2/board-am3517evm.c
··· 385 385 .init_irq = omap3_init_irq, 386 386 .handle_irq = omap3_intc_handle_irq, 387 387 .init_machine = am3517_evm_init, 388 + .init_late = am35xx_init_late, 388 389 .timer = &omap3_timer, 389 390 .restart = omap_prcm_restart, 390 391 MACHINE_END
+1
arch/arm/mach-omap2/board-apollon.c
··· 356 356 .init_irq = omap2_init_irq, 357 357 .handle_irq = omap2_intc_handle_irq, 358 358 .init_machine = omap_apollon_init, 359 + .init_late = omap2420_init_late, 359 360 .timer = &omap2_timer, 360 361 .restart = omap_prcm_restart, 361 362 MACHINE_END
+2
arch/arm/mach-omap2/board-cm-t35.c
··· 669 669 .init_irq = omap3_init_irq, 670 670 .handle_irq = omap3_intc_handle_irq, 671 671 .init_machine = cm_t35_init, 672 + .init_late = omap35xx_init_late, 672 673 .timer = &omap3_timer, 673 674 .restart = omap_prcm_restart, 674 675 MACHINE_END ··· 682 681 .init_irq = omap3_init_irq, 683 682 .handle_irq = omap3_intc_handle_irq, 684 683 .init_machine = cm_t3730_init, 684 + .init_late = omap3630_init_late, 685 685 .timer = &omap3_timer, 686 686 .restart = omap_prcm_restart, 687 687 MACHINE_END
+1
arch/arm/mach-omap2/board-cm-t3517.c
··· 303 303 .init_irq = omap3_init_irq, 304 304 .handle_irq = omap3_intc_handle_irq, 305 305 .init_machine = cm_t3517_init, 306 + .init_late = am35xx_init_late, 306 307 .timer = &omap3_timer, 307 308 .restart = omap_prcm_restart, 308 309 MACHINE_END
+1
arch/arm/mach-omap2/board-devkit8000.c
··· 644 644 .init_irq = omap3_init_irq, 645 645 .handle_irq = omap3_intc_handle_irq, 646 646 .init_machine = devkit8000_init, 647 + .init_late = omap35xx_init_late, 647 648 .timer = &omap3_secure_timer, 648 649 .restart = omap_prcm_restart, 649 650 MACHINE_END
+1
arch/arm/mach-omap2/board-generic.c
··· 125 125 .init_irq = omap_init_irq, 126 126 .handle_irq = gic_handle_irq, 127 127 .init_machine = omap_generic_init, 128 + .init_late = omap4430_init_late, 128 129 .timer = &omap4_timer, 129 130 .dt_compat = omap4_boards_compat, 130 131 .restart = omap_prcm_restart,
+1
arch/arm/mach-omap2/board-h4.c
··· 398 398 .init_irq = omap2_init_irq, 399 399 .handle_irq = omap2_intc_handle_irq, 400 400 .init_machine = omap_h4_init, 401 + .init_late = omap2420_init_late, 401 402 .timer = &omap2_timer, 402 403 .restart = omap_prcm_restart, 403 404 MACHINE_END
+2
arch/arm/mach-omap2/board-igep0020.c
··· 650 650 .init_irq = omap3_init_irq, 651 651 .handle_irq = omap3_intc_handle_irq, 652 652 .init_machine = igep_init, 653 + .init_late = omap35xx_init_late, 653 654 .timer = &omap3_timer, 654 655 .restart = omap_prcm_restart, 655 656 MACHINE_END ··· 663 662 .init_irq = omap3_init_irq, 664 663 .handle_irq = omap3_intc_handle_irq, 665 664 .init_machine = igep_init, 665 + .init_late = omap35xx_init_late, 666 666 .timer = &omap3_timer, 667 667 .restart = omap_prcm_restart, 668 668 MACHINE_END
+1
arch/arm/mach-omap2/board-ldp.c
··· 442 442 .init_irq = omap3_init_irq, 443 443 .handle_irq = omap3_intc_handle_irq, 444 444 .init_machine = omap_ldp_init, 445 + .init_late = omap3430_init_late, 445 446 .timer = &omap3_timer, 446 447 .restart = omap_prcm_restart, 447 448 MACHINE_END
+3
arch/arm/mach-omap2/board-n8x0.c
··· 694 694 .init_irq = omap2_init_irq, 695 695 .handle_irq = omap2_intc_handle_irq, 696 696 .init_machine = n8x0_init_machine, 697 + .init_late = omap2420_init_late, 697 698 .timer = &omap2_timer, 698 699 .restart = omap_prcm_restart, 699 700 MACHINE_END ··· 707 706 .init_irq = omap2_init_irq, 708 707 .handle_irq = omap2_intc_handle_irq, 709 708 .init_machine = n8x0_init_machine, 709 + .init_late = omap2420_init_late, 710 710 .timer = &omap2_timer, 711 711 .restart = omap_prcm_restart, 712 712 MACHINE_END ··· 720 718 .init_irq = omap2_init_irq, 721 719 .handle_irq = omap2_intc_handle_irq, 722 720 .init_machine = n8x0_init_machine, 721 + .init_late = omap2420_init_late, 723 722 .timer = &omap2_timer, 724 723 .restart = omap_prcm_restart, 725 724 MACHINE_END
+1
arch/arm/mach-omap2/board-omap3beagle.c
··· 543 543 .init_irq = omap3_init_irq, 544 544 .handle_irq = omap3_intc_handle_irq, 545 545 .init_machine = omap3_beagle_init, 546 + .init_late = omap3_init_late, 546 547 .timer = &omap3_secure_timer, 547 548 .restart = omap_prcm_restart, 548 549 MACHINE_END
+1
arch/arm/mach-omap2/board-omap3evm.c
··· 671 671 .init_irq = omap3_init_irq, 672 672 .handle_irq = omap3_intc_handle_irq, 673 673 .init_machine = omap3_evm_init, 674 + .init_late = omap35xx_init_late, 674 675 .timer = &omap3_timer, 675 676 .restart = omap_prcm_restart, 676 677 MACHINE_END
+2
arch/arm/mach-omap2/board-omap3logic.c
··· 242 242 .init_irq = omap3_init_irq, 243 243 .handle_irq = omap3_intc_handle_irq, 244 244 .init_machine = omap3logic_init, 245 + .init_late = omap35xx_init_late, 245 246 .timer = &omap3_timer, 246 247 .restart = omap_prcm_restart, 247 248 MACHINE_END ··· 255 254 .init_irq = omap3_init_irq, 256 255 .handle_irq = omap3_intc_handle_irq, 257 256 .init_machine = omap3logic_init, 257 + .init_late = omap35xx_init_late, 258 258 .timer = &omap3_timer, 259 259 .restart = omap_prcm_restart, 260 260 MACHINE_END
+1
arch/arm/mach-omap2/board-omap3pandora.c
··· 622 622 .init_irq = omap3_init_irq, 623 623 .handle_irq = omap3_intc_handle_irq, 624 624 .init_machine = omap3pandora_init, 625 + .init_late = omap35xx_init_late, 625 626 .timer = &omap3_timer, 626 627 .restart = omap_prcm_restart, 627 628 MACHINE_END
+1
arch/arm/mach-omap2/board-omap3stalker.c
··· 436 436 .init_irq = omap3_init_irq, 437 437 .handle_irq = omap3_intc_handle_irq, 438 438 .init_machine = omap3_stalker_init, 439 + .init_late = omap35xx_init_late, 439 440 .timer = &omap3_secure_timer, 440 441 .restart = omap_prcm_restart, 441 442 MACHINE_END
+1
arch/arm/mach-omap2/board-omap3touchbook.c
··· 387 387 .init_irq = omap3_init_irq, 388 388 .handle_irq = omap3_intc_handle_irq, 389 389 .init_machine = omap3_touchbook_init, 390 + .init_late = omap3430_init_late, 390 391 .timer = &omap3_secure_timer, 391 392 .restart = omap_prcm_restart, 392 393 MACHINE_END
+1
arch/arm/mach-omap2/board-omap4panda.c
··· 521 521 .init_irq = gic_init_irq, 522 522 .handle_irq = gic_handle_irq, 523 523 .init_machine = omap4_panda_init, 524 + .init_late = omap4430_init_late, 524 525 .timer = &omap4_timer, 525 526 .restart = omap_prcm_restart, 526 527 MACHINE_END
+1
arch/arm/mach-omap2/board-overo.c
··· 554 554 .init_irq = omap3_init_irq, 555 555 .handle_irq = omap3_intc_handle_irq, 556 556 .init_machine = overo_init, 557 + .init_late = omap35xx_init_late, 557 558 .timer = &omap3_timer, 558 559 .restart = omap_prcm_restart, 559 560 MACHINE_END
+2
arch/arm/mach-omap2/board-rm680.c
··· 151 151 .init_irq = omap3_init_irq, 152 152 .handle_irq = omap3_intc_handle_irq, 153 153 .init_machine = rm680_init, 154 + .init_late = omap3630_init_late, 154 155 .timer = &omap3_timer, 155 156 .restart = omap_prcm_restart, 156 157 MACHINE_END ··· 164 163 .init_irq = omap3_init_irq, 165 164 .handle_irq = omap3_intc_handle_irq, 166 165 .init_machine = rm680_init, 166 + .init_late = omap3630_init_late, 167 167 .timer = &omap3_timer, 168 168 .restart = omap_prcm_restart, 169 169 MACHINE_END
+1
arch/arm/mach-omap2/board-rx51.c
··· 127 127 .init_irq = omap3_init_irq, 128 128 .handle_irq = omap3_intc_handle_irq, 129 129 .init_machine = rx51_init, 130 + .init_late = omap3430_init_late, 130 131 .timer = &omap3_timer, 131 132 .restart = omap_prcm_restart, 132 133 MACHINE_END
+2
arch/arm/mach-omap2/board-ti8168evm.c
··· 52 52 .init_irq = ti81xx_init_irq, 53 53 .timer = &omap3_timer, 54 54 .init_machine = ti81xx_evm_init, 55 + .init_late = ti81xx_init_late, 55 56 .restart = omap_prcm_restart, 56 57 MACHINE_END 57 58 ··· 64 63 .init_irq = ti81xx_init_irq, 65 64 .timer = &omap3_timer, 66 65 .init_machine = ti81xx_evm_init, 66 + .init_late = ti81xx_init_late, 67 67 .restart = omap_prcm_restart, 68 68 MACHINE_END
+2
arch/arm/mach-omap2/board-zoom.c
··· 137 137 .init_irq = omap3_init_irq, 138 138 .handle_irq = omap3_intc_handle_irq, 139 139 .init_machine = omap_zoom_init, 140 + .init_late = omap3430_init_late, 140 141 .timer = &omap3_timer, 141 142 .restart = omap_prcm_restart, 142 143 MACHINE_END ··· 150 149 .init_irq = omap3_init_irq, 151 150 .handle_irq = omap3_intc_handle_irq, 152 151 .init_machine = omap_zoom_init, 152 + .init_late = omap3630_init_late, 153 153 .timer = &omap3_timer, 154 154 .restart = omap_prcm_restart, 155 155 MACHINE_END
+47
arch/arm/mach-omap2/common.h
··· 79 79 } 80 80 #endif 81 81 82 + #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2) 83 + int omap2_pm_init(void); 84 + #else 85 + static inline int omap2_pm_init(void) 86 + { 87 + return 0; 88 + } 89 + #endif 90 + 91 + #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) 92 + int omap3_pm_init(void); 93 + #else 94 + static inline int omap3_pm_init(void) 95 + { 96 + return 0; 97 + } 98 + #endif 99 + 100 + #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4) 101 + int omap4_pm_init(void); 102 + #else 103 + static inline int omap4_pm_init(void) 104 + { 105 + return 0; 106 + } 107 + #endif 108 + 109 + #ifdef CONFIG_OMAP_MUX 110 + int omap_mux_late_init(void); 111 + #else 112 + static inline int omap_mux_late_init(void) 113 + { 114 + return 0; 115 + } 116 + #endif 117 + 82 118 extern void omap2_init_common_infrastructure(void); 83 119 84 120 extern struct sys_timer omap2_timer; ··· 131 95 void am35xx_init_early(void); 132 96 void ti81xx_init_early(void); 133 97 void omap4430_init_early(void); 98 + void omap3_init_late(void); /* Do not use this one */ 99 + void omap4430_init_late(void); 100 + void omap2420_init_late(void); 101 + void omap2430_init_late(void); 102 + void omap3430_init_late(void); 103 + void omap35xx_init_late(void); 104 + void omap3630_init_late(void); 105 + void am35xx_init_late(void); 106 + void ti81xx_init_late(void); 107 + void omap4430_init_late(void); 108 + int omap2_common_pm_late_init(void); 134 109 void omap_prcm_restart(char, const char *); 135 110 136 111 /*
+63
arch/arm/mach-omap2/io.c
··· 350 350 omap_hwmod_init_postsetup(); 351 351 omap2420_clk_init(); 352 352 } 353 + 354 + void __init omap2420_init_late(void) 355 + { 356 + omap_mux_late_init(); 357 + omap2_common_pm_late_init(); 358 + omap2_pm_init(); 359 + } 353 360 #endif 354 361 355 362 #ifdef CONFIG_SOC_OMAP2430 ··· 371 364 omap2430_hwmod_init(); 372 365 omap_hwmod_init_postsetup(); 373 366 omap2430_clk_init(); 367 + } 368 + 369 + void __init omap2430_init_late(void) 370 + { 371 + omap_mux_late_init(); 372 + omap2_common_pm_late_init(); 373 + omap2_pm_init(); 374 374 } 375 375 #endif 376 376 ··· 433 419 omap_hwmod_init_postsetup(); 434 420 omap3xxx_clk_init(); 435 421 } 422 + 423 + void __init omap3_init_late(void) 424 + { 425 + omap_mux_late_init(); 426 + omap2_common_pm_late_init(); 427 + omap3_pm_init(); 428 + } 429 + 430 + void __init omap3430_init_late(void) 431 + { 432 + omap_mux_late_init(); 433 + omap2_common_pm_late_init(); 434 + omap3_pm_init(); 435 + } 436 + 437 + void __init omap35xx_init_late(void) 438 + { 439 + omap_mux_late_init(); 440 + omap2_common_pm_late_init(); 441 + omap3_pm_init(); 442 + } 443 + 444 + void __init omap3630_init_late(void) 445 + { 446 + omap_mux_late_init(); 447 + omap2_common_pm_late_init(); 448 + omap3_pm_init(); 449 + } 450 + 451 + void __init am35xx_init_late(void) 452 + { 453 + omap_mux_late_init(); 454 + omap2_common_pm_late_init(); 455 + omap3_pm_init(); 456 + } 457 + 458 + void __init ti81xx_init_late(void) 459 + { 460 + omap_mux_late_init(); 461 + omap2_common_pm_late_init(); 462 + omap3_pm_init(); 463 + } 436 464 #endif 437 465 438 466 #ifdef CONFIG_ARCH_OMAP4 ··· 490 434 omap44xx_hwmod_init(); 491 435 omap_hwmod_init_postsetup(); 492 436 omap4xxx_clk_init(); 437 + } 438 + 439 + void __init omap4430_init_late(void) 440 + { 441 + omap_mux_late_init(); 442 + omap2_common_pm_late_init(); 443 + omap4_pm_init(); 493 444 } 494 445 #endif 495 446
+1 -2
arch/arm/mach-omap2/mux.c
··· 788 788 } 789 789 790 790 /* Free all data except for GPIO pins unless CONFIG_DEBUG_FS is set */ 791 - static int __init omap_mux_late_init(void) 791 + int __init omap_mux_late_init(void) 792 792 { 793 793 struct omap_mux_partition *partition; 794 794 int ret; ··· 823 823 824 824 return 0; 825 825 } 826 - late_initcall(omap_mux_late_init); 827 826 828 827 static void __init omap_mux_package_fixup(struct omap_mux *p, 829 828 struct omap_mux *superset)
+1 -2
arch/arm/mach-omap2/pm.c
··· 295 295 } 296 296 postcore_initcall(omap2_common_pm_init); 297 297 298 - static int __init omap2_common_pm_late_init(void) 298 + int __init omap2_common_pm_late_init(void) 299 299 { 300 300 /* 301 301 * In the case of DT, the PMIC and SR initialization will be done using ··· 322 322 323 323 return 0; 324 324 } 325 - late_initcall(omap2_common_pm_late_init);
+5 -12
arch/arm/mach-omap2/pm24xx.c
··· 298 298 WKUP_MOD, PM_WKEN); 299 299 } 300 300 301 - static int __init omap2_pm_init(void) 301 + int __init omap2_pm_init(void) 302 302 { 303 303 u32 l; 304 - 305 - if (!cpu_is_omap24xx()) 306 - return -ENODEV; 307 304 308 305 printk(KERN_INFO "Power Management for OMAP2 initializing\n"); 309 306 l = omap2_prm_read_mod_reg(OCP_MOD, OMAP2_PRCM_REVISION_OFFSET); ··· 367 370 * These routines need to be in SRAM as that's the only 368 371 * memory the MPU can see when it wakes up. 369 372 */ 370 - if (cpu_is_omap24xx()) { 371 - omap2_sram_idle = omap_sram_push(omap24xx_idle_loop_suspend, 372 - omap24xx_idle_loop_suspend_sz); 373 + omap2_sram_idle = omap_sram_push(omap24xx_idle_loop_suspend, 374 + omap24xx_idle_loop_suspend_sz); 373 375 374 - omap2_sram_suspend = omap_sram_push(omap24xx_cpu_suspend, 375 - omap24xx_cpu_suspend_sz); 376 - } 376 + omap2_sram_suspend = omap_sram_push(omap24xx_cpu_suspend, 377 + omap24xx_cpu_suspend_sz); 377 378 378 379 arm_pm_idle = omap2_pm_idle; 379 380 380 381 return 0; 381 382 } 382 - 383 - late_initcall(omap2_pm_init);
+1 -6
arch/arm/mach-omap2/pm34xx.c
··· 697 697 } 698 698 } 699 699 700 - static int __init omap3_pm_init(void) 700 + int __init omap3_pm_init(void) 701 701 { 702 702 struct power_state *pwrst, *tmp; 703 703 struct clockdomain *neon_clkdm, *mpu_clkdm; 704 704 int ret; 705 - 706 - if (!cpu_is_omap34xx()) 707 - return -ENODEV; 708 705 709 706 if (!omap3_has_io_chain_ctrl()) 710 707 pr_warning("PM: no software I/O chain control; some wakeups may be lost\n"); ··· 801 804 err1: 802 805 return ret; 803 806 } 804 - 805 - late_initcall(omap3_pm_init);
+1 -5
arch/arm/mach-omap2/pm44xx.c
··· 141 141 * Initializes all powerdomain and clockdomain target states 142 142 * and all PRCM settings. 143 143 */ 144 - static int __init omap4_pm_init(void) 144 + int __init omap4_pm_init(void) 145 145 { 146 146 int ret; 147 147 struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm, *l4wkup; 148 148 struct clockdomain *ducati_clkdm, *l3_2_clkdm, *l4_per_clkdm; 149 - 150 - if (!cpu_is_omap44xx()) 151 - return -ENODEV; 152 149 153 150 if (omap_rev() == OMAP4430_REV_ES1_0) { 154 151 WARN(1, "Power Management not supported on OMAP4430 ES1.0\n"); ··· 214 217 err2: 215 218 return ret; 216 219 } 217 - late_initcall(omap4_pm_init);
+12
arch/arm/mach-pnx4008/core.c
··· 265 265 soft_restart(0); 266 266 } 267 267 268 + #ifdef CONFIG_PM 269 + extern int pnx4008_pm_init(void); 270 + #else 271 + static inline int pnx4008_pm_init(void) { return 0; } 272 + #endif 273 + 274 + void __init pnx4008_init_late(void) 275 + { 276 + pnx4008_pm_init(); 277 + } 278 + 268 279 extern struct sys_timer pnx4008_timer; 269 280 270 281 MACHINE_START(PNX4008, "Philips PNX4008") ··· 284 273 .map_io = pnx4008_map_io, 285 274 .init_irq = pnx4008_init_irq, 286 275 .init_machine = pnx4008_init, 276 + .init_late = pnx4008_init_late, 287 277 .timer = &pnx4008_timer, 288 278 .restart = pnx4008_restart, 289 279 MACHINE_END
+1 -3
arch/arm/mach-pnx4008/pm.c
··· 124 124 .valid = pnx4008_pm_valid, 125 125 }; 126 126 127 - static int __init pnx4008_pm_init(void) 127 + int __init pnx4008_pm_init(void) 128 128 { 129 129 u32 sram_size_to_allocate; 130 130 ··· 151 151 suspend_set_ops(&pnx4008_pm_ops); 152 152 return 0; 153 153 } 154 - 155 - late_initcall(pnx4008_pm_init);
+6
arch/arm/mach-prima2/common.h
··· 24 24 extern void __init sirfsoc_map_lluart(void); 25 25 #endif 26 26 27 + #ifdef CONFIG_SUSPEND 28 + extern int sirfsoc_pm_init(void); 29 + #else 30 + static inline int sirfsoc_pm_init(void) { return 0; } 31 + #endif 32 + 27 33 #endif
+1 -2
arch/arm/mach-prima2/pm.c
··· 85 85 .valid = suspend_valid_only_mem, 86 86 }; 87 87 88 - static int __init sirfsoc_pm_init(void) 88 + int __init sirfsoc_pm_init(void) 89 89 { 90 90 suspend_set_ops(&sirfsoc_pm_ops); 91 91 return 0; 92 92 } 93 - late_initcall(sirfsoc_pm_init); 94 93 95 94 static const struct of_device_id pwrc_ids[] = { 96 95 { .compatible = "sirf,prima2-pwrc" },
+6
arch/arm/mach-prima2/prima2.c
··· 25 25 of_platform_bus_probe(NULL, sirfsoc_of_bus_ids, NULL); 26 26 } 27 27 28 + void __init sirfsoc_init_late(void) 29 + { 30 + sirfsoc_pm_init(); 31 + } 32 + 28 33 static const char *prima2cb_dt_match[] __initdata = { 29 34 "sirf,prima2-cb", 30 35 NULL ··· 44 39 .timer = &sirfsoc_timer, 45 40 .dma_zone_size = SZ_256M, 46 41 .init_machine = sirfsoc_mach_init, 42 + .init_late = sirfsoc_init_late, 47 43 .dt_compat = prima2cb_dt_match, 48 44 .restart = sirfsoc_restart, 49 45 MACHINE_END
+5
arch/arm/mach-s3c64xx/common.c
··· 384 384 /* if all else fails, or mode was for soft, jump to 0 */ 385 385 soft_restart(0); 386 386 } 387 + 388 + void __init s3c64xx_init_late(void) 389 + { 390 + s3c64xx_pm_late_initcall(); 391 + }
+7
arch/arm/mach-s3c64xx/common.h
··· 24 24 void s3c64xx_setup_clocks(void); 25 25 26 26 void s3c64xx_restart(char mode, const char *cmd); 27 + void s3c64xx_init_late(void); 27 28 28 29 #ifdef CONFIG_CPU_S3C6400 29 30 ··· 50 49 #define s3c6410_init_clocks NULL 51 50 #define s3c6410_map_io NULL 52 51 #define s3c6410_init NULL 52 + #endif 53 + 54 + #ifdef CONFIG_PM 55 + int __init s3c64xx_pm_late_initcall(void); 56 + #else 57 + static inline int s3c64xx_pm_late_initcall(void) { return 0; } 53 58 #endif 54 59 55 60 #endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */
+1
arch/arm/mach-s3c64xx/mach-anw6410.c
··· 230 230 .handle_irq = vic_handle_irq, 231 231 .map_io = anw6410_map_io, 232 232 .init_machine = anw6410_machine_init, 233 + .init_late = s3c64xx_init_late, 233 234 .timer = &s3c24xx_timer, 234 235 .restart = s3c64xx_restart, 235 236 MACHINE_END
+1
arch/arm/mach-s3c64xx/mach-crag6410.c
··· 813 813 .handle_irq = vic_handle_irq, 814 814 .map_io = crag6410_map_io, 815 815 .init_machine = crag6410_machine_init, 816 + .init_late = s3c64xx_init_late, 816 817 .timer = &s3c24xx_timer, 817 818 .restart = s3c64xx_restart, 818 819 MACHINE_END
+1
arch/arm/mach-s3c64xx/mach-hmt.c
··· 272 272 .handle_irq = vic_handle_irq, 273 273 .map_io = hmt_map_io, 274 274 .init_machine = hmt_machine_init, 275 + .init_late = s3c64xx_init_late, 275 276 .timer = &s3c24xx_timer, 276 277 .restart = s3c64xx_restart, 277 278 MACHINE_END
+1
arch/arm/mach-s3c64xx/mach-mini6410.c
··· 339 339 .handle_irq = vic_handle_irq, 340 340 .map_io = mini6410_map_io, 341 341 .init_machine = mini6410_machine_init, 342 + .init_late = s3c64xx_init_late, 342 343 .timer = &s3c24xx_timer, 343 344 .restart = s3c64xx_restart, 344 345 MACHINE_END
+1
arch/arm/mach-s3c64xx/mach-ncp.c
··· 104 104 .handle_irq = vic_handle_irq, 105 105 .map_io = ncp_map_io, 106 106 .init_machine = ncp_machine_init, 107 + .init_late = s3c64xx_init_late, 107 108 .timer = &s3c24xx_timer, 108 109 .restart = s3c64xx_restart, 109 110 MACHINE_END
+1
arch/arm/mach-s3c64xx/mach-real6410.c
··· 320 320 .handle_irq = vic_handle_irq, 321 321 .map_io = real6410_map_io, 322 322 .init_machine = real6410_machine_init, 323 + .init_late = s3c64xx_init_late, 323 324 .timer = &s3c24xx_timer, 324 325 .restart = s3c64xx_restart, 325 326 MACHINE_END
+1
arch/arm/mach-s3c64xx/mach-smartq5.c
··· 152 152 .handle_irq = vic_handle_irq, 153 153 .map_io = smartq_map_io, 154 154 .init_machine = smartq5_machine_init, 155 + .init_late = s3c64xx_init_late, 155 156 .timer = &s3c24xx_timer, 156 157 .restart = s3c64xx_restart, 157 158 MACHINE_END
+1
arch/arm/mach-s3c64xx/mach-smartq7.c
··· 168 168 .handle_irq = vic_handle_irq, 169 169 .map_io = smartq_map_io, 170 170 .init_machine = smartq7_machine_init, 171 + .init_late = s3c64xx_init_late, 171 172 .timer = &s3c24xx_timer, 172 173 .restart = s3c64xx_restart, 173 174 MACHINE_END
+1
arch/arm/mach-s3c64xx/mach-smdk6400.c
··· 93 93 .handle_irq = vic_handle_irq, 94 94 .map_io = smdk6400_map_io, 95 95 .init_machine = smdk6400_machine_init, 96 + .init_late = s3c64xx_init_late, 96 97 .timer = &s3c24xx_timer, 97 98 .restart = s3c64xx_restart, 98 99 MACHINE_END
+1
arch/arm/mach-s3c64xx/mach-smdk6410.c
··· 702 702 .handle_irq = vic_handle_irq, 703 703 .map_io = smdk6410_map_io, 704 704 .init_machine = smdk6410_machine_init, 705 + .init_late = s3c64xx_init_late, 705 706 .timer = &s3c24xx_timer, 706 707 .restart = s3c64xx_restart, 707 708 MACHINE_END
+1 -2
arch/arm/mach-s3c64xx/pm.c
··· 365 365 } 366 366 arch_initcall(s3c64xx_pm_initcall); 367 367 368 - static __init int s3c64xx_pm_late_initcall(void) 368 + int __init s3c64xx_pm_late_initcall(void) 369 369 { 370 370 pm_genpd_poweroff_unused(); 371 371 372 372 return 0; 373 373 } 374 - late_initcall(s3c64xx_pm_late_initcall);
+1
arch/arm/mach-sa1100/assabet.c
··· 538 538 .init_irq = sa1100_init_irq, 539 539 .timer = &sa1100_timer, 540 540 .init_machine = assabet_init, 541 + .init_late = sa11x0_init_late, 541 542 #ifdef CONFIG_SA1111 542 543 .dma_zone_size = SZ_1M, 543 544 #endif
+1
arch/arm/mach-sa1100/badge4.c
··· 305 305 .map_io = badge4_map_io, 306 306 .nr_irqs = SA1100_NR_IRQS, 307 307 .init_irq = sa1100_init_irq, 308 + .init_late = sa11x0_init_late, 308 309 .timer = &sa1100_timer, 309 310 #ifdef CONFIG_SA1111 310 311 .dma_zone_size = SZ_1M,
+1
arch/arm/mach-sa1100/cerf.c
··· 134 134 .init_irq = cerf_init_irq, 135 135 .timer = &sa1100_timer, 136 136 .init_machine = cerf_init, 137 + .init_late = sa11x0_init_late, 137 138 .restart = sa11x0_restart, 138 139 MACHINE_END
+1
arch/arm/mach-sa1100/collie.c
··· 401 401 .init_irq = sa1100_init_irq, 402 402 .timer = &sa1100_timer, 403 403 .init_machine = collie_init, 404 + .init_late = sa11x0_init_late, 404 405 .restart = sa11x0_restart, 405 406 MACHINE_END
+4
arch/arm/mach-sa1100/generic.c
··· 359 359 360 360 arch_initcall(sa1100_init); 361 361 362 + void __init sa11x0_init_late(void) 363 + { 364 + sa11x0_pm_init(); 365 + } 362 366 363 367 /* 364 368 * Common I/O mapping:
+7
arch/arm/mach-sa1100/generic.h
··· 11 11 extern void __init sa1100_init_irq(void); 12 12 extern void __init sa1100_init_gpio(void); 13 13 extern void sa11x0_restart(char, const char *); 14 + extern void sa11x0_init_late(void); 14 15 15 16 #define SET_BANK(__nr,__start,__size) \ 16 17 mi->bank[__nr].start = (__start), \ ··· 42 41 43 42 struct sa1100fb_mach_info; 44 43 void sa11x0_register_lcd(struct sa1100fb_mach_info *inf); 44 + 45 + #ifdef CONFIG_PM 46 + int sa11x0_pm_init(void); 47 + #else 48 + static inline int sa11x0_pm_init(void) { return 0; } 49 + #endif
+1
arch/arm/mach-sa1100/h3100.c
··· 110 110 .init_irq = sa1100_init_irq, 111 111 .timer = &sa1100_timer, 112 112 .init_machine = h3100_mach_init, 113 + .init_late = sa11x0_init_late, 113 114 .restart = sa11x0_restart, 114 115 MACHINE_END 115 116
+1
arch/arm/mach-sa1100/h3600.c
··· 160 160 .init_irq = sa1100_init_irq, 161 161 .timer = &sa1100_timer, 162 162 .init_machine = h3600_mach_init, 163 + .init_late = sa11x0_init_late, 163 164 .restart = sa11x0_restart, 164 165 MACHINE_END 165 166
+1
arch/arm/mach-sa1100/hackkit.c
··· 199 199 .init_irq = sa1100_init_irq, 200 200 .timer = &sa1100_timer, 201 201 .init_machine = hackkit_init, 202 + .init_late = sa11x0_init_late, 202 203 .restart = sa11x0_restart, 203 204 MACHINE_END
+1
arch/arm/mach-sa1100/jornada720.c
··· 348 348 .init_irq = sa1100_init_irq, 349 349 .timer = &sa1100_timer, 350 350 .init_machine = jornada720_mach_init, 351 + .init_late = sa11x0_init_late, 351 352 #ifdef CONFIG_SA1111 352 353 .dma_zone_size = SZ_1M, 353 354 #endif
+1
arch/arm/mach-sa1100/lart.c
··· 147 147 .nr_irqs = SA1100_NR_IRQS, 148 148 .init_irq = sa1100_init_irq, 149 149 .init_machine = lart_init, 150 + .init_late = sa11x0_init_late, 150 151 .timer = &sa1100_timer, 151 152 .restart = sa11x0_restart, 152 153 MACHINE_END
+1
arch/arm/mach-sa1100/nanoengine.c
··· 112 112 .init_irq = sa1100_init_irq, 113 113 .timer = &sa1100_timer, 114 114 .init_machine = nanoengine_init, 115 + .init_late = sa11x0_init_late, 115 116 .restart = sa11x0_restart, 116 117 MACHINE_END
+1
arch/arm/mach-sa1100/pleb.c
··· 135 135 .init_irq = sa1100_init_irq, 136 136 .timer = &sa1100_timer, 137 137 .init_machine = pleb_init, 138 + .init_late = sa11x0_init_late, 138 139 .restart = sa11x0_restart, 139 140 MACHINE_END
+1 -3
arch/arm/mach-sa1100/pm.c
··· 117 117 .valid = suspend_valid_only_mem, 118 118 }; 119 119 120 - static int __init sa11x0_pm_init(void) 120 + int __init sa11x0_pm_init(void) 121 121 { 122 122 suspend_set_ops(&sa11x0_pm_ops); 123 123 return 0; 124 124 } 125 - 126 - late_initcall(sa11x0_pm_init);
+1
arch/arm/mach-sa1100/shannon.c
··· 104 104 .init_irq = sa1100_init_irq, 105 105 .timer = &sa1100_timer, 106 106 .init_machine = shannon_init, 107 + .init_late = sa11x0_init_late, 107 108 .restart = sa11x0_restart, 108 109 MACHINE_END
+1
arch/arm/mach-sa1100/simpad.c
··· 395 395 .map_io = simpad_map_io, 396 396 .nr_irqs = SA1100_NR_IRQS, 397 397 .init_irq = sa1100_init_irq, 398 + .init_late = sa11x0_init_late, 398 399 .timer = &sa1100_timer, 399 400 .restart = sa11x0_restart, 400 401 MACHINE_END
+1 -1
arch/arm/mach-shmobile/Makefile
··· 3 3 # 4 4 5 5 # Common objects 6 - obj-y := timer.o console.o clock.o 6 + obj-y := timer.o console.o clock.o common.o 7 7 8 8 # CPU objects 9 9 obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o
+1
arch/arm/mach-shmobile/board-ag5evm.c
··· 580 580 .init_irq = sh73a0_init_irq, 581 581 .handle_irq = gic_handle_irq, 582 582 .init_machine = ag5evm_init, 583 + .init_late = shmobile_init_late, 583 584 .timer = &shmobile_timer, 584 585 MACHINE_END
+1
arch/arm/mach-shmobile/board-ap4evb.c
··· 1469 1469 .init_irq = sh7372_init_irq, 1470 1470 .handle_irq = shmobile_handle_irq_intc, 1471 1471 .init_machine = ap4evb_init, 1472 + .init_late = shmobile_init_late, 1472 1473 .timer = &shmobile_timer, 1473 1474 MACHINE_END
+1
arch/arm/mach-shmobile/board-bonito.c
··· 500 500 .init_irq = r8a7740_init_irq, 501 501 .handle_irq = shmobile_handle_irq_intc, 502 502 .init_machine = bonito_init, 503 + .init_late = shmobile_init_late, 503 504 .timer = &shmobile_timer, 504 505 MACHINE_END
+1
arch/arm/mach-shmobile/board-g3evm.c
··· 338 338 .init_irq = sh7367_init_irq, 339 339 .handle_irq = shmobile_handle_irq_intc, 340 340 .init_machine = g3evm_init, 341 + .init_late = shmobile_init_late, 341 342 .timer = &shmobile_timer, 342 343 MACHINE_END
+1
arch/arm/mach-shmobile/board-g4evm.c
··· 381 381 .init_irq = sh7377_init_irq, 382 382 .handle_irq = shmobile_handle_irq_intc, 383 383 .init_machine = g4evm_init, 384 + .init_late = shmobile_init_late, 384 385 .timer = &shmobile_timer, 385 386 MACHINE_END
+1
arch/arm/mach-shmobile/board-kota2.c
··· 521 521 .init_irq = sh73a0_init_irq, 522 522 .handle_irq = gic_handle_irq, 523 523 .init_machine = kota2_init, 524 + .init_late = shmobile_init_late, 524 525 .timer = &shmobile_timer, 525 526 MACHINE_END
+1
arch/arm/mach-shmobile/board-mackerel.c
··· 1638 1638 .init_irq = sh7372_init_irq, 1639 1639 .handle_irq = shmobile_handle_irq_intc, 1640 1640 .init_machine = mackerel_init, 1641 + .init_late = shmobile_init_late, 1641 1642 .timer = &shmobile_timer, 1642 1643 MACHINE_END
+1
arch/arm/mach-shmobile/board-marzen.c
··· 98 98 .init_irq = r8a7779_init_irq, 99 99 .handle_irq = gic_handle_irq, 100 100 .init_machine = marzen_init, 101 + .init_late = shmobile_init_late, 101 102 .timer = &shmobile_timer, 102 103 MACHINE_END
+24
arch/arm/mach-shmobile/common.c
··· 1 + /* 2 + * This program is free software; you can redistribute it and/or modify 3 + * it under the terms of the GNU General Public License as published by 4 + * the Free Software Foundation; version 2 of the License. 5 + * 6 + * This program is distributed in the hope that it will be useful, 7 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 + * GNU General Public License for more details. 10 + * 11 + * You should have received a copy of the GNU General Public License 12 + * along with this program; if not, write to the Free Software 13 + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 14 + * 15 + */ 16 + #include <linux/kernel.h> 17 + #include <linux/init.h> 18 + #include <mach/common.h> 19 + 20 + void __init shmobile_init_late(void) 21 + { 22 + shmobile_suspend_init(); 23 + shmobile_cpuidle_init(); 24 + }
+1 -2
arch/arm/mach-shmobile/cpuidle.c
··· 46 46 47 47 void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv); 48 48 49 - static int shmobile_cpuidle_init(void) 49 + int shmobile_cpuidle_init(void) 50 50 { 51 51 struct cpuidle_device *dev = &shmobile_cpuidle_dev; 52 52 struct cpuidle_driver *drv = &shmobile_cpuidle_driver; ··· 65 65 66 66 return 0; 67 67 } 68 - late_initcall(shmobile_cpuidle_init);
+14
arch/arm/mach-shmobile/include/mach/common.h
··· 85 85 extern void r8a7779_smp_prepare_cpus(void); 86 86 extern void r8a7779_register_twd(void); 87 87 88 + extern void shmobile_init_late(void); 89 + 90 + #ifdef CONFIG_SUSPEND 91 + int shmobile_suspend_init(void); 92 + #else 93 + static inline int shmobile_suspend_init(void) { return 0; } 94 + #endif 95 + 96 + #ifdef CONFIG_CPU_IDLE 97 + int shmobile_cpuidle_init(void); 98 + #else 99 + static inline int shmobile_cpuidle_init(void) { return 0; } 100 + #endif 101 + 88 102 #endif /* __ARCH_MACH_COMMON_H */
+1 -2
arch/arm/mach-shmobile/suspend.c
··· 39 39 .valid = suspend_valid_only_mem, 40 40 }; 41 41 42 - static int __init shmobile_suspend_init(void) 42 + int __init shmobile_suspend_init(void) 43 43 { 44 44 suspend_set_ops(&shmobile_suspend_ops); 45 45 return 0; 46 46 } 47 - late_initcall(shmobile_suspend_init);
+1
arch/arm/mach-tegra/board-dt-tegra20.c
··· 110 110 .handle_irq = gic_handle_irq, 111 111 .timer = &tegra_timer, 112 112 .init_machine = tegra_dt_init, 113 + .init_late = tegra_init_late, 113 114 .restart = tegra_assert_system_reset, 114 115 .dt_compat = tegra20_dt_board_compat, 115 116 MACHINE_END
+1
arch/arm/mach-tegra/board-dt-tegra30.c
··· 90 90 .handle_irq = gic_handle_irq, 91 91 .timer = &tegra_timer, 92 92 .init_machine = tegra30_dt_init, 93 + .init_late = tegra_init_late, 93 94 .restart = tegra_assert_system_reset, 94 95 .dt_compat = tegra30_dt_board_compat, 95 96 MACHINE_END
+1
arch/arm/mach-tegra/board-harmony.c
··· 192 192 .handle_irq = gic_handle_irq, 193 193 .timer = &tegra_timer, 194 194 .init_machine = tegra_harmony_init, 195 + .init_late = tegra_init_late, 195 196 .restart = tegra_assert_system_reset, 196 197 MACHINE_END
+1
arch/arm/mach-tegra/board-paz00.c
··· 225 225 .handle_irq = gic_handle_irq, 226 226 .timer = &tegra_timer, 227 227 .init_machine = tegra_paz00_init, 228 + .init_late = tegra_init_late, 228 229 .restart = tegra_assert_system_reset, 229 230 MACHINE_END
+3
arch/arm/mach-tegra/board-seaboard.c
··· 277 277 .handle_irq = gic_handle_irq, 278 278 .timer = &tegra_timer, 279 279 .init_machine = tegra_seaboard_init, 280 + .init_late = tegra_init_late, 280 281 .restart = tegra_assert_system_reset, 281 282 MACHINE_END 282 283 ··· 289 288 .handle_irq = gic_handle_irq, 290 289 .timer = &tegra_timer, 291 290 .init_machine = tegra_kaen_init, 291 + .init_late = tegra_init_late, 292 292 .restart = tegra_assert_system_reset, 293 293 MACHINE_END 294 294 ··· 301 299 .handle_irq = gic_handle_irq, 302 300 .timer = &tegra_timer, 303 301 .init_machine = tegra_wario_init, 302 + .init_late = tegra_init_late, 304 303 .restart = tegra_assert_system_reset, 305 304 MACHINE_END
+1
arch/arm/mach-tegra/board-trimslice.c
··· 178 178 .handle_irq = gic_handle_irq, 179 179 .timer = &tegra_timer, 180 180 .init_machine = tegra_trimslice_init, 181 + .init_late = tegra_init_late, 181 182 .restart = tegra_assert_system_reset, 182 183 MACHINE_END
+14
arch/arm/mach-tegra/board.h
··· 32 32 void __init tegra_dt_init_irq(void); 33 33 int __init tegra_pcie_init(bool init_port0, bool init_port1); 34 34 35 + void tegra_init_late(void); 36 + 37 + #ifdef CONFIG_DEBUG_FS 38 + int tegra_clk_debugfs_init(void); 39 + #else 40 + static inline int tegra_clk_debugfs_init(void) { return 0; } 41 + #endif 42 + 43 + #if defined(CONFIG_ARCH_TEGRA_2x_SOC) && defined(CONFIG_DEBUG_FS) 44 + int __init tegra_powergate_debugfs_init(void); 45 + #else 46 + static inline int tegra_powergate_debugfs_init(void) { return 0; } 47 + #endif 48 + 35 49 extern struct sys_timer tegra_timer; 36 50 #endif
+1 -2
arch/arm/mach-tegra/clock.c
··· 642 642 return 0; 643 643 } 644 644 645 - static int __init clk_debugfs_init(void) 645 + int __init tegra_clk_debugfs_init(void) 646 646 { 647 647 struct clk *c; 648 648 struct dentry *d; ··· 669 669 return err; 670 670 } 671 671 672 - late_initcall(clk_debugfs_init); 673 672 #endif
+6
arch/arm/mach-tegra/common.c
··· 146 146 tegra_powergate_init(); 147 147 } 148 148 #endif 149 + 150 + void __init tegra_init_late(void) 151 + { 152 + tegra_clk_debugfs_init(); 153 + tegra_powergate_debugfs_init(); 154 + }
+1 -3
arch/arm/mach-tegra/powergate.c
··· 234 234 .release = single_release, 235 235 }; 236 236 237 - static int __init powergate_debugfs_init(void) 237 + int __init tegra_powergate_debugfs_init(void) 238 238 { 239 239 struct dentry *d; 240 240 int err = -ENOMEM; ··· 246 246 247 247 return err; 248 248 } 249 - 250 - late_initcall(powergate_debugfs_init); 251 249 252 250 #endif
+4
arch/arm/mach-ux500/board-mop500.c
··· 785 785 .timer = &ux500_timer, 786 786 .handle_irq = gic_handle_irq, 787 787 .init_machine = mop500_init_machine, 788 + .init_late = ux500_init_late, 788 789 MACHINE_END 789 790 790 791 MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+") ··· 795 794 .timer = &ux500_timer, 796 795 .handle_irq = gic_handle_irq, 797 796 .init_machine = hrefv60_init_machine, 797 + .init_late = ux500_init_late, 798 798 MACHINE_END 799 799 800 800 MACHINE_START(SNOWBALL, "Calao Systems Snowball platform") ··· 806 804 .timer = &ux500_timer, 807 805 .handle_irq = gic_handle_irq, 808 806 .init_machine = snowball_init_machine, 807 + .init_late = ux500_init_late, 809 808 MACHINE_END 810 809 811 810 #ifdef CONFIG_MACH_UX500_DT ··· 921 918 .timer = &ux500_timer, 922 919 .handle_irq = gic_handle_irq, 923 920 .init_machine = u8500_init_machine, 921 + .init_late = ux500_init_late, 924 922 .dt_compat = u8500_dt_board_compat, 925 923 MACHINE_END 926 924 #endif
+2 -4
arch/arm/mach-ux500/clock.c
··· 635 635 return 0; 636 636 } 637 637 638 - static int __init clk_debugfs_init(void) 638 + int __init clk_debugfs_init(void) 639 639 { 640 640 struct clk *c; 641 641 struct dentry *d; ··· 657 657 return err; 658 658 } 659 659 660 - late_initcall(clk_debugfs_init); 661 660 #endif /* defined(CONFIG_DEBUG_FS) */ 662 661 663 662 unsigned long clk_smp_twd_rate = 500000000; ··· 695 696 .notifier_call = clk_twd_cpufreq_transition, 696 697 }; 697 698 698 - static int clk_init_smp_twd_cpufreq(void) 699 + int clk_init_smp_twd_cpufreq(void) 699 700 { 700 701 return cpufreq_register_notifier(&clk_twd_cpufreq_nb, 701 702 CPUFREQ_TRANSITION_NOTIFIER); 702 703 } 703 - late_initcall(clk_init_smp_twd_cpufreq); 704 704 705 705 #endif 706 706
+12
arch/arm/mach-ux500/clock.h
··· 150 150 151 151 int __init clk_db8500_ed_fixup(void); 152 152 int __init clk_init(void); 153 + 154 + #ifdef CONFIG_DEBUG_FS 155 + int clk_debugfs_init(void); 156 + #else 157 + static inline int clk_debugfs_init(void) { return 0; } 158 + #endif 159 + 160 + #ifdef CONFIG_CPU_FREQ 161 + int clk_init_smp_twd_cpufreq(void); 162 + #else 163 + static inline int clk_init_smp_twd_cpufreq(void) { return 0; } 164 + #endif
+6
arch/arm/mach-ux500/cpu.c
··· 73 73 clk_init(); 74 74 } 75 75 76 + void __init ux500_init_late(void) 77 + { 78 + clk_debugfs_init(); 79 + clk_init_smp_twd_cpufreq(); 80 + } 81 + 76 82 static const char * __init ux500_get_machine(void) 77 83 { 78 84 return kasprintf(GFP_KERNEL, "DB%4x", dbx500_partnumber());
+1
arch/arm/mach-ux500/include/mach/setup.h
··· 20 20 extern struct device * __init u8500_init_devices(void); 21 21 22 22 extern void __init ux500_init_irq(void); 23 + extern void __init ux500_init_late(void); 23 24 24 25 extern struct device *ux500_soc_device_init(const char *soc_id); 25 26
+7
arch/arm/plat-mxc/include/mach/common.h
··· 53 53 extern void imx50_soc_init(void); 54 54 extern void imx51_soc_init(void); 55 55 extern void imx53_soc_init(void); 56 + extern void imx51_init_late(void); 56 57 extern void epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq); 57 58 extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int); 58 59 extern int mx1_clocks_init(unsigned long fref); ··· 148 147 extern void imx6q_pm_init(void); 149 148 #else 150 149 static inline void imx6q_pm_init(void) {} 150 + #endif 151 + 152 + #ifdef CONFIG_NEON 153 + extern int mx51_neon_fixup(void); 154 + #else 155 + static inline int mx51_neon_fixup(void) { return 0; } 151 156 #endif 152 157 153 158 #endif