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ARM: dts: imx6ull: Add support for PHYTEC phyBOARD-Segin with i.MX 6ULL
In addition to the PHYTEC phyCORE-i.MX 6UL the PHYTEC phyBOARD-Segin is
also available with the PHYTEC phyCORE-i.MX 6ULL. So this adds support
for this SOM and its baseboards.
It comes in a full featured option with either NAND flash or eMMC and in
a low cost option only available with NAND flash.
The hardware specs are:
- Full featured with NAND or eMMC:
* i.MX 6ULL Y2
* 512MB DDR3 memory
* 512MB NAND flash or 4GB/8GB eMMC
* Dual 10/100 Ethernet
* USB Host and USB OTG
* RS232
* MicroSD external storage
* Audio, RS232, I2C, SPI, CAN headers
* Further I/O options via A/V and Expansion headers
- Low cost with NAND:
* i.MX 6ULL Y0
* 256MB DDR3 memory
* 128MB NAND flash
* Single 10/100 Ethernet
* USB OTG
* RS232
* MicroSD external storage
* I2C
* Further I/O options via Expansion headers
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
authored by
Stefan Riedmueller
and committed by
Shawn Guo
f4411786
9ae6390a
+315
+3
arch/arm/boot/dts/Makefile
+3
arch/arm/boot/dts/Makefile
···
580
580
imx6ull-14x14-evk.dtb \
581
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imx6ull-colibri-eval-v3.dtb \
582
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imx6ull-colibri-wifi-eval-v3.dtb \
583
+
imx6ull-phytec-segin-ff-rdk-nand.dtb \
584
+
imx6ull-phytec-segin-ff-rdk-emmc.dtb \
585
+
imx6ull-phytec-segin-lc-rdk-nand.dtb \
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imx6ulz-14x14-evk.dtb
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dtb-$(CONFIG_SOC_IMX7D) += \
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imx7d-cl-som-imx7.dtb \
+24
arch/arm/boot/dts/imx6ull-phytec-phycore-som.dtsi
+24
arch/arm/boot/dts/imx6ull-phytec-phycore-som.dtsi
···
1
+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
/*
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+
* Copyright (C) 2019 PHYTEC Messtechnik GmbH
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+
* Author: Stefan Riedmueller <s.riedmueller@phytec.de>
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+
*/
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+
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+
#include "imx6ul-phytec-phycore-som.dtsi"
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+
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+
/ {
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+
model = "PHYTEC phyCORE-i.MX6 ULL";
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+
compatible = "phytec,imx6ull-pcl063", "fsl,imx6ull";
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+
};
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+
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+
&iomuxc {
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+
/delete-node/ gpioledssomgrp;
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+
};
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+
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+
&iomuxc_snvs {
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+
pinctrl_gpioleds_som: gpioledssomgrp {
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+
fsl,pins = <
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+
MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0
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+
>;
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+
};
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+
};
+93
arch/arm/boot/dts/imx6ull-phytec-segin-ff-rdk-emmc.dts
+93
arch/arm/boot/dts/imx6ull-phytec-segin-ff-rdk-emmc.dts
···
1
+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
+
/*
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+
* Copyright (C) 2019 PHYTEC Messtechnik GmbH
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+
* Author: Stefan Riedmueller <s.riedmueller@phytec.de>
5
+
*/
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+
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+
/dts-v1/;
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+
#include "imx6ull.dtsi"
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+
#include "imx6ull-phytec-phycore-som.dtsi"
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+
#include "imx6ull-phytec-segin.dtsi"
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+
#include "imx6ull-phytec-segin-peb-eval-01.dtsi"
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+
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+
/ {
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+
model = "PHYTEC phyBOARD-Segin i.MX6 ULL Full Featured with eMMC";
15
+
compatible = "phytec,imx6ull-pbacd10-emmc", "phytec,imx6ull-pbacd10",
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+
"phytec,imx6ull-pcl063","fsl,imx6ull";
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+
};
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+
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&adc1 {
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status = "okay";
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+
};
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+
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+
&can1 {
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status = "okay";
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+
};
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+
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+
&tlv320 {
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status = "okay";
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+
};
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+
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&ecspi3 {
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status = "okay";
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+
};
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+
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+
ðphy1 {
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status = "okay";
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+
};
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+
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ðphy2 {
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status = "okay";
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+
};
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+
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&fec1 {
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status = "okay";
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+
};
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+
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&fec2 {
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status = "okay";
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+
};
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+
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&i2c_rtc {
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status = "okay";
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+
};
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+
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®_can1_en {
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+
status = "okay";
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+
};
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+
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+
®_sound_1v8 {
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status = "okay";
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+
};
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+
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®_sound_3v3 {
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status = "okay";
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};
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+
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&sai2 {
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status = "okay";
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+
};
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+
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&sound {
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status = "okay";
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+
};
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+
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&uart5 {
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status = "okay";
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+
};
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+
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&usbotg1 {
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status = "okay";
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+
};
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+
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&usbotg2 {
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status = "okay";
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+
};
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+
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&usdhc1 {
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status = "okay";
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};
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+
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&usdhc2 {
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status = "okay";
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+
};
+93
arch/arm/boot/dts/imx6ull-phytec-segin-ff-rdk-nand.dts
+93
arch/arm/boot/dts/imx6ull-phytec-segin-ff-rdk-nand.dts
···
1
+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
+
/*
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* Copyright (C) 2019 PHYTEC Messtechnik GmbH
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+
* Author: Stefan Riedmueller <s.riedmueller@phytec.de>
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+
*/
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+
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/dts-v1/;
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#include "imx6ull.dtsi"
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#include "imx6ull-phytec-phycore-som.dtsi"
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#include "imx6ull-phytec-segin.dtsi"
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#include "imx6ull-phytec-segin-peb-eval-01.dtsi"
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+
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/ {
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model = "PHYTEC phyBOARD-Segin i.MX6 ULL Full Featured with NAND";
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compatible = "phytec,imx6ull-pbacd10-nand", "phytec,imx6ull-pbacd10",
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+
"phytec,imx6ull-pcl063", "fsl,imx6ull";
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};
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+
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&adc1 {
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status = "okay";
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+
};
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+
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&can1 {
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status = "okay";
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+
};
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+
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+
&tlv320 {
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status = "okay";
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+
};
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+
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&ecspi3 {
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status = "okay";
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+
};
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+
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ðphy1 {
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status = "okay";
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+
};
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+
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ðphy2 {
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status = "okay";
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+
};
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+
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&fec1 {
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status = "okay";
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+
};
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+
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&fec2 {
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status = "okay";
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+
};
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+
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&gpmi {
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status = "okay";
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+
};
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+
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+
&i2c_rtc {
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status = "okay";
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+
};
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+
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+
®_can1_en {
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status = "okay";
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+
};
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+
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+
®_sound_1v8 {
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+
status = "okay";
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+
};
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+
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®_sound_3v3 {
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status = "okay";
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+
};
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+
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&sai2 {
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status = "okay";
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+
};
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+
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&sound {
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status = "okay";
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+
};
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+
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&uart5 {
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status = "okay";
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+
};
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+
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&usbotg1 {
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status = "okay";
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+
};
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+
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&usbotg2 {
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status = "okay";
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};
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+
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&usdhc1 {
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status = "okay";
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};
+45
arch/arm/boot/dts/imx6ull-phytec-segin-lc-rdk-nand.dts
+45
arch/arm/boot/dts/imx6ull-phytec-segin-lc-rdk-nand.dts
···
1
+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
+
/*
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+
* Copyright (C) 2019 PHYTEC Messtechnik GmbH
4
+
* Author: Stefan Riedmueller <s.riedmueller@phytec.de>
5
+
*/
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+
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/dts-v1/;
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#include "imx6ull.dtsi"
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#include "imx6ull-phytec-phycore-som.dtsi"
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#include "imx6ull-phytec-segin.dtsi"
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#include "imx6ull-phytec-segin-peb-eval-01.dtsi"
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+
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/ {
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model = "PHYTEC phyBOARD-Segin i.MX6 ULL Low Cost with NAND";
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compatible = "phytec,imx6ull-pbacd10-nand", "phytec,imx6ull-pbacd10",
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"phytec,imx6ull-pcl063", "fsl,imx6ull";
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};
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+
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&adc1 {
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status = "okay";
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+
};
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+
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ðphy1 {
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status = "okay";
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+
};
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+
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&fec1 {
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status = "okay";
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+
};
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+
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&gpmi {
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+
status = "okay";
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+
};
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+
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&i2c_rtc {
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status = "okay";
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+
};
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+
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&usbotg1 {
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+
status = "okay";
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+
};
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+
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&usdhc1 {
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status = "okay";
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+
};
+19
arch/arm/boot/dts/imx6ull-phytec-segin-peb-eval-01.dtsi
+19
arch/arm/boot/dts/imx6ull-phytec-segin-peb-eval-01.dtsi
···
1
+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
+
/*
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+
* Copyright (C) 2019 PHYTEC Messtechnik GmbH
4
+
* Author: Stefan Riedmueller <s.riedmueller@phytec.de>
5
+
*/
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+
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+
#include "imx6ul-phytec-segin-peb-eval-01.dtsi"
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+
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&iomuxc {
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/delete-node/ gpio_keysgrp;
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+
};
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+
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&iomuxc_snvs {
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pinctrl_gpio_keys: gpio_keysgrp {
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fsl,pins = <
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+
MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x79
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+
>;
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+
};
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+
};
+38
arch/arm/boot/dts/imx6ull-phytec-segin.dtsi
+38
arch/arm/boot/dts/imx6ull-phytec-segin.dtsi
···
1
+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
+
/*
3
+
* Copyright (C) 2019 PHYTEC Messtechnik GmbH
4
+
* Author: Stefan Riedmueller <s.riedmueller@phytec.de>
5
+
*/
6
+
7
+
#include "imx6ul-phytec-segin.dtsi"
8
+
9
+
/ {
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+
model = "PHYTEC phyBOARD-Segin i.MX6 ULL";
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+
compatible = "phytec,imx6ull-pbacd-10", "phytec,imx6ull-pcl063","fsl,imx6ull";
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+
};
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+
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+
&iomuxc {
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+
/delete-node/ flexcan1engrp;
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+
/delete-node/ rtcintgrp;
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+
/delete-node/ stmpegrp;
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+
};
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+
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&iomuxc_snvs {
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princtrl_flexcan1_en: flexcan1engrp {
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+
fsl,pins = <
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+
MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x17059
24
+
>;
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+
};
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+
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+
pinctrl_rtc_int: rtcintgrp {
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+
fsl,pins = <
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+
MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059
30
+
>;
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+
};
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+
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+
pinctrl_stmpe: stmpegrp {
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+
fsl,pins = <
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MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
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+
>;
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+
};
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+
};