Merge tag 'dmaengine-fix-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

Pull dmaengine fixes from Vinod Koul:
"A bunch of dmaengine driver fixes for:

- coverity discovered issues for xilinx driver

- qcom, gpi driver fix for undefined bhaviour and one off cleanup

- update Peter's email for TI DMA drivers

- one-off for idxd driver

- resource leak fix for mediatek and milbeaut drivers"

* tag 'dmaengine-fix-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine:
dmaengine: stm32-mdma: fix STM32_MDMA_VERY_HIGH_PRIORITY value
dmaengine: xilinx_dma: fix mixed_enum_type coverity warning
dmaengine: xilinx_dma: fix incompatible param warning in _child_probe()
dmaengine: xilinx_dma: check dma_async_device_register return value
dmaengine: qcom: fix gpi undefined behavior
dt-bindings: dma: ti: Update maintainer and author information
MAINTAINERS: Add entry for Texas Instruments DMA drivers
qcom: bam_dma: Delete useless kfree code
dmaengine: dw-edma: Fix use after free in dw_edma_alloc_chunk()
dmaengine: milbeaut-xdmac: Fix a resource leak in the error handling path of the probe function
dmaengine: mediatek: mtk-hsdma: Fix a resource leak in the error handling path of the probe function
dmaengine: qcom: gpi: Fixes a format mismatch
dmaengine: idxd: off by one in cleanup code
dmaengine: ti: k3-udma: Fix pktdma rchan TPL level setup

+48 -25
+3 -1
Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml
··· 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 %YAML 1.2 3 --- 4 $id: http://devicetree.org/schemas/dma/ti/k3-bcdma.yaml# ··· 9 title: Texas Instruments K3 DMSS BCDMA Device Tree Bindings 10 11 maintainers: 12 - - Peter Ujfalusi <peter.ujfalusi@ti.com> 13 14 description: | 15 The Block Copy DMA (BCDMA) is intended to perform similar functions as the TR
··· 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + # Copyright (C) 2020 Texas Instruments Incorporated 3 + # Author: Peter Ujfalusi <peter.ujfalusi@ti.com> 4 %YAML 1.2 5 --- 6 $id: http://devicetree.org/schemas/dma/ti/k3-bcdma.yaml# ··· 7 title: Texas Instruments K3 DMSS BCDMA Device Tree Bindings 8 9 maintainers: 10 + - Peter Ujfalusi <peter.ujfalusi@gmail.com> 11 12 description: | 13 The Block Copy DMA (BCDMA) is intended to perform similar functions as the TR
+3 -1
Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml
··· 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 %YAML 1.2 3 --- 4 $id: http://devicetree.org/schemas/dma/ti/k3-pktdma.yaml# ··· 9 title: Texas Instruments K3 DMSS PKTDMA Device Tree Bindings 10 11 maintainers: 12 - - Peter Ujfalusi <peter.ujfalusi@ti.com> 13 14 description: | 15 The Packet DMA (PKTDMA) is intended to perform similar functions as the packet
··· 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + # Copyright (C) 2020 Texas Instruments Incorporated 3 + # Author: Peter Ujfalusi <peter.ujfalusi@ti.com> 4 %YAML 1.2 5 --- 6 $id: http://devicetree.org/schemas/dma/ti/k3-pktdma.yaml# ··· 7 title: Texas Instruments K3 DMSS PKTDMA Device Tree Bindings 8 9 maintainers: 10 + - Peter Ujfalusi <peter.ujfalusi@gmail.com> 11 12 description: | 13 The Packet DMA (PKTDMA) is intended to perform similar functions as the packet
+3 -1
Documentation/devicetree/bindings/dma/ti/k3-udma.yaml
··· 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 %YAML 1.2 3 --- 4 $id: http://devicetree.org/schemas/dma/ti/k3-udma.yaml# ··· 9 title: Texas Instruments K3 NAVSS Unified DMA Device Tree Bindings 10 11 maintainers: 12 - - Peter Ujfalusi <peter.ujfalusi@ti.com> 13 14 description: | 15 The UDMA-P is intended to perform similar (but significantly upgraded)
··· 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + # Copyright (C) 2019 Texas Instruments Incorporated 3 + # Author: Peter Ujfalusi <peter.ujfalusi@ti.com> 4 %YAML 1.2 5 --- 6 $id: http://devicetree.org/schemas/dma/ti/k3-udma.yaml# ··· 7 title: Texas Instruments K3 NAVSS Unified DMA Device Tree Bindings 8 9 maintainers: 10 + - Peter Ujfalusi <peter.ujfalusi@gmail.com> 11 12 description: | 13 The UDMA-P is intended to perform similar (but significantly upgraded)
+13
MAINTAINERS
··· 17552 F: Documentation/devicetree/bindings/iio/dac/ti,dac7612.txt 17553 F: drivers/iio/dac/ti-dac7612.c 17554 17555 TEXAS INSTRUMENTS' SYSTEM CONTROL INTERFACE (TISCI) PROTOCOL DRIVER 17556 M: Nishanth Menon <nm@ti.com> 17557 M: Tero Kristo <t-kristo@ti.com>
··· 17552 F: Documentation/devicetree/bindings/iio/dac/ti,dac7612.txt 17553 F: drivers/iio/dac/ti-dac7612.c 17554 17555 + TEXAS INSTRUMENTS DMA DRIVERS 17556 + M: Peter Ujfalusi <peter.ujfalusi@gmail.com> 17557 + L: dmaengine@vger.kernel.org 17558 + S: Maintained 17559 + F: Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt 17560 + F: Documentation/devicetree/bindings/dma/ti-edma.txt 17561 + F: Documentation/devicetree/bindings/dma/ti/ 17562 + F: drivers/dma/ti/ 17563 + X: drivers/dma/ti/cppi41.c 17564 + F: include/linux/dma/k3-udma-glue.h 17565 + F: include/linux/dma/ti-cppi5.h 17566 + F: include/linux/dma/k3-psil.h 17567 + 17568 TEXAS INSTRUMENTS' SYSTEM CONTROL INTERFACE (TISCI) PROTOCOL DRIVER 17569 M: Nishanth Menon <nm@ti.com> 17570 M: Tero Kristo <t-kristo@ti.com>
+2 -2
drivers/dma/dw-edma/dw-edma-core.c
··· 86 87 if (desc->chunk) { 88 /* Create and add new element into the linked list */ 89 - desc->chunks_alloc++; 90 - list_add_tail(&chunk->list, &desc->chunk->list); 91 if (!dw_edma_alloc_burst(chunk)) { 92 kfree(chunk); 93 return NULL; 94 } 95 } else { 96 /* List head */ 97 chunk->burst = NULL;
··· 86 87 if (desc->chunk) { 88 /* Create and add new element into the linked list */ 89 if (!dw_edma_alloc_burst(chunk)) { 90 kfree(chunk); 91 return NULL; 92 } 93 + desc->chunks_alloc++; 94 + list_add_tail(&chunk->list, &desc->chunk->list); 95 } else { 96 /* List head */ 97 chunk->burst = NULL;
+2 -2
drivers/dma/idxd/sysfs.c
··· 434 return 0; 435 436 drv_fail: 437 - for (; i > 0; i--) 438 driver_unregister(&idxd_drvs[i]->drv); 439 return rc; 440 } ··· 1840 return 0; 1841 1842 bus_err: 1843 - for (; i > 0; i--) 1844 bus_unregister(idxd_bus_types[i]); 1845 return rc; 1846 }
··· 434 return 0; 435 436 drv_fail: 437 + while (--i >= 0) 438 driver_unregister(&idxd_drvs[i]->drv); 439 return rc; 440 } ··· 1840 return 0; 1841 1842 bus_err: 1843 + while (--i >= 0) 1844 bus_unregister(idxd_bus_types[i]); 1845 return rc; 1846 }
+1
drivers/dma/mediatek/mtk-hsdma.c
··· 1007 return 0; 1008 1009 err_free: 1010 of_dma_controller_free(pdev->dev.of_node); 1011 err_unregister: 1012 dma_async_device_unregister(dd);
··· 1007 return 0; 1008 1009 err_free: 1010 + mtk_hsdma_hw_deinit(hsdma); 1011 of_dma_controller_free(pdev->dev.of_node); 1012 err_unregister: 1013 dma_async_device_unregister(dd);
+3 -1
drivers/dma/milbeaut-xdmac.c
··· 350 351 ret = dma_async_device_register(ddev); 352 if (ret) 353 - return ret; 354 355 ret = of_dma_controller_register(dev->of_node, 356 of_dma_simple_xlate, mdev); ··· 363 364 unregister_dmac: 365 dma_async_device_unregister(ddev); 366 return ret; 367 } 368
··· 350 351 ret = dma_async_device_register(ddev); 352 if (ret) 353 + goto disable_xdmac; 354 355 ret = of_dma_controller_register(dev->of_node, 356 of_dma_simple_xlate, mdev); ··· 363 364 unregister_dmac: 365 dma_async_device_unregister(ddev); 366 + disable_xdmac: 367 + disable_xdmac(mdev); 368 return ret; 369 } 370
+1 -5
drivers/dma/qcom/bam_dma.c
··· 630 GFP_NOWAIT); 631 632 if (!async_desc) 633 - goto err_out; 634 635 if (flags & DMA_PREP_FENCE) 636 async_desc->flags |= DESC_FLAG_NWD; ··· 670 } 671 672 return vchan_tx_prep(&bchan->vc, &async_desc->vd, flags); 673 - 674 - err_out: 675 - kfree(async_desc); 676 - return NULL; 677 } 678 679 /**
··· 630 GFP_NOWAIT); 631 632 if (!async_desc) 633 + return NULL; 634 635 if (flags & DMA_PREP_FENCE) 636 async_desc->flags |= DESC_FLAG_NWD; ··· 670 } 671 672 return vchan_tx_prep(&bchan->vc, &async_desc->vd, flags); 673 } 674 675 /**
+5 -5
drivers/dma/qcom/gpi.c
··· 1416 len = 1 << bit; 1417 ring->alloc_size = (len + (len - 1)); 1418 dev_dbg(gpii->gpi_dev->dev, 1419 - "#el:%u el_size:%u len:%u actual_len:%llu alloc_size:%lu\n", 1420 elements, el_size, (elements * el_size), len, 1421 ring->alloc_size); 1422 ··· 1424 ring->alloc_size, 1425 &ring->dma_handle, GFP_KERNEL); 1426 if (!ring->pre_aligned) { 1427 - dev_err(gpii->gpi_dev->dev, "could not alloc size:%lu mem for ring\n", 1428 ring->alloc_size); 1429 return -ENOMEM; 1430 } ··· 1444 smp_wmb(); 1445 1446 dev_dbg(gpii->gpi_dev->dev, 1447 - "phy_pre:0x%0llx phy_alig:0x%0llx len:%u el_size:%u elements:%u\n", 1448 - ring->dma_handle, ring->phys_addr, ring->len, 1449 ring->el_size, ring->elements); 1450 1451 return 0; ··· 1948 return ret; 1949 1950 error_start_chan: 1951 - for (i = i - 1; i >= 0; i++) { 1952 gpi_stop_chan(&gpii->gchan[i]); 1953 gpi_send_cmd(gpii, gchan, GPI_CH_CMD_RESET); 1954 }
··· 1416 len = 1 << bit; 1417 ring->alloc_size = (len + (len - 1)); 1418 dev_dbg(gpii->gpi_dev->dev, 1419 + "#el:%u el_size:%u len:%u actual_len:%llu alloc_size:%zu\n", 1420 elements, el_size, (elements * el_size), len, 1421 ring->alloc_size); 1422 ··· 1424 ring->alloc_size, 1425 &ring->dma_handle, GFP_KERNEL); 1426 if (!ring->pre_aligned) { 1427 + dev_err(gpii->gpi_dev->dev, "could not alloc size:%zu mem for ring\n", 1428 ring->alloc_size); 1429 return -ENOMEM; 1430 } ··· 1444 smp_wmb(); 1445 1446 dev_dbg(gpii->gpi_dev->dev, 1447 + "phy_pre:%pad phy_alig:%pa len:%u el_size:%u elements:%u\n", 1448 + &ring->dma_handle, &ring->phys_addr, ring->len, 1449 ring->el_size, ring->elements); 1450 1451 return 0; ··· 1948 return ret; 1949 1950 error_start_chan: 1951 + for (i = i - 1; i >= 0; i--) { 1952 gpi_stop_chan(&gpii->gchan[i]); 1953 gpi_send_cmd(gpii, gchan, GPI_CH_CMD_RESET); 1954 }
+1 -1
drivers/dma/stm32-mdma.c
··· 199 #define STM32_MDMA_MAX_CHANNELS 63 200 #define STM32_MDMA_MAX_REQUESTS 256 201 #define STM32_MDMA_MAX_BURST 128 202 - #define STM32_MDMA_VERY_HIGH_PRIORITY 0x11 203 204 enum stm32_mdma_trigger_mode { 205 STM32_MDMA_BUFFER,
··· 199 #define STM32_MDMA_MAX_CHANNELS 63 200 #define STM32_MDMA_MAX_REQUESTS 256 201 #define STM32_MDMA_MAX_BURST 128 202 + #define STM32_MDMA_VERY_HIGH_PRIORITY 0x3 203 204 enum stm32_mdma_trigger_mode { 205 STM32_MDMA_BUFFER,
+3 -3
drivers/dma/ti/k3-udma.c
··· 4698 ud->tchan_tpl.levels = 1; 4699 } 4700 4701 - ud->tchan_tpl.levels = ud->tchan_tpl.levels; 4702 - ud->tchan_tpl.start_idx[0] = ud->tchan_tpl.start_idx[0]; 4703 - ud->tchan_tpl.start_idx[1] = ud->tchan_tpl.start_idx[1]; 4704 4705 ud->tchan_map = devm_kmalloc_array(dev, BITS_TO_LONGS(ud->tchan_cnt), 4706 sizeof(unsigned long), GFP_KERNEL);
··· 4698 ud->tchan_tpl.levels = 1; 4699 } 4700 4701 + ud->rchan_tpl.levels = ud->tchan_tpl.levels; 4702 + ud->rchan_tpl.start_idx[0] = ud->tchan_tpl.start_idx[0]; 4703 + ud->rchan_tpl.start_idx[1] = ud->tchan_tpl.start_idx[1]; 4704 4705 ud->tchan_map = devm_kmalloc_array(dev, BITS_TO_LONGS(ud->tchan_cnt), 4706 sizeof(unsigned long), GFP_KERNEL);
+8 -3
drivers/dma/xilinx/xilinx_dma.c
··· 2781 has_dre = false; 2782 2783 if (!has_dre) 2784 - xdev->common.copy_align = fls(width - 1); 2785 2786 if (of_device_is_compatible(node, "xlnx,axi-vdma-mm2s-channel") || 2787 of_device_is_compatible(node, "xlnx,axi-dma-mm2s-channel") || ··· 2900 static int xilinx_dma_child_probe(struct xilinx_dma_device *xdev, 2901 struct device_node *node) 2902 { 2903 - int ret, i, nr_channels = 1; 2904 2905 ret = of_property_read_u32(node, "dma-channels", &nr_channels); 2906 if (xdev->dma_config->dmatype == XDMA_TYPE_AXIMCDMA && ret < 0) ··· 3113 } 3114 3115 /* Register the DMA engine with the core */ 3116 - dma_async_device_register(&xdev->common); 3117 3118 err = of_dma_controller_register(node, of_dma_xilinx_xlate, 3119 xdev);
··· 2781 has_dre = false; 2782 2783 if (!has_dre) 2784 + xdev->common.copy_align = (enum dmaengine_alignment)fls(width - 1); 2785 2786 if (of_device_is_compatible(node, "xlnx,axi-vdma-mm2s-channel") || 2787 of_device_is_compatible(node, "xlnx,axi-dma-mm2s-channel") || ··· 2900 static int xilinx_dma_child_probe(struct xilinx_dma_device *xdev, 2901 struct device_node *node) 2902 { 2903 + int ret, i; 2904 + u32 nr_channels = 1; 2905 2906 ret = of_property_read_u32(node, "dma-channels", &nr_channels); 2907 if (xdev->dma_config->dmatype == XDMA_TYPE_AXIMCDMA && ret < 0) ··· 3112 } 3113 3114 /* Register the DMA engine with the core */ 3115 + err = dma_async_device_register(&xdev->common); 3116 + if (err) { 3117 + dev_err(xdev->dev, "failed to register the dma device\n"); 3118 + goto error; 3119 + } 3120 3121 err = of_dma_controller_register(node, of_dma_xilinx_xlate, 3122 xdev);