···4646extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid,4747 unsigned long cr3);4848extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid);4949+extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev);49505051#define PPR_SUCCESS 0x05152#define PPR_INVALID 0x1
+4
drivers/iommu/amd_iommu_types.h
···360360#define PPR_FAULT_RSVD (1 << 7)361361#define PPR_FAULT_GN (1 << 8)362362363363+struct iommu_domain;364364+363365/*364366 * This structure contains generic data for IOMMU protection domains365367 * independent of their use.···381379 unsigned dev_cnt; /* devices assigned to this domain */382380 unsigned dev_iommu[MAX_IOMMUS]; /* per-IOMMU reference count */383381 void *priv; /* private data */382382+ struct iommu_domain *iommu_domain; /* Pointer to generic383383+ domain structure */384384385385};386386