tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
dt-bindings: msm/hdmi: Add HDMI PHY bindings
Add HDMI PHY bindings. Update the example to use HDMI PHY.
Added a missing power-domains property in the HDMI core bindings. Also,
simplified HDMI TX's DT node name in the example.
Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
authored by
Archit Taneja
and committed by
Rob Clark
f31d12af
e17afdce
+44
-2
+44
-2
Documentation/devicetree/bindings/display/msm/hdmi.txt
+44
-2
Documentation/devicetree/bindings/display/msm/hdmi.txt
···
11
11
- reg: Physical base address and length of the controller's registers
12
12
- reg-names: "core_physical"
13
13
- interrupts: The interrupt signal from the hdmi block.
14
+
- power-domains: Should be <&mmcc MDSS_GDSC>.
14
15
- clocks: device clocks
15
16
See ../clocks/clock-bindings.txt for details.
16
17
- qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin
···
19
18
- qcom,hdmi-tx-hpd-gpio: hpd pin
20
19
- core-vdda-supply: phandle to supply regulator
21
20
- hdmi-mux-supply: phandle to mux regulator
21
+
- phys: the phandle for the HDMI PHY device
22
+
- phy-names: the name of the corresponding PHY device
22
23
23
24
Optional properties:
24
25
- qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
···
30
27
- pinctrl-0: the default pinctrl state (active)
31
28
- pinctrl-1: the "sleep" pinctrl state
32
29
30
+
HDMI PHY:
31
+
Required properties:
32
+
- compatible: Could be the following
33
+
* "qcom,hdmi-phy-8660"
34
+
* "qcom,hdmi-phy-8960"
35
+
* "qcom,hdmi-phy-8974"
36
+
* "qcom,hdmi-phy-8084"
37
+
* "qcom,hdmi-phy-8996"
38
+
- #phy-cells: Number of cells in a PHY specifier; Should be 0.
39
+
- reg: Physical base address and length of the registers of the PHY sub blocks.
40
+
- reg-names: The names of register regions. The following regions are required:
41
+
* "hdmi_phy"
42
+
* "hdmi_pll"
43
+
For HDMI PHY on msm8996, these additional register regions are required:
44
+
* "hdmi_tx_l0"
45
+
* "hdmi_tx_l1"
46
+
* "hdmi_tx_l3"
47
+
* "hdmi_tx_l4"
48
+
- power-domains: Should be <&mmcc MDSS_GDSC>.
49
+
- clocks: device clocks
50
+
See Documentation/devicetree/bindings/clocks/clock-bindings.txt for details.
51
+
- core-vdda-supply: phandle to vdda regulator device node
52
+
33
53
Example:
34
54
35
55
/ {
36
56
...
37
57
38
-
hdmi: qcom,hdmi-tx-8960@4a00000 {
58
+
hdmi: hdmi@4a00000 {
39
59
compatible = "qcom,hdmi-tx-8960";
40
60
reg-names = "core_physical";
41
-
reg = <0x04a00000 0x1000>;
61
+
reg = <0x04a00000 0x2f0>;
42
62
interrupts = <GIC_SPI 79 0>;
43
63
power-domains = <&mmcc MDSS_GDSC>;
44
64
clock-names =
···
80
54
pinctrl-names = "default", "sleep";
81
55
pinctrl-0 = <&hpd_active &ddc_active &cec_active>;
82
56
pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>;
57
+
58
+
phys = <&hdmi_phy>;
59
+
phy-names = "hdmi_phy";
60
+
};
61
+
62
+
hdmi_phy: phy@4a00400 {
63
+
compatible = "qcom,hdmi-phy-8960";
64
+
reg-names = "hdmi_phy",
65
+
"hdmi_pll";
66
+
reg = <0x4a00400 0x60>,
67
+
<0x4a00500 0x100>;
68
+
#phy-cells = <0>;
69
+
power-domains = <&mmcc MDSS_GDSC>;
70
+
clock-names = "slave_iface_clk";
71
+
clocks = <&mmcc HDMI_S_AHB_CLK>;
72
+
core-vdda-supply = <&pm8921_hdmi_mvs>;
83
73
};
84
74
};