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linux
[ARM] 4876/1: i.MXC family: Clean up
From: Juergen Beisert <j.beisert@pengutronix.de>
Clean up current header files from doxygen style comments. There are
probably more such comments left, but we start with these.
Things happend since last review:
- needless blank lines removed (note by Russell King)
- re-format comments (note by Ross Wille)
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Ross Wille <wille@freescale.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
authored by
Robert Schwebel
and committed by
Russell King
f304fc42
05dda977
+61
-161
+47
-77
include/asm-arm/arch-mxc/board-mx31ads.h
+47
-77
include/asm-arm/arch-mxc/board-mx31ads.h
···
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#ifndef __ASM_ARCH_MXC_BOARD_MX31ADS_H__
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#define __ASM_ARCH_MXC_BOARD_MX31ADS_H__
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-
/*!
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* @name PBC Controller parameters
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-
*/
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/*! @{ */
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/*!
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* Base address of PBC controller
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*/
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+
/* Base address of PBC controller */
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#define PBC_BASE_ADDRESS IO_ADDRESS(CS4_BASE_ADDR)
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/* Offsets for the PBC Controller register */
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/*!
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* PBC Board status register offset
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*/
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/* PBC Board status register offset */
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#define PBC_BSTAT 0x000002
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-
/*!
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* PBC Board control register 1 set address.
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*/
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/* PBC Board control register 1 set address */
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#define PBC_BCTRL1_SET 0x000004
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/*!
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* PBC Board control register 1 clear address.
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*/
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/* PBC Board control register 1 clear address */
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#define PBC_BCTRL1_CLEAR 0x000006
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-
/*!
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* PBC Board control register 2 set address.
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*/
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/* PBC Board control register 2 set address */
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#define PBC_BCTRL2_SET 0x000008
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/*!
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* PBC Board control register 2 clear address.
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*/
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/* PBC Board control register 2 clear address */
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#define PBC_BCTRL2_CLEAR 0x00000A
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-
/*!
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* PBC Board control register 3 set address.
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*/
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/* PBC Board control register 3 set address */
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#define PBC_BCTRL3_SET 0x00000C
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-
/*!
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* PBC Board control register 3 clear address.
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*/
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/* PBC Board control register 3 clear address */
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#define PBC_BCTRL3_CLEAR 0x00000E
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-
/*!
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* PBC Board control register 4 set address.
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*/
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/* PBC Board control register 4 set address */
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#define PBC_BCTRL4_SET 0x000010
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/*!
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* PBC Board control register 4 clear address.
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*/
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/* PBC Board control register 4 clear address */
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#define PBC_BCTRL4_CLEAR 0x000012
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/*!
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* PBC Board status register 1.
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*/
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/* PBC Board status register 1 */
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#define PBC_BSTAT1 0x000014
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/*!
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* PBC Board interrupt status register.
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*/
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/* PBC Board interrupt status register */
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#define PBC_INTSTATUS 0x000016
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/*!
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* PBC Board interrupt current status register.
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*/
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/* PBC Board interrupt current status register */
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#define PBC_INTCURR_STATUS 0x000018
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-
/*!
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* PBC Interrupt mask register set address.
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*/
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/* PBC Interrupt mask register set address */
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#define PBC_INTMASK_SET 0x00001A
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/*!
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* PBC Interrupt mask register clear address.
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*/
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/* PBC Interrupt mask register clear address */
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#define PBC_INTMASK_CLEAR 0x00001C
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/*!
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* External UART A.
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*/
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/* External UART A */
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#define PBC_SC16C652_UARTA 0x010000
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/*!
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* External UART B.
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*/
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/* External UART B */
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#define PBC_SC16C652_UARTB 0x010010
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/*!
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* Ethernet Controller IO base address.
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*/
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/* Ethernet Controller IO base address */
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#define PBC_CS8900A_IOBASE 0x020000
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/*!
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* Ethernet Controller Memory base address.
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*/
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/* Ethernet Controller Memory base address */
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#define PBC_CS8900A_MEMBASE 0x021000
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/*!
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* Ethernet Controller DMA base address.
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*/
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/* Ethernet Controller DMA base address */
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#define PBC_CS8900A_DMABASE 0x022000
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/*!
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* External chip select 0.
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*/
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/* External chip select 0 */
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#define PBC_XCS0 0x040000
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/*!
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* LCD Display enable.
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*/
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/* LCD Display enable */
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#define PBC_LCD_EN_B 0x060000
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/*!
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* Code test debug enable.
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*/
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/* Code test debug enable */
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#define PBC_CODE_B 0x070000
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/*!
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* PSRAM memory select.
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*/
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/* PSRAM memory select */
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#define PBC_PSRAM_B 0x5000000
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#define PBC_INTSTATUS_REG (PBC_INTSTATUS + PBC_BASE_ADDRESS)
···
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#define MXC_MAX_EXP_IO_LINES 16
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#endif /* __ASM_ARCH_MXC_BOARD_MX31ADS_H__ */
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#endif /* __ASM_ARCH_MXC_BOARD_MX31ADS_H__ */
-7
include/asm-arm/arch-mxc/dma.h
-7
include/asm-arm/arch-mxc/dma.h
+1
-7
include/asm-arm/arch-mxc/hardware.h
+1
-7
include/asm-arm/arch-mxc/hardware.h
···
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* published by the Free Software Foundation.
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*/
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/*!
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* @file hardware.h
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* @brief This file contains the hardware definitions of the board.
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*
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* @ingroup System
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*/
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#ifndef __ASM_ARCH_MXC_HARDWARE_H__
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#define __ASM_ARCH_MXC_HARDWARE_H__
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···
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MXC_MAX_EXP_IO_LINES + \
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MXC_MAX_VIRTUAL_INTS)
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#endif /* __ASM_ARCH_MXC_HARDWARE_H__ */
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#endif /* __ASM_ARCH_MXC_HARDWARE_H__ */
+2
-13
include/asm-arm/arch-mxc/io.h
+2
-13
include/asm-arm/arch-mxc/io.h
···
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* published by the Free Software Foundation.
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*/
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/*!
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* @file io.h
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* @brief This file contains some memory mapping macros.
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* @note There is no real ISA or PCI buses. But have to define these macros
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* for some drivers to compile.
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*
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* @ingroup System
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*/
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#ifndef __ASM_ARCH_MXC_IO_H__
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#define __ASM_ARCH_MXC_IO_H__
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/*! Allow IO space to be anywhere in the memory */
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/* Allow IO space to be anywhere in the memory */
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#define IO_SPACE_LIMIT 0xffffffff
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/*!
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* io address mapping macro
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*/
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/* io address mapping macro */
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#define __io(a) ((void __iomem *)(a))
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#define __mem_pci(a) (a)
+3
-14
include/asm-arm/arch-mxc/irqs.h
+3
-14
include/asm-arm/arch-mxc/irqs.h
···
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#include <asm/hardware.h>
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/*!
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* @file irqs.h
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* @brief This file defines the number of normal interrupts and fast interrupts
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*
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* @ingroup Interrupt
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*/
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#define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE)
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#define MXC_IRQ_TO_GPIO(irq) ((irq) - MXC_GPIO_INT_BASE)
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#define MXC_GPIO_TO_IRQ(x) (MXC_GPIO_INT_BASE + x)
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/*!
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* Number of normal interrupts
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*/
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/* Number of normal interrupts */
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#define NR_IRQS MXC_MAX_INTS
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/*!
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* Number of fast interrupts
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*/
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/* Number of fast interrupts */
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#define NR_FIQS MXC_MAX_INTS
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#endif /* __ASM_ARCH_MXC_IRQS_H__ */
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#endif /* __ASM_ARCH_MXC_IRQS_H__ */
+3
-10
include/asm-arm/arch-mxc/memory.h
+3
-10
include/asm-arm/arch-mxc/memory.h
···
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#include <asm/hardware.h>
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/*!
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* @file memory.h
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* @brief This file contains macros needed by the Linux kernel and drivers.
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*
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* @ingroup Memory
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*/
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/*!
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/*
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* Virtual view <-> DMA view memory address translations
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* This macro is used to translate the virtual address to an address
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* suitable to be passed to set_dma_addr()
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*/
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#define __virt_to_bus(a) __virt_to_phys(a)
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/*!
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/*
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* Used to convert an address for DMA operations to an address that the
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* kernel can use.
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*/
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#define __bus_to_virt(a) __phys_to_virt(a)
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#endif /* __ASM_ARCH_MXC_MEMORY_H__ */
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#endif /* __ASM_ARCH_MXC_MEMORY_H__ */
+2
-4
include/asm-arm/arch-mxc/mxc.h
+2
-4
include/asm-arm/arch-mxc/mxc.h
···
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#define MXC_GPT_GPTICR2 IO_ADDRESS(GPT1_BASE_ADDR + 0x20)
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#define MXC_GPT_GPTCNT IO_ADDRESS(GPT1_BASE_ADDR + 0x24)
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/*!
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* GPT Control register bit definitions
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*/
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/* GPT Control register bit definitions */
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#define GPTCR_FO3 (1 << 31)
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#define GPTCR_FO2 (1 << 30)
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#define GPTCR_FO1 (1 << 29)
···
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#define IIM_PROD_REV_SH 3
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#define IIM_PROD_REV_LEN 5
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#endif /* __ASM_ARCH_MXC_H__ */
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#endif /* __ASM_ARCH_MXC_H__ */
+1
-17
include/asm-arm/arch-mxc/system.h
+1
-17
include/asm-arm/arch-mxc/system.h
···
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#ifndef __ASM_ARCH_MXC_SYSTEM_H__
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#define __ASM_ARCH_MXC_SYSTEM_H__
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/*!
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* @file system.h
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* @brief This file contains idle and reset functions.
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*
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* @ingroup System
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*/
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/*!
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* This function puts the CPU into idle mode. It is called by default_idle()
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* in process.c file.
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*/
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static inline void arch_idle(void)
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{
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cpu_do_idle();
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}
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/*
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* This function resets the system. It is called by machine_restart().
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*
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* @param mode indicates different kinds of resets
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*/
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static inline void arch_reset(char mode)
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{
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cpu_reset(0);
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}
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#endif /* __ASM_ARCH_MXC_SYSTEM_H__ */
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#endif /* __ASM_ARCH_MXC_SYSTEM_H__ */
+2
-12
include/asm-arm/arch-mxc/vmalloc.h
+2
-12
include/asm-arm/arch-mxc/vmalloc.h
···
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#ifndef __ASM_ARCH_MXC_VMALLOC_H__
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#define __ASM_ARCH_MXC_VMALLOC_H__
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/*!
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* @file vmalloc.h
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*
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* @brief This file contains platform specific macros for vmalloc.
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*
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* @ingroup System
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*/
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/*!
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* vmalloc ending address
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*/
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/* vmalloc ending address */
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#define VMALLOC_END 0xF4000000
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#endif /* __ASM_ARCH_MXC_VMALLOC_H__ */
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#endif /* __ASM_ARCH_MXC_VMALLOC_H__ */