Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

+518 -386
+1
Documentation/Changes
··· 45 45 o procps 3.2.0 # ps --version 46 46 o oprofile 0.9 # oprofiled --version 47 47 o udev 081 # udevinfo -V 48 + o grub 0.93 # grub --version 48 49 49 50 Kernel compilation 50 51 ==================
+1 -1
MAINTAINERS
··· 3754 3754 W: http://www.linux-usb.org/gadget 3755 3755 S: Maintained 3756 3756 3757 - USB HID/HIDBP DRIVERS 3757 + USB HID/HIDBP DRIVERS (USB KEYBOARDS, MICE, REMOTE CONTROLS, ...) 3758 3758 P: Jiri Kosina 3759 3759 M: jkosina@suse.cz 3760 3760 L: linux-usb-devel@lists.sourceforge.net
+2 -1
arch/frv/mb93090-mb00/pci-vdk.c
··· 400 400 __reg_MB86943_pci_sl_mem_base = __region_CS2 + 0x08000000; 401 401 mb(); 402 402 403 - *(volatile unsigned long *)(__region_CS2+0x01300014) == 1; 403 + /* enable PCI arbitration */ 404 + __reg_MB86943_pci_arbiter = MB86943_PCIARB_EN; 404 405 405 406 ioport_resource.start = (__reg_MB86943_sl_pci_io_base << 9) & 0xfffffc00; 406 407 ioport_resource.end = (__reg_MB86943_sl_pci_io_range << 9) | 0x3ff;
+1 -1
arch/i386/boot/edd.c
··· 127 127 ax = 0x4800; 128 128 dx = devno; 129 129 asm("pushfl; int $0x13; popfl" 130 - : "+a" (ax), "+d" (dx) 130 + : "+a" (ax), "+d" (dx), "=m" (ei->params) 131 131 : "S" (&ei->params) 132 132 : "ebx", "ecx", "edi"); 133 133
+1 -1
arch/i386/boot/video-vesa.c
··· 268 268 dx = 0; /* EDID block number */ 269 269 di =(size_t) &boot_params.edid_info; /* (ES:)Pointer to block */ 270 270 asm(INT10 271 - : "+a" (ax), "+b" (bx), "+d" (dx) 271 + : "+a" (ax), "+b" (bx), "+d" (dx), "=m" (boot_params.edid_info) 272 272 : "c" (cx), "D" (di) 273 273 : "esi"); 274 274 #endif /* CONFIG_FIRMWARE_EDID */
-1
arch/ia64/ia32/sys_ia32.c
··· 34 34 #include <linux/uio.h> 35 35 #include <linux/nfs_fs.h> 36 36 #include <linux/quota.h> 37 - #include <linux/syscalls.h> 38 37 #include <linux/sunrpc/svc.h> 39 38 #include <linux/nfsd/nfsd.h> 40 39 #include <linux/nfsd/cache.h>
+10 -9
arch/ia64/kernel/iosapic.c
··· 142 142 static struct iosapic_intr_info { 143 143 struct list_head rtes; /* RTEs using this vector (empty => 144 144 * not an IOSAPIC interrupt) */ 145 - int count; /* # of RTEs that shares this vector */ 145 + int count; /* # of registered RTEs */ 146 146 u32 low32; /* current value of low word of 147 147 * Redirection table entry */ 148 148 unsigned int dest; /* destination CPU physical ID */ ··· 313 313 int rte_index; 314 314 struct iosapic_rte_info *rte; 315 315 316 - if (list_empty(&iosapic_intr_info[irq].rtes)) 316 + if (!iosapic_intr_info[irq].count) 317 317 return; /* not an IOSAPIC interrupt! */ 318 318 319 319 /* set only the mask bit */ ··· 331 331 int rte_index; 332 332 struct iosapic_rte_info *rte; 333 333 334 - if (list_empty(&iosapic_intr_info[irq].rtes)) 334 + if (!iosapic_intr_info[irq].count) 335 335 return; /* not an IOSAPIC interrupt! */ 336 336 337 337 low32 = iosapic_intr_info[irq].low32 &= ~IOSAPIC_MASK; ··· 363 363 364 364 dest = cpu_physical_id(first_cpu(mask)); 365 365 366 - if (list_empty(&iosapic_intr_info[irq].rtes)) 366 + if (!iosapic_intr_info[irq].count) 367 367 return; /* not an IOSAPIC interrupt */ 368 368 369 369 set_irq_affinity_info(irq, dest, redir); ··· 542 542 { 543 543 int new_irq; 544 544 545 - if (!list_empty(&iosapic_intr_info[irq].rtes)) { 545 + if (iosapic_intr_info[irq].count) { 546 546 new_irq = create_irq(); 547 547 if (new_irq < 0) 548 548 panic("%s: out of interrupt vectors!\n", __FUNCTION__); ··· 560 560 } 561 561 } 562 562 563 - static struct iosapic_rte_info *iosapic_alloc_rte (void) 563 + static struct iosapic_rte_info * __init_refok iosapic_alloc_rte (void) 564 564 { 565 565 int i; 566 566 struct iosapic_rte_info *rte; ··· 677 677 * In case of vector shared by multiple RTEs, all RTEs that 678 678 * share the vector need to use the same destination CPU. 679 679 */ 680 - if (!list_empty(&iosapic_intr_info[irq].rtes)) 680 + if (iosapic_intr_info[irq].count) 681 681 return iosapic_intr_info[irq].dest; 682 682 683 683 /* ··· 794 794 err = register_intr(gsi, irq, IOSAPIC_LOWEST_PRIORITY, 795 795 polarity, trigger); 796 796 if (err < 0) { 797 + spin_unlock(&irq_desc[irq].lock); 797 798 irq = err; 798 - goto unlock_all; 799 + goto unlock_iosapic_lock; 799 800 } 800 801 801 802 /* ··· 812 811 gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"), 813 812 (polarity == IOSAPIC_POL_HIGH ? "high" : "low"), 814 813 cpu_logical_id(dest), dest, irq_to_vector(irq)); 815 - unlock_all: 814 + 816 815 spin_unlock(&irq_desc[irq].lock); 817 816 unlock_iosapic_lock: 818 817 spin_unlock_irqrestore(&iosapic_lock, flags);
+6 -11
arch/ia64/kernel/irq_ia64.c
··· 101 101 return -1; 102 102 } 103 103 104 - static void reserve_irq(unsigned int irq) 105 - { 106 - unsigned long flags; 107 - 108 - spin_lock_irqsave(&vector_lock, flags); 109 - irq_status[irq] = IRQ_RSVD; 110 - spin_unlock_irqrestore(&vector_lock, flags); 111 - } 112 - 113 104 static inline int find_unassigned_irq(void) 114 105 { 115 106 int irq; ··· 293 302 294 303 void destroy_and_reserve_irq(unsigned int irq) 295 304 { 305 + unsigned long flags; 306 + 296 307 dynamic_irq_cleanup(irq); 297 308 298 - clear_irq_vector(irq); 299 - reserve_irq(irq); 309 + spin_lock_irqsave(&vector_lock, flags); 310 + __clear_irq_vector(irq); 311 + irq_status[irq] = IRQ_RSVD; 312 + spin_unlock_irqrestore(&vector_lock, flags); 300 313 } 301 314 302 315 static int __reassign_irq_vector(int irq, int cpu)
+11 -6
arch/ia64/kernel/mca.c
··· 1750 1750 strncpy(p->comm, type, sizeof(p->comm)-1); 1751 1751 } 1752 1752 1753 - /* Do per-CPU MCA-related initialization. */ 1753 + /* Caller prevents this from being called after init */ 1754 + static void * __init_refok mca_bootmem(void) 1755 + { 1756 + void *p; 1754 1757 1758 + p = alloc_bootmem(sizeof(struct ia64_mca_cpu) * NR_CPUS + 1759 + KERNEL_STACK_SIZE); 1760 + return (void *)ALIGN((unsigned long)p, KERNEL_STACK_SIZE); 1761 + } 1762 + 1763 + /* Do per-CPU MCA-related initialization. */ 1755 1764 void __cpuinit 1756 1765 ia64_mca_cpu_init(void *cpu_data) 1757 1766 { ··· 1772 1763 int cpu; 1773 1764 1774 1765 first_time = 0; 1775 - mca_data = alloc_bootmem(sizeof(struct ia64_mca_cpu) 1776 - * NR_CPUS + KERNEL_STACK_SIZE); 1777 - mca_data = (void *)(((unsigned long)mca_data + 1778 - KERNEL_STACK_SIZE - 1) & 1779 - (-KERNEL_STACK_SIZE)); 1766 + mca_data = mca_bootmem(); 1780 1767 for (cpu = 0; cpu < NR_CPUS; cpu++) { 1781 1768 format_mca_init_stack(mca_data, 1782 1769 offsetof(struct ia64_mca_cpu, mca_stack),
-1
arch/ia64/kernel/setup.c
··· 60 60 #include <asm/smp.h> 61 61 #include <asm/system.h> 62 62 #include <asm/unistd.h> 63 - #include <asm/system.h> 64 63 65 64 #if defined(CONFIG_SMP) && (IA64_CPU_SIZE > PAGE_SIZE) 66 65 # error "struct cpuinfo_ia64 too big!"
+5 -3
arch/ia64/kernel/smp.c
··· 346 346 } 347 347 348 348 /* 349 - * Run a function on another CPU 349 + * Run a function on a specific CPU 350 350 * <func> The function to run. This must be fast and non-blocking. 351 351 * <info> An arbitrary pointer to pass to the function. 352 352 * <nonatomic> Currently unused. ··· 366 366 int me = get_cpu(); /* prevent preemption and reschedule on another processor */ 367 367 368 368 if (cpuid == me) { 369 - printk(KERN_INFO "%s: trying to call self\n", __FUNCTION__); 369 + local_irq_disable(); 370 + func(info); 371 + local_irq_enable(); 370 372 put_cpu(); 371 - return -EBUSY; 373 + return 0; 372 374 } 373 375 374 376 data.func = func;
+15 -1
arch/ia64/kernel/time.c
··· 240 240 if (!nojitter) 241 241 itc_jitter_data.itc_jitter = 1; 242 242 #endif 243 - } 243 + } else 244 + /* 245 + * ITC is drifty and we have not synchronized the ITCs in smpboot.c. 246 + * ITC values may fluctuate significantly between processors. 247 + * Clock should not be used for hrtimers. Mark itc as only 248 + * useful for boot and testing. 249 + * 250 + * Note that jitter compensation is off! There is no point of 251 + * synchronizing ITCs since they may be large differentials 252 + * that change over time. 253 + * 254 + * The only way to fix this would be to repeatedly sync the 255 + * ITCs. Until that time we have to avoid ITC. 256 + */ 257 + clocksource_itc.rating = 50; 244 258 245 259 /* Setup the CPU local timer tick */ 246 260 ia64_cpu_local_tick();
+1 -1
arch/ia64/sn/kernel/io_common.c
··· 391 391 * hubdev_init_node() - Creates the HUB data structure and link them to it's 392 392 * own NODE specific data area. 393 393 */ 394 - void hubdev_init_node(nodepda_t * npda, cnodeid_t node) 394 + void __init hubdev_init_node(nodepda_t * npda, cnodeid_t node) 395 395 { 396 396 struct hubdev_info *hubdev_info; 397 397 int size;
-1
arch/ia64/sn/kernel/setup.c
··· 25 25 #include <linux/interrupt.h> 26 26 #include <linux/acpi.h> 27 27 #include <linux/compiler.h> 28 - #include <linux/sched.h> 29 28 #include <linux/root_dev.h> 30 29 #include <linux/nodemask.h> 31 30 #include <linux/pm.h>
+2 -5
arch/ia64/sn/kernel/sn2/timer.c
··· 23 23 24 24 extern unsigned long sn_rtc_cycles_per_second; 25 25 26 - static void __iomem *sn2_mc; 27 - 28 26 static cycle_t read_sn2(void) 29 27 { 30 - return (cycle_t)readq(sn2_mc); 28 + return (cycle_t)readq(RTC_COUNTER_ADDR); 31 29 } 32 30 33 31 static struct clocksource clocksource_sn2 = { 34 32 .name = "sn2_rtc", 35 - .rating = 300, 33 + .rating = 450, 36 34 .read = read_sn2, 37 35 .mask = (1LL << 55) - 1, 38 36 .mult = 0, ··· 56 58 57 59 void __init sn_timer_init(void) 58 60 { 59 - sn2_mc = RTC_COUNTER_ADDR; 60 61 clocksource_sn2.fsys_mmio = RTC_COUNTER_ADDR; 61 62 clocksource_sn2.mult = clocksource_hz2mult(sn_rtc_cycles_per_second, 62 63 clocksource_sn2.shift);
+41 -33
drivers/ata/ata_piix.c
··· 890 890 } 891 891 892 892 #ifdef CONFIG_PM 893 - static struct dmi_system_id piix_broken_suspend_dmi_table[] = { 894 - { 895 - .ident = "TECRA M5", 896 - .matches = { 897 - DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 898 - DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M5"), 893 + static int piix_broken_suspend(void) 894 + { 895 + static struct dmi_system_id sysids[] = { 896 + { 897 + .ident = "TECRA M5", 898 + .matches = { 899 + DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 900 + DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M5"), 901 + }, 899 902 }, 900 - }, 901 - { 902 - .ident = "Satellite U200", 903 - .matches = { 904 - DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 905 - DMI_MATCH(DMI_PRODUCT_NAME, "Satellite U200"), 903 + { 904 + .ident = "Satellite U205", 905 + .matches = { 906 + DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 907 + DMI_MATCH(DMI_PRODUCT_NAME, "Satellite U205"), 908 + }, 906 909 }, 907 - }, 908 - { 909 - .ident = "Satellite U205", 910 - .matches = { 911 - DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 912 - DMI_MATCH(DMI_PRODUCT_NAME, "Satellite U205"), 910 + { 911 + .ident = "Portege M500", 912 + .matches = { 913 + DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 914 + DMI_MATCH(DMI_PRODUCT_NAME, "PORTEGE M500"), 915 + }, 913 916 }, 914 - }, 915 - { 916 - .ident = "Portege M500", 917 - .matches = { 918 - DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 919 - DMI_MATCH(DMI_PRODUCT_NAME, "PORTEGE M500"), 920 - }, 921 - }, 922 - { } 923 - }; 917 + { } 918 + }; 919 + static const char *oemstrs[] = { 920 + "Tecra M3,", 921 + }; 922 + int i; 923 + 924 + if (dmi_check_system(sysids)) 925 + return 1; 926 + 927 + for (i = 0; i < ARRAY_SIZE(oemstrs); i++) 928 + if (dmi_find_device(DMI_DEV_TYPE_OEM_STRING, oemstrs[i], NULL)) 929 + return 1; 930 + 931 + return 0; 932 + } 924 933 925 934 static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) 926 935 { ··· 946 937 * cycles and power trying to do something to the sleeping 947 938 * beauty. 948 939 */ 949 - if (dmi_check_system(piix_broken_suspend_dmi_table) && 950 - mesg.event == PM_EVENT_SUSPEND) { 940 + if (piix_broken_suspend() && mesg.event == PM_EVENT_SUSPEND) { 951 941 pci_save_state(pdev); 952 942 953 943 /* mark its power state as "unknown", since we don't ··· 981 973 pci_restore_state(pdev); 982 974 983 975 /* PCI device wasn't disabled during suspend. Use 984 - * __pci_reenable_device() to avoid affecting the 985 - * enable count. 976 + * pci_reenable_device() to avoid affecting the enable 977 + * count. 986 978 */ 987 - rc = __pci_reenable_device(pdev); 979 + rc = pci_reenable_device(pdev); 988 980 if (rc) 989 981 dev_printk(KERN_ERR, &pdev->dev, "failed to enable " 990 982 "device after resume (%d)\n", rc);
+1
drivers/ata/libata-core.c
··· 3788 3788 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, }, 3789 3789 { "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, }, 3790 3790 { "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, }, 3791 + { "SAMSUNG HD401LJ", "ZZ100-15", ATA_HORKAGE_NONCQ, }, 3791 3792 3792 3793 /* Devices with NCQ limits */ 3793 3794
+4
drivers/ata/libata-sff.c
··· 573 573 struct pci_dev *pdev = to_pci_dev(gdev); 574 574 int i, rc; 575 575 576 + /* No BAR4 allocation: No DMA */ 577 + if (pci_resource_start(pdev, 4) == 0) 578 + return 0; 579 + 576 580 /* TODO: If we get no DMA mask we should fall back to PIO */ 577 581 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); 578 582 if (rc)
+4 -4
drivers/ata/pata_cmd64x.c
··· 31 31 #include <linux/libata.h> 32 32 33 33 #define DRV_NAME "pata_cmd64x" 34 - #define DRV_VERSION "0.2.3" 34 + #define DRV_VERSION "0.2.4" 35 35 36 36 /* 37 37 * CMD64x specific registers definition. ··· 397 397 .flags = ATA_FLAG_SLAVE_POSS, 398 398 .pio_mask = 0x1f, 399 399 .mwdma_mask = 0x07, 400 - .udma_mask = ATA_UDMA1, 400 + .udma_mask = ATA_UDMA2, 401 401 .port_ops = &cmd64x_port_ops 402 402 }, 403 403 { /* CMD 646 rev 1 */ ··· 412 412 .flags = ATA_FLAG_SLAVE_POSS, 413 413 .pio_mask = 0x1f, 414 414 .mwdma_mask = 0x07, 415 - .udma_mask = ATA_UDMA2, 415 + .udma_mask = ATA_UDMA4, 416 416 .port_ops = &cmd648_port_ops 417 417 }, 418 418 { /* CMD 649 */ ··· 420 420 .flags = ATA_FLAG_SLAVE_POSS, 421 421 .pio_mask = 0x1f, 422 422 .mwdma_mask = 0x07, 423 - .udma_mask = ATA_UDMA3, 423 + .udma_mask = ATA_UDMA5, 424 424 .port_ops = &cmd648_port_ops 425 425 } 426 426 };
+9 -11
drivers/ata/pata_sis.c
··· 2 2 * pata_sis.c - SiS ATA driver 3 3 * 4 4 * (C) 2005 Red Hat <alan@redhat.com> 5 + * (C) 2007 Bartlomiej Zolnierkiewicz 5 6 * 6 7 * Based upon linux/drivers/ide/pci/sis5513.c 7 8 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> ··· 36 35 #include "sis.h" 37 36 38 37 #define DRV_NAME "pata_sis" 39 - #define DRV_VERSION "0.5.1" 38 + #define DRV_VERSION "0.5.2" 40 39 41 40 struct sis_chipset { 42 41 u16 device; /* PCI host ID */ ··· 238 237 } 239 238 240 239 /** 241 - * sis_100_set_pioode - Initialize host controller PATA PIO timings 240 + * sis_100_set_piomode - Initialize host controller PATA PIO timings 242 241 * @ap: Port whose timings we are configuring 243 242 * @adev: Device we are configuring for. 244 243 * ··· 263 262 } 264 263 265 264 /** 266 - * sis_133_set_pioode - Initialize host controller PATA PIO timings 265 + * sis_133_set_piomode - Initialize host controller PATA PIO timings 267 266 * @ap: Port whose timings we are configuring 268 267 * @adev: Device we are configuring for. 269 268 * ··· 335 334 int drive_pci = sis_old_port_base(adev); 336 335 u16 timing; 337 336 338 - const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 }; 337 + const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 }; 339 338 const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 }; 340 339 341 340 pci_read_config_word(pdev, drive_pci, &timing); ··· 343 342 if (adev->dma_mode < XFER_UDMA_0) { 344 343 /* bits 3-0 hold recovery timing bits 8-10 active timing and 345 344 the higer bits are dependant on the device */ 346 - timing &= ~ 0x870F; 345 + timing &= ~0x870F; 347 346 timing |= mwdma_bits[speed]; 348 - pci_write_config_word(pdev, drive_pci, timing); 349 347 } else { 350 348 /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */ 351 349 speed = adev->dma_mode - XFER_UDMA_0; 352 350 timing &= ~0x6000; 353 351 timing |= udma_bits[speed]; 354 352 } 353 + pci_write_config_word(pdev, drive_pci, timing); 355 354 } 356 355 357 356 /** ··· 374 373 int drive_pci = sis_old_port_base(adev); 375 374 u16 timing; 376 375 377 - const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 }; 376 + const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 }; 378 377 const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000}; 379 378 380 379 pci_read_config_word(pdev, drive_pci, &timing); ··· 433 432 * @adev: Device to program 434 433 * 435 434 * Set UDMA/MWDMA mode for device, in host controller PCI config space. 436 - * Handles early SiS 961 bridges. Supports MWDMA as well unlike 437 - * the old ide/pci driver. 435 + * Handles early SiS 961 bridges. 438 436 * 439 437 * LOCKING: 440 438 * None (inherited from caller). ··· 467 467 * @adev: Device to program 468 468 * 469 469 * Set UDMA/MWDMA mode for device, in host controller PCI config space. 470 - * Handles early SiS 961 bridges. Supports MWDMA as well unlike 471 - * the old ide/pci driver. 472 470 * 473 471 * LOCKING: 474 472 * None (inherited from caller).
+4 -1
drivers/hid/usbhid/hid-core.c
··· 743 743 hid->quirks = quirks; 744 744 745 745 if (!(usbhid = kzalloc(sizeof(struct usbhid_device), GFP_KERNEL))) 746 - goto fail; 746 + goto fail_no_usbhid; 747 747 748 748 hid->driver_data = usbhid; 749 749 usbhid->hid = hid; ··· 878 878 usb_free_urb(usbhid->urbout); 879 879 usb_free_urb(usbhid->urbctrl); 880 880 hid_free_buffers(dev, hid); 881 + kfree(usbhid); 882 + fail_no_usbhid: 881 883 hid_free_device(hid); 882 884 883 885 return NULL; ··· 915 913 usb_free_urb(usbhid->urbout); 916 914 917 915 hid_free_buffers(hid_to_usb_dev(hid), hid); 916 + kfree(usbhid); 918 917 hid_free_device(hid); 919 918 } 920 919
+136 -2
drivers/hid/usbhid/hid-quirks.c
··· 61 61 #define USB_DEVICE_ID_APPLE_GEYSER4_JIS 0x021c 62 62 #define USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY 0x030a 63 63 #define USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY 0x030b 64 - #define USB_DEVICE_ID_APPLE_IR 0x8240 64 + 65 + #define USB_VENDOR_ID_ASUS 0x0b05 66 + #define USB_DEVICE_ID_ASUS_LCM 0x1726 65 67 66 68 #define USB_VENDOR_ID_ATEN 0x0557 67 69 #define USB_DEVICE_ID_ATEN_UC100KM 0x2004 ··· 200 198 201 199 #define USB_VENDOR_ID_LOGITECH 0x046d 202 200 #define USB_DEVICE_ID_LOGITECH_RECEIVER 0xc101 201 + #define USB_DEVICE_ID_LOGITECH_HARMONY 0xc110 202 + #define USB_DEVICE_ID_LOGITECH_HARMONY_2 0xc111 203 + #define USB_DEVICE_ID_LOGITECH_HARMONY_3 0xc112 204 + #define USB_DEVICE_ID_LOGITECH_HARMONY_4 0xc113 205 + #define USB_DEVICE_ID_LOGITECH_HARMONY_5 0xc114 206 + #define USB_DEVICE_ID_LOGITECH_HARMONY_6 0xc115 207 + #define USB_DEVICE_ID_LOGITECH_HARMONY_7 0xc116 208 + #define USB_DEVICE_ID_LOGITECH_HARMONY_8 0xc117 209 + #define USB_DEVICE_ID_LOGITECH_HARMONY_9 0xc118 210 + #define USB_DEVICE_ID_LOGITECH_HARMONY_10 0xc119 211 + #define USB_DEVICE_ID_LOGITECH_HARMONY_11 0xc11a 212 + #define USB_DEVICE_ID_LOGITECH_HARMONY_12 0xc11b 213 + #define USB_DEVICE_ID_LOGITECH_HARMONY_13 0xc11c 214 + #define USB_DEVICE_ID_LOGITECH_HARMONY_14 0xc11d 215 + #define USB_DEVICE_ID_LOGITECH_HARMONY_15 0xc11e 216 + #define USB_DEVICE_ID_LOGITECH_HARMONY_16 0xc11f 217 + #define USB_DEVICE_ID_LOGITECH_HARMONY_17 0xc120 218 + #define USB_DEVICE_ID_LOGITECH_HARMONY_18 0xc121 219 + #define USB_DEVICE_ID_LOGITECH_HARMONY_19 0xc122 220 + #define USB_DEVICE_ID_LOGITECH_HARMONY_20 0xc123 221 + #define USB_DEVICE_ID_LOGITECH_HARMONY_21 0xc124 222 + #define USB_DEVICE_ID_LOGITECH_HARMONY_22 0xc125 223 + #define USB_DEVICE_ID_LOGITECH_HARMONY_23 0xc126 224 + #define USB_DEVICE_ID_LOGITECH_HARMONY_24 0xc127 225 + #define USB_DEVICE_ID_LOGITECH_HARMONY_25 0xc128 226 + #define USB_DEVICE_ID_LOGITECH_HARMONY_26 0xc129 227 + #define USB_DEVICE_ID_LOGITECH_HARMONY_27 0xc12a 228 + #define USB_DEVICE_ID_LOGITECH_HARMONY_28 0xc12b 229 + #define USB_DEVICE_ID_LOGITECH_HARMONY_29 0xc12c 230 + #define USB_DEVICE_ID_LOGITECH_HARMONY_30 0xc12d 231 + #define USB_DEVICE_ID_LOGITECH_HARMONY_31 0xc12e 232 + #define USB_DEVICE_ID_LOGITECH_HARMONY_32 0xc12f 233 + #define USB_DEVICE_ID_LOGITECH_HARMONY_33 0xc130 234 + #define USB_DEVICE_ID_LOGITECH_HARMONY_34 0xc131 235 + #define USB_DEVICE_ID_LOGITECH_HARMONY_35 0xc132 236 + #define USB_DEVICE_ID_LOGITECH_HARMONY_36 0xc133 237 + #define USB_DEVICE_ID_LOGITECH_HARMONY_37 0xc134 238 + #define USB_DEVICE_ID_LOGITECH_HARMONY_38 0xc135 239 + #define USB_DEVICE_ID_LOGITECH_HARMONY_39 0xc136 240 + #define USB_DEVICE_ID_LOGITECH_HARMONY_40 0xc137 241 + #define USB_DEVICE_ID_LOGITECH_HARMONY_41 0xc138 242 + #define USB_DEVICE_ID_LOGITECH_HARMONY_42 0xc139 243 + #define USB_DEVICE_ID_LOGITECH_HARMONY_43 0xc13a 244 + #define USB_DEVICE_ID_LOGITECH_HARMONY_44 0xc13b 245 + #define USB_DEVICE_ID_LOGITECH_HARMONY_45 0xc13c 246 + #define USB_DEVICE_ID_LOGITECH_HARMONY_46 0xc13d 247 + #define USB_DEVICE_ID_LOGITECH_HARMONY_47 0xc13e 248 + #define USB_DEVICE_ID_LOGITECH_HARMONY_48 0xc13f 249 + #define USB_DEVICE_ID_LOGITECH_HARMONY_49 0xc140 250 + #define USB_DEVICE_ID_LOGITECH_HARMONY_50 0xc141 251 + #define USB_DEVICE_ID_LOGITECH_HARMONY_51 0xc142 252 + #define USB_DEVICE_ID_LOGITECH_HARMONY_52 0xc143 253 + #define USB_DEVICE_ID_LOGITECH_HARMONY_53 0xc144 254 + #define USB_DEVICE_ID_LOGITECH_HARMONY_54 0xc145 255 + #define USB_DEVICE_ID_LOGITECH_HARMONY_55 0xc146 256 + #define USB_DEVICE_ID_LOGITECH_HARMONY_56 0xc147 257 + #define USB_DEVICE_ID_LOGITECH_HARMONY_57 0xc148 258 + #define USB_DEVICE_ID_LOGITECH_HARMONY_58 0xc149 259 + #define USB_DEVICE_ID_LOGITECH_HARMONY_59 0xc14a 260 + #define USB_DEVICE_ID_LOGITECH_HARMONY_60 0xc14b 261 + #define USB_DEVICE_ID_LOGITECH_HARMONY_61 0xc14c 262 + #define USB_DEVICE_ID_LOGITECH_HARMONY_62 0xc14d 263 + #define USB_DEVICE_ID_LOGITECH_HARMONY_63 0xc14e 264 + #define USB_DEVICE_ID_LOGITECH_HARMONY_64 0xc14f 203 265 #define USB_DEVICE_ID_LOGITECH_WHEEL 0xc294 204 266 #define USB_DEVICE_ID_LOGITECH_KBD 0xc311 205 267 #define USB_DEVICE_ID_S510_RECEIVER 0xc50c ··· 286 220 #define USB_VENDOR_ID_NCR 0x0404 287 221 #define USB_DEVICE_ID_NCR_FIRST 0x0300 288 222 #define USB_DEVICE_ID_NCR_LAST 0x03ff 223 + 224 + #define USB_VENDOR_ID_NATIONAL_SEMICONDUCTOR 0x0400 225 + #define USB_DEVICE_ID_N_S_HARMONY 0xc359 289 226 290 227 #define USB_VENDOR_ID_NEC 0x073e 291 228 #define USB_DEVICE_ID_NEC_USB_GAME_PAD 0x0301 ··· 384 315 { USB_VENDOR_ID_AIPTEK, USB_DEVICE_ID_AIPTEK_24, HID_QUIRK_IGNORE }, 385 316 { USB_VENDOR_ID_AIRCABLE, USB_DEVICE_ID_AIRCABLE1, HID_QUIRK_IGNORE }, 386 317 { USB_VENDOR_ID_ALCOR, USB_DEVICE_ID_ALCOR_USBRS232, HID_QUIRK_IGNORE }, 387 - { USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IR, HID_QUIRK_IGNORE }, 318 + { USB_VENDOR_ID_ASUS, USB_DEVICE_ID_ASUS_LCM, HID_QUIRK_IGNORE}, 388 319 { USB_VENDOR_ID_BERKSHIRE, USB_DEVICE_ID_BERKSHIRE_PCWD, HID_QUIRK_IGNORE }, 389 320 { USB_VENDOR_ID_CIDC, 0x0103, HID_QUIRK_IGNORE }, 390 321 { USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_HIDCOM, HID_QUIRK_IGNORE }, ··· 532 463 533 464 { USB_VENDOR_ID_DELL, USB_DEVICE_ID_DELL_W7658, HID_QUIRK_RESET_LEDS }, 534 465 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_KBD, HID_QUIRK_RESET_LEDS }, 466 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY, HID_QUIRK_IGNORE }, 467 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_2, HID_QUIRK_IGNORE }, 468 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_3, HID_QUIRK_IGNORE }, 469 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_4, HID_QUIRK_IGNORE }, 470 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_5, HID_QUIRK_IGNORE }, 471 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_6, HID_QUIRK_IGNORE }, 472 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_7, HID_QUIRK_IGNORE }, 473 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_8, HID_QUIRK_IGNORE }, 474 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_9, HID_QUIRK_IGNORE }, 475 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_10, HID_QUIRK_IGNORE }, 476 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_11, HID_QUIRK_IGNORE }, 477 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_12, HID_QUIRK_IGNORE }, 478 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_13, HID_QUIRK_IGNORE }, 479 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_14, HID_QUIRK_IGNORE }, 480 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_15, HID_QUIRK_IGNORE }, 481 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_16, HID_QUIRK_IGNORE }, 482 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_17, HID_QUIRK_IGNORE }, 483 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_18, HID_QUIRK_IGNORE }, 484 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_19, HID_QUIRK_IGNORE }, 485 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_20, HID_QUIRK_IGNORE }, 486 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_21, HID_QUIRK_IGNORE }, 487 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_22, HID_QUIRK_IGNORE }, 488 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_23, HID_QUIRK_IGNORE }, 489 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_24, HID_QUIRK_IGNORE }, 490 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_25, HID_QUIRK_IGNORE }, 491 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_26, HID_QUIRK_IGNORE }, 492 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_27, HID_QUIRK_IGNORE }, 493 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_28, HID_QUIRK_IGNORE }, 494 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_29, HID_QUIRK_IGNORE }, 495 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_30, HID_QUIRK_IGNORE }, 496 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_31, HID_QUIRK_IGNORE }, 497 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_32, HID_QUIRK_IGNORE }, 498 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_33, HID_QUIRK_IGNORE }, 499 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_34, HID_QUIRK_IGNORE }, 500 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_35, HID_QUIRK_IGNORE }, 501 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_36, HID_QUIRK_IGNORE }, 502 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_37, HID_QUIRK_IGNORE }, 503 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_38, HID_QUIRK_IGNORE }, 504 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_39, HID_QUIRK_IGNORE }, 505 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_40, HID_QUIRK_IGNORE }, 506 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_41, HID_QUIRK_IGNORE }, 507 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_42, HID_QUIRK_IGNORE }, 508 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_43, HID_QUIRK_IGNORE }, 509 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_44, HID_QUIRK_IGNORE }, 510 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_45, HID_QUIRK_IGNORE }, 511 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_46, HID_QUIRK_IGNORE }, 512 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_47, HID_QUIRK_IGNORE }, 513 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_48, HID_QUIRK_IGNORE }, 514 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_49, HID_QUIRK_IGNORE }, 515 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_50, HID_QUIRK_IGNORE }, 516 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_51, HID_QUIRK_IGNORE }, 517 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_52, HID_QUIRK_IGNORE }, 518 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_53, HID_QUIRK_IGNORE }, 519 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_54, HID_QUIRK_IGNORE }, 520 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_55, HID_QUIRK_IGNORE }, 521 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_56, HID_QUIRK_IGNORE }, 522 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_57, HID_QUIRK_IGNORE }, 523 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_58, HID_QUIRK_IGNORE }, 524 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_59, HID_QUIRK_IGNORE }, 525 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_60, HID_QUIRK_IGNORE }, 526 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_61, HID_QUIRK_IGNORE }, 527 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_62, HID_QUIRK_IGNORE }, 528 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_63, HID_QUIRK_IGNORE }, 529 + { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_64, HID_QUIRK_IGNORE }, 530 + { USB_VENDOR_ID_NATIONAL_SEMICONDUCTOR, USB_DEVICE_ID_N_S_HARMONY, HID_QUIRK_IGNORE }, 535 531 536 532 { 0, 0 } 537 533 };
+1 -2
drivers/ide/arm/icside.c
··· 693 693 if (ret) 694 694 goto out; 695 695 696 - state = kmalloc(sizeof(struct icside_state), GFP_KERNEL); 696 + state = kzalloc(sizeof(struct icside_state), GFP_KERNEL); 697 697 if (!state) { 698 698 ret = -ENOMEM; 699 699 goto release; 700 700 } 701 701 702 - memset(state, 0, sizeof(state)); 703 702 state->type = ICS_TYPE_NOTYPE; 704 703 state->dev = &ec->dev; 705 704
+1 -1
drivers/ide/ide-tape.c
··· 640 640 } idetape_chrdev_direction_t; 641 641 642 642 struct idetape_bh { 643 - unsigned short b_size; 643 + u32 b_size; 644 644 atomic_t b_count; 645 645 struct idetape_bh *b_reqnext; 646 646 char *b_data;
+1 -1
drivers/ide/pci/alim15x3.c
··· 593 593 .ident = "HP Pavilion N5430", 594 594 .matches = { 595 595 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), 596 - DMI_MATCH(DMI_BOARD_NAME, "OmniBook N32N-736"), 596 + DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"), 597 597 }, 598 598 }, 599 599 { }
+2 -2
drivers/ide/pci/cmd64x.c
··· 475 475 switch (rev) { 476 476 case 0x07: 477 477 case 0x05: 478 - printk("%s: UltraDMA capable", name); 478 + printk("%s: UltraDMA capable\n", name); 479 479 break; 480 480 case 0x03: 481 481 default: 482 - printk("%s: MultiWord DMA force limited", name); 482 + printk("%s: MultiWord DMA force limited\n", name); 483 483 break; 484 484 case 0x01: 485 485 printk("%s: MultiWord DMA limited, "
+1 -1
drivers/ide/pci/cs5520.c
··· 133 133 static int cs5520_config_drive_xfer_rate(ide_drive_t *drive) 134 134 { 135 135 /* Tune the drive for PIO modes up to PIO 4 */ 136 - cs5520_tune_drive(drive, 4); 136 + cs5520_tune_drive(drive, 255); 137 137 138 138 /* Then tell the core to use DMA operations */ 139 139 return 0;
+18 -24
drivers/ide/pci/cs5535.c
··· 2 2 * linux/drivers/ide/pci/cs5535.c 3 3 * 4 4 * Copyright (C) 2004-2005 Advanced Micro Devices, Inc. 5 + * Copyright (C) 2007 Bartlomiej Zolnierkiewicz 5 6 * 6 7 * History: 7 8 * 09/20/2005 - Jaya Kumar <jayakumar.ide@gmail.com> ··· 84 83 85 84 /* Set the PIO timings */ 86 85 if ((speed & XFER_MODE) == XFER_PIO) { 87 - u8 pioa; 88 - u8 piob; 89 - u8 cmd; 86 + ide_drive_t *pair = &drive->hwif->drives[drive->dn ^ 1]; 87 + u8 cmd, pioa; 90 88 91 - pioa = speed - XFER_PIO_0; 92 - piob = ide_get_best_pio_mode(&(drive->hwif->drives[!unit]), 93 - 255, 4); 94 - cmd = pioa < piob ? pioa : piob; 89 + cmd = pioa = speed - XFER_PIO_0; 90 + 91 + if (pair->present) { 92 + u8 piob = ide_get_best_pio_mode(pair, 255, 4); 93 + 94 + if (piob < cmd) 95 + cmd = piob; 96 + } 95 97 96 98 /* Write the speed of the current drive */ 97 99 reg = (cs5535_pio_cmd_timings[cmd] << 16) | ··· 120 116 121 117 reg &= 0x80000000UL; /* Preserve the PIO format bit */ 122 118 123 - if (speed >= XFER_UDMA_0 && speed <= XFER_UDMA_7) 119 + if (speed >= XFER_UDMA_0 && speed <= XFER_UDMA_4) 124 120 reg |= cs5535_udma_timings[speed - XFER_UDMA_0]; 125 121 else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) 126 122 reg |= cs5535_mwdma_timings[speed - XFER_MW_DMA_0]; ··· 155 151 * 156 152 * A callback from the upper layers for PIO-only tuning. 157 153 */ 158 - static void cs5535_tuneproc(ide_drive_t *drive, u8 xferspeed) 154 + static void cs5535_tuneproc(ide_drive_t *drive, u8 pio) 159 155 { 160 - u8 modes[] = { XFER_PIO_0, XFER_PIO_1, XFER_PIO_2, XFER_PIO_3, 161 - XFER_PIO_4 }; 162 - 163 - /* cs5535 max pio is pio 4, best_pio will check the blacklist. 164 - i think we don't need to rate_filter the incoming xferspeed 165 - since we know we're only going to choose pio */ 166 - xferspeed = ide_get_best_pio_mode(drive, xferspeed, 4); 167 - ide_config_drive_speed(drive, modes[xferspeed]); 168 - cs5535_set_speed(drive, xferspeed); 156 + pio = ide_get_best_pio_mode(drive, pio, 4); 157 + ide_config_drive_speed(drive, XFER_PIO_0 + pio); 158 + cs5535_set_speed(drive, XFER_PIO_0 + pio); 169 159 } 170 160 171 161 static int cs5535_dma_check(ide_drive_t *drive) 172 162 { 173 - u8 speed; 174 - 175 163 drive->init_speed = 0; 176 164 177 165 if (ide_tune_dma(drive)) 178 166 return 0; 179 167 180 - if (ide_use_fast_pio(drive)) { 181 - speed = ide_get_best_pio_mode(drive, 255, 4); 182 - cs5535_set_drive(drive, speed); 183 - } 168 + if (ide_use_fast_pio(drive)) 169 + cs5535_tuneproc(drive, 255); 184 170 185 171 return -1; 186 172 }
+17 -16
drivers/ide/pci/it8213.c
··· 21 21 * it8213_dma_2_pio - return the PIO mode matching DMA 22 22 * @xfer_rate: transfer speed 23 23 * 24 - * Returns the nearest equivalent PIO timing for the PIO or DMA 24 + * Returns the nearest equivalent PIO timing for the DMA 25 25 * mode requested by the controller. 26 26 */ 27 27 ··· 35 35 case XFER_UDMA_1: 36 36 case XFER_UDMA_0: 37 37 case XFER_MW_DMA_2: 38 - case XFER_PIO_4: 39 38 return 4; 40 39 case XFER_MW_DMA_1: 41 - case XFER_PIO_3: 42 40 return 3; 43 41 case XFER_SW_DMA_2: 44 - case XFER_PIO_2: 45 42 return 2; 46 43 case XFER_MW_DMA_0: 47 44 case XFER_SW_DMA_1: 48 45 case XFER_SW_DMA_0: 49 - case XFER_PIO_1: 50 - case XFER_PIO_0: 51 - case XFER_PIO_SLOW: 52 46 default: 53 47 return 0; 54 48 } 55 49 } 56 50 57 51 /* 58 - * it8213_tuneproc - tune a drive 52 + * it8213_tune_pio - tune a drive 59 53 * @drive: drive to tune 60 54 * @pio: desired PIO mode 61 55 * 62 56 * Set the interface PIO mode. 63 57 */ 64 58 65 - static void it8213_tuneproc (ide_drive_t *drive, u8 pio) 59 + static void it8213_tune_pio(ide_drive_t *drive, const u8 pio) 66 60 { 67 61 ide_hwif_t *hwif = HWIF(drive); 68 62 struct pci_dev *dev = hwif->pci_dev; ··· 75 81 { 1, 0 }, 76 82 { 2, 1 }, 77 83 { 2, 3 }, }; 78 - 79 - pio = ide_get_best_pio_mode(drive, pio, 4); 80 84 81 85 spin_lock_irqsave(&tune_lock, flags); 82 86 pci_read_config_word(dev, master_port, &master_data); ··· 103 111 if (is_slave) 104 112 pci_write_config_byte(dev, slave_port, slave_data); 105 113 spin_unlock_irqrestore(&tune_lock, flags); 114 + } 115 + 116 + static void it8213_tuneproc(ide_drive_t *drive, u8 pio) 117 + { 118 + pio = ide_get_best_pio_mode(drive, pio, 4); 119 + it8213_tune_pio(drive, pio); 120 + ide_config_drive_speed(drive, XFER_PIO_0 + pio); 106 121 } 107 122 108 123 /** ··· 192 193 if (reg55 & w_flag) 193 194 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); 194 195 } 195 - it8213_tuneproc(drive, it8213_dma_2_pio(speed)); 196 + 197 + if (speed > XFER_PIO_4) 198 + it8213_tune_pio(drive, it8213_dma_2_pio(speed)); 199 + else 200 + it8213_tune_pio(drive, speed - XFER_PIO_0); 201 + 196 202 return ide_config_drive_speed(drive, speed); 197 203 } 198 204 ··· 213 209 214 210 static int it8213_config_drive_for_dma (ide_drive_t *drive) 215 211 { 216 - u8 pio; 217 - 218 212 if (ide_tune_dma(drive)) 219 213 return 0; 220 214 221 - pio = ide_get_best_pio_mode(drive, 255, 4); 222 - it8213_tune_chipset(drive, XFER_PIO_0 + pio); 215 + it8213_tuneproc(drive, 255); 223 216 224 217 return -1; 225 218 }
+4 -17
drivers/ide/pci/jmicron.c
··· 83 83 return ATA_CBL_PATA80; 84 84 } 85 85 86 - static void jmicron_tuneproc (ide_drive_t *drive, byte mode_wanted) 86 + static void jmicron_tuneproc(ide_drive_t *drive, u8 pio) 87 87 { 88 - return; 89 - } 90 - 91 - /** 92 - * config_jmicron_chipset_for_pio - set drive timings 93 - * @drive: drive to tune 94 - * @speed we want 95 - * 96 - */ 97 - 98 - static void config_jmicron_chipset_for_pio (ide_drive_t *drive, byte set_speed) 99 - { 100 - u8 speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5); 101 - if (set_speed) 102 - (void) ide_config_drive_speed(drive, speed); 88 + pio = ide_get_best_pio_mode(drive, pio, 5); 89 + ide_config_drive_speed(drive, XFER_PIO_0 + pio); 103 90 } 104 91 105 92 /** ··· 119 132 if (ide_tune_dma(drive)) 120 133 return 0; 121 134 122 - config_jmicron_chipset_for_pio(drive, 1); 135 + jmicron_tuneproc(drive, 255); 123 136 124 137 return -1; 125 138 }
+8 -9
drivers/ide/pci/piix.c
··· 1 1 /* 2 - * linux/drivers/ide/pci/piix.c Version 0.50 Jun 10, 2007 2 + * linux/drivers/ide/pci/piix.c Version 0.51 Jul 6, 2007 3 3 * 4 4 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer 5 5 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> ··· 109 109 * piix_dma_2_pio - return the PIO mode matching DMA 110 110 * @xfer_rate: transfer speed 111 111 * 112 - * Returns the nearest equivalent PIO timing for the PIO or DMA 112 + * Returns the nearest equivalent PIO timing for the DMA 113 113 * mode requested by the controller. 114 114 */ 115 115 ··· 123 123 case XFER_UDMA_1: 124 124 case XFER_UDMA_0: 125 125 case XFER_MW_DMA_2: 126 - case XFER_PIO_4: 127 126 return 4; 128 127 case XFER_MW_DMA_1: 129 - case XFER_PIO_3: 130 128 return 3; 131 129 case XFER_SW_DMA_2: 132 - case XFER_PIO_2: 133 130 return 2; 134 131 case XFER_MW_DMA_0: 135 132 case XFER_SW_DMA_1: 136 133 case XFER_SW_DMA_0: 137 - case XFER_PIO_1: 138 - case XFER_PIO_0: 139 - case XFER_PIO_SLOW: 140 134 default: 141 135 return 0; 142 136 } ··· 263 269 case XFER_PIO_4: 264 270 case XFER_PIO_3: 265 271 case XFER_PIO_2: 272 + case XFER_PIO_1: 266 273 case XFER_PIO_0: break; 267 274 default: return -1; 268 275 } ··· 294 299 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); 295 300 } 296 301 297 - piix_tune_pio(drive, piix_dma_2_pio(speed)); 302 + if (speed > XFER_PIO_4) 303 + piix_tune_pio(drive, piix_dma_2_pio(speed)); 304 + else 305 + piix_tune_pio(drive, speed - XFER_PIO_0); 306 + 298 307 return ide_config_drive_speed(drive, speed); 299 308 } 300 309
+20 -41
drivers/ide/pci/scc_pata.c
··· 190 190 } 191 191 192 192 /** 193 - * scc_tuneproc - tune a drive PIO mode 193 + * scc_tune_pio - tune a drive PIO mode 194 194 * @drive: drive to tune 195 195 * @mode_wanted: the target operating mode 196 196 * ··· 198 198 * controller. 199 199 */ 200 200 201 - static void scc_tuneproc(ide_drive_t *drive, byte mode_wanted) 201 + static void scc_tune_pio(ide_drive_t *drive, const u8 pio) 202 202 { 203 203 ide_hwif_t *hwif = HWIF(drive); 204 204 struct scc_ports *ports = ide_get_hwifdata(hwif); ··· 207 207 unsigned long piosht_port = ctl_base + 0x000; 208 208 unsigned long pioct_port = ctl_base + 0x004; 209 209 unsigned long reg; 210 - unsigned char speed = XFER_PIO_0; 211 210 int offset; 212 - 213 - mode_wanted = ide_get_best_pio_mode(drive, mode_wanted, 4); 214 - switch (mode_wanted) { 215 - case 4: 216 - speed = XFER_PIO_4; 217 - break; 218 - case 3: 219 - speed = XFER_PIO_3; 220 - break; 221 - case 2: 222 - speed = XFER_PIO_2; 223 - break; 224 - case 1: 225 - speed = XFER_PIO_1; 226 - break; 227 - case 0: 228 - default: 229 - speed = XFER_PIO_0; 230 - break; 231 - } 232 211 233 212 reg = in_be32((void __iomem *)cckctrl_port); 234 213 if (reg & CCKCTRL_ATACLKOEN) { ··· 215 236 } else { 216 237 offset = 0; /* 100MHz */ 217 238 } 218 - reg = JCHSTtbl[offset][mode_wanted] << 16 | JCHHTtbl[offset][mode_wanted]; 239 + reg = JCHSTtbl[offset][pio] << 16 | JCHHTtbl[offset][pio]; 219 240 out_be32((void __iomem *)piosht_port, reg); 220 - reg = JCHCTtbl[offset][mode_wanted]; 241 + reg = JCHCTtbl[offset][pio]; 221 242 out_be32((void __iomem *)pioct_port, reg); 243 + } 222 244 223 - ide_config_drive_speed(drive, speed); 245 + static void scc_tuneproc(ide_drive_t *drive, u8 pio) 246 + { 247 + pio = ide_get_best_pio_mode(drive, pio, 4); 248 + scc_tune_pio(drive, pio); 249 + ide_config_drive_speed(drive, XFER_PIO_0 + pio); 224 250 } 225 251 226 252 /** ··· 264 280 265 281 switch (speed) { 266 282 case XFER_UDMA_6: 267 - idx = 6; 268 - break; 269 283 case XFER_UDMA_5: 270 - idx = 5; 271 - break; 272 284 case XFER_UDMA_4: 273 - idx = 4; 274 - break; 275 285 case XFER_UDMA_3: 276 - idx = 3; 277 - break; 278 286 case XFER_UDMA_2: 279 - idx = 2; 280 - break; 281 287 case XFER_UDMA_1: 282 - idx = 1; 283 - break; 284 288 case XFER_UDMA_0: 285 - idx = 0; 289 + idx = speed - XFER_UDMA_0; 286 290 break; 291 + case XFER_PIO_4: 292 + case XFER_PIO_3: 293 + case XFER_PIO_2: 294 + case XFER_PIO_1: 295 + case XFER_PIO_0: 296 + scc_tune_pio(drive, speed - XFER_PIO_0); 297 + return ide_config_drive_speed(drive, speed); 287 298 default: 288 299 return 1; 289 300 } ··· 308 329 * required. 309 330 * If the drive isn't suitable for DMA or we hit other problems 310 331 * then we will drop down to PIO and set up PIO appropriately. 311 - * (return 1) 332 + * (return -1) 312 333 */ 313 334 314 335 static int scc_config_drive_for_dma(ide_drive_t *drive) ··· 317 338 return 0; 318 339 319 340 if (ide_use_fast_pio(drive)) 320 - scc_tuneproc(drive, 4); 341 + scc_tuneproc(drive, 255); 321 342 322 343 return -1; 323 344 }
+1
drivers/ide/pci/sis5513.c
··· 801 801 static const struct sis_laptop sis_laptop[] = { 802 802 /* devid, subvendor, subdev */ 803 803 { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */ 804 + { 0x5513, 0x1734, 0x105f }, /* FSC Amilo A1630 */ 804 805 /* end marker */ 805 806 { 0, } 806 807 };
+7 -8
drivers/ide/pci/slc90e66.c
··· 1 1 /* 2 - * linux/drivers/ide/pci/slc90e66.c Version 0.14 February 8, 2007 2 + * linux/drivers/ide/pci/slc90e66.c Version 0.15 Jul 6, 2007 3 3 * 4 4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 5 5 * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com> ··· 29 29 case XFER_UDMA_1: 30 30 case XFER_UDMA_0: 31 31 case XFER_MW_DMA_2: 32 - case XFER_PIO_4: 33 32 return 4; 34 33 case XFER_MW_DMA_1: 35 - case XFER_PIO_3: 36 34 return 3; 37 35 case XFER_SW_DMA_2: 38 - case XFER_PIO_2: 39 36 return 2; 40 37 case XFER_MW_DMA_0: 41 38 case XFER_SW_DMA_1: 42 39 case XFER_SW_DMA_0: 43 - case XFER_PIO_1: 44 - case XFER_PIO_0: 45 - case XFER_PIO_SLOW: 46 40 default: 47 41 return 0; 48 42 } ··· 130 136 case XFER_PIO_4: 131 137 case XFER_PIO_3: 132 138 case XFER_PIO_2: 139 + case XFER_PIO_1: 133 140 case XFER_PIO_0: break; 134 141 default: return -1; 135 142 } ··· 151 156 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed); 152 157 } 153 158 154 - slc90e66_tune_pio(drive, slc90e66_dma_2_pio(speed)); 159 + if (speed > XFER_PIO_4) 160 + slc90e66_tune_pio(drive, slc90e66_dma_2_pio(speed)); 161 + else 162 + slc90e66_tune_pio(drive, speed - XFER_PIO_0); 163 + 155 164 return ide_config_drive_speed(drive, speed); 156 165 } 157 166
+1 -1
drivers/pci/pci-driver.c
··· 310 310 /* restore the PCI config space */ 311 311 pci_restore_state(pci_dev); 312 312 /* if the device was enabled before suspend, reenable */ 313 - retval = __pci_reenable_device(pci_dev); 313 + retval = pci_reenable_device(pci_dev); 314 314 /* if the device was busmaster before the suspend, make it busmaster again */ 315 315 if (pci_dev->is_busmaster) 316 316 pci_set_master(pci_dev);
+3 -4
drivers/pci/pci.c
··· 695 695 } 696 696 697 697 /** 698 - * __pci_reenable_device - Resume abandoned device 698 + * pci_reenable_device - Resume abandoned device 699 699 * @dev: PCI device to be resumed 700 700 * 701 701 * Note this function is a backend of pci_default_resume and is not supposed 702 702 * to be called by normal code, write proper resume handler and use it instead. 703 703 */ 704 - int 705 - __pci_reenable_device(struct pci_dev *dev) 704 + int pci_reenable_device(struct pci_dev *dev) 706 705 { 707 706 if (atomic_read(&dev->enable_cnt)) 708 707 return do_pci_enable_device(dev, (1 << PCI_NUM_RESOURCES) - 1); ··· 1603 1604 device_initcall(pci_init); 1604 1605 1605 1606 EXPORT_SYMBOL_GPL(pci_restore_bars); 1606 - EXPORT_SYMBOL(__pci_reenable_device); 1607 + EXPORT_SYMBOL(pci_reenable_device); 1607 1608 EXPORT_SYMBOL(pci_enable_device_bars); 1608 1609 EXPORT_SYMBOL(pci_enable_device); 1609 1610 EXPORT_SYMBOL(pcim_enable_device);
+4 -6
drivers/scsi/ide-scsi.c
··· 328 328 u8 *buf; 329 329 330 330 /* stuff a sense request in front of our current request */ 331 - pc = kmalloc (sizeof (idescsi_pc_t), GFP_ATOMIC); 332 - rq = kmalloc (sizeof (struct request), GFP_ATOMIC); 333 - buf = kmalloc(SCSI_SENSE_BUFFERSIZE, GFP_ATOMIC); 334 - if (pc == NULL || rq == NULL || buf == NULL) { 331 + pc = kzalloc(sizeof(idescsi_pc_t), GFP_ATOMIC); 332 + rq = kmalloc(sizeof(struct request), GFP_ATOMIC); 333 + buf = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_ATOMIC); 334 + if (!pc || !rq || !buf) { 335 335 kfree(buf); 336 336 kfree(rq); 337 337 kfree(pc); 338 338 return -ENOMEM; 339 339 } 340 - memset (pc, 0, sizeof (idescsi_pc_t)); 341 - memset (buf, 0, SCSI_SENSE_BUFFERSIZE); 342 340 ide_init_drive_cmd(rq); 343 341 rq->special = (char *) pc; 344 342 pc->rq = rq;
+1 -1
include/asm-avr32/bug.h
··· 57 57 58 58 #define WARN_ON(condition) \ 59 59 ({ \ 60 - typeof(condition) __ret_warn_on = (condition); \ 60 + int __ret_warn_on = !!(condition); \ 61 61 if (unlikely(__ret_warn_on)) \ 62 62 _BUG_OR_WARN(BUGFLAG_WARNING); \ 63 63 unlikely(__ret_warn_on); \
+3
include/asm-frv/mb86943a.h
··· 36 36 #define __reg_MB86943_pci_sl_io_base *(volatile uint32_t *) (__region_CS1 + 0x70) 37 37 #define __reg_MB86943_pci_sl_mem_base *(volatile uint32_t *) (__region_CS1 + 0x78) 38 38 39 + #define __reg_MB86943_pci_arbiter *(volatile uint32_t *) (__region_CS2 + 0x01300014) 40 + #define MB86943_PCIARB_EN 0x00000001 41 + 39 42 #endif /* _ASM_MB86943A_H */
+1 -1
include/asm-parisc/bug.h
··· 74 74 75 75 76 76 #define WARN_ON(x) ({ \ 77 - typeof(x) __ret_warn_on = (x); \ 77 + int __ret_warn_on = !!(x); \ 78 78 if (__builtin_constant_p(__ret_warn_on)) { \ 79 79 if (__ret_warn_on) \ 80 80 __WARN(); \
+1 -1
include/asm-s390/bug.h
··· 50 50 #define BUG() __EMIT_BUG(0) 51 51 52 52 #define WARN_ON(x) ({ \ 53 - typeof(x) __ret_warn_on = (x); \ 53 + int __ret_warn_on = !!(x); \ 54 54 if (__builtin_constant_p(__ret_warn_on)) { \ 55 55 if (__ret_warn_on) \ 56 56 __EMIT_BUG(BUGFLAG_WARNING); \
+1 -1
include/asm-sh/bug.h
··· 61 61 } while (0) 62 62 63 63 #define WARN_ON(x) ({ \ 64 - typeof(x) __ret_warn_on = (x); \ 64 + int __ret_warn_on = !!(x); \ 65 65 if (__builtin_constant_p(__ret_warn_on)) { \ 66 66 if (__ret_warn_on) \ 67 67 __WARN(); \
+1 -1
include/linux/pci.h
··· 534 534 535 535 int __must_check pci_enable_device(struct pci_dev *dev); 536 536 int __must_check pci_enable_device_bars(struct pci_dev *dev, int mask); 537 - int __must_check __pci_reenable_device(struct pci_dev *); 537 + int __must_check pci_reenable_device(struct pci_dev *); 538 538 int __must_check pcim_enable_device(struct pci_dev *pdev); 539 539 void pcim_pin_device(struct pci_dev *pdev); 540 540
+15 -11
include/linux/sched.h
··· 734 734 unsigned long max_interval; /* Maximum balance interval ms */ 735 735 unsigned int busy_factor; /* less balancing by factor if busy */ 736 736 unsigned int imbalance_pct; /* No balance until over watermark */ 737 - unsigned long long cache_hot_time; /* Task considered cache hot (ns) */ 738 737 unsigned int cache_nice_tries; /* Leave cache hot tasks for # tries */ 739 738 unsigned int busy_idx; 740 739 unsigned int idle_idx; ··· 874 875 875 876 void (*set_curr_task) (struct rq *rq); 876 877 void (*task_tick) (struct rq *rq, struct task_struct *p); 877 - void (*task_new) (struct rq *rq, struct task_struct *p); 878 + void (*task_new) (struct rq *rq, struct task_struct *p, u64 now); 878 879 }; 879 880 880 881 struct load_weight { ··· 904 905 struct rb_node run_node; 905 906 unsigned int on_rq; 906 907 907 - u64 wait_start_fair; 908 - u64 wait_start; 909 908 u64 exec_start; 910 - u64 sleep_start; 909 + u64 sum_exec_runtime; 910 + u64 wait_start_fair; 911 911 u64 sleep_start_fair; 912 - u64 block_start; 912 + 913 + #ifdef CONFIG_SCHEDSTATS 914 + u64 wait_start; 915 + u64 wait_max; 916 + s64 sum_wait_runtime; 917 + 918 + u64 sleep_start; 913 919 u64 sleep_max; 920 + s64 sum_sleep_runtime; 921 + 922 + u64 block_start; 914 923 u64 block_max; 915 924 u64 exec_max; 916 - u64 wait_max; 917 - u64 last_ran; 918 925 919 - u64 sum_exec_runtime; 920 - s64 sum_wait_runtime; 921 - s64 sum_sleep_runtime; 922 926 unsigned long wait_runtime_overruns; 923 927 unsigned long wait_runtime_underruns; 928 + #endif 929 + 924 930 #ifdef CONFIG_FAIR_GROUP_SCHED 925 931 struct sched_entity *parent; 926 932 /* rq on which this entity is (to be) queued: */
-1
include/linux/topology.h
··· 185 185 .max_interval = 64*num_online_cpus(), \ 186 186 .busy_factor = 128, \ 187 187 .imbalance_pct = 133, \ 188 - .cache_hot_time = (10*1000000), \ 189 188 .cache_nice_tries = 1, \ 190 189 .busy_idx = 3, \ 191 190 .idle_idx = 3, \
+2
include/net/netlabel.h
··· 132 132 #define NETLBL_SECATTR_CACHE 0x00000002 133 133 #define NETLBL_SECATTR_MLS_LVL 0x00000004 134 134 #define NETLBL_SECATTR_MLS_CAT 0x00000008 135 + #define NETLBL_SECATTR_CACHEABLE (NETLBL_SECATTR_MLS_LVL | \ 136 + NETLBL_SECATTR_MLS_CAT) 135 137 struct netlbl_lsm_secattr { 136 138 u32 flags; 137 139
+9
kernel/irq/resend.c
··· 62 62 */ 63 63 desc->chip->enable(irq); 64 64 65 + /* 66 + * Temporary hack to figure out more about the problem, which 67 + * is causing the ancient network cards to die. 68 + */ 69 + if (desc->handle_irq != handle_edge_irq) { 70 + WARN_ON_ONCE(1); 71 + return; 72 + } 73 + 65 74 if ((status & (IRQ_PENDING | IRQ_REPLAY)) == IRQ_PENDING) { 66 75 desc->status = (status & ~IRQ_PENDING) | IRQ_REPLAY; 67 76
+96 -99
kernel/sched.c
··· 637 637 638 638 #define WMULT_SHIFT 32 639 639 640 - static inline unsigned long 640 + static unsigned long 641 641 calc_delta_mine(unsigned long delta_exec, unsigned long weight, 642 642 struct load_weight *lw) 643 643 { ··· 657 657 tmp = (tmp * lw->inv_weight) >> WMULT_SHIFT; 658 658 } 659 659 660 - return (unsigned long)min(tmp, (u64)sysctl_sched_runtime_limit); 660 + return (unsigned long)min(tmp, (u64)(unsigned long)LONG_MAX); 661 661 } 662 662 663 663 static inline unsigned long ··· 678 678 lw->inv_weight = 0; 679 679 } 680 680 681 - static void __update_curr_load(struct rq *rq, struct load_stat *ls) 682 - { 683 - if (rq->curr != rq->idle && ls->load.weight) { 684 - ls->delta_exec += ls->delta_stat; 685 - ls->delta_fair += calc_delta_fair(ls->delta_stat, &ls->load); 686 - ls->delta_stat = 0; 687 - } 688 - } 689 - 690 - /* 691 - * Update delta_exec, delta_fair fields for rq. 692 - * 693 - * delta_fair clock advances at a rate inversely proportional to 694 - * total load (rq->ls.load.weight) on the runqueue, while 695 - * delta_exec advances at the same rate as wall-clock (provided 696 - * cpu is not idle). 697 - * 698 - * delta_exec / delta_fair is a measure of the (smoothened) load on this 699 - * runqueue over any given interval. This (smoothened) load is used 700 - * during load balance. 701 - * 702 - * This function is called /before/ updating rq->ls.load 703 - * and when switching tasks. 704 - */ 705 - static void update_curr_load(struct rq *rq, u64 now) 706 - { 707 - struct load_stat *ls = &rq->ls; 708 - u64 start; 709 - 710 - start = ls->load_update_start; 711 - ls->load_update_start = now; 712 - ls->delta_stat += now - start; 713 - /* 714 - * Stagger updates to ls->delta_fair. Very frequent updates 715 - * can be expensive. 716 - */ 717 - if (ls->delta_stat >= sysctl_sched_stat_granularity) 718 - __update_curr_load(rq, ls); 719 - } 720 - 721 681 /* 722 682 * To aid in avoiding the subversion of "niceness" due to uneven distribution 723 683 * of tasks with abnormal "nice" values across CPUs the contribution that ··· 686 726 * scaled version of the new time slice allocation that they receive on time 687 727 * slice expiry etc. 688 728 */ 689 - 690 - /* 691 - * Assume: static_prio_timeslice(NICE_TO_PRIO(0)) == DEF_TIMESLICE 692 - * If static_prio_timeslice() is ever changed to break this assumption then 693 - * this code will need modification 694 - */ 695 - #define TIME_SLICE_NICE_ZERO DEF_TIMESLICE 696 - #define load_weight(lp) \ 697 - (((lp) * SCHED_LOAD_SCALE) / TIME_SLICE_NICE_ZERO) 698 - #define PRIO_TO_LOAD_WEIGHT(prio) \ 699 - load_weight(static_prio_timeslice(prio)) 700 - #define RTPRIO_TO_LOAD_WEIGHT(rp) \ 701 - (PRIO_TO_LOAD_WEIGHT(MAX_RT_PRIO) + load_weight(rp)) 702 729 703 730 #define WEIGHT_IDLEPRIO 2 704 731 #define WMULT_IDLEPRIO (1 << 31) ··· 728 781 /* 15 */ 119304647, 148102320, 186737708, 238609294, 286331153, 729 782 }; 730 783 731 - static inline void 732 - inc_load(struct rq *rq, const struct task_struct *p, u64 now) 733 - { 734 - update_curr_load(rq, now); 735 - update_load_add(&rq->ls.load, p->se.load.weight); 736 - } 737 - 738 - static inline void 739 - dec_load(struct rq *rq, const struct task_struct *p, u64 now) 740 - { 741 - update_curr_load(rq, now); 742 - update_load_sub(&rq->ls.load, p->se.load.weight); 743 - } 744 - 745 - static inline void inc_nr_running(struct task_struct *p, struct rq *rq, u64 now) 746 - { 747 - rq->nr_running++; 748 - inc_load(rq, p, now); 749 - } 750 - 751 - static inline void dec_nr_running(struct task_struct *p, struct rq *rq, u64 now) 752 - { 753 - rq->nr_running--; 754 - dec_load(rq, p, now); 755 - } 756 - 757 784 static void activate_task(struct rq *rq, struct task_struct *p, int wakeup); 758 785 759 786 /* ··· 757 836 #endif 758 837 759 838 #define sched_class_highest (&rt_sched_class) 839 + 840 + static void __update_curr_load(struct rq *rq, struct load_stat *ls) 841 + { 842 + if (rq->curr != rq->idle && ls->load.weight) { 843 + ls->delta_exec += ls->delta_stat; 844 + ls->delta_fair += calc_delta_fair(ls->delta_stat, &ls->load); 845 + ls->delta_stat = 0; 846 + } 847 + } 848 + 849 + /* 850 + * Update delta_exec, delta_fair fields for rq. 851 + * 852 + * delta_fair clock advances at a rate inversely proportional to 853 + * total load (rq->ls.load.weight) on the runqueue, while 854 + * delta_exec advances at the same rate as wall-clock (provided 855 + * cpu is not idle). 856 + * 857 + * delta_exec / delta_fair is a measure of the (smoothened) load on this 858 + * runqueue over any given interval. This (smoothened) load is used 859 + * during load balance. 860 + * 861 + * This function is called /before/ updating rq->ls.load 862 + * and when switching tasks. 863 + */ 864 + static void update_curr_load(struct rq *rq, u64 now) 865 + { 866 + struct load_stat *ls = &rq->ls; 867 + u64 start; 868 + 869 + start = ls->load_update_start; 870 + ls->load_update_start = now; 871 + ls->delta_stat += now - start; 872 + /* 873 + * Stagger updates to ls->delta_fair. Very frequent updates 874 + * can be expensive. 875 + */ 876 + if (ls->delta_stat >= sysctl_sched_stat_granularity) 877 + __update_curr_load(rq, ls); 878 + } 879 + 880 + static inline void 881 + inc_load(struct rq *rq, const struct task_struct *p, u64 now) 882 + { 883 + update_curr_load(rq, now); 884 + update_load_add(&rq->ls.load, p->se.load.weight); 885 + } 886 + 887 + static inline void 888 + dec_load(struct rq *rq, const struct task_struct *p, u64 now) 889 + { 890 + update_curr_load(rq, now); 891 + update_load_sub(&rq->ls.load, p->se.load.weight); 892 + } 893 + 894 + static void inc_nr_running(struct task_struct *p, struct rq *rq, u64 now) 895 + { 896 + rq->nr_running++; 897 + inc_load(rq, p, now); 898 + } 899 + 900 + static void dec_nr_running(struct task_struct *p, struct rq *rq, u64 now) 901 + { 902 + rq->nr_running--; 903 + dec_load(rq, p, now); 904 + } 760 905 761 906 static void set_load_weight(struct task_struct *p) 762 907 { ··· 983 996 u64 clock_offset, fair_clock_offset; 984 997 985 998 clock_offset = old_rq->clock - new_rq->clock; 986 - fair_clock_offset = old_rq->cfs.fair_clock - 987 - new_rq->cfs.fair_clock; 988 - if (p->se.wait_start) 989 - p->se.wait_start -= clock_offset; 999 + fair_clock_offset = old_rq->cfs.fair_clock - new_rq->cfs.fair_clock; 1000 + 990 1001 if (p->se.wait_start_fair) 991 1002 p->se.wait_start_fair -= fair_clock_offset; 1003 + if (p->se.sleep_start_fair) 1004 + p->se.sleep_start_fair -= fair_clock_offset; 1005 + 1006 + #ifdef CONFIG_SCHEDSTATS 1007 + if (p->se.wait_start) 1008 + p->se.wait_start -= clock_offset; 992 1009 if (p->se.sleep_start) 993 1010 p->se.sleep_start -= clock_offset; 994 1011 if (p->se.block_start) 995 1012 p->se.block_start -= clock_offset; 996 - if (p->se.sleep_start_fair) 997 - p->se.sleep_start_fair -= fair_clock_offset; 1013 + #endif 998 1014 999 1015 __set_task_cpu(p, new_cpu); 1000 1016 } ··· 1558 1568 static void __sched_fork(struct task_struct *p) 1559 1569 { 1560 1570 p->se.wait_start_fair = 0; 1561 - p->se.wait_start = 0; 1562 1571 p->se.exec_start = 0; 1563 1572 p->se.sum_exec_runtime = 0; 1564 1573 p->se.delta_exec = 0; 1565 1574 p->se.delta_fair_run = 0; 1566 1575 p->se.delta_fair_sleep = 0; 1567 1576 p->se.wait_runtime = 0; 1577 + p->se.sleep_start_fair = 0; 1578 + 1579 + #ifdef CONFIG_SCHEDSTATS 1580 + p->se.wait_start = 0; 1568 1581 p->se.sum_wait_runtime = 0; 1569 1582 p->se.sum_sleep_runtime = 0; 1570 1583 p->se.sleep_start = 0; 1571 - p->se.sleep_start_fair = 0; 1572 1584 p->se.block_start = 0; 1573 1585 p->se.sleep_max = 0; 1574 1586 p->se.block_max = 0; ··· 1578 1586 p->se.wait_max = 0; 1579 1587 p->se.wait_runtime_overruns = 0; 1580 1588 p->se.wait_runtime_underruns = 0; 1589 + #endif 1581 1590 1582 1591 INIT_LIST_HEAD(&p->run_list); 1583 1592 p->se.on_rq = 0; ··· 1647 1654 unsigned long flags; 1648 1655 struct rq *rq; 1649 1656 int this_cpu; 1657 + u64 now; 1650 1658 1651 1659 rq = task_rq_lock(p, &flags); 1652 1660 BUG_ON(p->state != TASK_RUNNING); 1653 1661 this_cpu = smp_processor_id(); /* parent's CPU */ 1662 + now = rq_clock(rq); 1654 1663 1655 1664 p->prio = effective_prio(p); 1656 1665 1657 - if (!sysctl_sched_child_runs_first || (clone_flags & CLONE_VM) || 1658 - task_cpu(p) != this_cpu || !current->se.on_rq) { 1666 + if (!p->sched_class->task_new || !sysctl_sched_child_runs_first || 1667 + (clone_flags & CLONE_VM) || task_cpu(p) != this_cpu || 1668 + !current->se.on_rq) { 1669 + 1659 1670 activate_task(rq, p, 0); 1660 1671 } else { 1661 1672 /* 1662 1673 * Let the scheduling class do new task startup 1663 1674 * management (if any): 1664 1675 */ 1665 - p->sched_class->task_new(rq, p); 1676 + p->sched_class->task_new(rq, p, now); 1677 + inc_nr_running(p, rq, now); 1666 1678 } 1667 1679 check_preempt_curr(rq, p); 1668 1680 task_rq_unlock(rq, &flags); ··· 2906 2908 schedstat_inc(sd, alb_cnt); 2907 2909 2908 2910 if (move_tasks(target_rq, target_cpu, busiest_rq, 1, 2909 - RTPRIO_TO_LOAD_WEIGHT(100), sd, CPU_IDLE, 2910 - NULL)) 2911 + ULONG_MAX, sd, CPU_IDLE, NULL)) 2911 2912 schedstat_inc(sd, alb_pushed); 2912 2913 else 2913 2914 schedstat_inc(sd, alb_failed); ··· 5266 5269 sizeof(int), 0644, proc_dointvec_minmax); 5267 5270 set_table_entry(&table[8], 9, "imbalance_pct", &sd->imbalance_pct, 5268 5271 sizeof(int), 0644, proc_dointvec_minmax); 5269 - set_table_entry(&table[9], 10, "cache_hot_time", &sd->cache_hot_time, 5270 - sizeof(long long), 0644, proc_doulongvec_minmax); 5271 5272 set_table_entry(&table[10], 11, "cache_nice_tries", 5272 5273 &sd->cache_nice_tries, 5273 5274 sizeof(int), 0644, proc_dointvec_minmax); ··· 6585 6590 do_each_thread(g, p) { 6586 6591 p->se.fair_key = 0; 6587 6592 p->se.wait_runtime = 0; 6588 - p->se.wait_start_fair = 0; 6589 - p->se.wait_start = 0; 6590 6593 p->se.exec_start = 0; 6591 - p->se.sleep_start = 0; 6594 + p->se.wait_start_fair = 0; 6592 6595 p->se.sleep_start_fair = 0; 6596 + #ifdef CONFIG_SCHEDSTATS 6597 + p->se.wait_start = 0; 6598 + p->se.sleep_start = 0; 6593 6599 p->se.block_start = 0; 6600 + #endif 6594 6601 task_rq(p)->cfs.fair_clock = 0; 6595 6602 task_rq(p)->clock = 0; 6596 6603
+16 -6
kernel/sched_debug.c
··· 44 44 (long long)p->se.wait_runtime, 45 45 (long long)(p->nvcsw + p->nivcsw), 46 46 p->prio, 47 + #ifdef CONFIG_SCHEDSTATS 47 48 (long long)p->se.sum_exec_runtime, 48 49 (long long)p->se.sum_wait_runtime, 49 50 (long long)p->se.sum_sleep_runtime, 50 51 (long long)p->se.wait_runtime_overruns, 51 - (long long)p->se.wait_runtime_underruns); 52 + (long long)p->se.wait_runtime_underruns 53 + #else 54 + 0LL, 0LL, 0LL, 0LL, 0LL 55 + #endif 56 + ); 52 57 } 53 58 54 59 static void print_rq(struct seq_file *m, struct rq *rq, int rq_cpu, u64 now) ··· 176 171 u64 now = ktime_to_ns(ktime_get()); 177 172 int cpu; 178 173 179 - SEQ_printf(m, "Sched Debug Version: v0.05, %s %.*s\n", 174 + SEQ_printf(m, "Sched Debug Version: v0.05-v20, %s %.*s\n", 180 175 init_utsname()->release, 181 176 (int)strcspn(init_utsname()->version, " "), 182 177 init_utsname()->version); ··· 240 235 #define P(F) \ 241 236 SEQ_printf(m, "%-25s:%20Ld\n", #F, (long long)p->F) 242 237 243 - P(se.wait_start); 238 + P(se.wait_runtime); 244 239 P(se.wait_start_fair); 245 240 P(se.exec_start); 246 - P(se.sleep_start); 247 241 P(se.sleep_start_fair); 242 + P(se.sum_exec_runtime); 243 + 244 + #ifdef CONFIG_SCHEDSTATS 245 + P(se.wait_start); 246 + P(se.sleep_start); 248 247 P(se.block_start); 249 248 P(se.sleep_max); 250 249 P(se.block_max); 251 250 P(se.exec_max); 252 251 P(se.wait_max); 253 - P(se.wait_runtime); 254 252 P(se.wait_runtime_overruns); 255 253 P(se.wait_runtime_underruns); 256 254 P(se.sum_wait_runtime); 257 - P(se.sum_exec_runtime); 255 + #endif 258 256 SEQ_printf(m, "%-25s:%20Ld\n", 259 257 "nr_switches", (long long)(p->nvcsw + p->nivcsw)); 260 258 P(se.load.weight); ··· 277 269 278 270 void proc_sched_set_task(struct task_struct *p) 279 271 { 272 + #ifdef CONFIG_SCHEDSTATS 280 273 p->se.sleep_max = p->se.block_max = p->se.exec_max = p->se.wait_max = 0; 281 274 p->se.wait_runtime_overruns = p->se.wait_runtime_underruns = 0; 275 + #endif 282 276 p->se.sum_exec_runtime = 0; 283 277 }
+5 -16
kernel/sched_fair.c
··· 292 292 return; 293 293 294 294 delta_exec = curr->delta_exec; 295 - #ifdef CONFIG_SCHEDSTATS 296 - if (unlikely(delta_exec > curr->exec_max)) 297 - curr->exec_max = delta_exec; 298 - #endif 295 + schedstat_set(curr->exec_max, max((u64)delta_exec, curr->exec_max)); 299 296 300 297 curr->sum_exec_runtime += delta_exec; 301 298 cfs_rq->exec_clock += delta_exec; ··· 349 352 update_stats_wait_start(struct cfs_rq *cfs_rq, struct sched_entity *se, u64 now) 350 353 { 351 354 se->wait_start_fair = cfs_rq->fair_clock; 352 - se->wait_start = now; 355 + schedstat_set(se->wait_start, now); 353 356 } 354 357 355 358 /* ··· 422 425 { 423 426 unsigned long delta_fair = se->delta_fair_run; 424 427 425 - #ifdef CONFIG_SCHEDSTATS 426 - { 427 - s64 delta_wait = now - se->wait_start; 428 - if (unlikely(delta_wait > se->wait_max)) 429 - se->wait_max = delta_wait; 430 - } 431 - #endif 428 + schedstat_set(se->wait_max, max(se->wait_max, now - se->wait_start)); 432 429 433 430 if (unlikely(se->load.weight != NICE_0_LOAD)) 434 431 delta_fair = calc_weighted(delta_fair, se->load.weight, ··· 447 456 } 448 457 449 458 se->wait_start_fair = 0; 450 - se->wait_start = 0; 459 + schedstat_set(se->wait_start, 0); 451 460 } 452 461 453 462 static inline void ··· 1032 1041 * monopolize the CPU. Note: the parent runqueue is locked, 1033 1042 * the child is not running yet. 1034 1043 */ 1035 - static void task_new_fair(struct rq *rq, struct task_struct *p) 1044 + static void task_new_fair(struct rq *rq, struct task_struct *p, u64 now) 1036 1045 { 1037 1046 struct cfs_rq *cfs_rq = task_cfs_rq(p); 1038 1047 struct sched_entity *se = &p->se; 1039 - u64 now = rq_clock(rq); 1040 1048 1041 1049 sched_info_queued(p); 1042 1050 ··· 1062 1072 p->se.wait_runtime = -(sysctl_sched_granularity / 2); 1063 1073 1064 1074 __enqueue_entity(cfs_rq, se); 1065 - inc_nr_running(p, rq, now); 1066 1075 } 1067 1076 1068 1077 #ifdef CONFIG_FAIR_GROUP_SCHED
+2 -12
kernel/sched_rt.c
··· 18 18 delta_exec = now - curr->se.exec_start; 19 19 if (unlikely((s64)delta_exec < 0)) 20 20 delta_exec = 0; 21 - if (unlikely(delta_exec > curr->se.exec_max)) 22 - curr->se.exec_max = delta_exec; 21 + 22 + schedstat_set(curr->se.exec_max, max(curr->se.exec_max, delta_exec)); 23 23 24 24 curr->se.sum_exec_runtime += delta_exec; 25 25 curr->se.exec_start = now; ··· 229 229 requeue_task_rt(rq, p); 230 230 } 231 231 232 - /* 233 - * No parent/child timeslice management necessary for RT tasks, 234 - * just activate them: 235 - */ 236 - static void task_new_rt(struct rq *rq, struct task_struct *p) 237 - { 238 - activate_task(rq, p, 1); 239 - } 240 - 241 232 static struct sched_class rt_sched_class __read_mostly = { 242 233 .enqueue_task = enqueue_task_rt, 243 234 .dequeue_task = dequeue_task_rt, ··· 242 251 .load_balance = load_balance_rt, 243 252 244 253 .task_tick = task_tick_rt, 245 - .task_new = task_new_rt, 246 254 };
+2
kernel/sched_stats.h
··· 116 116 } 117 117 # define schedstat_inc(rq, field) do { (rq)->field++; } while (0) 118 118 # define schedstat_add(rq, field, amt) do { (rq)->field += (amt); } while (0) 119 + # define schedstat_set(var, val) do { var = (val); } while (0) 119 120 #else /* !CONFIG_SCHEDSTATS */ 120 121 static inline void 121 122 rq_sched_info_arrive(struct rq *rq, unsigned long long delta) ··· 126 125 {} 127 126 # define schedstat_inc(rq, field) do { } while (0) 128 127 # define schedstat_add(rq, field, amt) do { } while (0) 128 + # define schedstat_set(var, val) do { } while (0) 129 129 #endif 130 130 131 131 #if defined(CONFIG_SCHEDSTATS) || defined(CONFIG_TASK_DELAY_ACCT)
+3 -1
net/netlabel/netlabel_user.c
··· 113 113 if (audit_info->secid != 0 && 114 114 security_secid_to_secctx(audit_info->secid, 115 115 &secctx, 116 - &secctx_len) == 0) 116 + &secctx_len) == 0) { 117 117 audit_log_format(audit_buf, " subj=%s", secctx); 118 + security_release_secctx(secctx, secctx_len); 119 + } 118 120 119 121 return audit_buf; 120 122 }
+3 -2
net/xfrm/xfrm_policy.c
··· 2195 2195 } 2196 2196 2197 2197 if (sid != 0 && 2198 - security_secid_to_secctx(sid, &secctx, &secctx_len) == 0) 2198 + security_secid_to_secctx(sid, &secctx, &secctx_len) == 0) { 2199 2199 audit_log_format(audit_buf, " subj=%s", secctx); 2200 - else 2200 + security_release_secctx(secctx, secctx_len); 2201 + } else 2201 2202 audit_log_task_context(audit_buf); 2202 2203 2203 2204 if (xp) {
+1 -2
security/selinux/hooks.c
··· 4658 4658 4659 4659 static void selinux_release_secctx(char *secdata, u32 seclen) 4660 4660 { 4661 - if (secdata) 4662 - kfree(secdata); 4661 + kfree(secdata); 4663 4662 } 4664 4663 4665 4664 #ifdef CONFIG_KEYS
+12 -4
security/selinux/netlabel.c
··· 162 162 163 163 netlbl_secattr_init(&secattr); 164 164 rc = netlbl_skbuff_getattr(skb, &secattr); 165 - if (rc == 0 && secattr.flags != NETLBL_SECATTR_NONE) 165 + if (rc == 0 && secattr.flags != NETLBL_SECATTR_NONE) { 166 166 rc = security_netlbl_secattr_to_sid(&secattr, base_sid, sid); 167 - else 167 + if (rc == 0 && 168 + (secattr.flags & NETLBL_SECATTR_CACHEABLE) && 169 + (secattr.flags & NETLBL_SECATTR_CACHE)) 170 + netlbl_cache_add(skb, &secattr); 171 + } else 168 172 *sid = SECSID_NULL; 169 173 netlbl_secattr_destroy(&secattr); 170 174 ··· 311 307 312 308 netlbl_secattr_init(&secattr); 313 309 rc = netlbl_skbuff_getattr(skb, &secattr); 314 - if (rc == 0 && secattr.flags != NETLBL_SECATTR_NONE) 310 + if (rc == 0 && secattr.flags != NETLBL_SECATTR_NONE) { 315 311 rc = security_netlbl_secattr_to_sid(&secattr, 316 312 SECINITSID_NETMSG, 317 313 &nlbl_sid); 318 - else 314 + if (rc == 0 && 315 + (secattr.flags & NETLBL_SECATTR_CACHEABLE) && 316 + (secattr.flags & NETLBL_SECATTR_CACHE)) 317 + netlbl_cache_add(skb, &secattr); 318 + } else 319 319 nlbl_sid = SECINITSID_UNLABELED; 320 320 netlbl_secattr_destroy(&secattr); 321 321 if (rc != 0)