Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: ixp4xx: Use the expansion bus

Replace the "simple-bus" simplification by the proper bus for
IXP4xx memory or device expansion.

Use chip-select addressing with two address cells on all the
flashes mounted on the IXP4xx devices. This includes all flash
chips.

Change the unit-name from @50000000 to @c4000000 as the DTS
validation screams. The registers for controlling the bus are
at c4000000 but the actual memory windows and ranges are at
50000000. Well it is just syntax, we can live with it.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

+62 -24
+3 -3
arch/arm/boot/dts/intel-ixp42x-iomega-nas100d.dts
··· 89 89 }; 90 90 91 91 soc { 92 - bus@50000000 { 92 + bus@c4000000 { 93 93 /* The first 16MB region at CS0 on the expansion bus */ 94 - flash@0 { 94 + flash@0,0 { 95 95 compatible = "intel,ixp4xx-flash", "cfi-flash"; 96 96 bank-width = <2>; 97 97 /* 98 98 * 8 MB of Flash in 0x20000 byte blocks 99 99 * mapped in at CS0. 100 100 */ 101 - reg = <0x00000000 0x800000>; 101 + reg = <0 0x00000000 0x800000>; 102 102 103 103 partitions { 104 104 compatible = "redboot-fis";
+3 -3
arch/arm/boot/dts/intel-ixp42x-linksys-nslu2.dts
··· 96 96 }; 97 97 98 98 soc { 99 - bus@50000000 { 99 + bus@c4000000 { 100 100 /* The first 16MB region at CS0 on the expansion bus */ 101 - flash@0 { 101 + flash@0,0 { 102 102 compatible = "intel,ixp4xx-flash", "cfi-flash"; 103 103 bank-width = <2>; 104 104 /* 105 105 * 8 MB of Flash in 0x20000 byte blocks 106 106 * mapped in at CS0. 107 107 */ 108 - reg = <0x00000000 0x800000>; 108 + reg = <0 0x00000000 0x800000>; 109 109 110 110 partitions { 111 111 compatible = "redboot-fis";
+3 -3
arch/arm/boot/dts/intel-ixp42x-welltech-epbx100.dts
··· 29 29 }; 30 30 31 31 soc { 32 - bus@50000000 { 33 - flash@0 { 32 + bus@c4000000 { 33 + flash@0,0 { 34 34 compatible = "intel,ixp4xx-flash", "cfi-flash"; 35 35 bank-width = <2>; 36 36 /* 37 37 * 16 MB of Flash 38 38 */ 39 - reg = <0x00000000 0x1000000>; 39 + reg = <0 0x00000000 0x1000000>; 40 40 41 41 partitions { 42 42 compatible = "fixed-partitions";
+5
arch/arm/boot/dts/intel-ixp42x.dtsi
··· 7 7 8 8 / { 9 9 soc { 10 + bus@c4000000 { 11 + compatible = "intel,ixp42x-expansion-bus-controller", "syscon"; 12 + reg = <0xc4000000 0x28>; 13 + }; 14 + 10 15 pci@c0000000 { 11 16 compatible = "intel,ixp42x-pci"; 12 17 };
+6 -4
arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts
··· 77 77 }; 78 78 79 79 soc { 80 - bus@50000000 { 81 - flash@0 { 80 + bus@c4000000 { 81 + flash@0,0 { 82 82 compatible = "intel,ixp4xx-flash", "cfi-flash"; 83 83 bank-width = <2>; 84 + /* Enable writes on the expansion bus */ 85 + intel,ixp4xx-eb-write-enable = <1>; 84 86 /* 85 87 * 32 MB of Flash in 0x20000 byte blocks 86 - * mapped in at CS0. 88 + * mapped in at CS0 and CS1 87 89 */ 88 - reg = <0x00000000 0x2000000>; 90 + reg = <0 0x00000000 0x2000000>; 89 91 90 92 partitions { 91 93 compatible = "redboot-fis";
+6
arch/arm/boot/dts/intel-ixp43x.dtsi
··· 8 8 9 9 / { 10 10 soc { 11 + bus@c4000000 { 12 + compatible = "intel,ixp43x-expansion-bus-controller", "syscon"; 13 + /* Uses at least up to 0x230 */ 14 + reg = <0xc4000000 0x1000>; 15 + }; 16 + 11 17 pci@c0000000 { 12 18 compatible = "intel,ixp43x-pci"; 13 19 };
+11
arch/arm/boot/dts/intel-ixp45x-ixp46x.dtsi
··· 9 9 10 10 / { 11 11 soc { 12 + bus@c4000000 { 13 + compatible = "intel,ixp46x-expansion-bus-controller", "syscon"; 14 + /* Uses at least up to 0x124 */ 15 + reg = <0xc4000000 0x1000>; 16 + }; 17 + 18 + rng@70002100 { 19 + compatible = "intel,ixp46x-rng"; 20 + reg = <0x70002100 4>; 21 + }; 22 + 12 23 interrupt-controller@c8003000 { 13 24 compatible = "intel,ixp43x-interrupt"; 14 25 };
+22 -8
arch/arm/boot/dts/intel-ixp4xx.dtsi
··· 15 15 interrupt-parent = <&intcon>; 16 16 17 17 /* 18 - * The IXP4xx expansion bus is a set of 16 or 32MB 19 - * windows in the 256MB space from 0x50000000 to 20 - * 0x5fffffff. 18 + * The IXP4xx expansion bus is a set of up to 7 each up to 16MB 19 + * windows in the 256MB space from 0x50000000 to 0x5fffffff. 21 20 */ 22 - bus@50000000 { 23 - compatible = "simple-bus"; 24 - #address-cells = <1>; 21 + bus@c4000000 { 22 + /* compatible and reg filled in by per-soc device tree */ 23 + native-endian; 24 + #address-cells = <2>; 25 25 #size-cells = <1>; 26 - ranges = <0x00000000 0x50000000 0x10000000>; 27 - dma-ranges = <0x00000000 0x50000000 0x10000000>; 26 + ranges = <0 0x0 0x50000000 0x01000000>, 27 + <1 0x0 0x51000000 0x01000000>, 28 + <2 0x0 0x52000000 0x01000000>, 29 + <3 0x0 0x53000000 0x01000000>, 30 + <4 0x0 0x54000000 0x01000000>, 31 + <5 0x0 0x55000000 0x01000000>, 32 + <6 0x0 0x56000000 0x01000000>, 33 + <7 0x0 0x57000000 0x01000000>; 34 + dma-ranges = <0 0x0 0x50000000 0x01000000>, 35 + <1 0x0 0x51000000 0x01000000>, 36 + <2 0x0 0x52000000 0x01000000>, 37 + <3 0x0 0x53000000 0x01000000>, 38 + <4 0x0 0x54000000 0x01000000>, 39 + <5 0x0 0x55000000 0x01000000>, 40 + <6 0x0 0x56000000 0x01000000>, 41 + <7 0x0 0x57000000 0x01000000>; 28 42 }; 29 43 30 44 qmgr: queue-manager@60000000 {