Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amdgpu/powerplay: unify smu send message function

Drop smu_send_smc_msg function from ASIC specify structure.
Reuse smu_send_smc_msg_with_param function for smu_send_smc_msg.
Set paramer to 0 for smu_send_msg function, otherwise it will send
with previous paramer value (Not a certain value).
Materialize msg type for smu send message function definition.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Likun Gao and committed by
Alex Deucher
f275cde7 7091b60c

+21 -67
+9
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
··· 2568 2568 2569 2569 return ret; 2570 2570 } 2571 + 2572 + int smu_send_smc_msg(struct smu_context *smu, 2573 + enum smu_message_type msg) 2574 + { 2575 + int ret; 2576 + 2577 + ret = smu_send_smc_msg_with_param(smu, msg, 0); 2578 + return ret; 2579 + }
-1
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
··· 2137 2137 .set_tool_table_location = smu_v11_0_set_tool_table_location, 2138 2138 .notify_memory_pool_location = smu_v11_0_notify_memory_pool_location, 2139 2139 .system_features_control = smu_v11_0_system_features_control, 2140 - .send_smc_msg = smu_v11_0_send_msg, 2141 2140 .send_smc_msg_with_param = smu_v11_0_send_msg_with_param, 2142 2141 .read_smc_arg = smu_v11_0_read_arg, 2143 2142 .init_display_count = smu_v11_0_init_display_count,
+2 -2
drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
··· 500 500 int (*notify_memory_pool_location)(struct smu_context *smu); 501 501 int (*set_last_dcef_min_deep_sleep_clk)(struct smu_context *smu); 502 502 int (*system_features_control)(struct smu_context *smu, bool en); 503 - int (*send_smc_msg)(struct smu_context *smu, uint16_t msg); 504 - int (*send_smc_msg_with_param)(struct smu_context *smu, uint16_t msg, uint32_t param); 503 + int (*send_smc_msg_with_param)(struct smu_context *smu, 504 + enum smu_message_type msg, uint32_t param); 505 505 int (*read_smc_arg)(struct smu_context *smu, uint32_t *arg); 506 506 int (*init_display_count)(struct smu_context *smu, uint32_t count); 507 507 int (*set_allowed_mask)(struct smu_context *smu);
+2 -3
drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
··· 177 177 int smu_v11_0_system_features_control(struct smu_context *smu, 178 178 bool en); 179 179 180 - int smu_v11_0_send_msg(struct smu_context *smu, uint16_t msg); 181 - 182 180 int 183 - smu_v11_0_send_msg_with_param(struct smu_context *smu, uint16_t msg, 181 + smu_v11_0_send_msg_with_param(struct smu_context *smu, 182 + enum smu_message_type msg, 184 183 uint32_t param); 185 184 186 185 int smu_v11_0_read_arg(struct smu_context *smu, uint32_t *arg);
+2 -3
drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
··· 44 44 45 45 int smu_v12_0_wait_for_response(struct smu_context *smu); 46 46 47 - int smu_v12_0_send_msg(struct smu_context *smu, uint16_t msg); 48 - 49 47 int 50 - smu_v12_0_send_msg_with_param(struct smu_context *smu, uint16_t msg, 48 + smu_v12_0_send_msg_with_param(struct smu_context *smu, 49 + enum smu_message_type msg, 51 50 uint32_t param); 52 51 53 52 int smu_v12_0_check_fw_status(struct smu_context *smu);
-1
drivers/gpu/drm/amd/powerplay/navi10_ppt.c
··· 2083 2083 .set_tool_table_location = smu_v11_0_set_tool_table_location, 2084 2084 .notify_memory_pool_location = smu_v11_0_notify_memory_pool_location, 2085 2085 .system_features_control = smu_v11_0_system_features_control, 2086 - .send_smc_msg = smu_v11_0_send_msg, 2087 2086 .send_smc_msg_with_param = smu_v11_0_send_msg_with_param, 2088 2087 .read_smc_arg = smu_v11_0_read_arg, 2089 2088 .init_display_count = smu_v11_0_init_display_count,
-1
drivers/gpu/drm/amd/powerplay/renoir_ppt.c
··· 800 800 .powergate_sdma = smu_v12_0_powergate_sdma, 801 801 .powergate_vcn = smu_v12_0_powergate_vcn, 802 802 .powergate_jpeg = smu_v12_0_powergate_jpeg, 803 - .send_smc_msg = smu_v12_0_send_msg, 804 803 .send_smc_msg_with_param = smu_v12_0_send_msg_with_param, 805 804 .read_smc_arg = smu_v12_0_read_arg, 806 805 .set_gfx_cgpg = smu_v12_0_set_gfx_cgpg,
+2 -2
drivers/gpu/drm/amd/powerplay/smu_internal.h
··· 77 77 #define smu_set_default_od_settings(smu, initialize) \ 78 78 ((smu)->ppt_funcs->set_default_od_settings ? (smu)->ppt_funcs->set_default_od_settings((smu), (initialize)) : 0) 79 79 80 - #define smu_send_smc_msg(smu, msg) \ 81 - ((smu)->ppt_funcs->send_smc_msg? (smu)->ppt_funcs->send_smc_msg((smu), (msg)) : 0) 80 + int smu_send_smc_msg(struct smu_context *smu, enum smu_message_type msg); 81 + 82 82 #define smu_send_smc_msg_with_param(smu, msg, param) \ 83 83 ((smu)->ppt_funcs->send_smc_msg_with_param? (smu)->ppt_funcs->send_smc_msg_with_param((smu), (msg), (param)) : 0) 84 84 #define smu_read_smc_arg(smu, arg) \
+2 -27
drivers/gpu/drm/amd/powerplay/smu_v11_0.c
··· 91 91 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90) == 0x1 ? 0 : -EIO; 92 92 } 93 93 94 - int smu_v11_0_send_msg(struct smu_context *smu, uint16_t msg) 95 - { 96 - struct amdgpu_device *adev = smu->adev; 97 - int ret = 0, index = 0; 98 - 99 - index = smu_msg_get_index(smu, msg); 100 - if (index < 0) 101 - return index; 102 - 103 - smu_v11_0_wait_for_response(smu); 104 - 105 - WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); 106 - 107 - smu_v11_0_send_msg_without_waiting(smu, (uint16_t)index); 108 - 109 - ret = smu_v11_0_wait_for_response(smu); 110 - 111 - if (ret) 112 - pr_err("failed send message: %10s (%d) response %#x\n", 113 - smu_get_message_name(smu, msg), index, ret); 114 - 115 - return ret; 116 - 117 - } 118 - 119 94 int 120 - smu_v11_0_send_msg_with_param(struct smu_context *smu, uint16_t msg, 95 + smu_v11_0_send_msg_with_param(struct smu_context *smu, 96 + enum smu_message_type msg, 121 97 uint32_t param) 122 98 { 123 - 124 99 struct amdgpu_device *adev = smu->adev; 125 100 int ret = 0, index = 0; 126 101
+2 -26
drivers/gpu/drm/amd/powerplay/smu_v12_0.c
··· 77 77 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90) == 0x1 ? 0 : -EIO; 78 78 } 79 79 80 - int smu_v12_0_send_msg(struct smu_context *smu, uint16_t msg) 81 - { 82 - struct amdgpu_device *adev = smu->adev; 83 - int ret = 0, index = 0; 84 - 85 - index = smu_msg_get_index(smu, msg); 86 - if (index < 0) 87 - return index; 88 - 89 - smu_v12_0_wait_for_response(smu); 90 - 91 - WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); 92 - 93 - smu_v12_0_send_msg_without_waiting(smu, (uint16_t)index); 94 - 95 - ret = smu_v12_0_wait_for_response(smu); 96 - 97 - if (ret) 98 - pr_err("Failed to send message 0x%x, response 0x%x\n", index, 99 - ret); 100 - 101 - return ret; 102 - 103 - } 104 - 105 80 int 106 - smu_v12_0_send_msg_with_param(struct smu_context *smu, uint16_t msg, 81 + smu_v12_0_send_msg_with_param(struct smu_context *smu, 82 + enum smu_message_type msg, 107 83 uint32_t param) 108 84 { 109 85 struct amdgpu_device *adev = smu->adev;
-1
drivers/gpu/drm/amd/powerplay/vega20_ppt.c
··· 3231 3231 .set_tool_table_location = smu_v11_0_set_tool_table_location, 3232 3232 .notify_memory_pool_location = smu_v11_0_notify_memory_pool_location, 3233 3233 .system_features_control = smu_v11_0_system_features_control, 3234 - .send_smc_msg = smu_v11_0_send_msg, 3235 3234 .send_smc_msg_with_param = smu_v11_0_send_msg_with_param, 3236 3235 .read_smc_arg = smu_v11_0_read_arg, 3237 3236 .init_display_count = smu_v11_0_init_display_count,