tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
r8169: add support for RTL8127A
This adds support for 10Gbs chip RTL8127A.
Signed-off-by: ChunHao Lin <hau@realtek.com>
Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://patch.msgid.link/20250515095303.3138-1-hau@realtek.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
authored by
ChunHao Lin
and committed by
Jakub Kicinski
f24f7b2f
12889ce9
+193
-3
+1
drivers/net/ethernet/realtek/r8169.h
+1
drivers/net/ethernet/realtek/r8169.h
+26
-3
drivers/net/ethernet/realtek/r8169_main.c
+26
-3
drivers/net/ethernet/realtek/r8169_main.c
···
60
60
#define FIRMWARE_8125BP_2 "rtl_nic/rtl8125bp-2.fw"
61
61
#define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw"
62
62
#define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw"
63
+
#define FIRMWARE_8127A_1 "rtl_nic/rtl8127a-1.fw"
63
64
64
65
#define TX_DMA_BURST 7 /* Maximum PCI burst, '7' is unlimited */
65
66
#define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
···
99
98
const char *name;
100
99
const char *fw_name;
101
100
} rtl_chip_infos[] = {
101
+
/* 8127A family. */
102
+
{ 0x7cf, 0x6c9, RTL_GIGA_MAC_VER_80, "RTL8127A", FIRMWARE_8127A_1 },
103
+
102
104
/* 8126A family. */
103
105
{ 0x7cf, 0x64a, RTL_GIGA_MAC_VER_70, "RTL8126A", FIRMWARE_8126A_3 },
104
106
{ 0x7cf, 0x649, RTL_GIGA_MAC_VER_70, "RTL8126A", FIRMWARE_8126A_2 },
···
226
222
{ 0x0001, 0x8168, PCI_ANY_ID, 0x2410 },
227
223
{ PCI_VDEVICE(REALTEK, 0x8125) },
228
224
{ PCI_VDEVICE(REALTEK, 0x8126) },
225
+
{ PCI_VDEVICE(REALTEK, 0x8127) },
229
226
{ PCI_VDEVICE(REALTEK, 0x3000) },
230
227
{ PCI_VDEVICE(REALTEK, 0x5000) },
228
+
{ PCI_VDEVICE(REALTEK, 0x0e10) },
231
229
{}
232
230
};
233
231
···
775
769
MODULE_FIRMWARE(FIRMWARE_8125BP_2);
776
770
MODULE_FIRMWARE(FIRMWARE_8126A_2);
777
771
MODULE_FIRMWARE(FIRMWARE_8126A_3);
772
+
MODULE_FIRMWARE(FIRMWARE_8127A_1);
778
773
779
774
static inline struct device *tp_to_dev(struct rtl8169_private *tp)
780
775
{
···
2944
2937
rtl_mod_config5(tp, 0, ASPM_en);
2945
2938
switch (tp->mac_version) {
2946
2939
case RTL_GIGA_MAC_VER_70:
2940
+
case RTL_GIGA_MAC_VER_80:
2947
2941
val8 = RTL_R8(tp, INT_CFG0_8125) | INT_CFG0_CLKREQEN;
2948
2942
RTL_W8(tp, INT_CFG0_8125, val8);
2949
2943
break;
···
2976
2968
2977
2969
switch (tp->mac_version) {
2978
2970
case RTL_GIGA_MAC_VER_70:
2971
+
case RTL_GIGA_MAC_VER_80:
2979
2972
val8 = RTL_R8(tp, INT_CFG0_8125) & ~INT_CFG0_CLKREQEN;
2980
2973
RTL_W8(tp, INT_CFG0_8125, val8);
2981
2974
break;
···
3696
3687
/* disable new tx descriptor format */
3697
3688
r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000);
3698
3689
3699
-
if (tp->mac_version == RTL_GIGA_MAC_VER_70)
3690
+
if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
3691
+
tp->mac_version == RTL_GIGA_MAC_VER_80)
3700
3692
RTL_W8(tp, 0xD8, RTL_R8(tp, 0xD8) & ~0x02);
3701
3693
3702
-
if (tp->mac_version == RTL_GIGA_MAC_VER_70)
3694
+
if (tp->mac_version == RTL_GIGA_MAC_VER_80)
3695
+
r8168_mac_ocp_modify(tp, 0xe614, 0x0f00, 0x0f00);
3696
+
else if (tp->mac_version == RTL_GIGA_MAC_VER_70)
3703
3697
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400);
3704
3698
else if (tp->mac_version == RTL_GIGA_MAC_VER_63)
3705
3699
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200);
···
3720
3708
r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0030);
3721
3709
r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000);
3722
3710
r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001);
3723
-
if (tp->mac_version == RTL_GIGA_MAC_VER_70)
3711
+
if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
3712
+
tp->mac_version == RTL_GIGA_MAC_VER_80)
3724
3713
r8168_mac_ocp_modify(tp, 0xea1c, 0x0300, 0x0000);
3725
3714
else
3726
3715
r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000);
···
3799
3786
rtl_hw_start_8125_common(tp);
3800
3787
}
3801
3788
3789
+
static void rtl_hw_start_8127a(struct rtl8169_private *tp)
3790
+
{
3791
+
rtl_set_def_aspm_entry_latency(tp);
3792
+
rtl_hw_start_8125_common(tp);
3793
+
}
3794
+
3802
3795
static void rtl_hw_config(struct rtl8169_private *tp)
3803
3796
{
3804
3797
static const rtl_generic_fct hw_configs[] = {
···
3848
3829
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
3849
3830
[RTL_GIGA_MAC_VER_66] = rtl_hw_start_8125d,
3850
3831
[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
3832
+
[RTL_GIGA_MAC_VER_80] = rtl_hw_start_8127a,
3851
3833
};
3852
3834
3853
3835
if (hw_configs[tp->mac_version])
···
3866
3846
case RTL_GIGA_MAC_VER_61:
3867
3847
case RTL_GIGA_MAC_VER_64:
3868
3848
case RTL_GIGA_MAC_VER_66:
3849
+
case RTL_GIGA_MAC_VER_80:
3869
3850
for (i = 0xa00; i < 0xb00; i += 4)
3870
3851
RTL_W32(tp, i, 0);
3852
+
if (tp->mac_version == RTL_GIGA_MAC_VER_80)
3853
+
RTL_W16(tp, INT_CFG1_8125, 0x0000);
3871
3854
break;
3872
3855
case RTL_GIGA_MAC_VER_63:
3873
3856
case RTL_GIGA_MAC_VER_70:
+166
drivers/net/ethernet/realtek/r8169_phy_config.c
+166
drivers/net/ethernet/realtek/r8169_phy_config.c
···
1130
1130
rtl8125_common_config_eee_phy(phydev);
1131
1131
}
1132
1132
1133
+
static void rtl8127a_1_hw_phy_config(struct rtl8169_private *tp,
1134
+
struct phy_device *phydev)
1135
+
{
1136
+
r8169_apply_firmware(tp);
1137
+
rtl8168g_enable_gphy_10m(phydev);
1138
+
1139
+
r8168g_phy_param(phydev, 0x8415, 0xff00, 0x9300);
1140
+
r8168g_phy_param(phydev, 0x81a3, 0xff00, 0x0f00);
1141
+
r8168g_phy_param(phydev, 0x81ae, 0xff00, 0x0f00);
1142
+
r8168g_phy_param(phydev, 0x81b9, 0xff00, 0xb900);
1143
+
rtl8125_phy_param(phydev, 0x83b0, 0x0e00, 0x0000);
1144
+
rtl8125_phy_param(phydev, 0x83C5, 0x0e00, 0x0000);
1145
+
rtl8125_phy_param(phydev, 0x83da, 0x0e00, 0x0000);
1146
+
rtl8125_phy_param(phydev, 0x83ef, 0x0e00, 0x0000);
1147
+
phy_modify_paged(phydev, 0x0bf3, 0x14, 0x01f0, 0x0160);
1148
+
phy_modify_paged(phydev, 0x0bf3, 0x15, 0x001f, 0x0014);
1149
+
phy_modify_paged(phydev, 0x0bf2, 0x14, 0x6000, 0x0000);
1150
+
phy_modify_paged(phydev, 0x0bf2, 0x16, 0xc000, 0x0000);
1151
+
phy_modify_paged(phydev, 0x0bf2, 0x14, 0x1fff, 0x0187);
1152
+
phy_modify_paged(phydev, 0x0bf2, 0x15, 0x003f, 0x0003);
1153
+
1154
+
r8168g_phy_param(phydev, 0x8173, 0xffff, 0x8620);
1155
+
r8168g_phy_param(phydev, 0x8175, 0xffff, 0x8671);
1156
+
r8168g_phy_param(phydev, 0x817c, 0x0000, 0x2000);
1157
+
r8168g_phy_param(phydev, 0x8187, 0x0000, 0x2000);
1158
+
r8168g_phy_param(phydev, 0x8192, 0x0000, 0x2000);
1159
+
r8168g_phy_param(phydev, 0x819d, 0x0000, 0x2000);
1160
+
r8168g_phy_param(phydev, 0x81a8, 0x2000, 0x0000);
1161
+
r8168g_phy_param(phydev, 0x81b3, 0x2000, 0x0000);
1162
+
r8168g_phy_param(phydev, 0x81be, 0x0000, 0x2000);
1163
+
r8168g_phy_param(phydev, 0x817d, 0xff00, 0xa600);
1164
+
r8168g_phy_param(phydev, 0x8188, 0xff00, 0xa600);
1165
+
r8168g_phy_param(phydev, 0x8193, 0xff00, 0xa600);
1166
+
r8168g_phy_param(phydev, 0x819e, 0xff00, 0xa600);
1167
+
r8168g_phy_param(phydev, 0x81a9, 0xff00, 0x1400);
1168
+
r8168g_phy_param(phydev, 0x81b4, 0xff00, 0x1400);
1169
+
r8168g_phy_param(phydev, 0x81bf, 0xff00, 0xa600);
1170
+
1171
+
phy_modify_paged(phydev, 0x0aea, 0x15, 0x0028, 0x0000);
1172
+
1173
+
rtl8125_phy_param(phydev, 0x84f0, 0xffff, 0x201c);
1174
+
rtl8125_phy_param(phydev, 0x84f2, 0xffff, 0x3117);
1175
+
1176
+
phy_write_paged(phydev, 0x0aec, 0x13, 0x0000);
1177
+
phy_write_paged(phydev, 0x0ae2, 0x10, 0xffff);
1178
+
phy_write_paged(phydev, 0x0aec, 0x17, 0xffff);
1179
+
phy_write_paged(phydev, 0x0aed, 0x11, 0xffff);
1180
+
phy_write_paged(phydev, 0x0aec, 0x14, 0x0000);
1181
+
phy_modify_paged(phydev, 0x0aed, 0x10, 0x0001, 0x0000);
1182
+
phy_write_paged(phydev, 0x0adb, 0x14, 0x0150);
1183
+
rtl8125_phy_param(phydev, 0x8197, 0xff00, 0x5000);
1184
+
rtl8125_phy_param(phydev, 0x8231, 0xff00, 0x5000);
1185
+
rtl8125_phy_param(phydev, 0x82cb, 0xff00, 0x5000);
1186
+
rtl8125_phy_param(phydev, 0x82cd, 0xff00, 0x5700);
1187
+
rtl8125_phy_param(phydev, 0x8233, 0xff00, 0x5700);
1188
+
rtl8125_phy_param(phydev, 0x8199, 0xff00, 0x5700);
1189
+
1190
+
rtl8125_phy_param(phydev, 0x815a, 0xffff, 0x0150);
1191
+
rtl8125_phy_param(phydev, 0x81f4, 0xffff, 0x0150);
1192
+
rtl8125_phy_param(phydev, 0x828e, 0xffff, 0x0150);
1193
+
rtl8125_phy_param(phydev, 0x81b1, 0xffff, 0x0000);
1194
+
rtl8125_phy_param(phydev, 0x824b, 0xffff, 0x0000);
1195
+
rtl8125_phy_param(phydev, 0x82e5, 0xffff, 0x0000);
1196
+
1197
+
rtl8125_phy_param(phydev, 0x84f7, 0xff00, 0x2800);
1198
+
phy_modify_paged(phydev, 0x0aec, 0x11, 0x0000, 0x1000);
1199
+
rtl8125_phy_param(phydev, 0x81b3, 0xff00, 0xad00);
1200
+
rtl8125_phy_param(phydev, 0x824d, 0xff00, 0xad00);
1201
+
rtl8125_phy_param(phydev, 0x82e7, 0xff00, 0xad00);
1202
+
phy_modify_paged(phydev, 0x0ae4, 0x17, 0x000f, 0x0001);
1203
+
rtl8125_phy_param(phydev, 0x82ce, 0xf000, 0x4000);
1204
+
1205
+
rtl8125_phy_param(phydev, 0x84ac, 0xffff, 0x0000);
1206
+
rtl8125_phy_param(phydev, 0x84ae, 0xffff, 0x0000);
1207
+
rtl8125_phy_param(phydev, 0x84b0, 0xffff, 0xf818);
1208
+
rtl8125_phy_param(phydev, 0x84b2, 0xff00, 0x6000);
1209
+
1210
+
rtl8125_phy_param(phydev, 0x8ffc, 0xffff, 0x6008);
1211
+
rtl8125_phy_param(phydev, 0x8ffe, 0xffff, 0xf450);
1212
+
1213
+
rtl8125_phy_param(phydev, 0x8015, 0x0000, 0x0200);
1214
+
rtl8125_phy_param(phydev, 0x8016, 0x0800, 0x0000);
1215
+
rtl8125_phy_param(phydev, 0x8fe6, 0xff00, 0x0800);
1216
+
rtl8125_phy_param(phydev, 0x8fe4, 0xffff, 0x2114);
1217
+
1218
+
rtl8125_phy_param(phydev, 0x8647, 0xffff, 0xa7b1);
1219
+
rtl8125_phy_param(phydev, 0x8649, 0xffff, 0xbbca);
1220
+
rtl8125_phy_param(phydev, 0x864b, 0xff00, 0xdc00);
1221
+
1222
+
rtl8125_phy_param(phydev, 0x8154, 0xc000, 0x4000);
1223
+
rtl8125_phy_param(phydev, 0x8158, 0xc000, 0x0000);
1224
+
1225
+
rtl8125_phy_param(phydev, 0x826c, 0xffff, 0xffff);
1226
+
rtl8125_phy_param(phydev, 0x826e, 0xffff, 0xffff);
1227
+
1228
+
rtl8125_phy_param(phydev, 0x8872, 0xff00, 0x0e00);
1229
+
r8168g_phy_param(phydev, 0x8012, 0x0000, 0x0800);
1230
+
r8168g_phy_param(phydev, 0x8012, 0x0000, 0x4000);
1231
+
phy_modify_paged(phydev, 0x0b57, 0x13, 0x0000, 0x0001);
1232
+
r8168g_phy_param(phydev, 0x834a, 0xff00, 0x0700);
1233
+
rtl8125_phy_param(phydev, 0x8217, 0x3f00, 0x2a00);
1234
+
r8168g_phy_param(phydev, 0x81b1, 0xff00, 0x0b00);
1235
+
rtl8125_phy_param(phydev, 0x8fed, 0xff00, 0x4e00);
1236
+
1237
+
rtl8125_phy_param(phydev, 0x88ac, 0xff00, 0x2300);
1238
+
phy_modify_paged(phydev, 0x0bf0, 0x16, 0x0000, 0x3800);
1239
+
rtl8125_phy_param(phydev, 0x88de, 0xff00, 0x0000);
1240
+
rtl8125_phy_param(phydev, 0x80b4, 0xffff, 0x5195);
1241
+
1242
+
r8168g_phy_param(phydev, 0x8370, 0xffff, 0x8671);
1243
+
r8168g_phy_param(phydev, 0x8372, 0xffff, 0x86c8);
1244
+
1245
+
r8168g_phy_param(phydev, 0x8401, 0xffff, 0x86c8);
1246
+
r8168g_phy_param(phydev, 0x8403, 0xffff, 0x86da);
1247
+
r8168g_phy_param(phydev, 0x8406, 0x1800, 0x1000);
1248
+
r8168g_phy_param(phydev, 0x8408, 0x1800, 0x1000);
1249
+
r8168g_phy_param(phydev, 0x840a, 0x1800, 0x1000);
1250
+
r8168g_phy_param(phydev, 0x840c, 0x1800, 0x1000);
1251
+
r8168g_phy_param(phydev, 0x840e, 0x1800, 0x1000);
1252
+
r8168g_phy_param(phydev, 0x8410, 0x1800, 0x1000);
1253
+
r8168g_phy_param(phydev, 0x8412, 0x1800, 0x1000);
1254
+
r8168g_phy_param(phydev, 0x8414, 0x1800, 0x1000);
1255
+
r8168g_phy_param(phydev, 0x8416, 0x1800, 0x1000);
1256
+
1257
+
r8168g_phy_param(phydev, 0x82bd, 0xffff, 0x1f40);
1258
+
1259
+
phy_modify_paged(phydev, 0x0bfb, 0x12, 0x07ff, 0x0328);
1260
+
phy_write_paged(phydev, 0x0bfb, 0x13, 0x3e14);
1261
+
1262
+
r8168g_phy_param(phydev, 0x81c4, 0xffff, 0x003b);
1263
+
r8168g_phy_param(phydev, 0x81c6, 0xffff, 0x0086);
1264
+
r8168g_phy_param(phydev, 0x81c8, 0xffff, 0x00b7);
1265
+
r8168g_phy_param(phydev, 0x81ca, 0xffff, 0x00db);
1266
+
r8168g_phy_param(phydev, 0x81cc, 0xffff, 0x00fe);
1267
+
r8168g_phy_param(phydev, 0x81ce, 0xffff, 0x00fe);
1268
+
r8168g_phy_param(phydev, 0x81d0, 0xffff, 0x00fe);
1269
+
r8168g_phy_param(phydev, 0x81d2, 0xffff, 0x00fe);
1270
+
r8168g_phy_param(phydev, 0x81d4, 0xffff, 0x00c3);
1271
+
r8168g_phy_param(phydev, 0x81d6, 0xffff, 0x0078);
1272
+
r8168g_phy_param(phydev, 0x81d8, 0xffff, 0x0047);
1273
+
r8168g_phy_param(phydev, 0x81da, 0xffff, 0x0023);
1274
+
1275
+
rtl8125_phy_param(phydev, 0x88d7, 0xffff, 0x01a0);
1276
+
rtl8125_phy_param(phydev, 0x88d9, 0xffff, 0x01a0);
1277
+
rtl8125_phy_param(phydev, 0x8ffa, 0xffff, 0x002a);
1278
+
1279
+
rtl8125_phy_param(phydev, 0x8fee, 0xffff, 0xffdf);
1280
+
rtl8125_phy_param(phydev, 0x8ff0, 0xffff, 0xffff);
1281
+
rtl8125_phy_param(phydev, 0x8ff2, 0xffff, 0x0a4a);
1282
+
rtl8125_phy_param(phydev, 0x8ff4, 0xffff, 0xaa5a);
1283
+
rtl8125_phy_param(phydev, 0x8ff6, 0xffff, 0x0a4a);
1284
+
1285
+
rtl8125_phy_param(phydev, 0x8ff8, 0xffff, 0xaa5a);
1286
+
rtl8125_phy_param(phydev, 0x88d5, 0xff00, 0x0200);
1287
+
1288
+
r8168g_phy_param(phydev, 0x84bb, 0xff00, 0x0a00);
1289
+
r8168g_phy_param(phydev, 0x84c0, 0xff00, 0x1600);
1290
+
1291
+
phy_modify_paged(phydev, 0x0a43, 0x10, 0x0000, 0x0003);
1292
+
1293
+
rtl8125_legacy_force_mode(phydev);
1294
+
rtl8168g_disable_aldps(phydev);
1295
+
rtl8125_common_config_eee_phy(phydev);
1296
+
}
1297
+
1133
1298
void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
1134
1299
enum mac_version ver)
1135
1300
{
···
1346
1181
[RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
1347
1182
[RTL_GIGA_MAC_VER_66] = rtl8125bp_hw_phy_config,
1348
1183
[RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
1184
+
[RTL_GIGA_MAC_VER_80] = rtl8127a_1_hw_phy_config,
1349
1185
};
1350
1186
1351
1187
if (phy_configs[ver])