Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

gpio: Retire the explicit gpio irqchip code

Now that all gpiolib irqchip users have been over to use
the irqchip template, we can finally retire the old code
path and leave just one way in to the irqchip: set up the
template when registering the gpio_chip. For a while
we had two code paths for this which was a bit confusing.

This brings this work to a conclusion, there is now one
way of doing this.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Link: https://lore.kernel.org/r/20201019134046.65101-1-linus.walleij@linaro.org

+42 -294
+42 -21
Documentation/driver-api/gpio/driver.rst
··· 416 416 struct gpio_irq_chip inside struct gpio_chip before adding the gpio_chip. 417 417 If you do this, the additional irq_chip will be set up by gpiolib at the 418 418 same time as setting up the rest of the GPIO functionality. The following 419 - is a typical example of a cascaded interrupt handler using gpio_irq_chip: 419 + is a typical example of a chained cascaded interrupt handler using 420 + the gpio_irq_chip: 420 421 421 422 .. code-block:: c 422 423 ··· 453 452 454 453 return devm_gpiochip_add_data(dev, &g->gc, g); 455 454 456 - The helper support using hierarchical interrupt controllers as well. 455 + The helper supports using threaded interrupts as well. Then you just request 456 + the interrupt separately and go with it: 457 + 458 + .. code-block:: c 459 + 460 + /* Typical state container with dynamic irqchip */ 461 + struct my_gpio { 462 + struct gpio_chip gc; 463 + struct irq_chip irq; 464 + }; 465 + 466 + int irq; /* from platform etc */ 467 + struct my_gpio *g; 468 + struct gpio_irq_chip *girq; 469 + 470 + /* Set up the irqchip dynamically */ 471 + g->irq.name = "my_gpio_irq"; 472 + g->irq.irq_ack = my_gpio_ack_irq; 473 + g->irq.irq_mask = my_gpio_mask_irq; 474 + g->irq.irq_unmask = my_gpio_unmask_irq; 475 + g->irq.irq_set_type = my_gpio_set_irq_type; 476 + 477 + ret = devm_request_threaded_irq(dev, irq, NULL, 478 + irq_thread_fn, IRQF_ONESHOT, "my-chip", g); 479 + if (ret < 0) 480 + return ret; 481 + 482 + /* Get a pointer to the gpio_irq_chip */ 483 + girq = &g->gc.irq; 484 + girq->chip = &g->irq; 485 + /* This will let us handle the parent IRQ in the driver */ 486 + girq->parent_handler = NULL; 487 + girq->num_parents = 0; 488 + girq->parents = NULL; 489 + girq->default_type = IRQ_TYPE_NONE; 490 + girq->handler = handle_bad_irq; 491 + 492 + return devm_gpiochip_add_data(dev, &g->gc, g); 493 + 494 + The helper supports using hierarchical interrupt controllers as well. 457 495 In this case the typical set-up will look like this: 458 496 459 497 .. code-block:: c ··· 532 492 the parent hardware irq from a child (i.e. this gpio chip) hardware irq. 533 493 As always it is good to look at examples in the kernel tree for advice 534 494 on how to find the required pieces. 535 - 536 - The old way of adding irqchips to gpiochips after registration is also still 537 - available but we try to move away from this: 538 - 539 - - DEPRECATED: gpiochip_irqchip_add(): adds a chained cascaded irqchip to a 540 - gpiochip. It will pass the struct gpio_chip* for the chip to all IRQ 541 - callbacks, so the callbacks need to embed the gpio_chip in its state 542 - container and obtain a pointer to the container using container_of(). 543 - (See Documentation/driver-api/driver-model/design-patterns.rst) 544 - 545 - - gpiochip_irqchip_add_nested(): adds a nested cascaded irqchip to a gpiochip, 546 - as discussed above regarding different types of cascaded irqchips. The 547 - cascaded irq has to be handled by a threaded interrupt handler. 548 - Apart from that it works exactly like the chained irqchip. 549 - 550 - - gpiochip_set_nested_irqchip(): sets up a nested cascaded irq handler for a 551 - gpio_chip from a parent IRQ. As the parent IRQ has usually been 552 - explicitly requested by the driver, this does very little more than 553 - mark all the child IRQs as having the other IRQ as parent. 554 495 555 496 If there is a need to exclude certain GPIO lines from the IRQ domain handled by 556 497 these helpers, we can set .irq.need_valid_mask of the gpiochip before
-49
drivers/gpio/TODO
··· 129 129 The GPIOLIB irqchip is a helper irqchip for "simple cases" that should 130 130 try to cover any generic kind of irqchip cascaded from a GPIO. 131 131 132 - - Convert all the GPIOLIB_IRQCHIP users to pass an irqchip template, 133 - parent and flags before calling [devm_]gpiochip_add[_data](). 134 - Currently we set up the irqchip after setting up the gpiochip 135 - using gpiochip_irqchip_add() and gpiochip_set_[chained|nested]_irqchip(). 136 - This is too complex, so convert all users over to just set up 137 - the irqchip before registering the gpio_chip, typical example: 138 - 139 - /* Typical state container with dynamic irqchip */ 140 - struct my_gpio { 141 - struct gpio_chip gc; 142 - struct irq_chip irq; 143 - }; 144 - 145 - int irq; /* from platform etc */ 146 - struct my_gpio *g; 147 - struct gpio_irq_chip *girq; 148 - 149 - /* Set up the irqchip dynamically */ 150 - g->irq.name = "my_gpio_irq"; 151 - g->irq.irq_ack = my_gpio_ack_irq; 152 - g->irq.irq_mask = my_gpio_mask_irq; 153 - g->irq.irq_unmask = my_gpio_unmask_irq; 154 - g->irq.irq_set_type = my_gpio_set_irq_type; 155 - 156 - /* Get a pointer to the gpio_irq_chip */ 157 - girq = &g->gc.irq; 158 - girq->chip = &g->irq; 159 - girq->parent_handler = ftgpio_gpio_irq_handler; 160 - girq->num_parents = 1; 161 - girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents), 162 - GFP_KERNEL); 163 - if (!girq->parents) 164 - return -ENOMEM; 165 - girq->default_type = IRQ_TYPE_NONE; 166 - girq->handler = handle_bad_irq; 167 - girq->parents[0] = irq; 168 - 169 - When this is done, we will delete the old APIs for instatiating 170 - GPIOLIB_IRQCHIP and simplify the code. 171 - 172 132 - Look over and identify any remaining easily converted drivers and 173 133 dry-code conversions to gpiolib irqchip for maintainers to test 174 - 175 - - Drop gpiochip_set_chained_irqchip() when all the chained irqchips 176 - have been converted to the above infrastructure. 177 - 178 - - Add more infrastructure to make it possible to also pass a threaded 179 - irqchip in struct gpio_irq_chip. 180 - 181 - - Drop gpiochip_irqchip_add_nested() when all the chained irqchips 182 - have been converted to the above infrastructure. 183 134 184 135 185 136 Increase integration with pin control
-153
drivers/gpio/gpiolib.c
··· 924 924 } 925 925 EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid); 926 926 927 - /** 928 - * gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip 929 - * @gc: the gpiochip to set the irqchip chain to 930 - * @parent_irq: the irq number corresponding to the parent IRQ for this 931 - * cascaded irqchip 932 - * @parent_handler: the parent interrupt handler for the accumulated IRQ 933 - * coming out of the gpiochip. If the interrupt is nested rather than 934 - * cascaded, pass NULL in this handler argument 935 - */ 936 - static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gc, 937 - unsigned int parent_irq, 938 - irq_flow_handler_t parent_handler) 939 - { 940 - struct gpio_irq_chip *girq = &gc->irq; 941 - struct device *dev = &gc->gpiodev->dev; 942 - 943 - if (!girq->domain) { 944 - chip_err(gc, "called %s before setting up irqchip\n", 945 - __func__); 946 - return; 947 - } 948 - 949 - if (parent_handler) { 950 - if (gc->can_sleep) { 951 - chip_err(gc, 952 - "you cannot have chained interrupts on a chip that may sleep\n"); 953 - return; 954 - } 955 - girq->parents = devm_kcalloc(dev, 1, 956 - sizeof(*girq->parents), 957 - GFP_KERNEL); 958 - if (!girq->parents) { 959 - chip_err(gc, "out of memory allocating parent IRQ\n"); 960 - return; 961 - } 962 - girq->parents[0] = parent_irq; 963 - girq->num_parents = 1; 964 - /* 965 - * The parent irqchip is already using the chip_data for this 966 - * irqchip, so our callbacks simply use the handler_data. 967 - */ 968 - irq_set_chained_handler_and_data(parent_irq, parent_handler, 969 - gc); 970 - } 971 - } 972 - 973 - /** 974 - * gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip 975 - * @gc: the gpiochip to set the irqchip nested handler to 976 - * @irqchip: the irqchip to nest to the gpiochip 977 - * @parent_irq: the irq number corresponding to the parent IRQ for this 978 - * nested irqchip 979 - */ 980 - void gpiochip_set_nested_irqchip(struct gpio_chip *gc, 981 - struct irq_chip *irqchip, 982 - unsigned int parent_irq) 983 - { 984 - gpiochip_set_cascaded_irqchip(gc, parent_irq, NULL); 985 - } 986 - EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip); 987 - 988 927 #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY 989 928 990 929 /** ··· 1573 1634 1574 1635 gpiochip_irqchip_free_valid_mask(gc); 1575 1636 } 1576 - 1577 - /** 1578 - * gpiochip_irqchip_add_key() - adds an irqchip to a gpiochip 1579 - * @gc: the gpiochip to add the irqchip to 1580 - * @irqchip: the irqchip to add to the gpiochip 1581 - * @first_irq: if not dynamically assigned, the base (first) IRQ to 1582 - * allocate gpiochip irqs from 1583 - * @handler: the irq handler to use (often a predefined irq core function) 1584 - * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE 1585 - * to have the core avoid setting up any default type in the hardware. 1586 - * @threaded: whether this irqchip uses a nested thread handler 1587 - * @lock_key: lockdep class for IRQ lock 1588 - * @request_key: lockdep class for IRQ request 1589 - * 1590 - * This function closely associates a certain irqchip with a certain 1591 - * gpiochip, providing an irq domain to translate the local IRQs to 1592 - * global irqs in the gpiolib core, and making sure that the gpiochip 1593 - * is passed as chip data to all related functions. Driver callbacks 1594 - * need to use gpiochip_get_data() to get their local state containers back 1595 - * from the gpiochip passed as chip data. An irqdomain will be stored 1596 - * in the gpiochip that shall be used by the driver to handle IRQ number 1597 - * translation. The gpiochip will need to be initialized and registered 1598 - * before calling this function. 1599 - * 1600 - * This function will handle two cell:ed simple IRQs and assumes all 1601 - * the pins on the gpiochip can generate a unique IRQ. Everything else 1602 - * need to be open coded. 1603 - */ 1604 - int gpiochip_irqchip_add_key(struct gpio_chip *gc, 1605 - struct irq_chip *irqchip, 1606 - unsigned int first_irq, 1607 - irq_flow_handler_t handler, 1608 - unsigned int type, 1609 - bool threaded, 1610 - struct lock_class_key *lock_key, 1611 - struct lock_class_key *request_key) 1612 - { 1613 - struct device_node *of_node; 1614 - 1615 - if (!gc || !irqchip) 1616 - return -EINVAL; 1617 - 1618 - if (!gc->parent) { 1619 - chip_err(gc, "missing gpiochip .dev parent pointer\n"); 1620 - return -EINVAL; 1621 - } 1622 - gc->irq.threaded = threaded; 1623 - of_node = gc->parent->of_node; 1624 - #ifdef CONFIG_OF_GPIO 1625 - /* 1626 - * If the gpiochip has an assigned OF node this takes precedence 1627 - * FIXME: get rid of this and use gc->parent->of_node 1628 - * everywhere 1629 - */ 1630 - if (gc->of_node) 1631 - of_node = gc->of_node; 1632 - #endif 1633 - /* 1634 - * Specifying a default trigger is a terrible idea if DT or ACPI is 1635 - * used to configure the interrupts, as you may end-up with 1636 - * conflicting triggers. Tell the user, and reset to NONE. 1637 - */ 1638 - if (WARN(of_node && type != IRQ_TYPE_NONE, 1639 - "%pOF: Ignoring %d default trigger\n", of_node, type)) 1640 - type = IRQ_TYPE_NONE; 1641 - if (has_acpi_companion(gc->parent) && type != IRQ_TYPE_NONE) { 1642 - acpi_handle_warn(ACPI_HANDLE(gc->parent), 1643 - "Ignoring %d default trigger\n", type); 1644 - type = IRQ_TYPE_NONE; 1645 - } 1646 - 1647 - gc->irq.chip = irqchip; 1648 - gc->irq.handler = handler; 1649 - gc->irq.default_type = type; 1650 - gc->to_irq = gpiochip_to_irq; 1651 - gc->irq.lock_key = lock_key; 1652 - gc->irq.request_key = request_key; 1653 - gc->irq.domain = irq_domain_add_simple(of_node, 1654 - gc->ngpio, first_irq, 1655 - &gpiochip_domain_ops, gc); 1656 - if (!gc->irq.domain) { 1657 - gc->irq.chip = NULL; 1658 - return -EINVAL; 1659 - } 1660 - 1661 - gpiochip_set_irq_hooks(gc); 1662 - 1663 - acpi_gpiochip_request_interrupts(gc); 1664 - 1665 - return 0; 1666 - } 1667 - EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key); 1668 1637 1669 1638 /** 1670 1639 * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip
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include/linux/gpio/driver.h
··· 621 621 void gpiochip_irq_domain_deactivate(struct irq_domain *domain, 622 622 struct irq_data *data); 623 623 624 - void gpiochip_set_nested_irqchip(struct gpio_chip *gc, 625 - struct irq_chip *irqchip, 626 - unsigned int parent_irq); 627 - 628 - int gpiochip_irqchip_add_key(struct gpio_chip *gc, 629 - struct irq_chip *irqchip, 630 - unsigned int first_irq, 631 - irq_flow_handler_t handler, 632 - unsigned int type, 633 - bool threaded, 634 - struct lock_class_key *lock_key, 635 - struct lock_class_key *request_key); 636 - 637 624 bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc, 638 625 unsigned int offset); 639 626 640 627 int gpiochip_irqchip_add_domain(struct gpio_chip *gc, 641 628 struct irq_domain *domain); 642 - 643 - #ifdef CONFIG_LOCKDEP 644 - 645 - /* 646 - * Lockdep requires that each irqchip instance be created with a 647 - * unique key so as to avoid unnecessary warnings. This upfront 648 - * boilerplate static inlines provides such a key for each 649 - * unique instance. 650 - */ 651 - static inline int gpiochip_irqchip_add(struct gpio_chip *gc, 652 - struct irq_chip *irqchip, 653 - unsigned int first_irq, 654 - irq_flow_handler_t handler, 655 - unsigned int type) 656 - { 657 - static struct lock_class_key lock_key; 658 - static struct lock_class_key request_key; 659 - 660 - return gpiochip_irqchip_add_key(gc, irqchip, first_irq, 661 - handler, type, false, 662 - &lock_key, &request_key); 663 - } 664 - 665 - static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gc, 666 - struct irq_chip *irqchip, 667 - unsigned int first_irq, 668 - irq_flow_handler_t handler, 669 - unsigned int type) 670 - { 671 - 672 - static struct lock_class_key lock_key; 673 - static struct lock_class_key request_key; 674 - 675 - return gpiochip_irqchip_add_key(gc, irqchip, first_irq, 676 - handler, type, true, 677 - &lock_key, &request_key); 678 - } 679 - #else /* ! CONFIG_LOCKDEP */ 680 - static inline int gpiochip_irqchip_add(struct gpio_chip *gc, 681 - struct irq_chip *irqchip, 682 - unsigned int first_irq, 683 - irq_flow_handler_t handler, 684 - unsigned int type) 685 - { 686 - return gpiochip_irqchip_add_key(gc, irqchip, first_irq, 687 - handler, type, false, NULL, NULL); 688 - } 689 - 690 - static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gc, 691 - struct irq_chip *irqchip, 692 - unsigned int first_irq, 693 - irq_flow_handler_t handler, 694 - unsigned int type) 695 - { 696 - return gpiochip_irqchip_add_key(gc, irqchip, first_irq, 697 - handler, type, true, NULL, NULL); 698 - } 699 - #endif /* CONFIG_LOCKDEP */ 700 629 701 630 int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset); 702 631 void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset);