Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: at91: move sdramc/ddrsdr header to include/soc/at91

Move the (DDR) SDRAM controller headers to include/soc/at91 to remove the
dependency on mach/ headers from the at91-reset driver.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

authored by

Alexandre Belloni and committed by
Nicolas Ferre
f0a0a58e 93d2cf46

+6 -6
+1
MAINTAINERS
··· 861 861 W: http://www.linux4sam.org 862 862 S: Supported 863 863 F: arch/arm/mach-at91/ 864 + F: include/soc/at91/ 864 865 F: arch/arm/boot/dts/at91*.dts 865 866 F: arch/arm/boot/dts/at91*.dtsi 866 867 F: arch/arm/boot/dts/sama*.dts
+3 -3
arch/arm/mach-at91/include/mach/at91_ramc.h
··· 25 25 #define AT91_MEMCTRL_SDRAMC 1 26 26 #define AT91_MEMCTRL_DDRSDR 2 27 27 28 - #include <mach/at91rm9200_sdramc.h> 29 - #include <mach/at91sam9_ddrsdr.h> 30 - #include <mach/at91sam9_sdramc.h> 28 + #include <soc/at91/at91rm9200_sdramc.h> 29 + #include <soc/at91/at91sam9_ddrsdr.h> 30 + #include <soc/at91/at91sam9_sdramc.h> 31 31 32 32 #endif /* __AT91_RAMC_H__ */
arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h include/soc/at91/at91rm9200_sdramc.h
arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h include/soc/at91/at91sam9_ddrsdr.h
arch/arm/mach-at91/include/mach/at91sam9_sdramc.h include/soc/at91/at91sam9_sdramc.h
-1
arch/arm/mach-at91/pm.h
··· 14 14 #include <asm/proc-fns.h> 15 15 16 16 #include <mach/at91_ramc.h> 17 - #include <mach/at91rm9200_sdramc.h> 18 17 19 18 #ifdef CONFIG_PM 20 19 extern void at91_pm_set_standby(void (*at91_standby)(void));
+2 -2
drivers/power/reset/at91-reset.c
··· 19 19 20 20 #include <asm/system_misc.h> 21 21 22 - #include <mach/at91sam9_ddrsdr.h> 23 - #include <mach/at91sam9_sdramc.h> 22 + #include <soc/at91/at91sam9_ddrsdr.h> 23 + #include <soc/at91/at91sam9_sdramc.h> 24 24 25 25 #define AT91_RSTC_CR 0x00 /* Reset Controller Control Register */ 26 26 #define AT91_RSTC_PROCRST BIT(0) /* Processor Reset */